Allow VPI callbacks to var array words.

Functions like $monitor need to attach callbacks to array words if
those words are to be monitored. Have the array hold all the callbacks
for words in the array, under the assumption that the monitored words
are sparse.

.cvsignore

@@ -2,10 +2,14 @@ lexor_keyword.cc
 parse.h
 parse.cc
 parse.cc.output
+parse.output
 syn-rules.cc
 syn-rules.cc.output
+syn-rules.output
 lexor.cc
 iverilog-vpi
+iverilog-vpi.pdf
+iverilog-vpi.ps
 ivl
 ivl.exp
 dep
@@ -13,8 +17,11 @@ configure
 Makefile
 check
 check.cc
+check.vvp
 config.status
 config.log
 config.cache
+autom4te.cache
 config.h
+_pli_types.h
 dosify

Attrib.cc

@@ -16,8 +16,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: Attrib.cc,v 1.4 2002/05/26 01:39:02 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: Attrib.cc,v 1.6 2004/02/20 18:53:33 steve Exp $"
 #endif
 
 # include "config.h"
@@ -36,25 +36,8 @@ Attrib::~Attrib()
       delete[] list_;
 }
 
-#if 0
-void Attrib::copy_attributes(const map<string,verinum>&attr)
-{
-      assert(list_ == 0);
 
-      nlist_ = attr.size();
-      list_ = new cell_[nlist_];
-
-      map<string,verinum>::const_iterator idx;
-      unsigned jdx;
-      for (idx = attr.begin(), jdx = 0 ;  idx != attr.end() ;  idx ++, jdx++) {
-	    struct cell_*tmp = list_ + jdx;
-	    tmp->key = (*idx).first;
-	    tmp->val = (*idx).second;
-      }
-}
-#endif
-
-const verinum& Attrib::attribute(const string&key) const
+const verinum& Attrib::attribute(perm_string key) const
 {
       for (unsigned idx = 0 ;  idx < nlist_ ;  idx += 1) {
 
@@ -66,7 +49,7 @@ const verinum& Attrib::attribute(const string&key) const
       return null;
 }
 
-void Attrib::attribute(const string&key, const verinum&value)
+void Attrib::attribute(perm_string key, const verinum&value)
 {
       unsigned idx;
 
@@ -108,10 +91,10 @@ unsigned Attrib::attr_cnt() const
       return nlist_;
 }
 
-const char* Attrib::attr_key(unsigned idx) const
+perm_string Attrib::attr_key(unsigned idx) const
 {
       assert(idx < nlist_);
-      return list_[idx].key.c_str();
+      return list_[idx].key;
 }
 
 const verinum& Attrib::attr_value(unsigned idx) const
@@ -123,6 +106,12 @@ const verinum& Attrib::attr_value(unsigned idx) const
 
 /*
  * $Log: Attrib.cc,v $
+ * Revision 1.6  2004/02/20 18:53:33  steve
+ *  Addtrbute keys are perm_strings.
+ *
+ * Revision 1.5  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.4  2002/05/26 01:39:02  steve
  *  Carry Verilog 2001 attributes with processes,
  *  all the way through to the ivl_target API.

Attrib.h

@@ -18,11 +18,11 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: Attrib.h,v 1.3 2002/05/26 01:39:02 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: Attrib.h,v 1.5 2004/02/20 18:53:33 steve Exp $"
 #endif
 
-# include  <string>
+# include  "StringHeap.h"
 # include  "verinum.h"
 
 /*
@@ -35,20 +35,20 @@ class Attrib {
       Attrib();
       ~Attrib();
 
-      const verinum&attribute(const string&key) const;
-      void attribute(const string&key, const verinum&value);
+      const verinum&attribute(perm_string key) const;
+      void attribute(perm_string key, const verinum&value);
       bool has_compat_attributes(const Attrib&that) const;
 
 
 	/* Provide a means of iterating over the entries in the map. */
       unsigned       attr_cnt() const;
-      const char*    attr_key(unsigned idx) const;
+      perm_string    attr_key(unsigned idx) const;
       const verinum& attr_value(unsigned idx) const;
 
 
     private:
       struct cell_ {
-	    string  key;
+	    perm_string  key;
 	    verinum val;
       };
 
@@ -62,6 +62,12 @@ class Attrib {
 
 /*
  * $Log: Attrib.h,v $
+ * Revision 1.5  2004/02/20 18:53:33  steve
+ *  Addtrbute keys are perm_strings.
+ *
+ * Revision 1.4  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.3  2002/05/26 01:39:02  steve
  *  Carry Verilog 2001 attributes with processes,
  *  all the way through to the ivl_target API.

BUGS.txt

@@ -16,7 +16,7 @@ compilation tools you are using. Specifically, I need to know:
 	- Operating system and processor type,
 	- Compiler w/ version,
 	- Library version, and
-	- anything else you think relevent.
+	- anything else you think relevant.
 
 Be aware that I do not have at my disposal a porting lab. I have the
 alpha on my desk, and the Linux/Intel box with a logic analyzer and
@@ -72,11 +72,11 @@ reporting problems with. However, if you clearly explain what is right
 and wrong about the generated netlist, I will probably be able to fix
 the problem. It may take a few iterations.
 
-In this case, if possible include not only the sample verilog program,
+In this case, if possible include not only the sample Verilog program,
 but the generated netlist file(s) and a clear indication of what went
 wrong. If it is not clear to me, I will ask for clarification.
 
-* The Output is Correct, But Less Then Ideal
+* The Output is Correct, But Less Than Ideal
 
 If the output is strictly correct, but just not good enough for
 practical use, I would like to know. These sorts of problems are
@@ -104,12 +104,30 @@ module may not be needed as long as the ``-s <name>'' switch is
 given.
 
 So when you send a test case, ask yourself "Can poor overworked Steve
-invoke the error without any Verilog other then what is included?" And
+invoke the error without any Verilog other than what is included?" And
 while we are at it, please place a copyright notice in your test
 program and include a GPL license statement if you can. Your test
 program may find its way into the test suite, and the notices will
 make it all nice and legal.
 
+RESEARCHING EXISTING/PAST BUGS, AND FILING REPORTS
+
+The URL <http://www.icarus.com/cgi-bin/ivl-bugs> is the main bug
+tracking system. Once you believe you have found a bug, you may browse
+the bugs database for existing bugs that may be related to yours. You
+might find that your bug has already been fixed in a later release or
+snapshot. If that's the case, then you are set.
+
+The bug database supports basic keyword searches, and you can
+optionally limit your search to active bugs, or fixed bugs. You may
+also browse the bug database, just to get an idea what is still
+broken. You may for example find a related bug that explains your
+symptom.
+
+The root page of the bug report database describes how to submit your
+completed bug report. You may submit it via the web form, or via
+e-mail.
+
 HOW TO SEND PATCHES
 
 Bug reports with patches are very welcome, especially if they are
@@ -130,7 +148,7 @@ patch is for, I will ask for clarification before applying it.)
 
 COPYRIGHT ISSUES
 
-Icarus Verilog is Copyright (c) 1998-1999 Stephen Williams except
+Icarus Verilog is Copyright (c) 1998-2003 Stephen Williams except
 where otherwise noted. Minor patches are covered as derivative works
 (or editorial comment or whatever the appropriate legal term is) and
 folded into the rest of ivl. However, if a submission can reasonably
@@ -141,8 +159,18 @@ then falls under the "otherwise noted" category.
 I must insist that any copyright material submitted for inclusion
 include the GPL license notice as shown in the rest of the source.
 
-$Id: BUGS.txt,v 1.2 1999/08/06 04:05:28 steve Exp $
+
+$Id: BUGS.txt,v 1.5 2007/03/22 16:08:14 steve Exp $
 $Log: BUGS.txt,v $
+Revision 1.5  2007/03/22 16:08:14  steve
+ Spelling fixes from Larry
+
+Revision 1.4  2003/02/19 04:36:31  steve
+ Notes on hte bug database.
+
+Revision 1.3  2003/01/30 16:23:07  steve
+ Spelling fixes.
+
 Revision 1.2  1999/08/06 04:05:28  steve
  Handle scope of parameters.
 

HName.cc

@@ -16,243 +16,128 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: HName.cc,v 1.3 2002/01/05 04:36:06 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: HName.cc,v 1.8 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  "config.h"
 # include  "HName.h"
 # include  <iostream>
-# include  <string.h>
-# include  <stdlib.h>
+# include  <cstring>
+# include  <cstdlib>
+# include  <climits>
 #ifdef HAVE_MALLOC_H
 # include  <malloc.h>
 #endif
 
+
 hname_t::hname_t()
 {
-      item_ = 0;
-      count_ = 0;
+      number_ = INT_MIN;
 }
 
-hname_t::hname_t(const char*text)
+hname_t::hname_t(perm_string text)
 {
-      item_ = strdup(text);
-      count_ = 1;
+      name_ = text;
+      number_ = INT_MIN;
+}
+
+hname_t::hname_t(perm_string text, int num)
+{
+      name_ = text;
+      number_ = num;
 }
 
 hname_t::hname_t(const hname_t&that)
 {
-      count_ = that.count_;
-      switch (count_) {
-	  case 0:
-	    item_ = 0;
-	    break;
-	  case 1:
-	    item_ = strdup(that.item_);
-	    break;
-	  default:
-	    array_ = new char*[count_];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  array_[idx] = strdup(that.array_[idx]);
-	    break;
-      }
+      name_ = that.name_;
+      number_ = that.number_;
+}
+
+hname_t& hname_t::operator = (const hname_t&that)
+{
+      name_ = that.name_;
+      number_ = that.number_;
+      return *this;
 }
 
 hname_t::~hname_t()
 {
-      switch (count_) {
-	  case 0:
-	    break;
-	  case 1:
-	    free(item_);
-	    break;
-	  default:
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  free(array_[idx]);
-	    delete[]array_;
-	    break;
-      }
 }
 
-void hname_t::append(const char*text)
+perm_string hname_t::peek_name(void) const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = item_;
-	    tmp[1] = strdup(text);
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    array_[count_] = strdup(text);
-	    count_ += 1;
-      }
+      return name_;
 }
 
-void hname_t::prepend(const char*text)
+bool hname_t::has_number() const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = strdup(text);
-	    tmp[1] = item_;
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    tmp[0] = strdup(text);
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx+1] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    count_ += 1;
-      }
+      return number_ != INT_MIN;
 }
 
-char* hname_t::remove_tail_name()
+int hname_t::peek_number() const
 {
-      if (count_ == 0)
-	    return 0;
-
-      if (count_ == 1) {
-	    char*tmp = item_;
-	    count_ = 0;
-	    item_ = 0;
-	    return tmp;
-      }
-
-      if (count_ == 2) {
-	    char*tmp1 = array_[0];
-	    char*tmp2 = array_[1];
-	    delete[]array_;
-	    count_ = 1;
-	    item_ = tmp1;
-	    return tmp2;
-      }
-
-      char*tmpo = array_[count_-1];
-      char**tmpa = new char*[count_-1];
-      for (unsigned idx = 0 ;  idx < count_-1 ;  idx += 1)
-	    tmpa[idx] = array_[idx];
-
-      delete[]array_;
-      array_ = tmpa;
-      count_ -= 1;
-      return tmpo;
-}
-
-const char* hname_t::peek_name(unsigned idx) const
-{
-      if (idx >= count_)
-	    return 0;
-
-      if (count_ == 1)
-	    return item_;
-
-      return array_[idx];
-}
-
-const char* hname_t::peek_tail_name() const
-{
-      switch (count_) {
-	  case 0:
-	    return 0;
-	  case 1:
-	    return item_;
-	  default:
-	    return array_[count_-1];
-      }
+      return number_;
 }
 
 bool operator < (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp < 0)
-		  return true;
-	    if (cmp > 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
-      }
-
-      if (lc && !rc)
+      int cmp = strcmp(l.peek_name(), r.peek_name());
+      if (cmp < 0) return true;
+      if (cmp > 0) return false;
+      if (l.has_number() && r.has_number())
+	    return l.peek_number() < r.peek_number();
+      else
 	    return false;
-      if (rc && !lc)
-	    return true;
-
-	// Must be ==
-      return false;
 }
 
 bool operator == (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp != 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
+      if (l.peek_name() == r.peek_name()) {
+	    if (l.has_number() && r.has_number())
+		  return l.peek_number() == r.peek_number();
+	    else
+		  return true;
       }
 
-      if (lc || rc)
-	    return false;
-
-	// Must be ==
-      return true;
+      return false;
 }
 
+bool operator != (const hname_t&l, const hname_t&r)
+{ return ! (l==r); }
+
 ostream& operator<< (ostream&out, const hname_t&that)
 {
-      switch (that.count_) {
-	  case 0:
+      if (that.peek_name() == 0) {
 	    out << "";
 	    return out;
-	  case 1:
-	    out << that.item_;
-	    return out;
-
-	  default:
-	    out << that.array_[0];
-	    for (unsigned idx = 1 ;  idx < that.count_ ;  idx += 1)
-		  out << "." << that.array_[idx];
-
-	    return out;
       }
+
+      out << that.peek_name();
+      if (that.has_number())
+	    out << "[" << that.peek_number() << "]";
+
+      return out;
 }
 
 /*
  * $Log: HName.cc,v $
+ * Revision 1.8  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.7  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.6  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.5  2002/11/02 03:27:52  steve
+ *  Allow named events to be referenced by
+ *  hierarchical names.
+ *
+ * Revision 1.4  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.3  2002/01/05 04:36:06  steve
  *  include malloc.h only when available.
  *

HName.h

@@ -1,7 +1,7 @@
 #ifndef __HName_H
 #define __HName_H
 /*
- * Copyright (c) 2001 Stephen Williams ([email protected])
+ * Copyright (c) 2001-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,11 +18,12 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: HName.h,v 1.2 2002/06/14 03:25:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: HName.h,v 1.7 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  <iostream>
+# include  "StringHeap.h"
 #ifdef __GNUC__
 #if __GNUC__ > 2
 using namespace std;
@@ -30,55 +31,63 @@ using namespace std;
 #endif
 
 /*
- * This class represents a Verilog hierarchical name. A hierarchical
- * name is an ordered list of simple names.
+ * This class represents a component of a Verilog hierarchical name. A
+ * hierarchical component contains a name string (represented here
+ * with a perm_string) and an optional signed number. This signed
+ * number is used if the scope is part of an array, for example an
+ * array of module instances or a loop generated scope.
  */
 
 class hname_t {
 
     public:
       hname_t ();
-      explicit hname_t (const char*text);
+      explicit hname_t (perm_string text);
+      explicit hname_t (perm_string text, int num);
       hname_t (const hname_t&that);
       ~hname_t();
 
-	// This method adds a name to the end of the hierarchical
-	// path. This becomes a new base name.
-      void append(const char*text);
+      hname_t& operator= (const hname_t&);
 
-	// This method adds a name to the *front* of the hierarchical
-	// path. The base name remains the same, unless this is the
-	// only component.
-      void prepend(const char*text);
+	// Return the string part of the hname_t.
+      perm_string peek_name(void) const;
 
-	// This method removes the tail name from the hierarchy, and
-	// returns a pointer to that tail name. That tail name now
-	// must be removed by the caller.
-      char* remove_tail_name();
-
-	// Return the given component in the hierarchical name. If the
-	// idx is too large, return 0.
-      const char*peek_name(unsigned idx) const;
-      const char*peek_tail_name() const;
-
-      friend ostream& operator<< (ostream&, const hname_t&);
+      bool has_number() const;
+      int peek_number() const;
 
     private:
-      union {
-	    char**array_;
-	    char* item_;
-      };
-      unsigned count_;
+      perm_string name_;
+	// If the number is anything other then INT_MIN, then this is
+	// the numeric part of the name. Otherwise, it is not part of
+	// the name at all.
+      int number_;
 
     private: // not implemented
-      hname_t& operator= (const hname_t&);
 };
 
 extern bool operator <  (const hname_t&, const hname_t&);
 extern bool operator == (const hname_t&, const hname_t&);
+extern bool operator != (const hname_t&, const hname_t&);
+extern ostream& operator<< (ostream&, const hname_t&);
 
 /*
  * $Log: HName.h,v $
+ * Revision 1.7  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.6  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.5  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.4  2002/11/02 03:27:51  steve
+ *  Allow named events to be referenced by
+ *  hierarchical names.
+ *
+ * Revision 1.3  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.2  2002/06/14 03:25:51  steve
  *  Compiler portability.
  *

LineInfo.cc

@@ -16,24 +16,28 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: LineInfo.cc,v 1.2 2001/07/25 03:10:48 steve Exp $"
-#endif
 
 # include "config.h"
 
 # include  "LineInfo.h"
-# include  <cstdio>
+# include  <sstream>
+
+LineInfo::LineInfo()
+: lineno_(0)
+{
+}
 
 LineInfo::~LineInfo()
 {
 }
 
-string LineInfo::get_line() const
+string LineInfo::get_fileline() const
 {
-      char buf[8];
-      sprintf(buf, "%u", lineno_);
-      return string(file_? file_ : "") + ":" + buf;
+      ostringstream buf;
+      buf << (file_.str()? file_.str() : "") << ":" << lineno_;
+
+      string res = buf.str();
+      return res;
 }
 
 void LineInfo::set_line(const LineInfo&that)
@@ -42,14 +46,12 @@ void LineInfo::set_line(const LineInfo&that)
       lineno_ = that.lineno_;
 }
 
-/*
- * $Log: LineInfo.cc,v $
- * Revision 1.2  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2000/11/30 17:31:42  steve
- *  Change LineInfo to store const C strings.
- *
- */
+void LineInfo::set_file(perm_string f)
+{
+      file_ = f;
+}
 
+void LineInfo::set_lineno(unsigned n)
+{
+      lineno_ = n;
+}

LineInfo.h

@@ -18,12 +18,12 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: LineInfo.h,v 1.5 2000/11/30 17:31:42 steve Exp $"
-#endif
 
+# include  "StringHeap.h"
 # include  <string>
 
+using namespace std;
+
 /*
  * This class holds line information for an internal object.
  *
@@ -35,30 +35,23 @@
 
 class LineInfo {
     public:
-      LineInfo() : file_(0), lineno_(0) { }
+      LineInfo();
       ~LineInfo();
 
-      string get_line() const;
-
+	// Get a fully formatted file/lineno
+      string get_fileline() const;
+	// Set the file/line fro another LineInfo object.
       void set_line(const LineInfo&that);
 
-      void set_file(const char*f) { file_ = f; }
-      void set_lineno(unsigned n) { lineno_ = n; }
+	// Access parts of LineInfo data
+      void set_file(perm_string f);
+      void set_lineno(unsigned n);
 
+      perm_string get_file() const { return file_; }
+      unsigned  get_lineno() const { return lineno_; }
     private:
-      const char* file_;
+      perm_string file_;
       unsigned lineno_;
 };
 
-/*
- * $Log: LineInfo.h,v $
- * Revision 1.5  2000/11/30 17:31:42  steve
- *  Change LineInfo to store const C strings.
- *
- * Revision 1.4  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.3  1999/02/15 02:06:15  steve
- *  Elaborate gate ranges.
- */
 #endif

Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.128 2002/06/14 04:17:12 steve Exp $"
+#ident "$Id: Makefile.in,v 1.181 2007/05/24 04:07:11 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -25,11 +25,12 @@ SHELL = /bin/sh
 # by the compiler. It reflects the assigned version number for the
 # product as a whole. Most components also print the CVS Name: token
 # in order to get a more automatic version stamp as well.
-VERSION = 0.6
+VERSION = 0.9.devel
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
 srcdir = @srcdir@
+datarootdir = @datarootdir@
 
 SUBDIRS = @subdirs@
 
@@ -37,12 +38,10 @@ VPATH = $(srcdir)
 
 bindir = @bindir@
 libdir = @libdir@
-includedir = $(prefix)/include
+includedir = @includedir@
 mandir = @mandir@
 
 dllib=@DLLIB@
-rdynamic=@rdynamic@
-strip_dynamic=@strip_dynamic@
 
 CC = @CC@
 CXX = @CXX@
@@ -50,141 +49,110 @@ INSTALL = @INSTALL@
 INSTALL_SCRIPT = @INSTALL_SCRIPT@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
-STRIP = @STRIP@
 LEX = @LEX@
 YACC = @YACC@
 
-CPPFLAGS = @CPPFLAGS@ @DEFS@
-CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)
+CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
+CXXFLAGS = -Wall @CXXFLAGS@
 PICFLAGS = @PICFLAG@
-LDFLAGS = @LDFLAGS@
+LDFLAGS = @rdynamic@ @LDFLAGS@
 
-# The TARGETS variable lists the target modules that can be build and
-# installed. Some of them depend on external things, so are only
-# compiled if the prerequisites are installed.
-TARGETS = tgt-null
-ifeq ('@HAVE_IPAL@','yes')
-TARGETS += tgt-pal
-endif
-
-ifeq (@ENABLE_VVM@,yes)
-SUB_VVM = vvm
-endif
-
-all: ivl@EXEEXT@ libvpi.a
-	for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) all); done
-	cd vpi ; $(MAKE) all
-	cd ivlpp ; $(MAKE) all
-	cd driver ; $(MAKE) VERSION=$(VERSION) all
-	cd tgt-verilog ; $(MAKE) all
-	cd tgt-stub ; $(MAKE) all
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) all); done
+all: dep version.h ivl@EXEEXT@
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for dir in ivlpp ; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	cd driver ; $(MAKE) VERSION=$(VERSION) $@
 
 # In the windows world, the installer will need a dosify program to
 # dosify text files.
-ifeq (@WIN32@,yes)
-all: dosify.exe
+ifeq (@MING32@,yes)
+all: dep dosify.exe
 dosify.exe: dosify.c
 	$(CC) -o dosify.exe dosify.c
-
-else
-all: iverilog-vpi
 endif
 
 # This rule rules the compiler in the trivial hello.vl program to make
 # sure the basics were compiled properly.
 check: all
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) check); done
-	driver/iverilog -Ccheck.conf -ocheck.vvp -tvvp-check -B./ivlpp $(srcdir)/examples/hello.vl
-	vvp/vvp -M./vpi ./check.vvp | grep 'Hello, World'
+	test -r check.conf || cp $(srcdir)/check.conf .
+	driver/iverilog -B. -BPivlpp -tcheck -ocheck.vvp $(srcdir)/examples/hello.vl
+	vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
 
 clean:
-	rm -f *.o parse.cc parse.cc.output parse.h dep/*.d lexor.cc lexor_keyword.cc ivl@EXEEXT@ libivl.a libvpi.a iverilog-vpi
-	cd vpi ; $(MAKE) clean
-	cd driver ; $(MAKE) clean
-	cd ivlpp ; $(MAKE) clean
-	cd tgt-verilog ; $(MAKE) clean
-	cd tgt-stub ; $(MAKE) clean
-	for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) clean); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) clean); done
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
+	rm -f ivl.exp iverilog-vpi.pdf iverilog-vpi.ps parse.output
+	rm -f syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
+	rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
+	rm -rf dep
 
 distclean: clean
-	for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) distclean); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) distclean); done
-	rm -f vvm/Makefile
-	rm -f vpi/Makefile
-	rm -f ivlpp/Makefile
-	rm -f driver/Makefile
-	rm -f config.status config.cache config.log
-	rm -f Makefile
-	rm -f tgt-pal/Makefile tgt-stub/Makefile tgt-verilog/Makefile
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	rm -f Makefile config.status config.log config.cache config.h
+	rm -f _pli_types.h
 
-ifeq (@ENABLE_VVM@,yes)
-TT_VVM = mangle.o t-vvm.o
-endif
+TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o
+FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o
 
-TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o $(TT_VVM) t-xnf.o
-FF = nodangle.o synth.o syn-rules.o xnfio.o
-
-O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
-elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
-elab_sig.o emit.o eval.o eval_attrib.o eval_rconst.o \
+O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
+elab_lval.o elab_net.o elab_pexpr.o elab_scope.o \
+elab_sig.o emit.o eval.o eval_attrib.o \
 eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
 load_module.o netlist.o netmisc.o net_assign.o \
 net_design.o net_event.o net_expr.o net_force.o net_func.o \
-net_link.o net_modulo.o net_nex_input.o \
+net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
 net_proc.o net_scope.o net_udp.o pad_to_width.o \
-parse.o parse_misc.o pform.o pform_dump.o \
-set_width.o \
+parse.o parse_misc.o pform.o pform_dump.o pform_types.o \
+set_width.o symbol_search.o sync.o sys_funcs.o \
 verinum.o verireal.o target.o targets.o \
 Attrib.o HName.o LineInfo.o Module.o PDelays.o PEvent.o \
-PExpr.o PGate.o \
-PTask.o PFunction.o PWire.o Statement.o \
+PExpr.o PGate.o PGenerate.o PScope.o PSpec.o \
+PTask.o PUdp.o PFunction.o PWire.o Statement.o StringHeap.o \
 $(FF) $(TT)
 
 Makefile: Makefile.in config.h.in config.status
 	./config.status
 
 
-libvpi.a: vpithunk.o
-	rm -f $@
-	ar cvq $@ vpithunk.o
-	ranlib $@
-
-# The vpithunk.c file (that makes up the libvpi.a library) needs to
-# be make with PIC flags, because shared objects load it.
-vpithunk.o: vpithunk.c
-	@[ -d dep ] || mkdir dep
-	$(CC) $(CPPFLAGS) $(CFLAGS) $(PICFLAGS) -MD -c $< -o $*.o
-	mv $*.d dep/$*.d
-
-
 ifeq (@WIN32@,yes)
 # Under Windows (mingw) I need to make the ivl.exe in two steps.
 # The first step makes an ivl.exe that dlltool can use to make an
 # export and import library, and the last link makes a, ivl.exe
 # that really exports the things that the import library imports.
-ivl@EXEEXT@: $O ivl.def
-	$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@	
-	dlltool --dllname ivl@EXEEXT@ --def ivl.def \
+ivl@EXEEXT@: $O $(srcdir)/ivl.def
+	$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
+	dlltool --dllname ivl@EXEEXT@ --def $(srcdir)/ivl.def \
 		--output-lib libivl.a --output-exp ivl.exp
-	$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@	
+	$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
 else
 ivl@EXEEXT@: $O
-	$(CXX) $(CXXFLAGS) $(rdynamic) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
+	$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
 endif
 
-
-ifeq (@WIN32@,yes)
-
+ifeq (@MINGW32@,yes)
+SUBDIRS += driver-vpi
 else
+all: dep iverilog-vpi
+
 iverilog-vpi: iverilog-vpi.sh
-	sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' $< > $@
+	sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
+	    -e 's;@IVCC@;$(CC);' \
+	    -e 's;@IVCXX@;$(CXX);' \
+	    -e 's;@IVCFLAGS@;$(CXXFLAGS);' \
+	    -e 's;@INCLUDEDIR@;@includedir@;' \
+	    -e 's;@LIBDIR@;@libdir@;' $< > $@
 	chmod +x $@
 endif
 
+dep:
+	mkdir dep
+
 %.o: %.cc
-	@[ -d dep ] || mkdir dep
 	$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
 	mv $*.d dep/$*.d
 
@@ -193,9 +161,9 @@ lexor.o: lexor.cc parse.h
 
 parse.o: parse.cc
 
-parse.h parse.cc: $(srcdir)/parse.y
+parse.cc parse.h: $(srcdir)/parse.y
 	$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
-	mv parse.cc.h parse.h || mv parse.hh parse.h
+	mv parse.cc.h parse.h 2>/dev/null || mv parse.hh parse.h
 
 syn-rules.cc: $(srcdir)/syn-rules.y
 	$(YACC) --verbose -p syn_ -o syn-rules.cc $(srcdir)/syn-rules.y
@@ -203,7 +171,7 @@ syn-rules.cc: $(srcdir)/syn-rules.y
 lexor.cc: $(srcdir)/lexor.lex
 	$(LEX) -PVL -s -olexor.cc $(srcdir)/lexor.lex
 
-lexor_keyword.o: lexor_keyword.cc
+lexor_keyword.o: lexor_keyword.cc parse.h
 
 lexor_keyword.cc: lexor_keyword.gperf
 	gperf -o -i 7 -C -k 1-3,$$ -L ANSI-C -H keyword_hash -N check_identifier -t $(srcdir)/lexor_keyword.gperf > lexor_keyword.cc || (rm -f lexor_keyword.cc ; false)
@@ -214,62 +182,85 @@ iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
 iverilog-vpi.pdf: iverilog-vpi.ps
 	ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
 
-ifeq (@WIN32@,yes)
-INSTALL_DOC = $(prefix)/iverilog-vpi.pdf
-INSTALL_DOCDIR =
-all: iverilog-vpi.pdf
+# For VERSION_TAG in driver/main.c, first try git-describe, then look for a
+# version.h file in the source tree (included in snapshots and releases), and
+# finally use nothing.
+.PHONY: version.h
+version.h:
+	@if test -d $(srcdir)/.git; then \
+	    echo "Using git-describe for VERSION_TAG"; \
+	    tmp=`git --git-dir $(srcdir)/.git describe \
+		   | sed -e 's;\(.*\);#define VERSION_TAG "\1";'`; \
+	    echo "$$tmp" | diff - $@ > /dev/null 2>&1 || echo "$$tmp" > $@ || exit 1; \
+	elif test -r $(srcdir)/$@; then \
+	    echo "Using $(srcdir)/$@ for VERSION_TAG"; \
+	    diff $(srcdir)/$@ $@ > /dev/null 2>&1 || cp $(srcdir)/$@ $@; \
+	else \
+	    echo "Using empty VERSION_TAG"; \
+	    echo '#define VERSION_TAG ""' > $@; \
+	fi
+
+ifeq (@MING32@,yes)
+INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOCDIR = $(mandir)/man1
+all: dep iverilog-vpi.pdf
 else
 INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
 INSTALL_DOCDIR = $(mandir)/man1
 endif
 
-ifeq (@WIN32@,yes)
-WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/QUICK_START.txt
+ifeq (@MINGW32@,yes)
+WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
 else
 WIN32_INSTALL = $(bindir)/iverilog-vpi
 endif
 
-install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $(includedir)/ivl_target.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(libdir)/libvpi.a $(WIN32_INSTALL) $(INSTALL_DOC)
-	cd vpi ; $(MAKE) install
-	cd ivlpp ; $(MAKE) install
-	cd driver ; $(MAKE) install
-	for tgt in $(SUBDIRS) $(SUB_VVM); do (cd $$tgt ; $(MAKE) install); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) install); done
+XNF_INSTALL = $(libdir)/ivl/xnf.conf $(libdir)/ivl/xnf-s.conf
+
+install: all installdirs $(libdir)/ivl/ivl@EXEEXT@  $(libdir)/ivl/include/constants.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for dir in vpi ivlpp driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
 
 $(bindir)/iverilog-vpi: ./iverilog-vpi
-	$(INSTALL_PROGRAM) ./iverilog-vpi $(bindir)/iverilog-vpi
-
-$(libdir)/libvpi.a : ./libvpi.a
-	$(INSTALL_DATA) libvpi.a $(libdir)/libvpi.a
+	$(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi
 
 $(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
-	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
-	$(STRIP) $(strip_dynamic) $(libdir)/ivl/ivl@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl/ivl@EXEEXT@
 
-$(libdir)/ivl/iverilog.conf: $(srcdir)/iverilog.conf
-	$(INSTALL_DATA) $(srcdir)/iverilog.conf $(libdir)/ivl/iverilog.conf
+$(libdir)/ivl/include/constants.vams: $(srcdir)/constants.vams
+	$(INSTALL_DATA) $(srcdir)/constants.vams $@
+
+$(libdir)/ivl/xnf-s.conf: $(srcdir)/xnf-s.conf
+	$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(DESTDIR)$(libdir)/ivl/xnf-s.conf
+
+$(libdir)/ivl/xnf.conf: $(srcdir)/xnf.conf
+	$(INSTALL_DATA) $(srcdir)/xnf.conf $(DESTDIR)$(libdir)/ivl/xnf.conf
 
 $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
-	$(INSTALL_DATA) $(srcdir)/ivl_target.h $(includedir)/ivl_target.h
+	$(INSTALL_DATA) $(srcdir)/ivl_target.h $(DESTDIR)$(includedir)/ivl_target.h
+
+$(includedir)/_pli_types.h: _pli_types.h
+	$(INSTALL_DATA) $< $(DESTDIR)$(includedir)/_pli_types.h
 
 $(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
-	$(INSTALL_DATA) $(srcdir)/vpi_user.h $(includedir)/vpi_user.h
+	$(INSTALL_DATA) $(srcdir)/vpi_user.h $(DESTDIR)$(includedir)/vpi_user.h
 
 $(includedir)/acc_user.h: $(srcdir)/acc_user.h
-	$(INSTALL_DATA) $(srcdir)/acc_user.h $(includedir)/acc_user.h
+	$(INSTALL_DATA) $(srcdir)/acc_user.h $(DESTDIR)$(includedir)/acc_user.h
 
 $(includedir)/veriuser.h: $(srcdir)/veriuser.h
-	$(INSTALL_DATA) $(srcdir)/veriuser.h $(includedir)/veriuser.h
+	$(INSTALL_DATA) $(srcdir)/veriuser.h $(DESTDIR)$(includedir)/veriuser.h
 
 $(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man
-	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(mandir)/man1/iverilog-vpi.1
+	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi.1
 
 $(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
-	$(INSTALL_DATA) iverilog-vpi.pdf $(prefix)/iverilog-vpi.pdf
+	$(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi.pdf
 
 # In windows installations, put a few examples and the quick_start
 # into the destination directory.
-ifeq (@WIN32@,yes)
+ifeq (@MINGW32@,yes)
 $(prefix)/hello.vl: $(srcdir)/examples/hello.vl
 	./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
 	mv tmp.vl $(prefix)/hello.vl
@@ -278,33 +269,32 @@ $(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
 	./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
 	mv tmp.vl $(prefix)/sqrt.vl
 
+$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
+	./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
+	mv tmp.vl $(prefix)/sqrt-virtex.v
+
 $(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
 	./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
 	mv tmp.txt $(prefix)/QUICK_START.txt
 endif
 
 installdirs: mkinstalldirs
-	$(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl \
-	    $(mandir) $(mandir)/man1
+	$(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl \
+	    $(DESTDIR)$(libdir)/ivl/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1
 
 uninstall:
-	rm -f $(libdir)/ivl/iverilog.conf
-	rm -f $(libdir)/ivl/ivl
-	-rmdir $(libdir)/ivl
-	rm -f $(libdir)/libvpi.a
-	rm -f $(bindir)/verilog
-	rm -f $(bindir)/iverilog-vpi
-	rm -f $(bindir)/gverilog@EXEEXT@
-	rm -f $(includedir)/ivl_target.h
-	rm -f $(includedir)/vpi_user.h
-	rm -f $(includedir)/acc_user.h
-	rm -f $(includedir)/veriuser.h
-	rm -f $(mandir)/man1/iverilog-vpi.1
-	cd driver ; $(MAKE) uninstall
-	cd vpi ; $(MAKE) uninstall
-	cd ivlpp ; $(MAKE) uninstall
-	for tgt in $(SUBDIRS) $(SUB_VVM); do (cd $$tgt ; $(MAKE) uninstall); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) uninstall); done
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for dir in vpi ivlpp driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	for f in xnf.conf xnf-s.conf ivl@EXEEXT@ include/constants.vams; \
+	    do rm -f $(DESTDIR)$(libdir)/ivl/$$f; done
+	-rmdir $(DESTDIR)$(libdir)/ivl/include
+	-rmdir $(DESTDIR)$(libdir)/ivl
+	for f in verilog iverilog-vpi gverilog@EXEEXT@; \
+	    do rm -f $(DESTDIR)$(bindir)/$$f; done
+	for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
+	    do rm -f $(DESTDIR)$(includedir)/$$f; done
+	rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi.1 $(DESTDIR)$(prefix)/iverilog-vpi.pdf
 
 
 -include $(patsubst %.o, dep/%.d, $O)

Module.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: Module.cc,v 1.18 2002/05/19 23:37:28 steve Exp $"
-#endif
 
 # include "config.h"
 
@@ -27,14 +24,16 @@
 # include  "PWire.h"
 # include  <assert.h>
 
-Module::Module(const char*name)
-: name_(strdup(name))
+/* n is a permallocated string. */
+Module::Module(perm_string n)
+: PScope(n, 0)
 {
+      library_flag = false;
+      default_nettype = NetNet::NONE;
 }
 
 Module::~Module()
 {
-      free(name_);
 }
 
 void Module::add_gate(PGate*gate)
@@ -42,31 +41,16 @@ void Module::add_gate(PGate*gate)
       gates_.push_back(gate);
 }
 
-void Module::add_task(const string&name, PTask*task)
+void Module::add_task(perm_string name, PTask*task)
 {
       tasks_[name] = task;
 }
 
-void Module::add_function(const string &name, PFunction *func)
+void Module::add_function(perm_string name, PFunction *func)
 {
       funcs_[name] = func;
 }
 
-PWire* Module::add_wire(PWire*wire)
-{
-      PWire*&ep = wires_[wire->path()];
-      if (ep) return ep;
-
-      assert(ep == 0);
-      ep = wire;
-      return wire;
-}
-
-void Module::add_behavior(PProcess*b)
-{
-      behaviors_.push_back(b);
-}
-
 unsigned Module::port_count() const
 {
       return ports.count();
@@ -75,7 +59,7 @@ unsigned Module::port_count() const
 /*
  * Return the array of PEIdent object that are at this port of the
  * module. If the port is internally unconnected, return an empty
- * array. 
+ * array.
  */
 const svector<PEIdent*>& Module::get_port(unsigned idx) const
 {
@@ -88,27 +72,28 @@ const svector<PEIdent*>& Module::get_port(unsigned idx) const
 	    return zero;
 }
 
-unsigned Module::find_port(const string&name) const
+unsigned Module::find_port(const char*name) const
 {
-      assert(name != "");
-      for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1)
+      assert(name != 0);
+      for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
+	    if (ports[idx] == 0) {
+		    /* It is possible to have undeclared ports. These
+		       are ports that are skipped in the declaration,
+		       for example like so: module foo(x ,, y); The
+		       port between x and y is unnamed and thus
+		       inaccessible to binding by name. */
+		  continue;
+	    }
+	    assert(ports[idx]);
 	    if (ports[idx]->name == name)
 		  return idx;
+      }
 
       return ports.count();
 }
 
 
-PWire* Module::get_wire(const hname_t&name) const
-{
-      map<hname_t,PWire*>::const_iterator obj = wires_.find(name);
-      if (obj == wires_.end())
-	    return 0;
-      else
-	    return (*obj).second;
-}
-
-PGate* Module::get_gate(const string&name)
+PGate* Module::get_gate(perm_string name)
 {
       for (list<PGate*>::iterator cur = gates_.begin()
 		 ; cur != gates_.end()
@@ -121,84 +106,8 @@ PGate* Module::get_gate(const string&name)
       return 0;
 }
 
-const map<hname_t,PWire*>& Module::get_wires() const
-{
-      return wires_;
-}
-
 const list<PGate*>& Module::get_gates() const
 {
       return gates_;
 }
 
-const list<PProcess*>& Module::get_behaviors() const
-{
-      return behaviors_;
-}
-
-
-/*
- * $Log: Module.cc,v $
- * Revision 1.18  2002/05/19 23:37:28  steve
- *  Parse port_declaration_lists from the 2001 Standard.
- *
- * Revision 1.17  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.16  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.15  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.14  2000/11/15 20:31:05  steve
- *  Fix warning about temporaries.
- *
- * Revision 1.13  2000/11/05 06:05:59  steve
- *  Handle connectsion to internally unconnected modules (PR#38)
- *
- * Revision 1.12  2000/05/16 04:05:15  steve
- *  Module ports are really special PEIdent
- *  expressions, because a name can be used
- *  many places in the port list.
- *
- * Revision 1.11  2000/03/12 17:09:40  steve
- *  Support localparam.
- *
- * Revision 1.10  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.9  2000/01/09 20:37:57  steve
- *  Careful with wires connected to multiple ports.
- *
- * Revision 1.8  1999/12/11 05:45:41  steve
- *  Fix support for attaching attributes to primitive gates.
- *
- * Revision 1.7  1999/09/17 02:06:25  steve
- *  Handle unconnected module ports.
- *
- * Revision 1.6  1999/08/04 02:13:02  steve
- *  Elaborate module ports that are concatenations of
- *  module signals.
- *
- * Revision 1.5  1999/08/03 04:14:49  steve
- *  Parse into pform arbitrarily complex module
- *  port declarations.
- *
- * Revision 1.4  1999/07/31 19:14:47  steve
- *  Add functions up to elaboration (Ed Carter)
- *
- * Revision 1.3  1999/07/03 02:12:51  steve
- *  Elaborate user defined tasks.
- *
- * Revision 1.2  1999/06/17 05:34:42  steve
- *  Clean up interface of the PWire class,
- *  Properly match wire ranges.
- *
- * Revision 1.1  1998/11/03 23:28:51  steve
- *  Introduce verilog to CVS.
- *
- */
-

Module.h

@@ -1,7 +1,7 @@
 #ifndef __Module_H
 #define __Module_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,21 +18,23 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: Module.h,v 1.25 2002/05/19 23:37:28 steve Exp $"
-#endif
+
 
 # include  <list>
 # include  <map>
 # include  "svector.h"
+# include  "StringHeap.h"
 # include  "HName.h"
 # include  "named.h"
+# include  "PScope.h"
 # include  "LineInfo.h"
-# include  <string>
-class PEvent;
+# include  "netlist.h"
+# include  "pform_types.h"
 class PExpr;
 class PEIdent;
 class PGate;
+class PGenerate;
+class PSpecPath;
 class PTask;
 class PFunction;
 class PWire;
@@ -46,7 +48,7 @@ class NetScope;
  * therefore the handle for grasping the described circuit.
  */
 
-class Module : public LineInfo {
+class Module : public PScope, public LineInfo {
 
 	/* The module ports are in general a vector of port_t
 	   objects. Each port has a name and an ordered list of
@@ -55,26 +57,49 @@ class Module : public LineInfo {
 	   the port. */
     public:
       struct port_t {
-	    string name;
+	    perm_string name;
 	    svector<PEIdent*> expr;
       };
 
     public:
-      explicit Module(const char*name);
+	/* The name passed here is the module name, not the instance
+	   name. This make must be a permallocated string. */
+      explicit Module(perm_string name);
       ~Module();
 
+	/* Initially false. This is set to true if the module has been
+	   declared as a library module. This makes the module
+	   ineligible for being chosen as an implicit root. It has no
+	   other effect. */
+      bool library_flag;
+
+      NetNet::Type default_nettype;
 
 	/* The module has parameters that are evaluated when the
 	   module is elaborated. During parsing, I put the parameters
 	   into this map. */
-      map<string,PExpr*>parameters;
-      map<string,PExpr*>localparams;
+      struct param_expr_t {
+	    PExpr*expr;
+	    PExpr*msb;
+	    PExpr*lsb;
+	    perm_string file;
+	    unsigned lineno;
+	    bool signed_flag;
+      };
+      map<perm_string,param_expr_t>parameters;
+      map<perm_string,param_expr_t>localparams;
+
+
+	/* specparams are simpler then other params, in that they have
+	   no type information. They are merely constant
+	   expressions. */
+      map<perm_string,PExpr*>specparams;
 
 	/* The module also has defparam assignments which don't create
 	   new parameters within the module, but may be used to set
 	   values within this module (when instantiated) or in other
 	   instantiated modules. */
-      map<hname_t,PExpr*>defparms;
+      map<pform_name_t,PExpr*>defparms;
 
         /* Parameters may be overridden at instantiation time;
            the overrides do not contain explicit parameter names,
@@ -82,162 +107,63 @@ class Module : public LineInfo {
            appear in the instantiated module.  Therefore a
            list of names in module-order is needed to pass from
            a parameter-index to its name. */
-      list<string> param_names;
+      list<perm_string> param_names;
 
 	/* This is an array of port descriptors, which is in turn a
 	   named array of PEident pointers. */
       svector<port_t*> ports;
 
-	/* Keep a table of named events declared in the module. */
-      map<string,PEvent*>events;
+      map<perm_string,PExpr*> attributes;
 
 	/* These are the timescale for this module. The default is
 	   set by the `timescale directive. */
       int time_unit, time_precision;
 
-      const char*mod_name() const { return name_; }
+	/* The module has a list of genvars that may be used in
+	   various generate schemes. */
+      map<perm_string,LineInfo*> genvars;
+
+	/* the module has a list of generate schemes that appear in
+	   the module definition. These are used at elaboration time. */
+      list<PGenerate*> generate_schemes;
+
+      list<PSpecPath*> specify_paths;
+
+	// The mod_name() is the name of the module type.
+      perm_string mod_name() const { return pscope_name(); }
 
       void add_gate(PGate*gate);
-
-	// The add_wire method adds a wire by name, but only if the
-	// wire name doesn't already exist. Either way, the result is
-	// the existing wire or the pointer passed in.
-      PWire* add_wire(PWire*wire);
-
-      void add_behavior(PProcess*behave);
-      void add_task(const string&name, PTask*def);
-      void add_function(const string&name, PFunction*def);
+      void add_task(perm_string name, PTask*def);
+      void add_function(perm_string name, PFunction*def);
 
       unsigned port_count() const;
       const svector<PEIdent*>& get_port(unsigned idx) const;
-      unsigned find_port(const string&) const;
+      unsigned find_port(const char*name) const;
 
-	// Find a wire by name. This is used for connecting gates to
-	// existing wires, etc.
-      PWire* get_wire(const hname_t&name) const;
-      PGate* get_gate(const string&name);
+      PGate* get_gate(perm_string name);
 
-      const map<hname_t,PWire*>& get_wires() const;
       const list<PGate*>& get_gates() const;
-      const list<PProcess*>& get_behaviors() const;
 
       void dump(ostream&out) const;
       bool elaborate(Design*, NetScope*scope) const;
 
-      bool elaborate_scope(Design*, NetScope*scope) const;
+      typedef map<perm_string,NetExpr*> replace_t;
+      bool elaborate_scope(Design*, NetScope*scope, const replace_t&rep) const;
 
       bool elaborate_sig(Design*, NetScope*scope) const;
 
     private:
-      char* name_;
-
-      map<hname_t,PWire*> wires_;
       list<PGate*> gates_;
-      list<PProcess*> behaviors_;
-      map<string,PTask*> tasks_;
-      map<string,PFunction*> funcs_;
+      map<perm_string,PTask*> tasks_;
+      map<perm_string,PFunction*> funcs_;
+
+      static void elaborate_parm_item_(perm_string name, const param_expr_t&cur,
+				       Design*des, NetScope*scope,
+				       perm_string file, unsigned lineno);
 
     private: // Not implemented
       Module(const Module&);
       Module& operator= (const Module&);
 };
 
-
-/*
- * $Log: Module.h,v $
- * Revision 1.25  2002/05/19 23:37:28  steve
- *  Parse port_declaration_lists from the 2001 Standard.
- *
- * Revision 1.24  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.23  2001/10/31 03:11:15  steve
- *  detect module ports not declared within the module.
- *
- * Revision 1.22  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.21  2000/11/05 06:05:59  steve
- *  Handle connectsion to internally unconnected modules (PR#38)
- *
- * Revision 1.20  2000/07/22 22:09:03  steve
- *  Parse and elaborate timescale to scopes.
- *
- * Revision 1.19  2000/05/16 04:05:15  steve
- *  Module ports are really special PEIdent
- *  expressions, because a name can be used
- *  many places in the port list.
- *
- * Revision 1.18  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.17  2000/04/01 19:31:57  steve
- *  Named events as far as the pform.
- *
- * Revision 1.16  2000/03/12 17:09:40  steve
- *  Support localparam.
- *
- * Revision 1.15  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.14  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.13  2000/01/09 20:37:57  steve
- *  Careful with wires connected to multiple ports.
- *
- * Revision 1.12  2000/01/09 05:50:48  steve
- *  Support named parameter override lists.
- *
- * Revision 1.11  1999/12/11 05:45:41  steve
- *  Fix support for attaching attributes to primitive gates.
- *
- * Revision 1.10  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.9  1999/08/23 16:48:39  steve
- *  Parameter overrides support from Peter Monta
- *  AND and XOR support wide expressions.
- *
- * Revision 1.8  1999/08/04 02:13:02  steve
- *  Elaborate module ports that are concatenations of
- *  module signals.
- *
- * Revision 1.7  1999/08/03 04:14:49  steve
- *  Parse into pform arbitrarily complex module
- *  port declarations.
- *
- * Revision 1.6  1999/07/31 19:14:47  steve
- *  Add functions up to elaboration (Ed Carter)
- *
- * Revision 1.5  1999/07/03 02:12:51  steve
- *  Elaborate user defined tasks.
- *
- * Revision 1.4  1999/06/15 03:44:53  steve
- *  Get rid of the STL vector template.
- *
- * Revision 1.3  1999/02/21 17:01:57  steve
- *  Add support for module parameters.
- *
- * Revision 1.2  1999/01/25 05:45:56  steve
- *  Add the LineInfo class to carry the source file
- *  location of things. PGate, Statement and PProcess.
- *
- *  elaborate handles module parameter mismatches,
- *  missing or incorrect lvalues for procedural
- *  assignment, and errors are propogated to the
- *  top of the elaboration call tree.
- *
- *  Attach line numbers to processes, gates and
- *  assignment statements.
- *
- * Revision 1.1  1998/11/03 23:28:52  steve
- *  Introduce verilog to CVS.
- *
- */
 #endif

PDelays.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PDelays.cc,v 1.8 2001/12/29 20:19:31 steve Exp $"
-#endif
 
 # include "config.h"
 
@@ -27,6 +24,7 @@
 # include  "PDelays.h"
 # include  "PExpr.h"
 # include  "verinum.h"
+# include  "netmisc.h"
 
 PDelays::PDelays()
 {
@@ -62,54 +60,89 @@ void PDelays::set_delays(const svector<PExpr*>*del, bool df)
       delete_flag_ = df;
 }
 
-static unsigned long calculate_val(Design*des, const NetScope*scope,
-				   const PExpr*expr)
+static NetExpr*calculate_val(Design*des, NetScope*scope, const PExpr*expr)
 {
-      assert(expr);
-      unsigned long val;
 
-      int shift = scope->time_unit() - des->get_precision();
+      NetExpr*dex = expr->elaborate_expr(des, scope, -1, false);
+      eval_expr(dex);
 
-      if (verireal*dr = expr->eval_rconst(des, scope)) {
-	    val = dr->as_long(shift);
-	    delete dr;
+	/* If the delay expression is a real constant or vector
+	   constant, then evaluate it, scale it to the local time
+	   units, and return an adjusted value. */
 
-      } else {
-	    verinum*dv = expr->eval_const(des, scope);
-	    if (dv == 0) {
-		  cerr << expr->get_line() << ": sorry: non-constant "
-		       << "delays not supported here: " << *expr << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
+      if (NetECReal*tmp = dynamic_cast<NetECReal*>(dex)) {
+	    verireal fn = tmp->value();
 
-	    assert(dv);
-	    val = dv->as_ulong();
-	    val = des->scale_to_precision(val, scope);
-	    delete dv;
+	    int shift = scope->time_unit() - des->get_precision();
+	    long delay = fn.as_long(shift);
+	    if (delay < 0)
+		  delay = 0;
+
+	    delete tmp;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
       }
 
-      return val;
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*>(dex)) {
+	    verinum fn = tmp->value();
+
+	    unsigned long delay =
+		  des->scale_to_precision(fn.as_ulong(), scope);
+
+	    delete tmp;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
+      }
+
+	/* Oops, cannot evaluate down to a constant. */
+      return dex;
+}
+
+static NetExpr* make_delay_nets(Design*des, NetExpr*expr)
+{
+      if (dynamic_cast<NetESignal*> (expr))
+	    return expr;
+
+      if (dynamic_cast<NetEConst*> (expr))
+	    return expr;
+
+      NetNet*sig = expr->synthesize(des);
+      if (sig == 0) {
+	    cerr << expr->get_fileline() << ": error: Expression " << *expr
+		 << " is not suitable for delay expression." << endl;
+	    return 0;
+      }
+
+      expr = new NetESignal(sig);
+      return expr;
 }
 
 void PDelays::eval_delays(Design*des, NetScope*scope,
-			  unsigned long&rise_time,
-			  unsigned long&fall_time,
-			  unsigned long&decay_time) const
+			  NetExpr*&rise_time,
+			  NetExpr*&fall_time,
+			  NetExpr*&decay_time,
+			  bool as_nets_flag) const
 {
       assert(scope);
 
-      int shift = scope->time_unit() - des->get_precision();
-
 
       if (delay_[0]) {
 	    rise_time = calculate_val(des, scope, delay_[0]);
+	    if (as_nets_flag)
+		  rise_time = make_delay_nets(des, rise_time);
 
 	    if (delay_[1]) {
 		  fall_time = calculate_val(des, scope, delay_[1]);
+		  if (as_nets_flag)
+			fall_time = make_delay_nets(des, fall_time);
 
 		  if (delay_[2]) {
 			decay_time = calculate_val(des, scope, delay_[2]);
+		  if (as_nets_flag)
+			decay_time = make_delay_nets(des, decay_time);
 
 		  } else {
 			if (rise_time < fall_time)
@@ -128,36 +161,3 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
 	    decay_time = 0;
       }
 }
-
-/*
- * $Log: PDelays.cc,v $
- * Revision 1.8  2001/12/29 20:19:31  steve
- *  Do not delete delay expressions of UDP instances.
- *
- * Revision 1.7  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.6  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.5  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.4  2001/01/20 02:15:50  steve
- *  apologize for not supporting non-constant delays.
- *
- * Revision 1.3  2001/01/14 23:04:55  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- * Revision 1.2  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.1  1999/09/04 19:11:46  steve
- *  Add support for delayed non-blocking assignments.
- *
- */
-

PDelays.h

@@ -18,8 +18,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PDelays.h,v 1.6 2002/06/14 03:25:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PDelays.h,v 1.9 2006/01/03 05:22:14 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -34,6 +34,7 @@ using namespace std;
 
 class Design;
 class NetScope;
+class NetExpr;
 class PExpr;
 
 /*
@@ -53,9 +54,10 @@ class PDelays {
       void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
 
       void eval_delays(Design*des, NetScope*scope,
-		       unsigned long&rise_time,
-		       unsigned long&fall_time,
-		       unsigned long&decay_time) const;
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_nets_flag =false) const;
 
       void dump_delays(ostream&out) const;
 
@@ -72,6 +74,15 @@ ostream& operator << (ostream&o, const PDelays&);
 
 /*
  * $Log: PDelays.h,v $
+ * Revision 1.9  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.8  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
+ * Revision 1.7  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.6  2002/06/14 03:25:51  steve
  *  Compiler portability.
  *

PEvent.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 200Stephen Williams ([email protected])
+ * Copyright (c) 2004 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,15 +16,15 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PEvent.cc,v 1.2 2001/07/25 03:10:48 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PEvent.cc,v 1.5 2004/02/19 06:57:10 steve Exp $"
 #endif
 
 # include "config.h"
 
 # include  "PEvent.h"
 
-PEvent::PEvent(const string&n)
+PEvent::PEvent(perm_string n)
 : name_(n)
 {
 }
@@ -33,13 +33,25 @@ PEvent::~PEvent()
 {
 }
 
-string PEvent::name() const
+perm_string  PEvent::name() const
 {
       return name_;
 }
 
 /*
  * $Log: PEvent.cc,v $
+ * Revision 1.5  2004/02/19 06:57:10  steve
+ *  Memory and Event names use perm_string.
+ *
+ * Revision 1.4  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.3  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.2  2001/07/25 03:10:48  steve
  *  Create a config.h.in file to hold all the config
  *  junk, and support gcc 3.0. (Stephan Boettcher)

PEvent.h

@@ -1,7 +1,7 @@
 #ifndef __PEvent_H
 #define __PEvent_H
 /*
- * Copyright (c) 2000 Stephen Williams ([email protected])
+ * Copyright (c) 2000-2004 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,11 +18,12 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PEvent.h,v 1.5 2001/12/03 04:47:14 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PEvent.h,v 1.9 2004/02/19 06:57:10 steve Exp $"
 #endif
 
 # include  "LineInfo.h"
+# include  "StringHeap.h"
 # include  <string>
 
 class Design;
@@ -31,20 +32,22 @@ class NetScope;
 /*
  * The PEvent class represents event objects. These are things that
  * are declared in Verilog as ``event foo;'' The name passed to the
- * constructure is the "foo" part of the declaration.
+ * constructor is the "foo" part of the declaration.
  */
 class PEvent : public LineInfo {
 
     public:
-      explicit PEvent(const string&name);
+	// The name is a perm-allocated string. It is the simple name
+	// of the event, without any scope.
+      explicit PEvent(perm_string name);
       ~PEvent();
 
-      string name() const;
+      perm_string name() const;
 
       void elaborate_scope(Design*des, NetScope*scope) const;
 
     private:
-      string name_;
+      perm_string name_;
 
     private: // not implemented
       PEvent(const PEvent&);
@@ -53,6 +56,21 @@ class PEvent : public LineInfo {
 
 /*
  * $Log: PEvent.h,v $
+ * Revision 1.9  2004/02/19 06:57:10  steve
+ *  Memory and Event names use perm_string.
+ *
+ * Revision 1.8  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.7  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.6  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.5  2001/12/03 04:47:14  steve
  *  Parser and pform use hierarchical names as hname_t
  *  objects instead of encoded strings.

PExpr.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-1999 Stephen Williams <[email protected]>
+ * Copyright (c) 1998-2007 Stephen Williams <[email protected]>
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PExpr.cc,v 1.29 2001/12/30 21:32:03 steve Exp $"
-#endif
 
 # include "config.h"
 
@@ -48,7 +45,15 @@ bool PExpr::is_constant(Module*) const
 
 NetNet* PExpr::elaborate_lnet(Design*des, NetScope*) const
 {
-      cerr << get_line() << ": error: expression not valid in assign l-value: "
+      cerr << get_fileline() << ": error: expression not valid in assign l-value: "
+	   << *this << endl;
+      return 0;
+}
+
+NetNet* PExpr::elaborate_bi_net(Design*des, NetScope*) const
+{
+      cerr << get_fileline() << ": error: "
+	   << "expression not valid as argument to inout port: "
 	   << *this << endl;
       return 0;
 }
@@ -67,13 +72,44 @@ bool PEBinary::is_constant(Module*mod) const
       return left_->is_constant(mod) && right_->is_constant(mod);
 }
 
-PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms) 
+PEBComp::PEBComp(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBComp::~PEBComp()
+{
+}
+
+PEBShift::PEBShift(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBShift::~PEBShift()
+{
+}
+
+PECallFunction::PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms)
 : path_(n), parms_(parms)
 {
 }
 
-PECallFunction::PECallFunction(const hname_t&n) 
-: path_(n)
+static pform_name_t pn_from_ps(perm_string n)
+{
+      name_component_t tmp_name (n);
+      pform_name_t tmp;
+      tmp.push_back(tmp_name);
+      return tmp;
+}
+
+PECallFunction::PECallFunction(perm_string n, const svector<PExpr*>&parms)
+: path_(pn_from_ps(n)), parms_(parms)
+{
+}
+
+PECallFunction::PECallFunction(perm_string n)
+: path_(pn_from_ps(n))
 {
 }
 
@@ -139,38 +175,48 @@ bool PEFNumber::is_constant(Module*) const
       return true;
 }
 
-PEIdent::PEIdent(const hname_t&s)
-: path_(s), msb_(0), lsb_(0), idx_(0)
+PEIdent::PEIdent(const pform_name_t&that)
+: path_(that)
 {
 }
 
+PEIdent::PEIdent(perm_string s)
+{
+      path_.push_back(name_component_t(s));
+}
+
 PEIdent::~PEIdent()
 {
 }
 
-const hname_t& PEIdent::path() const
-{
-      return path_;
-}
-
 /*
- * An identifier can be in a constant expresion if (and only if) it is
- * a parameter.
+ * An identifier can be in a constant expression if (and only if) it is
+ * a parameter or genvar.
+ *
+ * NOTE: This test does not work if the name is hierarchical!
  */
 bool PEIdent::is_constant(Module*mod) const
 {
       if (mod == 0) return false;
 
-      { map<string,PExpr*>::const_iterator cur;
-        cur = mod->parameters.find(path_.peek_name(0));
+	/*  */
+      perm_string tmp = path_.back().name;
+
+      { map<perm_string,Module::param_expr_t>::const_iterator cur;
+        cur = mod->parameters.find(tmp);
 	if (cur != mod->parameters.end()) return true;
       }
 
-      { map<string,PExpr*>::const_iterator cur;
-        cur = mod->localparams.find(path_.peek_name(0));
+      { map<perm_string,Module::param_expr_t>::const_iterator cur;
+        cur = mod->localparams.find(tmp);
 	if (cur != mod->localparams.end()) return true;
       }
 
+      { map<perm_string,LineInfo*>::const_iterator cur;
+        cur = mod->genvars.find(tmp);
+	if (cur != mod->genvars.end()) return true;
+      }
+
       return false;
 }
 
@@ -254,124 +300,3 @@ bool PEUnary::is_constant(Module*m) const
       return expr_->is_constant(m);
 }
 
-/*
- * $Log: PExpr.cc,v $
- * Revision 1.29  2001/12/30 21:32:03  steve
- *  Support elaborate_net for PEString objects.
- *
- * Revision 1.28  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.27  2001/11/08 05:15:50  steve
- *  Remove string paths from PExpr elaboration.
- *
- * Revision 1.26  2001/11/07 04:26:46  steve
- *  elaborate_lnet uses scope instead of string path.
- *
- * Revision 1.25  2001/11/06 06:11:55  steve
- *  Support more real arithmetic in delay constants.
- *
- * Revision 1.24  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.23  2001/01/14 23:04:55  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- * Revision 1.22  2001/01/12 04:31:27  steve
- *  Handle error idents in constants not in any scope (PR#97)
- *
- * Revision 1.21  2000/12/16 19:03:30  steve
- *  Evaluate <= and ?: in parameter expressions (PR#81)
- *
- * Revision 1.20  2000/12/10 22:01:35  steve
- *  Support decimal constants in behavioral delays.
- *
- * Revision 1.19  2000/06/30 15:50:20  steve
- *  Allow unary operators in constant expressions.
- *
- * Revision 1.18  2000/05/07 04:37:55  steve
- *  Carry strength values from Verilog source to the
- *  pform and netlist for gates.
- *
- *  Change vvm constants to use the driver_t to drive
- *  a constant value. This works better if there are
- *  multiple drivers on a signal.
- *
- * Revision 1.17  2000/05/04 03:37:58  steve
- *  Add infrastructure for system functions, move
- *  $time to that structure and add $random.
- *
- * Revision 1.16  2000/04/12 04:23:57  steve
- *  Named events really should be expressed with PEIdent
- *  objects in the pform,
- *
- *  Handle named events within the mix of net events
- *  and edges. As a unified lot they get caught together.
- *  wait statements are broken into more complex statements
- *  that include a conditional.
- *
- *  Do not generate NetPEvent or NetNEvent objects in
- *  elaboration. NetEvent, NetEvWait and NetEvProbe
- *  take over those functions in the netlist.
- *
- * Revision 1.15  2000/04/01 19:31:57  steve
- *  Named events as far as the pform.
- *
- * Revision 1.14  2000/03/12 18:22:11  steve
- *  Binary and unary operators in parameter expressions.
- *
- * Revision 1.13  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.12  1999/12/31 17:38:37  steve
- *  Standardize some of the error messages.
- *
- * Revision 1.11  1999/10/31 04:11:27  steve
- *  Add to netlist links pin name and instance number,
- *  and arrange in vvm for pin connections by name
- *  and instance number.
- *
- * Revision 1.10  1999/09/25 02:57:29  steve
- *  Parse system function calls.
- *
- * Revision 1.9  1999/09/16 04:18:15  steve
- *  elaborate concatenation repeats.
- *
- * Revision 1.8  1999/09/15 04:17:52  steve
- *  separate assign lval elaboration for error checking.
- *
- * Revision 1.7  1999/07/22 02:05:20  steve
- *  is_constant method for PEConcat.
- *
- * Revision 1.6  1999/07/17 19:50:59  steve
- *  netlist support for ternary operator.
- *
- * Revision 1.5  1999/06/16 03:13:29  steve
- *  More syntax parse with sorry stubs.
- *
- * Revision 1.4  1999/06/10 04:03:52  steve
- *  Add support for the Ternary operator,
- *  Add support for repeat concatenation,
- *  Correct some seg faults cause by elaboration
- *  errors,
- *  Parse the casex anc casez statements.
- *
- * Revision 1.3  1999/05/16 05:08:42  steve
- *  Redo constant expression detection to happen
- *  after parsing.
- *
- *  Parse more operators and expressions.
- *
- * Revision 1.2  1998/11/11 00:01:51  steve
- *  Check net ranges in declarations.
- *
- * Revision 1.1  1998/11/03 23:28:53  steve
- *  Introduce verilog to CVS.
- *
- */
-

PExpr.h

@@ -1,7 +1,7 @@
 #ifndef __PExpr_H
 #define __PExpr_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams <[email protected]>
+ * Copyright (c) 1998-2008 Stephen Williams <[email protected]>
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,15 +18,13 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PExpr.h,v 1.61 2002/06/04 05:38:43 steve Exp $"
-#endif
 
 # include  <string>
+# include  <vector>
 # include  "netlist.h"
 # include  "verinum.h"
-# include  "verireal.h"
 # include  "LineInfo.h"
+# include  "pform_types.h"
 
 class Design;
 class Module;
@@ -51,11 +49,48 @@ class PExpr : public LineInfo {
 
       virtual void dump(ostream&) const;
 
-	// Procedural elaboration of the expression. Set thie
-	// bare_memory_ok flag if the result is allowed to be a
-	// NetEMemory without an index.
+	// This method tests the width that the expression wants to
+	// be. It is used by elaboration of assignments to figure out
+	// the width of the expression.
+	//
+	// The "min" is the width of the local context, so it the
+	// minimum width that this function should return. Initially
+	// this is the same as the lval width.
+	//
+	// The "lval" is the width of the destination where this
+	// result is going to go. This can be used to constrain the
+	// amount that an expression can reasonably expand. For
+	// example, there is no point expanding an addition to beyond
+	// the lval. This extra bit of information allows the
+	// expression to optimize itself a bit. If the lval==0, then
+	// the subexpression should not make l-value related
+	// optimizations.
+	//
+	// The unsigned_flag is set to true if the expression is
+	// unsized and therefore expandable. This happens if a
+	// sub-expression is an unsized literal. Some expressions make
+	// special use of that.
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+	// During the elaborate_sig phase, we may need to scan
+	// expressions to find implicit net declarations.
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
+
+	// Procedural elaboration of the expression. The expr_width is
+	// the width of the context of the expression (i.e. the
+	// l-value width of an assignment),
+	//
+	// ... or -1 if the expression is self-determined. or
+	// ... or -2 if the expression is losslessly
+	// self-determined. This can happen in situations where the
+	// result is going to a pseudo-infinitely wide context.
+	//
+	// The sys_task_arg flag is true if expressions are allowed to
+	// be incomplete.
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
 
 	// Elaborate expressions that are the r-value of parameter
 	// assignments. This elaboration follows the restrictions of
@@ -67,34 +102,36 @@ class PExpr : public LineInfo {
 	// continuous assign or other wholly structural context.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0 =Link::STRONG,
 				    Link::strength_t drive1 =Link::STRONG)
 	    const;
 
-	// This method elaborates the expression as NetNet objects. It
-	// only allows regs suitable for procedural continuous assignments.
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
-
 	// This method elaborates the expression as gates, but
 	// restricted for use as l-values of continuous assignments.
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
 
+	// This is similar to elaborate_lnet, except that the
+	// expression is evaluated to be bi-directional. This is
+	// useful for arguments to inout ports of module instances and
+	// ports of tran primitives.
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
+
 	// Expressions that can be in the l-value of procedural
-	// assignments can be elaborated with this method.
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+	// assignments can be elaborated with this method. If the
+	// is_force flag is true, then the set of valid l-value types
+	// is slightly modified to accommodate the Verilog force
+	// statement
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
 	// This attempts to evaluate a constant expression, and return
 	// a verinum as a result. If the expression cannot be
 	// evaluated, return 0.
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-
-	// This attempts to evaluate a constant expression as a
-	// decimal floating point. This is used when calculating delay
-	// constants.
-      virtual verireal* eval_rconst(const Design*, const NetScope*) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	// This method returns true if that expression is the same as
 	// this expression. This method is used for comparing
@@ -104,7 +141,7 @@ class PExpr : public LineInfo {
 	// Return true if this expression is a valid constant
 	// expression. the Module pointer is needed to find parameter
 	// identifiers and any other module specific interpretations
-	// of expresions.
+	// of expressions.
       virtual bool is_constant(Module*) const;
 
     private: // not implemented
@@ -120,26 +157,30 @@ class PEConcat : public PExpr {
       PEConcat(const svector<PExpr*>&p, PExpr*r =0);
       ~PEConcat();
 
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
       virtual void dump(ostream&) const;
 
-	// Concatenated Regs can be on the left of procedural
-	// continuous assignments.
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
-
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
       virtual bool is_constant(Module*) const;
 
+    private:
+      NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
+				     bool bidirectional_flag) const;
     private:
       svector<PExpr*>parms_;
       PExpr*repeat_;
@@ -164,7 +205,7 @@ class PEEvent : public PExpr {
 
       edge_t type() const;
       PExpr* expr() const;
- 
+
       virtual void dump(ostream&) const;
 
     private:
@@ -186,18 +227,23 @@ class PEFNumber : public PExpr {
 	/* The eval_const method as applied to a floating point number
 	   gets the *integer* value of the number. This accounts for
 	   any rounding that is needed to get the value. */
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-
-	/* This method returns the full floating point value. */
-      virtual verireal* eval_rconst(const Design*, const NetScope*) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	/* A PEFNumber is a constant, so this returns true. */
       virtual bool is_constant(Module*) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
+      virtual NetNet* elaborate_net(Design*des, NetScope*scope,
+				    unsigned lwidth,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
+
       virtual void dump(ostream&) const;
 
     private:
@@ -207,31 +253,42 @@ class PEFNumber : public PExpr {
 class PEIdent : public PExpr {
 
     public:
-      explicit PEIdent(const hname_t&s);
+      explicit PEIdent(perm_string);
+      explicit PEIdent(const pform_name_t&);
       ~PEIdent();
 
-      virtual void dump(ostream&) const;
+	// Add another name to the string of hierarchy that is the
+	// current identifier.
+      void append_name(perm_string);
 
-	// Regs can be on the left of procedural continuous assignments
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
+      virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
 	// Identifiers are allowed (with restrictions) is assign l-values.
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
 
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
+
 	// Identifiers are also allowed as procedural assignment l-values.
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
 	// Structural r-values are OK.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
 	// Elaborate the PEIdent as a port to a module. This method
@@ -239,40 +296,99 @@ class PEIdent : public PExpr {
       NetNet* elaborate_port(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
-      verinum* eval_const(const Design*des, const NetScope*sc) const;
-      verireal*eval_rconst(const Design*des, const NetScope*sc) const;
+      verinum* eval_const(Design*des, NetScope*sc) const;
 
-      const hname_t& path() const;
+      const pform_name_t& path() const { return path_; }
 
     private:
-      hname_t path_;
+      pform_name_t path_;
+
+    private:
+	// Common functions to calculate parts of part/bit selects.
+      bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb) const;
+      bool calculate_up_do_width_(Design*, NetScope*, unsigned long&wid) const;
+
+    private:
+      NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*) const;
+      bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;
+      bool elaborate_lval_net_idx_(Design*, NetScope*, NetAssign_*,
+                                   index_component_t::ctype_t) const;
+
+    private:
+      NetExpr*elaborate_expr_param(Design*des,
+				   NetScope*scope,
+				   const NetExpr*par,
+				   NetScope*found,
+				   const NetExpr*par_msb,
+				   const NetExpr*par_lsb) const;
+      NetExpr*elaborate_expr_net(Design*des,
+				 NetScope*scope,
+				 NetNet*net,
+				 NetScope*found,
+				 bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_word_(Design*des,
+				       NetScope*scope,
+				       NetNet*net,
+				       NetScope*found,
+				       bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_part_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_up_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_do_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_bit_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
 
     public:
-	// Use these to support bit- and part-select operators.
-      PExpr*msb_;
-      PExpr*lsb_;
 
-	// If this is a reference to a memory, this is the index
-	// expression.
-      PExpr*idx_;
-
-      NetNet* elaborate_net_ram_(Design*des, NetScope*scope,
-				 NetMemory*mem, unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+      NetNet* elaborate_net_array_(Design*des, NetScope*scope,
+				   NetNet*sig, unsigned lwidth,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
 
+      NetNet* elaborate_net_net_(Design*des, NetScope*scope,
+				 NetNet*sig, unsigned lwidth,
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay,
+				 Link::strength_t drive0,
+				 Link::strength_t drive1) const;
+      NetNet* elaborate_net_net_idx_up_(Design*des, NetScope*scope,
+					NetNet*sig, unsigned lwidth,
+					const NetExpr* rise,
+					const NetExpr* fall,
+					const NetExpr* decay,
+					Link::strength_t drive0,
+					Link::strength_t drive1) const;
       NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
 				    NetNet*sig,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
     private:
-      NetAssign_* elaborate_mem_lval_(Design*des, NetScope*scope,
-				      NetMemory*mem) const;
+      NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
+				     bool bidirectional_flag) const;
+
+      NetNet*make_implicit_net_(Design*des, NetScope*scope) const;
+
+      bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
+			     long&midx, long&lidx) const;
+      NetNet*process_select_(Design*des, NetScope*scope, NetNet*sig) const;
 
 };
 
@@ -285,20 +401,25 @@ class PENumber : public PExpr {
       const verinum& value() const;
 
       virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-      virtual verireal*eval_rconst(const Design*, const NetScope*) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_the_same(const PExpr*that) const;
       virtual bool is_constant(Module*) const;
@@ -322,17 +443,22 @@ class PEString : public PExpr {
 
       string value() const;
       virtual void dump(ostream&) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
-      verinum* PEString::eval_const(const Design*, const NetScope*) const;
+      verinum* eval_const(Design*, NetScope*) const;
 
       virtual bool is_constant(Module*) const;
 
@@ -347,20 +473,49 @@ class PEUnary : public PExpr {
       ~PEUnary();
 
       virtual void dump(ostream&out) const;
+
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
 
+    private:
+      NetNet* elab_net_uminus_const_logic_(Design*des, NetScope*scope,
+					   NetEConst*expr,
+					   unsigned width,
+					   const NetExpr* rise,
+					   const NetExpr* fall,
+					   const NetExpr* decay,
+					   Link::strength_t drive0,
+					   Link::strength_t drive1) const;
+      NetNet* elab_net_uminus_const_real_(Design*des, NetScope*scope,
+					   NetECReal*expr,
+					   unsigned width,
+					   const NetExpr* rise,
+					   const NetExpr* fall,
+					   const NetExpr* decay,
+					   Link::strength_t drive0,
+					   Link::strength_t drive1) const;
+      NetNet* elab_net_unary_real_(Design*des, NetScope*scope,
+				   NetExpr*expr,
+				   unsigned width,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
+
     private:
       char op_;
       PExpr*expr_;
@@ -375,66 +530,109 @@ class PEBinary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
-      virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
-					bool sys_task_arg =false) const;
+      virtual NetExpr*elaborate_expr(Design*des, NetScope*,
+					int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-      virtual verireal*eval_rconst(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
-    private:
+    protected:
       char op_;
       PExpr*left_;
       PExpr*right_;
 
-      NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
+      NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetExpr*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
 
+      static void suppress_operand_sign_if_needed_(NetExpr*lp, NetExpr*rp);
+
+    private:
       NetNet* elaborate_net_add_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_bit_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_cmp_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_div_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mod_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_log_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mul_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
+      NetNet* elaborate_net_pow_(Design*des, NetScope*scope,
+				 unsigned lwidth,
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_shift_(Design*des, NetScope*scope,
 				   unsigned lwidth,
-				   unsigned long rise,
-				   unsigned long fall,
-				   unsigned long decay) const;
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay) const;
+};
+
+/*
+ * Here are a few specialized classes for handling specific binary
+ * operators.
+ */
+class PEBComp  : public PEBinary {
+
+    public:
+      explicit PEBComp(char op, PExpr*l, PExpr*r);
+      ~PEBComp();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&flag) const;
+
+      NetExpr* elaborate_expr(Design*des, NetScope*scope,
+			      int expr_width, bool sys_task_arg) const;
+};
+
+class PEBShift  : public PEBinary {
+
+    public:
+      explicit PEBShift(char op, PExpr*l, PExpr*r);
+      ~PEBShift();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval, bool&flag) const;
 };
 
 /*
@@ -450,17 +648,23 @@ class PETernary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetETernary*elaborate_expr(Design*des, NetScope*,
-					 bool sys_task_arg =false) const;
+					 int expr_width, bool sys_task_arg) const;
       virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
     private:
       PExpr*expr_;
@@ -475,74 +679,45 @@ class PETernary : public PExpr {
  */
 class PECallFunction : public PExpr {
     public:
-      explicit PECallFunction(const hname_t&n, const svector<PExpr *> &parms);
-      explicit PECallFunction(const hname_t&n);
+      explicit PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms);
+	// Call of system function (name is not hierarchical)
+      explicit PECallFunction(perm_string n, const svector<PExpr *> &parms);
+      explicit PECallFunction(perm_string n);
       ~PECallFunction();
 
       virtual void dump(ostream &) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_wid, bool sys_task_arg) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
 
     private:
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr *> parms_;
 
       bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
 
-      NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
+      NetExpr* elaborate_sfunc_(Design*des, NetScope*scope, int expr_wid) const;
+      NetNet* elaborate_net_sfunc_(Design*des, NetScope*scope,
+				   unsigned width,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
+      unsigned test_width_sfunc_(Design*des, NetScope*scope,
+				 unsigned min, unsigned lval,
+				 bool&unsized_flag) const;
 };
 
-/*
- * $Log: PExpr.h,v $
- * Revision 1.61  2002/06/04 05:38:43  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.60  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.59  2002/04/23 03:53:59  steve
- *  Add support for non-constant bit select.
- *
- * Revision 1.58  2002/04/14 03:55:25  steve
- *  Precalculate unary - if possible.
- *
- * Revision 1.57  2002/04/13 02:33:17  steve
- *  Detect missing indices to memories (PR#421)
- *
- * Revision 1.56  2002/03/09 04:02:26  steve
- *  Constant expressions are not l-values for task ports.
- *
- * Revision 1.55  2002/03/09 02:10:22  steve
- *  Add the NetUserFunc netlist node.
- *
- * Revision 1.54  2001/12/30 21:32:03  steve
- *  Support elaborate_net for PEString objects.
- *
- * Revision 1.53  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.52  2001/11/08 05:15:50  steve
- *  Remove string paths from PExpr elaboration.
- *
- * Revision 1.51  2001/11/07 04:26:46  steve
- *  elaborate_lnet uses scope instead of string path.
- *
- * Revision 1.50  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- */
 #endif

PFunction.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,17 +16,15 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PFunction.cc,v 1.5 2001/07/25 03:10:48 steve Exp $"
-#endif
 
 # include "config.h"
 
 #include "PTask.h"
 
-PFunction::PFunction()
-: out_(0), ports_(0), statement_(0)
+PFunction::PFunction(perm_string name, PScope*parent)
+: PScope(name, parent), ports_(0), statement_(0)
 {
+      return_type_.type = PTF_NONE;
 }
 
 PFunction::~PFunction()
@@ -46,25 +44,7 @@ void PFunction::set_statement(Statement*s)
       statement_ = s;
 }
 
-void PFunction::set_output(PWire*o)
+void PFunction::set_return(PTaskFuncArg t)
 {
-      assert(out_ == 0);
-      out_ = o;
+      return_type_ = t;
 }
-
-/*
- * $Log: PFunction.cc,v $
- * Revision 1.5  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.4  2001/01/13 22:20:08  steve
- *  Parse parameters within nested scopes.
- *
- * Revision 1.3  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.2  1999/08/25 22:22:41  steve
- *  elaborate some aspects of functions.
- *
- */

PGate.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PGate.cc,v 1.13 2001/11/22 06:20:59 steve Exp $"
-#endif
 
 # include "config.h"
 
@@ -27,7 +24,7 @@
 # include  "verinum.h"
 # include  <assert.h>
 
-PGate::PGate(const string&name,
+PGate::PGate(perm_string name,
 	     svector<PExpr*>*pins,
 	     const svector<PExpr*>*del)
 : name_(name), pins_(pins)
@@ -37,7 +34,7 @@ PGate::PGate(const string&name,
       str1_ = STRONG;
 }
 
-PGate::PGate(const string&name,
+PGate::PGate(perm_string name,
 	     svector<PExpr*>*pins,
 	     PExpr*del)
 : name_(name), pins_(pins)
@@ -47,7 +44,7 @@ PGate::PGate(const string&name,
       str1_ = STRONG;
 }
 
-PGate::PGate(const string&name, svector<PExpr*>*pins)
+PGate::PGate(perm_string name, svector<PExpr*>*pins)
 : name_(name), pins_(pins)
 {
       str0_ = STRONG;
@@ -90,22 +87,79 @@ void PGate::elaborate_scope(Design*, NetScope*) const
  * parameters. This method understands how to handle the different
  * numbers of expressions.
  */
+
+void PGate::eval_delays(Design*des, NetScope*scope,
+			NetExpr*&rise_expr,
+			NetExpr*&fall_expr,
+			NetExpr*&decay_expr,
+			bool as_net_flag) const
+{
+      delay_.eval_delays(des, scope,
+			 rise_expr, fall_expr, decay_expr,
+			 as_net_flag);
+}
+
 void PGate::eval_delays(Design*des, NetScope*scope,
 			unsigned long&rise_time,
 			unsigned long&fall_time,
 			unsigned long&decay_time) const
 {
-      delay_.eval_delays(des, scope, rise_time, fall_time, decay_time);
+      NetExpr*rise_expr, *fall_expr, *decay_expr;
+      delay_.eval_delays(des, scope, rise_expr, fall_expr, decay_expr);
+
+      if (rise_expr == 0) {
+	    rise_time = 0;
+	    fall_time = 0;
+	    decay_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (rise_expr)) {
+	    rise_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_fileline() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_fileline() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    rise_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (fall_expr)) {
+	    fall_time = tmp->value().as_ulong();
+
+      } else {
+	    if (fall_expr != rise_expr) {
+		  cerr << get_fileline() << ": error: Delay expressions must be "
+		       << "constant here." << endl;
+		  cerr << get_fileline() << ":      : Cannot calculate "
+		       << *rise_expr << endl;
+	    }
+	    des->errors += 1;
+	    fall_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (decay_expr)) {
+	    decay_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_fileline() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_fileline() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    decay_time = 0;
+      }
 }
 
 PGAssign::PGAssign(svector<PExpr*>*pins)
-: PGate("", pins)
+: PGate(perm_string(), pins)
 {
       assert(pins->count() == 2);
 }
 
 PGAssign::PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels)
-: PGate("", pins, dels)
+: PGate(perm_string(), pins, dels)
 {
       assert(pins->count() == 2);
 }
@@ -114,14 +168,14 @@ PGAssign::~PGAssign()
 {
 }
 
-PGBuiltin::PGBuiltin(Type t, const string&name,
+PGBuiltin::PGBuiltin(Type t, perm_string name,
 		     svector<PExpr*>*pins,
 		     svector<PExpr*>*del)
 : PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
 {
 }
 
-PGBuiltin::PGBuiltin(Type t, const string&name,
+PGBuiltin::PGBuiltin(Type t, perm_string name,
 		     svector<PExpr*>*pins,
 		     PExpr*del)
 : PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
@@ -142,24 +196,23 @@ void PGBuiltin::set_range(PExpr*msb, PExpr*lsb)
       lsb_ = lsb;
 }
 
-PGModule::PGModule(const char*type, const string&name, svector<PExpr*>*pins)
+PGModule::PGModule(perm_string type, perm_string name, svector<PExpr*>*pins)
 : PGate(name, pins), overrides_(0), pins_(0),
   npins_(0), parms_(0), nparms_(0), msb_(0), lsb_(0)
 {
-      type_ = strdup(type);
+      type_ = type;
 }
 
-PGModule::PGModule(const char*type, const string&name,
+PGModule::PGModule(perm_string type, perm_string name,
 		   named<PExpr*>*pins, unsigned npins)
 : PGate(name, 0), overrides_(0), pins_(pins),
   npins_(npins), parms_(0), nparms_(0), msb_(0), lsb_(0)
 {
-      type_ = strdup(type);
+      type_ = type;
 }
 
 PGModule::~PGModule()
 {
-      free(type_);
 }
 
 void PGModule::set_parameters(svector<PExpr*>*o)
@@ -185,58 +238,8 @@ void PGModule::set_range(PExpr*msb, PExpr*lsb)
       lsb_ = lsb;
 }
 
-const char* PGModule::get_type()
+perm_string PGModule::get_type()
 {
       return type_;
 }
 
-/*
- * $Log: PGate.cc,v $
- * Revision 1.13  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.12  2001/10/21 00:42:47  steve
- *  Module types in pform are char* instead of string.
- *
- * Revision 1.11  2001/10/19 01:55:32  steve
- *  Method to get the type_ member
- *
- * Revision 1.10  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.9  2000/05/06 15:41:56  steve
- *  Carry assignment strength to pform.
- *
- * Revision 1.8  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.7  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  2000/02/18 05:15:02  steve
- *  Catch module instantiation arrays.
- *
- * Revision 1.5  1999/09/14 01:50:35  steve
- *  Handle gates without delays.
- *
- * Revision 1.4  1999/09/04 19:11:46  steve
- *  Add support for delayed non-blocking assignments.
- *
- * Revision 1.3  1999/08/01 21:18:55  steve
- *  elaborate rise/fall/decay for continuous assign.
- *
- * Revision 1.2  1999/08/01 16:34:50  steve
- *  Parse and elaborate rise/fall/decay times
- *  for gates, and handle the rules for partial
- *  lists of times.
- *
- * Revision 1.1  1999/02/15 02:06:15  steve
- *  Elaborate gate ranges.
- *
- */
-

PGate.h

@@ -1,7 +1,7 @@
 #ifndef __PGate_H
 #define __PGate_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2004 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,20 +18,20 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PGate.h,v 1.23 2002/05/23 03:08:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGate.h,v 1.32 2006/04/10 00:37:42 steve Exp $"
 #endif
 
 # include  "svector.h"
+# include  "StringHeap.h"
 # include  "named.h"
 # include  "LineInfo.h"
 # include  "PDelays.h"
+# include  "netlist.h"
 # include  <map>
 # include  <string>
 class PExpr;
 class PUdp;
-class Design;
-class NetScope;
 class Module;
 
 /*
@@ -49,27 +49,39 @@ class Module;
  * strength of the 1 drive.
  */
 class PGate : public LineInfo {
-      
+
     public:
       enum strength_t { HIGHZ, WEAK, PULL, STRONG, SUPPLY };
 
-      explicit PGate(const string&name, svector<PExpr*>*pins,
+      explicit PGate(perm_string name, svector<PExpr*>*pins,
 		     const svector<PExpr*>*del);
 
-      explicit PGate(const string&name, svector<PExpr*>*pins,
+      explicit PGate(perm_string name, svector<PExpr*>*pins,
 		     PExpr*del);
 
-      explicit PGate(const string&name, svector<PExpr*>*pins);
+      explicit PGate(perm_string name, svector<PExpr*>*pins);
 
       virtual ~PGate();
 
-      const string& get_name() const { return name_; }
+      perm_string get_name() const { return name_; }
 
+	// This method evaluates the delays all the way to an
+	// integer. If the delay is non-constant, then set the times
+	// to 0, print an error message and mark an error to the
+	// design.
       void eval_delays(Design*des, NetScope*scope,
 		       unsigned long&rise_time,
 		       unsigned long&fall_time,
 		       unsigned long&decay_time) const;
 
+	// This evaluates the delays as far as possible, but returns
+	// an expression, and do not signal errors.
+      void eval_delays(Design*des, NetScope*scope,
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_net_flag =false) const;
+
       unsigned pin_count() const { return pins_? pins_->count() : 0; }
       const PExpr*pin(unsigned idx) const { return (*pins_)[idx]; }
 
@@ -79,21 +91,21 @@ class PGate : public LineInfo {
       void strength0(strength_t);
       void strength1(strength_t);
 
-      map<string,PExpr*> attributes;
+      map<perm_string,PExpr*> attributes;
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
     protected:
-      const svector<PExpr*>* get_pins() const { return pins_; }
+      const svector<PExpr*>& get_pins() const { return *pins_; }
 
       void dump_pins(ostream&out) const;
       void dump_delays(ostream&out) const;
 
     private:
-      const string name_;
+      perm_string name_;
       PDelays delay_;
       svector<PExpr*>*pins_;
 
@@ -115,8 +127,9 @@ class PGAssign  : public PGate {
       explicit PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels);
       ~PGAssign();
 
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
     private:
 };
@@ -141,10 +154,10 @@ class PGBuiltin  : public PGate {
 		  TRANIF1, RTRANIF0, RTRANIF1 };
 
     public:
-      explicit PGBuiltin(Type t, const string&name,
+      explicit PGBuiltin(Type t, perm_string name,
 			 svector<PExpr*>*pins,
 			 svector<PExpr*>*del);
-      explicit PGBuiltin(Type t, const string&name,
+      explicit PGBuiltin(Type t, perm_string name,
 			 svector<PExpr*>*pins,
 			 PExpr*del);
       ~PGBuiltin();
@@ -152,8 +165,9 @@ class PGBuiltin  : public PGate {
       Type type() const { return type_; }
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
+      virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
     private:
       Type type_;
@@ -171,14 +185,16 @@ class PGBuiltin  : public PGate {
 class PGModule  : public PGate {
 
     public:
+	// The name is the *instance* name of the gate.
+
 	// If the binding of ports is by position, this constructor
 	// builds everything all at once.
-      explicit PGModule(const char*type, const string&name,
+      explicit PGModule(perm_string type, perm_string name,
 			svector<PExpr*>*pins);
 
 	// If the binding of ports is by name, this constructor takes
 	// the bindings and stores them for later elaboration.
-      explicit PGModule(const char*type, const string&name,
+      explicit PGModule(perm_string type, perm_string name,
 			named<PExpr*>*pins, unsigned npins);
 
 
@@ -193,15 +209,17 @@ class PGModule  : public PGate {
 	// method to pass the range to the pform.
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
-      const char* get_type();
+	// This returns the module name of this module. It is a
+	// permallocated string.
+      perm_string get_type();
 
     private:
-      char* type_;
+      perm_string type_;
       svector<PExpr*>*overrides_;
       named<PExpr*>*pins_;
       unsigned npins_;
@@ -218,110 +236,11 @@ class PGModule  : public PGate {
       void elaborate_udp_(Design*, PUdp  *udp, NetScope*scope) const;
       void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const;
       bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const;
+      bool elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const;
+
+      NetNet*resize_net_to_port_(Design*des, NetScope*scope,
+				 NetNet*sig, unsigned port_wid,
+				 NetNet::PortType dir) const;
 };
 
-/*
- * $Log: PGate.h,v $
- * Revision 1.23  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.22  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.21  2001/10/21 00:42:47  steve
- *  Module types in pform are char* instead of string.
- *
- * Revision 1.20  2001/10/19 01:55:32  steve
- *  Method to get the type_ member
- *
- * Revision 1.19  2001/04/22 23:09:45  steve
- *  More UDP consolidation from Stephan Boettcher.
- *
- * Revision 1.18  2000/05/06 15:41:56  steve
- *  Carry assignment strength to pform.
- *
- * Revision 1.17  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.16  2000/03/29 04:37:10  steve
- *  New and improved combinational primitives.
- *
- * Revision 1.15  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.14  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.13  2000/02/18 05:15:02  steve
- *  Catch module instantiation arrays.
- *
- * Revision 1.12  2000/01/09 05:50:48  steve
- *  Support named parameter override lists.
- *
- * Revision 1.11  1999/12/11 05:45:41  steve
- *  Fix support for attaching attributes to primitive gates.
- *
- * Revision 1.10  1999/09/04 19:11:46  steve
- *  Add support for delayed non-blocking assignments.
- *
- * Revision 1.9  1999/08/23 16:48:39  steve
- *  Parameter overrides support from Peter Monta
- *  AND and XOR support wide expressions.
- *
- * Revision 1.8  1999/08/01 21:18:55  steve
- *  elaborate rise/fall/decay for continuous assign.
- *
- * Revision 1.7  1999/08/01 16:34:50  steve
- *  Parse and elaborate rise/fall/decay times
- *  for gates, and handle the rules for partial
- *  lists of times.
- *
- * Revision 1.6  1999/05/29 02:36:17  steve
- *  module parameter bind by name.
- *
- * Revision 1.5  1999/05/10 00:16:58  steve
- *  Parse and elaborate the concatenate operator
- *  in structural contexts, Replace vector<PExpr*>
- *  and list<PExpr*> with svector<PExpr*>, evaluate
- *  constant expressions with parameters, handle
- *  memories as lvalues.
- *
- *  Parse task declarations, integer types.
- *
- * Revision 1.4  1999/02/15 02:06:15  steve
- *  Elaborate gate ranges.
- *
- * Revision 1.3  1999/01/25 05:45:56  steve
- *  Add the LineInfo class to carry the source file
- *  location of things. PGate, Statement and PProcess.
- *
- *  elaborate handles module parameter mismatches,
- *  missing or incorrect lvalues for procedural
- *  assignment, and errors are propogated to the
- *  top of the elaboration call tree.
- *
- *  Attach line numbers to processes, gates and
- *  assignment statements.
- *
- * Revision 1.2  1998/12/01 00:42:13  steve
- *  Elaborate UDP devices,
- *  Support UDP type attributes, and
- *  pass those attributes to nodes that
- *  are instantiated by elaboration,
- *  Put modules into a map instead of
- *  a simple list.
- *
- * Revision 1.1  1998/11/03 23:28:54  steve
- *  Introduce verilog to CVS.
- *
- */
 #endif

PGenerate.cc

@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.cc,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "PGenerate.h"
+# include  "PWire.h"
+
+PGenerate::PGenerate(unsigned id)
+: id_number(id)
+{
+      parent = 0;
+}
+
+PGenerate::~PGenerate()
+{
+}
+
+PWire* PGenerate::get_wire(perm_string name) const
+{
+      map<perm_string,PWire*>::const_iterator obj = wires.find(name);
+      if (obj == wires.end())
+	    return 0;
+      else
+	    return (*obj).second;
+}
+
+void PGenerate::add_gate(PGate*gate)
+{
+      gates.push_back(gate);
+}
+
+void PGenerate::add_behavior(PProcess*proc)
+{
+      behaviors.push_back(proc);
+}

PGenerate.h

@@ -0,0 +1,117 @@
+#ifndef __PGenerate_H
+#define __PGenerate_H
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.h,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  "HName.h"
+# include  <list>
+# include  <map>
+# include  "pform_types.h"
+
+class Design;
+class NetScope;
+class PExpr;
+class PProcess;
+class PGate;
+class PWire;
+
+/*
+ * This represents a generate scheme. The interpretation of the
+ * members depends on the scheme_type.
+ *
+ * GS_LOOP
+ *
+ * GS_CASE
+ *    loop_test is the expression to be compared.
+ *    generates contains only GS_CASE_ITEM schemes.
+ * GS_CASE_ITEM
+ *    The parent points to the GS_CASE that contains this item.
+ *    the loop_test is compared with the parent->loop_test expression.
+ */
+class PGenerate : public LineInfo {
+
+    public:
+      PGenerate(unsigned id_number);
+      ~PGenerate();
+
+	// Generate schemes have an ID number, for when the scope is
+	// implicit.
+      const unsigned id_number;
+      perm_string scope_name;
+
+      enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT, GS_ELSE,
+		     GS_CASE, GS_CASE_ITEM};
+      scheme_t scheme_type;
+
+	// generate loops have an index variable and three
+	// expressions: for (index = <init>; <test>; index=<step>)
+      perm_string loop_index;
+      PExpr*loop_init;
+      PExpr*loop_test;
+      PExpr*loop_step;
+
+      map<perm_string,PWire*>wires;
+      PWire* get_wire(perm_string name) const;
+
+      list<PGate*> gates;
+      void add_gate(PGate*);
+
+      list<PProcess*> behaviors;
+      void add_behavior(PProcess*behave);
+
+      list<PGenerate*> generates;
+      PGenerate*parent;
+
+	// This method is called by the elaboration of a module to
+	// generate scopes. the container is the scope that is to
+	// contain the generated scope.
+      bool generate_scope(Design*des, NetScope*container);
+
+	// Elaborate signals within any of the generated scopes that
+	// were made by this generate block within the given container scope.
+      bool elaborate_sig(Design*des, NetScope*container) const;
+      bool elaborate(Design*des, NetScope*container) const;
+
+      void dump(ostream&out, unsigned indent) const;
+
+    private:
+      bool generate_scope_loop_(Design*des, NetScope*container);
+      bool generate_scope_condit_(Design*des, NetScope*container, bool else_flag);
+      bool generate_scope_case_(Design*des, NetScope*container);
+
+	// Elaborate_scope within a generated scope.
+      void elaborate_subscope_(Design*des, NetScope*scope);
+
+	// These are the scopes created by generate_scope.
+      list<NetScope*>scope_list_;
+	// internal function called on each scope generated by this scheme.
+      bool elaborate_sig_(Design*des, NetScope*scope) const;
+      bool elaborate_(Design*des, NetScope*scope) const;
+
+    private: // not implemented
+      PGenerate(const PGenerate&);
+      PGenerate& operator= (const PGenerate&);
+};
+
+#endif

PScope.cc

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2008 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+# include  "PScope.h"
+
+PScope::PScope(perm_string n, PScope*p)
+    : name_(n), parent_(p)
+{
+}
+
+PScope::~PScope()
+{
+}
+
+PWire* PScope::wires_find(perm_string name)
+{
+      map<perm_string,PWire*>::const_iterator cur = wires.find(name);
+      if (cur == wires.end())
+	    return 0;
+      else
+	    return (*cur).second;
+}

PScope.h

@@ -0,0 +1,80 @@
+#ifndef __PScope_H
+#define __PScope_H
+/*
+ * Copyright (c) 2008 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+# include  "StringHeap.h"
+# include  "pform_types.h"
+# include  <map>
+
+class PEvent;
+class PProcess;
+class PWire;
+
+class Design;
+class NetScope;
+
+/*
+ * The PScope class is a base representation of an object that
+ * represents lexical scope. For example, a module, a function/task, a
+ * named block is derived from a PScope.
+ *
+ * NOTE: This is note the same concept as the "scope" of an elaborated
+ * hierarchy. That is represented by NetScope objects after elaboration.
+ */
+class PScope {
+
+    public:
+	// When created, a scope has a name and a parent. The name is
+	// the name of the definition. For example, if this is a
+	// module declaration, the name is the name after the "module"
+	// keyword, and if this is a task scope, the name is the task
+	// name. The parent is the lexical parent of this scope. Since
+	// modules do not nest in Verilog, the parent must be nil for
+	// modules. Scopes for tasks and functions point to their
+	// containing module.
+      PScope(perm_string name, PScope*parent);
+      virtual ~PScope();
+
+      perm_string pscope_name() const { return name_; }
+      PScope* pscope_parent() { return parent_; }
+
+	// Nets an variables (wires) in the scope
+      map<perm_string,PWire*>wires;
+      PWire* wires_find(perm_string name);
+
+	// Named events in the scope.
+      map<perm_string,PEvent*>events;
+
+	// Behaviors (processes) in this scope
+      list<PProcess*> behaviors;
+
+    protected:
+      void dump_wires_(ostream&out, unsigned indent) const;
+
+      bool elaborate_sig_wires_(Design*des, NetScope*scope) const;
+
+      bool elaborate_behaviors_(Design*des, NetScope*scope) const;
+
+    private:
+      perm_string name_;
+      PScope*parent_;
+};
+
+#endif

PSpec.cc

@@ -1,7 +1,5 @@
-#ifndef __debug_H
-#define __debug_H
 /*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2006 Stephen Williams <steve@icarus.com>
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,16 +16,19 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: debug.h,v 1.1 2001/05/05 23:55:46 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PSpec.cc,v 1.2 2007/02/12 01:52:21 steve Exp $"
 #endif
 
-extern void breakpoint(void);
+# include  "PSpec.h"
 
-/*
- * $Log: debug.h,v $
- * Revision 1.1  2001/05/05 23:55:46  steve
- *  Add the beginnings of an interactive debugger.
- *
- */
-#endif
+PSpecPath::PSpecPath(unsigned src_cnt, unsigned dst_cnt)
+: conditional(false), condition(0), edge(0),
+  src(src_cnt), dst(dst_cnt),
+  data_source_expression(0)
+{
+}
+
+PSpecPath::~PSpecPath()
+{
+}

PSpec.h

@@ -0,0 +1,79 @@
+#ifndef __PSpec_H
+#define __PSpec_H
+/*
+ * Copyright (c) 2006 Stephen Williams <[email protected]>
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PSpec.h,v 1.3 2007/04/13 02:34:35 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  <vector>
+
+class PExpr;
+
+/*
+* The PSpecPath is the parse of a specify path, which is in its most
+* general form <path> = <delays>. The <delays> are collected into the
+* "delays" vector in all cases, and the variety is in the other
+* members.
+*
+* All paths also have a list of source names in the src vector, and a
+* list of destination names in the dst vector. These pairs are the
+* actual paths.
+*
+* If the path is a simple path, then:
+*      condition == nil
+*      edge == 0
+*      data_source_expression == nil
+*
+* If the path is conditional, then conditional == true and condition
+* is the condition expression. If the condition expression is nil,
+* then this is an ifnone conditional path.
+*
+* If data_source_expression != nil, then the path is edge sensitive
+* and the edge might not be 0.
+*/
+class PSpecPath  : public LineInfo {
+
+    public:
+      PSpecPath(unsigned src_cnt, unsigned dst_cnt);
+      ~PSpecPath();
+
+      void elaborate(class Design*des, class NetScope*scope) const;
+
+      void dump(std::ostream&out, unsigned ind) const;
+
+    public:
+	// Condition expression, if present.
+      bool conditional;
+      class PExpr* condition;
+	// Edge specification (-1==negedge, 0 = no edge, 1==posedge)
+      int edge;
+	// Ordered set of source nodes of a path
+      std::vector<perm_string> src;
+	// Ordered set of destination nodes of a path
+      std::vector<perm_string> dst;
+	// Data source expression
+      class PExpr* data_source_expression;
+
+      std::vector<class PExpr*>delays;
+};
+
+#endif

PTask.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,16 +16,13 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PTask.cc,v 1.6 2001/07/25 03:10:48 steve Exp $"
-#endif
 
 # include "config.h"
 
 # include  "PTask.h"
 
-PTask::PTask()
-: ports_(0), statement_(0)
+PTask::PTask(perm_string name, PScope*parent)
+: PScope(name, parent), ports_(0), statement_(0)
 {
 }
 
@@ -48,6 +45,9 @@ void PTask::set_statement(Statement*s)
 
 /*
  * $Log: PTask.cc,v $
+ * Revision 1.7  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.6  2001/07/25 03:10:48  steve
  *  Create a config.h.in file to hold all the config
  *  junk, and support gcc 3.0. (Stephan Boettcher)

PTask.h

@@ -1,7 +1,7 @@
 #ifndef __PTask_H
 #define __PTask_H
 /*
- * Copyright (c) 1999-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,25 +18,40 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PTask.h,v 1.11 2001/11/22 06:20:59 steve Exp $"
-#endif
 
 # include  "LineInfo.h"
+# include  "PScope.h"
 # include  "svector.h"
+# include  "StringHeap.h"
 # include  <string>
 class Design;
 class NetScope;
 class PWire;
 class Statement;
+class PExpr;
+
+enum PTaskFuncEnum {
+      PTF_NONE,
+      PTF_REG,
+      PTF_REG_S,
+      PTF_INTEGER,
+      PTF_REAL,
+      PTF_REALTIME,
+      PTF_TIME
+};
+
+struct PTaskFuncArg {
+      PTaskFuncEnum type;
+      svector<PExpr*>*range;
+};
 
 /*
  * The PTask holds the parsed definitions of a task.
  */
-class PTask  : public LineInfo {
+class PTask  : public PScope, public LineInfo {
 
     public:
-      explicit PTask();
+      explicit PTask(perm_string name, PScope*parent);
       ~PTask();
 
       void set_ports(svector<PWire *>*p);
@@ -69,16 +84,18 @@ class PTask  : public LineInfo {
  * The function is similar to a task (in this context) but there is a
  * single output port and a set of input ports. The output port is the
  * function return value.
+ *
+ * The output value is not elaborated until elaborate_sig.
  */
-class PFunction : public LineInfo {
+class PFunction : public PScope, public LineInfo {
 
     public:
-      explicit PFunction();
+      explicit PFunction(perm_string name, PScope*parent);
       ~PFunction();
 
       void set_ports(svector<PWire *>*p);
       void set_statement(Statement *s);
-      void set_output(PWire*);
+      void set_return(PTaskFuncArg t);
 
       void elaborate_scope(Design*des, NetScope*scope) const;
 
@@ -91,56 +108,9 @@ class PFunction : public LineInfo {
       void dump(ostream&, unsigned) const;
 
     private:
-      PWire*out_;
+      PTaskFuncArg return_type_;
       svector<PWire *> *ports_;
       Statement *statement_;
 };
 
-/*
- * $Log: PTask.h,v $
- * Revision 1.11  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.10  2001/01/13 22:20:08  steve
- *  Parse parameters within nested scopes.
- *
- * Revision 1.9  2000/07/30 18:25:43  steve
- *  Rearrange task and function elaboration so that the
- *  NetTaskDef and NetFuncDef functions are created during
- *  signal enaboration, and carry these objects in the
- *  NetScope class instead of the extra, useless map in
- *  the Design class.
- *
- * Revision 1.8  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.7  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  1999/09/30 21:28:34  steve
- *  Handle mutual reference of tasks by elaborating
- *  task definitions in two passes, like functions.
- *
- * Revision 1.5  1999/09/01 20:46:19  steve
- *  Handle recursive functions and arbitrary function
- *  references to other functions, properly pass
- *  function parameters and save function results.
- *
- * Revision 1.4  1999/08/25 22:22:41  steve
- *  elaborate some aspects of functions.
- *
- * Revision 1.3  1999/07/31 19:14:47  steve
- *  Add functions up to elaboration (Ed Carter)
- *
- * Revision 1.2  1999/07/24 02:11:19  steve
- *  Elaborate task input ports.
- *
- * Revision 1.1  1999/07/03 02:12:51  steve
- *  Elaborate user defined tasks.
- *
- */
 #endif

PUdp.cc

@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2003-2004 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PUdp.cc,v 1.3 2004/03/08 00:47:44 steve Exp $"
+#endif
+
+# include  "PUdp.h"
+
+PUdp::PUdp(perm_string n, unsigned nports)
+: ports(nports), sequential(false), initial(verinum::Vx), name_(n)
+{
+}
+
+unsigned PUdp::find_port(const char*name)
+{
+      for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
+
+	    if (ports[idx] == name)
+		  return idx;
+      }
+
+      return ports.count();
+}
+
+/*
+ * $Log: PUdp.cc,v $
+ * Revision 1.3  2004/03/08 00:47:44  steve
+ *  primitive ports can bind bi name.
+ *
+ * Revision 1.2  2004/02/18 17:11:54  steve
+ *  Use perm_strings for named langiage items.
+ *
+ * Revision 1.1  2003/07/15 05:07:13  steve
+ *  Move PUdp constructor into compiled file.
+ *
+ */
+

PUdp.h

@@ -1,7 +1,7 @@
 #ifndef __PUdp_H
 #define __PUdp_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2004 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,27 +18,22 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PUdp.h,v 1.6 2002/05/23 03:08:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PUdp.h,v 1.12 2004/03/08 00:47:44 steve Exp $"
 #endif
 
 # include  <map>
+# include  "StringHeap.h"
 # include  "svector.h"
-# include  <string>
 # include  "verinum.h"
 
 class PExpr;
 
-svector<string>::svector<string>(unsigned size)
-: nitems_(size), items_(new string[size])
-{
-}
-
 /*
  * This class represents a parsed UDP. This is a much simpler object
  * then a module or macromodule.
  *
- *   - all ports are scaler,
+ *   - all ports are scalar,
  *   - pin 0 (the first port) is always output,
  *     and the remaining pins are input.
  *
@@ -53,15 +48,16 @@ svector<string>::svector<string>(unsigned size)
  * the current output.
  *
  * If the UDP is sequential, the "initial" member is taken to be the
- * intial value assigned in the source, or 'x' if none is given.
+ * initial value assigned in the source, or 'x' if none is given.
  */
 class PUdp {
 
     public:
-      explicit PUdp(const string&n, unsigned nports)
-      : ports(nports), sequential(false), initial(verinum::Vx), name_(n) { }
+      explicit PUdp(perm_string n, unsigned nports);
 
       svector<string>ports;
+      unsigned find_port(const char*name);
+
       bool sequential;
 
       svector<string>tinput;
@@ -74,7 +70,7 @@ class PUdp {
 
       void dump(ostream&out) const;
 
-      const string name_;
+      perm_string name_;
     private:
 
     private: // Not implemented
@@ -84,6 +80,24 @@ class PUdp {
 
 /*
  * $Log: PUdp.h,v $
+ * Revision 1.12  2004/03/08 00:47:44  steve
+ *  primitive ports can bind bi name.
+ *
+ * Revision 1.11  2004/02/18 17:11:54  steve
+ *  Use perm_strings for named langiage items.
+ *
+ * Revision 1.10  2003/07/15 05:07:13  steve
+ *  Move PUdp constructor into compiled file.
+ *
+ * Revision 1.9  2003/07/15 03:49:22  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.8  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.7  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.6  2002/05/23 03:08:51  steve
  *  Add language support for Verilog-2001 attribute
  *  syntax. Hook this support into existing $attribute

PWire.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,28 +16,21 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PWire.cc,v 1.9 2002/06/21 04:59:35 steve Exp $"
-#endif
 
 # include "config.h"
 # include  "PWire.h"
+# include  "PExpr.h"
 # include  <assert.h>
 
-PWire::PWire(const hname_t&n, NetNet::Type t, NetNet::PortType pt)
-: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
-lidx_(0), ridx_(0)
-{
-      if (t == NetNet::INTEGER) {
-	    type_ = NetNet::REG;
-	    signed_ = true;
-	    isint_ = true;
-      }
-}
-
-PWire::PWire(char*n, NetNet::Type t, NetNet::PortType pt)
-: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
-lidx_(0), ridx_(0)
+PWire::PWire(perm_string n,
+	     NetNet::Type t,
+	     NetNet::PortType pt,
+	     ivl_variable_type_t dt)
+: name_(n), type_(t), port_type_(pt), data_type_(dt),
+  signed_(false), isint_(false),
+  port_msb_(0), port_lsb_(0), port_set_(false),
+  net_msb_(0), net_lsb_(0), net_set_(false), error_cnt_(0),
+  lidx_(0), ridx_(0)
 {
       if (t == NetNet::INTEGER) {
 	    type_ = NetNet::REG;
@@ -51,9 +44,9 @@ NetNet::Type PWire::get_wire_type() const
       return type_;
 }
 
-const hname_t& PWire::path() const
+perm_string PWire::basename() const
 {
-      return hname_;
+      return name_;
 }
 
 bool PWire::set_wire_type(NetNet::Type t)
@@ -108,6 +101,25 @@ bool PWire::set_port_type(NetNet::PortType pt)
       }
 }
 
+bool PWire::set_data_type(ivl_variable_type_t dt)
+{
+      if (data_type_ != IVL_VT_NO_TYPE) {
+	    if (data_type_ != dt)
+		  return false;
+	    else
+		  return true;
+      }
+
+      assert(data_type_ == IVL_VT_NO_TYPE);
+      data_type_ = dt;
+      return true;
+}
+
+ivl_variable_type_t PWire::get_data_type() const
+{
+      return data_type_;
+}
+
 void PWire::set_signed(bool flag)
 {
       signed_ = flag;
@@ -123,53 +135,79 @@ bool PWire::get_isint() const
       return isint_;
 }
 
-void PWire::set_range(PExpr*m, PExpr*l)
+/*
+ * Since implicitly defined list of port declarations are no longer
+ * considered fully defined we no longer need this routine to force
+ * them to be fully defined.
+ *
+void PWire::set_net_range()
 {
-      msb_ = svector<PExpr*>(msb_,m);
-      lsb_ = svector<PExpr*>(lsb_,l);
+      net_msb_ = port_msb_;
+      net_lsb_ = port_lsb_;
+      net_set_ = true;
+}
+*/
+
+void PWire::set_range(PExpr*m, PExpr*l, PWSRType type)
+{
+      switch (type) {
+	  case SR_PORT:
+	    if (port_set_) {
+		  cerr << get_fileline() << ": error: Port ``" << name_
+		       << "'' has already been declared a port." << endl;
+		  error_cnt_ += 1;
+	    } else {
+		  port_msb_ = m;
+		  port_lsb_ = l;
+		  port_set_ = true;
+	    }
+	    return;
+
+	  case SR_NET:
+	    if (net_set_) {
+		  cerr << get_fileline() << ": error: Net ``" << name_
+		       << "'' has already been declared." << endl;
+		  error_cnt_ += 1;
+	    } else {
+		  net_msb_ = m;
+		  net_lsb_ = l;
+		  net_set_ = true;
+	    }
+	    return;
+
+	  case SR_BOTH:
+	    if (port_set_ || net_set_) {
+		  if (port_set_) {
+		        cerr << get_fileline() << ": error: Port ``" << name_
+		             << "'' has already been declared a port." << endl;
+		        error_cnt_ += 1;
+		  }
+		  if (net_set_) {
+		        cerr << get_fileline() << ": error: Net ``" << name_
+		             << "'' has already been declared." << endl;
+		        error_cnt_ += 1;
+		  }
+	    } else {
+		  port_msb_ = m;
+		  port_lsb_ = l;
+		  port_set_ = true;
+		  net_msb_ = m;
+		  net_lsb_ = l;
+		  net_set_ = true;
+	    }
+	    return;
+      }
 }
 
 void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
 {
-      assert(lidx_ == 0);
-      assert(ridx_ == 0);
-      assert(type_ == NetNet::REG);
-      lidx_ = ldx;
-      ridx_ = rdx;
+      if (lidx_ != 0 || ridx_ != 0) {
+	    cerr << get_fileline() << ": error: Array ``" << name_
+	         << "'' has already been declared." << endl;
+	    error_cnt_ += 1;
+      } else {
+            lidx_ = ldx;
+            ridx_ = rdx;
+      }
 }
 
-/*
- * $Log: PWire.cc,v $
- * Revision 1.9  2002/06/21 04:59:35  steve
- *  Carry integerness throughout the compilation.
- *
- * Revision 1.8  2002/01/26 05:28:28  steve
- *  Detect scalar/vector declarion mismatch.
- *
- * Revision 1.7  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.6  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.5  2001/01/06 02:29:35  steve
- *  Support arrays of integers.
- *
- * Revision 1.4  2000/12/11 00:31:43  steve
- *  Add support for signed reg variables,
- *  simulate in t-vvm signed comparisons.
- *
- * Revision 1.3  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.2  1999/09/10 05:02:09  steve
- *  Handle integers at task parameters.
- *
- * Revision 1.1  1999/06/17 05:34:42  steve
- *  Clean up interface of the PWire class,
- *  Properly match wire ranges.
- *
- */
-

PWire.h

@@ -1,7 +1,7 @@
 #ifndef __PWire_H
 #define __PWire_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,14 +18,15 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: PWire.h,v 1.13 2002/06/21 04:59:35 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PWire.h,v 1.21 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  "netlist.h"
 # include  "LineInfo.h"
 # include  <map>
 # include  "svector.h"
+# include  "StringHeap.h"
 
 #ifdef HAVE_IOSFWD
 # include  <iosfwd>
@@ -36,25 +37,32 @@ class ostream;
 class PExpr;
 class Design;
 
+/*
+ * The different type of PWire::set_range() calls.
+ */
+enum PWSRType {SR_PORT, SR_NET, SR_BOTH};
+
 /*
  * Wires include nets, registers and ports. A net or register becomes
- * a port by declaration, so ports are not seperate. The module
+ * a port by declaration, so ports are not separate. The module
  * identifies a port by keeping it in its port list.
  *
  * The hname parameter to the constructor is a hierarchical name. It
- * is an array of strings starting with the root, running towards
- * the base name, and terminated by a null pointer. The environment
- * allocates the memory for me.
+ * is the name of the wire within a module, so does not include the
+ * current scope or any instances. Modules contain all the wires, so
+ * from that perspective, sub-scopes within the module are a part of
+ * the wire name.
  */
 class PWire : public LineInfo {
 
     public:
-      PWire(const hname_t&hname, NetNet::Type t, NetNet::PortType pt);
-      PWire(char*name, NetNet::Type t, NetNet::PortType pt);
+      PWire(perm_string name,
+	    NetNet::Type t,
+	    NetNet::PortType pt,
+	    ivl_variable_type_t dt);
 
 	// Return a hierarchical name.
-	//const string name() const;
-      const hname_t&path() const;
+      perm_string basename() const;
 
       NetNet::Type get_wire_type() const;
       bool set_wire_type(NetNet::Type);
@@ -66,28 +74,38 @@ class PWire : public LineInfo {
       bool get_signed() const;
       bool get_isint() const;
 
-      void set_range(PExpr*msb, PExpr*lsb);
+      bool set_data_type(ivl_variable_type_t dt);
+      ivl_variable_type_t get_data_type() const;
+
+      void set_range(PExpr*msb, PExpr*lsb, PWSRType type);
+      void set_net_range();
 
       void set_memory_idx(PExpr*ldx, PExpr*rdx);
 
-      map<string,PExpr*> attributes;
+      map<perm_string,PExpr*> attributes;
 
 	// Write myself to the specified stream.
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind=4) const;
 
-      void elaborate_sig(Design*, NetScope*scope) const;
+      NetNet* elaborate_sig(Design*, NetScope*scope) const;
 
     private:
-      hname_t hname_;
+      perm_string name_;
       NetNet::Type type_;
       NetNet::PortType port_type_;
+      ivl_variable_type_t data_type_;
       bool signed_;
       bool isint_;		// original type of integer
 
 	// These members hold expressions for the bit width of the
 	// wire. If they do not exist, the wire is 1 bit wide.
-      svector<PExpr*>msb_;
-      svector<PExpr*>lsb_;
+      PExpr*port_msb_;
+      PExpr*port_lsb_;
+      bool port_set_;
+      PExpr*net_msb_;
+      PExpr*net_lsb_;
+      bool net_set_;
+      unsigned error_cnt_;
 
 	// If this wire is actually a memory, these indices will give
 	// me the size and address range of the memory.
@@ -99,59 +117,4 @@ class PWire : public LineInfo {
       PWire& operator= (const PWire&);
 };
 
-/*
- * $Log: PWire.h,v $
- * Revision 1.13  2002/06/21 04:59:35  steve
- *  Carry integerness throughout the compilation.
- *
- * Revision 1.12  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.11  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.10  2001/01/16 02:44:18  steve
- *  Use the iosfwd header if available.
- *
- * Revision 1.9  2000/12/11 00:31:43  steve
- *  Add support for signed reg variables,
- *  simulate in t-vvm signed comparisons.
- *
- * Revision 1.8  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.7  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.5  1999/06/17 05:34:42  steve
- *  Clean up interface of the PWire class,
- *  Properly match wire ranges.
- *
- * Revision 1.4  1999/06/02 15:38:46  steve
- *  Line information with nets.
- *
- * Revision 1.3  1999/04/19 01:59:36  steve
- *  Add memories to the parse and elaboration phases.
- *
- * Revision 1.2  1998/11/23 00:20:22  steve
- *  NetAssign handles lvalues as pin links
- *  instead of a signal pointer,
- *  Wire attributes added,
- *  Ability to parse UDP descriptions added,
- *  XNF generates EXT records for signals with
- *  the PAD attribute.
- *
- * Revision 1.1  1998/11/03 23:28:55  steve
- *  Introduce verilog to CVS.
- *
- */
 #endif

QUICK_START.txt

@@ -16,8 +16,8 @@ execute even the most trivial design. For the purposes of simulation,
 we use as our example *the* most trivial simulation:
 
   module main;
- 
-  initial 
+
+  initial
     begin
       $display("Hello, World");
       $finish ;
@@ -79,5 +79,5 @@ Verilog packages from the main Debian software site.
 
 * Install From Source
 
-In this case, see the readme and other documentation that comes with
+In this case, see README.txt and other documentation that comes with
 the source.

README.txt

@@ -1,5 +1,5 @@
-		THE ICARUS VERILOG COMPILATION SYSTEM 
-			   September 17, 2000	
+		THE ICARUS VERILOG COMPILATION SYSTEM
+		Copyright 2000-2004 Stephen Williams
 
 
 1.0 What is ICARUS Verilog?
@@ -9,11 +9,11 @@ described in the IEEE-1364 standard. Of course, it's not quite there
 yet. It does currently handle a mix of structural and behavioral
 constructs. For a view of the current state of Icarus Verilog, see its
 home page at <http://www.icarus.com/eda/verilog>.
- 
+
 Icarus Verilog is not aimed at being a simulator in the traditional
 sense, but a compiler that generates code employed by back-end
 tools. These back-end tools currently include a simulator engine
-called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF fpga
+called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF FPGA
 netlist generator. In the future, backends are expected for EDIF/LPM,
 structural Verilog, VHDL, etc.
 
@@ -39,7 +39,7 @@ on a UNIX-like system:
 	- GNU Make
 	  The Makefiles use some GNU extensions, so a basic POSIX
 	  make will not work. Linux systems typically come with a
-	  satisfactory make. BSD based systems (i.e. NetBSD, FreeBSD)
+	  satisfactory make. BSD based systems (i.e., NetBSD, FreeBSD)
 	  typically have GNU make as the gmake program.
 
 	- ISO C++ Compiler
@@ -59,6 +59,22 @@ on a UNIX-like system:
 	  A version problem with this program is the most common cause
 	  of difficulty. See the Icarus Verilog FAQ.
 
+	- readline 4.2
+	  On Linux systems, this usually means the readline-devel
+	  rpm. In any case, it is the development headers of readline
+	  that are needed.
+
+	- termcap
+	  The readline library in turn uses termcap.
+
+If you are building from CVS, you will also need software to generate
+the configure scripts.
+
+	- autoconf 2.53
+	  This generates configure scripts from configure.in. The 2.53
+	  or later versions are known to work, autoconf 2.13 is
+	  reported to *not* work.
+
 2.2 Compilation
 
 Unpack the tar-ball and cd into the verilog-######### directory
@@ -68,7 +84,7 @@ with the commands:
   ./configure
   make
 
-Normally, this command automatically figures out every thing it needs
+Normally, this command automatically figures out everything it needs
 to know. It generally works pretty well. There are a few flags to the
 configure script that modify its behavior:
 
@@ -86,6 +102,28 @@ configure script that modify its behavior:
 	    common to use --prefix=/opt.  You can configure for a non-root
 	    install with --prefix=$HOME.
 
+	--enable-vvp32 (experimental)
+	    If compiling on AMD64 systems, this enables the
+	    compilation of 32bit compatible vvp (vvp32) and the vpi
+	    modules that match.
+
+2.2.1 Special AMD64 Instructions
+
+(The Icarus Verilog RPM for x86_64 is build using these instructions.)
+
+If you are building for Linux/AMD64 (a.k.a x86_64) then to get the
+most out of your install, first make sure you have both 64bit and
+32bit development libraries installed. Then configure with this
+somewhat more complicated command:
+
+  ./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32
+
+This reflects the convention on AMD64 systems that 64bit libraries go
+into lib64 directories. The "--enable-vvp32" also turns on 32bit
+compatibility files. A 32bit version of vvp (vvp32) will be created,
+as well as 32bit versions of the development libraries and bundled VPI
+libraries.
+
 2.3 (Optional) Testing
 
 To run a simple test before installation, execute
@@ -130,14 +168,14 @@ only sees a single input file. See ivlpp/ivlpp.txt for details.
 3.2 Parse
 
 The Verilog compiler starts by parsing the Verilog source file. The
-output of the parse in a list of Module objects in PFORM. The pform
+output of the parse is a list of Module objects in "pform". The pform
 (see pform.h) is mostly a direct reflection of the compilation
 step. There may be dangling references, and it is not yet clear which
 module is the root.
 
-One can see a human readable version of the final PFORM by using the
+One can see a human readable version of the final pform by using the
 ``-P <path>'' flag to the compiler. This will cause iverilog to dump
-the PFORM into the file named <path>.
+the pform into the file named <path>.
 
 3.3 Elaboration
 
@@ -152,10 +190,10 @@ The elaborate() function performs the elaboration.
 
 One can see a human readable version of the final, elaborated and
 optimized netlist by using the ``-N <path>'' flag to the compiler. If
-elaboration succeeds, the final netlist (i.e. after optimizations but
+elaboration succeeds, the final netlist (i.e., after optimizations but
 before code generation) will be dumped into the file named <path>.
 
-Elaboration is actually performed it two steps: scopes and parameters
+Elaboration is actually performed in two steps: scopes and parameters
 first, followed by the structural and behavioral elaboration.
 
 3.3.1 Scope Elaboration
@@ -184,19 +222,19 @@ simply passing through the pform.
 
 This is actually a collection of processing steps that perform
 optimizations that do not depend on the target technology. Examples of
-some useful transformations would be,
+some useful transformations are
 
-	- eliminate null effect circuitry,
+	- eliminate null effect circuitry
 	- combinational reduction
 	- constant propagation
 
 The actual functions performed are specified on the ivl command line by
-the -F flags (See below).
+the -F flags (see below).
 
 3.5 Code Generation
 
 This step takes the design netlist and uses it to drive the code
-generator. (See target.h.) This may require transforming the
+generator (see target.h). This may require transforming the
 design to suit the technology.
 
 The emit() method of the Design class performs this step. It runs
@@ -208,6 +246,9 @@ command line.
 
 3.6 ATTRIBUTES
 
+    NOTE: The $attribute syntax will soon be deprecated in favor of the
+    Verilog-2001 attribute syntax, which is cleaner and standardized.
+
 The parser accepts, as an extension to Verilog, the $attribute module
 item. The syntax of the $attribute item is:
 
@@ -255,8 +296,8 @@ Example: Compiling "hello.vl"
 
 ------------------------ hello.vl ----------------------------
 module main();
- 
-initial 
+
+initial
   begin
     $display("Hi there");
     $finish ;
@@ -266,7 +307,7 @@ endmodule
 
 --------------------------------------------------------------
 
-Insure that "iverilog" is on your search path, and the vpi library 
+Ensure that "iverilog" is on your search path, and the vpi library
 is available.
 
 To compile the program:
@@ -293,26 +334,38 @@ Verilog web page for the current state of support for Verilog, and in
 particular, browse the bug report database for reported unsupported
 constructs.
 
-  - real data types not supported. This includes real and
-    realtime. However, floating point constants in delay expressions
-    are supported so that `timescale works properly.
-
-  - System functions are supported, but the compiler presumes that
-    they return 32 bits. This is the typical case.
+  - System functions are supported, but the return value is a little
+    tricky. See SYSTEM FUNCTION TABLE FILES in the iverilog man page.
 
   - Specify blocks are parsed but ignored in general.
 
   - trireg is not supported. tri0 and tri1 are supported.
 
-  - force to nets are not supported. Force to variables, and
-    assign/deassign, are supported.
+  - tran primitives, i.e. tran, tranif1, tranif0, rtran, rtranif1
+    and rtranif0 are not supported.
+
+  - Net delays, of the form "wire #N foo;" do not work. Delays in
+    every other context do work properly, including the V2001 form
+    "wire #5 foo = bar;"
+
+  - Event controls inside non-blocking assignments are not supported.
+    i.e.: a <= @(posedge clk) b;
+
+  - Macro arguments are not supported. `define macros are supported,
+    but they cannot take arguments.
 
 5.1 Nonstandard Constructs or Behaviors
 
 Icarus Verilog includes some features that are not part of the
 IEEE1364 standard, but have well defined meaning, and also sometimes
 gives nonstandard (but extended) meanings to some features of the
-language that are defined.
+language that are defined. See the "extensions.txt" documentation for
+more details.
+
+    $is_signed(<expr>)
+	This system function returns 1 if the expression contained is
+	signed, or 0 otherwise. This is mostly of use for compiler
+	regression tests.
 
     $sizeof(<expr>)
     $bits(<expr>)
@@ -324,13 +377,34 @@ language that are defined.
 	The $sizeof function is deprecated in favor of $bits, which is
 	the same thing, but included in the SystemVerilog definition.
 
+    $simtime
+	The $simtime system function returns as a 64bit value the
+	simulation time, unscaled by the time units of local
+	scope. This is different from the $time and $stime functions
+	which return the scaled times. This function is added for
+	regression testing of the compiler and run time, but can be
+	used by applications who really want the simulation time.
+
+	Note that the simulation time can be confusing if there are
+	lots of different `timescales within a design. It is not in
+	general possible to predict what the simulation precision will
+	turn out to be.
+
+    $mti_random()
+    $mti_dist_uniform
+	These functions are similar to the IEEE1364 standard $random
+	functions, but they use the Mersenne Twister (MT19937)
+	algorithm. This is considered an excellent random number
+	generator, but does not generate the same sequence as the
+	standardized $random.
+
     Builtin system functions
 
 	Certain of the system functions have well defined meanings, so
 	can theoretically be evaluated at compile time, instead of
 	using runtime VPI code. Doing so means that VPI cannot
 	override the definitions of functions handled in this
-	manner. On the other hand, this makes them synthesizeable, and
+	manner. On the other hand, this makes them synthesizable, and
 	also allows for more aggressive constant propagation. The
 	functions handled in this manner are:
 
@@ -345,7 +419,7 @@ language that are defined.
     Preprocessing Library Modules
 
 	Icarus Verilog does preprocess modules that are loaded from
-	libraries via the -y mechinism. However, the only macros
+	libraries via the -y mechanism. However, the only macros
 	defined during compilation of that file are those that it
 	defines itself (or includes) or that are defined on the
 	command line or command file.
@@ -370,91 +444,53 @@ language that are defined.
 	completely specify the format.
 
 	Icarus Verilog allows the programmer to specify the field
-	with. The "%t" format in Icarus Verilog works exactly as it
+	width. The "%t" format in Icarus Verilog works exactly as it
 	does in standard Verilog. However, if the programmer chooses
-	to specify a minimum width, i.e. "%5t" Then for that display
+	to specify a minimum width (i.e., "%5t"), then for that display
 	Icarus Verilog will override the $timeformat minimum width and
 	use the explicit minimum width.
 
+    vpiScope iterator on vpiScope objects.
+
+	In the VPI, the normal way to iterate over vpiScope objects
+	contained within a vpiScope object, is the vpiInternalScope
+	iterator. Icarus Verilog adds support for the vpiScope
+	iterator of a vpiScope object, that iterates over *everything*
+	the is contained in the current scope. This is useful in cases
+	where one wants to iterate over all the objects in a scope
+	without iterating over all the contained types explicitly.
+
+    time 0 race resolution.
+
+	Combinational logic is routinely modeled using always
+	blocks. However, this can lead to race conditions if the
+	inputs to the combinational block are initialized in initial
+	statements. Icarus Verilog slightly modifies time 0 scheduling
+	by arranging for always statements with ANYEDGE sensitivity
+	lists to be scheduled before any other threads. This causes
+	combinational always blocks to be triggered when the values in
+	the sensitivity list are initialized by initial threads.
+
+    Nets with Types
+
+	Icarus Verilog support an extension syntax that allows nets
+	and regs to be explicitly typed. The currently supported types
+	are logic, bool and real. This implies that "logic" and "bool"
+	are new keywords. Typical syntax is:
+
+	wire real foo = 1.0;
+	reg logic bar, bat;
+
+	... and so forth. The syntax can be turned off by using the
+	-g2 flag to iverilog, and turned on explicitly with the -g2x
+	flag to iverilog.
+
 6.0 CREDITS
 
 Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
 Copyright Stephen Williams. The proper notices are in the head of each
 file. However, I have early on received aid in the form of fixes,
-Verilog guidance, and especially testing from many people, including
-(in alphabetical order):
-
-	Eric Aardoom <[email protected]>
-	Stephan I. Boettcher <[email protected]>
-	Ed Carter <[email protected]>
-	Larry Doolittle <[email protected]>
-	Guy Hutchison <[email protected]>
-	Ales Hvezda <[email protected]>
-	Venkat Iyer <[email protected]>
-	Yasuhisa Kato <[email protected]>
-        James Lee <[email protected]>
-	Peter Monta <[email protected]>
-	Daniel H. Nelsen <[email protected]>
-	Stefan Petersen <[email protected]>
-	Michael Ruff <[email protected]>
-	Mike Runyan <[email protected]>
-	Jason Schonberg <[email protected]>
-	Stuart Sutherland <[email protected]>
-	Stephen Tell <[email protected]>
-        Stefan Theide <[email protected]>
-	Tom Verbeure
-	Steve Wilson <[email protected]>
-
-and others. Testers in particular include a larger community of people
-interested in a GPL Verilog for Linux. Special thanks to Steve Wilson
-for collecting and organizing the test suite code for all those testers.
-
-
-6.1 PORT MAINTAINERS
-
-This is a list of people who have created ports and precompiled
-packages for various operating systems. These folks have graciously
-taken on the task of building Icarus Verilog on their systems and
-bundled it into neat packages.(+) If you want to be added to the list (or
-removed from the list) send e-mail to me.
-
-      FreeBSD/{Intel,alpha}
-	Ying-Chieh Liao <[email protected]>
-
-      Linux/{alpha,Intel} (RPMS)
-	Stephen Williams <[email protected]>
-
-      Linux/* (.debs)
-	Hamish Moffatt <[email protected]>
-
-      Macintosh -- MacO/S
-	Yasuhisa Kato <[email protected]>
-
-      Mac O/S X
-        Timothy J. Wood <[email protected]>
-
-      NetBSD/*
-	Dan McMahill <[email protected]>
-
-      Solaris/SPARC packages (.pkg)
-	Dan McMahill <[email protected]>
-
-      Cygwin32/*
-        Venkat Iyer <[email protected]>
-
-      Mingw32
-        Venkat Iyer <[email protected]>
-
-(+) These are not the only systems where Icarus Verilog has been run,
-just the systems where precompiled binaries are publicly available.
-
-
-6.2 TEST SUITE MANAGER
-
-Steve Wilson <[email protected]> or <[email protected]> has taken on
-the large task of managing the test suite. He has maintained the
-regression test scripts, the driver list, received submissions from
-myself and others, and has written a great many tests on his own. Any
-compiler writer, for any language, will tell you that the test suite
-is at least as important as the compiler code itself.
+Verilog guidance, and especially testing from many people. Testers in
+particular include a larger community of people interested in a GPL
+Verilog for Linux.
 

Statement.cc

@@ -16,8 +16,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: Statement.cc,v 1.27 2002/04/21 22:31:02 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: Statement.cc,v 1.30 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -86,18 +86,13 @@ PAssignNB::~PAssignNB()
 {
 }
 
-PBlock::PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st)
-: name_(n), bl_type_(t), list_(st)
-{
-}
-
-PBlock::PBlock(BL_TYPE t, const svector<Statement*>&st)
-: bl_type_(t), list_(st)
+PBlock::PBlock(perm_string n, PScope*parent, BL_TYPE t)
+: PScope(n, parent), bl_type_(t)
 {
 }
 
 PBlock::PBlock(BL_TYPE t)
-: bl_type_(t)
+: PScope(perm_string(),0), bl_type_(t)
 {
 }
 
@@ -107,16 +102,27 @@ PBlock::~PBlock()
 	    delete list_[idx];
 }
 
-PCallTask::PCallTask(const hname_t&n, const svector<PExpr*>&p)
+void PBlock::set_statement(const svector<Statement*>&st)
+{
+      list_ = st;
+}
+
+PCallTask::PCallTask(const pform_name_t&n, const svector<PExpr*>&p)
 : path_(n), parms_(p)
 {
 }
 
+PCallTask::PCallTask(perm_string n, const svector<PExpr*>&p)
+: parms_(p)
+{
+      path_.push_back(name_component_t(n));
+}
+
 PCallTask::~PCallTask()
 {
 }
 
-const hname_t& PCallTask::path() const
+const pform_name_t& PCallTask::path() const
 {
       return path_;
 }
@@ -178,7 +184,7 @@ PDelayStatement::~PDelayStatement()
 {
 }
 
-PDisable::PDisable(const hname_t&sc)
+PDisable::PDisable(const pform_name_t&sc)
 : scope_(sc)
 {
 }
@@ -273,7 +279,7 @@ PRepeat::~PRepeat()
       delete statement_;
 }
 
-PTrigger::PTrigger(const hname_t&e)
+PTrigger::PTrigger(const pform_name_t&e)
 : event_(e)
 {
 }
@@ -295,6 +301,16 @@ PWhile::~PWhile()
 
 /*
  * $Log: Statement.cc,v $
+ * Revision 1.30  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.29  2004/02/18 17:11:54  steve
+ *  Use perm_strings for named langiage items.
+ *
+ * Revision 1.28  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.27  2002/04/21 22:31:02  steve
  *  Redo handling of assignment internal delays.
  *  Leave it possible for them to be calculated

Statement.h

@@ -1,7 +1,7 @@
 #ifndef __Statement_H
 #define __Statement_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,14 +18,13 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: Statement.h,v 1.35 2002/06/04 05:38:44 steve Exp $"
-#endif
 
 # include  <string>
 # include  "svector.h"
+# include  "StringHeap.h"
 # include  "PDelays.h"
 # include  "PExpr.h"
+# include  "PScope.h"
 # include  "HName.h"
 # include  "LineInfo.h"
 class PExpr;
@@ -35,6 +34,7 @@ class Design;
 class NetAssign_;
 class NetCAssign;
 class NetDeassign;
+class NetForce;
 class NetScope;
 
 /*
@@ -53,10 +53,12 @@ class PProcess : public LineInfo {
 
       virtual ~PProcess();
 
+      bool elaborate(Design*des, NetScope*scope) const;
+
       Type type() const { return type_; }
       Statement*statement() { return statement_; }
 
-      map<string,PExpr*> attributes;
+      map<perm_string,PExpr*> attributes;
 
       virtual void dump(ostream&out, unsigned ind) const;
 
@@ -79,6 +81,7 @@ class Statement : public LineInfo {
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
 };
 
 /*
@@ -143,25 +146,27 @@ class PAssignNB  : public PAssign_ {
  * statements before constructing this object, so it knows a priori
  * what is contained.
  */
-class PBlock  : public Statement {
+class PBlock  : public PScope, public Statement {
 
     public:
       enum BL_TYPE { BL_SEQ, BL_PAR };
 
-      explicit PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st);
-      explicit PBlock(BL_TYPE t, const svector<Statement*>&st);
+	// If the block has a name, it is a scope and also has a parent.
+      explicit PBlock(perm_string n, PScope*parent, BL_TYPE t);
+	// If it doesn't have a name, it's not a scope
       explicit PBlock(BL_TYPE t);
       ~PBlock();
 
       BL_TYPE bl_type() const { return bl_type_; }
 
+      void set_statement(const svector<Statement*>&st);
 
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
 
     private:
-      string name_;
       const BL_TYPE bl_type_;
       svector<Statement*>list_;
 };
@@ -169,10 +174,11 @@ class PBlock  : public Statement {
 class PCallTask  : public Statement {
 
     public:
-      explicit PCallTask(const hname_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(const pform_name_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(perm_string n, const svector<PExpr*>&parms);
       ~PCallTask();
 
-      const hname_t& path() const;
+      const pform_name_t& path() const;
 
       unsigned nparms() const { return parms_.count(); }
 
@@ -193,7 +199,7 @@ class PCallTask  : public Statement {
       NetProc* elaborate_sys(Design*des, NetScope*scope) const;
       NetProc* elaborate_usr(Design*des, NetScope*scope) const;
 
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr*> parms_;
 };
 
@@ -210,6 +216,7 @@ class PCase  : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -245,6 +252,7 @@ class PCondit  : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -279,6 +287,7 @@ class PDelayStatement  : public Statement {
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
 
     private:
       PExpr*delay_;
@@ -287,19 +296,19 @@ class PDelayStatement  : public Statement {
 
 
 /*
- * This represends the parsing of a disable <scope> statement.
+ * This represents the parsing of a disable <scope> statement.
  */
 class PDisable  : public Statement {
 
     public:
-      explicit PDisable(const hname_t&sc);
+      explicit PDisable(const pform_name_t&sc);
       ~PDisable();
 
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
 
     private:
-      hname_t scope_;
+      pform_name_t scope_;
 };
 
 /*
@@ -326,11 +335,14 @@ class PEventStatement  : public Statement {
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
 
 	// This method is used to elaborate, but attach a previously
 	// elaborated statement to the event.
       NetProc* elaborate_st(Design*des, NetScope*scope, NetProc*st) const;
 
+      NetProc* elaborate_wait(Design*des, NetScope*scope, NetProc*st) const;
+
     private:
       svector<PEEvent*>expr_;
       Statement*statement_;
@@ -342,7 +354,7 @@ class PForce  : public Statement {
       explicit PForce(PExpr*l, PExpr*r);
       ~PForce();
 
-      virtual NetProc* elaborate(Design*des, NetScope*scope) const;
+      virtual NetForce* elaborate(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -357,6 +369,7 @@ class PForever : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -372,6 +385,7 @@ class PForStatement  : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -390,6 +404,7 @@ class PNoop  : public Statement {
 
     public:
       PNoop() { }
+      ~PNoop() { }
 };
 
 class PRepeat : public Statement {
@@ -399,6 +414,7 @@ class PRepeat : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -426,14 +442,14 @@ class PRelease  : public Statement {
 class PTrigger  : public Statement {
 
     public:
-      explicit PTrigger(const hname_t&ev);
+      explicit PTrigger(const pform_name_t&ev);
       ~PTrigger();
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
-      hname_t event_;
+      pform_name_t event_;
 };
 
 class PWhile  : public Statement {
@@ -444,6 +460,7 @@ class PWhile  : public Statement {
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
+      virtual void elaborate_sig(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -451,63 +468,4 @@ class PWhile  : public Statement {
       Statement*statement_;
 };
 
-/*
- * $Log: Statement.h,v $
- * Revision 1.35  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.34  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.33  2002/04/21 22:31:02  steve
- *  Redo handling of assignment internal delays.
- *  Leave it possible for them to be calculated
- *  at run time.
- *
- * Revision 1.32  2002/04/21 04:59:07  steve
- *  Add support for conbinational events by finding
- *  the inputs to expressions and some statements.
- *  Get case and assignment statements working.
- *
- * Revision 1.31  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.30  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.29  2000/09/09 15:21:26  steve
- *  move lval elaboration to PExpr virtual methods.
- *
- * Revision 1.28  2000/09/03 17:58:35  steve
- *  Change elaborate_lval to return NetAssign_ objects.
- *
- * Revision 1.27  2000/07/26 05:08:07  steve
- *  Parse disable statements to pform.
- *
- * Revision 1.26  2000/05/11 23:37:26  steve
- *  Add support for procedural continuous assignment.
- *
- * Revision 1.25  2000/04/22 04:20:19  steve
- *  Add support for force assignment.
- *
- * Revision 1.24  2000/04/12 04:23:57  steve
- *  Named events really should be expressed with PEIdent
- *  objects in the pform,
- *
- *  Handle named events within the mix of net events
- *  and edges. As a unified lot they get caught together.
- *  wait statements are broken into more complex statements
- *  that include a conditional.
- *
- *  Do not generate NetPEvent or NetNEvent objects in
- *  elaboration. NetEvent, NetEvWait and NetEvProbe
- *  take over those functions in the netlist.
- */
 #endif

StringHeap.cc

@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2002-2004 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: StringHeap.cc,v 1.6 2004/02/18 17:11:54 steve Exp $"
+#endif
+
+# include  "StringHeap.h"
+#ifdef HAVE_MALLOC_H
+# include  <malloc.h>
+#endif
+# include  <stdlib.h>
+# include  <string.h>
+# include  <assert.h>
+
+StringHeap::StringHeap()
+{
+      cell_base_ = 0;
+      cell_ptr_ = HEAPCELL;
+      cell_count_ = 0;
+}
+
+StringHeap::~StringHeap()
+{
+	// This is a planned memory leak. The string heap is intended
+	// to hold permanently-allocated strings.
+}
+
+const char* StringHeap::add(const char*text)
+{
+      unsigned len = strlen(text);
+      assert((len+1) <= HEAPCELL);
+
+      unsigned rem = HEAPCELL - cell_ptr_;
+      if (rem < (len+1)) {
+	    cell_base_ = (char*)malloc(HEAPCELL);
+	    cell_ptr_ = 0;
+	    cell_count_ += 1;
+	    assert(cell_base_ != 0);
+      }
+
+      char*res = cell_base_ + cell_ptr_;
+      memcpy(res, text, len);
+      cell_ptr_ += len;
+      cell_base_[cell_ptr_++] = 0;
+
+      assert(cell_ptr_ <= HEAPCELL);
+
+      return res;
+}
+
+perm_string StringHeap::make(const char*text)
+{
+      return perm_string(add(text));
+}
+
+
+StringHeapLex::StringHeapLex()
+{
+      hit_count_ = 0;
+      add_count_ = 0;
+
+      for (unsigned idx = 0 ;  idx < HASH_SIZE ;  idx += 1)
+	    hash_table_[idx] = 0;
+}
+
+StringHeapLex::~StringHeapLex()
+{
+}
+
+unsigned StringHeapLex::add_hit_count() const
+{
+      return hit_count_;
+}
+
+unsigned StringHeapLex::add_count() const
+{
+      return add_count_;
+}
+
+static unsigned hash_string(const char*text)
+{
+      unsigned h = 0;
+
+      while (*text) {
+	    h = (h << 4) ^ (h >> 28) ^ *text;
+	    text += 1;
+      }
+      return h;
+}
+
+const char* StringHeapLex::add(const char*text)
+{
+      unsigned hash_value = hash_string(text) % HASH_SIZE;
+
+	/* If we easily find the string in the hash table, then return
+	   that and be done. */
+      if (hash_table_[hash_value]
+	  && (strcmp(hash_table_[hash_value], text) == 0)) {
+	    hit_count_ += 1;
+	    return hash_table_[hash_value];
+      }
+
+	/* The existing hash entry is not a match. Replace it with the
+	   newly allocated value, and return the new pointer as the
+	   result to the add. */
+      const char*res = StringHeap::add(text);
+      hash_table_[hash_value] = res;
+      add_count_ += 1;
+
+      return res;
+}
+
+perm_string StringHeapLex::make(const char*text)
+{
+      return perm_string(add(text));
+}
+
+perm_string StringHeapLex::make(const string&text)
+{
+      return perm_string(add(text.c_str()));
+}
+
+bool operator == (perm_string a, const char*b)
+{
+      if (a.str() == b)
+	    return true;
+
+      if (! (a.str() && b))
+	    return false;
+
+      if (strcmp(a.str(), b) == 0)
+	    return true;
+
+      return false;
+}
+
+bool operator == (perm_string a, perm_string b)
+{
+      return a == b.str();
+}
+
+bool operator != (perm_string a, const char*b)
+{
+      return ! (a == b);
+}
+
+bool operator != (perm_string a, perm_string b)
+{
+      return ! (a == b);
+}
+
+bool operator < (perm_string a, perm_string b)
+{
+      if (b.str() && !a.str())
+	    return true;
+
+      if (b.str() == a.str())
+	    return false;
+
+      if (strcmp(a.str(), b.str()) < 0)
+	    return true;
+
+      return false;
+}
+
+/*
+ * $Log: StringHeap.cc,v $
+ * Revision 1.6  2004/02/18 17:11:54  steve
+ *  Use perm_strings for named langiage items.
+ *
+ * Revision 1.5  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.4  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.3  2003/01/16 21:44:46  steve
+ *  Keep some debugging status.
+ *
+ * Revision 1.2  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.1  2002/08/04 19:13:16  steve
+ *  dll uses StringHeap for named items.
+ *
+ */
+

StringHeap.h

@@ -0,0 +1,147 @@
+#ifndef __StringHeap_H
+#define __StringHeap_H
+/*
+ * Copyright (c) 2002-2004 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: StringHeap.h,v 1.6 2005/06/14 19:13:43 steve Exp $"
+#endif
+
+# include  "config.h"
+# include  <string>
+
+using namespace std;
+
+class perm_string {
+
+    public:
+      perm_string() : text_(0) { }
+      perm_string(const perm_string&that) : text_(that.text_) { }
+      ~perm_string() { }
+
+      perm_string& operator = (const perm_string&that)
+      { text_ = that.text_; return *this; }
+
+      const char*str() const { return text_; }
+      operator const char* () const { return str(); }
+
+	// This is an escape for making perm_string objects out of
+	// literals. For example, per_string::literal("Label"); Please
+	// do *not* cheat and pass arbitrary const char* items here.
+      static perm_string literal(const char*t) { return perm_string(t); }
+
+    private:
+      friend class StringHeap;
+      friend class StringHeapLex;
+      perm_string(const char*t) : text_(t) { };
+
+    private:
+      const char*text_;
+};
+
+extern bool operator == (perm_string a, perm_string b);
+extern bool operator == (perm_string a, const char* b);
+extern bool operator != (perm_string a, perm_string b);
+extern bool operator != (perm_string a, const char* b);
+extern bool operator >  (perm_string a, perm_string b);
+extern bool operator <  (perm_string a, perm_string b);
+extern bool operator >= (perm_string a, perm_string b);
+extern bool operator <= (perm_string a, perm_string b);
+
+/*
+ * The string heap is a way to permanently allocate strings
+ * efficiently. They only take up the space of the string characters
+ * and the terminating nul, there is no malloc overhead.
+ */
+class StringHeap {
+
+    public:
+      StringHeap();
+      ~StringHeap();
+
+      const char*add(const char*);
+      perm_string make(const char*);
+
+    private:
+      enum { HEAPCELL = 0x10000 };
+
+      char*cell_base_;
+      unsigned cell_ptr_;
+      unsigned cell_count_;
+
+    private: // not implemented
+      StringHeap(const StringHeap&);
+      StringHeap& operator= (const StringHeap&);
+};
+
+/*
+ * A lexical string heap is a string heap that makes an effort to
+ * return the same pointer for identical strings. This saves further
+ * space by not allocating duplicate strings, so in a system with lots
+ * of identifiers, this can theoretically save more space.
+ */
+class StringHeapLex  : private StringHeap {
+
+    public:
+      StringHeapLex();
+      ~StringHeapLex();
+
+      const char*add(const char*);
+      perm_string make(const char*);
+      perm_string make(const string&);
+
+      unsigned add_count() const;
+      unsigned add_hit_count() const;
+
+    private:
+      enum { HASH_SIZE = 4096 };
+      const char*hash_table_[HASH_SIZE];
+
+      unsigned add_count_;
+      unsigned hit_count_;
+
+    private: // not implemented
+      StringHeapLex(const StringHeapLex&);
+      StringHeapLex& operator= (const StringHeapLex&);
+};
+
+/*
+ * $Log: StringHeap.h,v $
+ * Revision 1.6  2005/06/14 19:13:43  steve
+ *  gcc3/4 compile errors.
+ *
+ * Revision 1.5  2004/02/18 17:11:54  steve
+ *  Use perm_strings for named langiage items.
+ *
+ * Revision 1.4  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.3  2003/01/16 21:44:46  steve
+ *  Keep some debugging status.
+ *
+ * Revision 1.2  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.1  2002/08/04 19:13:16  steve
+ *  dll uses StringHeap for named items.
+ *
+ */
+#endif

_pli_types.h.in

@@ -0,0 +1,129 @@
+#ifndef PLI_TYPES
+#define PLI_TYPES
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: _pli_types.h.in,v 1.8 2007/06/05 21:32:30 steve Exp $"
+#endif
+
+# undef HAVE_INTTYPES_H
+
+#ifdef HAVE_INTTYPES_H
+
+/*
+ * If the host environment has the stdint.h header file,
+ * then use that to size our PLI types.
+ */
+#ifndef __STDC_FORMAT_MACROS
+# define __STDC_FORMAT_MACROS
+#endif
+
+# include  <inttypes.h>
+typedef uint64_t PLI_UINT64;
+typedef int64_t  PLI_INT64;
+typedef uint32_t PLI_UINT32;
+typedef int32_t  PLI_INT32;
+
+typedef signed short   PLI_INT16;
+typedef unsigned short PLI_UINT16;
+typedef char           PLI_BYTE8;
+typedef unsigned char  PLI_UBYTE8;
+
+# define PLI_UINT64_FMT PRIu64
+
+#else
+
+/*
+ * If we do not have the c99 stdint.h header file, then use
+ * configure detection to guess the pli types ourselves.
+ */
+
+# define SIZEOF_UNSIGNED_LONG_LONG 8
+# define SIZEOF_UNSIGNED_LONG 8
+# define SIZEOF_UNSIGNED 4
+
+#if SIZEOF_UNSIGNED >= 8
+typedef unsigned PLI_UINT64;
+typedef int      PLI_INT64;
+# define PLI_UINT64_FMT "u"
+#else
+# if SIZEOF_UNSIGNED_LONG >= 8
+typedef unsigned long PLI_UINT64;
+typedef          long PLI_INT64;
+#  define PLI_UINT64_FMT "lu"
+# else
+#  if SIZEOF_UNSIGNED_LONG_LONG > SIZEOF_UNSIGNED_LONG
+typedef unsigned long long PLI_UINT64;
+typedef          long long PLI_INT64;
+#   define PLI_UINT64_FMT "llu"
+#  else
+typedef unsigned long PLI_UINT64;
+typedef          long PLI_INT64;
+#   define PLI_UINT64_FMT "lu"
+#  endif
+# endif
+#endif
+
+typedef signed int     PLI_INT32;
+typedef unsigned int   PLI_UINT32;
+typedef signed short   PLI_INT16;
+typedef unsigned short PLI_UINT16;
+typedef char           PLI_BYTE8;
+typedef unsigned char  PLI_UBYTE8;
+#endif
+
+/*
+ * $Log: _pli_types.h.in,v $
+ * Revision 1.8  2007/06/05 21:32:30  steve
+ *  More standard PLI_BYTE8.
+ *
+ * Revision 1.7  2003/11/12 02:38:44  steve
+ *  Clean up manual definitions of PLI_UINT64_FMT.
+ *
+ * Revision 1.6  2003/11/08 20:06:21  steve
+ *  Spelling fixes in comments.
+ *
+ * Revision 1.5  2003/10/29 03:28:27  steve
+ *  Add the PLU_UINT64_FMT string for formatting output.
+ *
+ * Revision 1.4  2003/10/29 03:23:12  steve
+ *  Portably handle time format of VCD prints.
+ *
+ * Revision 1.3  2003/10/02 21:30:06  steve
+ *  Use configured TIME_FMT in vcd dump printf.
+ *
+ * Revision 1.2  2003/10/02 19:33:44  steve
+ *  Put libraries in libdir64.
+ *
+ * Revision 1.1  2003/09/30 01:33:13  steve
+ *  Add PLI_UINT64 to _pli_types.h.
+ *
+ * Revision 1.2  2003/05/26 04:39:16  steve
+ *  Typo type name.
+ *
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+#endif

acc_user.h

@@ -18,8 +18,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: acc_user.h,v 1.5 2002/06/11 15:19:12 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: acc_user.h,v 1.20 2003/12/17 15:45:07 steve Exp $"
 #endif
 
 /*
@@ -31,6 +31,7 @@
  * implemented using VPI routines.
  */
 
+
 #ifdef __cplusplus
 # define EXTERN_C_START extern "C" {
 # define EXTERN_C_END }
@@ -42,16 +43,36 @@
 
 EXTERN_C_START
 
+# include  "_pli_types.h"
+
 /*
  * This is a declaration of the "handle" type that is compatible with
- * the vpiHandle from vpi_user.h.
+ * the vpiHandle from vpi_user.h. The libveriuser library implements
+ * the acc handle type as a vpiHandle, to prevent useless indirection.
  */
 typedef struct __vpiHandle *handle;
 
 /* OBJECT TYPES */
-#define accScope   21
-#define accScalar  300
-#define accVector  302
+#define accModule    20
+#define accScope     21
+#define accNet       25
+#define accReg       30
+#define accIntegerParam   200
+#define accRealParam 202
+#define accStringParam 204
+#define accParameter   220
+#define accTopModule      224
+#define accModuleInstance 226
+#define accWire        260
+#define accNamedEvent  280
+#define accIntegerVar  281
+#define accRealVar   282
+#define accTimeVar   283
+#define accIntVar    accIntegerVar
+#define accScalar    300
+#define accVector    302
+#define accUnknown   412
+#define accConstant  600
 
 /* type VALUES FOR t_setval_delay STRUCTURE */
 #define accNoDelay  0
@@ -72,11 +93,44 @@ typedef struct __vpiHandle *handle;
 #define accStringVal 8
 #define accVectorVal 9
 
+/* Scalar values */
+#define acc0 0
+#define acc1 1
+#define accX 2
+#define accZ 3
+
 /* type VALUES FOR t_acc_time STRUCTURE */
 #define accTime 1
 #define accSimTime 2
 #define accRealTime 3
 
+/* reason codes */
+#define logic_value_change     1
+#define strength_value_change  2
+#define real_value_change      3
+#define vector_value_change    4
+#define event_value_change     5
+#define integer_value_change   6
+#define time_value_change      7
+#define sregister_value_change 8
+#define vregister_value_change 9
+#define realtime_value_change 10
+
+/* VCL strength values */
+#define vclSupply  7
+#define vclStrong  6
+#define vclPull    5
+#define vclLarge   4
+#define vclWeak    3
+#define vclMedium  2
+#define vclSmall   1
+#define vclHighZ   0
+
+/* Constants used by acc_vcl_add */
+#define vcl_verilog_logic 2
+#define VCL_VERILOG_LOGIC vcl_verilog_logic
+#define vcl_verilog_strength 3
+#define VCL_VERILOG_STRENGTH vcl_verilog_strength
 
 typedef struct t_acc_time {
       int type;
@@ -105,37 +159,181 @@ typedef struct t_setval_value {
       } value;
 } s_setval_value, *p_setval_value, s_acc_value, *p_acc_value;
 
+typedef struct t_strengths {
+      PLI_UBYTE8 logic_value;
+      PLI_UBYTE8 strength1;
+      PLI_UBYTE8 strength2;
+} s_strengths, *p_strengths;
+
+typedef struct t_vc_record {
+      PLI_INT32 vc_reason;
+      PLI_INT32 vc_hightime;
+      PLI_INT32 vc_lowtime;
+      void*     user_data;
+      union {
+	    PLI_UBYTE8 logic_value;
+	    double real_value;
+	    handle vector_handle;
+	    s_strengths strengths_s;
+      } out_value;
+} s_vc_record, *p_vc_record;
+
+
+typedef struct t_location {
+      PLI_INT32 line_no;
+      const char*filename;
+} s_location, *p_location;
+
 extern int acc_error_flag;
 
 extern int acc_initialize(void);
 
 extern void acc_close(void);
 
+/*
+ * This is the acc_configure command, and the config_param
+ * codes that are accepted.
+ */
+extern int   acc_configure(PLI_INT32 config_param, const char*value);
+#define accEnableArgs          6
+#define accDevelopmentVersion 11
+
 extern int   acc_fetch_argc(void);
 extern char**acc_fetch_argv(void);
 
+extern PLI_INT32 acc_fetch_direction(handle obj);
+/* XXXX FIXME: Values returned by acc_fetch_direction */
+# define accInout 2
+
 extern char* acc_fetch_fullname(handle obj);
 
-extern int   acc_fetch_tfarg_int(int n);
-extern char* acc_fetch_tfarg_str(int n);
+extern int   acc_fetch_location(p_location loc, handle obj);
+
+extern char* acc_fetch_name(handle obj);
+extern char* acc_fetch_defname(handle obj);
+
+extern double acc_fetch_paramval(handle obj);
+
+extern double    acc_fetch_tfarg(PLI_INT32);
+extern double    acc_fetch_itfarg(PLI_INT32, handle);
+extern PLI_INT32 acc_fetch_tfarg_int(PLI_INT32);
+extern PLI_INT32 acc_fetch_itfarg_int(PLI_INT32, handle);
+extern char*     acc_fetch_tfarg_str(PLI_INT32);
+extern char*     acc_fetch_itfarg_str(PLI_INT32, handle);
+
+typedef struct t_timescale_info {
+      PLI_INT16 unit;
+      PLI_INT16 precision;
+} s_timescale_info, *p_timescale_info;
+extern void acc_fetch_timescale_info(handle obj, p_timescale_info info);
+
+extern PLI_INT32 acc_fetch_size(handle obj);
+
+extern PLI_INT32 acc_fetch_type(handle obj);
+extern PLI_INT32 acc_fetch_fulltype(handle obj);
+extern PLI_INT32 acc_fetch_range(handle object, int *msb, int *lsb);
+extern char*     acc_fetch_type_str(PLI_INT32 type);
+
+extern char* acc_fetch_value(handle obj, const char*fmt, s_acc_value*value);
+
+extern handle acc_handle_by_name(const char*name, handle scope);
+extern handle acc_handle_hiconn(handle port_ref_handle);
+extern handle acc_handle_object(const char*name);
+extern handle acc_handle_parent(handle obj);
+extern handle acc_handle_scope(handle obj);
+extern handle acc_handle_simulated_net(handle net);
 
 extern handle acc_handle_tfarg(int n);
+extern handle acc_handle_tfinst(void);
 
+extern PLI_INT32 acc_compare_handles(handle, handle);
+
+extern handle acc_next(PLI_INT32 *, handle, handle);
+extern handle acc_next_bit(handle ref, handle bit);
+extern handle acc_next_port(handle ref, handle bit);
+extern handle acc_next_scope(handle, handle);
 extern handle acc_next_topmod(handle prev_topmod);
 
-extern int acc_object_of_type(handle object, int type);
+extern int acc_object_in_typelist(handle object, PLI_INT32*typelist);
+extern int acc_object_of_type(handle object, PLI_INT32 type);
 
 extern char*acc_product_version(void);
 
+extern char*acc_set_scope(handle ref, ...);
+
 extern int acc_set_value(handle obj, p_setval_value value,
 			 p_setval_delay delay);
 
+extern void acc_vcl_add(handle obj, PLI_INT32(*consumer)(p_vc_record),
+			void*data, PLI_INT32 vcl_flag);
+extern  void acc_vcl_delete(handle obj, PLI_INT32(*consumer)(p_vc_record),
+			    void*data, PLI_INT32 vcl_flag);
+
 extern char* acc_version(void);
 
 EXTERN_C_END
 
 /*
  * $Log: acc_user.h,v $
+ * Revision 1.20  2003/12/17 15:45:07  steve
+ *  Add acc_set_scope function.
+ *
+ * Revision 1.19  2003/10/10 02:57:45  steve
+ *  Some PLI1 stubs.
+ *
+ * Revision 1.18  2003/06/13 19:23:41  steve
+ *  Add a bunch more PLI1 routines.
+ *
+ * Revision 1.17  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.16  2003/05/30 04:18:31  steve
+ *  Add acc_next function.
+ *
+ * Revision 1.15  2003/05/29 02:35:41  steve
+ *  acc_fetch_type supports module.
+ *
+ * Revision 1.14  2003/05/29 02:21:45  steve
+ *  Implement acc_fetch_defname and its infrastructure in vvp.
+ *
+ * Revision 1.13  2003/05/24 03:02:04  steve
+ *  Add implementation of acc_handle_by_name.
+ *
+ * Revision 1.12  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.11  2003/04/24 18:57:05  steve
+ *  Add acc_fetch_fulltype function.
+ *
+ * Revision 1.10  2003/04/20 02:48:39  steve
+ *  Support value change callbacks.
+ *
+ * Revision 1.9  2003/04/12 18:57:13  steve
+ *  More acc_ function stubs.
+ *
+ * Revision 1.8  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ * Revision 1.7  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ * Revision 1.6  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.5  2002/06/11 15:19:12  steve
  *  Add acc_fetch_argc/argv/version (mruff)
  *

aclocal.m4

@@ -0,0 +1,207 @@
+# AX_CPP_IDENT
+# ------------
+# Check if the C compiler supports #ident
+# Define and substitute ident_support if so.
+#
+# It would be simpler and more consistent with the rest of the autoconf
+# structure to AC_DEFINE(HAVE_CPP_IDENT) instead of
+# ident_support='-DHAVE_CVS_IDENT=1' and AC_SUBST(ident_support), but that
+# change would require all C files in the icarus top level directory to
+# put #include <config.h> before the #ifdef HAVE_CVS_IDENT (and change
+# HAVE_CVS_IDENT to HAVE_CPP_IDENT).   That would also remove all special
+# ident_support handling from the Makefile.  Manyana.
+#
+AC_DEFUN([AX_CPP_IDENT],
+[AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
+[AC_TRY_COMPILE([
+#ident "$Id: aclocal.m4,v 1.7 2007/05/16 23:59:12 steve Exp $"
+],[while (0) {}],
+[AS_VAR_SET(ax_cv_cpp_ident, yes)],
+[AS_VAR_SET(ax_cv_cpp_ident, no)])])
+if test $ax_cv_cpp_ident = yes; then
+  ident_support='-DHAVE_CVS_IDENT=1'
+fi
+AC_SUBST(ident_support)
+])# AC_CPP_IDENT
+
+
+# _AX_C_UNDERSCORES_MATCH_IFELSE(PATTERN, ACTION-IF-MATCH, ACTION-IF-NOMATCH)
+# ------------------------------
+# Sub-macro for AX_C_UNDERSCORES_LEADING and AX_C_UNDERSCORES_TRAILING.
+# Unwarranted assumptions:
+#   - the object file produced by AC_COMPILE_IFELSE is called "conftest.$ac_objext"
+#   - the nm(1) utility is available, and its name is "nm".
+AC_DEFUN([_AX_C_UNDERSCORES_MATCH_IF],
+[AC_COMPILE_IFELSE([void underscore(void){}],
+[AS_IF([nm conftest.$ac_objext|grep $1 >/dev/null 2>/dev/null],[$2],[$3])],
+[AC_MSG_ERROR([underscore test crashed])]
+)])
+
+
+# AX_C_UNDERSCORES_LEADING
+# ---------------------------------
+# Check if symbol names in object files produced by C compiler have
+# leading underscores. Define NEED_LU if so.
+AC_DEFUN([AX_C_UNDERSCORES_LEADING],
+[AC_CACHE_CHECK([for leading underscores], ax_cv_c_underscores_leading,
+[_AX_C_UNDERSCORES_MATCH_IF([_underscore],
+[AS_VAR_SET(ax_cv_c_underscores_leading, yes)],
+[AS_VAR_SET(ax_cv_c_underscores_leading, no)])])
+if test $ax_cv_c_underscores_leading = yes -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
+ AC_DEFINE([NEED_LU], [1], [Symbol names in object files produced by C compiler have leading underscores.])
+fi
+])# AX_C_UNDERSCORES_LEADING
+
+
+# AX_C_UNDERSCORES_TRAILING
+# ---------------------------------
+# Check if symbol names in object files produced by C compiler have
+# trailing underscores.  Define NEED_TU if so.
+AC_DEFUN([AX_C_UNDERSCORES_TRAILING],
+[AC_CACHE_CHECK([for trailing underscores], ax_cv_c_underscores_trailing,
+[_AX_C_UNDERSCORES_MATCH_IF([underscore_],
+[AS_VAR_SET(ax_cv_c_underscores_trailing, yes)],
+[AS_VAR_SET(ax_cv_c_underscores_trailing, no)])])
+if test $ax_cv_c_underscores_trailing = yes; then
+ AC_DEFINE([NEED_TU], [1], [Symbol names in object files produced by C compiler have trailing underscores.])
+fi
+])# AX_C_UNDERSCORES_TRAILING
+
+# AX_WIN32
+# --------
+# Combined check for several flavors of Microsoft Windows so
+# their "issues" can be dealt with
+AC_DEFUN([AX_WIN32],
+[AC_CYGWIN
+AC_MINGW32
+WIN32=no
+AC_MSG_CHECKING([for Microsoft Windows])
+if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
+then
+    WIN32=yes
+fi
+AC_SUBST(MINGW32)
+AC_SUBST(WIN32)
+AC_MSG_RESULT($WIN32)
+])# AX_WIN32
+
+# AX_LD_EXTRALIBS
+# ---------------
+# mingw needs to link with libiberty.a, but cygwin alone can't tolerate it
+AC_DEFUN([AX_LD_EXTRALIBS],
+[AC_MSG_CHECKING([for extra libs needed])
+EXTRALIBS=
+case "${host}" in
+     *-*-cygwin* )
+        if test "$MINGW32" = "yes"; then
+            EXTRALIBS="-liberty"
+        fi
+        ;;
+esac
+AC_SUBST(EXTRALIBS)
+AC_MSG_RESULT($EXTRALIBS)
+])# AX_LD_EXTRALIBS
+
+# AX_LD_SHAREDLIB_OPTS
+# --------------------
+# linker options when building a shared library
+AC_DEFUN([AX_LD_SHAREDLIB_OPTS],
+[AC_MSG_CHECKING([for shared library link flag])
+shared=-shared
+case "${host}" in
+     *-*-cygwin*)
+        shared="-shared -Wl,--enable-auto-image-base"
+        ;;
+
+     *-*-hpux*)
+        shared="-b"
+        ;;
+
+     *-*-darwin1.[0123])
+        shared="-bundle -undefined suppress"
+        ;;
+
+     *-*-darwin*)
+        shared="-bundle -undefined suppress -flat_namespace"
+        ;;
+esac
+AC_SUBST(shared)
+AC_MSG_RESULT($shared)
+])# AX_LD_SHAREDLIB_OPTS
+
+# AX_C_PICFLAG
+# ------------
+# The -fPIC flag is used to tell the compiler to make position
+# independent code. It is needed when making shared objects.
+AC_DEFUN([AX_C_PICFLAG],
+[AC_MSG_CHECKING([for flag to make position independent code])
+PICFLAG=-fPIC
+case "${host}" in
+
+     *-*-cygwin*)
+        PICFLAG=
+        ;;
+
+     *-*-hpux*)
+        PICFLAG=+z
+        ;;
+
+esac
+AC_SUBST(PICFLAG)
+AC_MSG_RESULT($PICFLAG)
+])# AX_C_PICFLAG
+
+# AX_LD_RDYNAMIC
+# --------------
+# The -rdynamic flag is used by iverilog when compiling the target,
+# to know how to export symbols of the main program to loadable modules
+# that are brought in by -ldl
+AC_DEFUN([AX_LD_RDYNAMIC],
+[AC_MSG_CHECKING([for -rdynamic compiler flag])
+rdynamic=-rdynamic
+case "${host}" in
+
+    *-*-netbsd*)
+        rdynamic="-Wl,--export-dynamic"
+        ;;
+
+    *-*-openbsd*)
+        rdynamic="-Wl,--export-dynamic"
+        ;;
+
+    *-*-solaris*)
+        rdynamic=""
+        ;;
+
+    *-*-cygwin*)
+        rdynamic=""
+        ;;
+
+    *-*-hpux*)
+        rdynamic="-E"
+        ;;
+
+    *-*-darwin*)
+        rdynamic="-Wl,-all_load"
+        strip_dynamic="-SX"
+        ;;
+
+esac
+AC_SUBST(rdynamic)
+AC_MSG_RESULT($rdynamic)
+AC_SUBST(strip_dynamic)
+# since we didn't tell them we're "checking", no good place to tell the answer
+# AC_MSG_RESULT($strip_dynamic)
+])# AX_LD_RDYNAMIC
+
+# AX_CPP_PRECOMP
+# --------------
+AC_DEFUN([AX_CPP_PRECOMP],
+[# Darwin requires -no-cpp-precomp
+case "${host}" in
+    *-*-darwin*)
+        CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
+        CFLAGS="-no-cpp-precomp $CFLAGS"
+        ;;
+esac
+])# AX_CPP_PRECOMP

async.cc

@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2002 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: async.cc,v 1.7 2004/01/18 23:26:54 steve Exp $"
+#endif
+
+# include "config.h"
+
+# include  "functor.h"
+# include  "netlist.h"
+# include  <assert.h>
+
+bool NetAssign::is_asynchronous()
+{
+      return true;
+}
+
+bool NetCondit::is_asynchronous()
+{
+      return false;
+}
+
+/*
+ * NetEvWait statements come from statements of the form @(...) in the
+ * Verilog source. These event waits are considered asynchronous if
+ * all of the events in the list are ANYEDGE, and all the inputs to
+ * the statement are included in the sensitivity list. If any of the
+ * events are posedge or negedge, the statement is synchronous
+ * (i.e. an edge-triggered flip-flop) and if any of the inputs are
+ * unaccounted for in the sensitivity list then the statement is a
+ * latch.
+ */
+bool NetEvWait::is_asynchronous()
+{
+	/* The "sense" set contains the set of Nexa that are in the
+	   sensitivity list. We also require that the events are all
+	   level sensitive, but the nex_async_ method takes care of
+	   that test. */
+      NexusSet*sense = new NexusSet;
+      for (unsigned idx = 0 ;  idx < nevents_ ;  idx += 1) {
+	    NexusSet*tmp = event(idx)->nex_async_();
+	    if (tmp == 0) {
+		  delete sense;
+		  return false;
+	    }
+
+	    sense->add(*tmp);
+	    delete tmp;
+      }
+
+      NexusSet*inputs = statement_->nex_input();
+
+      if (! sense->contains(*inputs)) {
+	    delete sense;
+	    delete inputs;
+	    return false;
+      }
+
+      delete sense;
+      delete inputs;
+
+	/* If it passes all the other tests, then this statement is
+	   asynchronous. */
+      return true;
+}
+
+bool NetProc::is_asynchronous()
+{
+      return false;
+}
+
+bool NetProcTop::is_asynchronous()
+{
+      if (type_ == NetProcTop::KINITIAL)
+	    return false;
+
+      return statement_->is_asynchronous();
+}
+
+/*
+ * $Log: async.cc,v $
+ * Revision 1.7  2004/01/18 23:26:54  steve
+ *  The is_combinational function really need not recurse.
+ *
+ * Revision 1.6  2003/12/20 00:33:39  steve
+ *  More thorough check that NetEvWait is asynchronous.
+ *
+ * Revision 1.5  2003/09/04 20:28:05  steve
+ *  Support time0 resolution of combinational threads.
+ *
+ * Revision 1.4  2002/08/18 22:07:16  steve
+ *  Detect temporaries in sequential block synthesis.
+ *
+ * Revision 1.3  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.2  2002/07/04 00:24:16  steve
+ *  initial statements are not asynchronous.
+ *
+ * Revision 1.1  2002/06/30 02:21:31  steve
+ *  Add structure for asynchronous logic synthesis.
+ *
+ */
+

attributes.txt

@@ -0,0 +1,85 @@
+
+ATTRIBUTE NAMING CONVENTIONS
+
+Attributes that are specific to Icarus Verilog, and are intended to be
+of use to programmers, start with the prefix "ivl_".
+
+Attributes with the "_ivl_" prefix are set aside for internal
+use. They may be generated internally by the compiler. They need not
+be documented here.
+
+ATTRIBUTES TO CONTROL SYNTHESIS
+
+The following is a summary of Verilog attributes that Icarus Verilog
+understands within Verilog source files to control synthesis
+behavior. This section documents generic synthesis attributes. For
+target specific attributes, see target specific documentation.
+
+These attributes only effect the behavior of the synthesizer. For
+example, the ivl_combinational will not generate an error message
+if the Verilog is being compiled for simulation. (It may generate a
+warning.)
+
+
+* Attributes for "always" and "initial" statements
+
+(* ivl_combinational *)
+
+    This attribute tells the compiler that the statement models
+    combinational logic. If the compiler finds that it cannot make
+    combinational logic out of a marked always statement, it will
+    report an error.
+
+    This attribute can be used to prevent accidentally inferring
+    latches or flip-flops where the user intended combinational
+    logic.
+
+(* ivl_synthesis_on *)
+
+    This attribute tells the compiler that the marked always statement
+    is synthesizable. The compiler will attempt to synthesize the
+    code in the marked "always" statement. If it cannot in any way
+    synthesize it, then it will report an error.
+
+(* ivl_synthesis_off *)
+
+    If this value is attached to an "always" statement, then the
+    compiler will *not* synthesize the "always" statement. This can be
+    used, for example, to mark embedded test bench code.
+
+
+* Attributes for modules
+
+(* ivl_synthesis_cell *)
+
+    If this value is attached to a module during synthesis, that
+    module will be considered a target architecture primitive, and
+    its interior will not be synthesized further.  The module can
+    therefore hold a model for simulation purposes.
+
+
+* Attributes for signals (wire/reg/integer/tri/etc.)
+
+(* PAD = "<pad assignment list>" *)
+
+    If this attribute is attached to a signal that happens to be a
+    root module port, then targets that support it will use the string
+    value as a list of pin assignments for the port/signal. The format
+    is a comma separated list of location tokens, with the format of
+    the token itself defined by the back-end tools in use.
+
+* Other Attributes
+
+[ none defined yet ]
+
+
+MISC
+
+(* _ivl_schedule_push *)
+
+    If this attribute is attached to a thread object (always or
+    initial statement) then the vvp code generator will generate code
+    that causes the scheduler to push this thread at compile time. The
+    compiler may internally add this attribute to always statements if
+    it detects that it is combinational. This helps resolve time-0
+    races.

autoconf.sh

@@ -7,12 +7,12 @@
 # to just run this script to autoconf wherever needed.
 #
 echo "Autoconf in root..."
-autoconf
+autoconf -f
 
-for dir in vpip vvp tgt-vvp tgt-fpga libveriuser
+for dir in vpip vpi vvp tgt-vvp tgt-fpga tgt-stub libveriuser cadpli
 do
     echo "Autoconf in $dir..."
-    ( cd $dir ; autoconf )
+    ( cd ./$dir ; autoconf -f --include=.. )
 done
 
 echo "Precompiling lexor_keyword.gperf"

cadpli/.cvsignore

@@ -0,0 +1,7 @@
+Makefile
+cadpli.vpl
+dep
+configure
+config.log
+config.status
+autom4te.cache

cadpli/Makefile.in

@@ -0,0 +1,92 @@
+#
+#    This source code is free software; you can redistribute it
+#    and/or modify it in source code form under the terms of the GNU
+#    Library General Public License as published by the Free Software
+#    Foundation; either version 2 of the License, or (at your option)
+#    any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU Library General Public License for more details.
+#
+#    You should have received a copy of the GNU Library General Public
+#    License along with this program; if not, write to the Free
+#    Software Foundation, Inc.,
+#    59 Temple Place - Suite 330
+#    Boston, MA 02111-1307, USA
+#
+#ident "$Id: Makefile.in,v 1.13 2007/02/06 05:07:31 steve Exp $"
+#
+#
+SHELL = /bin/sh
+
+VERSION = 0.0
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+srcdir = @srcdir@
+
+VPATH = $(srcdir)
+
+bindir = @bindir@
+libdir = @libdir@
+includedir = $(prefix)/include
+
+vpidir = @libdir@/ivl
+
+CC = @CC@
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
+CFLAGS = -Wall @CFLAGS@
+LDFLAGS = @LDFLAGS@
+
+SHARED = @shared@
+
+all:
+
+all: dep cadpli.vpl $(ALL32)
+
+# No specific check operations.
+check: all
+
+dep:
+	mkdir dep
+
+%.o: %.c
+	$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c $<
+	mv $*.d dep
+
+O = cadpli.o
+
+SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
+ifeq (@MING32@,yes)
+    SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
+endif
+
+cadpli.vpl: $O ../vvp/libvpi.a ../libveriuser/libveriuser.o
+	$(CC) @shared@ -o $@ $O ../libveriuser/libveriuser.o $(SYSTEM_VPI_LDFLAGS)
+
+clean:
+	rm -rf *.o dep cadpli.vpl bin32
+
+distclean: clean
+	rm -f Makefile config.status config.log config.cache
+
+install: all installdirs $(vpidir)/cadpli.vpl $(INSTALL32)
+
+$(vpidir)/cadpli.vpl: ./cadpli.vpl
+	$(INSTALL_PROGRAM) ./cadpli.vpl $(vpidir)/cadpli.vpl
+
+installdirs: ../mkinstalldirs
+	$(srcdir)/../mkinstalldirs $(vpidir)
+
+uninstall: $(UNINSTALL32)
+	rm -f $(vpidir)/cadpli.vpl
+
+uninstall32:
+
+-include $(patsubst %.o, dep/%.d, $O)

cadpli/cadpli.c

@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: cadpli.c,v 1.7 2004/09/10 00:15:45 steve Exp $"
+#endif
+
+# include  <vpi_user.h>
+# include  <veriuser.h>
+# include  <stdlib.h>
+#ifdef HAVE_MALLOC_H
+# include  <malloc.h>
+#endif
+# include  <string.h>
+# include  <assert.h>
+# include  "ivl_dlfcn.h"
+
+typedef void* (*funcvp)(void);
+
+static void thunker_register(void)
+{
+      struct t_vpi_vlog_info vlog_info;
+      void*mod;
+      void*boot;
+      struct t_tfcell*tf;
+      int idx;
+
+      vpi_get_vlog_info(&vlog_info);
+
+      for (idx = 0 ;  idx < vlog_info.argc ;  idx += 1) {
+	    char*module, *cp, *bp;
+	    if (strncmp("-cadpli=", vlog_info.argv[idx], 8) != 0)
+		  continue;
+
+	    cp = vlog_info.argv[idx] + 8;
+	    assert(cp);
+
+	    bp = strchr(cp, ':');
+	    assert(bp);
+
+	    module = malloc(bp-cp+1);
+	    strncpy(module, cp, bp-cp);
+	    module[bp-cp] = 0;
+
+	    mod = ivl_dlopen(module);
+	    if (mod == 0) {
+		  vpi_printf("%s link: %s\n", vlog_info.argv[idx], dlerror());
+		  free(module);
+		  continue;
+	    }
+
+	    bp += 1;
+	    boot = ivl_dlsym(mod, bp);
+	    if (boot == 0) {
+		  vpi_printf("%s: Symbol %s not found.\n",
+			     vlog_info.argv[idx], bp);
+		  free(module);
+		  continue;
+	    }
+
+	    free(module);
+	    assert(boot);
+
+	    tf = (*((funcvp)boot))();
+	    assert(tf);
+
+	    veriusertfs_register_table(tf);
+      }
+}
+
+void (*vlog_startup_routines[])() = {
+      thunker_register,
+      0
+};
+
+
+/*
+ * $Log: cadpli.c,v $
+ * Revision 1.7  2004/09/10 00:15:45  steve
+ *  Remove bad casts.
+ *
+ * Revision 1.6  2004/09/05 21:19:51  steve
+ *  Better type safety.
+ *
+ * Revision 1.5  2003/08/26 16:26:02  steve
+ *  ifdef idents correctly.
+ *
+ * Revision 1.4  2003/04/30 01:28:06  steve
+ *  Remove veriusertfs stuf.
+ *
+ * Revision 1.3  2003/02/22 04:04:38  steve
+ *  Only include malloc.h if it is present.
+ *
+ * Revision 1.2  2003/02/17 00:01:25  steve
+ *  Use a variant of ivl_dlfcn to do dynamic loading
+ *  from within the cadpli module.
+ *
+ *  Change the +cadpli flag to -cadpli, to keep the
+ *  plusargs namespace clear.
+ *
+ * Revision 1.1  2003/02/16 02:23:54  steve
+ *  Add the cadpli interface module.
+ *
+ */
+

cadpli/cadpli.txt

@@ -0,0 +1,48 @@
+
+CADENCE PLI1 MODULES
+
+   Copyright 2003 Stephen Williams
+   $Id: cadpli.txt,v 1.2 2003/02/17 00:01:25 steve Exp $
+
+With the cadpli module, Icarus Verilog is able to load PLI1
+applications that were compiled and linked to be dynamic loaded by
+Verilog-XL or NC-Verilog. This allows Icarus Verilog users to run
+third-party modules that were compiled to interface with XL or
+NC. Obviously, this only works on the operating system that the PLI
+application was compiled to run on. For example, a Linux module can
+only be loaded and run under Linux.
+
+Icarus Verilog uses an interface module, the "cadpli" module, to
+connect the worlds. This module is installed with Icarus Verilog, and
+is invoked by the usual -m flag to iverilog or vvp. This module in
+turn scans the extended arguments, looking for +cadpli= arguments. The
+latter specify the share object and bootstrap function for running the
+module. For example, to run the module product.so, that has the
+bootstrap function "my_boot":
+
+    vvp -mcadpli a.out -cadpli=./product.so:my_boot
+
+The "-mcadpli" argument causes vvp to load the cadpli.vpl library
+module. This activates the -cadpli= argument interpreter. The
+-cadpli=<module>:<boot_func> argument, then, causes vvp, through the
+cadpli module, to load the loadable PLI application, invoke the
+my_boot function to get a veriusertfs table, and scan that table to
+register the system tasks and functions exported by that object. The
+format of the -cadpli= extended argument is essentially the same as
+the +loadpli1= argument to Verilog-XL.
+
+The integration from this point is seamless. The PLI application
+hardly knows that it is being invoked by Icarus Verilog instead of
+Verilog-XL, so operates as it would otherwise.
+
+$Log: cadpli.txt,v $
+Revision 1.2  2003/02/17 00:01:25  steve
+ Use a variant of ivl_dlfcn to do dynamic loading
+ from within the cadpli module.
+
+ Change the +cadpli flag to -cadpli, to keep the
+ plusargs namespace clear.
+
+Revision 1.1  2003/02/16 02:44:47  steve
+ Add the cadpli HOWTO.
+

cadpli/configure.in

@@ -0,0 +1,61 @@
+AC_INIT(Makefile.in)
+
+AC_PROG_CC
+AC_PROG_CXX
+AC_CHECK_TOOL(STRIP, strip, true)
+
+AC_EXEEXT
+AC_SUBST(EXEEXT)
+
+# Combined check for Microsoft-related bogosities; sets WIN32 if found
+AX_WIN32
+
+AC_PROG_INSTALL
+
+AC_CHECK_HEADERS(malloc.h)
+
+AC_CHECK_SIZEOF(unsigned long long)
+AC_CHECK_SIZEOF(unsigned long)
+AC_CHECK_SIZEOF(unsigned)
+
+# --
+# Look for a dl library to use. First look for the standard dlopen
+# functions, and failing that look for the HP specific shl_load function.
+
+AC_CHECK_HEADERS(dlfcn.h dl.h, break)
+
+DLLIB=''
+AC_CHECK_LIB(dl,dlopen,[DLLIB=-ldl])
+if test -z "$DLLIB" ; then
+AC_CHECK_LIB(dld,shl_load,[DLLIB=-ldld])
+fi
+AC_SUBST(DLLIB)
+
+AX_CPP_PRECOMP
+
+# Compiler option for position independent code, needed when making shared objects.
+AX_C_PICFLAG
+
+# Linker option used when compiling the target
+AX_LD_RDYNAMIC
+
+# linker options when building a shared library
+AX_LD_SHAREDLIB_OPTS
+
+AX_LD_EXTRALIBS
+
+#######################
+## test for underscores. The vpi module loader in vvm needs to know this
+## in order to know the name of the start symbol for the .vpi module.
+#######################
+
+AX_C_UNDERSCORES_LEADING
+AX_C_UNDERSCORES_TRAILING
+
+#######################
+## end of test for underscores
+#######################
+
+AX_CPP_IDENT
+
+AC_OUTPUT(Makefile)

cadpli/ivl_dlfcn.h

@@ -18,8 +18,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: ivl_dlfcn.h,v 1.4 2002/01/23 04:54:38 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: ivl_dlfcn.h,v 1.3 2004/10/04 01:10:56 steve Exp $"
 #endif
 
 #if defined(__MINGW32__)
@@ -35,63 +35,79 @@ typedef shl_t ivl_dll_t;
 #endif
 
 #if defined(__MINGW32__)
-inline ivl_dll_t ivl_dlopen(const char *name)
+static inline ivl_dll_t ivl_dlopen(const char *name)
 { return (void *)LoadLibrary(name); }
 
-inline void *ivl_dlsym(ivl_dll_t dll, const char *nm)
+static inline void *ivl_dlsym(ivl_dll_t dll, const char *nm)
 { return (void *)GetProcAddress((HINSTANCE)dll,nm);}
 
-inline void ivl_dlclose(ivl_dll_t dll)
+static inline void ivl_dlclose(ivl_dll_t dll)
 { (void)FreeLibrary((HINSTANCE)dll);}
 
-inline const char *dlerror(void)
-{ static char s[30]; sprintf(s,"DLError:%ld", GetLastError()); return s;}
+static inline const char *dlerror(void)
+{
+  static char msg[256];
+  unsigned long err = GetLastError();
+  FormatMessage(
+		FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS,
+		NULL,
+		err,
+		MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language
+		(LPTSTR) &msg,
+		sizeof(msg) - 1,
+		NULL
+		);
+  return msg;
+}
 
 #elif defined(HAVE_DLFCN_H)
-inline ivl_dll_t ivl_dlopen(const char*name)
+static inline ivl_dll_t ivl_dlopen(const char*name)
 { return dlopen(name,RTLD_LAZY); }
 
-inline void* ivl_dlsym(ivl_dll_t dll, const char*nm)
-{ return dlsym(dll, nm); }
+static inline void* ivl_dlsym(ivl_dll_t dll, const char*nm)
+{
+      void*sym = dlsym(dll, nm);
+	/* Not found? try without the leading _ */
+      if (sym == 0 && nm[0] == '_')
+	    sym = dlsym(dll, nm+1);
+      return sym;
+}
 
-inline void ivl_dlclose(ivl_dll_t dll)
+static inline void ivl_dlclose(ivl_dll_t dll)
 { dlclose(dll); }
 
 #elif defined(HAVE_DL_H)
-inline ivl_dll_t ivl_dlopen(const char*name)
+static inline ivl_dll_t ivl_dlopen(const char*name)
 { return shl_load(name, BIND_IMMEDIATE, 0); }
 
-inline void* ivl_dlsym(ivl_dll_t dll, const char*nm)
+static inline void* ivl_dlsym(ivl_dll_t dll, const char*nm)
 {
       void*sym;
       int rc = shl_findsym(&dll, nm, TYPE_PROCEDURE, &sym);
       return (rc == 0) ? sym : 0;
 }
 
-inline void ivl_dlclose(ivl_dll_t dll)
+static inline void ivl_dlclose(ivl_dll_t dll)
 { shl_unload(dll); }
 
-inline const char*dlerror(void)
+static inline const char*dlerror(void)
 { return strerror( errno ); }
 #endif
 
 /*
  * $Log: ivl_dlfcn.h,v $
- * Revision 1.4  2002/01/23 04:54:38  steve
- *  Load modules with RTLD_LAZY
+ * Revision 1.3  2004/10/04 01:10:56  steve
+ *  Clean up spurious trailing white space.
  *
- * Revision 1.3  2001/05/22 02:14:47  steve
- *  Update the mingw build to not require cygwin files.
+ * Revision 1.2  2003/12/12 05:43:08  steve
+ *  Some systems dlsym requires leading _ or not on whim.
  *
- * Revision 1.2  2001/05/20 15:09:40  steve
- *  Mingw32 support (Venkat Iyer)
+ * Revision 1.1  2003/02/17 00:01:25  steve
+ *  Use a variant of ivl_dlfcn to do dynamic loading
+ *  from within the cadpli module.
  *
- * Revision 1.1  2001/03/16 01:44:34  steve
- *  Add structures for VPI support, and all the %vpi_call
- *  instruction. Get linking of VPI modules to work.
- *
- * Revision 1.1  2001/01/14 17:12:59  steve
- *  possible HP/UX portability support.
+ *  Change the +cadpli flag to -cadpli, to keep the
+ *  plusargs namespace clear.
  *
  */
 #endif

check.conf

@@ -1,9 +1,4 @@
-
-# The make check target uses this to check the compilation of the
-# compiler.
-
-[-tvvm-check]
-<ivl>./ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=vpi %f %m -o%o.cc -- -
-
-[-tvvp-check]
-<ivl>./ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=./tgt-vvp/vvp.tgt -Fcprop -Fnodangle -fVPI_MODULE_PATH=vpi %f %m -o%o -- -
+functor:cprop
+functor:nodangle
+-t:dll
+flag:DLL=tgt-vvp/vvp.tgt

compiler.h

@@ -1,7 +1,7 @@
 #ifndef __compiler_H
 #define __compiler_H
 /*
- * Copyright (c) 1999-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -18,22 +18,23 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: compiler.h,v 1.12 2002/05/28 20:40:37 steve Exp $"
-#endif
 
 # include  <list>
+# include  <map>
+# include  "netlist.h"
+# include  "StringHeap.h"
 
 /*
  * This defines constants and defaults for the compiler in general.
  */
 
 
-/* The INTEGER_WIDTH is the default width of integer variables, and
-   the presumed width of unsigned literal numbers. */
-#ifndef INTEGER_WIDTH
-# define INTEGER_WIDTH 32
-#endif
+/*
+ * The integer_width is the width of integer variables. This is also
+ * the minimum width of unsized integers when they are found in
+ * self-determined contexts.
+ */
+extern unsigned integer_width;
 
 /* The TIME_WIDTH is the width of time variables. */
 #ifndef TIME_WIDTH
@@ -61,59 +62,124 @@
 
 /*
  * These are flags to enable various sorts of warnings. By default all
- * the warnings are of, the -W<list> parameter arranges for each to be
- * enabled. 
+ * the warnings are off, the -W<list> parameter arranges for each to be
+ * enabled.
  */
 
 /* Implicit definitions of wires. */
 extern bool warn_implicit;
 extern bool error_implicit;
 
-/* inherit timescales accross files. */
+/* inherit timescales across files. */
 extern bool warn_timescale;
 
+/* Warn about legal but questionable module port bindings. */
+extern bool warn_portbinding;
+
+/* Warn about structures that may have infinite loops. */
+extern bool warn_inf_loop;
+
 /* This is true if verbose output is requested. */
 extern bool verbose_flag;
 
-/* This is an ordered list of library suffixxes to search. */
+extern bool debug_scopes;
+extern bool debug_eval_tree;
+extern bool debug_elaborate;
+extern bool debug_synth2;
+
+/* Path to a directory useful for finding subcomponents. */
+extern const char*basedir;
+
+/* This is an ordered list of library suffixes to search. */
 extern list<const char*>library_suff;
 extern int build_library_index(const char*path, bool key_case_sensitive);
 
 /* This is the generation of Verilog that the compiler is asked to
-   support. */
+   support. Then there are also more detailed controls for more
+   specific language features. */
 enum generation_t {
       GN_VER1995  = 1,
       GN_VER2001  = 2,
-      GN_SYSVER30 = 3,
+      GN_VER2005  = 3,
       GN_DEFAULT  = 3
 };
 
 extern generation_t generation_flag;
 
+/* If this flag is true, enable extended types support. */
+extern bool gn_cadence_types_flag;
+
+/* If this flag is true, enable miscellaneous extensions. */
+extern bool gn_icarus_misc_flag;
+
+/* If this flag is true, then elaborate specify blocks. If this flag
+   is false, then skip elaboration of specify behavior. */
+extern bool gn_specify_blocks_flag;
+
+/* If this flag is true, then support/elaborate Verilog-AMS. */
+extern bool gn_verilog_ams_flag;
+
+/* If this flag is false a warning is printed when the port declaration
+   is scalar and the net/register definition is vectored. */
+extern bool gn_io_range_error_flag;
+
+/* The bits of these GN_KEYWORDS_* constants define non-intersecting
+   sets of keywords. The compiler enables groups of keywords by setting
+   lexor_keyword_mask with the OR of the bits for the keywords to be
+   enabled. */
+enum { GN_KEYWORDS_1364_1995        = 0x0001,
+       GN_KEYWORDS_1364_2001        = 0x0002,
+       GN_KEYWORDS_1364_2001_CONFIG = 0x0004,
+       GN_KEYWORDS_1364_2005        = 0x0008,
+       GN_KEYWORDS_VAMS_2_3         = 0x0010,
+       GN_KEYWORDS_ICARUS           = 0x8000
+};
+extern int lexor_keyword_mask;
+
   /* This is the string to use to invoke the preprocessor. */
 extern char*ivlpp_string;
 
+extern map<perm_string,unsigned> missing_modules;
+
+  /* Files that are library files are in this map. The lexor compares
+     file names as it processes `line directives, and if the file name
+     matches an entry in this table, it will turn on the
+     library_active_flag so that modules know that they are in a
+     library. */
+extern map<perm_string,bool> library_file_map;
+
 /*
- * $Log: compiler.h,v $
- * Revision 1.12  2002/05/28 20:40:37  steve
- *  ivl indexes the search path for libraries, and
- *  supports case insensitive module-to-file lookup.
- *
- * Revision 1.11  2002/05/28 00:50:39  steve
- *  Add the ivl -C flag for bulk configuration
- *  from the driver, and use that to run library
- *  modules through the preprocessor.
- *
- * Revision 1.10  2002/05/24 01:13:00  steve
- *  Support language generation flag -g.
- *
- * Revision 1.9  2002/04/22 00:53:39  steve
- *  Do not allow implicit wires in sensitivity lists.
- *
- * Revision 1.8  2002/04/15 00:04:22  steve
- *  Timescale warnings.
- *
- * Revision 1.7  2001/11/16 05:07:19  steve
- *  Add support for +libext+ in command files.
+ * the lex_strings are perm_strings made up of tokens from the source
+ * file. Identifiers are so likely to be used many times that it makes
+ * much sense to use a StringHeapLex to hold them.
  */
+extern StringHeapLex lex_strings;
+extern StringHeap misc_strings;
+
+/*
+ * The filename_strings are perm_strings for file names. They are put
+ * into their own StringHeapLex because these paths are used a *lot*
+ * and this makes them more sure to hash together.
+ */
+extern StringHeapLex filename_strings;
+
+
+/*
+ * system task/function listings.
+ */
+/*
+ * This table describes all the return values of various system
+ * functions. This table is used to elaborate expressions that are
+ * system function calls.
+ */
+struct sfunc_return_type {
+      const char*   name;
+      ivl_variable_type_t type;
+      unsigned      wid;
+      int           signed_flag;
+};
+
+extern const struct sfunc_return_type* lookup_sys_func(const char*name);
+extern int load_sys_func_table(const char*path);
+
 #endif

config.h.in

@@ -18,8 +18,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: config.h.in,v 1.4 2002/02/16 03:18:53 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: config.h.in,v 1.12 2007/02/02 04:33:00 steve Exp $"
 #endif
 
 #if defined(__cplusplus)
@@ -31,23 +31,54 @@
 #endif
 
 # undef NEED_LU
-# undef NEED_TU  
+# undef NEED_TU
 # undef WLU
 # undef WTU
 # undef HAVE_TIMES
 # undef HAVE_IOSFWD
 # undef HAVE_GETOPT_H
+# undef HAVE_INTTYPES_H
+# undef HAVE_LIBIBERTY_H
 # undef HAVE_MALLOC_H
 # undef HAVE_DLFCN_H
 # undef HAVE_DL_H
 # undef HAVE_FCHMOD
 # undef HAVE_LIBREADLINE
+# undef HAVE_LIBZ
+# undef HAVE_LIBBZ2
 # undef HAVE_SYS_WAIT_H
+# undef WORDS_BIGENDIAN
 
-# undef ENABLE_VVM
+#ifdef HAVE_INTTYPES_H
+# include  <inttypes.h>
+#endif
 
 /*
  * $Log: config.h.in,v $
+ * Revision 1.12  2007/02/02 04:33:00  steve
+ *  Use inttypes.h instead of stdint.h for portability.
+ *
+ * Revision 1.11  2004/10/04 01:10:52  steve
+ *  Clean up spurious trailing white space.
+ *
+ * Revision 1.10  2003/08/26 16:26:01  steve
+ *  ifdef idents correctly.
+ *
+ * Revision 1.9  2003/07/03 16:29:55  steve
+ *  spemm WORDS_BIGENDIAN correctly.
+ *
+ * Revision 1.8  2003/03/07 02:44:33  steve
+ *  Implement $realtobits.
+ *
+ * Revision 1.7  2003/02/20 00:49:24  steve
+ *  detect -lz and -lbz2 libraries.
+ *
+ * Revision 1.6  2003/01/10 19:01:04  steve
+ *  Only use libiberty.h if available.
+ *
+ * Revision 1.5  2002/08/11 23:39:33  steve
+ *  Remove VVM option.
+ *
  * Revision 1.4  2002/02/16 03:18:53  steve
  *  Make vvm optional, normally off.
  *

config.sub

@@ -1,8 +1,10 @@
 #! /bin/sh
-# Configuration validation subroutine script, version 1.1.
-#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
-#   Free Software Foundation, Inc.
-#
+# Configuration validation subroutine script.
+#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+#   2000, 2001, 2002 Free Software Foundation, Inc.
+
+timestamp='2002-07-03'
+
 # This file is (in principle) common to ALL GNU software.
 # The presence of a machine in this file suggests that SOME GNU software
 # can handle that machine.  It does not imply ALL GNU software can.
@@ -27,8 +29,8 @@
 # configuration script generated by Autoconf, you may include it under
 # the same distribution terms that you use for the rest of that program.
 
-# Written by Per Bothner <[email protected]>.
-# Please send patches to <[email protected]>.
+# Please send patches to <[email protected]>.  Submit a context
+# diff and a properly formatted ChangeLog entry.
 #
 # Configuration subroutine to validate and canonicalize a configuration type.
 # Supply the specified configuration type as an argument.
@@ -50,30 +52,73 @@
 #	CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
 # It is wrong to echo any other type of specification.
 
-if [ x$1 = x ]
-then
-	echo Configuration name missing. 1>&2
-	echo "Usage: $0 CPU-MFR-OPSYS" 1>&2
-	echo "or     $0 ALIAS" 1>&2
-	echo where ALIAS is a recognized configuration type. 1>&2
-	exit 1
-fi
+me=`echo "$0" | sed -e 's,.*/,,'`
 
-# First pass through any local machine types.
-case $1 in
-	*local*)
-		echo $1
-		exit 0
-		;;
-	*)
-	;;
+usage="\
+Usage: $0 [OPTION] CPU-MFR-OPSYS
+       $0 [OPTION] ALIAS
+
+Canonicalize a configuration name.
+
+Operation modes:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <[email protected]>."
+
+version="\
+GNU config.sub ($timestamp)
+
+Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit 0 ;;
+    --version | -v )
+       echo "$version" ; exit 0 ;;
+    --help | --h* | -h )
+       echo "$usage"; exit 0 ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help"
+       exit 1 ;;
+
+    *local*)
+       # First pass through any local machine types.
+       echo $1
+       exit 0;;
+
+    * )
+       break ;;
+  esac
+done
+
+case $# in
+ 0) echo "$me: missing argument$help" >&2
+    exit 1;;
+ 1) ;;
+ *) echo "$me: too many arguments$help" >&2
+    exit 1;;
 esac
 
 # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any).
 # Here we must recognize all the valid KERNEL-OS combinations.
 maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
 case $maybe_os in
-  nto-qnx* | linux-gnu*)
+  nto-qnx* | linux-gnu* | freebsd*-gnu* | storm-chaos* | os2-emx* | windows32-* | rtmk-nova*)
     os=-$maybe_os
     basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
     ;;
@@ -99,7 +144,7 @@ case $os in
 	-convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\
 	-c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \
 	-harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \
-	-apple)
+	-apple | -axis)
 		os=
 		basic_machine=$1
 		;;
@@ -113,6 +158,14 @@ case $os in
 		os=-vxworks
 		basic_machine=$1
 		;;
+	-chorusos*)
+		os=-chorusos
+		basic_machine=$1
+		;;
+ 	-chorusrdb)
+ 		os=-chorusrdb
+		basic_machine=$1
+ 		;;
 	-hiux*)
 		os=-hiuxwe2
 		;;
@@ -171,30 +224,58 @@ esac
 case $basic_machine in
 	# Recognize the basic CPU types without company name.
 	# Some are omitted here because they have special meanings below.
-	tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \
-		| arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \
-		| 580 | i960 | h8300 \
-		| x86 | ppcbe | mipsbe | mipsle | shbe | shle | armbe | armle \
-		| hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \
-		| hppa64 \
-		| alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \
-		| alphaev6[78] \
-		| we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \
-		| 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \
-		| mips64orion | mips64orionel | mipstx39 | mipstx39el \
-		| mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \
-		| mips64vr5000 | miprs64vr5000el | mcore \
-		| sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \
-		| thumb | d10v | fr30 | avr)
+	1750a | 580 \
+	| a29k \
+	| alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \
+	| alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \
+	| arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \
+	| c4x | clipper \
+	| d10v | d30v | dlx | dsp16xx \
+	| fr30 | frv \
+	| h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \
+	| i370 | i860 | i960 | ia64 \
+	| ip2k \
+	| m32r | m68000 | m68k | m88k | mcore \
+	| mips | mipsbe | mipseb | mipsel | mipsle \
+	| mips16 \
+	| mips64 | mips64el \
+	| mips64orion | mips64orionel \
+	| mips64vr4100 | mips64vr4100el \
+	| mips64vr4300 | mips64vr4300el \
+	| mips64vr5000 | mips64vr5000el \
+	| mipsisa32 | mipsisa32el \
+	| mipsisa64 | mipsisa64el \
+	| mipsisa64sb1 | mipsisa64sb1el \
+	| mipstx39 | mipstx39el \
+	| mn10200 | mn10300 \
+	| ns16k | ns32k \
+	| openrisc | or32 \
+	| pdp10 | pdp11 | pj | pjl \
+	| powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \
+	| pyramid \
+	| sh | sh[1234] | sh3e | sh[34]eb | shbe | shle | sh[1234]le | sh3ele \
+	| sh64 | sh64le \
+	| sparc | sparc64 | sparc86x | sparclet | sparclite | sparcv9 | sparcv9b \
+	| strongarm \
+	| tahoe | thumb | tic80 | tron \
+	| v850 | v850e \
+	| we32k \
+	| x86 | xscale | xstormy16 | xtensa \
+	| z8k)
 		basic_machine=$basic_machine-unknown
 		;;
-	m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | h8500 | w65 | pj | pjl)
+	m6811 | m68hc11 | m6812 | m68hc12)
+		# Motorola 68HC11/12.
+		basic_machine=$basic_machine-unknown
+		os=-none
+		;;
+	m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k)
 		;;
 
 	# We use `pc' rather than `unknown'
 	# because (1) that's what they normally are, and
 	# (2) the word "unknown" tends to confuse beginning users.
-	i[34567]86)
+	i*86 | x86_64)
 	  basic_machine=$basic_machine-pc
 	  ;;
 	# Object if more than one company name word.
@@ -203,28 +284,54 @@ case $basic_machine in
 		exit 1
 		;;
 	# Recognize the basic CPU types with company name.
-	# FIXME: clean up the formatting here.
-	vax-* | tahoe-* | i[34567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
-	      | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \
-	      | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \
-	      | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \
-	      | xmp-* | ymp-* \
-	      | x86-* | ppcbe-* | mipsbe-* | mipsle-* | shbe-* | shle-* | armbe-* | armle-* \
-	      | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* \
-	      | hppa2.0n-* | hppa64-* \
-	      | alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \
-	      | alphaev6[78]-* \
-	      | we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \
-	      | clipper-* | orion-* \
-	      | sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \
-	      | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \
-	      | mips64el-* | mips64orion-* | mips64orionel-* \
-	      | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
-	      | mipstx39-* | mipstx39el-* | mcore-* \
-	      | f301-* | armv*-* | s390-* | sv1-* | t3e-* \
-	      | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
-	      | thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* \
-	      | bs2000-*)
+	580-* \
+	| a29k-* \
+	| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \
+	| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \
+	| alphapca5[67]-* | alpha64pca5[67]-* | arc-* \
+	| arm-*  | armbe-* | armle-* | armeb-* | armv*-* \
+	| avr-* \
+	| bs2000-* \
+	| c[123]* | c30-* | [cjt]90-* | c54x-* \
+	| clipper-* | cydra-* \
+	| d10v-* | d30v-* | dlx-* \
+	| elxsi-* \
+	| f30[01]-* | f700-* | fr30-* | frv-* | fx80-* \
+	| h8300-* | h8500-* \
+	| hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \
+	| i*86-* | i860-* | i960-* | ia64-* \
+	| ip2k-* \
+	| m32r-* \
+	| m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \
+	| m88110-* | m88k-* | mcore-* \
+	| mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \
+	| mips16-* \
+	| mips64-* | mips64el-* \
+	| mips64orion-* | mips64orionel-* \
+	| mips64vr4100-* | mips64vr4100el-* \
+	| mips64vr4300-* | mips64vr4300el-* \
+	| mips64vr5000-* | mips64vr5000el-* \
+	| mipsisa32-* | mipsisa32el-* \
+	| mipsisa64-* | mipsisa64el-* \
+	| mipsisa64sb1-* | mipsisa64sb1el-* \
+	| mipstx39 | mipstx39el \
+	| none-* | np1-* | ns16k-* | ns32k-* \
+	| orion-* \
+	| pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \
+	| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \
+	| pyramid-* \
+	| romp-* | rs6000-* \
+	| sh-* | sh[1234]-* | sh3e-* | sh[34]eb-* | shbe-* \
+	| shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \
+	| sparc-* | sparc64-* | sparc86x-* | sparclet-* | sparclite-* \
+	| sparcv9-* | sparcv9b-* | strongarm-* | sv1-* | sx?-* \
+	| tahoe-* | thumb-* | tic30-* | tic54x-* | tic80-* | tron-* \
+	| v850-* | v850e-* | vax-* \
+	| we32k-* \
+	| x86-* | x86_64-* | xps100-* | xscale-* | xstormy16-* \
+	| xtensa-* \
+	| ymp-* \
+	| z8k-*)
 		;;
 	# Recognize the various machine names and aliases which stand
 	# for a CPU type and a company and sometimes even an OS.
@@ -261,14 +368,14 @@ case $basic_machine in
 		os=-sysv
 		;;
 	amiga | amiga-*)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		;;
 	amigaos | amigados)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		os=-amigaos
 		;;
 	amigaunix | amix)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		os=-sysv4
 		;;
 	apollo68)
@@ -287,6 +394,10 @@ case $basic_machine in
 		basic_machine=ns32k-sequent
 		os=-dynix
 		;;
+	c90)
+		basic_machine=c90-cray
+		os=-unicos
+		;;
 	convex-c1)
 		basic_machine=c1-convex
 		os=-bsd
@@ -307,27 +418,30 @@ case $basic_machine in
 		basic_machine=c38-convex
 		os=-bsd
 		;;
-	cray | ymp)
-		basic_machine=ymp-cray
-		os=-unicos
-		;;
-	cray2)
-		basic_machine=cray2-cray
-		os=-unicos
-		;;
-	[ctj]90-cray)
-		basic_machine=c90-cray
+	cray | j90)
+		basic_machine=j90-cray
 		os=-unicos
 		;;
 	crds | unos)
 		basic_machine=m68k-crds
 		;;
+	cris | cris-* | etrax*)
+		basic_machine=cris-axis
+		;;
 	da30 | da30-*)
 		basic_machine=m68k-da30
 		;;
 	decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn)
 		basic_machine=mips-dec
 		;;
+	decsystem10* | dec10*)
+		basic_machine=pdp10-dec
+		os=-tops10
+		;;
+	decsystem20* | dec20*)
+		basic_machine=pdp10-dec
+		os=-tops20
+		;;
 	delta | 3300 | motorola-3300 | motorola-delta \
 	      | 3300-motorola | delta-motorola)
 		basic_machine=m68k-motorola
@@ -369,6 +483,10 @@ case $basic_machine in
 		basic_machine=tron-gmicro
 		os=-sysv
 		;;
+	go32)
+		basic_machine=i386-pc
+		os=-go32
+		;;
 	h3050r* | hiux*)
 		basic_machine=hppa1.1-hitachi
 		os=-hiuxwe2
@@ -444,19 +562,19 @@ case $basic_machine in
 		basic_machine=i370-ibm
 		;;
 # I'm not sure what "Sysv32" means.  Should this be sysv3.2?
-	i[34567]86v32)
+	i*86v32)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv32
 		;;
-	i[34567]86v4*)
+	i*86v4*)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv4
 		;;
-	i[34567]86v)
+	i*86v)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv
 		;;
-	i[34567]86sol2)
+	i*86sol2)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-solaris2
 		;;
@@ -468,14 +586,6 @@ case $basic_machine in
 		basic_machine=i386-unknown
 		os=-vsta
 		;;
-	i386-go32 | go32)
-		basic_machine=i386-unknown
-		os=-go32
-		;;
-	i386-mingw32 | mingw32)
-		basic_machine=i386-unknown
-		os=-mingw32
-		;;
 	iris | iris4d)
 		basic_machine=mips-sgi
 		case $os in
@@ -501,6 +611,10 @@ case $basic_machine in
 		basic_machine=ns32k-utek
 		os=-sysv
 		;;
+	mingw32)
+		basic_machine=i386-pc
+		os=-mingw32
+		;;
 	miniframe)
 		basic_machine=m68000-convergent
 		;;
@@ -508,14 +622,6 @@ case $basic_machine in
 		basic_machine=m68k-atari
 		os=-mint
 		;;
-	mipsel*-linux*)
-		basic_machine=mipsel-unknown
-		os=-linux-gnu
-		;;
-	mips*-linux*)
-		basic_machine=mips-unknown
-		os=-linux-gnu
-		;;
 	mips3*-*)
 		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
 		;;
@@ -530,8 +636,12 @@ case $basic_machine in
 		basic_machine=m68k-rom68k
 		os=-coff
 		;;
+	morphos)
+		basic_machine=powerpc-unknown
+		os=-morphos
+		;;
 	msdos)
-		basic_machine=i386-unknown
+		basic_machine=i386-pc
 		os=-msdos
 		;;
 	mvs)
@@ -595,6 +705,10 @@ case $basic_machine in
 		basic_machine=i960-intel
 		os=-mon960
 		;;
+	nonstopux)
+		basic_machine=mips-compaq
+		os=-nonstopux
+		;;
 	np1)
 		basic_machine=np1-gould
 		;;
@@ -605,6 +719,10 @@ case $basic_machine in
 		basic_machine=hppa1.1-oki
 		os=-proelf
 		;;
+	or32 | or32-*)
+		basic_machine=or32-unknown
+		os=-coff
+		;;
 	OSE68000 | ose68000)
 		basic_machine=m68000-ericsson
 		os=-ose
@@ -630,28 +748,28 @@ case $basic_machine in
         pc532 | pc532-*)
 		basic_machine=ns32k-pc532
 		;;
-	pentium | p5 | k5 | k6 | nexen)
+	pentium | p5 | k5 | k6 | nexgen | viac3)
 		basic_machine=i586-pc
 		;;
-	pentiumpro | p6 | 6x86)
+	pentiumpro | p6 | 6x86 | athlon)
 		basic_machine=i686-pc
 		;;
 	pentiumii | pentium2)
-		basic_machine=i786-pc
+		basic_machine=i686-pc
 		;;
-	pentium-* | p5-* | k5-* | k6-* | nexen-*)
+	pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*)
 		basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
-	pentiumpro-* | p6-* | 6x86-*)
+	pentiumpro-* | p6-* | 6x86-* | athlon-*)
 		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
 	pentiumii-* | pentium2-*)
-		basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'`
+		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
 	pn)
 		basic_machine=pn-gould
 		;;
-	power)	basic_machine=rs6000-ibm
+	power)	basic_machine=power-ibm
 		;;
 	ppc)	basic_machine=powerpc-unknown
 	        ;;
@@ -663,9 +781,23 @@ case $basic_machine in
 	ppcle-* | powerpclittle-*)
 		basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
+	ppc64)	basic_machine=powerpc64-unknown
+	        ;;
+	ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ppc64le | powerpc64little | ppc64-le | powerpc64-little)
+		basic_machine=powerpc64le-unknown
+	        ;;
+	ppc64le-* | powerpc64little-*)
+		basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
 	ps2)
 		basic_machine=i386-ibm
 		;;
+	pw32)
+		basic_machine=i586-unknown
+		os=-pw32
+		;;
 	rom68k)
 		basic_machine=m68k-rom68k
 		os=-coff
@@ -676,6 +808,12 @@ case $basic_machine in
 	rtpc | rtpc-*)
 		basic_machine=romp-ibm
 		;;
+	s390 | s390-*)
+		basic_machine=s390-ibm
+		;;
+	s390x | s390x-*)
+		basic_machine=s390x-ibm
+		;;
 	sa29200)
 		basic_machine=a29k-amd
 		os=-udi
@@ -687,7 +825,7 @@ case $basic_machine in
 		basic_machine=sh-hitachi
 		os=-hms
 		;;
-	sparclite-wrs)
+	sparclite-wrs | simso-wrs)
 		basic_machine=sparclite-wrs
 		os=-vxworks
 		;;
@@ -745,7 +883,7 @@ case $basic_machine in
 	sun386 | sun386i | roadrunner)
 		basic_machine=i386-sun
 		;;
-	sv1)
+        sv1)
 		basic_machine=sv1-cray
 		os=-unicos
 		;;
@@ -753,16 +891,32 @@ case $basic_machine in
 		basic_machine=i386-sequent
 		os=-dynix
 		;;
-	t3e)
-		basic_machine=t3e-cray
+	t3d)
+		basic_machine=alpha-cray
 		os=-unicos
 		;;
+	t3e)
+		basic_machine=alphaev5-cray
+		os=-unicos
+		;;
+	t90)
+		basic_machine=t90-cray
+		os=-unicos
+		;;
+	tic54x | c54x*)
+		basic_machine=tic54x-unknown
+		os=-coff
+		;;
 	tx39)
 		basic_machine=mipstx39-unknown
 		;;
 	tx39el)
 		basic_machine=mipstx39el-unknown
 		;;
+	toad1)
+		basic_machine=pdp10-xkl
+		os=-tops20
+		;;
 	tower | tower-32)
 		basic_machine=m68k-ncr
 		;;
@@ -809,13 +963,17 @@ case $basic_machine in
 		basic_machine=hppa1.1-winbond
 		os=-proelf
 		;;
-	xmp)
-		basic_machine=xmp-cray
-		os=-unicos
+	windows32)
+		basic_machine=i386-pc
+		os=-windows32-msvcrt
 		;;
         xps | xps100)
 		basic_machine=xps100-honeywell
 		;;
+	ymp)
+		basic_machine=ymp-cray
+		os=-unicos
+		;;
 	z8k-*-coff)
 		basic_machine=z8k-unknown
 		os=-sim
@@ -836,13 +994,6 @@ case $basic_machine in
 	op60c)
 		basic_machine=hppa1.1-oki
 		;;
-	mips)
-		if [ x$os = x-linux-gnu ]; then
-			basic_machine=mips-unknown
-		else
-			basic_machine=mips-mips
-		fi
-		;;
 	romp)
 		basic_machine=romp-ibm
 		;;
@@ -852,13 +1003,23 @@ case $basic_machine in
 	vax)
 		basic_machine=vax-dec
 		;;
+	pdp10)
+		# there are many clones, so DEC is not a safe bet
+		basic_machine=pdp10-unknown
+		;;
 	pdp11)
 		basic_machine=pdp11-dec
 		;;
 	we32k)
 		basic_machine=we32k-att
 		;;
-	sparc | sparcv9)
+	sh3 | sh4 | sh3eb | sh4eb | sh[1234]le | sh3ele)
+		basic_machine=sh-unknown
+		;;
+	sh64)
+		basic_machine=sh64-unknown
+		;;
+	sparc | sparcv9 | sparcv9b)
 		basic_machine=sparc-sun
 		;;
         cydra)
@@ -880,6 +1041,9 @@ case $basic_machine in
 		basic_machine=c4x-none
 		os=-coff
 		;;
+	*-unknown)
+		# Make sure to match an already-canonicalized machine name.
+		;;
 	*)
 		echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
 		exit 1
@@ -936,15 +1100,19 @@ case $os in
 	      | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
 	      | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
 	      | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+	      | -chorusos* | -chorusrdb* \
 	      | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
-	      | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \
+	      | -mingw32* | -linux* | -uxpv* | -beos* | -mpeix* | -udk* \
 	      | -interix* | -uwin* | -rhapsody* | -darwin* | -opened* \
-	      | -openstep* | -oskit*)
+	      | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \
+	      | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \
+	      | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \
+	      | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* | -powermax*)
 	# Remember, each alternative MUST END IN *, to match a version number.
 		;;
 	-qnx*)
 		case $basic_machine in
-		    x86-* | i[34567]86-*)
+		    x86-* | i*86-*)
 			;;
 		    *)
 			os=-nto$os
@@ -961,9 +1129,6 @@ case $os in
 	-mac*)
 		os=`echo $os | sed -e 's|mac|macos|'`
 		;;
-	-linux*)
-		os=`echo $os | sed -e 's|linux|linux-gnu|'`
-		;;
 	-sunos5*)
 		os=`echo $os | sed -e 's|sunos5|solaris2|'`
 		;;
@@ -991,16 +1156,22 @@ case $os in
 	-acis*)
 		os=-aos
 		;;
+	-atheos*)
+		os=-atheos
+		;;
 	-386bsd)
 		os=-bsd
 		;;
 	-ctix* | -uts*)
 		os=-sysv
 		;;
+	-nova*)
+		os=-rtmk-nova
+		;;
 	-ns2 )
 	        os=-nextstep2
 		;;
-	-nsk)
+	-nsk*)
 		os=-nsk
 		;;
 	# Preserve the version number of sinix5.
@@ -1037,7 +1208,7 @@ case $os in
 	-xenix)
 		os=-xenix
 		;;
-        -*mint | -*MiNT)
+        -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
 	        os=-mint
 		;;
 	-none)
@@ -1071,6 +1242,10 @@ case $basic_machine in
 	arm*-semi)
 		os=-aout
 		;;
+	# This must come before the *-dec entry.
+	pdp10-*)
+		os=-tops20
+		;;
         pdp11-*)
 		os=-none
 		;;
@@ -1098,6 +1273,9 @@ case $basic_machine in
 	mips*-*)
 		os=-elf
 		;;
+	or32-*)
+		os=-coff
+		;;
 	*-tti)	# must be before sparc entry or we get the wrong os.
 		os=-sysv3
 		;;
@@ -1179,7 +1357,7 @@ case $basic_machine in
 	*-masscomp)
 		os=-rtu
 		;;
-	f301-fujitsu)
+	f30[01]-fujitsu | f700-fujitsu)
 		os=-uxpv
 		;;
 	*-rom68k)
@@ -1245,7 +1423,7 @@ case $basic_machine in
 			-ptx*)
 				vendor=sequent
 				;;
-			-vxsim* | -vxworks*)
+			-vxsim* | -vxworks* | -windiss*)
 				vendor=wrs
 				;;
 			-aux*)
@@ -1257,12 +1435,23 @@ case $basic_machine in
 			-mpw* | -macos*)
 				vendor=apple
 				;;
-			-*mint | -*MiNT)
+			-*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
 				vendor=atari
 				;;
+			-vos*)
+				vendor=stratus
+				;;
 		esac
 		basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
 		;;
 esac
 
 echo $basic_machine$os
+exit 0
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:

configure.in

@@ -1,17 +1,9 @@
 dnl Process this file with autoconf to produce a configure script.
 AC_INIT(netlist.h)
 AC_CONFIG_HEADER(config.h)
+AC_CONFIG_HEADER(_pli_types.h)
 
-AC_ARG_ENABLE(vvm, vvm target -- the obsolete vvm code generator,
-	AC_DEFINE(ENABLE_VVM))
-if test "${enable_vvm+set}" = set
-then
-    ENABLE_VVM=yes
-else
-    ENABLE_VVM=no
-fi
-AC_SUBST(ENABLE_VVM)
-
+AC_CANONICAL_HOST
 dnl Checks for programs.
 AC_PROG_CC
 AC_PROG_CXX
@@ -19,9 +11,13 @@ AC_CHECK_TOOL(STRIP, strip, true)
 AC_CHECK_PROGS(XGPERF,gperf,none)
 if test "$XGPERF" = "none"
 then
-        echo "*** Error: No suitable gperf found. ***"
-        echo "    Please install the 'gperf' package."
-        exit 1
+	echo ""
+        echo "*** Warning: No suitable gperf found. ***"
+	echo "    The gperf package is essential for building ivl from"
+	echo "    CVS sources, or modifying the parse engine of ivl itself."
+	echo "    You can get away without it when simply building from"
+	echo "    snapshots or major releases."
+	echo ""
 fi
 
 AC_CHECK_PROGS(LEX,flex,none)
@@ -40,9 +36,27 @@ then
         exit 1
 fi
 
+AC_EXEEXT
+AC_SUBST(EXEEXT)
+
+# Combined check for Microsoft-related bogosities; sets WIN32 if found
+AX_WIN32
+
 AC_LANG_CPLUSPLUS
 
-AC_CHECK_HEADERS(getopt.h malloc.h iosfwd sys/wait.h)
+AC_CHECK_HEADERS(getopt.h malloc.h inttypes.h libiberty.h iosfwd sys/wait.h)
+
+AC_CHECK_LIB(z, gzwrite)
+AC_CHECK_LIB(z, gzwrite, HAVE_LIBZ=yes, HAVE_LIBZ=no)
+AC_SUBST(HAVE_LIBZ)
+if test "$WIN32" = "yes"; then
+AC_CHECK_LIB(bz2, main)
+AC_CHECK_LIB(bz2, main, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
+else
+AC_CHECK_LIB(bz2, BZ2_bzdopen)
+AC_CHECK_LIB(bz2, BZ2_bzdopen, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
+fi
+AC_SUBST(HAVE_LIBBZ2)
 
 AC_MSG_CHECKING(for sys/times)
 AC_TRY_LINK(
@@ -50,20 +64,11 @@ AC_TRY_LINK(
 #include <sys/times.h>
 ,{clock_t a = times(0)/sysconf(_SC_CLK_TCK);},
 do_times=yes
-AC_DEFINE(HAVE_TIMES,1),
+AC_DEFINE([HAVE_TIMES], [1], [The times system call is available in the host operating system.]),
 do_times=no
 )
 AC_MSG_RESULT($do_times)
 
-AC_CHECK_HEADER(ipal.h, HAVE_IPAL=yes, HAVE_IPAL=)
-AC_ARG_WITH(ipal,enable PAL target,
-if test "$with_ipal" = no; then
-       echo Disabling ipal support
-       HAVE_IPAL=
-fi
-)
-AC_SUBST(HAVE_IPAL)
-
 # --
 # Look for a dl library to use. First look for the standard dlopen
 # functions, and failing that look for the HP specific shl_load function.
@@ -80,171 +85,40 @@ AC_SUBST(DLLIB)
 AC_PROG_INSTALL
 
 AC_LANG_C
+AC_C_BIGENDIAN
 
-AC_CANONICAL_HOST
 # $host
 
+AX_LD_EXTRALIBS
+
+# Compiler option for position independent code, needed when making shared objects.
+# CFLAGS inherited by cadpli/Makefile?
+AX_C_PICFLAG
+
+# may modify CPPFLAGS and CFLAGS
+AX_CPP_PRECOMP
+
+# Linker option used when compiling the target
+AX_LD_RDYNAMIC
+
+# linker options when building a shared library
+AX_LD_SHAREDLIB_OPTS
 
 #######################
-## test for underscores. The vpi module loader in vvm needs to know this
+## test for underscores. The vpi module loader needs to know this
 ## in order to know the name of the start symbol for the .vpi module.
 #######################
 
-AC_CYGWIN
-AC_EXEEXT
-AC_MINGW32
-
-
-WIN32=no
-AC_MSG_CHECKING("Checking for windows")
-if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
-then
-    WIN32=yes
-fi
-AC_SUBST(WIN32)
-AC_MSG_RESULT($WIN32)
-AC_SUBST(EXEEXT)
-
-
-AC_MSG_CHECKING("for leading and/or trailing underscores")
-cat << EOF > underscore.c
-       void underscore(void){}
-EOF
-$CC -shared -c underscore.c > /dev/null 2>&1
-
-CC_LEADING_UNDERSCORE=no
-CC_TRAILING_UNDERSCORE=no
-
-output=`nm underscore.o|grep _underscore 2>&1`
-if test ! -z "$output" -a -z "$CYGWIN" -a -z "$MINGW32"; then
-  CC_LEADING_UNDERSCORE=yes
-  AC_DEFINE(NEED_LU)
-fi
-
-
-
-output=`nm underscore.o|grep underscore_ 2>&1`
-if test ! -z "$output"; then
-  CC_TRAILING_UNDERSCORE=yes
-  AC_DEFINE(NEED_TU)
-fi
-
-if test "$CC_LEADING_UNDERSCORE" = yes; then
-  AC_DEFINE(WLU)
-fi
-if test "$CC_TRAILING_UNDERSCORE" = yes; then
-  AC_DEFINE(WTU)
-fi
-
-rm underscore.c underscore.o
-
-AC_MSG_RESULT("$CC_LEADING_UNDERSCORE $CC_TRAILING_UNDERSCORE")
+AX_C_UNDERSCORES_LEADING
+AX_C_UNDERSCORES_TRAILING
 
 #######################
 ## end of test for underscores
 #######################
 
-# The -fPIC flag is used to tell the compiler to make position
-# independent code. It is needed when making shared objects.
+AX_CPP_IDENT
 
-AC_MSG_CHECKING("for flag to make position independent code")
-PICFLAG=-fPIC
-case "${host}" in
+# XXX disable tgt-fpga for the moment
+AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp libveriuser cadpli)
 
-     *-*-cygwin*)
-	PICFLAG=
-	;;
-
-     *-*-hpux*)
-	PICFLAG=+z
-	;;
-
-esac
-AC_SUBST(PICFLAG)
-AC_MSG_RESULT($PICFLAG)
-
-
-# mingw needs to link with libiberty.a, cygwin can tolerate it
-
-AC_MSG_CHECKING("for extra libs needed")
-EXTRALIBS=
-case "${host}" in
-     *-*-cygwin*)
-	EXTRALIBS="-liberty"
-	;;
-esac
-AC_SUBST(EXTRALIBS)
-AC_MSG_RESULT($EXTRALIBS)
-   
-# Darwin requires -no-cpp-precomp
-case "${host}" in
-    *-*-darwin*)
-	CPPFLAGS="-no-cpp-precomp"
-	CFLAGS="-no-cpp-precomp"
-	;;
-esac
-
-# The -rdynamic flag is used by iverilog when compiling the target,
-# to know how to export symbols of the main program to loadable modules
-# that are brought in by -ldl
-AC_MSG_CHECKING("for -rdynamic compiler flag")
-
-rdynamic=-rdynamic
-case "${host}" in
-
-    *-*-netbsd*)
-	rdynamic="-Wl,--export-dynamic"
-	;;
-
-    *-*-solaris*)
-	rdynamic=""
-	;;
-
-    *-*-cygwin*)
-	rdynamic=""
-	;;
-
-    *-*-hpux*)
-	rdynamic="-E"
-	;;
-
-    *-*-darwin*)
-	rdynamic="-Wl,-all_load"
-	strip_dynamic="-SX"
-	;;
-
-esac
-AC_SUBST(rdynamic)
-AC_MSG_RESULT($rdynamic)
-AC_SUBST(strip_dynamic)
-AC_MSG_RESULT($strip_dynamic)
-
-AC_MSG_CHECKING("for shared library link flag")
-shared=-shared
-case "${host}" in
-
-     *-*-cygwin*)
-        shared="-shared -Wl,--enable-auto-image-base"
-	;;
-
-     *-*-hpux*)
-	shared="-b"
-	;;
-
-     *-*-darwin1.[0123])
-	shared="-bundle -undefined suppress"
-	;;
-
-     *-*-darwin*)
-	shared="-bundle -undefined suppress -flat_namespace"
-	;;
-esac
-
-AC_SUBST(shared)
-
-AC_MSG_RESULT($shared)
-
-
-AC_CONFIG_SUBDIRS(vpip vvp tgt-vvp tgt-fpga libveriuser)
-
-AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile vvm/Makefile driver/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)

constants.vams

@@ -0,0 +1,43 @@
+// Mathematical and physical constants
+
+`ifdef CONSTANTS_VAMS
+`else
+`define CONSTANTS_VAMS 1
+ 
+// M_ is a mathematical constant
+`define M_E        2.7182818284590452354
+`define M_LOG2E    1.4426950408889634074
+`define M_LOG10E   0.43429448190325182765
+`define M_LN2      0.69314718055994530942
+`define M_LN10     2.30258509299404568402
+`define M_PI       3.14159265358979323846
+`define M_TWO_PI   6.28318530717958647693
+`define M_PI_2     1.57079632679489661923
+`define M_PI_4     0.78539816339744830962
+`define M_1_PI     0.31830988618379067154
+`define M_2_PI     0.63661977236758134308
+`define M_2_SQRTPI 1.12837916709551257390
+`define M_SQRT2    1.41421356237309504880
+`define M_SQRT1_2  0.70710678118654752440
+
+/*
+ * Do we need these? For now they are not available.
+ *
+// The following constants have been taken from http://physics.nist.gov
+// P_ is a physical constant
+// charge of electron in coulombs
+`define P_Q        1.602176462e-19
+// speed of light in vacuum in meters/sec
+`define P_C        2.99792458e8
+// Boltzmann's constant in joules/kelvin
+`define P_K        1.3806503e-23
+// Planck's constant in joules*sec
+`define P_H        6.62606876e-34
+// permittivity of vacuum in farads/meter
+`define P_EPS0     8.854187817e-12
+// permeability of vacuum in henrys/meter
+`define P_U0       (4.0e-7 * `M_PI)
+// zero celsius in kelvin
+`define P_CELSIUS0 273.15
+*/
+`endif

cprop.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2005 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,21 +16,19 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: cprop.cc,v 1.35 2002/05/26 01:39:02 steve Exp $"
-#endif
 
 # include "config.h"
 
+# include  <cstdlib>
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "functor.h"
-# include  <assert.h>
+# include  "ivl_assert.h"
 
 
 
 /*
- * The cprop function below invokes constant propogation where
+ * The cprop function below invokes constant propagation where
  * possible. The elaboration generates NetConst objects. I can remove
  * these and replace the gates connected to it with simpler ones. I
  * may even be able to replace nets with a new constant.
@@ -55,86 +53,6 @@ void cprop_functor::signal(Design*des, NetNet*obj)
 
 void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
 {
-	// For now, only additions are handled.
-      if (obj->attribute("LPM_Direction") != verinum("ADD"))
-	    return;
-
-	// If the low bit on the A side is 0, then eliminate it from
-	// the adder, and pass the B side directly to the
-	// result. Don't reduce the adder smaller then a 1-bit
-	// adder. These will be eliminated later.
-      while ((obj->width() > 1)
-	  && link_drivers_constant(obj->pin_DataA(0))
-	  && (driven_value(obj->pin_DataA(0)) == verinum::V0)) {
-
-	    NetAddSub*tmp = 0;
-	    tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
-	      //connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	      //connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
-	      //connect(tmp->pin_Clock(), obj->pin_Clock());
-	      //connect(tmp->pin_Cin(), obj->pin_Cin());
-	    connect(tmp->pin_Cout(), obj->pin_Cout());
-	      //connect(tmp->pin_Overflow(), obj->pin_Overflow());
-	    for (unsigned idx = 0 ;  idx < tmp->width() ;  idx += 1) {
-		  connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
-		  connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
-		  connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
-	    }
-	    connect(obj->pin_Result(0), obj->pin_DataB(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    obj = tmp;
-	    count += 1;
-      }
-
-	// Now do the same thing on the B side.
-      while ((obj->width() > 1)
-	  && link_drivers_constant(obj->pin_DataB(0))
-	  && (driven_value(obj->pin_DataB(0)) == verinum::V0)) {
-
-	    NetAddSub*tmp = 0;
-	    tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
-	      //connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	      //connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
-	      //connect(tmp->pin_Clock(), obj->pin_Clock());
-	      //connect(tmp->pin_Cin(), obj->pin_Cin());
-	    connect(tmp->pin_Cout(), obj->pin_Cout());
-	      //connect(tmp->pin_Overflow(), obj->pin_Overflow());
-	    for (unsigned idx = 0 ;  idx < tmp->width() ;  idx += 1) {
-		  connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
-		  connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
-		  connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
-	    }
-	    connect(obj->pin_Result(0), obj->pin_DataA(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    obj = tmp;
-	    count += 1;
-      }
-
-	// If the adder is only 1 bit wide, then replace it with the
-	// simple logic gate.
-      if (obj->width() == 1) {
-	    NetLogic*tmp;
-	    if (obj->pin_Cout().is_linked()) {
-		  tmp = new NetLogic(obj->scope(),
-				     des->local_symbol(obj->name()), 3,
-				     NetLogic::AND);
-		  connect(tmp->pin(0), obj->pin_Cout());
-		  connect(tmp->pin(1), obj->pin_DataA(0));
-		  connect(tmp->pin(2), obj->pin_DataB(0));
-		  des->add_node(tmp);
-	    }
-	    tmp = new NetLogic(obj->scope(), obj->name(), 3, NetLogic::XOR);
-	    connect(tmp->pin(0), obj->pin_Result(0));
-	    connect(tmp->pin(1), obj->pin_DataA(0));
-	    connect(tmp->pin(2), obj->pin_DataB(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    count += 1;
-	    return;
-      }
-
 }
 
 void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
@@ -153,19 +71,37 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
 
 void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 {
+#if 0
+	/* XXXX Need to reimplement this code to account for vectors. */
       NetScope*scope = obj->scope();
 
+      unsigned const_count = 0;
+      bool unknown_flag = false;
+
 	/* First, look for the case where constant bits on matching A
 	   and B inputs are different. This this is so, the device can
 	   be completely eliminated and replaced with a constant 0. */
 
       for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    if (! link_drivers_constant(obj->pin_DataA(idx)))
+	    if (! obj->pin_DataA(idx).nexus()->drivers_constant())
 		  continue;
-	    if (! link_drivers_constant(obj->pin_DataB(idx)))
+	    if (! obj->pin_DataB(idx).nexus()->drivers_constant())
 		  continue;
-	    if (driven_value(obj->pin_DataA(idx)) ==
-		driven_value(obj->pin_DataB(idx)))
+
+	    const_count += 1;
+
+	    verinum::V abit = obj->pin_DataA(idx).nexus()->driven_value();
+	    verinum::V bbit = obj->pin_DataB(idx).nexus()->driven_value();
+
+	    if ((abit == verinum::V0) && (bbit == verinum::V0))
+		  continue;
+	    if ((abit == verinum::V1) && (bbit == verinum::V1))
+		  continue;
+
+	    unknown_flag = true;
+	    if ((abit == verinum::Vz) || (abit == verinum::Vx))
+		  continue;
+	    if ((bbit == verinum::Vz) || (bbit == verinum::Vx))
 		  continue;
 
 	    NetConst*zero = new NetConst(scope, obj->name(), verinum::V0);
@@ -176,16 +112,31 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 	    return;
       }
 
+	/* If all the inputs are constant, then at this point the
+	   result is either V1 or Vx. */
+      if (const_count == obj->width()) {
+
+	    NetConst*val = new NetConst(scope, obj->name(),
+					unknown_flag
+					  ? verinum::Vx
+					  : verinum::V1);
+	    connect(val->pin(0), obj->pin_AEB());
+	    delete obj;
+	    des->add_node(val);
+	    count += 1;
+	    return;
+      }
+
 	/* Still may need the gate. Run through the inputs again, and
 	   look for pairs of constants. Those inputs can be removed. */
 
       unsigned top = obj->width();
       for (unsigned idx = 0 ;  idx < top ; ) {
-	    if (! link_drivers_constant(obj->pin_DataA(idx))) {
+	    if (! obj->pin_DataA(idx).nexus()->drivers_constant()) {
 		  idx += 1;
 		  continue;
 	    }
-	    if (! link_drivers_constant(obj->pin_DataB(idx))) {
+	    if (! obj->pin_DataB(idx).nexus()->drivers_constant()) {
 		  idx += 1;
 		  continue;
 	    }
@@ -217,7 +168,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 	   with a simple XOR gate. */
       if (top == 1) {
 	    NetLogic*tmp = new NetLogic(scope, obj->name(), 3,
-					NetLogic::XNOR);
+					NetLogic::XNOR, 1);
 	    connect(tmp->pin(0), obj->pin_AEB());
 	    connect(tmp->pin(1), obj->pin_DataA(0));
 	    connect(tmp->pin(2), obj->pin_DataB(0));
@@ -240,66 +191,38 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
       delete obj;
       des->add_node(tmp);
       count += 1;
+#endif
 }
 
 void cprop_functor::lpm_ff(Design*des, NetFF*obj)
 {
 	// Look for and count unlinked FF outputs. Note that if the
 	// Data and Q pins are connected together, they can be removed
-	// from the circuit.
-      unsigned unlinked_count = 0;
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    if (connected(obj->pin_Data(idx), obj->pin_Q(idx))) {
-		  obj->pin_Data(idx).unlink();
-		  obj->pin_Q(idx).unlink();
-	    }
-	    if (! obj->pin_Q(idx).is_linked())
-		  unlinked_count += 1;
-      }
+	// from the circuit, since it doesn't do anything.
 
-	// If the entire FF is unlinked, remove the whole thing.
-      if (unlinked_count == obj->width()) {
+      if (connected(obj->pin_Data(), obj->pin_Q())
+	  && (! obj->pin_Sclr().is_linked())
+	  && (! obj->pin_Sset().is_linked())
+	  && (! obj->pin_Aclr().is_linked())
+	  && (! obj->pin_Aset().is_linked())) {
+	    obj->pin_Data().unlink();
+	    obj->pin_Q().unlink();
 	    delete obj;
-	    count += 1;
-	    return;
-      }
-
-	// If some of the FFs are unconnected, make a new FF array
-	// that does not include the useless FF devices.
-      if (unlinked_count > 0) {
-	    NetFF*tmp = new NetFF(obj->scope(), obj->name(),
-				  obj->width()-unlinked_count);
-	    connect(tmp->pin_Clock(), obj->pin_Clock());
-	    connect(tmp->pin_Enable(), obj->pin_Enable());
-	    connect(tmp->pin_Aload(), obj->pin_Aload());
-	    connect(tmp->pin_Aset(), obj->pin_Aset());
-	    connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	    connect(tmp->pin_Sload(), obj->pin_Sload());
-	    connect(tmp->pin_Sset(), obj->pin_Sset());
-	    connect(tmp->pin_Sclr(), obj->pin_Sclr());
-
-	    unsigned tidx = 0;
-	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1)
-		  if (obj->pin_Q(idx).is_linked()) {
-			connect(tmp->pin_Data(tidx), obj->pin_Data(idx));
-			connect(tmp->pin_Q(tidx), obj->pin_Q(idx));
-			tidx += 1;
-		  }
-
-	    assert(tidx == obj->width() - unlinked_count);
-	    delete obj;
-	    des->add_node(tmp);
-	    count += 1;
-	    return;
       }
 }
 
 void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 {
+#if 0
       NetScope*scope = obj->scope();
+#endif
 
       switch (obj->type()) {
-
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 	  case NetLogic::NAND:
 	  case NetLogic::AND: {
 		unsigned top = obj->pin_count();
@@ -310,12 +233,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		     on the output of an AND gate. */
 
 		while (idx < top) {
-		      if (! link_drivers_constant(obj->pin(idx))) {
+		      if (! obj->pin(idx).nexus()->drivers_constant()) {
 			    idx += 1;
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) == verinum::V1) {
+		      if (obj->pin(idx).nexus()->driven_value()==verinum::V1) {
 			    obj->pin(idx).unlink();
 			    top -= 1;
 			    if (idx < top) {
@@ -326,7 +249,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) != verinum::V0) {
+		      if (obj->pin(idx).nexus()->driven_value() != verinum::V0) {
 			    idx += 1;
 			    xs += 1;
 			    continue;
@@ -348,6 +271,10 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    assert(0);
 		      }
 
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -373,6 +300,10 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    assert(0);
 		      }
 
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -406,16 +337,21 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			  case NetLogic::AND:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 			    break;
 			  case NetLogic::NAND:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 			    break;
 			  default:
 			    assert(0);
 		      }
+
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -427,12 +363,16 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 
 		  /* Finally, this cleans up the gate by creating a
-		     new [N]OR gate that has the right number of
+		     new [N]AND gate that has the right number of
 		     inputs, connected in the right place. */
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -445,7 +385,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	  }
-
+#endif
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 
 	  case NetLogic::NOR:
 	  case NetLogic::OR: {
@@ -457,12 +402,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		     on the output of an OR gate. */
 
 		while (idx < top) {
-		      if (! link_drivers_constant(obj->pin(idx))) {
+		      if (! obj->pin(idx).nexus()->drivers_constant()) {
 			    idx += 1;
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) == verinum::V0) {
+		      if (obj->pin(idx).nexus()->driven_value() == verinum::V0) {
 			    obj->pin(idx).unlink();
 			    top -= 1;
 			    if (idx < top) {
@@ -473,7 +418,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) != verinum::V1) {
+		      if (obj->pin(idx).nexus()->driven_value() != verinum::V1) {
 			    idx += 1;
 			    continue;
 		      }
@@ -494,6 +439,10 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    assert(0);
 		      }
 
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -519,6 +468,10 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    assert(0);
 		      }
 
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -537,16 +490,20 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			  case NetLogic::OR:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 			    break;
 			  case NetLogic::NOR:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 			    break;
 			  default:
 			    assert(0);
 		      }
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -555,7 +512,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      delete obj;
 		      count += 1;
 		      return;
-		}
+v		}
 
 		  /* Finally, this cleans up the gate by creating a
 		     new [N]OR gate that has the right number of
@@ -563,7 +520,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -576,7 +537,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	  }
-
+#endif
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 	  case NetLogic::XNOR:
 	  case NetLogic::XOR: {
 		unsigned top = obj->pin_count();
@@ -588,12 +554,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		     last input to this position. It's like bubbling
 		     all the 0 inputs to the end. */
 		while (idx < top) {
-		      if (! link_drivers_constant(obj->pin(idx))) {
+		      if (! obj->pin(idx).nexus()->drivers_constant()) {
 			    idx += 1;
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) == verinum::V0) {
+		      if (obj->pin(idx).nexus()->driven_value() == verinum::V0) {
 			    obj->pin(idx).unlink();
 			    top -= 1;
 			    if (idx < top) {
@@ -618,12 +584,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		unsigned one = 0, ones = 0;
 		idx = 1;
 		while (idx < top) {
-		      if (! link_drivers_constant(obj->pin(idx))) {
+		      if (! obj->pin(idx).nexus()->drivers_constant()) {
 			    idx += 1;
 			    continue;
 		      }
 
-		      if (driven_value(obj->pin(idx)) == verinum::V1) {
+		      if (obj->pin(idx).nexus()->driven_value() == verinum::V1) {
 			    if (one == 0) {
 				  one = idx;
 				  ones += 1;
@@ -666,6 +632,10 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			    : verinum::V0;
 		      NetConst*tmp = new NetConst(scope, obj->name(), out);
 
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
+
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -682,9 +652,9 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 
 		if ((top == 3) && (ones == 1)) {
 		      unsigned save;
-		      if (! link_drivers_constant(obj->pin(1)))
+		      if (! obj->pin(1).nexus()->drivers_constant())
 			    save = 1;
-		      else if (driven_value(obj->pin(1)) != verinum::V1)
+		      else if (obj->pin(1).nexus()->driven_value() != verinum::V1)
 			    save = 1;
 		      else
 			    save = 2;
@@ -694,11 +664,15 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      if (obj->type() == NetLogic::XOR)
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 		      else
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
+
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
 
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
@@ -719,11 +693,15 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      if (obj->type() == NetLogic::XOR)
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 		      else
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
+
+		      tmp->rise_time(obj->rise_time());
+		      tmp->fall_time(obj->fall_time());
+		      tmp->decay_time(obj->decay_time());
 
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
@@ -741,7 +719,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -754,14 +732,56 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	    }
-
+#endif
 	  default:
 	    break;
       }
 }
 
+static void replace_with_bufif(Design*des, NetMux*obj, NetLogic::TYPE type)
+{
+      NetScope*scope = obj->scope();
+      NetLogic*tmp = new NetLogic(obj->scope(),
+				  scope->local_symbol(),
+				  3, type, obj->width());
+
+      des->add_node(tmp);
+
+      connect(obj->pin_Result(), tmp->pin(0));
+      connect(obj->pin_Data(type==NetLogic::BUFIF0? 0 : 1),  tmp->pin(1));
+
+      if (obj->width() == 1) {
+	      /* Special case that the expression is 1 bit
+		 wide. Connect the select directly to the enable. */
+	    connect(obj->pin_Sel(), tmp->pin(2));
+
+      } else {
+	      /* General case that the expression is arbitrarily
+		 wide. Replicate the enable signal (which we
+		 assume is 1 bit wide) to match the expression,
+		 and connect the enable vector to the enable
+		 input of the gate. */
+	    NetReplicate*rtmp = new NetReplicate(scope,
+						 scope->local_symbol(),
+						 obj->width(),
+						 obj->width());
+	    des->add_node(rtmp);
+
+	    connect(obj->pin_Sel(), rtmp->pin(1));
+	    connect(tmp->pin(2), rtmp->pin(0));
+
+	    NetNet*rsig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::WIRE, obj->width());
+	    rsig->local_flag(true);
+	    rsig->data_type(IVL_VT_LOGIC);
+	    connect(tmp->pin(2), rsig->pin(0));
+      }
+
+      delete obj;
+}
+
 /*
- * This detects the case where the mux selects between a value an
+ * This detects the case where the mux selects between a value and
  * Vz. In this case, replace the device with a bufif with the sel
  * input used to enable the output.
  */
@@ -776,64 +796,36 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
 	   NetMux with an array of BUFIF1 devices, with the enable
 	   connected to the select input. */
       bool flag = true;
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    if (! link_drivers_constant(obj->pin_Data(idx, 0))) {
-		  flag = false;
-		  break;
-	    }
 
-	    if (driven_value(obj->pin_Data(idx, 0)) != verinum::Vz) {
-		  flag = false;
-		  break;
-	    }
+      if (! obj->pin_Data(0).nexus()->drivers_constant()) {
+	    flag = false;
+      }
+
+      if (flag && obj->pin_Data(0).nexus()->driven_value() != verinum::Vz) {
+	    flag = false;
       }
 
       if (flag) {
-	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-		  NetLogic*tmp = new NetLogic(obj->scope(),
-					      des->local_symbol(obj->name()),
-					      3, NetLogic::BUFIF1);
-
-		  connect(obj->pin_Result(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,1), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-	    }
-
+	    replace_with_bufif(des, obj, NetLogic::BUFIF1);
 	    count += 1;
-	    delete obj;
 	    return;
       }
 
+
 	/* If instead the second input is all constant Vz, replace the
 	   NetMux with an array of BUFIF0 devices. */
       flag = true;
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    if (! link_drivers_constant(obj->pin_Data(idx, 1))) {
-		  flag = false;
-		  break;
-	    }
+      if (! obj->pin_Data(1).nexus()->drivers_constant()) {
+	    flag = false;
+      }
 
-	    if (driven_value(obj->pin_Data(idx, 1)) != verinum::Vz) {
-		  flag = false;
-		  break;
-	    }
+      if (flag && obj->pin_Data(1).nexus()->driven_value() != verinum::Vz) {
+	    flag = false;
       }
 
       if (flag) {
-	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-		  NetLogic*tmp = new NetLogic(obj->scope(),
-					      des->local_symbol(obj->name()),
-					      3, NetLogic::BUFIF0);
-
-		  connect(obj->pin_Result(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,0), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-	    }
-
+	    replace_with_bufif(des, obj, NetLogic::BUFIF0);
 	    count += 1;
-	    delete obj;
 	    return;
       }
 }
@@ -852,15 +844,17 @@ struct cprop_dc_functor  : public functor_t {
 void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
 {
 	// 'bz constant values drive high impedance to whatever is
-	// connected to it. In otherwords, it is a noop.
+	// connected to it. In other words, it is a noop. But that is
+	// only true if *all* the bits of the vectors.
       { unsigned tmp = 0;
-        for (unsigned idx = 0 ;  idx < obj->pin_count() ;  idx += 1)
+	ivl_assert(*obj, obj->pin_count()==1);
+	for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
 	      if (obj->value(idx) == verinum::Vz) {
-		    obj->pin(idx).unlink();
 		    tmp += 1;
 	      }
+	}
 
-	if (tmp == obj->pin_count()) {
+	if (tmp == obj->width()) {
 	      delete obj;
 	      return;
 	}
@@ -912,6 +906,13 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
 
 		  assert(tmp->scope());
 
+		    // If the net is a signal name from the source,
+		    // then users will probably want to see it in the
+		    // waveform dump, so unhooking the constant will
+		    // make it look wrong.
+		  if (! tmp->local_flag())
+			return;
+
 		    // If the net has an eref, then there is an
 		    // expression somewhere that reads this signal. So
 		    // the constant does get read.
@@ -935,7 +936,7 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
 
 void cprop(Design*des)
 {
-	// Continually propogate constants until a scan finds nothing
+	// Continually propagate constants until a scan finds nothing
 	// to do.
       cprop_functor prop;
       do {
@@ -947,136 +948,3 @@ void cprop(Design*des)
       des->functor(&dc);
 }
 
-/*
- * $Log: cprop.cc,v $
- * Revision 1.35  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.34  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.33  2002/04/14 02:51:37  steve
- *  Fix bug removing pairs of ones in XOR.
- *
- * Revision 1.32  2002/02/03 00:06:28  steve
- *  Comments about xor evaluation.
- *
- * Revision 1.31  2001/12/31 01:56:08  steve
- *  Get sense of 1-bit == operator right.
- *
- * Revision 1.30  2001/10/28 01:14:53  steve
- *  NetObj constructor finally requires a scope.
- *
- * Revision 1.29  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.28  2001/06/15 04:14:18  steve
- *  Generate vvp code for GT and GE comparisons.
- *
- * Revision 1.27  2001/06/07 02:12:43  steve
- *  Support structural addition.
- *
- * Revision 1.26  2001/02/18 01:07:32  steve
- *  check signals in the cprop functor.
- *
- * Revision 1.25  2001/02/16 03:27:31  steve
- *  Constant propagation for compare ==.
- *
- * Revision 1.24  2001/02/10 04:50:54  steve
- *  Catch constants driving root module ports. (PR#130)
- *
- * Revision 1.23  2000/12/30 03:11:15  steve
- *  Propagate initial value of constants into wires.
- *
- * Revision 1.22  2000/11/23 01:55:52  steve
- *  Propagate constants through xnor gates. (PR#51)
- *
- * Revision 1.21  2000/11/19 05:26:58  steve
- *  Replace AND constand propagation.
- *
- * Revision 1.20  2000/11/18 05:13:27  steve
- *  Thorough constant propagation for or and nor gates.
- *
- * Revision 1.19  2000/11/18 04:10:37  steve
- *  Handle constant propagation through XOR gates,
- *  including reducing the gate to a constant,
- *  a buffer or an inverter if possible.
- *
- * Revision 1.18  2000/11/11 00:03:36  steve
- *  Add support for the t-dll backend grabing flip-flops.
- *
- * Revision 1.17  2000/10/07 19:45:42  steve
- *  Put logic devices into scopes.
- *
- * Revision 1.16  2000/10/06 21:26:34  steve
- *  Eliminate zero inputs to xor.
- *
- * Revision 1.15  2000/08/02 14:48:01  steve
- *  use bufif0 if z is in true case of mux.
- *
- * Revision 1.14  2000/07/25 02:55:13  steve
- *  Unlink z constants from nets.
- *
- * Revision 1.13  2000/07/15 05:13:43  steve
- *  Detect muxing Vz as a bufufN.
- *
- * Revision 1.12  2000/06/25 19:59:41  steve
- *  Redesign Links to include the Nexus class that
- *  carries properties of the connected set of links.
- *
- * Revision 1.11  2000/06/24 22:55:19  steve
- *  Get rid of useless next_link method.
- *
- * Revision 1.10  2000/05/14 17:55:04  steve
- *  Support initialization of FF Q value.
- *
- * Revision 1.9  2000/05/07 04:37:56  steve
- *  Carry strength values from Verilog source to the
- *  pform and netlist for gates.
- *
- *  Change vvm constants to use the driver_t to drive
- *  a constant value. This works better if there are
- *  multiple drivers on a signal.
- *
- * Revision 1.8  2000/04/28 21:00:28  steve
- *  Over agressive signal elimination in constant probadation.
- *
- * Revision 1.7  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  2000/01/02 17:56:42  steve
- *  Do not delete constants that input to exressions.
- *
- * Revision 1.5  1999/12/30 04:19:12  steve
- *  Propogate constant 0 in low bits of adders.
- *
- * Revision 1.4  1999/12/17 06:18:15  steve
- *  Rewrite the cprop functor to use the functor_t interface.
- *
- * Revision 1.3  1999/12/17 03:38:46  steve
- *  NetConst can now hold wide constants.
- *
- * Revision 1.2  1998/12/02 04:37:13  steve
- *  Add the nobufz function to eliminate bufz objects,
- *  Object links are marked with direction,
- *  constant propagation is more careful will wide links,
- *  Signal folding is aware of attributes, and
- *  the XNF target can dump UDP objects based on LCA
- *  attributes.
- *
- * Revision 1.1  1998/11/13 06:23:17  steve
- *  Introduce netlist optimizations with the
- *  cprop function to do constant propogation.
- *
- */
-

cygwin.txt

@@ -1,29 +1,35 @@
-
-This file describes the build procedure under cygwin32 (Windows 95/98/NT/2K)
-----------------------------------------------------------------------------
-To build using cygwin:
-
-Prerequisites:
-
- o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
-
-Procedure:
- o Get the source code - see the main icarus verilog page for how to 
-   do this
- o cd to the verilog directory
- o autoconf.sh
- o ./configure
- o make
- o make install
-
-That's all that's needed.  
-
-To build your own extensions - just include vpi_user.h and link with
-a command like this:
-
- $(CC) -shared -o <dllname> <objects> -Wl,--enable-auto-image-base -L../vvm -lvvm -lvpip
-
- - Venkat Iyer <[email protected]>
-
-
-
+
+This file describes the build procedure under cygwin32 (Windows 95/98/NT/2K)
+----------------------------------------------------------------------------
+
+Note: Icarus Verilog also compiles to native Windows binaries if you
+use the instructions in the mingw.txt file. Some people prefer cygwin
+binaries, and these instructions apply.
+
+
+To build using cygwin:
+
+Prerequisites:
+
+ o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
+
+Procedure:
+ o Get the source code - see the main Icarus Verilog page for how to
+   do this
+ o cd to the verilog directory
+ o autoconf.sh
+ o ./configure
+ o make
+ o make install
+
+That's all that's needed.
+
+To build your own extensions - just include vpi_user.h and link with
+a command like this:
+
+ $(CC) -shared -o <dllname> <objects> -Wl,--enable-auto-image-base -L../vvm -lvvm -lvpip
+
+ - Venkat Iyer <[email protected]>
+
+
+

dosify.c

@@ -15,9 +15,10 @@
  *    You should have received a copy of the GNU General Public License
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- *
- * $Id: dosify.c,v 1.1 2001/08/03 17:06:47 steve Exp $
  */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: dosify.c,v 1.5 2003/07/15 16:17:47 steve Exp $"
+#endif
 
 /*
  * This is a simple program to make a dosified copy of the
@@ -68,6 +69,18 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: dosify.c,v $
+ * Revision 1.5  2003/07/15 16:17:47  steve
+ *  Fix spelling of ifdef.
+ *
+ * Revision 1.4  2003/07/15 03:49:22  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.3  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.2  2002/08/11 23:47:04  steve
+ *  Add missing Log and Ident strings.
+ *
  * Revision 1.1  2001/08/03 17:06:47  steve
  *  Add install of examples for Windows.
  *

driver-vpi/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+iverilog-vpi.exe

driver-vpi/Makefile.in

@@ -0,0 +1,86 @@
+#
+#    This source code is free software; you can redistribute it
+#    and/or modify it in source code form under the terms of the GNU
+#    Library General Public License as published by the Free Software
+#    Foundation; either version 2 of the License, or (at your option)
+#    any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU Library General Public License for more details.
+#
+#    You should have received a copy of the GNU Library General Public
+#    License along with this program; if not, write to the Free
+#    Software Foundation, Inc.,
+#    59 Temple Place - Suite 330
+#    Boston, MA 02111-1307, USA
+#
+#ident "$Id: Makefile.in,v 1.7.2.1 2006/10/04 17:08:59 steve Exp $"
+#
+#
+SHELL = /bin/sh
+
+VERSION = 0.8.3
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+srcdir = @srcdir@
+datarootdir = @datarootdir@
+
+VPATH = $(srcdir)
+
+bindir = $(exec_prefix)/bin
+libdir = $(exec_prefix)/lib
+includedir = $(prefix)/include
+mandir = @mandir@
+
+dllib=@DLLIB@
+
+CC = @CC@
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
+CFLAGS = -Wall @CFLAGS@
+LDFLAGS = @LDFLAGS@
+
+all: iverilog-vpi@EXEEXT@
+
+clean:
+	rm -f *.o config.h
+	rm -f iverilog-vpi@EXEEXT@
+
+distclean: clean
+	rm -f Makefile
+
+O = main.o res.o
+
+iverilog-vpi@EXEEXT@: $O
+	$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@
+
+
+main.o: main.c config.h
+	$(CC) $(CPPFLAGS) $(CFLAGS) -c $(srcdir)/main.c
+
+config.h: config.h.in
+	sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \
+	    -e 's;@IVLCFLAGS@;@CXXFLAGS@;' \
+	    -e 's;@SHARED@;@shared@;' $< > $@
+
+# Windows specific...
+res.o: res.rc
+	windres -i res.rc -o res.o
+#
+
+install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
+
+$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
+
+installdirs: ../mkinstalldirs
+	$(srcdir)/../mkinstalldirs $(bindir)
+
+uninstall:
+	rm -f $(bindir)/iverilog-vpi@EXEEXT@

driver-vpi/config.h.in

@@ -0,0 +1,8 @@
+/* For now do not put the Icarus Verilog include or library paths here.
+ * They are generated from a registry entry the user must set (-ivl=).
+ * This may change in the future once I have thought about it more. */
+#define IVERILOG_VPI_CC        "@IVLCC@"
+#define IVERILOG_VPI_CXX       "@IVLCXX@"
+#define IVERILOG_VPI_CFLAGS    " @IVLCFLAGS@"
+#define IVERILOG_VPI_LDFLAGS   "@SHARED@"
+#define IVERILOG_VPI_LDLIBS    "-lveriuser -lvpi"

driver-vpi/main.c

@@ -0,0 +1,645 @@
+/*
+ * Copyright (c) 2002 Gus Baldauf ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+/*
+ *	iverilog-vpi.c
+ *
+ *	this program provides the functionality of iverilog-vpi.sh under Win32
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+
+#include <windows.h>
+
+static void setup_ivl_environment();
+static void assign(char **ptr, char *str);
+
+/* The compile options: compiler, flags, etc. are in here */
+#include "config.h"
+
+/* pointers to global strings */
+
+static struct global_strings {
+	char *pCCSRC;		/* list of C source files (*.c) */
+	char *pCXSRC;		/* list of C++ source files (*.cc, *.cpp) */
+	char *pOBJ;			/* list of object files */
+	char *pLIB;			/* list of library files */
+	char *pINCS;			/* list of include directories */
+	char *pDEFS;			/* list of definitions */
+	char *pOUT;			/* output file name (.vpi extension), if 0 length then no source files specified */
+	char *pMINGW;		/* path to MinGW directory */
+	char *pIVL;			/* path to IVL directory */
+	char *pCFLAGS;		/* CFLAGS option */
+	char *pLDLIBS;		/* LDLIBS option */
+	char *pNewPath;		/* new PATH environment variable setting */
+	char *pLD;		/* what to use for a linker */
+} gstr;
+
+
+static void deInitDynString(char *str)
+{
+	free(str);
+}
+
+/* when finished, free allocated memory and return error code */
+
+static void myExit(int exitVal)
+{
+	deInitDynString(gstr.pCCSRC);
+	deInitDynString(gstr.pCXSRC);
+	deInitDynString(gstr.pOBJ);
+	deInitDynString(gstr.pLIB);
+	deInitDynString(gstr.pINCS);
+	deInitDynString(gstr.pDEFS);
+	deInitDynString(gstr.pOUT);
+	deInitDynString(gstr.pMINGW);
+	deInitDynString(gstr.pIVL);
+	deInitDynString(gstr.pCFLAGS);
+	deInitDynString(gstr.pLDLIBS);
+	deInitDynString(gstr.pNewPath);
+	free(gstr.pLD);
+
+	exit(exitVal);
+}
+
+/* display usage summary and exit */
+
+static void usage()
+{
+	fprintf(stderr,"usage: iverilog-vpi [src and obj files]...\n");
+	fprintf(stderr,"   or  iverilog-vpi -mingw=dir\n");
+	fprintf(stderr,"   or  iverilog-vpi -ivl=dir\n");
+	myExit(1);
+}
+
+static void initDynString(char **str)
+{
+	*str = (char *) malloc(1);
+
+	if (!*str) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	*str[0] = 0;
+}
+
+/* initialize dynamic memory buffers */
+
+static void init()
+{
+	initDynString(&gstr.pCCSRC);
+	initDynString(&gstr.pCXSRC);
+	initDynString(&gstr.pOBJ);
+	initDynString(&gstr.pLIB);
+	initDynString(&gstr.pINCS);
+	initDynString(&gstr.pDEFS);
+	initDynString(&gstr.pOUT);
+	initDynString(&gstr.pMINGW);
+	initDynString(&gstr.pIVL);
+	initDynString(&gstr.pCFLAGS);
+	initDynString(&gstr.pLDLIBS);
+	initDynString(&gstr.pNewPath);
+	  /* By default use the C compiler to link the programs. */
+	assign(&gstr.pLD, IVERILOG_VPI_CC);
+}
+
+/* return true if "str" is terminated with with "end", case insensitive */
+
+static int endsIn (char *end, char *str)
+{
+	char *ext;
+
+	if (strlen(end) >= strlen(str))
+		return 0;
+
+	ext = str + (strlen(str) - strlen(end));
+
+	return stricmp(end,ext) ? 0 : 1;
+}
+
+/* return true if "str" begins with "prefix", case insensitive */
+
+static int startsWith (char *prefix, char *str)
+{
+	if (strlen(prefix) >= strlen(str))
+		return 0;
+
+	return strnicmp(prefix,str,strlen(prefix)) ? 0 : 1;
+}
+
+/* append "app" to "ptr", allocating memory as needed    */
+/*   if count is zero, then copy all characters of "app" */
+
+static void appendn (char **ptr, char *app, int count)
+{
+	*ptr = (char *) realloc(*ptr,strlen(*ptr)+(count?count:strlen(app))+1);
+
+	if (*ptr == NULL) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	if (count)
+		strncat(*ptr,app,count);
+	else
+		strcat(*ptr,app);
+}
+
+/* append "app" to "ptr", allocating memory as needed    */
+
+static void append (char **ptr, char *app)
+{
+	appendn(ptr,app,0);
+}
+
+/* if the string does not end with a backslash, add one */
+
+static void appendBackSlash(char **str)
+{
+	if ((*str)[strlen(*str)-1] != '\\')
+		append(str,"\\");
+}
+
+/* copy count characters of "str" to "ptr", allocating memory as needed */
+/*   if count is zero, then copy all characters of "str"                */
+
+static void assignn (char **ptr, char *str, int count)
+{
+	*ptr = (char *) realloc(*ptr,(count?count:strlen(str))+1);
+
+	if (*ptr == NULL) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	if (count) {
+		strncpy(*ptr,str,count);
+		(*ptr)[count] = 0;
+	}
+	else
+		strcpy(*ptr,str);
+}
+
+/* copy count characters of "str" to "ptr", allocating memory as needed */
+
+static void assign (char **ptr, char *str)
+{
+	assignn(ptr,str,0);
+}
+
+/* get a copy of a Icarus Verilog registry string key */
+
+static int GetRegistryKey(char *key, char **value)
+{
+	long lrv;
+	HKEY hkKey;
+	char *regKeyBuffer;
+	DWORD regKeyType, regKeySize;
+
+	lrv = RegOpenKeyEx(HKEY_LOCAL_MACHINE,"Software\\Icarus Verilog",0,KEY_QUERY_VALUE,&hkKey);
+	if (lrv != ERROR_SUCCESS)
+		return 0;
+
+	lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,NULL,&regKeySize);
+	if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
+		lrv = RegCloseKey(hkKey);
+		return 0;
+	}
+
+	regKeyBuffer = (char *) malloc(regKeySize+1);
+	if (!regKeyBuffer) {
+		lrv = RegCloseKey(hkKey);
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+	regKeyBuffer[regKeySize] = 0;		/* makes sure there is a trailing NULL */
+
+	lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,regKeyBuffer,&regKeySize);
+	if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
+		lrv = RegCloseKey(hkKey);
+		free(regKeyBuffer);
+		return 0;
+	}
+
+	RegCloseKey(hkKey);
+
+	assign(value,regKeyBuffer);
+	free(regKeyBuffer);
+
+	return 1;
+}
+
+/* store a copy of a Icarus Verilog registry string key */
+
+static void SetRegistryKey(char *key, char *value)
+{
+	HKEY hkKey;
+	DWORD res;
+
+	if (RegCreateKeyEx(
+		HKEY_LOCAL_MACHINE,
+		"Software\\Icarus Verilog",
+		0,
+		"",
+		REG_OPTION_NON_VOLATILE,
+		KEY_ALL_ACCESS,NULL,
+		&hkKey,
+		&res) != ERROR_SUCCESS)
+			return;
+
+	RegSetValueEx(hkKey,key,0,REG_SZ,value,strlen(value)+1);
+	RegCloseKey(hkKey);
+
+	printf("info:  storing %s in Windows' registry entry\n",value);
+	printf("       HKEY_LOCAL_MACHINE\\Software\\Icarus Verilog\\%s\n",key);
+}
+
+/* parse the command line, assign results to global variable strings */
+
+static int parse(int argc, char *argv[])
+{
+	int idx, srcFileCnt=0;
+
+	char dot_c_ext[]    = ".c";
+	char dot_cc_ext[]   = ".cc";
+	char dot_cpp_ext[]  = ".cpp";
+	char dot_o_ext[]    = ".o";
+	char name_option[]  = "--name=";
+	char lib_option[]   = "-l";
+	char inc_option[]   = "-I";
+	char mingw_option[] = "-mingw=";
+	char ivl_option[]   = "-ivl=";
+	char def_option[]   = "-D";
+
+	if (argc == 1) return 0;
+
+	for (idx=1; idx<argc; ++idx) {
+		  /* Check for C source files (*.c) */
+		if (endsIn(dot_c_ext, argv[idx])) {
+			++srcFileCnt;
+			append(&gstr.pCCSRC, argv[idx]);
+			append(&gstr.pCCSRC, " ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT, argv[idx],
+			           strlen(argv[idx])-strlen(dot_c_ext));
+		}
+		  /* Check for C++ source files (*.cc) */
+		else if (endsIn(dot_cc_ext, argv[idx])) {
+			  /* We need to link with the C++ compiler. */
+			assign(&gstr.pLD, IVERILOG_VPI_CXX);
+			++srcFileCnt;
+			append(&gstr.pCXSRC, argv[idx]);
+			append(&gstr.pCXSRC, " ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT, argv[idx],
+			           strlen(argv[idx])-strlen(dot_cc_ext));
+		}
+		  /* Check for C++ source files (*.cpp) */
+		else if (endsIn(dot_cpp_ext, argv[idx])) {
+			  /* We need to link with the C++ compiler. */
+			assign(&gstr.pLD, IVERILOG_VPI_CXX);
+			++srcFileCnt;
+			append(&gstr.pCXSRC, argv[idx]);
+			append(&gstr.pCXSRC, " ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT, argv[idx],
+			           strlen(argv[idx])-strlen(dot_cpp_ext));
+		}
+		  /* Check for compiled object files */
+		else if (endsIn(dot_o_ext, argv[idx])) {
+			++srcFileCnt;
+			append(&gstr.pOBJ," ");
+			append(&gstr.pOBJ, argv[idx]);
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT, argv[idx],
+			           strlen(argv[idx])-strlen(dot_o_ext));
+		}
+		  /* Check for the --name option */
+		else if (startsWith(name_option, argv[idx])) {
+			assignn(&gstr.pOUT, argv[idx]+sizeof(name_option)-1,
+			        strlen(argv[idx])-(sizeof(name_option)-1));
+		}
+		  /* Check for the -l option */
+		else if (startsWith(lib_option, argv[idx])) {
+			append(&gstr.pLIB, " ");
+			append(&gstr.pLIB, argv[idx]);
+		}
+		  /* Check for the -I option */
+		else if (startsWith(inc_option, argv[idx])) {
+			append(&gstr.pINCS, " ");
+			append(&gstr.pINCS, argv[idx]);
+		}
+		  /* Check for the -D option */
+		else if (startsWith(def_option, argv[idx])) {
+			append(&gstr.pDEFS, " ");
+			append(&gstr.pDEFS, argv[idx]);
+		}
+		  /* Check for the -mingw option */
+		else if (startsWith(mingw_option, argv[idx]))
+			assignn(&gstr.pMINGW, argv[idx]+sizeof(mingw_option)-1,
+			        strlen(argv[idx])-(sizeof(mingw_option)-1));
+		  /* Check for the -ivl   option */
+		else if (startsWith(ivl_option, argv[idx]))
+			assignn(&gstr.pIVL, argv[idx]+sizeof(ivl_option)-1,
+			        strlen(argv[idx])-(sizeof(ivl_option)-1));
+		  /* Check for the --cflags option */
+		else if (stricmp("--cflags", argv[idx]) == 0) {
+			setup_ivl_environment();
+			printf("%s\n", gstr.pCFLAGS);
+			myExit(0);
+		}
+		  /* Check for the --ldflags option */
+		else if (stricmp("--ldflags", argv[idx]) == 0) {
+			printf("%s\n", IVERILOG_VPI_LDFLAGS);
+			myExit(0);
+		}
+		  /* Check for the --ldlibs option */
+		else if (stricmp("--ldlibs", argv[idx]) == 0) {
+			setup_ivl_environment();
+			printf("%s\n", gstr.pLDLIBS);
+			myExit(0);
+		}
+		  /* Check for the --install-dir option */
+		else if (stricmp("--install-dir", argv[idx]) == 0) {
+			setup_ivl_environment();
+			printf("%s\\\\lib\\\\ivl\\\\.\n", gstr.pIVL);
+			myExit(0);
+		}
+		  /* This is different than iverilog-vpi.sh, we don't
+		   * ignore unknown arguments */
+		else return 0;
+	}
+
+	  /* In case there is a --name without source/object files */
+	if (0 == srcFileCnt) assign(&gstr.pOUT,"");
+
+	  /* Normally it's an error if there are no source or object files */
+	  /* Unless we are setting the IVL or MinGW registry entries */
+	if (!*gstr.pOUT) {
+		if (!*gstr.pMINGW && !*gstr.pIVL) return 0;
+	} else
+		  /* We have a valid result file so add the .vpi extension */
+		append(&gstr.pOUT, ".vpi");
+
+	return 1;
+}
+
+/* do minimal check that the MinGW root directory looks valid */
+
+static void checkMingwDir(char *root)
+{
+	int irv;
+	struct _stat stat_buf;
+
+	char *path;
+	initDynString(&path);
+	assign(&path,gstr.pMINGW);
+	appendBackSlash(&path);
+	append(&path,"bin\\" IVERILOG_VPI_CC ".exe");
+
+	irv = _stat(path,&stat_buf);
+	deInitDynString(path);
+
+	if (irv) {
+		fprintf(stderr,"error: %s does not appear to be the valid root directory\n",root);
+		fprintf(stderr,"       of MinGW.  Use the -mingw option of iverilog-vpi.exe to\n");
+		fprintf(stderr,"       point to the MinGW root directory.  For a Windows command\n");
+		fprintf(stderr,"       shell the option would be something like -mingw=c:\\mingw\n");
+		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
+		fprintf(stderr,"       -mingw=c:\\\\mingw\n");
+		myExit(5);
+	}
+}
+
+/* do minimal check that the Icarus Verilog root directory looks valid */
+
+static void checkIvlDir(char *root)
+{
+	int irv;
+	struct _stat stat_buf;
+
+	char *path;
+	initDynString(&path);
+	assign(&path,gstr.pIVL);
+	appendBackSlash(&path);
+	append(&path,"bin\\vvp.exe");
+
+	irv = _stat(path,&stat_buf);
+	deInitDynString(path);
+
+	if (irv) {
+		fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
+		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi.exe to\n");
+		fprintf(stderr,"       point to the Icarus Verilog root directory.  For a Windows\n");
+		fprintf(stderr,"       command shell the option would be something like -ivl=c:\\iverilog\n");
+		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
+		fprintf(stderr,"       -ivl=c:\\\\iverilog\n");
+		myExit(6);
+	}
+}
+
+/* see if we can find mingw root */
+
+#define IVL_REGKEY_MINGW "MingwDir"
+
+static void setup_mingw_environment()
+{
+	char *pOldPATH = getenv("PATH");		/* get current path */
+
+	if (*gstr.pMINGW) {
+		checkMingwDir(gstr.pMINGW);
+		SetRegistryKey(IVL_REGKEY_MINGW,gstr.pMINGW);
+	} else if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
+			fprintf(stderr,"error: can not locate the MinGW root directory, use the -mingw option of\n");
+			fprintf(stderr,"       iverilog-vpi.exe to point to the MinGW root directory.  For\n");
+			fprintf(stderr,"       a Windows command shell the option would be something like\n");
+			fprintf(stderr,"       -mingw=c:\\mingw  For a Cygwin shell the option would be\n");
+			fprintf(stderr,"       something like -mingw=c:\\\\mingw\n");
+			myExit(5);
+		}
+
+	  /* Create new path with MinGW in it */
+	assign(&gstr.pNewPath,"PATH=");
+	append(&gstr.pNewPath,gstr.pMINGW);
+	appendBackSlash(&gstr.pNewPath);
+	append(&gstr.pNewPath, "\\");
+	append(&gstr.pNewPath,"bin;");
+	append(&gstr.pNewPath,pOldPATH);
+
+	  /* Place new path in environment */
+	_putenv(gstr.pNewPath);
+}
+
+/* see if we can find iverilog root */
+
+#define IVL_REGKEY_IVL   "InstallDir"
+
+static void setup_ivl_environment()
+{
+	if (*gstr.pIVL) {
+		checkIvlDir(gstr.pIVL);
+		SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
+	} else if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
+			fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
+			fprintf(stderr,"       of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
+			fprintf(stderr,"       For a Windows command shell the option would be something like\n");
+			fprintf(stderr,"       -ivl=c:\\iverilog  For a Cygwin shell the option would be something\n");
+			fprintf(stderr,"       like -ivl=c:\\\\iverilog\n");
+			myExit(6);
+		}
+
+	  /* Build up the CFLAGS option string */
+	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
+	append(&gstr.pCFLAGS," -I");
+	append(&gstr.pCFLAGS,gstr.pIVL);
+	appendBackSlash(&gstr.pCFLAGS);
+	append(&gstr.pCFLAGS, "\\");
+	append(&gstr.pCFLAGS,"include");
+
+	  /* Build up the LDFLAGS option string */
+	assign(&gstr.pLDLIBS,"-L");
+	append(&gstr.pLDLIBS,gstr.pIVL);
+	appendBackSlash(&gstr.pLDLIBS);
+	append(&gstr.pLDLIBS, "\\");
+	append(&gstr.pLDLIBS,"lib ");
+	append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
+}
+
+/* compile source modules */
+
+static void compile(char *pSource, char **pObject, int *compile_errors, char *compiler)
+{
+	char *ptr1 = pSource;
+	char *ptr2 = strchr(ptr1, ' ');
+	char *buf=0, *src=0, *obj=0;
+
+	while (ptr2) {
+		int len = ptr2 - ptr1;
+		char *ostart;
+		int olen;
+		assignn(&src, ptr1, len);
+
+		  /* Build the object file name */
+		ostart = strrchr(ptr1, '/');
+		if (ostart == NULL) ostart = ptr1;
+		else ostart += 1;
+		olen = strrchr(ptr1, '.') - ostart;
+		assignn(&obj, ostart, olen);
+		append(&obj, ".o");
+
+		  /* Build the compile line */
+		assign(&buf, compiler);
+		append(&buf, " -c -o ");
+		append(&buf, obj);
+		append(&buf, " ");
+		append(&buf, gstr.pDEFS);
+		append(&buf, " ");
+		append(&buf, gstr.pCFLAGS);
+		append(&buf, " ");
+		append(&buf, gstr.pINCS);
+		append(&buf, " ");
+		append(&buf, src);
+
+		append (pObject, " ");
+		append (pObject, obj);
+
+		printf("Compiling %s...\n", src);
+
+		if (system(buf)) ++*compile_errors;
+
+		  /* advance to next token */
+		ptr1 = ptr2 + 1;
+		ptr2 = strchr(ptr1, ' ');
+	}
+
+	free(buf);
+	free(src);
+	free(obj);
+}
+
+/* using the global strings, compile and link */
+
+static void compile_and_link()
+{
+	char *buf=0;
+	int iRet, compile_errors = 0;
+
+	  /* To make the output match iverilog-vpi.sh do not print out the
+	   * root directories */
+
+//	printf("MinGW root directory:  %s.\n", gstr.pMINGW);
+	checkMingwDir(gstr.pMINGW);
+
+//	printf("Icarus Verilog root directory:  %s.\n", gstr.pIVL);
+	checkIvlDir(gstr.pIVL);
+
+	  /* compile the C source files (*.c) */
+	compile(gstr.pCCSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CC );
+	  /* compile the C++ source files (*.cc, *.cpp) */
+	compile(gstr.pCXSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CXX);
+
+	if (compile_errors) {
+		fprintf(stderr,"iverilog-vpi: %d file(s) failed to compile.\n",
+		        compile_errors);
+		myExit(2);
+	}
+
+	  /* link */
+	assign(&buf, gstr.pLD);
+	append(&buf, " -o ");
+	append(&buf, gstr.pOUT);
+	append(&buf, " ");
+	append(&buf, IVERILOG_VPI_LDFLAGS);
+	append(&buf, " ");
+	append(&buf, gstr.pOBJ);
+	append(&buf, " ");
+	append(&buf, gstr.pLIB);
+	append(&buf, " ");
+	append(&buf, gstr.pLDLIBS);
+
+	printf("Making %s from %s...\n", gstr.pOUT,gstr.pOBJ);
+
+	iRet = system(buf);
+	free(buf);
+	if (iRet) myExit(3);
+}
+
+/* program execution starts here */
+
+int main(int argc, char *argv[])
+{
+	init();
+
+	if (!parse(argc,argv)) usage();
+
+	setup_mingw_environment();
+	setup_ivl_environment();
+
+	  /* are there any source or object files specified */
+	if (*gstr.pOUT) compile_and_link();
+
+	myExit(0);
+	return 0; // eliminate warnings.
+}

driver-vpi/res.rc

@@ -0,0 +1,38 @@
+
+// LANGUAGE ENGLISH
+LANGUAGE 9, 4
+
+
+/////////////////////////////////////////////////////////////////////////////
+//
+// Version
+//
+
+1 VERSIONINFO
+ FILEVERSION 2002,11,13,0
+ PRODUCTVERSION 0,7,0,0
+ FILEFLAGSMASK 0x3fL
+ FILEFLAGS 0x2L
+ FILEOS 0x40004L
+ FILETYPE 0x2L
+ FILESUBTYPE 0x0L
+BEGIN
+    BLOCK "StringFileInfo"
+    BEGIN
+        BLOCK "040904b0"
+        BEGIN
+            VALUE "CompanyName", "Icarus Verilog\0"
+            VALUE "FileDescription", "Icarus Verilog VPI Tool\0"
+            VALUE "FileVersion", "2002, 11, 13, 0\0"
+            VALUE "InternalName", "iverilog-vpi\0"
+            VALUE "LegalCopyright", "Copyright 2002 Gus Baldauf\0"
+            VALUE "OriginalFilename", "iverilog-vpi.exe\0"
+            VALUE "ProductName", "Icarus Verilog\0"
+            VALUE "ProductVersion", "0, 7, 0, 0\0"
+        END
+    END
+    BLOCK "VarFileInfo"
+    BEGIN
+        VALUE "Translation", 0x409, 1200
+    END
+END

driver/.cvsignore

@@ -10,3 +10,6 @@ cfparse.output
 cflexor.c
 foo.*
 iverilog
+iverilog.ps
+iverilog.pdf
+tmp.pdf

driver/Makefile.in

@@ -3,9 +3,7 @@
 #    and/or modify it in source code form under the terms of the GNU
 #    Library General Public License as published by the Free Software
 #    Foundation; either version 2 of the License, or (at your option)
-#    any later version. In order to redistribute the software in
-#    binary form, you will need a Picture Elements Binary Software
-#    License.
+#    any later version.
 #
 #    This program is distributed in the hope that it will be useful,
 #    but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -18,16 +16,17 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.13 2002/06/23 20:10:51 steve Exp $"
+#ident "$Id: Makefile.in,v 1.26 2007/02/06 05:07:31 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-VERSION = 0.6
+VERSION = 0.9.devel
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
 srcdir = @srcdir@
+datarootdir = @datarootdir@
 
 VPATH = $(srcdir)
 
@@ -37,17 +36,14 @@ includedir = $(prefix)/include
 mandir = @mandir@
 
 dllib=@DLLIB@
-rdynamic=@rdynamic@
 
 CC = @CC@
-CXX = @CXX@
 INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 
-CPPFLAGS = @CPPFLAGS@ @DEFS@
-CFLAGS = @CFLAGS@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"'
-CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)/..
+CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
+CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 
 all: iverilog@EXEEXT@
@@ -55,18 +51,16 @@ all: iverilog@EXEEXT@
 clean:
 	rm -f *.o lexor.c parse.c parse.h parse.output
 	rm -f cflexor.c cfparse.c cfparse.h cfparse.output
+	rm -f iverilog@EXEEXT@ iverilog.pdf iverilog.ps
 
-O = main.o build_string.o lexor.o parse.o substit.o cflexor.o cfparse.o
+distclean: clean
+	rm -f Makefile
+
+O = main.o substit.o cflexor.o cfparse.o
 
 iverilog@EXEEXT@: $O
 	$(CC) $(LDFLAGS) $O -o iverilog@EXEEXT@ @EXTRALIBS@
 
-lexor.c: lexor.lex
-	flex -s -olexor.c $(srcdir)/lexor.lex
-
-parse.h parse.c: parse.y
-	bison --verbose -t -d -o parse.c $(srcdir)/parse.y
-
 cflexor.c: cflexor.lex
 	flex -s -Pcf -ocflexor.c $(srcdir)/cflexor.lex
 
@@ -74,12 +68,10 @@ cfparse.h cfparse.c: cfparse.y
 	bison --verbose -t -d -o cfparse.c --name-prefix=cf $(srcdir)/cfparse.y
 
 
-main.o: main.c globals.h
-	$(CC) $(CFLAGS) -c -DCXX='"@CXX@"' -DIVL_ROOT='"@libdir@/ivl"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DRDYNAMIC=\"$(rdynamic)\" -DDLLIB='"@DLLIB@"' -DEXEEXT='"@EXEEXT@"' $(srcdir)/main.c
+main.o: main.c globals.h ../version.h
+	$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
 
 build_string.o: build_string.c globals.h
-lexor.o: lexor.c parse.h globals.h
-parse.o: parse.c globals.h
 cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
 cfparse.o: cfparse.c globals.h cfparse_misc.h
 
@@ -89,9 +81,9 @@ iverilog.ps: $(srcdir)/iverilog.man
 iverilog.pdf: iverilog.ps
 	ps2pdf iverilog.ps iverilog.pdf
 
-ifeq (@WIN32@,yes)
-INSTALL_DOC = $(prefix)/iverilog.pdf
-INSTALL_DOCDIR =
+ifeq (@MING32@,yes)
+INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
+INSTALL_DOCDIR = $(mandir)/man1
 all: iverilog.pdf
 else
 INSTALL_DOC = $(mandir)/man1/iverilog.1
@@ -114,4 +106,4 @@ installdirs: ../mkinstalldirs
 
 uninstall:
 	rm -f $(bindir)/iverilog@EXEEXT@
-	rm -f $(mandir)/man1/iverilog.1
+	rm -f $(mandir)/man1/iverilog.1 $(prefix)/iverilog.pdf

driver/build_string.c

@@ -1,202 +0,0 @@
-/*
- * Copyright (c) 2000 Stephen Williams ([email protected])
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: build_string.c,v 1.10 2002/05/28 02:25:03 steve Exp $"
-#endif
-
-# include "config.h"
-
-# include  "globals.h"
-# include  <string.h>
-# include  <assert.h>
-
-int build_string(char*output, size_t olen, const char*pattern)
-{
-      char tmp_buf[1024];
-
-      char*output_save = output;
-      while (*pattern) {
-
-	    if (*pattern == '%') {
-		  pattern += 1;
-		  switch (*pattern) {
-		      case 0:
-			break;
-
-		      case '%':
-			*output++ = '%';
-			break;
-
-		      case '[': {
-			    const char*tail;
-			    pattern += 1;
-			    assert(*pattern);
-			    tail = strchr(pattern+1, ']');
-			    assert(tail);
-			    strncpy(tmp_buf, pattern+1, tail-pattern-1);
-			    tmp_buf[tail-pattern-1] = 0;
-
-			    if (((*pattern == 's') && start)
-				|| ((*pattern == 'v') && verbose_flag)
-				|| ((*pattern == 'M') && depfile)
-				|| ((*pattern == 'N') && npath)
-				|| ((*pattern == 'T') && mtm)) {
-				  int rc = build_string(output, olen,
-							tmp_buf);
-				  output += rc;
-				  olen -= rc;
-			    }
-			    pattern = tail;
-			    break;
-		      }
-
-		      case 'B':
-			strcpy(output, base);
-			output += strlen(base);
-			olen -= strlen(base);
-			break;
-
-		      case 'C':
-			strcpy(output, iconfig_path);
-			output += strlen(iconfig_path);
-			olen -= strlen(iconfig_path);
-			break;
-
-		      case 'g':
-			strcpy(output, generation);
-			output += strlen(generation);
-			olen -= strlen(generation);
-			break;
-
-		      case 'f':
-			if (f_list) {
-			      strcpy(output, f_list);
-			      output += strlen(f_list);
-			      olen -= strlen(f_list);
-			}
-			break;
-
-		      case 'm':
-			if (mod_list) {
-			      strcpy(output, mod_list);
-			      output += strlen(mod_list);
-			      olen -= strlen(mod_list);
-			}
-			break;
-
-		      case 'M':
-			if (depfile) {
-			      strcpy(output, depfile);
-			      output += strlen(depfile);
-			      olen -= strlen(depfile);
-			}
-			break;
-
-		      case 'N':
-			if (npath) {
-			      strcpy(output, npath);
-			      output += strlen(npath);
-			      olen -= strlen(npath);
-			}
-			break;
-
-		      case 'o':
-			strcpy(output, opath);
-			output += strlen(opath);
-			olen -= strlen(opath);
-			break;
-
-		      case 's':
-			if (start) {
-			      strcpy(output, start);
-			      output += strlen(start);
-			      olen -= strlen(start);
-			}
-			break;
-
-		      case 'T':
-			if (mtm) {
-			      strcpy(output, mtm);
-			      output += strlen(mtm);
-			      olen -= strlen(mtm);
-			}
-			break;
-
-		      case 't':
-			strcpy(output, targ);
-			output += strlen(targ);
-			olen -= strlen(targ);
-			break;
-
-		      case 'W':
-			strcpy(output, warning_flags);
-			output += strlen(warning_flags);
-			olen -= strlen(warning_flags);
-			break;
-
-		  }
-		  pattern += 1;
-
-	    } else {
-		  *output++ = *pattern++;
-		  olen -= 1;
-	    }
-      }
-
-      *output = 0;
-      return output-output_save;
-}
-
-/*
- * $Log: build_string.c,v $
- * Revision 1.10  2002/05/28 02:25:03  steve
- *  Pass library paths through -Cfile instead of command line.
- *
- * Revision 1.9  2002/05/28 00:50:39  steve
- *  Add the ivl -C flag for bulk configuration
- *  from the driver, and use that to run library
- *  modules through the preprocessor.
- *
- * Revision 1.8  2002/05/24 01:13:00  steve
- *  Support language generation flag -g.
- *
- * Revision 1.7  2002/04/04 05:26:13  steve
- *  Add dependency generation.
- *
- * Revision 1.6  2001/11/16 05:07:19  steve
- *  Add support for +libext+ in command files.
- *
- * Revision 1.5  2001/10/20 23:02:40  steve
- *  Add automatic module libraries.
- *
- * Revision 1.4  2001/07/25 03:10:50  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.3  2001/07/03 04:09:25  steve
- *  Generate verbuse status messages (Stephan Boettcher)
- *
- * Revision 1.2  2000/10/28 03:45:47  steve
- *  Use the conf file to generate the vvm ivl string.
- *
- * Revision 1.1  2000/10/08 22:36:56  steve
- *  iverilog with an iverilog.conf configuration file.
- *
- */
-

driver/cflexor.lex

@@ -1,4 +1,7 @@
 
+%option nounput
+%option noinput
+
 %{
 /*
  * Copyright (c) 2001 Stephen Williams ([email protected])
@@ -18,8 +21,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: cflexor.lex,v 1.6 2002/05/28 20:40:37 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: cflexor.lex,v 1.11 2007/03/22 16:08:18 steve Exp $"
 #endif
 
 # include  "cfparse.h"
@@ -27,34 +30,40 @@
 # include  "globals.h"
 # include  <string.h>
 
-/*
- * Lexical location information is passed in the yylloc variable to th
- * parser. The file names, strings, are kept in a list so that I can
- * re-use them. The set_file_name function will return a pointer to
- * the name as it exists in the list (and delete the passed string.)
- * If the name is new, it will be added to the list.
- */
-YYLTYPE yylloc;
-
 static int comment_enter;
+static char* trim_trailing_white(char*txt, int trim);
+
+/*
+ * Mostly copied from the flex manual. Do not make this arbitrary
+ * depth without checking for looping files.
+ */
+#define MAX_CMDFILE_DEPTH 15
+
+typedef struct t_cmdfile {
+      char *cmdfile;
+      YY_BUFFER_STATE buffer;
+} s_cmdfile;
+s_cmdfile cmdfile_stack[MAX_CMDFILE_DEPTH];
+int cmdfile_stack_ptr = 0;
 
 %}
 
 %x CCOMMENT
 %x LCOMMENT
 %x PLUS_ARGS
+%x FILE_NAME
 
 %%
 
   /* Accept C++ style comments. */
 "//".* { comment_enter = YY_START; BEGIN(LCOMMENT); }
 <LCOMMENT>.    { yymore(); }
-<LCOMMENT>\n   { yylloc.first_line += 1; BEGIN(comment_enter); }
+<LCOMMENT>\n   { cflloc.first_line += 1; BEGIN(comment_enter); }
 
   /* Accept C style comments. */
 "/*" { comment_enter = YY_START; BEGIN(CCOMMENT); }
 <CCOMMENT>.    { yymore(); }
-<CCOMMENT>\n   { yylloc.first_line += 1; yymore(); }
+<CCOMMENT>\n   { cflloc.first_line += 1; yymore(); }
 <CCOMMENT>"*/" { BEGIN(comment_enter); }
 
   /* Accept shell type comments. */
@@ -63,7 +72,7 @@ static int comment_enter;
   /* Skip white space. */
 [ \t\f\r] { ; }
   /* Skip line ends, but also count the line. */
-\n { yylloc.first_line += 1; }
+\n { cflloc.first_line += 1; }
 
 
 "+define+" { BEGIN(PLUS_ARGS); return TOK_DEFINE; }
@@ -76,6 +85,7 @@ static int comment_enter;
 
 "+libext+" { BEGIN(PLUS_ARGS); return TOK_LIBEXT; }
 
+"+integer-width+" { BEGIN(PLUS_ARGS); return TOK_INTEGER_WIDTH; }
 
   /* If it is not any known plus-flag, return the generic form. */
 "+"[^\n \t\b\f\r+]* {
@@ -97,12 +107,16 @@ static int comment_enter;
 <PLUS_ARGS>[ \t\b\f\r] { BEGIN(0); }
 
 <PLUS_ARGS>\n {
-      yylloc.first_line += 1;
+      cflloc.first_line += 1;
       BEGIN(0); }
 
   /* Notice the -a flag. */
 "-a" { return TOK_Da; }
 
+  /* Notice the -c or -f flag. */
+"-c" { return TOK_Dc; }
+"-f" { return TOK_Dc; }
+
   /* Notice the -v flag. */
 "-v" { return TOK_Dv; }
 
@@ -112,26 +126,113 @@ static int comment_enter;
   /* This rule matches paths and strings that may be file names. This
      is a little bit tricky, as we don't want to mistake a comment for
      a string word. */
-"/"[^\*\/].* { cflval.text = strdup(yytext);
-               return TOK_STRING; } 
-
-[^/\n \t\b\r+-].* { cflval.text = strdup(yytext);
-                   return TOK_STRING; } 
+"/"[\r\n] { /* Special case of file name "/" */
+      cflval.text = trim_trailing_white(yytext, 0);
+      return TOK_STRING; }
+"/"[^\*\/] { /* A file name that starts with "/". */
+      yymore();
+      BEGIN(FILE_NAME); }
+[^/\n \t\b\r+-][^/\n\r]* { /* A file name that starts with other than "/" */
+      yymore();
+      BEGIN(FILE_NAME); }
 
+<FILE_NAME>"//" {
+	/* Found a trailing comment. Returning the terminated name. */
+      cflval.text = trim_trailing_white(yytext, 2);
+      BEGIN(LCOMMENT);
+      return TOK_STRING; }
+<FILE_NAME>"/"?[^/\n\r]* {
+      yymore();
+      /* not a comment... continuing */; }
+<FILE_NAME>[\n\r] {
+	/* No trailing comment. Return the file name. */
+      cflval.text = trim_trailing_white(yytext, 0);
+      BEGIN(0);
+      return TOK_STRING; }
+       
   /* Fallback match. */
 . { return yytext[0]; }
 
+  /* At the end of file switch back to the previous buffer. */
+<<EOF>> {
+      if (--cmdfile_stack_ptr < 0) {
+	    free(current_file);
+	    yyterminate();
+      } else {
+	    yy_delete_buffer(YY_CURRENT_BUFFER);
+	    yy_switch_to_buffer(cmdfile_stack[cmdfile_stack_ptr].buffer);
+	    free(current_file);
+	    current_file = cmdfile_stack[cmdfile_stack_ptr].cmdfile;
+      } }
+
 %%
 
+static char* trim_trailing_white(char*text, int trim)
+{
+      char*cp = text + strlen(text);
+      while (cp > text && trim > 0) {
+	    trim -= 1;
+	    cp -= 1;
+	    *cp = 0;
+      }
+      while (cp > text && strchr("\n\r\t\b", cp[-1]))
+	    cp -= 1;
+
+      cp[0] = 0;
+      return strdup(text);
+}
+
 int yywrap()
 {
       return 1;
 }
 
+void switch_to_command_file(const char *file)
+{
+      char path[4096];
+      char *cp;
+
+      if (cmdfile_stack_ptr >= MAX_CMDFILE_DEPTH) {
+	    fprintf(stderr, "Error: command files nested too deeply (%d) "
+                    "at %s:%d.\n", MAX_CMDFILE_DEPTH, current_file,
+                    cflloc.first_line);
+	    exit(1);
+      }
+
+      cmdfile_stack[cmdfile_stack_ptr].buffer = YY_CURRENT_BUFFER;
+      cmdfile_stack[cmdfile_stack_ptr].cmdfile = current_file;
+      cmdfile_stack_ptr += 1;
+
+        /*
+         * If this is a relative file then add the current path to the
+         * file name.
+         */
+      if (file[0] != '/') {
+	    strcpy(path, current_file);
+	    cp = strrchr(path, '/');
+	    if (cp == 0) strcpy(path, file);  /* A base file. */
+	    else {
+	          *(cp+1) = '\0';
+	          strcat(path, file);
+	    }
+      } else strcpy(path, file);  /* An absolute path. */
+
+      yyin = fopen(path, "r");
+      if (yyin == NULL) {
+	    fprintf(stderr, "Error: unable to read nested command file (%s) "
+                    "at %s:%d.\n", path, current_file, cflloc.first_line);
+	    exit(1);
+      }
+
+      current_file = strdup(path);
+      yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE));
+      cflloc.first_line = 1;
+}
+
 void cfreset(FILE*fd, const char*path)
 {
       yyin = fd;
       yyrestart(fd);
-      yylloc.first_line = 1;
-      yylloc.text = (char*)path;
+      current_file = strdup(path);
+      cflloc.first_line = 1;
 }

driver/cfparse.y

@@ -17,14 +17,17 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: cfparse.y,v 1.8 2002/06/23 20:10:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: cfparse.y,v 1.12 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 
 # include  "globals.h"
 # include  "cfparse_misc.h"
 # include  <ctype.h>
+# include  <stdlib.h>
+# include  <string.h>
+
 
 /*
  * This flag is set to 0, 1 or 2 if file names are to be translated to
@@ -57,8 +60,9 @@ static void translate_file_name(char*text)
       char*text;
 };
 
-%token TOK_Da TOK_Dv TOK_Dy
+%token TOK_Da TOK_Dc TOK_Dv TOK_Dy
 %token TOK_DEFINE TOK_INCDIR TOK_LIBDIR TOK_LIBDIR_NOCASE TOK_LIBEXT
+%token TOK_INTEGER_WIDTH
 %token <text> TOK_PLUSARG TOK_PLUSWORD TOK_STRING
 
 %%
@@ -80,7 +84,7 @@ item
 	: TOK_STRING
 		{ char*tmp = substitutions($1);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
+		  process_file_name(tmp, 0);
 		  free($1);
 		  free(tmp);
 		}
@@ -89,15 +93,23 @@ item
 
         | TOK_Da { }
 
+  /* Match a -c <cmdfile> or -f <cmdfile> */
+
+        | TOK_Dc TOK_STRING
+		{ char*tmp = substitutions($2);
+		  translate_file_name(tmp);
+		  switch_to_command_file(tmp);
+		  free($2);
+		  free(tmp);
+		}
+
   /* The -v <libfile> flag is ignored, and the <libfile> is processed
      as an ordinary source file. */
 
         | TOK_Dv TOK_STRING
 		{ char*tmp = substitutions($2);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
-		  fprintf(stderr, "%s:%u: Ignoring -v in front of %s\n",
-			  @1.text, @1.first_line, $2);
+		  process_file_name(tmp, 1);
 		  free($2);
 		  free(tmp);
 		}
@@ -142,6 +154,15 @@ item
 
 	| TOK_LIBEXT libext_args
 
+  /* These are various misc flags that are supported. */
+
+	| TOK_INTEGER_WIDTH TOK_PLUSARG
+                { char*tmp = substitutions($2);
+		  free($2);
+		  integer_width = strtoul(tmp,0,10);
+		  free(tmp);
+		}
+
   /* The +<word> tokens that are not otherwise matched, are
      ignored. The skip_args rule arranges for all the argument words
      to be consumed. */
@@ -162,6 +183,12 @@ item
 		  }
 		  free($1);
 		}
+
+	| error
+		{ fprintf(stderr, "Error: unable to parse line %d in "
+		          "%s.\n", cflloc.first_line, current_file);
+		  return 1;
+		}
 	;
 
   /* inc_args are +incdir+ arguments in order. */
@@ -207,4 +234,5 @@ skip_arg : TOK_PLUSARG
 
 int yyerror(const char*msg)
 {
+	return 0;
 }

driver/cfparse_misc.h

@@ -19,9 +19,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: cfparse_misc.h,v 1.3 2002/01/02 02:39:34 steve Exp $"
-#endif
 
 /*
  * The vlltype supports the passing of detailed source file location
@@ -36,19 +33,11 @@ struct cfltype {
       const char*text;
 };
 # define YYLTYPE struct cfltype
-extern YYLTYPE yylloc;
 
-/*
- * $Log: cfparse_misc.h,v $
- * Revision 1.3  2002/01/02 02:39:34  steve
- *  Use my own cfltype to defend against bison 1.30.
- *
- * Revision 1.2  2001/11/12 18:47:32  steve
- *  Support +incdir in command files, and ignore other
- *  +args flags. Also ignore -a and -v flags.
- *
- * Revision 1.1  2001/11/12 01:26:36  steve
- *  More sophisticated command file parser.
- *
- */
+int cflex(void);
+int cferror(const char *);
+int cfparse(void);
+void switch_to_command_file(const char *);
+char *current_file;
+
 #endif

driver/globals.h

@@ -18,8 +18,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: globals.h,v 1.15 2002/06/23 20:10:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: globals.h,v 1.21 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include  <stddef.h>
@@ -29,20 +29,12 @@ extern const char*base;
 
   /* This is the path to the iconfig file sent to ivl. */
 extern char* iconfig_path;
+extern char* iconfig_common_path;
 
-  /* This is a list of all the -f<key>=<value> options from the
-     command line, concatenated together. */
-extern char*f_list;
-
-extern char*mod_list;
-
-  /* This is the optional -Tmin|typ|max setting. */
-extern const char*mtm;
-
-  /* Ths is the optional -M<dependfile> value, if one was supplied. */
+  /* This is the optional -M<dependfile> value, if one was supplied. */
 extern const char*depfile;
 
-  /* Ths is the optional -N<path> value, if one was supplied. */
+  /* This is the optional -N<path> value, if one was supplied. */
 extern const char*npath;
 
   /* This is the name of the output file that the user selected. */
@@ -57,14 +49,14 @@ extern int synth_flag;
   /* This is the name of the selected target. */
 extern const char*targ;
 
-  /* This is the language generation flag. */
-extern const char*generation;
+  /* This is the integer-width argument that will be passed to ivl. */
+extern unsigned integer_width;
 
   /* Perform variable substitutions on the string. */
 extern char* substitutions(const char*str);
 
   /* Add the name to the list of source files. */
-extern void process_file_name(const char*name);
+extern void process_file_name(const char*name, int lib_flag);
 
   /* Add the name to the list of library directories. */
 extern void process_library_switch(const char*name);
@@ -86,12 +78,26 @@ extern char warning_flags[];
 extern char* library_flags;
 extern char* library_flags2;
 
-extern const char*lookup_pattern(const char*key);
-
-extern int build_string(char*out, size_t olen, const char*pattern);
-
 /*
  * $Log: globals.h,v $
+ * Revision 1.21  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.20  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.19  2003/11/18 06:31:46  steve
+ *  Remove the iverilog.conf file.
+ *
+ * Revision 1.18  2003/11/13 04:09:49  steve
+ *  Pass flags through the temporary config file.
+ *
+ * Revision 1.17  2003/11/01 04:21:57  steve
+ *  Add support for a target static config file.
+ *
+ * Revision 1.16  2002/08/12 01:35:01  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.15  2002/06/23 20:10:51  steve
  *  Variable substitution in command files.
  *
@@ -103,44 +109,5 @@ extern int build_string(char*out, size_t olen, const char*pattern);
  *  Add the ivl -C flag for bulk configuration
  *  from the driver, and use that to run library
  *  modules through the preprocessor.
- *
- * Revision 1.12  2002/05/24 01:13:00  steve
- *  Support language generation flag -g.
- *
- * Revision 1.11  2002/04/04 05:26:13  steve
- *  Add dependency generation.
- *
- * Revision 1.10  2001/11/16 05:07:19  steve
- *  Add support for +libext+ in command files.
- *
- * Revision 1.9  2001/11/13 03:30:26  steve
- *  The +incdir+ plusarg can take multiple directores,
- *  and add initial support for +define+ in the command file.
- *
- * Revision 1.8  2001/11/12 18:47:32  steve
- *  Support +incdir in command files, and ignore other
- *  +args flags. Also ignore -a and -v flags.
- *
- * Revision 1.7  2001/11/12 01:26:36  steve
- *  More sophisticated command file parser.
- *
- * Revision 1.6  2001/10/23 00:37:30  steve
- *  The -s flag can now be repeated on the iverilog command.
- *
- * Revision 1.5  2001/10/20 23:02:40  steve
- *  Add automatic module libraries.
- *
- * Revision 1.4  2001/07/03 04:09:25  steve
- *  Generate verbuse status messages (Stephan Boettcher)
- *
- * Revision 1.3  2000/11/09 21:58:00  steve
- *  Remember to include the -S condition.
- *
- * Revision 1.2  2000/10/28 03:45:47  steve
- *  Use the conf file to generate the vvm ivl string.
- *
- * Revision 1.1  2000/10/08 22:36:56  steve
- *  iverilog with an iverilog.conf configuration file.
- *
  */
 #endif

driver/iverilog.man

@@ -1,10 +1,11 @@
-.TH iverilog 1 "$Date: 2002/06/23 20:10:51 $" Version "$Date: 2002/06/23 20:10:51 $"
+.TH iverilog 1 "April 22nd, 2008" Version "0.9.devel"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
 .SH SYNOPSIS
 .B iverilog
-[-ESVv] [-Cpath] [-ccmdfile] [-g1|-g2|-g3.0] [-Dmacro[=defn]] [-pflag=value]
+[-ESVv] [-Bpath] [-ccmdfile|-fcmdfile] [-Dmacro[=defn]] [-pflag=value]
+[-dname] [-g1995|-g2001|-g2005|-g<feature>]
 [-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename]
 [-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile
 
@@ -21,26 +22,19 @@ types are added as code generators are implemented.
 \fIiverilog\fP accepts the following options:
 .TP 8
 .B -B\fIbase\fP
-The \fIiverilog\fP program uses external programs to preprocess and
-compile the Verilog source. Normally, the path used to locate these
-tools is built into the \fIiverilog\fP program. However, the \fB-B\fP
-switch allows the user to select a different set of programs. The path
-given is used to locate \fIivlpp\fP, \fIivl\fP and the VPI modules.
+The \fIiverilog\fP program uses external programs and configuration
+files to preprocess and compile the Verilog source. Normally, the path
+used to locate these tools is built into the \fIiverilog\fP
+program. However, the \fB-B\fP switch allows the user to select a
+different set of programs. The path given is used to locate
+\fIivlpp\fP, \fIivl\fP, code generators and the VPI modules.
 .TP 8
-.B -c\fIfile\fP
-This flag specifies an input file that contains a list of Verilog
+.B -c\fIfile\fP -f\fIfile\fP
+These flags specifies an input file that contains a list of Verilog
 source files. This is similar to the \fIcommand file\fP of other
 Verilog simulators, in that it is a file that contains the file names
 instead of taking them on the command line. See \fBCommand Files\fP below.
 .TP 8
-.B -C\fIpath\fP
-This flag selects the driver configuration file to use. Normally, the
-iverilog program will read its configuration file from
-/usr/lib/ivl/iverilog.conf (or the install path configured at compile
-time) but the user can specify the path to a different configuration
-file. This is useful when testing new configuration files. See the
-installed configuration file for a summary of the file format.
-.TP 8
 .B -D\fImacro\fP
 Defines macro \fImacro\fP with the string `1' as its definition. This
 form is normally only used to trigger ifdef conditionals in the
@@ -49,22 +43,61 @@ Verilog source.
 .B -D\fImacro=defn\fP
 Defines macro \fImacro\fP as \fIdefn\fP.
 .TP 8
+.B -d\fIname\fP
+Activate a class of compiler debugging messages. The \fB-d\fP switch may
+be used as often as necessary to activate all the desired messages.
+Supported names are scopes, eval_tree, elaborate, and synth2;
+any other names are ignored.
+.TP 8
 .B -E
 Preprocess the Verilog source, but do not compile it. The output file
 is the Verilog input, but with file inclusions and macro references
 expanded and removed. This is useful, for example, to preprocess
 Verilog source for use by other compilers.
 .TP 8
-.B -g1\fI|\fP-g2\fI|\fP-g3.0
+.B -g1995\fI|\fP-g2001\fI|\fP-g2005
 Select the Verilog language \fIgeneration\fP to support in the
-compiler. This selects between \fIIEEE1364-1995\fP(1),
-\fIIEEE1364-2001\fP(2), or \fISystemVerilog 3.0\fP(3.0). Normally,
+compiler. This selects between \fIIEEE1364-1995\fP,
+\fIIEEE1364-2001\fP(2), or \fIIEEE1364-2005\fP. Normally,
 Icarus Verilog defaults to the latest known generation of the
 language. This flag is most useful to restrict the language to a set
 supported by tools of specific generations, for compatibility with
 other tools.
 .TP 8
-.B -I\fIincludedir\fP 
+.B -gverilog-ams\fI|-fP-gno-verilog-ams
+Enable or disable (default) support for Verilog-AMS.
+.TP 8
+.B -gspecify\fI|\fP-gno-specify
+Enable (default) or disable specify block support. When enabled,
+specify block code is elaborated. When disabled, specify blocks are
+parsed but ignored. Specify blocks are commonly not needed for RTL
+simulation, and in fact can hurt performance of the
+simulation. However, disabling specify blocks reduces accuracy of
+full-timing simulations.
+.TP 8
+.B -gstd-include\fI|\fP-gno-std-include
+Enable (default) or disable the search of a standard installation
+include directory after all other explicit include directories. This
+standard include directory is a convenient place to install standard
+header files that a Verilog program may include.
+.TP 8
+.B -gxtypes\fI|\fP-gno-xtypes
+Enable (default) or disable support for extended types. Enabling
+extended types allows for new types that are supported by Icarus
+Verilog as extensions beyond the baseline Verilog. It may be necessary
+to disable extended types if compiling code that clashes with the few
+new keywords used to implement the type system.
+.TP 8
+.B -gio-range-error\fI|\fP-gno-io-range-error
+The standards requires that a vectored port have matching ranges for its
+port declaration as well as any net/register declaration. It was common
+practice in the past to only specify the range for the net/register
+declaration and some tools still allow this. By default any mismatch is
+reported as a error. Using \fI-gno-io-range-error\fP will produce a
+warning instead of a fatal error for the case of a vectored net/register
+and a scalar port declaration.
+.TP 8
+.B -I\fIincludedir\fP
 Append directory \fIincludedir\fP to list of directories searched
 for Verilog include files. The \fB-I\fP switch may be used many times
 to specify several directories to search, the directories are searched
@@ -81,6 +114,8 @@ leading or trailing space.
 Add this module to the list of VPI modules to be loaded by the
 simulation. Many modules can be specified, and all will be loaded, in
 the order specified. The system module is implicit and always included.
+If a System Function Table file (<module>.sft) exists for the module it
+will be loaded automatically.
 .TP 8
 .B -N\fIpath\fP
 This is used for debugging the compiler proper. Dump the final netlist
@@ -115,9 +150,9 @@ they will be used as root modules instead.
 .B -T\fImin|typ|max\fP
 Use this switch to select min, typ or max times from min:typ:max
 expressions. Normally, the compiler will simply use the typ value from
-these expressions (with a warning) but this switch will tell the
-compiler explicitly which value to use. This will suppress the
-warning that the compiler is making a choice.
+these expressions (printing a warning for the first ten it finds) but
+this switch will tell the compiler explicitly which value to use. This
+will suppress the warning that the compiler is making a choice.
 .TP 8
 .B -t\fItarget\fP
 Use this switch to specify the target output format. See the
@@ -127,7 +162,11 @@ Use this switch to specify the target output format. See the
 Turn on verbose messages. This will print the command lines that are
 executed to perform the actual compilation, along with version
 information from the various components, as well as the version of the
-product as a whole.
+product as a whole.  You will notice that the command lines include
+a reference to a key temporary file that passes information to the
+compiler proper.  To keep that file from being deleted at the end
+of the process, provide a file name of your own in the environment
+variable \fBIVERILOG_ICONFIG\fP.
 .TP 8
 .B -V
 Print the version of the compiler, and exit.
@@ -175,18 +214,19 @@ but must be run by the \fBvvp\fP command.
 .TP 8
 .B xnf
 This is the Xilinx Netlist Format used by many tools for placing
-devices in FPGAs or other programmable devices. The Icarus Verilog XNF
-code generator can generate complete designs or XNF macros that can be
-imported into larger designs by other tools. (This target is obsolete,
-use the \fBfpga\fP target instead.)
+devices in FPGAs or other programmable devices. This target is
+obsolete, use the \fBfpga\fP target instead.
 .TP 8
 .B fpga
 This is a synthesis target that supports a variety of fpga devices,
-mostly by EDIF format output.
+mostly by EDIF format output. The Icarus Verilog fpga code generator
+can generate complete designs or EDIF macros that can in turn be
+imported into larger designs by other tools. The \fBfpga\fP target
+implies the synthesis \fB-S\fP flag.
 
 .SH "WARNING TYPES"
 These are the types of warnings that can be selected by the \fB-W\fP
-switch. All the warning types (other then \fBall\fP) can also be
+switch. All the warning types (other than \fBall\fP) can also be
 prefixed with \fBno-\fP to turn off that warning. This is most useful
 after a \fB-Wall\fP argument to suppress isolated warning types.
 
@@ -200,6 +240,12 @@ This enables warnings for creation of implicit declarations. For
 example, if a scalar wire X is used but not declared in the Verilog
 source, this will print a warning at its first use.
 
+.TP 8
+.B portbind
+This enables warnings for ports of module instantiations that are not
+connected but probably should be. Dangling input ports, for example,
+will generate a warning.
+
 .TP 8
 .B timescale
 This enables warnings for inconsistent use of the timescale
@@ -208,6 +254,48 @@ inherit timescale from another file. Both probably mean that
 timescales are inconsistent, and simulation timing can be confusing
 and dependent on compilation order.
 
+.TP 8
+.B infloop
+This enables warnings for \fRalways\fP statements that may have runtime
+infinite loops (has paths with no or zero delay). This class of warnings
+is not included in \fB-Wall\fP and hence does not have a \fBno-\fP variant.
+A fatal error message will always be printed when the compiler can
+determine that there will definitely be an infinite loop (all paths have
+no or zero delay).
+
+When you suspect an always statement is producing a runtime infinite loop
+use this flag to find the always statements that need to have their logic
+verified. It is expected that many of the warnings will be false
+positives, since the code treats the value of all variables and signals
+as indeterminate.
+
+.SH "SYSTEM FUNCTION TABLE FILES"
+If the source file name as a \fB.sft\fP suffix, then it is taken to be
+a system function table file. A System function table file is used to
+describe to the compiler the return types for system functions. This
+is necessary because the compiler needs this information to elaborate
+expressions that contain these system functions, but cannot run the
+sizetf functions since it has no run-time.
+
+The format of the table is ASCII, one function per line. Empty lines
+are ignored, and lines that start with the '\fI#\fP' character are
+comment lines. Each non-comment line starts with the function name,
+then the vpi type (i.e. vpiSysFuncReal). The following types are
+supported:
+
+.TP 8
+.B vpiSysFuncReal
+The function returns a real/realtime value.
+
+.TP 8
+.B vpiSysFuncInt
+The function returns an integer.
+
+.TP 8
+.B vpiSysFuncSized <wid> <signed|unsigned>
+The function returns a vector with the given width, and is signed or
+unsigned according to the flag.
+
 .SH "COMMAND FILES"
 The command file allows the user to place source file names and
 certain command line switches into a text file instead of on a long
@@ -218,7 +306,13 @@ well as # comments, if the # starts the line.
 .I "file name"
 A simple file name or file path is taken to be the name of a Verilog
 source file. The path starts with the first non-white-space
-character. Variables are substitued in file names.
+character. Variables are substituted in file names.
+
+.TP 8
+.B -c\ \fIcmdfile\fP -f\ \fIcmdfile\fP
+A \fB-c\fP or \fB-f\fP token prefixes a command file, exactly like it
+does on the command line. The cmdfile may be on the same line or the
+next non-comment line.
 
 .TP 8
 .B -y\ \fIlibdir\fP
@@ -273,19 +367,36 @@ become munged.
 .B +tolower-filename\fP
 This is similar to the \fB+toupper-filename\fP hack described above.
 
+.TP 8
+.B +integer-width+\fIvalue\fP
+This allows the programmer to select the width for integer variables
+in the Verilog source. The default is 32, the value can be any desired
+integer value.
+
 .SH "VARIABLES IN COMMAND FILES"
 
 In certain cases, iverilog supports variables in command files. These
 are strings of the form "$(\fIvarname\fP)", where \fIvarname\fP is the
 name of the environment variable to read. The entire string is
 replaced with the contents of that variable. Variables are only
-substitued in contexts that explicitly support them, including file
+substituted in contexts that explicitly support them, including file
 and directory strings.
 
 Variable values come from the operating system environment, and not
 from preprocessor defines elsewhere in the file or the command line.
 
-.SH EXAMPLES 
+.SH PREDEFINED MACROS
+
+The following macros are predefined by the compiler:
+.TP 8
+.B __ICARUS__ = 1\fP
+This is defined always when compiling with Icarus Verilog.
+
+.TP 8
+.B __VAMS_ENABLE__ = 1\fp
+This is defined if Verilog-AMS is enabled.
+
+.SH EXAMPLES
 These examples assume that you have a Verilog source file called hello.v in
 the current directory
 
@@ -314,9 +425,12 @@ Steve Williams ([email protected])
 vvp(1),
 .BR "<http://www.icarus.com/eda/verilog/>"
 
+Tips on using, debugging, and developing the compiler can be found at
+.BR "<http://iverilog.wikia.com/>"
+
 .SH COPYRIGHT
 .nf
-Copyright \(co  2002 Stephen Williams
+Copyright \(co  2002-2008 Stephen Williams
 
-This document can be freely redistributed according to the terms of the 
+This document can be freely redistributed according to the terms of the
 GNU General Public License version 2.0

driver/lexor.lex

@@ -1,80 +0,0 @@
-
-%{
-/*
- * Copyright (c) 2000 Stephen Williams ([email protected])
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: lexor.lex,v 1.5 2001/07/25 03:10:50 steve Exp $"
-#endif
-
-# include "config.h"
-
-# include  <string.h>
-# include  "parse.h"
-
-%}
-
-%x CTOKENS
-%x PATTERN
-
-%%
-
-"#".* { /* eat comments */; }
-
-"\n" { /* eat line-ends */; }
-"\r" { /* eat line-ends */; }
-
-"[" { BEGIN(CTOKENS); return '['; }
-
-<CTOKENS>"]" { BEGIN(0); return ']'; }
-
-<CTOKENS>[ \t\b]+ { /* skip white space */; }
-
-<CTOKENS>"-S" { return CT_S; }
-
-<CTOKENS>"-t"[a-zA-Z0-9\-_]+ {
-      yylval.text = strdup(yytext+2);
-      return CT_t; }
-
-"<"[^>]*">" {
-      BEGIN(PATTERN);
-      yylval.text = strdup(yytext);
-      return PATTERN_NAME; }
-
-<PATTERN>.* {
-      BEGIN(0);
-	/* Trim off a trailing \r. This is an issue in the DOS world. */
-      if (yytext[strlen(yytext)-1] == '\r')
-	    yytext[strlen(yytext)-1] = 0;
-
-      yylval.text = strdup(yytext);
-      return PATTERN_TEXT; }
-
-. { fprintf(stderr, "driver lexor: Unmatched character: %c\n", yytext[0]); }
-
-%%
-
-void reset_lexor(FILE*fd)
-{
-      yyrestart(fd);
-}
-
-int yywrap()
-{
-      return 1;
-}

driver/parse.y

@@ -1,167 +0,0 @@
-%{
-/*
- * Copyright (c) 2000 Stephen Williams ([email protected])
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: parse.y,v 1.5 2002/03/31 04:07:16 steve Exp $"
-#endif
-
-# include "config.h"
-
-# include  <stdio.h>
-#ifdef HAVE_MALLOC_H
-# include  <malloc.h>
-#endif
-# include  <stdlib.h>
-# include  "globals.h"
-
-
-void yyerror(const char*);
-
-enum drive_code_t {
-      CODE_S,
-      CODE_t,
-};
-
-struct drive_cond {
-      struct drive_cond*next;
-      enum drive_code_t code;
-      char* text;
-};
-
-static struct drive_cond *cur_cond = 0;
-
-static void add_cond(enum drive_code_t code, char*text)
-{
-      struct drive_cond*tmp;
-      tmp = calloc(1, sizeof(struct drive_cond));
-      tmp->code = code;
-      tmp->text = text;
-
-      tmp->next = cur_cond;
-      cur_cond = tmp;
-}
-
-struct drive_pattern {
-      struct drive_pattern*next;
-      char*name;
-      char*text;
-      struct drive_cond*cond;
-};
-
-static struct drive_pattern *patterns = 0;
-static struct drive_pattern *plast = 0;
-
-static void add_pattern(char*name, char*text)
-{
-      struct drive_pattern*tmp;
-      tmp = calloc(1, sizeof(struct drive_pattern));
-      tmp->name = name;
-      tmp->text = text;
-      tmp->cond = cur_cond;
-      tmp->next = 0;
-
-
-      if (plast) {
-	    plast->next = tmp;
-	    plast = tmp;
-      } else {
-	    patterns = tmp;
-	    plast = tmp;
-      }
-}
-
-const char*lookup_pattern(const char*key)
-{
-      struct drive_pattern*cur;
-      struct drive_cond*cc;
-
-      for (cur = patterns ;  cur ;  cur = cur->next) {
-
-	    if (strcmp(key, cur->name) != 0)
-		  continue;
-
-	    for (cc = cur->cond ;  cc ;  cc = cc->next) {
-
-		  switch (cc->code) {
-		      case CODE_S:
-			if (synth_flag)
-			      continue;
-			break;
-		      case CODE_t:
-			if (strcmp(targ, cc->text) == 0)
-			      continue;
-			break;
-		  }
-
-		  break;
-	    }
-
-	    if (cc) continue;
-
-	    return cur->text;
-      }
-
-      return 0;
-}
-
-%}
-
-%union {
-      char*text;
-};
-
-%token <text> PATTERN_NAME PATTERN_TEXT
-%token <text> CT_t
-%token CT_S
-
-%%
-
-start: section_list ;
-
-section_list
-	: section
-	| section_list section
-	;
-
-section : '[' ctoken_list ']' pattern_list { cur_cond = 0; } ;
-
-ctoken_list
-	: ctoken
-	| ctoken_list ctoken
-	;
-
-ctoken  : CT_S  { add_cond(CODE_S, 0); }
-	| CT_t  { add_cond(CODE_t, $1); }
-	;
-
-pattern_list
-	: pattern
-	| pattern_list pattern
-	;
-
-pattern : PATTERN_NAME PATTERN_TEXT
-		{ add_pattern($1, $2); }
-	;
-
-%%
-
-void yyerror(const char*msg)
-{
-      fprintf(stderr, "%s\n", msg);
-}

driver/substit.c

@@ -16,11 +16,15 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#ident "$Id: substit.c,v 1.1 2002/06/23 20:10:51 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: substit.c,v 1.5 2003/12/19 01:27:10 steve Exp $"
+#endif
 
 # include  <string.h>
-# include  <malloc.h>
 # include  <stdlib.h>
+#ifdef HAVE_MALLOC_H
+# include  <malloc.h>
+#endif
 
 
 char* substitutions(const char*str)
@@ -62,7 +66,7 @@ char* substitutions(const char*str)
 		  cp += strlen(cp);
 
 	    } else {
-		  if ( (cp - buf) == nbuf ) {
+		  if ( cp == (buf + nbuf) ) {
 			size_t old_size = nbuf;
 			nbuf = old_size + 32;
 			buf = realloc(buf, nbuf);
@@ -75,7 +79,7 @@ char* substitutions(const char*str)
 
 	/* Add the trailing nul to the string, and reallocate the
 	   buffer to be a tight fit. */
-      if ( (cp - buf) == nbuf ) {
+      if ( cp == (buf + nbuf) ) {
 	    size_t old_size = nbuf;
 	    nbuf = old_size + 1;
 	    buf = realloc(buf, nbuf);
@@ -92,6 +96,18 @@ char* substitutions(const char*str)
 
 /*
  * $Log: substit.c,v $
+ * Revision 1.5  2003/12/19 01:27:10  steve
+ *  Fix various unsigned compare warnings.
+ *
+ * Revision 1.4  2002/08/12 01:35:01  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.3  2002/08/11 23:47:04  steve
+ *  Add missing Log and Ident strings.
+ *
+ * Revision 1.2  2002/06/25 01:33:01  steve
+ *  include malloc.h only when available.
+ *
  * Revision 1.1  2002/06/23 20:10:51  steve
  *  Variable substitution in command files.
  *

dup_expr.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,15 +16,51 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: dup_expr.cc,v 1.7 2002/01/28 00:52:41 steve Exp $"
-#endif
 
 # include "config.h"
 
 # include  "netlist.h"
 # include  <cassert>
 
+NetEBComp* NetEBComp::dup_expr() const
+{
+      NetEBComp*tmp = new NetEBComp(op_, left_->dup_expr(),
+				    right_->dup_expr());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEConst* NetEConst::dup_expr() const
+{
+      NetEConst*tmp = new NetEConst(value_);
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEConstParam* NetEConstParam::dup_expr() const
+{
+      NetEConstParam*tmp = new NetEConstParam(scope_, name_, value());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetECRealParam* NetECRealParam::dup_expr() const
+{
+      NetECRealParam*tmp = new NetECRealParam(scope_, name_, value());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEEvent* NetEEvent::dup_expr() const
+{
+      assert(0);
+      return 0;
+}
+
 NetEScope* NetEScope::dup_expr() const
 {
       assert(0);
@@ -33,27 +69,35 @@ NetEScope* NetEScope::dup_expr() const
 
 NetESelect* NetESelect::dup_expr() const
 {
-      return new NetESelect(expr_->dup_expr(), base_->dup_expr(),
-			    expr_width());
+      NetESelect*tmp = new NetESelect(expr_->dup_expr(),
+			              base_? base_->dup_expr() : 0,
+			              expr_width());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
 }
 
 NetESFunc* NetESFunc::dup_expr() const
 {
-      NetESFunc*tmp = new NetESFunc(name_, expr_width(), nparms());
+      NetESFunc*tmp = new NetESFunc(name_, type_, expr_width(), nparms());
       assert(tmp);
+
+      tmp->cast_signed(has_sign());
       for (unsigned idx = 0 ;  idx < nparms() ;  idx += 1) {
 	    assert(tmp->parm(idx));
 	    tmp->parm(idx, tmp->parm(idx)->dup_expr());
       }
 
+      tmp->set_line(*this);
       return tmp;
 }
 
 NetESignal* NetESignal::dup_expr() const
 {
-      NetESignal*tmp = new NetESignal(net_, msi_, lsi_);
+      NetESignal*tmp = new NetESignal(net_, word_);
       assert(tmp);
       tmp->expr_width(expr_width());
+      tmp->set_line(*this);
       return tmp;
 }
 
@@ -62,6 +106,25 @@ NetETernary* NetETernary::dup_expr() const
       NetETernary*tmp = new NetETernary(cond_->dup_expr(),
 					true_val_->dup_expr(),
 					false_val_->dup_expr());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEUFunc* NetEUFunc::dup_expr() const
+{
+      NetEUFunc*tmp;
+      svector<NetExpr*> tmp_parms (parms_.count());
+
+      for (unsigned idx = 0 ;  idx < tmp_parms.count() ;  idx += 1) {
+	    assert(parms_[idx]);
+	    tmp_parms[idx] = parms_[idx]->dup_expr();
+      }
+
+      tmp = new NetEUFunc(scope_, func_, result_sig_->dup_expr(), tmp_parms);
+
+      assert(tmp);
+      tmp->set_line(*this);
       return tmp;
 }
 
@@ -69,37 +132,14 @@ NetEUnary* NetEUnary::dup_expr() const
 {
       NetEUnary*tmp = new NetEUnary(op_, expr_->dup_expr());
       assert(tmp);
+      tmp->set_line(*this);
       return tmp;
 }
 
-/*
- * $Log: dup_expr.cc,v $
- * Revision 1.7  2002/01/28 00:52:41  steve
- *  Add support for bit select of parameters.
- *  This leads to a NetESelect node and the
- *  vvp code generator to support that.
- *
- * Revision 1.6  2001/11/19 01:54:14  steve
- *  Port close cropping behavior from mcrgb
- *  Move window array reset to libmc.
- *
- * Revision 1.5  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.4  2000/05/07 18:20:07  steve
- *  Import MCD support from Stephen Tell, and add
- *  system function parameter support to the IVL core.
- *
- * Revision 1.3  2000/05/04 03:37:58  steve
- *  Add infrastructure for system functions, move
- *  $time to that structure and add $random.
- *
- * Revision 1.2  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.1  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- */
-
+NetEUReduce* NetEUReduce::dup_expr() const
+{
+      NetEUReduce*tmp = new NetEUReduce(op_, expr_->dup_expr());
+      assert(tmp);
+      tmp->set_line(*this);
+      return tmp;
+}

elab_anet.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams ([email protected].com)
+ * Copyright (c) 2000-2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,8 +16,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_anet.cc,v 1.4 2001/12/03 04:47:14 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: elab_anet.cc,v 1.13 2007/03/22 16:08:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,12 +29,13 @@
 
 # include  "PExpr.h"
 # include  "netlist.h"
+# include  "netmisc.h"
 # include  <iostream>
 
 NetNet* PExpr::elaborate_anet(Design*des, NetScope*scope) const
 {
       cerr << get_line() << ": error: Invalid expression on left side "
-	   << "of precedural continuous asignment." << endl;
+	   << "of procedural continuous assignment." << endl;
       return 0;
 }
 
@@ -83,15 +84,18 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
 	   concat operator from least significant to most significant,
 	   which is opposite from how they are given in the list.
 
-	   Allow for a repeat count other then 1 by repeating the
+	   Allow for a repeat count other than 1 by repeating the
 	   connect loop as many times as necessary. */
 
-      NetNet*osig = new NetNet(scope, des->local_symbol(scope->name()),
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT_REG, pins);
+	/* Assume that all the data types are the same. */
+      osig->data_type(nets[0]->data_type());
 
       pins = 0;
       for (unsigned idx = nets.count() ;  idx > 0 ;  idx -= 1) {
 	    NetNet*cur = nets[idx-1];
+	    assert(cur->data_type() == osig->data_type());
 	    for (unsigned pin = 0;  pin < cur->pin_count();  pin += 1) {
 		  connect(osig->pin(pins), cur->pin(pin));
 		  pins += 1;
@@ -104,17 +108,33 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
 
 NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 {
-      NetNet*sig = des->find_signal(scope, path_);
+      assert(scope);
+
+      NetNet*       sig = 0;
+      NetMemory*    mem = 0;
+      const NetExpr*par = 0;
+      NetEvent*     eve = 0;
+
+      symbol_search(des, scope, path_, sig, mem, par, eve);
+
+
+      if (mem != 0) {
+	    cerr << get_line() << ": error: memories not allowed "
+		 << "on left side of procedural continuous "
+		 << "assignment." << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      if (eve != 0) {
+	    cerr << get_line() << ": error: named events not allowed "
+		 << "on left side of procedural continuous "
+		 << "assignment." << endl;
+	    des->errors += 1;
+	    return 0;
+      }
 
       if (sig == 0) {
-	    if (NetMemory*mem = des->find_memory(scope, path_)) {
-		  cerr << get_line() << ": error: memories not allowed "
-		       << "on left side of procedural continuous "
-		       << "asignment." << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
-
 	    cerr << get_line() << ": error: reg ``" << path_ << "'' "
 		 << "is undefined in this scope." << endl;
 	    des->errors += 1;
@@ -138,8 +158,8 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
       if (msb_ || lsb_) {
 
 	    cerr << get_line() << ": error: bit/part selects not allowed "
-		 << "on left side of procedural continuous asignment."
-		 << endl; 
+		 << "on left side of procedural continuous assignment."
+		 << endl;
 	    des->errors += 1;
 	    return 0;
       }
@@ -149,6 +169,33 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_anet.cc,v $
+ * Revision 1.13  2007/03/22 16:08:14  steve
+ *  Spelling fixes from Larry
+ *
+ * Revision 1.12  2006/05/01 20:47:58  steve
+ *  More explicit datatype setup.
+ *
+ * Revision 1.11  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.10  2004/10/04 01:10:52  steve
+ *  Clean up spurious trailing white space.
+ *
+ * Revision 1.9  2003/09/19 03:50:12  steve
+ *  Remove find_memory method from Design class.
+ *
+ * Revision 1.8  2003/06/21 01:21:43  steve
+ *  Harmless fixup of warnings.
+ *
+ * Revision 1.7  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.6  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.5  2002/08/12 01:34:58  steve
+ *  conditional ident string using autoconfig.
+ *
  * Revision 1.4  2001/12/03 04:47:14  steve
  *  Parser and pform use hierarchical names as hname_t
  *  objects instead of encoded strings.

elab_lval.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams ([email protected])
+ * Copyright (c) 2000-2008 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,36 +16,37 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_lval.cc,v 1.19 2002/06/04 05:38:44 steve Exp $"
-#endif
 
 # include "config.h"
 
 # include  "PExpr.h"
 # include  "netlist.h"
-
+# include  "netmisc.h"
+# include  "compiler.h"
+# include  <cstdlib>
 # include  <iostream>
+# include  <climits>
+# include  "ivl_assert.h"
 
 /*
  * These methods generate a NetAssign_ object for the l-value of the
- * assignemnt. This is common code for the = and <= statements.
+ * assignment. This is common code for the = and <= statements.
  *
  * What gets generated depends on the structure of the l-value. If the
- * l-value is a simple name (i.e. foo <= <value>) the the NetAssign_
+ * l-value is a simple name (i.e., foo <= <value>) then the NetAssign_
  * is created the width of the foo reg and connected to all the
  * bits.
  *
- * If there is a part select (i.e. foo[3:1] <= <value>) the NetAssign_
+ * If there is a part select (i.e., foo[3:1] <= <value>) the NetAssign_
  * is made only as wide as it needs to be (3 bits in this example) and
  * connected to the correct bits of foo. A constant bit select is a
- * special case of the part select. 
+ * special case of the part select.
  *
- * If the bit-select is non-constant (i.e. foo[<expr>] = <value>) the
+ * If the bit-select is non-constant (i.e., foo[<expr>] = <value>) the
  * NetAssign_ is made wide enough to connect to all the bits of foo,
  * then the mux expression is elaborated and attached to the
  * NetAssign_ node as a b_mux value. The target must interpret the
- * presense of a bmux value as taking a single bit and assigning it to
+ * presence of a bmux value as taking a single bit and assigning it to
  * the bit selected by the bmux expression.
  *
  * If the l-value expression is non-trivial, but can be fully
@@ -55,7 +56,7 @@
  * l-value.
  *
  * This last case can turn up in statements like: {a, b[1]} = c;
- * rather then create a NetAssign_ for each item in the contatenation,
+ * rather then create a NetAssign_ for each item in the concatenation,
  * elaboration makes a single NetAssign_ and connects it up properly.
  */
 
@@ -65,11 +66,13 @@
  * is to try to make a net elaboration, and see if the result is
  * suitable for assignment.
  */
-NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PExpr::elaborate_lval(Design*des,
+				  NetScope*scope,
+				  bool is_force) const
 {
       NetNet*ll = 0;
       if (ll == 0) {
-	    cerr << get_line() << ": Assignment l-value too complex."
+	    cerr << get_fileline() << ": Assignment l-value too complex."
 		 << endl;
 	    return 0;
       }
@@ -91,10 +94,12 @@ NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
  * a is the MSB and b the LSB. Connect the LSB to the low pins of the
  * NetAssign_ object.
  */
-NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PEConcat::elaborate_lval(Design*des,
+				     NetScope*scope,
+				     bool is_force) const
 {
       if (repeat_) {
-	    cerr << get_line() << ": error: Repeat concatenations make "
+	    cerr << get_fileline() << ": error: Repeat concatenations make "
 		  "no sense in l-value expressions. I refuse." << endl;
 	    des->errors += 1;
 	    return 0;
@@ -103,7 +108,15 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
       NetAssign_*res = 0;
 
       for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1) {
-	    NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope);
+
+	    if (parms_[idx] == 0) {
+		  cerr << get_fileline() << ": error: Empty expressions "
+		       << "not allowed in concatenations." << endl;
+		  des->errors += 1;
+		  continue;
+	    }
+
+	    NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope, is_force);
 
 	      /* If the l-value doesn't elaborate, the error was
 		 already detected and printed. We just skip it and let
@@ -131,30 +144,66 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
  * Handle the ident as an l-value. This includes bit and part selects
  * of that ident.
  */
-NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PEIdent::elaborate_lval(Design*des,
+				    NetScope*scope,
+				    bool is_force) const
 {
-	/* Get the signal referenced by the identifier, and make sure
-	   it is a register. (Wires are not allows in this context. */
-      NetNet*reg = des->find_signal(scope, path_);
+      NetNet*       reg = 0;
+      const NetExpr*par = 0;
+      NetEvent*     eve = 0;
 
+      symbol_search(des, scope, path_, reg, par, eve);
       if (reg == 0) {
-	    NetMemory*mem = des->find_memory(scope, path_);
-	    if (mem != 0)
-		  return elaborate_mem_lval_(des, scope, mem);
-
-	    cerr << get_line() << ": error: Could not find variable ``"
-		 << path_ << "'' in ``" << scope->name() <<
+	    cerr << get_fileline() << ": error: Could not find variable ``"
+		 << path_ << "'' in ``" << scope_path(scope) <<
 		  "''" << endl;
 
 	    des->errors += 1;
 	    return 0;
       }
-      assert(reg);
 
-      if (reg->type() != NetNet::REG) {
-	    cerr << get_line() << ": error: " << path_ <<
-		  " is not a reg/integer/time in " << scope->name() <<
+      ivl_assert(*this, reg);
+
+      const name_component_t&name_tail = path_.back();
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+	// This is the special case that the l-value is an entire
+	// memory. This is, in fact, an error.
+      if (reg->array_dimensions() > 0 && name_tail.index.empty()) {
+	    cerr << get_fileline() << ": error: Cannot assign to array "
+		 << path_ << ". Did you forget a word index?" << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      if (reg->array_dimensions() > 0)
+	    return elaborate_lval_net_word_(des, scope, reg);
+
+      if (use_sel == index_component_t::SEL_PART) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_part_(des, scope, lv);
+	    return lv;
+      }
+
+      if (use_sel == index_component_t::SEL_IDX_UP ||
+          use_sel == index_component_t::SEL_IDX_DO) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_idx_(des, scope, lv, use_sel);
+	    return lv;
+      }
+
+	/* Get the signal referenced by the identifier, and make sure
+	   it is a register. Wires are not allows in this context,
+	   unless this is the l-value of a force. */
+      if ((reg->type() != NetNet::REG) && !is_force) {
+	    cerr << get_fileline() << ": error: " << path_ <<
+		  " is not a valid l-value in " << scope_path(scope) <<
 		  "." << endl;
+	    cerr << reg->get_fileline() << ":      : " << path_ <<
+		  " is declared here as " << reg->type() << "." << endl;
 	    des->errors += 1;
 	    return 0;
       }
@@ -162,53 +211,29 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
       long msb, lsb;
       NetExpr*mux;
 
-      if (msb_ && lsb_) {
-	      /* This handles part selects. In this case, there are
-		 two bit select expressions, and both must be
-		 constant. Evaluate them and pass the results back to
-		 the caller. */
-	    verinum*vl = lsb_->eval_const(des, scope);
-	    if (vl == 0) {
-		  cerr << lsb_->get_line() << ": error: "
-			"Part select expressions must be constant: "
-		       << *lsb_;
-		  des->errors += 1;
-		  return 0;
-	    }
-	    verinum*vm = msb_->eval_const(des, scope);
-	    if (vl == 0) {
-		  cerr << msb_->get_line() << ": error: "
-			"Part select expressions must be constant: "
-		       << *msb_;
-		  des->errors += 1;
-		  return 0;
-	    }
+      if (use_sel == index_component_t::SEL_BIT) {
 
-	    msb = vm->as_long();
-	    lsb = vl->as_long();
-	    mux = 0;
-
-      } else if (msb_) {
+	    const index_component_t&index_tail = name_tail.index.back();
+	    ivl_assert(*this, index_tail.msb != 0);
+	    ivl_assert(*this, index_tail.lsb == 0);
 
 	      /* If there is only a single select expression, it is a
 		 bit select. Evaluate the constant value and treat it
 		 as a part select with a bit width of 1. If the
 		 expression it not constant, then return the
 		 expression as a mux. */
-	    assert(lsb_ == 0);
-	    verinum*v = msb_->eval_const(des, scope);
-	    if (v == 0) {
-		  NetExpr*m = msb_->elaborate_expr(des, scope);
-		  assert(m);
-		  msb = 0;
-		  lsb = 0;
-		  mux = m;
+
+	    NetExpr*index_expr = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	    if (NetEConst*index_con = dynamic_cast<NetEConst*> (index_expr)) {
+		  msb = index_con->value().as_long();
+		  lsb = index_con->value().as_long();
+		  mux = 0;
 
 	    } else {
-
-		  msb = v->as_long();
-		  lsb = v->as_long();
-		  mux = 0;
+		  msb = 0;
+		  lsb = 0;
+		  mux = index_expr;
 	    }
 
       } else {
@@ -216,8 +241,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	      /* No select expressions, so presume a part select the
 		 width of the register. */
 
-	    assert(msb_ == 0);
-	    assert(lsb_ == 0);
 	    msb = reg->msb();
 	    lsb = reg->lsb();
 	    mux = 0;
@@ -232,7 +255,19 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 		 bmux to select the target bit. */
 	    lv = new NetAssign_(reg);
 
-	    lv->set_bmux(mux);
+	      /* Correct the mux for the range of the vector. */
+	    if (reg->msb() < reg->lsb())
+		  mux = make_sub_expr(reg->lsb(), mux);
+	    else if (reg->lsb() != 0)
+		  mux = make_add_expr(mux, - reg->lsb());
+
+	    lv->set_part(mux, 1);
+
+      } else if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+	    lv = new NetAssign_(reg);
 
       } else {
 
@@ -244,7 +279,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	    unsigned wid = moff - loff + 1;
 
 	    if (moff < loff) {
-		  cerr << get_line() << ": error: part select "
+		  cerr << get_fileline() << ": error: part select "
 		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
 		       << " is reversed." << endl;
 		  des->errors += 1;
@@ -256,8 +291,8 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 		 converted to normalized form so is relative the
 		 variable pins. */
 
-	    if ((wid + loff) > reg->pin_count()) {
-		  cerr << get_line() << ": error: bit/part select "
+	    if ((wid + loff) > reg->vector_width()) {
+		  cerr << get_fileline() << ": error: bit/part select "
 		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
 		       << " is out of range." << endl;
 		  des->errors += 1;
@@ -265,106 +300,186 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	    }
 
 	    lv = new NetAssign_(reg);
-	    lv->set_part(loff, wid);
-
-	    assert(moff < reg->pin_count());
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
       }
 
 
       return lv;
 }
 
-NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
-					NetMemory*mem) const
+NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
+					      NetScope*scope,
+					      NetNet*reg) const
 {
-      assert(msb_ && !lsb_);
+      const name_component_t&name_tail = path_.back();
+      ivl_assert(*this, !name_tail.index.empty());
 
-      NetExpr*ix = msb_->elaborate_expr(des, scope);
-      if (ix == 0)
+      const index_component_t&index_head = name_tail.index.front();
+      if (index_head.sel == index_component_t::SEL_PART) {
+	    cerr << get_fileline() << ": error: cannot perform a part "
+	         << "select on array " << reg->name() << "." << endl;
+	    des->errors += 1;
 	    return 0;
+      }
+
+      ivl_assert(*this, index_head.sel == index_component_t::SEL_BIT);
+      ivl_assert(*this, index_head.msb != 0);
+      ivl_assert(*this, index_head.lsb == 0);
+
+      NetExpr*word = elab_and_eval(des, scope, index_head.msb, -1);
+
+	// If there is a non-zero base to the memory, then build an
+	// expression to calculate the canonical address.
+      if (long base = reg->array_first()) {
+
+	    word = make_add_expr(word, 0-base);
+	    eval_expr(word);
+      }
+
+      NetAssign_*lv = new NetAssign_(reg);
+      lv->set_word(word);
+
+      if (debug_elaborate)
+	    cerr << get_fileline() << ": debug: Set array word=" << *word << endl;
+
+	// Test for the case that the index is a constant, and is out
+	// of bounds. The "word" expression is the word index already
+	// converted to canonical address, so this just needs to check
+	// that the address is not too big.
+      if (NetEConst*word_const = dynamic_cast<NetEConst*>(word)) {
+	    verinum word_val = word_const->value();
+	    long index = word_val.as_long();
+	    assert (reg->array_count() <= LONG_MAX);
+	    if (index < 0 || index >= (long) reg->array_count()) {
+		  cerr << get_fileline() << ": warning: Constant array index "
+		       << (index + reg->array_first())
+		       << " is out of range for array "
+		       << reg->name() << "." << endl;
+	    }
+      }
+
+	/* An array word may also have part selects applied to them. */
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (name_tail.index.size() > 1)
+	    use_sel = name_tail.index.back().sel;
+
+      if (use_sel == index_component_t::SEL_PART)
+	    elaborate_lval_net_part_(des, scope, lv);
+
+      if (use_sel == index_component_t::SEL_IDX_UP ||
+          use_sel == index_component_t::SEL_IDX_DO)
+	    elaborate_lval_net_idx_(des, scope, lv, use_sel);
 
-      NetAssign_*lv = new NetAssign_(mem);
-      lv->set_bmux(ix);
-      lv->set_part(0, mem->width());
       return lv;
 }
 
-NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
+bool PEIdent::elaborate_lval_net_part_(Design*des,
+				       NetScope*scope,
+				       NetAssign_*lv) const
 {
-      cerr << get_line() << ": error: Constant values not allowed "
+      long msb, lsb;
+      bool flag = calculate_parts_(des, scope, msb, lsb);
+      if (!flag)
+	    return false;
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+
+      } else {
+
+	      /* If the bit/part select is constant, then make the
+		 NetAssign_ only as wide as it needs to be and connect
+		 only to the selected bits of the reg. */
+	    unsigned loff = reg->sb_to_idx(lsb);
+	    unsigned moff = reg->sb_to_idx(msb);
+	    unsigned wid = moff - loff + 1;
+
+	    if (moff < loff) {
+		  cerr << get_fileline() << ": error: part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is reversed." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	      /* If the part select extends beyond the extreme of the
+		 variable, then report an error. Note that loff is
+		 converted to normalized form so is relative the
+		 variable pins. */
+
+	    if ((wid + loff) > reg->vector_width()) {
+		  cerr << get_fileline() << ": error: bit/part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is out of range." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
+      }
+
+      return true;
+}
+
+bool PEIdent::elaborate_lval_net_idx_(Design*des,
+				      NetScope*scope,
+				      NetAssign_*lv,
+				      index_component_t::ctype_t use_sel) const
+{
+      const name_component_t&name_tail = path_.back();;
+      ivl_assert(*this, !name_tail.index.empty());
+
+      const index_component_t&index_tail = name_tail.index.back();
+      ivl_assert(*this, index_tail.msb != 0);
+      ivl_assert(*this, index_tail.lsb != 0);
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (reg->type() != NetNet::REG) {
+	    cerr << get_fileline() << ": error: " << path_ <<
+		  " is not a reg/integer/time in " << scope_path(scope) <<
+		  "." << endl;
+	    cerr << reg->get_fileline() << ":      : " << path_ <<
+		  " is declared here as " << reg->type() << "." << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+      unsigned long wid;
+      calculate_up_do_width_(des, scope, wid);
+
+      NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	/* Correct the mux for the range of the vector. */
+      if (reg->msb() < reg->lsb())
+	    base = make_sub_expr(reg->lsb(), base);
+      else if (reg->lsb() != 0)
+	    base = make_add_expr(base, - reg->lsb());
+
+      if (use_sel == index_component_t::SEL_IDX_DO && wid > 1 ) {
+	    base = make_add_expr(base, 1-(long)wid);
+      }
+
+      if (debug_elaborate)
+	    cerr << get_fileline() << ": debug: Set part select width="
+		 << wid << ", base=" << *base << endl;
+
+      lv->set_part(base, wid);
+
+      return true;
+}
+
+NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*, bool) const
+{
+      cerr << get_fileline() << ": error: Constant values not allowed "
 	   << "in l-value expressions." << endl;
       des->errors += 1;
       return 0;
 }
-
-/*
- * $Log: elab_lval.cc,v $
- * Revision 1.19  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.18  2002/03/09 04:02:26  steve
- *  Constant expressions are not l-values for task ports.
- *
- * Revision 1.17  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.16  2001/11/08 05:15:50  steve
- *  Remove string paths from PExpr elaboration.
- *
- * Revision 1.15  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.14  2001/08/25 23:50:02  steve
- *  Change the NetAssign_ class to refer to the signal
- *  instead of link into the netlist. This is faster
- *  and uses less space. Make the NetAssignNB carry
- *  the delays instead of the NetAssign_ lval objects.
- *
- *  Change the vvp code generator to support multiple
- *  l-values, i.e. concatenations of part selects.
- *
- * Revision 1.13  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.12  2001/02/09 03:16:48  steve
- *  Report bit/part select out of range errors. (PR#133)
- *
- * Revision 1.11  2001/01/10 03:13:23  steve
- *  Build task outputs as lval instead of nets. (PR#98)
- *
- * Revision 1.10  2001/01/06 06:31:58  steve
- *  declaration initialization for time variables.
- *
- * Revision 1.9  2001/01/06 02:29:36  steve
- *  Support arrays of integers.
- *
- * Revision 1.8  2000/12/12 06:14:51  steve
- *  sorry for concatenated memories in l-values. (PR#76)
- *
- * Revision 1.7  2000/12/01 02:55:37  steve
- *  Detect part select errors on l-values.
- *
- * Revision 1.6  2000/10/31 17:49:02  steve
- *  Support time variables.
- *
- * Revision 1.5  2000/10/26 17:09:46  steve
- *  Fix handling of errors in behavioral lvalues. (PR#28)
- *
- * Revision 1.4  2000/09/10 15:43:59  steve
- *  Some error checking.
- *
- * Revision 1.3  2000/09/10 03:59:59  steve
- *  Agressively merge NetAssign_ within concatenations.
- *
- * Revision 1.2  2000/09/10 02:18:16  steve
- *  elaborate complex l-values
- *
- * Revision 1.1  2000/09/09 15:21:26  steve
- *  move lval elaboration to PExpr virtual methods.
- *
- */
-

elab_pexpr.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,20 +16,21 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_pexpr.cc,v 1.15 2002/05/06 02:30:27 steve Exp $"
-#endif
 
 # include "config.h"
 
 # include  "PExpr.h"
+# include  "compiler.h"
 # include  "util.h"
+# include  "netmisc.h"
 
+# include  <cstdlib>
 # include  <iostream>
+# include  "ivl_assert.h"
 
 NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*sc) const
 {
-      cerr << get_line() << ": error: invalid parameter expression: "
+      cerr << get_fileline() << ": error: invalid parameter expression: "
 	   << *this << endl;
       des->errors += 1;
 
@@ -52,7 +53,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    return 0;
       }
 
-      NetEBinary*tmp = elaborate_expr_base_(des, lp, rp);
+      NetExpr*tmp = elaborate_expr_base_(des, lp, rp, -2);
       return tmp;
 }
 
@@ -61,7 +62,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
  * expressions can include concatenation expressions. This requires
  * that the subexpressions all have well-defined size (in spite of
  * being in a parameter expression) in order to get a defined
- * value. The sub-expressions themsilves must also be value parameter
+ * value. The sub-expressions themselves must also be value parameter
  * expressions.
  */
 NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -73,10 +74,11 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
       if (repeat_) {
 	    repeat = repeat_->elaborate_pexpr(des, scope);
 	    if (repeat == 0) {
-		  cerr << get_line() << ": error: "
+		  cerr << get_fileline() << ": error: "
 			"concatenation repeat expression cannot be evaluated."
 		       << endl;
 		  des->errors += 1;
+		  return 0;
 	    }
 
 	      /* continue on even if the repeat expression doesn't
@@ -103,16 +105,12 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
 		       the width check for later. */
 
 	    } else if (! ex->has_width()) {
-		  cerr << ex->get_line() << ": error: operand of "
+		  cerr << ex->get_fileline() << ": error: operand of "
 		       << "concatenation has indefinite width: "
 		       << *ex << endl;
 		  des->errors += 1;
-
-	    } else if (ex->expr_width() == 0) {
-		  cerr << ex->get_line() << ": internal error: "
-		       << "Operand of concatenation has no width: "
-		       << *ex << endl;
-		  des->errors += 1;
+		  delete tmp;
+		  return 0;
 	    }
 
 	    tmp->set(idx, ex);
@@ -123,7 +121,7 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
 
 NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 /*
@@ -134,31 +132,77 @@ NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      hname_t path = path_;
-      char*name = path.remove_tail_name();
+      pform_name_t path = path_;
+      name_component_t name_tail = path_.back();
+      path.pop_back();
 
       NetScope*pscope = scope;
-      if (path.peek_name(0))
-	    pscope = des->find_scope(scope, path);
+      if (path_.size() > 0) {
+	    list<hname_t> tmp = eval_scope_path(des, scope, path);
+	    pscope = des->find_scope(scope, tmp);
+      }
 
-      const NetExpr*ex = pscope->get_parameter(name);
+      const NetExpr*ex_msb;
+      const NetExpr*ex_lsb;
+      const NetExpr*ex = 0;
+	// Look up the parameter name in the current scope. If the
+	// name is not found in the pscope, look in containing scopes,
+	// but do not go outside the containing module instance.
+      for (;;) {
+	    ex = pscope->get_parameter(name_tail.name, ex_msb, ex_lsb);
+	    if (ex != 0)
+		  break;
+	    if (pscope->type() == NetScope::MODULE)
+		  break;
+	    pscope = pscope->parent();
+	    ivl_assert(*this, pscope);
+      }
       if (ex == 0) {
-	    cerr << get_line() << ": error: identifier ``" << path_ <<
-		  "'' is not a parameter in " << scope->name() << "." << endl;
+	    cerr << get_fileline() << ": error: identifier ``" << name_tail.name <<
+		  "'' is not a parameter in "<< scope_path(scope)<< "." << endl;
 	    des->errors += 1;
-	    delete name;
 	    return 0;
       }
 
-      if (msb_ || lsb_ || idx_) {
-	    cerr << get_line() << ": error: Cannot bit/part select "
-		  "bits of parameters." << endl;
+      NetExpr*res = new NetEParam(des, pscope, name_tail.name);
+      res->set_line(*this);
+      assert(res);
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+      switch (use_sel) {
+	  case index_component_t::SEL_NONE:
+	    break;
+
+	  default:
+	  case index_component_t::SEL_PART:
+	    cerr << get_fileline() << ": sorry: Cannot part select "
+		    "bits of parameters." << endl;
 	    des->errors += 1;
+	    delete res;
+	    return 0;
+
+	  case index_component_t::SEL_BIT:
+
+	      /* We have here a bit select. Insert a NetESelect node
+		 to handle it. */
+	    NetExpr*tmp = name_tail.index.back().msb->elaborate_pexpr(des, scope);
+	    if (tmp == 0) {
+		  delete res;
+		  return 0;
+	    }
+	    if (debug_elaborate)
+		  cerr << get_fileline() << ": debug: "
+		       << "Bit select [" << *tmp << "]"
+		       << " in parameter expression." << endl;
+
+	    res = new NetESelect(res, tmp, 1);
+	    res->set_line(*this);
+	    break;
       }
 
-      NetExpr*res = new NetEParam(des, pscope, hname_t(name));
-      assert(res);
-      delete name;
       return res;
 }
 
@@ -167,13 +211,13 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PENumber::elaborate_pexpr(Design*des, NetScope*sc) const
 {
-      return elaborate_expr(des, sc);
+      return elaborate_expr(des, sc, -1, false);
 }
 
 
 NetEConst* PEString::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 NetETernary* PETernary::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -181,10 +225,11 @@ NetETernary* PETernary::elaborate_pexpr(Design*des, NetScope*scope) const
       NetExpr*c = expr_->elaborate_pexpr(des, scope);
       NetExpr*t = tru_->elaborate_pexpr(des, scope);
       NetExpr*f = fal_->elaborate_pexpr(des, scope);
-      if (c == 0) return 0;
-      if (t == 0) return 0;
-      if (f == 0) return 0;
-      return new NetETernary(c, t, f);
+      if (c == 0 || t == 0 || f == 0) return 0;
+
+      NetETernary*tmp = new NetETernary(c, t, f);
+      tmp->set_line(*this);
+      return tmp;
 }
 
 NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
@@ -202,10 +247,12 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    tmp = new NetEUnary(op_, ip);
 	    tmp->set_line(*this);
 	    break;
+
 	  case '~':
 	    tmp = new NetEUBits(op_, ip);
 	    tmp->set_line(*this);
 	    break;
+
 	  case '!': // Logical NOT
 	  case '&': // Reduction AND
 	  case '|': // Reduction OR
@@ -217,70 +264,6 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    tmp->set_line(*this);
 	    break;
       }
+
       return tmp;
 }
-
-/*
- * $Log: elab_pexpr.cc,v $
- * Revision 1.15  2002/05/06 02:30:27  steve
- *  Allow parameters in concatenation of widths are defined.
- *
- * Revision 1.14  2002/05/05 21:11:50  steve
- *  Put off evaluation of concatenation repeat expresions
- *  until after parameters are defined. This allows parms
- *  to be used in repeat expresions.
- *
- *  Add the builtin $signed system function.
- *
- * Revision 1.13  2002/01/28 00:52:41  steve
- *  Add support for bit select of parameters.
- *  This leads to a NetESelect node and the
- *  vvp code generator to support that.
- *
- * Revision 1.12  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.11  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.10  2001/10/07 03:38:08  steve
- *  parameter names do not have defined size.
- *
- * Revision 1.9  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.8  2001/01/14 23:04:56  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- * Revision 1.7  2001/01/02 04:21:13  steve
- *  Support a bunch of unary operators in parameter expressions.
- *
- * Revision 1.6  2000/12/16 19:03:30  steve
- *  Evaluate <= and ?: in parameter expressions (PR#81)
- *
- * Revision 1.5  2000/06/13 05:22:16  steve
- *  Support concatenation in parameter expressions.
- *
- * Revision 1.4  2000/06/01 02:31:39  steve
- *  Parameters can be strings.
- *
- * Revision 1.3  2000/03/12 18:22:11  steve
- *  Binary and unary operators in parameter expressions.
- *
- * Revision 1.2  2000/03/12 04:35:22  steve
- *  Allow parameter identifiers in parameter expressions.
- *
- * Revision 1.1  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- */
-

elab_scope.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,13 +16,13 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: elab_scope.cc,v 1.13 2001/12/30 04:47:57 steve Exp $"
-#endif
-
-# include "config.h"
 
+# include  "config.h"
+# include  "compiler.h"
+# include  "netmisc.h"
+# include  <cstring>
 # include  <iostream>
+# include  <stdio.h>
 
 /*
  * Elaboration happens in two passes, generally. The first scans the
@@ -35,14 +35,66 @@
 # include  "PEvent.h"
 # include  "PExpr.h"
 # include  "PGate.h"
+# include  "PGenerate.h"
 # include  "PTask.h"
 # include  "PWire.h"
 # include  "Statement.h"
 # include  "netlist.h"
+# include  "util.h"
 # include  <typeinfo>
+# include  <assert.h>
 
-bool Module::elaborate_scope(Design*des, NetScope*scope) const
+void Module::elaborate_parm_item_(perm_string name, const param_expr_t&cur,
+				  Design*des, NetScope*scope,
+				  perm_string file, unsigned lineno)
 {
+      PExpr*ex = cur.expr;
+      assert(ex);
+
+      NetExpr*val = ex->elaborate_pexpr(des, scope);
+      if (val == 0) return;
+      NetExpr*msb = 0;
+      NetExpr*lsb = 0;
+      bool signed_flag = cur.signed_flag;
+
+	/* If the parameter declaration includes msb and lsb,
+	   then use them to calculate a width for the
+	   result. Then make sure the constant expression of the
+	   parameter value is coerced to have the correct
+	   and defined width. */
+      if (cur.msb) {
+	    msb = cur.msb ->elaborate_pexpr(des, scope);
+	    assert(msb);
+	    lsb = cur.lsb ->elaborate_pexpr(des, scope);
+      }
+
+      if (signed_flag) {
+	      /* If explicitly signed, then say so. */
+	    val->cast_signed(true);
+      } else if (cur.msb) {
+	      /* If there is a range, then the signedness comes
+		 from the type and not the expression. */
+	    val->cast_signed(signed_flag);
+      } else {
+	      /* otherwise, let the expression describe
+		 itself. */
+	    signed_flag = val->has_sign();
+      }
+
+      val = scope->set_parameter(name, val,
+				 msb, lsb, signed_flag, file, lineno);
+      assert(val);
+      delete val;
+}
+
+bool Module::elaborate_scope(Design*des, NetScope*scope,
+			     const replace_t&replacements) const
+{
+      if (debug_scopes) {
+	    cerr << get_fileline() << ": debug: Elaborate scope "
+		 << scope_path(scope) << "." << endl;
+      }
+
 	// Generate all the parameters that this instance of this
 	// module introduces to the design. This loop elaborates the
 	// parameters, but doesn't evaluate references to
@@ -54,8 +106,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// the pform and just place a NetEParam placeholder in the
 	// place of the elaborated expression.
 
-      typedef map<string,PExpr*>::const_iterator mparm_it_t;
-      typedef map<hname_t,PExpr*>::const_iterator hparm_it_t;
+      typedef map<perm_string,param_expr_t>::const_iterator mparm_it_t;
+      typedef map<pform_name_t,PExpr*>::const_iterator pform_parm_it_t;
 
 
 	// This loop scans the parameters in the module, and creates
@@ -64,13 +116,24 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (mparm_it_t cur = parameters.begin()
 		 ; cur != parameters.end() ;  cur ++) {
 
-	    scope->set_parameter((*cur).first, new NetEParam);
+	    NetEParam*tmp = new NetEParam;
+	    tmp->set_line(*((*cur).second.expr));
+	    tmp->cast_signed( (*cur).second.signed_flag );
+
+	    scope->set_parameter((*cur).first, tmp, 0, 0, false,
+	                         (*cur).second.file, (*cur).second.lineno);
       }
 
       for (mparm_it_t cur = localparams.begin()
 		 ; cur != localparams.end() ;  cur ++) {
 
-	    scope->set_parameter((*cur).first, new NetEParam);
+	    NetEParam*tmp = new NetEParam;
+	    tmp->set_line(*((*cur).second.expr));
+	    if ((*cur).second.msb)
+		  tmp->cast_signed( (*cur).second.signed_flag );
+
+	    scope->set_parameter((*cur).first, tmp, 0, 0, false,
+	                         (*cur).second.file, (*cur).second.lineno);
       }
 
 
@@ -82,25 +145,41 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (mparm_it_t cur = parameters.begin()
 		 ; cur != parameters.end() ;  cur ++) {
 
-	    PExpr*ex = (*cur).second;
-	    assert(ex);
+	    elaborate_parm_item_((*cur).first, (*cur).second, des, scope,
+	                         (*cur).second.file, (*cur).second.lineno);
+      }
 
-	    NetExpr*val = ex->elaborate_pexpr(des, scope);
-	    val = scope->set_parameter((*cur).first, val);
+	/* run parameter replacements that were collected from the
+	   containing scope and meant for me. */
+      for (replace_t::const_iterator cur = replacements.begin()
+		 ; cur != replacements.end() ;  cur ++) {
+
+	    NetExpr*val = (*cur).second;
+	    if (val == 0) {
+		  cerr << get_fileline() << ": internal error: "
+		       << "Missing expression in parameter replacement for "
+		       << (*cur).first;
+	    }
 	    assert(val);
-	    delete val;
+	    if (debug_scopes) {
+		  cerr << get_fileline() << ": debug: "
+		       << "Replace " << (*cur).first
+		       << " with expression " << *val
+		       << " from " << val->get_fileline() << "." << endl;
+	    }
+	    bool flag = scope->replace_parameter((*cur).first, val);
+	    if (! flag) {
+		  cerr << val->get_fileline() << ": warning: parameter "
+		       << (*cur).first << " not found in "
+		       << scope_path(scope) << "." << endl;
+	    }
       }
 
       for (mparm_it_t cur = localparams.begin()
 		 ; cur != localparams.end() ;  cur ++) {
 
-	    PExpr*ex = (*cur).second;
-	    assert(ex);
-
-	    NetExpr*val = ex->elaborate_pexpr(des, scope);
-	    val = scope->set_parameter((*cur).first, val);
-	    assert(val);
-	    delete val;
+	    elaborate_parm_item_((*cur).first, (*cur).second, des, scope,
+	                         (*cur).second.file, (*cur).second.lineno);
       }
 
 	// Run through the defparams for this module, elaborate the
@@ -110,10 +189,10 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// It is OK to elaborate the expressions of the defparam here
 	// because Verilog requires that the expressions only use
 	// local parameter names. It is *not* OK to do the override
-	// here becuase the parameter receiving the assignment may be
+	// here because the parameter receiving the assignment may be
 	// in a scope not discovered by this pass.
 
-      for (hparm_it_t cur = defparms.begin()
+      for (pform_parm_it_t cur = defparms.begin()
 		 ; cur != defparms.end() ;  cur ++ ) {
 
 	    PExpr*ex = (*cur).second;
@@ -124,19 +203,49 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    scope->defparams[(*cur).first] = val;
       }
 
+	// Evaluate the attributes. Evaluate them in the scope of the
+	// module that the attribute is attached to. Is this correct?
+      unsigned nattr;
+      attrib_list_t*attr = evaluate_attributes(attributes, nattr, des, scope);
+
+      for (unsigned idx = 0 ;  idx < nattr ;  idx += 1)
+	    scope->attribute(attr[idx].key, attr[idx].val);
+
+      delete[]attr;
+
+	// Generate schemes can create new scopes in the form of
+	// generated code. Scan the generate schemes, and *generate*
+	// new scopes, which is slightly different from simple
+	// elaboration.
+
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> generate_scope(des, scope);
+      }
+
 
 	// Tasks introduce new scopes, so scan the tasks in this
 	// module. Create a scope for the task and pass that to the
 	// elaborate_scope method of the PTask for detailed
 	// processing.
 
-      typedef map<string,PTask*>::const_iterator tasks_it_t;
+      typedef map<perm_string,PTask*>::const_iterator tasks_it_t;
 
       for (tasks_it_t cur = tasks_.begin()
 		 ; cur != tasks_.end() ;  cur ++ ) {
 
-	    NetScope*task_scope = new NetScope(scope, (*cur).first.c_str(),
+	    hname_t use_name( (*cur).first );
+	    if (scope->child(use_name)) {
+		  cerr << get_fileline() << ": error: task/scope name "
+		       << use_name << " already used in this context."
+		       << endl;
+		  des->errors += 1;
+		  continue;
+	    }
+	    NetScope*task_scope = new NetScope(scope, use_name,
 					       NetScope::TASK);
+	    task_scope->set_line((*cur).second);
 	    (*cur).second->elaborate_scope(des, task_scope);
       }
 
@@ -145,13 +254,22 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// perspective of scopes. So handle them exactly the same
 	// way.
 
-      typedef map<string,PFunction*>::const_iterator funcs_it_t;
+      typedef map<perm_string,PFunction*>::const_iterator funcs_it_t;
 
       for (funcs_it_t cur = funcs_.begin()
 		 ; cur != funcs_.end() ;  cur ++ ) {
 
-	    NetScope*func_scope = new NetScope(scope, (*cur).first.c_str(),
+	    hname_t use_name( (*cur).first );
+	    if (scope->child(use_name)) {
+		  cerr << get_fileline() << ": error: function/scope name "
+		       << use_name << " already used in this context."
+		       << endl;
+		  des->errors += 1;
+		  continue;
+	    }
+	    NetScope*func_scope = new NetScope(scope, use_name,
 					       NetScope::FUNC);
+	    func_scope->set_line((*cur).second);
 	    (*cur).second->elaborate_scope(des, func_scope);
       }
 
@@ -160,7 +278,6 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// scan all of them to create those scopes.
 
       typedef list<PGate*>::const_iterator gates_it_t;
-
       for (gates_it_t cur = gates_.begin()
 		 ; cur != gates_.end() ;  cur ++ ) {
 
@@ -174,18 +291,18 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 
       typedef list<PProcess*>::const_iterator proc_it_t;
 
-      for (proc_it_t cur = behaviors_.begin()
-		 ; cur != behaviors_.end() ;  cur ++ ) {
+      for (proc_it_t cur = behaviors.begin()
+		 ; cur != behaviors.end() ;  cur ++ ) {
 
 	    (*cur) -> statement() -> elaborate_scope(des, scope);
       }
 
 	// Scan through all the named events in this scope. We do not
-	// need anything more then the current scope to do this
+	// need anything more than the current scope to do this
 	// elaboration, so do it now. This allows for normal
 	// elaboration to reference these events.
 
-      for (map<string,PEvent*>::const_iterator et = events.begin()
+      for (map<perm_string,PEvent*>::const_iterator et = events.begin()
 		 ; et != events.end() ;  et ++ ) {
 
 	    (*et).second->elaborate_scope(des, scope);
@@ -194,10 +311,287 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       return des->errors == 0;
 }
 
+bool PGenerate::generate_scope(Design*des, NetScope*container)
+{
+      switch (scheme_type) {
+	  case GS_LOOP:
+	    return generate_scope_loop_(des, container);
+
+	  case GS_CONDIT:
+	    return generate_scope_condit_(des, container, false);
+
+	  case GS_ELSE:
+	    return generate_scope_condit_(des, container, true);
+
+	  case GS_CASE:
+	    return generate_scope_case_(des, container);
+	    return true;
+
+	  case GS_CASE_ITEM:
+	    cerr << get_fileline() << ": internal error: "
+		 << "Case item outside of a case generate scheme?" << endl;
+	    return false;
+
+	  default:
+	    cerr << get_fileline() << ": sorry: Generate of this sort"
+		 << " is not supported yet!" << endl;
+	    return false;
+      }
+}
+
+/*
+ * This is the elaborate scope method for a generate loop.
+ */
+bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
+{
+	// Check that the loop_index variable was declared in a
+	// genvar statement.
+
+	// MISSING CODE!
+
+	// We're going to need a genvar...
+      int genvar;
+
+	// The initial value for the genvar does not need (nor can it
+	// use) the genvar itself, so we can evaluate this expression
+	// the same way any other parameter value is evaluated.
+      NetExpr*init_ex = elab_and_eval(des, container, loop_init, -1);
+      NetEConst*init = dynamic_cast<NetEConst*> (init_ex);
+      if (init == 0) {
+	    cerr << get_fileline() << ": error: Cannot evaluate genvar"
+		 << " init expression: " << *loop_init << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+	// Since we will be adding the genvar value as a local parameter
+	// to each instances scope. We need to make sure a parameter does
+	// not already exist.
+      const NetExpr*tmsb;
+      const NetExpr*tlsb;
+      const NetExpr*texpr = container->get_parameter(loop_index, tmsb, tlsb);
+      if (texpr != 0) {
+	    cerr << get_fileline() << ": error: Cannot have a genvar "
+		 << "and parameter with the same name: " << loop_index << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+      genvar = init->value().as_long();
+      delete init_ex;
+
+      if (debug_scopes)
+	    cerr << get_fileline() << ": debug: genvar init = " << genvar << endl;
+      container->genvar_tmp = loop_index;
+      container->genvar_tmp_val = genvar;
+      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
+      NetEConst*test = dynamic_cast<NetEConst*>(test_ex);
+      assert(test);
+      while (test->value().as_long()) {
+
+	      // The actual name of the scope includes the genvar so
+	      // that each instance has a unique name in the
+	      // container. The format of using [] is part of the
+	      // Verilog standard.
+	    hname_t use_name (scope_name, genvar);
+	    if (container->child(use_name)) {
+		  cerr << get_fileline() << ": error: block/scope name "
+		       << use_name << " already used in this context."
+		       << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: "
+		       << "Create generated scope " << use_name << endl;
+
+	    NetScope*scope = new NetScope(container, use_name,
+					  NetScope::GENBLOCK);
+	    scope->set_line(get_file(), get_lineno());
+
+	      // Set in the scope a localparam for the value of the
+	      // genvar within this instance of the generate
+	      // block. Code within this scope thus has access to the
+	      // genvar as a constant.
+	    {
+		  verinum genvar_verinum(genvar);
+		  genvar_verinum.has_sign(true);
+		  NetEConstParam*gp = new NetEConstParam(scope,
+							 loop_index,
+							 genvar_verinum);
+		    // The file and line information should really come
+		    // from the genvar statement, not the for loop.
+		  scope->set_localparam(loop_index, gp, get_file(),
+		                        get_lineno());
+
+		  if (debug_scopes)
+			cerr << get_fileline() << ": debug: "
+			     << "Create implicit localparam "
+			     << loop_index << " = " << genvar_verinum << endl;
+	    }
+
+	    elaborate_subscope_(des, scope);
+
+	      // Calculate the step for the loop variable.
+	    NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
+	    NetEConst*step = dynamic_cast<NetEConst*>(step_ex);
+	    assert(step);
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: genvar step from "
+		       << genvar << " to " << step->value().as_long() << endl;
+
+	    genvar = step->value().as_long();
+	    container->genvar_tmp_val = genvar;
+	    delete step;
+	    delete test_ex;
+	    test_ex = elab_and_eval(des, container, loop_test, -1);
+	    test = dynamic_cast<NetEConst*>(test_ex);
+	    assert(test);
+      }
+
+	// Clear the genvar_tmp field in the scope to reflect that the
+	// genvar is no longer value for evaluating expressions.
+      container->genvar_tmp = perm_string();
+
+      return true;
+}
+
+bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else_flag)
+{
+      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
+      NetEConst*test = dynamic_cast<NetEConst*> (test_ex);
+      assert(test);
+
+	// If the condition evaluates as false, then do not create the
+	// scope.
+      if ( (test->value().as_long() == 0 && !else_flag)
+	|| (test->value().as_long() != 0 &&  else_flag) ) {
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: Generate condition "
+		       << (else_flag? "(else)" : "(if)")
+		       << " value=" << test->value() << ": skip generation"
+		       << endl;
+	    delete test_ex;
+	    return true;
+      }
+
+      hname_t use_name (scope_name);
+      if (container->child(use_name)) {
+	    cerr << get_fileline() << ": error: block/scope name "
+		 << scope_name << " already used in this context."
+		 << endl;
+	    des->errors += 1;
+	    return false;
+      }
+      if (debug_scopes)
+	    cerr << get_fileline() << ": debug: Generate condition "
+		 << (else_flag? "(else)" : "(if)")
+		 << " value=" << test->value() << ": Generate scope="
+		 << use_name << endl;
+
+      NetScope*scope = new NetScope(container, use_name,
+				    NetScope::GENBLOCK);
+      scope->set_line(get_file(), get_lineno());
+
+      elaborate_subscope_(des, scope);
+
+      return true;
+}
+
+bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
+{
+      NetExpr*case_value_ex = elab_and_eval(des, container, loop_test, -1);
+      NetEConst*case_value_co = dynamic_cast<NetEConst*>(case_value_ex);
+      assert(case_value_co);
+
+	// The name of the scope to generate, whatever that item is.
+      hname_t use_name (scope_name);
+
+      if (debug_scopes)
+	    cerr << get_fileline() << ": debug: Generate case "
+		 << "switch value=" << case_value_co->value() << endl;
+
+      PGenerate*default_item = 0;
+
+      typedef list<PGenerate*>::const_iterator generator_it_t;
+      generator_it_t cur = generates.begin();
+      while (cur != generates.end()) {
+	    PGenerate*item = *cur;
+	    assert( item->scheme_type == PGenerate::GS_CASE_ITEM );
+
+	      // Detect that the item is a default.
+	    if (item->loop_test == 0) {
+		  default_item = item;
+		  cur ++;
+		  continue;
+	    }
+
+	    NetExpr*item_value_ex = elab_and_eval(des, container, item->loop_test, -1);
+	    NetEConst*item_value_co = dynamic_cast<NetEConst*>(item_value_ex);
+	    assert(item_value_co);
+
+	      // If we stumble on the item that matches, then break
+	      // out now.
+	    if (case_value_co->value() == item_value_co->value()) {
+		  delete item_value_co;
+		  break;
+	    }
+
+	    delete item_value_co;
+	    cur ++;
+      }
+
+      delete case_value_co;
+      case_value_co = 0;
+
+      PGenerate*item = (cur == generates.end())? default_item : *cur;
+      if (item == 0) {
+	    cerr << get_fileline() << ": debug: "
+		 << "No generate items found" << endl;
+	    return true;
+      }
+
+      if (debug_scopes)
+	    cerr << get_fileline() << ": debug: "
+		 << "Generate case matches item at "
+		 << item->get_fileline() << endl;
+
+      NetScope*scope = new NetScope(container, use_name,
+				    NetScope::GENBLOCK);
+      scope->set_line(get_file(), get_lineno());
+      item->elaborate_subscope_(des, scope);
+
+      return true;
+}
+
+void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
+{
+	// Scan the generated scope for nested generate schemes,
+	// and *generate* new scopes, which is slightly different
+	// from simple elaboration.
+
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generates.begin()
+		 ; cur != generates.end() ; cur ++ ) {
+	    (*cur) -> generate_scope(des, scope);
+      }
+
+	// Scan the generated scope for gates that may create
+	// their own scopes.
+      typedef list<PGate*>::const_iterator pgate_list_it_t;
+      for (pgate_list_it_t cur = gates.begin()
+		 ; cur != gates.end() ;  cur ++) {
+	    (*cur) ->elaborate_scope(des, scope);
+      }
+
+	// Save the scope that we created, for future use.
+      scope_list_.push_back(scope);
+}
+
 void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 {
       if (get_name() == "") {
-	    cerr << get_line() << ": error: Instantiation of module "
+	    cerr << get_fileline() << ": error: Instantiation of module "
 		 << mod->mod_name() << " requires an instance name." << endl;
 	    des->errors += 1;
 	    return;
@@ -210,8 +604,8 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// about to create, and if I find it then somebody beat me to
 	// it.
 
-      if (NetScope*tmp = sc->child(get_name())) {
-	    cerr << get_line() << ": error: Instance/Scope name " <<
+      if (sc->child(hname_t(get_name()))) {
+	    cerr << get_fileline() << ": error: Instance/Scope name " <<
 		  get_name() << " already used in this context." <<
 		  endl;
 	    des->errors += 1;
@@ -229,87 +623,163 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	    if (strcmp(mod->mod_name(), scn->module_name()) != 0)
 		  continue;
 
-	    cerr << get_line() << ": error: You cannot instantiate "
+	    cerr << get_fileline() << ": error: You cannot instantiate "
 		 << "module " << mod->mod_name() << " within itself." << endl;
 
-	    cerr << get_line() << ":      : The offending instance is "
-		 << sc->name() << "." << get_name() << " within "
-		 << scn->name() << "." << endl;
+	    cerr << get_fileline() << ":      : The offending instance is "
+		 << scope_path(sc) << "." << get_name() << " within "
+		 << scope_path(scn) << "." << endl;
 
 	    des->errors += 1;
 	    return;
       }
 
-	// Create the new scope as a MODULE with my name.
-      NetScope*my_scope = new NetScope(sc, get_name().c_str(), NetScope::MODULE);
-      my_scope->set_module_name(mod->mod_name());
+      NetExpr*mse = msb_ ? elab_and_eval(des, sc, msb_, -1) : 0;
+      NetExpr*lse = lsb_ ? elab_and_eval(des, sc, lsb_, -1) : 0;
+      NetEConst*msb = dynamic_cast<NetEConst*> (mse);
+      NetEConst*lsb = dynamic_cast<NetEConst*> (lse);
 
-	// Set time units and precision.
-      my_scope->time_unit(mod->time_unit);
-      my_scope->time_precision(mod->time_precision);
-      des->set_precision(mod->time_precision);
+      assert( (msb == 0) || (lsb != 0) );
 
-	// This call actually arranges for the description of the
-	// module type to process this instance and handle parameters
-	// and sub-scopes that might occur. Parameters are also
-	// created in that scope, as they exist. (I'll override them
-	// later.)
-      mod->elaborate_scope(des, my_scope);
+      long instance_low  = 0;
+      long instance_high = 0;
+      long instance_count  = 1;
+      bool instance_array = false;
 
-	// Look for module parameter replacements. The "replace" map
-	// maps parameter name to replacement expression that is
-	// passed. It is built up by the ordered overrices or named
-	// overrides.
+      if (msb) {
+	    instance_array = true;
+	    instance_high = msb->value().as_long();
+	    instance_low  = lsb->value().as_long();
+	    if (instance_high > instance_low)
+		  instance_count = instance_high - instance_low + 1;
+	    else
+		  instance_count = instance_low - instance_high + 1;
 
-      typedef map<string,PExpr*>::const_iterator mparm_it_t;
-      map<string,PExpr*> replace;
+	    delete mse;
+	    delete lse;
+      }
 
+      NetScope::scope_vec_t instances (instance_count);
+      if (debug_scopes) {
+	    cerr << get_fileline() << ": debug: Create " << instance_count
+		 << " instances of " << get_name()
+		 << "." << endl;
+      }
 
-	// Positional parameter overrides are matched to parameter
-	// names by using the param_names list of parameter
-	// names. This is an ordered list of names so the first name
-	// is parameter 0, the second parameter 1, and so on.
+	// Run through the module instances, and make scopes out of
+	// them. Also do parameter overrides that are done on the
+	// instantiation line.
+      for (int idx = 0 ;  idx < instance_count ;  idx += 1) {
 
-      if (overrides_) {
-	    assert(parms_ == 0);
-	    list<string>::const_iterator cur = mod->param_names.begin();
-	    unsigned idx = 0;
-	    for (;;) {
-		  if (idx >= overrides_->count())
-			break;
-		  if (cur == mod->param_names.end())
-			break;
+	    hname_t use_name (get_name());
 
-		  replace[*cur] = (*overrides_)[idx];
+	    if (instance_array) {
+		  int instance_idx = idx;
+		  if (instance_low < instance_high)
+			instance_idx = instance_low + idx;
+		  else
+			instance_idx = instance_low - idx;
 
-		  idx += 1;
-		  cur ++;
+		  use_name = hname_t(get_name(), instance_idx);
 	    }
-      }
 
-	// Named parameter overrides carry a name with each override
-	// so the mapping into the replace list is much easier.
-      if (parms_) {
-	    assert(overrides_ == 0);
-	    for (unsigned idx = 0 ;  idx < nparms_ ;  idx += 1)
-		  replace[parms_[idx].name] = parms_[idx].parm;
+	    if (debug_scopes) {
+		  cerr << get_fileline() << ": debug: Module instance " << use_name
+		       << " becomes child of " << scope_path(sc)
+		       << "." << endl;
+	    }
+
+	      // Create the new scope as a MODULE with my name.
+	    NetScope*my_scope = new NetScope(sc, use_name, NetScope::MODULE);
+	    my_scope->set_line(get_file(), mod->get_file(),
+	                       get_lineno(), mod->get_lineno());
+	    my_scope->set_module_name(mod->mod_name());
+	    my_scope->default_nettype(mod->default_nettype);
+
+	    instances[idx] = my_scope;
+
+	      // Set time units and precision.
+	    my_scope->time_unit(mod->time_unit);
+	    my_scope->time_precision(mod->time_precision);
+	    des->set_precision(mod->time_precision);
+
+	      // Look for module parameter replacements. The "replace" map
+	      // maps parameter name to replacement expression that is
+	      // passed. It is built up by the ordered overrides or named
+	      // overrides.
+
+	    typedef map<perm_string,PExpr*>::const_iterator mparm_it_t;
+	    map<perm_string,PExpr*> replace;
+
+
+	      // Positional parameter overrides are matched to parameter
+	      // names by using the param_names list of parameter
+	      // names. This is an ordered list of names so the first name
+	      // is parameter 0, the second parameter 1, and so on.
+
+	    if (overrides_) {
+		  assert(parms_ == 0);
+		  list<perm_string>::const_iterator cur
+			= mod->param_names.begin();
+		  unsigned idx = 0;
+		  for (;;) {
+			if (idx >= overrides_->count())
+			      break;
+			if (cur == mod->param_names.end())
+			      break;
+
+			replace[*cur] = (*overrides_)[idx];
+
+			idx += 1;
+			cur ++;
+		  }
+	    }
+
+	      // Named parameter overrides carry a name with each override
+	      // so the mapping into the replace list is much easier.
+	    if (parms_) {
+		  assert(overrides_ == 0);
+		  for (unsigned idx = 0 ;  idx < nparms_ ;  idx += 1)
+			replace[parms_[idx].name] = parms_[idx].parm;
+
+	    }
+
+
+	    Module::replace_t replace_net;
+
+	      // And here we scan the replacements we collected. Elaborate
+	      // the expression in my context, then replace the sub-scope
+	      // parameter value with the new expression.
+
+	    for (mparm_it_t cur = replace.begin()
+		       ; cur != replace.end() ;  cur ++ ) {
+
+		  PExpr*tmp = (*cur).second;
+		    // No expression means that the parameter is not
+		    // replaced at all.
+		  if (tmp == 0)
+			continue;
+		  NetExpr*val = tmp->elaborate_pexpr(des, sc);
+		  replace_net[(*cur).first] = val;
+	    }
+
+	      // This call actually arranges for the description of the
+	      // module type to process this instance and handle parameters
+	      // and sub-scopes that might occur. Parameters are also
+	      // created in that scope, as they exist. (I'll override them
+	      // later.)
+	    mod->elaborate_scope(des, my_scope, replace_net);
 
       }
 
+	/* Stash the instance array of scopes into the parent
+	   scope. Later elaboration passes will use this vector to
+	   further elaborate the array.
 
-	// And here we scan the replacements we collected. Elaborate
-	// the expression in my context, then replace the sub-scope
-	// parameter value with the new expression.
-
-      for (mparm_it_t cur = replace.begin()
-		 ; cur != replace.end() ;  cur ++ ) {
-
-	    PExpr*tmp = (*cur).second;
-	    NetExpr*val = tmp->elaborate_pexpr(des, sc);
-	    val = my_scope->set_parameter((*cur).first, val);
-	    assert(val);
-	    delete val;
-      }
+	   Note that the array is ordered from LSB to MSB. We will use
+	   that fact in the main elaborate to connect things in the
+	   correct order. */
+      sc->instance_arrays[get_name()] = instances;
 }
 
 /*
@@ -328,6 +798,10 @@ void PEvent::elaborate_scope(Design*des, NetScope*scope) const
 
 void PFunction::elaborate_scope(Design*des, NetScope*scope) const
 {
+      assert(scope->type() == NetScope::FUNC);
+
+      if (statement_)
+	    statement_->elaborate_scope(des, scope);
 }
 
 void PTask::elaborate_scope(Design*des, NetScope*scope) const
@@ -357,10 +831,19 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
 {
       NetScope*my_scope = scope;
 
-      if (name_ != "") {
-	    my_scope = new NetScope(scope, name_.c_str(), bl_type_==BL_PAR
+      if (pscope_name() != 0) {
+	    hname_t use_name(pscope_name());
+	    if (scope->child(use_name)) {
+		  cerr << get_fileline() << ": error: block/scope name "
+		       << use_name << " already used in this context."
+		       << endl;
+		  des->errors += 1;
+		  return;
+	    }
+	    my_scope = new NetScope(scope, use_name, bl_type_==BL_PAR
 				    ? NetScope::FORK_JOIN
 				    : NetScope::BEGIN_END);
+	    my_scope->set_line(get_file(), get_lineno());
       }
 
       for (unsigned idx = 0 ;  idx < list_.count() ;  idx += 1)
@@ -369,7 +852,7 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
 }
 
 /*
- * The case statement itseof does not introduce scope, but contains
+ * The case statement itself does not introduce scope, but contains
  * other statements that may be named blocks. So scan the case items
  * with the elaborate_scope method.
  */
@@ -463,58 +946,3 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
       if (statement_)
 	    statement_ -> elaborate_scope(des, scope);
 }
-
-
-/*
- * $Log: elab_scope.cc,v $
- * Revision 1.13  2001/12/30 04:47:57  steve
- *  Properly handle empty target in positionla parameter override.
- *
- * Revision 1.12  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.11  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.10  2001/10/09 02:01:04  steve
- *  Tasks can have sub-scopes.
- *
- * Revision 1.9  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.8  2001/04/28 23:18:08  steve
- *  UDP instances need not have user supplied names.
- *
- * Revision 1.7  2000/12/16 01:45:48  steve
- *  Detect recursive instantiations (PR#2)
- *
- * Revision 1.6  2000/07/30 18:25:43  steve
- *  Rearrange task and function elaboration so that the
- *  NetTaskDef and NetFuncDef functions are created during
- *  signal enaboration, and carry these objects in the
- *  NetScope class instead of the extra, useless map in
- *  the Design class.
- *
- * Revision 1.5  2000/07/22 22:09:03  steve
- *  Parse and elaborate timescale to scopes.
- *
- * Revision 1.4  2000/04/09 17:44:30  steve
- *  Catch event declarations during scope elaborate.
- *
- * Revision 1.3  2000/03/12 17:09:41  steve
- *  Support localparam.
- *
- * Revision 1.2  2000/03/11 03:25:52  steve
- *  Locate scopes in statements.
- *
- * Revision 1.1  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- */
-

emit.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: emit.cc,v 1.68 2002/06/05 03:44:25 steve Exp $"
-#endif
 
 # include "config.h"
 
@@ -32,6 +29,7 @@
 # include  "netlist.h"
 # include  <typeinfo>
 # include  <cassert>
+# include  <cstring>
 
 bool NetNode::emit_node(struct target_t*tgt) const
 {
@@ -51,24 +49,29 @@ bool NetUDP::emit_node(struct target_t*tgt) const
       return true;
 }
 
+bool NetAbs::emit_node(struct target_t*tgt) const
+{
+      tgt->lpm_abs(this);
+      return true;
+}
+
 bool NetAddSub::emit_node(struct target_t*tgt) const
 {
       tgt->lpm_add_sub(this);
       return true;
 }
 
+bool NetArrayDq::emit_node(struct target_t*tgt) const
+{
+      return tgt->lpm_array_dq(this);
+}
+
 bool NetCaseCmp::emit_node(struct target_t*tgt) const
 {
       tgt->net_case_cmp(this);
       return true;
 }
 
-bool NetCAssign::emit_node(struct target_t*tgt) const
-{
-      tgt->net_cassign(this);
-      return true;
-}
-
 bool NetCLShift::emit_node(struct target_t*tgt) const
 {
       tgt->lpm_clshift(this);
@@ -81,6 +84,11 @@ bool NetCompare::emit_node(struct target_t*tgt) const
       return true;
 }
 
+bool NetConcat::emit_node(struct target_t*tgt) const
+{
+      return tgt->concat(this);
+}
+
 bool NetConst::emit_node(struct target_t*tgt) const
 {
       return tgt->net_const(this);
@@ -98,10 +106,9 @@ bool NetFF::emit_node(struct target_t*tgt) const
       return true;
 }
 
-bool NetForce::emit_node(struct target_t*tgt) const
+bool NetLiteral::emit_node(struct target_t*tgt) const
 {
-      tgt->net_force(this);
-      return true;
+      return tgt->net_literal(this);
 }
 
 bool NetModulo::emit_node(struct target_t*tgt) const
@@ -122,12 +129,37 @@ bool NetMux::emit_node(struct target_t*tgt) const
       return true;
 }
 
-bool NetRamDq::emit_node(struct target_t*tgt) const
+bool NetPartSelect::emit_node(struct target_t*tgt) const
 {
-      tgt->lpm_ram_dq(this);
+      return tgt->part_select(this);
+}
+
+bool NetPow::emit_node(struct target_t*tgt) const
+{
+      tgt->lpm_pow(this);
       return true;
 }
 
+bool NetReplicate::emit_node(struct target_t*tgt) const
+{
+      return tgt->replicate(this);
+}
+
+bool NetSignExtend::emit_node(struct target_t*tgt) const
+{
+      return tgt->sign_extend(this);
+}
+
+bool NetUReduce::emit_node(struct target_t*tgt) const
+{
+      return tgt->ureduce(this);
+}
+
+bool NetSysFunc::emit_node(struct target_t*tgt) const
+{
+      return tgt->net_sysfunction(this);
+}
+
 bool NetUserFunc::emit_node(struct target_t*tgt) const
 {
       return tgt->net_function(this);
@@ -321,34 +353,44 @@ void NetScope::emit_scope(struct target_t*tgt) const
 		  tgt->signal(cur);
 		  cur = cur->sig_next_;
 	    } while (cur != signals_->sig_next_);
+
+	      /* Run the signals again, but this time to connect the
+	         delay paths. This is done as a second pass because
+	         the paths reference other signals that may be later
+	         in the list. We can do it here becase delay paths are
+	         always connected within the scope. */
+	    cur = signals_->sig_next_;
+	    do {
+		  tgt->signal_paths(cur);
+		  cur = cur->sig_next_;
+	    } while (cur != signals_->sig_next_);
       }
 
-      if (memories_) {
-	    NetMemory*cur = memories_->snext_;
-	    do {
-		  tgt->memory(cur);
-		  cur = cur->snext_;
-	    } while (cur != memories_->snext_);
-      }
 }
 
-void NetScope::emit_defs(struct target_t*tgt) const
+bool NetScope::emit_defs(struct target_t*tgt) const
 {
+      bool flag = true;
 
       switch (type_) {
 	  case MODULE:
 	    for (NetScope*cur = sub_ ;  cur ;  cur = cur->sib_)
-		  cur->emit_defs(tgt);
+		  flag &= cur->emit_defs(tgt);
 	    break;
 
 	  case FUNC:
-	    tgt->func_def(this);
+	    flag &= tgt->func_def(this);
 	    break;
 	  case TASK:
 	    tgt->task_def(this);
 	    break;
+	  default:  /* BEGIN_END and FORK_JOIN, GENERATE... */
+	    for (NetScope*cur = sub_ ;  cur ;  cur = cur->sib_)
+		  flag &= cur->emit_defs(tgt);
+	    break;
       }
 
+      return flag;
 }
 
 void NetWhile::emit_proc_recurse(struct target_t*tgt) const
@@ -356,42 +398,50 @@ void NetWhile::emit_proc_recurse(struct target_t*tgt) const
       proc_->emit_proc(tgt);
 }
 
-bool Design::emit(struct target_t*tgt) const
+int Design::emit(struct target_t*tgt) const
 {
-      bool rc = true;
+      int rc = 0;
 
-      rc = rc && tgt->start_design(this);
-      if (rc == false)
-	    return false;
+      if (tgt->start_design(this) == false)
+	    return -2;
 
 	// enumerate the scopes
-      for (list<NetScope*>::const_iterator scope = root_scopes_.begin(); 
+      for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
 	   scope != root_scopes_.end(); scope++)
 	    (*scope)->emit_scope(tgt);
 
 
 	// emit nodes
+      bool nodes_rc = true;
       if (nodes_) {
 	    NetNode*cur = nodes_->node_next_;
 	    do {
-		  rc = rc && cur->emit_node(tgt);
+		  nodes_rc = nodes_rc && cur->emit_node(tgt);
 		  cur = cur->node_next_;
 	    } while (cur != nodes_->node_next_);
       }
 
 
 	// emit task and function definitions
-      for (list<NetScope*>::const_iterator scope = root_scopes_.begin(); 
+      bool tasks_rc = true;
+      for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
 	   scope != root_scopes_.end(); scope++)
-	    (*scope)->emit_defs(tgt);
+	    tasks_rc &= (*scope)->emit_defs(tgt);
 
 
 	// emit the processes
+      bool proc_rc = true;
       for (const NetProcTop*idx = procs_ ;  idx ;  idx = idx->next_)
-	    rc = rc && idx->emit(tgt);
+	    proc_rc &= idx->emit(tgt);
 
-      if (tgt->end_design(this) != 0)
-	    rc = false;
+      rc = tgt->end_design(this);
+
+      if (nodes_rc == false)
+	    return -1;
+      if (tasks_rc == false)
+	    return -2;
+      if (proc_rc == false)
+	  return -3;
 
       return rc;
 }
@@ -411,17 +461,32 @@ void NetEConst::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_const(this);
 }
 
-void NetEMemory::expr_scan(struct expr_scan_t*tgt) const
+void NetEConstParam::expr_scan(struct expr_scan_t*tgt) const
 {
-      tgt->expr_memory(this);
+      tgt->expr_param(this);
+}
+
+void NetECReal::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_creal(this);
+}
+
+void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_rparam(this);
 }
 
 void NetEParam::expr_scan(struct expr_scan_t*tgt) const
 {
-      cerr << get_line() << ":internal error: unexpected NetEParam."
+      cerr << get_fileline() << ":internal error: unexpected NetEParam."
 	   << endl;
 }
 
+void NetEEvent::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_event(this);
+}
+
 void NetEScope::expr_scan(struct expr_scan_t*tgt) const
 {
       tgt->expr_scope(this);
@@ -447,11 +512,6 @@ void NetESignal::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_signal(this);
 }
 
-void NetEBitSel::expr_scan(struct expr_scan_t*tgt) const
-{
-      tgt->expr_subsignal(this);
-}
-
 void NetETernary::expr_scan(struct expr_scan_t*tgt) const
 {
       tgt->expr_ternary(this);
@@ -462,7 +522,7 @@ void NetEUnary::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_unary(this);
 }
 
-bool emit(const Design*des, const char*type)
+int emit(const Design*des, const char*type)
 {
       for (unsigned idx = 0 ;  target_table[idx] ;  idx += 1) {
 	    const struct target*tgt = target_table[idx];
@@ -470,129 +530,8 @@ bool emit(const Design*des, const char*type)
 		  return des->emit(tgt->meth);
 
       }
+
+      cerr << "error: Code generator type " << type
+	   << " not found." << endl;
+      return -1;
 }
-
-
-/*
- * $Log: emit.cc,v $
- * Revision 1.68  2002/06/05 03:44:25  steve
- *  Add support for memory words in l-value of
- *  non-blocking assignments, and remove the special
- *  NetAssignMem_ and NetAssignMemNB classes.
- *
- * Revision 1.67  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.66  2002/03/09 02:10:22  steve
- *  Add the NetUserFunc netlist node.
- *
- * Revision 1.65  2002/01/28 00:52:41  steve
- *  Add support for bit select of parameters.
- *  This leads to a NetESelect node and the
- *  vvp code generator to support that.
- *
- * Revision 1.64  2002/01/19 19:02:08  steve
- *  Pass back target errors processing conditionals.
- *
- * Revision 1.63  2001/10/19 21:53:24  steve
- *  Support multiple root modules (Philip Blundell)
- *
- * Revision 1.62  2001/08/25 23:50:02  steve
- *  Change the NetAssign_ class to refer to the signal
- *  instead of link into the netlist. This is faster
- *  and uses less space. Make the NetAssignNB carry
- *  the delays instead of the NetAssign_ lval objects.
- *
- *  Change the vvp code generator to support multiple
- *  l-values, i.e. concatenations of part selects.
- *
- * Revision 1.61  2001/07/27 04:51:44  steve
- *  Handle part select expressions as variants of
- *  NetESignal/IVL_EX_SIGNAL objects, instead of
- *  creating new and useless temporary signals.
- *
- * Revision 1.60  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.59  2001/04/22 23:09:46  steve
- *  More UDP consolidation from Stephan Boettcher.
- *
- * Revision 1.58  2001/04/06 02:28:02  steve
- *  Generate vvp code for functions with ports.
- *
- * Revision 1.57  2001/04/02 02:28:12  steve
- *  Generate code for task calls.
- *
- * Revision 1.56  2001/03/27 03:31:06  steve
- *  Support error code from target_t::end_design method.
- *
- * Revision 1.55  2000/11/04 01:54:01  steve
- *  Modifications in support of gcc 2.96
- *
- * Revision 1.54  2000/09/26 01:35:42  steve
- *  Remove the obsolete NetEIdent class.
- *
- * Revision 1.53  2000/09/17 21:26:15  steve
- *  Add support for modulus (Eric Aardoom)
- *
- * Revision 1.52  2000/09/02 20:54:20  steve
- *  Rearrange NetAssign to make NetAssign_ separate.
- *
- * Revision 1.51  2000/08/14 04:39:56  steve
- *  add th t-dll functions for net_const, net_bufz and processes.
- *
- * Revision 1.50  2000/08/09 03:43:45  steve
- *  Move all file manipulation out of target class.
- *
- * Revision 1.49  2000/08/08 01:50:42  steve
- *  target methods need not take a file stream.
- *
- * Revision 1.48  2000/07/30 18:25:43  steve
- *  Rearrange task and function elaboration so that the
- *  NetTaskDef and NetFuncDef functions are created during
- *  signal enaboration, and carry these objects in the
- *  NetScope class instead of the extra, useless map in
- *  the Design class.
- *
- * Revision 1.47  2000/07/29 16:21:08  steve
- *  Report code generation errors through proc_delay.
- *
- * Revision 1.46  2000/07/27 05:13:44  steve
- *  Support elaboration of disable statements.
- *
- * Revision 1.45  2000/05/11 23:37:27  steve
- *  Add support for procedural continuous assignment.
- *
- * Revision 1.44  2000/05/04 03:37:58  steve
- *  Add infrastructure for system functions, move
- *  $time to that structure and add $random.
- *
- * Revision 1.43  2000/05/02 03:13:31  steve
- *  Move memories to the NetScope object.
- *
- * Revision 1.42  2000/05/02 00:58:12  steve
- *  Move signal tables to the NetScope class.
- *
- * Revision 1.41  2000/04/23 03:45:24  steve
- *  Add support for the procedural release statement.
- *
- * Revision 1.40  2000/04/22 04:20:19  steve
- *  Add support for force assignment.
- *
- * Revision 1.39  2000/04/12 04:23:58  steve
- *  Named events really should be expressed with PEIdent
- *  objects in the pform,
- *
- *  Handle named events within the mix of net events
- *  and edges. As a unified lot they get caught together.
- *  wait statements are broken into more complex statements
- *  that include a conditional.
- *
- *  Do not generate NetPEvent or NetNEvent objects in
- *  elaboration. NetEvent, NetEvWait and NetEvProbe
- *  take over those functions in the netlist.
- */
-

eval.cc

@@ -16,24 +16,23 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: eval.cc,v 1.29 2002/06/07 02:57:54 steve Exp $"
-#endif
 
 # include "config.h"
 
+# include  <cstring>
 # include  <iostream>
 
 # include  "PExpr.h"
 # include  "netlist.h"
+# include  "netmisc.h"
 # include  "compiler.h"
 
-verinum* PExpr::eval_const(const Design*, const NetScope*) const
+verinum* PExpr::eval_const(Design*, NetScope*) const
 {
       return 0;
 }
 
-verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEBinary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*l = left_->eval_const(des, scope);
       if (l == 0) return 0;
@@ -47,9 +46,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
       switch (op_) {
 	  case '+': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv+rv, l->len());
+		      res = new verinum(*l + *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -57,9 +54,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 	  }
 	  case '-': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv-rv, l->len());
+		      res = new verinum(*l - *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -67,9 +62,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 	  }
 	  case '*': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv * rv, l->len());
+		      res = new verinum(*l * *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -95,6 +88,26 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 		}
 		break;
 	  }
+	  case '>': {
+		if (l->is_defined() && r->is_defined()) {
+		      long lv = l->as_long();
+		      long rv = r->as_long();
+		      res = new verinum(lv > rv, l->len());
+		} else {
+		      res = new verinum(verinum::Vx, l->len());
+		}
+		break;
+	  }
+	  case '<': {
+		if (l->is_defined() && r->is_defined()) {
+		      long lv = l->as_long();
+		      long rv = r->as_long();
+		      res = new verinum(lv < rv, l->len());
+		} else {
+		      res = new verinum(verinum::Vx, l->len());
+		}
+		break;
+	  }
 	  case 'l': { // left shift (<<)
 		assert(r->is_defined());
 		unsigned long rv = r->as_ulong();
@@ -128,47 +141,89 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
       delete r;
       return res;
 }
+verinum* PEConcat::eval_const(Design*des, NetScope*scope) const
+{
+      verinum*accum = parms_[0]->eval_const(des, scope);
+      if (accum == 0)
+	    return 0;
+
+      for (unsigned idx = 1 ;  idx < parms_.count() ;  idx += 1) {
+
+	    verinum*tmp = parms_[idx]->eval_const(des, scope);
+	    if (tmp == 0) {
+		  delete accum;
+		  return 0;
+	    }
+	    assert(tmp);
+
+	    *accum = concat(*accum, *tmp);
+	    delete tmp;
+      }
+
+      return accum;
+}
 
 
 /*
  * Evaluate an identifier as a constant expression. This is only
  * possible if the identifier is that of a parameter.
  */
-verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEIdent::eval_const(Design*des, NetScope*scope) const
 {
       assert(scope);
-      const NetExpr*expr = des->find_parameter(scope, path_);
+      NetNet*net;
+      NetEvent*eve;
+      const NetExpr*expr;
+
+      const name_component_t&name_tail = path_.back();
+
+	// Handle the special case that this ident is a genvar
+	// variable name. In that case, the genvar meaning preempts
+	// everything and we just return that value immediately.
+      if (scope->genvar_tmp
+	  && strcmp(name_tail.name,scope->genvar_tmp) == 0) {
+	    return new verinum(scope->genvar_tmp_val);
+      }
+
+      symbol_search(des, scope, path_, net, expr, eve);
 
       if (expr == 0)
 	    return 0;
 
       const NetEConst*eval = dynamic_cast<const NetEConst*>(expr);
+      if (eval == 0) {
+	    cerr << get_fileline() << ": internal error: Unable to evaluate "
+		 << "constant expression (parameter=" << path_
+		 << "): " << *expr << endl;
+	    return 0;
+      }
+
       assert(eval);
 
-      if (msb_ || lsb_)
+      if (!name_tail.index.empty())
 	    return 0;
 
 
       return new verinum(eval->value());
 }
 
-verinum* PEFNumber::eval_const(const Design*, const NetScope*) const
+verinum* PEFNumber::eval_const(Design*, NetScope*) const
 {
       long val = value_->as_long();
       return new verinum(val);
 }
 
-verinum* PENumber::eval_const(const Design*, const NetScope*) const
+verinum* PENumber::eval_const(Design*, NetScope*) const
 {
       return new verinum(value());
 }
 
-verinum* PEString::eval_const(const Design*, const NetScope*) const
+verinum* PEString::eval_const(Design*, NetScope*) const
 {
       return new verinum(string(text_));
 }
 
-verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PETernary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*test = expr_->eval_const(des, scope);
       if (test == 0)
@@ -188,7 +243,7 @@ verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
       }
 }
 
-verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEUnary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*val = expr_->eval_const(des, scope);
       if (val == 0)
@@ -202,7 +257,7 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 		  /* We need to expand the value a bit if we are
 		     taking the 2's complement so that we are
 		     guaranteed to not overflow. */
-		verinum tmp (0UL, val->len()+1);
+		verinum tmp ((uint64_t)0, val->len()+1);
 		for (unsigned idx = 0 ;  idx < val->len() ;  idx += 1)
 		      tmp.set(idx, val->get(idx));
 
@@ -215,63 +270,3 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 	    delete val;
       return 0;
 }
-
-
-/*
- * $Log: eval.cc,v $
- * Revision 1.29  2002/06/07 02:57:54  steve
- *  Simply give up on constants with indices.
- *
- * Revision 1.28  2002/06/06 18:57:04  steve
- *  Better error for identifier index eval.
- *
- * Revision 1.27  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.26  2001/12/29 22:10:10  steve
- *  constant eval of arithmetic with x and z.
- *
- * Revision 1.25  2001/12/29 00:43:55  steve
- *  Evaluate constant right shifts.
- *
- * Revision 1.24  2001/12/03 04:47:15  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.23  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.22  2001/11/06 06:11:55  steve
- *  Support more real arithmetic in delay constants.
- *
- * Revision 1.21  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.20  2001/02/09 02:49:59  steve
- *  Be more clear about scope of failure.
- *
- * Revision 1.19  2001/01/27 05:41:48  steve
- *  Fix sign extension of evaluated constants. (PR#91)
- *
- * Revision 1.18  2001/01/14 23:04:56  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- * Revision 1.17  2001/01/04 04:47:51  steve
- *  Add support for << is signal indices.
- *
- * Revision 1.16  2000/12/10 22:01:36  steve
- *  Support decimal constants in behavioral delays.
- *
- * Revision 1.15  2000/09/07 22:38:13  steve
- *  Support unary + and - in constants.
- */
-

eval_attrib.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2002 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2002-2004 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -16,8 +16,8 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if !defined(WINNT)
-#ident "$Id: eval_attrib.cc,v 1.3 2002/06/06 18:57:18 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: eval_attrib.cc,v 1.9 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -29,14 +29,13 @@
 
 /*
  * The evaluate_attributes function evaluates the attribute
- * expressions from the map, and resturns a table in a form suitable
+ * expressions from the map, and returns a table in a form suitable
  * for passing to netlist devices.
  */
 
-attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
+attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
 				   unsigned&natt,
-				   const Design*des,
-				   const NetScope*scope)
+				   Design*des, NetScope*scope)
 {
       natt = att.size();
       if (natt == 0)
@@ -46,16 +45,19 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
 
       unsigned idx = 0;
 
-      typedef map<string,PExpr*>::const_iterator iter_t;
+      typedef map<perm_string,PExpr*>::const_iterator iter_t;
       for (iter_t cur = att.begin() ;  cur != att.end() ;  cur ++, idx++) {
 	    table[idx].key = (*cur).first;
 	    PExpr*exp = (*cur).second;
 
+	      /* If the attribute value is given in the source, then
+		 evaluate it as a constant. If the value is not
+		 given, then assume the value is 1. */
 	    verinum*tmp;
 	    if (exp)
 		  tmp = exp->eval_const(des, scope);
 	    else
-		  tmp = new verinum();
+		  tmp = new verinum(1);
 
 	    if (tmp == 0)
 		  cerr << "internal error: no result for " << *exp << endl;
@@ -71,6 +73,24 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
 
 /*
  * $Log: eval_attrib.cc,v $
+ * Revision 1.9  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
+ *
+ * Revision 1.8  2005/11/27 17:01:57  steve
+ *  Fix for stubborn compiler.
+ *
+ * Revision 1.7  2004/02/20 18:53:35  steve
+ *  Addtrbute keys are perm_strings.
+ *
+ * Revision 1.6  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.5  2002/08/12 01:34:59  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.4  2002/08/10 21:59:39  steve
+ *  The default attribute value is 1.
+ *
  * Revision 1.3  2002/06/06 18:57:18  steve
  *  Use standard name for iostream.
  *

eval_rconst.cc

@@ -1,101 +0,0 @@
-/*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: eval_rconst.cc,v 1.4 2001/11/07 04:01:59 steve Exp $"
-#endif
-
-# include "config.h"
-
-# include  "PExpr.h"
-
-verireal* PExpr::eval_rconst(const Design*, const NetScope*) const
-{
-      return 0;
-}
-
-verireal* PEFNumber::eval_rconst(const Design*, const NetScope*) const
-{
-      verireal*res = new verireal;
-      *res = *value_;
-      return res;
-}
-
-verireal* PENumber::eval_rconst(const Design*, const NetScope*) const
-{
-      verireal*res = new verireal(value_->as_long());
-      return res;
-}
-
-verireal* PEBinary::eval_rconst(const Design*des, const NetScope*scope) const
-{
-      verireal*lef = left_->eval_rconst(des, scope);
-      verireal*rig = right_->eval_rconst(des, scope);
-      verireal*res = 0;
-
-      switch (op_) {
-	  case '*':
-	    if (lef == 0)
-		  break;
-	    if (rig == 0)
-		  break;
-	    res = new verireal;
-	    *res = (*lef) * (*rig);
-	    break;
-
-	  default:
-	    break;
-      }
-
-      delete lef;
-      delete rig;
-      return res;
-}
-
-
-verireal* PEIdent::eval_rconst(const Design*des, const NetScope*scope) const
-{
-      verinum* val = eval_const(des, scope);
-      if (val == 0)
-	    return 0;
-
-      verireal*res = new verireal(val->as_long());
-      delete val;
-      return res;
-}
-
-/*
- * $Log: eval_rconst.cc,v $
- * Revision 1.4  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.3  2001/11/06 06:11:55  steve
- *  Support more real arithmetic in delay constants.
- *
- * Revision 1.2  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2001/01/14 23:04:56  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- */
-

examples/des.v

@@ -218,11 +218,11 @@ output 	[1:48] k;
 wire 	[1:56] YY;
 
         assign YY[1:28]=c;         assign YY[29:56]=d;
-        
+
         assign k[1]=YY[14];   assign k[2]=YY[17];   assign k[3]=YY[11];   assign k[4]=YY[24];   assign k[5]=YY[1];    assign k[6]=YY[5];
         assign k[7]=YY[3];    assign k[8]=YY[28];   assign k[9]=YY[15];   assign k[10]=YY[6];   assign k[11]=YY[21];  assign k[12]=YY[10];
-        assign k[13]=YY[23];  assign k[14]=YY[19];  assign k[15]=YY[12];  assign k[16]=YY[4];   assign k[17]=YY[26];  assign k[18]=YY[8]; 
-        assign k[19]=YY[16];  assign k[20]=YY[7];   assign k[21]=YY[27];  assign k[22]=YY[20];  assign k[23]=YY[13];  assign k[24]=YY[2]; 
+        assign k[13]=YY[23];  assign k[14]=YY[19];  assign k[15]=YY[12];  assign k[16]=YY[4];   assign k[17]=YY[26];  assign k[18]=YY[8];
+        assign k[19]=YY[16];  assign k[20]=YY[7];   assign k[21]=YY[27];  assign k[22]=YY[20];  assign k[23]=YY[13];  assign k[24]=YY[2];
         assign k[25]=YY[41];  assign k[26]=YY[52];  assign k[27]=YY[31];  assign k[28]=YY[37];  assign k[29]=YY[47];  assign k[30]=YY[55];
         assign k[31]=YY[30];  assign k[32]=YY[40];  assign k[33]=YY[51];  assign k[34]=YY[45];  assign k[35]=YY[33];  assign k[36]=YY[48];
         assign k[37]=YY[44];  assign k[38]=YY[49];  assign k[39]=YY[39];  assign k[40]=YY[56];  assign k[41]=YY[34];  assign k[42]=YY[53];
@@ -252,13 +252,13 @@ input 	[1:64] key;
 output 	[1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
 wire 	[1:28] c0x,c1x,c2x,c3x,c4x,c5x,c6x,c7x,c8x,c9x,c10x,c11x,c12x,c13x,c14x,c15x,c16x;
 wire 	[1:28] d0x,d1x,d2x,d3x,d4x,d5x,d6x,d7x,d8x,d9x,d10x,d11x,d12x,d13x,d14x,d15x,d16x;
-  
+
 pc1 pc1(key, c0x, d0x);
 
 rol1 rc1(c1x, c0x); rol1 rd1(d1x, d0x);
 rol1 rc2(c2x, c1x); rol1 rd2(d2x, d1x);
 rol2 rc3(c3x, c2x); rol2 rd3(d3x, d2x);
-rol2 rc4(c4x, c3x); rol2 rd4(d4x, d3x);  
+rol2 rc4(c4x, c3x); rol2 rd4(d4x, d3x);
 rol2 rc5(c5x, c4x); rol2 rd5(d5x, d4x);
 rol2 rc6(c6x, c5x); rol2 rd6(d6x, d5x);
 rol2 rc7(c7x, c6x); rol2 rd7(d7x, d6x);
@@ -272,7 +272,7 @@ rol2 rce(c14x, c13x); rol2 rde(d14x, d13x);
 rol2 rcf(c15x, c14x); rol2 rdf(d15x, d14x);
 rol1 rcg(c16x, c15x); rol1 rdg(d16x, d15x);
 
-        
+
 pc2 pc2x1(c1x,d1x,k1x);
 pc2 pc2x2(c2x,d2x,k2x);
 pc2 pc2x3(c3x,d3x,k3x);
@@ -913,7 +913,7 @@ assign l0x[17]=pt[62];        assign l0x[18]=pt[54];        assign l0x[19]=pt[46
 assign l0x[21]=pt[30];        assign l0x[22]=pt[22];        assign l0x[23]=pt[14];        assign l0x[24]=pt[6];
 assign l0x[25]=pt[64];        assign l0x[26]=pt[56];        assign l0x[27]=pt[48];        assign l0x[28]=pt[40];
 assign l0x[29]=pt[32];        assign l0x[30]=pt[24];        assign l0x[31]=pt[16];        assign l0x[32]=pt[8];
-        
+
 assign r0x[1]=pt[57];         assign r0x[2]=pt[49];         assign r0x[3]=pt[41];         assign r0x[4]=pt[33];
 assign r0x[5]=pt[25];         assign r0x[6]=pt[17];         assign r0x[7]=pt[9];          assign r0x[8]=pt[1];
 assign r0x[9]=pt[59];         assign r0x[10]=pt[51];        assign r0x[11]=pt[43];        assign r0x[12]=pt[35];
@@ -935,7 +935,7 @@ assign e[9]=ri[6];    assign e[10]=ri[7];   assign e[11]=ri[8];   assign e[12]=r
 assign e[17]=ri[12];  assign e[18]=ri[13];  assign e[19]=ri[12];  assign e[20]=ri[13];  assign e[21]=ri[14];  assign e[22]=ri[15];  assign e[23]=ri[16];  assign e[24]=ri[17];
 assign e[25]=ri[16];  assign e[26]=ri[17];  assign e[27]=ri[18];  assign e[28]=ri[19];  assign e[29]=ri[20];  assign e[30]=ri[21];  assign e[31]=ri[20];  assign e[32]=ri[21];
 assign e[33]=ri[22];  assign e[34]=ri[23];  assign e[35]=ri[24];  assign e[36]=ri[25];  assign e[37]=ri[24];  assign e[38]=ri[25];  assign e[39]=ri[26];  assign e[40]=ri[27];
-assign e[41]=ri[28];  assign e[42]=ri[29];  assign e[43]=ri[28];  assign e[44]=ri[29];  assign e[45]=ri[30];  assign e[46]=ri[31];  assign e[47]=ri[32];  assign e[48]=ri[1]; 
+assign e[41]=ri[28];  assign e[42]=ri[29];  assign e[43]=ri[28];  assign e[44]=ri[29];  assign e[45]=ri[30];  assign e[46]=ri[31];  assign e[47]=ri[32];  assign e[48]=ri[1];
 
 endmodule
 

examples/hello.vl

@@ -26,21 +26,21 @@
   *  Compile this program with the command:
   *
   *      iverilog -ohello hello.vl
-  *  
+  *
   *  After churning for a little while, the program will create the output
   *  file "hello" which is compiled, linked and ready to run. Run this
   *  program like so:
-  *  
-  *      ./hello
-  *  
+  *
+  *      vvp hello
+  *
   *  and the program will print the message to its output. Easy! For
   *  more on how to make the iverilog command work, see the iverilog
   *  manual page.
   */
 
 module main();
- 
-initial 
+
+initial
   begin
     $display("Hello, World");
     $finish ;

examples/hello_vpi.c

@@ -16,7 +16,9 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#ident "$Id: hello_vpi.c,v 1.1 2002/04/18 03:25:16 steve Exp $"
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: hello_vpi.c,v 1.5 2007/01/17 05:35:48 steve Exp $"
+#endif
 
 /*
  * This file contains an example VPI module to demonstrate the tools
@@ -31,7 +33,7 @@
 
 # include  <vpi_user.h>
 
-static int my_hello_calltf(char *xx)
+static PLI_INT32 my_hello_calltf(char *xx)
 {
       vpi_printf("Hello World, from VPI.\n");
       return 0;
@@ -60,6 +62,18 @@ void (*vlog_startup_routines[])() = {
 };
 /*
  * $Log: hello_vpi.c,v $
+ * Revision 1.5  2007/01/17 05:35:48  steve
+ *  Fix typo is hello_vpi.c example.
+ *
+ * Revision 1.4  2006/10/30 22:46:25  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
+ * Revision 1.3  2002/08/12 01:35:01  steve
+ *  conditional ident string using autoconfig.
+ *
+ * Revision 1.2  2002/08/11 23:47:04  steve
+ *  Add missing Log and Ident strings.
+ *
  * Revision 1.1  2002/04/18 03:25:16  steve
  *  More examples.
  *

examples/hello_vpi.vl

@@ -26,21 +26,21 @@
   *  Compile this program with the command:
   *
   *      iverilog -ohello_vpi hello_vpi.vl
-  *  
+  *
   *  After churning for a little while, the program will create the output
   *  file "hello" which is compiled, linked and ready to run. Run this
   *  program like so:
-  *  
+  *
   *      vvp -M. -mhello_vpi hello_vpi
-  *  
+  *
   *  and the program will print the message to its output. Easy! For
   *  more on how to make the iverilog command work, see the iverilog
   *  manual page.
   */
 
 module main();
- 
-initial 
+
+initial
   begin
      $my_hello;
      $finish ;

examples/pal_reg.v

@@ -26,7 +26,7 @@
  *   iverilog -tpal -ppart=generic-22v10-plcc -opal_reg.jed pal_reg.v
  *
  * The output file name (passed through the -o<file> switch) can be
- * any file you desire. If the compilation and fittin all succeed, the
+ * any file you desire. If the compilation and fitting all succeed, the
  * output file will be a JEDEC file that you can take to your favorite
  * PROM programmer to program the part.
  *
@@ -45,7 +45,7 @@
  *
  * The output drivers are controlled by a single active low output
  * enable. I used bufif0 devices in this example, but the exact same
- * thing can be achived with a continuous assignment like so:
+ * thing can be achieved with a continuous assignment like so:
  *
  *   assign out = oe? 8'hzz : Q;
  *
@@ -76,7 +76,7 @@ endmodule
  * a PLCC package.
  *
  * Note that this module has no logic in it. It is a convention I use
- * that I put all the functionality in a seperate module (seen above)
+ * that I put all the functionality in a separate module (seen above)
  * and isolate the Icarus Verilog specific $attribute madness into a
  * top-level module. The advantage of this style is that the entire
  * module can be `ifdef'ed out when doing simulation and you don't

examples/show_vcd.vl

@@ -20,36 +20,36 @@
  /*
   *  This example program simulates a 16x1 ram, and is used as an
   *  example for using VCD output and waveform viewers.
-  *  
+  *
   *  Like any other Verilog simulation, compile this program with the
   *  command:
-  *  
+  *
   *      iverilog show_vcd.vl
-  *  
+  *
   *  This will generate the show_vcd command in the current directory.
   *  When you run the command, you will see the output from all the
   *  calls to $display, but also there will be a dump file ``show_vcd.vcd''.
   *  The name of this file is set by the statement:
   *
   *      $dumpfile("show_vcd.vcd");
-  *  
+  *
   *  in the main module. The output file uses the standard VCD file format
   *  so can be viewed using off-the-shelf waveform viewers. The remaining
   *  steps describe how to use GTKWave to view the file. If you are using
   *  a different viewer, see the documentation for that tool.
-  *  
+  *
   *  To view the output generated by running show_vcd, start the GTKWave
   *  viewer with the command:
-  *  
+  *
   *      gtkwave show_vcd.vcd
-  *  
+  *
   *  The GTKWave program will display its main window, and show in a small
   *  status box (upper left corner) that it succeeded in loading the dump
   *  file. However, there are no waveforms displayed yet. Select signals to
   *  add to the waveform display using the menu selection:
   *
   *      "Search --> Signal Search Tree"
-  *  
+  *
   *  This will bring up a dialog box that shows in directory tree format
   *  the signals of the program. Select the signals you wish to view, and
   *  click one of the buttons on the bottom of the dialog box to display
@@ -60,10 +60,10 @@
   *  $dumpvars system tasks. The $dumpfile task tells the simulation where
   *  to write the VCD output. This task must be called once before the
   *  $dumpvars task is called.
-  *  
+  *
   *  The $dumpvars task tells the simulation what variables to write to
   *  the VCD output. The first parameter is how far to descend while
-  *  scanning a scope, and the remaining paramters are signals or scope
+  *  scanning a scope, and the remaining parameters are signals or scope
   *  names to include in the dump. If a scope name is given, all the
   *  signals within the scope are dumped. If a wire or register name is
   *  given, that signal is included.
@@ -77,7 +77,7 @@ module ram16x1 (q, d, a, we, wclk);
    input wclk;
 
    reg mem[15:0];
-   
+
    assign q = mem[a];
    always @(posedge wclk) if (we) mem[a] = d;
 
@@ -88,7 +88,7 @@ module main;
    reg d;
    reg [3:0] a;
    reg we, wclk;
-    
+
    ram16x1 r1 (q, d, a, we, wclk);
 
    initial begin

examples/sqrt-virtex.v

@@ -0,0 +1,378 @@
+/*
+ * Copyright (c) 2002 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ *
+ *   $Id: sqrt-virtex.v,v 1.5 2007/03/22 16:08:18 steve Exp $"
+ */
+
+/*
+ * This module is a synthesizable square-root function. It is also a
+ * detailed example of how to target Xilinx Virtex parts using
+ * Icarus Verilog. In fact, for no particular reason other than to
+ * be excessively specific, I will step through the process of
+ * generating a design for a Spartan-II XC2S15-VQ100, and also how to
+ * generate a generic library part for larger Virtex designs.
+ *
+ * In addition to Icarus Verilog, you will need implementation
+ * software from Xilinx. As of this writing, this example was tested
+ * with Foundation 4.2i, but it should work the same with ISE and
+ * WebPACK software.
+ *
+ * This example source contains all the Verilog needed to do
+ * everything described below. We use conditional compilation to
+ * select the bits of Verilog that are needed to perform each specific
+ * task.
+ *
+ * SIMULATE THE DESIGN
+ *
+ * This source file includes a simulation test bench. To compile the
+ * program to include this test bench, use the command line:
+ *
+ *    iverilog -DSIMULATE=1 -oa.out sqrt-virtex.v
+ *
+ * This generates the file "a.out" that can then be executed with the
+ * command:
+ *
+ *    vvp a.out
+ *
+ * This causes the simulation to run a long set of example sqrt
+ * calculations. Each result is checked by the test bench to assure
+ * that the result is valid. When it is done, the program prints
+ * "PASSED" and finishes the simulation.
+ *
+ * When you take a close look at the "main" module below, you will see
+ * that it uses Verilog constructs that are not synthesizable. This
+ * is fine, as we will never try to synthesize it.
+ *
+ * LIBRARY PARTS
+ *
+ * One can use the sqrt32 module to generate an EDIF file suitable for
+ * use as a library part. This part can be imported to the Xilinx
+ * schematic editor, then placed like any other pre-existing
+ * macro. One can also pass the generated EDIF as a precompiled macro
+ * that other designers may use as they see fit.
+ *
+ * To make an EDIF file from the sqrt32 module, execute the command:
+ *
+ *    iverilog -osqrt32.edf -tfpga -parch=virtex sqrt-virtex.v
+ *
+ * The -parch=virtex tells the code generator to generate code for the
+ * virtex architecture family (we don't yet care what specific part)
+ * and the -osqrt32.edf places the output into the file
+ * sqrt32.edf.
+ *
+ * Without any preprocessor directives, the only module is the sqrt32
+ * module, so sqrt32 is compiled as the root. The ports of the module
+ * are automatically made into ports of the sqrt32.edf netlist, and
+ * the contents of the sqrt32 module are connected appropriately.
+ *
+ * COMPLETE CHIP DESIGNS
+ *
+ * To make a complete chip design, there are other bits that need to
+ * be accounted for. Signals must be assigned to pins, and some
+ * special devices may need to be created. We also want to write into
+ * the EDIF file complete part information so that the implementation
+ * tools know how to route the complete design. The command to compile
+ * for our target part is:
+ *
+ *    iverilog -ochip.edf -tfpga \
+ *           -parch=virtex -ppart=XC2S15-VQ100 \
+ *           -DMAKE_CHIP=1 sqrt-virtex.v
+ *
+ * This command uses the "chip" module as the root. This module in
+ * turn has ports that are destined to be the pins of the completed
+ * part. The -ppart= option gives complete part information, that is
+ * in turn written into the EDIF file. This saves us the drudgery of
+ * repeating that part number for later commands.
+ *
+ * The next steps involve Xilinx software, and to talk to Xilinx
+ * software, the netlist must be in the form of an "ngd" file, a
+ * binary netlist format. The command:
+ *
+ *    ngdbuild chip.edf chip.ngd
+ *
+ * does the trick. The input to ngdbuild is the chip.edf file created
+ * by Icarus Verilog, and the output is the chip.ngd file that the
+ * implementation tools may read. From this point, it is best to refer
+ * to Xilinx documentation for the software you are using, but the
+ * quick summary is:
+ *
+ *    map -o map.ncd chip.ngd
+ *    par -w map.ncd chip.ncd
+ *
+ * The result of this sequence of commands is the chip.ncd file that
+ * is ready to be viewed by FPGA Edit, or converted to a bit stream,
+ * or whatever.
+ *
+ * POST MAP SIMULATION
+ *
+ * Warm fuzzies are good, and retesting your design after the part
+ * is mapped by the Xilinx backend tools is a cheap source of fuzzies.
+ * The command to make a Verilog file out of the mapped design is:
+ *
+ *    ngd2ver chip.ngd chip_root.v
+ *
+ * This command creates from the chip.ngd the file "chip_root.v" that
+ * contains Verilog code that simulates the mapped design. This output
+ * Verilog has the single root module "chip_root", which came from the
+ * name of the root module when we were making the EDIF file in the
+ * first place. The module has ports named just line the ports of the
+ * chip_root module below.
+ *
+ * The generated Verilog uses the library in the directory
+ * $(XILINX)/verilog/src/simprims. This directory comes with the ISE
+ * WebPACK installation that you are using. Icarus Verilog is able to
+ * simulate using that library.
+ *
+ * To compile a post-map simulation of the chip_root.v, use the
+ * command:
+ *
+ *    iverilog -DSIMULATE -DPOST_MAP -ob.out \
+ *             -y $(XILINX)/verilog/src/simprims \
+ *             sqrt-virtex.v chip_root.v \
+ *             $(XILINX)/verilog/src/glbl.v
+ *
+ * This command line generates b.out from the source files
+ * sqrt-virtex.v and chip_root.v (the latter from ngd2ver)
+ * and the "-y <path>" flag specifies the library directory that will
+ * be needed. The glbl.v source file is also included to provide the
+ * GSR and related signals.
+ *
+ * The POST_MAP compiler directive causes the GSR manipulations
+ * included in the test bench to be compiled in, to simulate the chip
+ * startup. Other then that, the test bench runs the post-map design
+ * the same way the pre-synthesis design works.
+ *
+ * Run this design with the command:
+ *
+ *    vvp b.out
+ *
+ * And there you go.
+ */
+
+`ifndef POST_MAP
+ /*
+  * This module approximates the square root of an unsigned 32bit
+  * number. The algorithm works by doing a bit-wise binary search.
+  * Starting from the most significant bit, the accumulated value
+  * tries to put a 1 in the bit position. If that makes the square
+  * too big for the input, the bit is left zero, otherwise it is set
+  * in the result. This continues for each bit, decreasing in
+  * significance, until all the bits are calculated or all the
+  * remaining bits are zero.
+  *
+  * Since the result is an integer, this function really calculates
+  * value of the expression:
+  *
+  *      x = floor(sqrt(y))
+  *
+  * where sqrt(y) is the exact square root of y and floor(N) is the
+  * largest integer <= N.
+  *
+  * For 32 bit numbers, this will never run more than 16 iterations,
+  * which amounts to 16 clocks.
+  */
+
+module sqrt32(clk, rdy, reset, x, .y(acc));
+   input  clk;
+   output rdy;
+   input  reset;
+
+   input [31:0] x;
+   output [15:0] acc;
+
+
+   // acc holds the accumulated result, and acc2 is the accumulated
+   // square of the accumulated result.
+   reg [15:0] acc;
+   reg [31:0] acc2;
+
+   // Keep track of which bit I'm working on.
+   reg [4:0]  bitl;
+   wire [15:0] bit = 1 << bitl;
+   wire [31:0] bit2 = 1 << (bitl << 1);
+
+   // The output is ready when the bitl counter underflows.
+   wire rdy = bitl[4];
+
+   // guess holds the potential next values for acc, and guess2 holds
+   // the square of that guess. The guess2 calculation is a little bit
+   // subtle. The idea is that:
+   //
+   //      guess2 = (acc + bit) * (acc + bit)
+   //             = (acc * acc) + 2*acc*bit + bit*bit
+   //             = acc2 + 2*acc*bit + bit2
+   //             = acc2 + 2 * (acc<<bitl) + bit
+   //
+   // This works out using shifts because bit and bit2 are known to
+   // have only a single bit in them.
+   wire [15:0] guess  = acc | bit;
+   wire [31:0] guess2 = acc2 + bit2 + ((acc << bitl) << 1);
+
+   (* ivl_synthesis_on *)
+   always @(posedge clk or posedge reset)
+      if (reset) begin
+	 acc = 0;
+	 acc2 = 0;
+	 bitl = 15;
+      end else begin
+	 if (guess2 <= x) begin
+	    acc  <= guess;
+	    acc2 <= guess2;
+	 end
+	 bitl <= bitl - 5'd1;
+      end
+
+endmodule // sqrt32
+
+`endif //  `ifndef POST_MAP
+
+`ifdef SIMULATE
+ /*
+  * This module is a test bench for the sqrt32 module. It runs some
+  * test input values through the sqrt32 module, and checks that the
+  * output is valid. If an invalid output is generated, print and
+  * error message and stop immediately. If all the tested values pass,
+  * then print PASSED after the test is complete.
+  */
+module main;
+
+   reg [31:0] x;
+   reg 	      clk, reset;
+
+   wire [15:0] y;
+   wire        rdy;
+
+`ifdef POST_MAP
+   chip_root dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
+`else
+   sqrt32 dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
+`endif
+
+   (* ivl_synthesis_off *)
+   always #5 clk = !clk;
+
+   task reset_dut;
+      begin
+	 reset = 1;
+	 @(posedge clk) ;
+	 #1 reset = 0;
+	 @(negedge clk) ;
+      end
+   endtask // reset_dut
+
+   task crank_dut;
+      begin
+	 while (rdy == 0) begin
+	    @(posedge clk) /* wait */;
+	 end
+      end
+   endtask // crank_dut
+
+`ifdef POST_MAP
+   reg        GSR;
+   assign      glbl.GSR = GSR;
+`endif
+
+   integer idx;
+
+   (* ivl_synthesis_off *)
+   initial begin
+      reset = 0;
+      clk = 0;
+
+      /* If doing a post-map simulation, when we need to wiggle
+         The GSR bit to simulate chip power-up. */
+`ifdef POST_MAP
+      GSR = 1;
+      #100 GSR = 0;
+`endif
+      #100 x = 1;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      x = 3;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      x = 4;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      for (idx = 0 ;  idx < 200 ;  idx = idx + 1) begin
+	 x = $random;
+	 reset_dut;
+	 crank_dut;
+	 $display("x=%d, y=%d", x, y);
+
+	 if (x < (y * y)) begin
+	    $display("ERROR: y is too big");
+	    $finish;
+	 end
+
+	 if (x > ((y + 1)*(y + 1))) begin
+	    $display("ERROR: y is too small");
+	    $finish;
+	 end
+      end
+
+      $display("PASSED");
+      $finish;
+   end
+
+endmodule // main
+`endif
+
+`ifdef MAKE_CHIP
+ /*
+  * This module represents the chip packaging that we intend to
+  * generate. We bind pins here, and route the clock to the global
+  * clock buffer.
+  */
+module chip_root(clk, rdy, reset, x, y);
+   input  clk;
+   output rdy;
+   input  reset;
+
+   input [31:0] x;
+   output [15:0] y;
+
+   wire 	 clk_int;
+
+   (* cellref="BUFG:O,I" *)
+   buf gbuf (clk_int, clk);
+
+   sqrt32 dut(.clk(clk_int), .reset(reset), .rdy(rdy), .x(x), .y(y));
+
+   /* Assign the clk to GCLK0, which is on pin P39. */
+   $attribute(clk, "PAD", "P39");
+
+   // We don't care where the remaining pins go, so set the pin number
+   // to 0. This tells the implementation tools that we want a PAD,
+   // but we don't care which. Also note the use of a comma (,)
+   // separated list to assign pins to the bits of a vector.
+   $attribute(rdy, "PAD", "0");
+   $attribute(reset, "PAD", "0");
+   $attribute(x, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
+   $attribute(y, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
+
+endmodule // chip_root
+
+`endif

examples/sqrt.vl

@@ -16,7 +16,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  *
- *   $Id: sqrt.vl,v 1.3 2000/11/04 01:53:24 steve Exp $"
+ *   $Id: sqrt.vl,v 1.5 2007/03/22 16:08:18 steve Exp $"
  */
 
  /*
@@ -50,7 +50,7 @@
   * where sqrt(y) is the exact square root of y and floor(N) is the
   * largest integer <= N.
   *
-  * For 32bit numbers, this will never run more then 16 iterations,
+  * For 32 bit numbers, this will never run more than 16 iterations,
   * which amounts to 16 clocks.
   */
 
@@ -97,8 +97,8 @@ module sqrt32(clk, rdy, reset, x, .y(acc));
 	 bitl = 15;
       end
    endtask
-   
-   initial clear;   
+
+   initial clear;
 
    always @(reset or posedge clk)
       if (reset)
@@ -121,14 +121,14 @@ module main;
    wire rdy;
 
    sqrt32 root(.clk(clk), .rdy(rdy), .reset(reset), .x(value), .y(result));
-   
+
    always #5 clk = ~clk;
 
    always @(posedge rdy) begin
       $display("sqrt(%d) --> %d", value, result);
       $finish;
    end
-   
+
 
    initial begin
       clk = 0;