displan pmos gates.
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: stub.c,v 1.147 2007/03/02 06:13:22 steve Exp $"
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#ident "$Id: stub.c,v 1.148 2007/06/12 02:23:40 steve Exp $"
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#endif
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/*
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@ -1231,6 +1231,9 @@ static void show_logic(ivl_net_logic_t net)
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case IVL_LO_OR:
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fprintf(out, " or %s", name);
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break;
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case IVL_LO_PMOS:
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fprintf(out, " pmos %s", name);
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break;
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case IVL_LO_PULLDOWN:
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fprintf(out, " pulldown %s", name);
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break;
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@ -1247,7 +1250,7 @@ static void show_logic(ivl_net_logic_t net)
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break;
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default:
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fprintf(out, " unsupported gate %s", name);
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fprintf(out, " unsupported gate<type=%d> %s", ivl_logic_type(net), name);
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break;
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}
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@ -1491,6 +1494,9 @@ int target_design(ivl_design_t des)
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/*
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* $Log: stub.c,v $
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* Revision 1.148 2007/06/12 02:23:40 steve
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* displan pmos gates.
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*
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* Revision 1.147 2007/03/02 06:13:22 steve
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* Add support for edge sensitive spec paths.
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*
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