luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Support resistive mos devices.

This commit is contained in:
steve 2005-06-12 15:13:37 +00:00
parent 86729f52ca
commit 668781788b
5 changed files with 127 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
vvp/logic.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: logic.cc,v 1.25 2005/06/12 00:44:49 steve Exp $"
#ident "$Id: logic.cc,v 1.26 2005/06/12 15:13:37 steve Exp $"
#endif
# include "logic.h"
@ -259,13 +259,7 @@ void compile_functor(char*label, char*type,
} else if (strcmp(type, "BUFZ") == 0) {
obj = new vvp_fun_bufz();
#if 0
} else if (strcmp(type, "RPMOS") == 0) {
obj = new vvp_rpmos_s;
} else if (strcmp(type, "RNMOS") == 0) {
obj = new vvp_rnmos_s;
#endif
} else if (strcmp(type, "MUXX") == 0) {
obj = new table_functor_s(ft_MUXX);
@ -278,6 +272,12 @@ void compile_functor(char*label, char*type,
} else if (strcmp(type, "PMOS") == 0) {
obj = new vvp_fun_pmos(false);
} else if (strcmp(type, "RNMOS") == 0) {
obj = new vvp_fun_rpmos(true);
} else if (strcmp(type, "RPMOS") == 0) {
obj = new vvp_fun_rpmos(false);
} else if (strcmp(type, "EEQ") == 0) {
obj = new table_functor_s(ft_EEQ);
@ -346,6 +346,9 @@ void compile_functor(char*label, char*type,
/*
* $Log: logic.cc,v $
* Revision 1.26 2005/06/12 15:13:37 steve
* Support resistive mos devices.
*
* Revision 1.25 2005/06/12 00:44:49 steve
* Implement nmos and pmos devices.
*

65
vvp/npmos.cc
View File

@ -17,17 +17,18 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: npmos.cc,v 1.11 2005/06/12 00:44:49 steve Exp $"
#ident "$Id: npmos.cc,v 1.12 2005/06/12 15:13:37 steve Exp $"
#endif
# include "npmos.h"
vvp_fun_pmos::vvp_fun_pmos(bool enable_invert)
vvp_fun_pmos_::vvp_fun_pmos_(bool enable_invert)
{
inv_en_ = enable_invert;
}
void vvp_fun_pmos::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
void vvp_fun_pmos_::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
{
/* Data input is processed throught eh recv_vec8 method,
because the strength most be preserved. */
@ -44,21 +45,7 @@ void vvp_fun_pmos::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
generate_output_(ptr);
}
void vvp_fun_pmos::recv_vec8(vvp_net_ptr_t ptr, vvp_vector8_t bit)
{
if (ptr.port() == 1) {
recv_vec4(ptr, reduce4(bit));
return;
}
if (ptr.port() != 0)
return;
bit_ = bit;
generate_output_(ptr);
}
void vvp_fun_pmos::generate_output_(vvp_net_ptr_t ptr)
void vvp_fun_pmos_::generate_output_(vvp_net_ptr_t ptr)
{
vvp_vector8_t out (bit_.size());
@ -92,8 +79,50 @@ void vvp_fun_pmos::generate_output_(vvp_net_ptr_t ptr)
vvp_send_vec8(ptr.ptr()->out, out);
}
vvp_fun_pmos::vvp_fun_pmos(bool enable_invert)
: vvp_fun_pmos_(enable_invert)
{
}
void vvp_fun_pmos::recv_vec8(vvp_net_ptr_t ptr, vvp_vector8_t bit)
{
if (ptr.port() == 1) {
recv_vec4(ptr, reduce4(bit));
return;
}
if (ptr.port() != 0)
return;
bit_ = bit;
generate_output_(ptr);
}
vvp_fun_rpmos::vvp_fun_rpmos(bool enable_invert)
: vvp_fun_pmos_(enable_invert)
{
}
void vvp_fun_rpmos::recv_vec8(vvp_net_ptr_t ptr, vvp_vector8_t bit)
{
if (ptr.port() == 1) {
recv_vec4(ptr, reduce4(bit));
return;
}
if (ptr.port() != 0)
return;
bit_ = resistive_reduction(bit);
generate_output_(ptr);
}
/*
* $Log: npmos.cc,v $
* Revision 1.12 2005/06/12 15:13:37 steve
* Support resistive mos devices.
*
* Revision 1.11 2005/06/12 00:44:49 steve
* Implement nmos and pmos devices.
*

33
vvp/npmos.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: npmos.h,v 1.6 2005/06/12 00:44:49 steve Exp $"
#ident "$Id: npmos.h,v 1.7 2005/06/12 15:13:37 steve Exp $"
#endif
# include "vvp_net.h"
@ -46,15 +46,14 @@
* flag to the costructor activates this invertion.
*/
class vvp_fun_pmos : public vvp_net_fun_t {
class vvp_fun_pmos_ : public vvp_net_fun_t {
public:
explicit vvp_fun_pmos(bool enable_invert);
explicit vvp_fun_pmos_(bool enable_invert);
void recv_vec4(vvp_net_ptr_t port, vvp_vector4_t bit);
void recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit);
private:
protected:
void generate_output_(vvp_net_ptr_t port);
vvp_vector8_t bit_;
@ -62,8 +61,32 @@ class vvp_fun_pmos : public vvp_net_fun_t {
bool inv_en_;
};
class vvp_fun_pmos : public vvp_fun_pmos_ {
public:
explicit vvp_fun_pmos(bool enable_invert);
void recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit);
};
/*
* The vvp_fun_rpmos is a resistive version of the vvp_fun_pmos. The
* only difference is that the input strength is reduced as it passes
* through the device.
*/
class vvp_fun_rpmos : public vvp_fun_pmos_ {
public:
explicit vvp_fun_rpmos(bool enable_invert);
void recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit);
};
/*
* $Log: npmos.h,v $
* Revision 1.7 2005/06/12 15:13:37 steve
* Support resistive mos devices.
*
* Revision 1.6 2005/06/12 00:44:49 steve
* Implement nmos and pmos devices.
*

31
vvp/vvp_net.cc
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: vvp_net.cc,v 1.29 2005/06/02 16:02:11 steve Exp $"
#ident "$Id: vvp_net.cc,v 1.30 2005/06/12 15:13:37 steve Exp $"
# include "config.h"
# include "vvp_net.h"
@ -1225,6 +1225,32 @@ vvp_vector8_t resolve(const vvp_vector8_t&a, const vvp_vector8_t&b)
return out;
}
vvp_vector8_t resistive_reduction(const vvp_vector8_t&that)
{
static unsigned rstr[8] = {
0, /* Hi-Z --> Hi-Z */
1, /* Small capacitance --> Small capacitance */
1, /* Medium capacitance --> Small capacitance */
2, /* Weak drive --> Medium capacitance */
2, /* Large capacitance --> Medium capacitance */
3, /* Pull drive --> Weak drive */
5, /* Strong drive --> Pull drive */
5 /* Supply drive --> Pull drive */
};
vvp_vector8_t res (that.size());
for (unsigned idx = 0 ; idx < res.size() ; idx += 1) {
vvp_scalar_t bit = that.value(idx);
bit = vvp_scalar_t(bit.value(),
rstr[bit.strength0()],
rstr[bit.strength1()]);
res.set_bit(idx, bit);
}
return res;
}
vvp_vector4_t reduce4(const vvp_vector8_t&that)
{
vvp_vector4_t out (that.size());
@ -1347,6 +1373,9 @@ vvp_bit4_t compare_gtge_signed(const vvp_vector4_t&a,
/*
* $Log: vvp_net.cc,v $
* Revision 1.30 2005/06/12 15:13:37 steve
* Support resistive mos devices.
*
* Revision 1.29 2005/06/02 16:02:11 steve
* Add support for notif0/1 gates.
* Make delay nodes support inertial delay.

13
vvp/vvp_net.h
View File

@ -18,7 +18,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: vvp_net.h,v 1.30 2005/06/12 00:44:49 steve Exp $"
#ident "$Id: vvp_net.h,v 1.31 2005/06/12 15:13:37 steve Exp $"
# include "config.h"
# include <assert.h>
@ -239,8 +239,16 @@ class vvp_vector8_t {
vvp_scalar_t*bits_;
};
/* Resolve uses the default Verilog resolver algorithm to resolve
two drive vectors to a single output. */
extern vvp_vector8_t resolve(const vvp_vector8_t&a, const vvp_vector8_t&b);
/* This function implements the strength reduction implied by
Verilog standard resistive devices. */
extern vvp_vector8_t resistive_reduction(const vvp_vector8_t&a);
/* The reduce4 function converts a vector8 to a vector4, losing
strength information in the process. */
extern vvp_vector4_t reduce4(const vvp_vector8_t&that);
/* Print a vector8 value to a stream. */
extern ostream& operator<< (ostream&, const vvp_vector8_t&);
/*
@ -746,6 +754,9 @@ class vvp_wide_fun_t : public vvp_net_fun_t {
/*
* $Log: vvp_net.h,v $
* Revision 1.31 2005/06/12 15:13:37 steve
* Support resistive mos devices.
*
* Revision 1.30 2005/06/12 00:44:49 steve
* Implement nmos and pmos devices.
*