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Rework NetRamDq and IVL_LPM_RAM nodes.

This commit is contained in:
steve 2005-04-06 05:29:08 +00:00
parent d62661257a
commit 65c7ec00e7
10 changed files with 129 additions and 163 deletions
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13
elab_net.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_net.cc,v 1.158 2005/03/19 06:59:53 steve Exp $"
#ident "$Id: elab_net.cc,v 1.159 2005/04/06 05:29:08 steve Exp $"
#endif
# include "config.h"
@ -1655,18 +1655,16 @@ NetNet* PEIdent::elaborate_net_ram_(Design*des, NetScope*scope,
return 0;
NetRamDq*ram = new NetRamDq(scope, scope->local_symbol(),
mem, adr->pin_count());
mem, adr->vector_width());
des->add_node(ram);
for (unsigned idx = 0 ; idx < adr->pin_count() ; idx += 1)
connect(ram->pin_Address(idx), adr->pin(idx));
connect(ram->pin_Address(), adr->pin(0));
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, ram->width());
osig->local_flag(true);
for (unsigned idx = 0 ; idx < osig->pin_count() ; idx += 1)
connect(ram->pin_Q(idx), osig->pin(idx));
connect(ram->pin_Q(), osig->pin(0));
return osig;
}
@ -2492,6 +2490,9 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
/*
* $Log: elab_net.cc,v $
* Revision 1.159 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.158 2005/03/19 06:59:53 steve
* Handle wide operands to logical AND.
*

14
ivl_target.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: ivl_target.h,v 1.148 2005/04/01 06:04:30 steve Exp $"
#ident "$Id: ivl_target.h,v 1.149 2005/04/06 05:29:08 steve Exp $"
#endif
#ifdef __cplusplus
@ -895,7 +895,12 @@ extern const char* ivl_udp_name(ivl_udp_t net);
* that the port access. The ivl_lpm_width for the port then must
* match the ivl_memory_width of the memory device.
*
* Read or write, the ivl_lpm_select nexus is the address.
* Read or write, the ivl_lpm_select nexus is the address. The
* ivl_lpm_selects function returns the vector width of the address.
*
* Read ports use the ivl_lpm_q as the data output, and write ports
* use the ivl_lpm_data(0) as the input. In either case the width of
* the vector matches the width of the memory itself.
*
* - Reduction operators (IVL_LPM_RE_*)
* These devices have one input, a vector, and generate a single bit
@ -977,7 +982,7 @@ extern ivl_nexus_t ivl_lpm_q(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_MUX IVL_LPM_RAM */
extern unsigned ivl_lpm_selects(ivl_lpm_t net);
/* IVL_LPM_MUX IVL_LPM_RAM */
extern ivl_nexus_t ivl_lpm_select(ivl_lpm_t net, unsigned idx);
extern ivl_nexus_t ivl_lpm_select(ivl_lpm_t net);
/* IVL_LPM_CONCAT IVL_LPM_MUX IVL_LPM_REPEAT IVL_LPM_UFUNC */
extern unsigned ivl_lpm_size(ivl_lpm_t net);
/* IVL_LPM_RAM */
@ -1628,6 +1633,9 @@ _END_DECL
/*
* $Log: ivl_target.h,v $
* Revision 1.149 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.148 2005/04/01 06:04:30 steve
* Clean up handle of UDPs.
*

93
netlist.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: netlist.cc,v 1.239 2005/03/09 05:52:04 steve Exp $"
#ident "$Id: netlist.cc,v 1.240 2005/04/06 05:29:08 steve Exp $"
#endif
# include "config.h"
@ -1281,27 +1281,21 @@ const Link& NetMux::pin_Data(unsigned s) const
NetRamDq::NetRamDq(NetScope*s, perm_string n, NetMemory*mem, unsigned awid)
: NetNode(s, n, 3+2*mem->width()+awid),
: NetNode(s, n, 6),
mem_(mem), awidth_(awid)
{
pin(0).set_dir(Link::INPUT); pin(0).set_name(perm_string::literal("InClock"), 0);
pin(1).set_dir(Link::INPUT); pin(1).set_name(perm_string::literal("OutClock"), 0);
pin(2).set_dir(Link::INPUT); pin(2).set_name(perm_string::literal("WE"), 0);
for (unsigned idx = 0 ; idx < awidth_ ; idx += 1) {
pin(3+idx).set_dir(Link::INPUT);
pin(3+idx).set_name(perm_string::literal("Address"), idx);
}
for (unsigned idx = 0 ; idx < width() ; idx += 1) {
pin(3+awidth_+idx).set_dir(Link::INPUT);
pin(3+awidth_+idx).set_name(perm_string::literal("Data"), idx);
}
for (unsigned idx = 0 ; idx < width() ; idx += 1) {
pin(3+awidth_+width()+idx).set_dir(Link::OUTPUT);
pin(3+awidth_+width()+idx).set_name(perm_string::literal("Q"), idx);
}
pin(0).set_dir(Link::INPUT);
pin(0).set_name(perm_string::literal("InClock"), 0);
pin(1).set_dir(Link::INPUT);
pin(1).set_name(perm_string::literal("OutClock"), 0);
pin(2).set_dir(Link::INPUT);
pin(2).set_name(perm_string::literal("WE"), 0);
pin(3).set_dir(Link::INPUT);
pin(3).set_name(perm_string::literal("Address"), 0);
pin(4).set_dir(Link::INPUT);
pin(4).set_name(perm_string::literal("Data"), 0);
pin(5).set_dir(Link::OUTPUT);
pin(5).set_name(perm_string::literal("Q"), 0);
next_ = mem_->ram_list_;
mem_->ram_list_ = this;
@ -1361,8 +1355,7 @@ void NetRamDq::absorb_partners()
if (cur == this) continue;
bool ok_flag = true;
for (unsigned idx = 0 ; idx < awidth() ; idx += 1)
ok_flag &= pin_Address(idx).is_linked(cur->pin_Address(idx));
ok_flag &= pin_Address().is_linked(cur->pin_Address());
if (!ok_flag) continue;
@ -1381,20 +1374,15 @@ void NetRamDq::absorb_partners()
&& ! pin_WE().is_linked(cur->pin_WE()))
continue;
for (unsigned idx = 0 ; idx < width() ; idx += 1) {
if (!pin_Data(idx).is_linked()) continue;
if (! cur->pin_Data(idx).is_linked()) continue;
ok_flag &= pin_Data(idx).is_linked(cur->pin_Data(idx));
if (pin_Data().is_linked() && cur->pin_Data().is_linked()) {
ok_flag &= pin_Data().is_linked(cur->pin_Data());
}
if (! ok_flag) continue;
for (unsigned idx = 0 ; idx < width() ; idx += 1) {
if (!pin_Q(idx).is_linked()) continue;
if (! cur->pin_Q(idx).is_linked()) continue;
if (pin_Q().is_linked() && cur->pin_Q().is_linked()) {
ok_flag &= pin_Q(idx).is_linked(cur->pin_Q(idx));
ok_flag &= pin_Q().is_linked(cur->pin_Q());
}
if (! ok_flag) continue;
@ -1405,13 +1393,9 @@ void NetRamDq::absorb_partners()
connect(pin_OutClock(), cur->pin_OutClock());
connect(pin_WE(), cur->pin_WE());
for (unsigned idx = 0 ; idx < awidth() ; idx += 1)
connect(pin_Address(idx), cur->pin_Address(idx));
for (unsigned idx = 0 ; idx < width() ; idx += 1) {
connect(pin_Data(idx), cur->pin_Data(idx));
connect(pin_Q(idx), cur->pin_Q(idx));
}
connect(pin_Address(), cur->pin_Address());
connect(pin_Data(), cur->pin_Data());
connect(pin_Q(), cur->pin_Q());
tmp = cur->next_;
delete cur;
@ -1449,40 +1433,34 @@ const Link& NetRamDq::pin_WE() const
return pin(2);
}
Link& NetRamDq::pin_Address(unsigned idx)
Link& NetRamDq::pin_Address()
{
assert(idx < awidth_);
return pin(3+idx);
return pin(3);
}
const Link& NetRamDq::pin_Address(unsigned idx) const
const Link& NetRamDq::pin_Address() const
{
assert(idx < awidth_);
return pin(3+idx);
return pin(3);
}
Link& NetRamDq::pin_Data(unsigned idx)
Link& NetRamDq::pin_Data()
{
assert(idx < width());
return pin(3+awidth_+idx);
return pin(4);
}
const Link& NetRamDq::pin_Data(unsigned idx) const
const Link& NetRamDq::pin_Data() const
{
assert(idx < width());
return pin(3+awidth_+idx);
return pin(4);
}
Link& NetRamDq::pin_Q(unsigned idx)
Link& NetRamDq::pin_Q()
{
assert(idx < width());
return pin(3+awidth_+width()+idx);
return pin(5);
}
const Link& NetRamDq::pin_Q(unsigned idx) const
const Link& NetRamDq::pin_Q() const
{
assert(idx < width());
return pin(3+awidth_+width()+idx);
return pin(5);
}
NetBUFZ::NetBUFZ(NetScope*s, perm_string n, unsigned w)
@ -2196,6 +2174,9 @@ const NetProc*NetTaskDef::proc() const
/*
* $Log: netlist.cc,v $
* Revision 1.240 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.239 2005/03/09 05:52:04 steve
* Handle case inequality in netlists.
*

17
netlist.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: netlist.h,v 1.338 2005/03/18 02:56:03 steve Exp $"
#ident "$Id: netlist.h,v 1.339 2005/04/06 05:29:08 steve Exp $"
#endif
/*
@ -897,17 +897,17 @@ class NetRamDq : public NetNode {
Link& pin_OutClock();
Link& pin_WE();
Link& pin_Address(unsigned idx);
Link& pin_Data(unsigned idx);
Link& pin_Q(unsigned idx);
Link& pin_Address();
Link& pin_Data();
Link& pin_Q();
const Link& pin_InClock() const;
const Link& pin_OutClock() const;
const Link& pin_WE() const;
const Link& pin_Address(unsigned idx) const;
const Link& pin_Data(unsigned idx) const;
const Link& pin_Q(unsigned idx) const;
const Link& pin_Address() const;
const Link& pin_Data() const;
const Link& pin_Q() const;
virtual void dump_node(ostream&, unsigned ind) const;
virtual bool emit_node(struct target_t*) const;
@ -3416,6 +3416,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
/*
* $Log: netlist.h,v $
* Revision 1.339 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.338 2005/03/18 02:56:03 steve
* Add support for LPM_UFUNC user defined functions.
*

10
syn-rules.y
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: syn-rules.y,v 1.31 2004/10/04 01:10:55 steve Exp $"
#ident "$Id: syn-rules.y,v 1.32 2005/04/06 05:29:08 steve Exp $"
#endif
# include "config.h"
@ -149,15 +149,11 @@ static void hookup_RAMDQ(NetRamDq*ram, NetESignal*d, NetNet*adr,
/* Connect the input Data bits of the RAM, from the r-value of
the assignment. */
for (unsigned idx = 0 ; idx < ram->width() ; idx += 1) {
connect(ram->pin_Data(idx), d->bit(idx+rval_pinoffset));
}
connect(ram->pin_Data(), d->bit(rval_pinoffset));
/* Connect the Address pins from the addr net discovered by the
caller. */
for (unsigned idx = 0 ; idx < ram->awidth() ; idx += 1) {
connect(ram->pin_Address(idx), adr->pin(idx));
}
connect(ram->pin_Address(), adr->pin(0));
/* Connect the input clock and the WE of the RAM. */
assert(pclk);

24
t-dll-api.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: t-dll-api.cc,v 1.122 2005/04/01 06:04:30 steve Exp $"
#ident "$Id: t-dll-api.cc,v 1.123 2005/04/06 05:29:08 steve Exp $"
#endif
# include "config.h"
@ -780,8 +780,11 @@ extern "C" ivl_nexus_t ivl_lpm_data(ivl_lpm_t net, unsigned idx)
else
return net->u_.shift.s;
case IVL_LPM_FF:
case IVL_LPM_RAM:
assert(idx == 0);
return net->u_.ff.d.pin;
case IVL_LPM_FF:
assert(idx < net->u_.ff.width);
if (net->u_.ff.width == 1)
return net->u_.ff.d.pin;
@ -927,8 +930,11 @@ extern "C" ivl_nexus_t ivl_lpm_q(ivl_lpm_t net, unsigned idx)
assert(idx == 0);
return net->u_.arith.q;
case IVL_LPM_FF:
case IVL_LPM_RAM:
assert(idx == 0);
return net->u_.ff.q.pin;
case IVL_LPM_FF:
assert(idx < net->u_.ff.width);
if (net->u_.ff.width == 1)
return net->u_.ff.q.pin;
@ -981,18 +987,13 @@ extern "C" ivl_scope_t ivl_lpm_scope(ivl_lpm_t net)
return net->scope;
}
extern "C" ivl_nexus_t ivl_lpm_select(ivl_lpm_t net, unsigned idx)
extern "C" ivl_nexus_t ivl_lpm_select(ivl_lpm_t net)
{
switch (net->type) {
case IVL_LPM_RAM:
assert(idx < net->u_.ff.swid);
if (net->u_.ff.swid == 1)
return net->u_.ff.s.pin;
else
return net->u_.ff.s.pins[idx];
return net->u_.ff.s.pin;
case IVL_LPM_MUX:
assert(idx == 0);
return net->u_.mux.s;
default:
@ -2003,6 +2004,9 @@ extern "C" ivl_variable_type_t ivl_variable_type(ivl_variable_t net)
/*
* $Log: t-dll-api.cc,v $
* Revision 1.123 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.122 2005/04/01 06:04:30 steve
* Clean up handle of UDPs.
*

78
t-dll.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: t-dll.cc,v 1.146 2005/04/01 06:04:30 steve Exp $"
#ident "$Id: t-dll.cc,v 1.147 2005/04/06 05:29:08 steve Exp $"
#endif
# include "config.h"
@ -1579,70 +1579,23 @@ void dll_target::lpm_ram_dq(const NetRamDq*net)
// Connect the address bus
if (obj->u_.ff.swid == 1) {
nex = net->pin_Address(0).nexus();
assert(nex->t_cookie());
obj->u_.ff.s.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.s.pin, obj, 0,
IVL_DR_HiZ, IVL_DR_HiZ);
}
else {
obj->u_.ff.s.pins = new ivl_nexus_t [obj->u_.ff.swid];
for (unsigned idx = 0 ; idx < obj->u_.ff.swid ; idx += 1) {
nex = net->pin_Address(idx).nexus();
assert(nex->t_cookie());
obj->u_.ff.s.pins[idx] = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.s.pins[idx], obj, 0,
IVL_DR_HiZ, IVL_DR_HiZ);
}
}
nex = net->pin_Address().nexus();
assert(nex->t_cookie());
obj->u_.ff.s.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.s.pin, obj, 0, IVL_DR_HiZ, IVL_DR_HiZ);
// Connect the data busses
if (obj->u_.ff.width == 1) {
nex = net->pin_Q(0).nexus();
nex = net->pin_Q().nexus();
assert(nex->t_cookie());
obj->u_.ff.q.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.q.pin, obj, 0, IVL_DR_STRONG, IVL_DR_STRONG);
if (has_write_port) {
nex = net->pin_Data().nexus();
assert(nex->t_cookie());
obj->u_.ff.q.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.q.pin, obj, 0,
IVL_DR_STRONG, IVL_DR_STRONG);
if (has_write_port) {
nex = net->pin_Data(0).nexus();
assert(nex->t_cookie());
obj->u_.ff.d.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.d.pin, obj,
0, IVL_DR_HiZ, IVL_DR_HiZ);
}
}
else if (has_write_port) {
obj->u_.ff.q.pins = new ivl_nexus_t [obj->u_.ff.width * 2];
obj->u_.ff.d.pins = obj->u_.ff.q.pins + obj->u_.ff.width;
for (unsigned idx = 0 ; idx < obj->u_.ff.width ; idx += 1) {
nex = net->pin_Q(idx).nexus();
assert(nex->t_cookie());
obj->u_.ff.q.pins[idx] = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.q.pins[idx], obj, 0,
IVL_DR_STRONG, IVL_DR_STRONG);
nex = net->pin_Data(idx).nexus();
assert(nex->t_cookie());
obj->u_.ff.d.pins[idx] = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.d.pins[idx], obj, 0,
IVL_DR_HiZ, IVL_DR_HiZ);
}
}
else {
obj->u_.ff.q.pins = new ivl_nexus_t [obj->u_.ff.width];
for (unsigned idx = 0 ; idx < obj->u_.ff.width ; idx += 1) {
nex = net->pin_Q(idx).nexus();
assert(nex->t_cookie());
obj->u_.ff.q.pins[idx] = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.q.pins[idx], obj, 0,
IVL_DR_STRONG, IVL_DR_STRONG);
}
obj->u_.ff.d.pin = (ivl_nexus_t) nex->t_cookie();
nexus_lpm_add(obj->u_.ff.d.pin, obj, 0, IVL_DR_HiZ, IVL_DR_HiZ);
}
}
@ -2137,6 +2090,9 @@ extern const struct target tgt_dll = { "dll", &dll_target_obj };
/*
* $Log: t-dll.cc,v $
* Revision 1.147 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.146 2005/04/01 06:04:30 steve
* Clean up handle of UDPs.
*

27
tgt-stub/stub.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: stub.c,v 1.120 2005/04/01 06:04:30 steve Exp $"
#ident "$Id: stub.c,v 1.121 2005/04/06 05:29:09 steve Exp $"
#endif
# include "config.h"
@ -473,7 +473,7 @@ static void show_lpm_mux(ivl_lpm_t net)
/* The select input is a vector with the width from the
ivl_lpm_selects function. */
nex = ivl_lpm_select(net,0);
nex = ivl_lpm_select(net);
fprintf(out, " S: %s <width=%u>\n",
ivl_nexus_name(nex),
ivl_lpm_selects(net));
@ -535,22 +535,30 @@ static void show_lpm_ram(ivl_lpm_t net)
fprintf(out, " LPM_RAM: <width=%u>\n", width);
nex = ivl_lpm_q(net, 0);
assert(nex);
fprintf(out, " Q: %s\n", ivl_nexus_name(nex));
nex = ivl_lpm_select(net, 0);
fprintf(out, " Address: %s\n", ivl_nexus_name(nex));
nex = ivl_lpm_select(net);
fprintf(out, " Address: %s (address width=%u)\n",
ivl_nexus_name(nex), ivl_lpm_selects(net));
if (width_of_nexus(ivl_lpm_q(net,0)) != width) {
fprintf(out, " ERROR: Data width doesn't match nexus width=%u\n",
width_of_nexus(ivl_lpm_q(net,0)));
fprintf(out, " ERROR: Data width doesn't match "
"nexus width=%u\n", width_of_nexus(ivl_lpm_q(net,0)));
stub_errors += 1;
}
if (width_of_nexus(ivl_lpm_select(net)) != ivl_lpm_selects(net)) {
fprintf(out, " ERROR: Width of address doesn't match "
"nexus width=%u\n", width_of_nexus(ivl_lpm_select(net)));
stub_errors += 1;
}
/* The width of the port must match the width of the memory
word. the compile assures that for us. */
if (width != ivl_memory_width(mem)) {
fprintf(out, " ERROR: Width doesn't match memory word width=%u\n",
ivl_memory_width(mem));
fprintf(out, " ERROR: Width doesn't match"
" memory word width=%u\n", ivl_memory_width(mem));
stub_errors += 1;
}
}
@ -1329,6 +1337,9 @@ int target_design(ivl_design_t des)
/*
* $Log: stub.c,v $
* Revision 1.121 2005/04/06 05:29:09 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.120 2005/04/01 06:04:30 steve
* Clean up handle of UDPs.
*

7
tgt-vvp/draw_mux.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: draw_mux.c,v 1.8 2005/02/12 22:54:29 steve Exp $"
#ident "$Id: draw_mux.c,v 1.9 2005/04/06 05:29:09 steve Exp $"
#endif
# include "vvp_priv.h"
@ -152,7 +152,7 @@ static void draw_lpm_mux_ab(ivl_lpm_t net)
fprintf(vvp_out, "L_%p .functor MUXZ", net);
fprintf(vvp_out, ", %s", draw_net_input(ivl_lpm_data(net,0)));
fprintf(vvp_out, ", %s", draw_net_input(ivl_lpm_data(net,1)));
fprintf(vvp_out, ", %s", draw_net_input(ivl_lpm_select(net,0)));
fprintf(vvp_out, ", %s", draw_net_input(ivl_lpm_select(net)));
fprintf(vvp_out, ", C4<>;\n");
}
@ -174,6 +174,9 @@ void draw_lpm_mux(ivl_lpm_t net)
/*
* $Log: draw_mux.c,v $
* Revision 1.9 2005/04/06 05:29:09 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.8 2005/02/12 22:54:29 steve
* Implement a-b muxes as vector devices
*

9
tgt-vvp/vvp_scope.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: vvp_scope.c,v 1.124 2005/04/04 05:29:53 steve Exp $"
#ident "$Id: vvp_scope.c,v 1.125 2005/04/06 05:29:09 steve Exp $"
#endif
# include "vvp_priv.h"
@ -1265,7 +1265,7 @@ static void draw_lpm_ram(ivl_lpm_t net)
fprintf(vvp_out, "L_%p .mem/port M_%s, ", net, vvp_memory_label(mem));
pin = ivl_lpm_select(net,0);
pin = ivl_lpm_select(net);
draw_input_from_net(pin);
if (clk) {
@ -1274,7 +1274,7 @@ static void draw_lpm_ram(ivl_lpm_t net)
if (pin)
draw_input_from_net(pin);
else
fprintf(vvp_out, "C<1>");
fprintf(vvp_out, "C4<1>");
pin = ivl_lpm_data(net, 0);
fprintf(vvp_out, ", ");
@ -1987,6 +1987,9 @@ int draw_scope(ivl_scope_t net, ivl_scope_t parent)
/*
* $Log: vvp_scope.c,v $
* Revision 1.125 2005/04/06 05:29:09 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.124 2005/04/04 05:29:53 steve
* Generate the right coes for unconnected UDP port.
*