Support wide divide nodes.
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parent
368c27c9e4
commit
e1ce72e245
24
vvp/arith.cc
24
vvp/arith.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: arith.cc,v 1.47 2005/11/10 13:27:16 steve Exp $"
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#ident "$Id: arith.cc,v 1.48 2006/01/03 06:19:31 steve Exp $"
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#endif
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# include "arith.h"
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@ -67,9 +67,22 @@ vvp_arith_div::~vvp_arith_div()
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{
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}
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void vvp_arith_div::wide_(vvp_net_ptr_t ptr)
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void vvp_arith_div::wide4_(vvp_net_ptr_t ptr)
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{
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assert(0);
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vvp_vector2_t a2 (op_a_);
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if (a2.is_NaN()) {
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vvp_send_vec4(ptr.ptr()->out, x_val_);
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return;
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}
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vvp_vector2_t b2 (op_b_);
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if (b2.is_NaN()) {
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vvp_send_vec4(ptr.ptr()->out, x_val_);
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return;
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}
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vvp_vector2_t res2 = a2 / b2;
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vvp_send_vec4(ptr.ptr()->out, vector2_to_vector4(res2, wid_));
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}
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void vvp_arith_div::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit)
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@ -77,7 +90,7 @@ void vvp_arith_div::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit)
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dispatch_operand_(ptr, bit);
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if (wid_ > 8 * sizeof(unsigned long)) {
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wide_(ptr);
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wide4_(ptr);
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return ;
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}
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@ -767,6 +780,9 @@ void vvp_arith_sub_real::recv_real(vvp_net_ptr_t ptr, double bit)
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/*
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* $Log: arith.cc,v $
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* Revision 1.48 2006/01/03 06:19:31 steve
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* Support wide divide nodes.
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*
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* Revision 1.47 2005/11/10 13:27:16 steve
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* Handle very wide % and / operations using expanded vector2 support.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: arith.h,v 1.32 2005/07/06 04:29:25 steve Exp $"
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#ident "$Id: arith.h,v 1.33 2006/01/03 06:19:31 steve Exp $"
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#endif
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# include "vvp_net.h"
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@ -59,7 +59,7 @@ class vvp_arith_div : public vvp_arith_ {
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~vvp_arith_div();
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void recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit);
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private:
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void wide_(vvp_net_ptr_t ptr);
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void wide4_(vvp_net_ptr_t ptr);
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bool signed_flag_;
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};
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@ -233,6 +233,9 @@ class vvp_arith_sub_real : public vvp_arith_real_ {
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/*
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* $Log: arith.h,v $
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* Revision 1.33 2006/01/03 06:19:31 steve
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* Support wide divide nodes.
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*
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* Revision 1.32 2005/07/06 04:29:25 steve
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* Implement real valued signals and arith nodes.
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*
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@ -16,7 +16,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ident "$Id: vvp_net.cc,v 1.49 2005/11/26 17:16:05 steve Exp $"
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#ident "$Id: vvp_net.cc,v 1.50 2006/01/03 06:19:31 steve Exp $"
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# include "config.h"
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# include "vvp_net.h"
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@ -600,20 +600,6 @@ template <class T> T coerce_to_width(const T&that, unsigned width)
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return res;
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}
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#if 0
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vvp_vector4_t coerce_to_width(const vvp_vector4_t&that, unsigned width)
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{
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if (that.size() == width)
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return that;
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assert(that.size() > width);
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vvp_vector4_t res (width);
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for (unsigned idx = 0 ; idx < width ; idx += 1)
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res.set_bit(idx, that.value(idx));
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return res;
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}
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#endif
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vvp_vector2_t::vvp_vector2_t()
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{
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@ -628,7 +614,8 @@ vvp_vector2_t::vvp_vector2_t(unsigned long v, unsigned wid)
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const unsigned words = (wid_ + bits_per_word-1) / bits_per_word;
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vec_ = new unsigned long[words];
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for (unsigned idx = 0 ; idx < words ; idx += 1)
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vec_[0] = v;
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for (unsigned idx = 1 ; idx < words ; idx += 1)
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vec_[idx] = 0;
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}
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@ -2140,6 +2127,9 @@ vvp_bit4_t compare_gtge_signed(const vvp_vector4_t&a,
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/*
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* $Log: vvp_net.cc,v $
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* Revision 1.50 2006/01/03 06:19:31 steve
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* Support wide divide nodes.
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*
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* Revision 1.49 2005/11/26 17:16:05 steve
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* Force instruction that can be indexed.
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*
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