Debug dumps for synth2.
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f0e0377a20
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57c3e86084
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: design_dump.cc,v 1.144 2003/07/26 03:34:42 steve Exp $"
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#ident "$Id: design_dump.cc,v 1.145 2003/12/17 16:52:39 steve Exp $"
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#endif
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# include "config.h"
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@ -495,6 +495,15 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
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}
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void NetAssignBase::dump(ostream&o, unsigned ind) const
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{
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if (const NetAssignNB *n1 = dynamic_cast<const NetAssignNB*>(this)) {
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n1->dump(o,ind);
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} else if (const NetAssign *n2 = dynamic_cast<const NetAssign*>(this)) {
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n2->dump(o,ind);
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}
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}
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/* Dump a block statement */
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void NetBlock::dump(ostream&o, unsigned ind) const
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{
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@ -1068,6 +1077,9 @@ void Design::dump(ostream&o) const
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/*
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* $Log: design_dump.cc,v $
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* Revision 1.145 2003/12/17 16:52:39 steve
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* Debug dumps for synth2.
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*
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* Revision 1.144 2003/07/26 03:34:42 steve
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* Start handling pad of expressions in code generators.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: netlist.h,v 1.306 2003/11/10 20:59:03 steve Exp $"
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#ident "$Id: netlist.h,v 1.307 2003/12/17 16:52:39 steve Exp $"
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#endif
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/*
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@ -1463,6 +1463,7 @@ class NetAssignBase : public NetProc {
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// This dumps all the lval structures.
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void dump_lval(ostream&) const;
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virtual void dump(ostream&, unsigned ind) const;
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private:
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NetAssign_*lval_;
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@ -3310,6 +3311,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.307 2003/12/17 16:52:39 steve
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* Debug dumps for synth2.
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*
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* Revision 1.306 2003/11/10 20:59:03 steve
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* Design::get_flag returns const char* instead of string.
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*
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68
synth2.cc
68
synth2.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: synth2.cc,v 1.32 2003/10/27 02:18:04 steve Exp $"
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#ident "$Id: synth2.cc,v 1.33 2003/12/17 16:52:39 steve Exp $"
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#endif
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# include "config.h"
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@ -27,6 +27,12 @@
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# include "compiler.h"
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# include <assert.h>
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static int debug_synth2=0;
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#define DEBUG_SYNTH2_ENTRY(class) if (debug_synth2) { cerr << "Enter " << class << "::" \
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<< __FUNCTION__ << endl; dump(cerr, 4); }
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#define DEBUG_SYNTH2_EXIT(class,val) if (debug_synth2) { cerr << "Exit " << class << "::" \
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<< __FUNCTION__ << ", result " << val << endl; }
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bool NetProc::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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@ -37,6 +43,8 @@ bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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const NetNet*nex_map, NetNet*nex_out,
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const svector<NetEvProbe*>&events)
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{
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DEBUG_SYNTH2_ENTRY("NetProc")
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if (events.count() > 0) {
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cerr << get_line() << ": error: Events are unaccounted"
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<< " for in process synthesis." << endl;
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@ -70,6 +78,8 @@ static unsigned find_nexus_in_set(const NetNet*nset, const Nexus*nex)
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bool NetAssignBase::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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DEBUG_SYNTH2_ENTRY("NetAssignBase")
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NetNet*rsig = rval_->synthesize(des);
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assert(rsig);
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@ -86,6 +96,7 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope,
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connect(nex_out->pin(ptr), rsig->pin(idx));
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}
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DEBUG_SYNTH2_EXIT("NetAssignBase",true)
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return true;
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}
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@ -98,8 +109,11 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope,
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bool NetBlock::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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if (last_ == 0)
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DEBUG_SYNTH2_ENTRY("NetBlock")
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if (last_ == 0) {
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DEBUG_SYNTH2_EXIT("NetBlock",true)
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return true;
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}
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bool flag = true;
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NetProc*cur = last_;
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@ -137,12 +151,14 @@ bool NetBlock::synth_async(Design*des, NetScope*scope,
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} while (cur != last_);
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DEBUG_SYNTH2_EXIT("NetBlock",flag)
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return flag;
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}
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bool NetCase::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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DEBUG_SYNTH2_ENTRY("NetCase")
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unsigned cur;
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NetNet*esig = expr_->synthesize(des);
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@ -260,20 +276,25 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
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delete[]statement_map;
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des->add_node(mux);
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DEBUG_SYNTH2_EXIT("NetCase", true)
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return true;
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}
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bool NetCondit::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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DEBUG_SYNTH2_ENTRY("NetCondit")
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NetNet*ssig = expr_->synthesize(des);
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assert(ssig);
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if (if_ == 0)
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if (if_ == 0) {
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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if (else_ == 0) {
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cerr << get_line() << ": error: Asynchronous if statement"
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<< " is missing the else clause." << endl;
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DEBUG_SYNTH2_EXIT("NetCondit",false)
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return false;
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}
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@ -308,17 +329,22 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
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des->add_node(mux);
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DEBUG_SYNTH2_EXIT("NetCondit",true)
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return true;
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}
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bool NetEvWait::synth_async(Design*des, NetScope*scope,
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const NetNet*nex_map, NetNet*nex_out)
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{
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return statement_->synth_async(des, scope, nex_map, nex_out);
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DEBUG_SYNTH2_ENTRY("NetEvWait")
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bool flag = statement_->synth_async(des, scope, nex_map, nex_out);
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DEBUG_SYNTH2_EXIT("NetEvWait",flag)
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return flag;
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}
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bool NetProcTop::synth_async(Design*des)
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{
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DEBUG_SYNTH2_ENTRY("NetProcTop")
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NexusSet nex_set;
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statement_->nex_output(nex_set);
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@ -330,6 +356,7 @@ bool NetProcTop::synth_async(Design*des)
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bool flag = statement_->synth_async(des, scope(), nex_out, nex_out);
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delete nex_out;
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DEBUG_SYNTH2_EXIT("NetProcTop",flag)
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return flag;
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}
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@ -351,8 +378,11 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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const NetNet*nex_map, NetNet*nex_out,
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const svector<NetEvProbe*>&events_in)
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{
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if (last_ == 0)
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DEBUG_SYNTH2_ENTRY("NetBlock")
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if (last_ == 0) {
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DEBUG_SYNTH2_EXIT("NetBlock",true)
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return true;
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}
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bool flag = true;
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@ -492,6 +522,7 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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taken up by the smaller NetFF devices. */
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delete ff;
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DEBUG_SYNTH2_EXIT("NetBlock",flag)
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return flag;
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}
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@ -505,6 +536,7 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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const NetNet*nex_map, NetNet*nex_out,
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const svector<NetEvProbe*>&events_in)
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{
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DEBUG_SYNTH2_ENTRY("NetCondit")
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/* First try to turn the condition expression into an
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asynchronous set/reset. If the condition expression has
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inputs that are included in the sensitivity list, then it
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@ -570,9 +602,11 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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assert(events_in.count() == 1);
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assert(else_ != 0);
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return else_->synth_sync(des, scope, ff, nex_map,
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flag = else_->synth_sync(des, scope, ff, nex_map,
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nex_out, svector<NetEvProbe*>(0))
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&& flag;
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DEBUG_SYNTH2_EXIT("NetCondit",flag)
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return flag;
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}
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delete expr_input;
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@ -626,9 +660,11 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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delete a_set;
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assert(else_ != 0);
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return else_->synth_sync(des, scope, ff, nex_map,
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flag = else_->synth_sync(des, scope, ff, nex_map,
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nex_out, svector<NetEvProbe*>(0))
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&& flag;
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DEBUG_SYNTH2_EXIT("NetCondit",flag)
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return flag;
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}
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delete a_set;
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@ -645,7 +681,9 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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/* If this is an if/then/else, then it is likely a
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combinational if, and I should synthesize it that way. */
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if (if_ && else_) {
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return synth_async(des, scope, nex_map, nex_out);
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bool flag = synth_async(des, scope, nex_map, nex_out);
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DEBUG_SYNTH2_EXIT("NetCondit",flag)
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return flag;
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}
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assert(if_);
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@ -694,16 +732,16 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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}
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bool flag = if_->synth_sync(des, scope, ff, nex_map, nex_out, events_in);
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if (flag == false)
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return flag;
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return true;
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DEBUG_SYNTH2_EXIT("NetCondit",flag)
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return flag;
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}
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bool NetEvWait::synth_sync(Design*des, NetScope*scope, NetFF*ff,
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const NetNet*nex_map, NetNet*nex_out,
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const svector<NetEvProbe*>&events_in)
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{
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DEBUG_SYNTH2_ENTRY("NetEvWait")
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if (events_in.count() > 0) {
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cerr << get_line() << ": error: Events are unaccounted"
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<< " for in process synthesis." << endl;
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<< " are valid clock inputs." << endl;
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cerr << get_line() << ": : Perhaps the clock"
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<< " is read by a statement or expression?" << endl;
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DEBUG_SYNTH2_EXIT("NetEvWait",false)
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return false;
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}
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bool flag = statement_->synth_sync(des, scope, ff,
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nex_map, nex_out, events);
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DEBUG_SYNTH2_EXIT("NetEvWait",flag)
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return flag;
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}
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bool NetProcTop::synth_sync(Design*des)
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{
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DEBUG_SYNTH2_ENTRY("NetProcTop")
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NexusSet nex_set;
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statement_->nex_output(nex_set);
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delete nex_q;
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DEBUG_SYNTH2_EXIT("NetProcTop",flag)
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return flag;
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}
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@ -880,12 +922,16 @@ void synth2_f::process(class Design*des, class NetProcTop*top)
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void synth2(Design*des)
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{
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debug_synth2 = atoi(des->get_flag("ivl-synth2-debug"));
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synth2_f synth_obj;
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des->functor(&synth_obj);
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}
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/*
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* $Log: synth2.cc,v $
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* Revision 1.33 2003/12/17 16:52:39 steve
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* Debug dumps for synth2.
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*
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* Revision 1.32 2003/10/27 02:18:04 steve
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* Handle special case of FF with enable and constant data.
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*
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