Add an LPM device type.
This commit is contained in:
steve
parent
e312e99448
commit
f4b8a4877f
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@ -2,6 +2,7 @@ configure
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config.cache
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config.log
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config.status
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autom4te.cache
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Makefile
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fpga.tgt
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dep
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@ -17,7 +17,7 @@
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# 59 Temple Place - Suite 330
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# Boston, MA 02111-1307, USA
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#
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#ident "$Id: Makefile.in,v 1.11 2003/07/02 00:27:24 steve Exp $"
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#ident "$Id: Makefile.in,v 1.12 2003/08/07 04:04:01 steve Exp $"
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#
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#
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SHELL = /bin/sh
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@ -53,7 +53,7 @@ dep:
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$(CC) -Wall @ident_support@ -I$(srcdir)/.. $(CPPFLAGS) -MD -c $< -o $*.o
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mv $*.d dep
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D = d-generic.o d-generic-edif.o d-virtex.o d-virtex2.o
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D = d-generic.o d-generic-edif.o d-lpm.o d-virtex.o d-virtex2.o
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O = edif.o fpga.o gates.o mangle.o tables.o generic.o xilinx.o $D
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ifeq (@WIN32@,yes)
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@ -0,0 +1,372 @@
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/*
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* Copyright (c) 2003 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-lpm.c,v 1.1 2003/08/07 04:04:01 steve Exp $"
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#endif
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/*
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* This is the driver for a purely generic LPM module writer. This
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* uses LPM version 2 1 0 devices, without particularly considering
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* the target technology.
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*
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* The LPM standard is EIA-IS/103-A October 1996
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* The output is EDIF 2 0 0 format.
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*/
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# include "device.h"
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# include "fpga_priv.h"
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# include "edif.h"
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# include "generic.h"
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# include <string.h>
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# include <assert.h>
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static edif_cell_t lpm_cell_buf(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "BUF", 2);
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edif_cell_portconfig(tmp, 0, "Result", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_OR");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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edif_cell_pinteger(tmp, "LPM_Size", 1);
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return tmp;
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}
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static edif_cell_t lpm_cell_inv(void)
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{
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static edif_cell_t tmp = 0;
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if (tmp != 0)
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return tmp;
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tmp = edif_xcell_create(xlib, "INV", 2);
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edif_cell_portconfig(tmp, 0, "Result", IVL_SIP_OUTPUT);
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edif_cell_portconfig(tmp, 1, "Data", IVL_SIP_INPUT);
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edif_cell_pstring(tmp, "LPM_TYPE", "LPM_INV");
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edif_cell_pinteger(tmp, "LPM_Width", 1);
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edif_cell_pinteger(tmp, "LPM_Size", 1);
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return tmp;
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}
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static void lpm_show_header(ivl_design_t des)
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{
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unsigned idx;
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ivl_scope_t root = ivl_design_root(des);
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unsigned sig_cnt = ivl_scope_sigs(root);
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unsigned nports = 0, pidx;
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/* Count the ports I'm going to use. */
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for (idx = 0 ; idx < sig_cnt ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(root, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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if (ivl_signal_attr(sig, "PAD") != 0)
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continue;
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nports += ivl_signal_pins(sig);
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}
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/* Create the base edf object. */
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edf = edif_create(ivl_scope_basename(root), nports);
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pidx = 0;
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for (idx = 0 ; idx < sig_cnt ; idx += 1) {
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edif_joint_t jnt;
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ivl_signal_t sig = ivl_scope_sig(root, idx);
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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if (ivl_signal_attr(sig, "PAD") != 0)
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continue;
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if (ivl_signal_pins(sig) == 1) {
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edif_portconfig(edf, pidx, ivl_signal_basename(sig),
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ivl_signal_port(sig));
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assert(ivl_signal_pins(sig) == 1);
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jnt = edif_joint_of_nexus(edf, ivl_signal_pin(sig, 0));
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edif_port_to_joint(jnt, edf, pidx);
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} else {
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const char*name = ivl_signal_basename(sig);
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ivl_signal_port_t dir = ivl_signal_port(sig);
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char buf[128];
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unsigned bit;
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for (bit = 0 ; bit < ivl_signal_pins(sig) ; bit += 1) {
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const char*tmp;
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sprintf(buf, "%s[%u]", name, bit);
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tmp = strdup(buf);
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edif_portconfig(edf, pidx+bit, tmp, dir);
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jnt = edif_joint_of_nexus(edf,ivl_signal_pin(sig,bit));
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edif_port_to_joint(jnt, edf, pidx+bit);
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}
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}
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pidx += ivl_signal_pins(sig);
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}
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assert(pidx == nports);
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xlib = edif_xlibrary_create(edf, "LPM_LIBRARY");
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}
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static void lpm_show_footer(ivl_design_t des)
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{
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edif_print(xnf, edf);
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}
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static void lpm_logic(ivl_net_logic_t net)
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{
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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switch (ivl_logic_type(net)) {
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case IVL_LO_BUFZ:
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case IVL_LO_BUF:
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assert(ivl_logic_pins(net) == 2);
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cell = lpm_cell_buf();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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break;
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case IVL_LO_NOT:
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assert(ivl_logic_pins(net) == 2);
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cell = lpm_cell_inv();
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ref = edif_cellref_create(edf, cell);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 0));
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edif_add_to_joint(jnt, ref, 0);
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jnt = edif_joint_of_nexus(edf, ivl_logic_pin(net, 1));
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edif_add_to_joint(jnt, ref, 1);
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break;
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default:
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fprintf(stderr, "UNSUPPORTED LOGIC TYPE: %u\n",
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ivl_logic_type(net));
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break;
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}
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}
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static void lpm_show_mux(ivl_lpm_t net)
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{
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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unsigned idx, rdx;
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char cellname[32];
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unsigned wid_r = ivl_lpm_width(net);
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unsigned wid_s = ivl_lpm_selects(net);
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unsigned wid_z = ivl_lpm_size(net);
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sprintf(cellname, "mux%u_%u_%u", wid_r, wid_s, wid_z);
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cell = edif_xlibrary_findcell(xlib, cellname);
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if (cell == 0) {
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unsigned pins = wid_r + wid_s + wid_r*wid_z;
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cell = edif_xcell_create(xlib, strdup(cellname), pins);
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/* Make the output ports. */
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for (idx = 0 ; idx < wid_r ; idx += 1) {
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sprintf(cellname, "Result%u", idx);
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edif_cell_portconfig(cell, idx, strdup(cellname),
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IVL_SIP_OUTPUT);
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}
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/* Make the select ports. */
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for (idx = 0 ; idx < wid_s ; idx += 1) {
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sprintf(cellname, "Sel%u", idx);
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edif_cell_portconfig(cell, wid_r+idx, strdup(cellname),
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IVL_SIP_INPUT);
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}
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for (idx = 0 ; idx < wid_z ; idx += 1) {
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unsigned base = wid_r + wid_s + wid_r * idx;
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unsigned rdx;
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for (rdx = 0 ; rdx < wid_r ; rdx += 1) {
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sprintf(cellname, "Data%ux%u", idx, rdx);
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edif_cell_portconfig(cell, base+rdx, strdup(cellname),
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IVL_SIP_INPUT);
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}
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}
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edif_cell_pstring(cell, "LPM_Type", "LPM_MUX");
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edif_cell_pinteger(cell, "LPM_Width", wid_r);
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edif_cell_pinteger(cell, "LPM_WidthS", wid_s);
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edif_cell_pinteger(cell, "LPM_Size", wid_z);
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}
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ref = edif_cellref_create(edf, cell);
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/* Connect the pins of the instance to the nexa. Access the
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cell pins by name. */
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for (idx = 0 ; idx < wid_r ; idx += 1) {
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unsigned pin;
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sprintf(cellname, "Result%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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}
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for (idx = 0 ; idx < wid_s ; idx += 1) {
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unsigned pin;
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sprintf(cellname, "Sel%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_select(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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}
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for (idx = 0 ; idx < wid_z ; idx += 1) {
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for (rdx = 0 ; rdx < wid_r ; rdx += 1) {
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unsigned pin;
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sprintf(cellname, "Data%ux%u", idx, rdx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, idx, rdx));
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edif_add_to_joint(jnt, ref, pin);
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}
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}
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}
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static void lpm_show_add(ivl_lpm_t net)
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{
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unsigned idx;
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char cellname[32];
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edif_cell_t cell;
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edif_cellref_t ref;
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edif_joint_t jnt;
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const char*type = "ADD";
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if (ivl_lpm_type(net) == IVL_LPM_SUB)
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type = "SUB";
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/* Find the correct ADD/SUB device in the library, search by
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name. If the device is not there, then create it and put it
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in the library. */
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sprintf(cellname, "%s%u", type, ivl_lpm_width(net));
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cell = edif_xlibrary_findcell(xlib, cellname);
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if (cell == 0) {
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unsigned pins = ivl_lpm_width(net) * 3 + 1;
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cell = edif_xcell_create(xlib, strdup(cellname), pins);
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for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
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sprintf(cellname, "Result%u", idx);
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edif_cell_portconfig(cell, idx*3+0, strdup(cellname),
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IVL_SIP_OUTPUT);
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sprintf(cellname, "DataA%u", idx);
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edif_cell_portconfig(cell, idx*3+1, strdup(cellname),
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IVL_SIP_INPUT);
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sprintf(cellname, "DataB%u", idx);
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edif_cell_portconfig(cell, idx*3+2, strdup(cellname),
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IVL_SIP_INPUT);
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}
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edif_cell_portconfig(cell, pins-1, "Cout", IVL_SIP_OUTPUT);
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edif_cell_pstring(cell, "LPM_Type", "LPM_ADD_SUB");
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edif_cell_pstring(cell, "LPM_Direction", type);
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edif_cell_pinteger(cell, "LPM_Width", ivl_lpm_width(net));
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}
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ref = edif_cellref_create(edf, cell);
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/* Connect the pins of the instance to the nexa. Access the
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cell pins by name. */
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for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
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unsigned pin;
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sprintf(cellname, "Result%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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sprintf(cellname, "DataA%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_data(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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sprintf(cellname, "DataB%u", idx);
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pin = edif_cell_port_byname(cell, cellname);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_datab(net, idx));
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edif_add_to_joint(jnt, ref, pin);
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}
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}
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const struct device_s d_lpm_edif = {
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lpm_show_header,
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lpm_show_footer,
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0,
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0,
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lpm_logic,
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0, /* show_dff */
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0,
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0,
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0,
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lpm_show_mux, /* show_mux */
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lpm_show_add, /* show_add */
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lpm_show_add, /* show_sub */
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0, /* show_shiftl */
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0 /* show_shiftr */
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};
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/*
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* $Log: d-lpm.c,v $
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* Revision 1.1 2003/08/07 04:04:01 steve
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* Add an LPM device type.
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*
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*/
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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||||
*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: edif.c,v 1.5 2003/06/24 03:55:00 steve Exp $"
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#ident "$Id: edif.c,v 1.6 2003/08/07 04:04:01 steve Exp $"
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#endif
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# include "edif.h"
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@ -28,9 +28,19 @@
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#endif
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# include <assert.h>
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typedef enum property_e {
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PRP_NONE = 0,
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PRP_STRING,
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PRP_INTEGER
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} property_t;
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struct cellref_property_ {
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const char*name;
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const char*value;
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property_t ptype;
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union {
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const char*str;
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long num;
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} value_;
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struct cellref_property_*next;
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};
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@ -74,6 +84,7 @@ struct edif_cell_s {
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unsigned nports;
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struct __cell_port*ports;
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struct cellref_property_*property;
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struct edif_cell_s*next;
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};
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@ -152,7 +163,8 @@ void edif_pstring(edif_t edf, const char*name, const char*value)
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{
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struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
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prp->name = name;
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prp->value = value;
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prp->ptype = PRP_STRING;
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prp->value_.str = value;
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prp->next = edf->property;
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edf->property = prp;
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}
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@ -248,6 +260,7 @@ edif_cell_t edif_xcell_create(edif_xlibrary_t xlib, const char*name,
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cell->xlib = xlib;
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cell->nports = nports;
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cell->ports = calloc(nports, sizeof(struct __cell_port));
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cell->property = 0;
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for (idx = 0 ; idx < nports ; idx += 1) {
|
||||
cell->ports[idx].name = "?";
|
||||
|
|
@ -279,6 +292,28 @@ unsigned edif_cell_port_byname(edif_cell_t cell, const char*name)
|
|||
return idx;
|
||||
}
|
||||
|
||||
void edif_cell_pstring(edif_cell_t cell, const char*name,
|
||||
const char*value)
|
||||
{
|
||||
struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
|
||||
prp->name = name;
|
||||
prp->ptype = PRP_STRING;
|
||||
prp->value_.str = value;
|
||||
prp->next = cell->property;
|
||||
cell->property = prp;
|
||||
}
|
||||
|
||||
void edif_cell_pinteger(edif_cell_t cell, const char*name,
|
||||
int value)
|
||||
{
|
||||
struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
|
||||
prp->name = name;
|
||||
prp->ptype = PRP_INTEGER;
|
||||
prp->value_.num = value;
|
||||
prp->next = cell->property;
|
||||
cell->property = prp;
|
||||
}
|
||||
|
||||
edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell)
|
||||
{
|
||||
static unsigned u_number = 0;
|
||||
|
|
@ -303,7 +338,8 @@ void edif_cellref_pstring(edif_cellref_t ref, const char*name,
|
|||
{
|
||||
struct cellref_property_*prp = malloc(sizeof(struct cellref_property_));
|
||||
prp->name = name;
|
||||
prp->value = value;
|
||||
prp->ptype = PRP_STRING;
|
||||
prp->value_.str = value;
|
||||
prp->next = ref->property;
|
||||
ref->property = prp;
|
||||
}
|
||||
|
|
@ -408,6 +444,24 @@ void edif_print(FILE*fd, edif_t edf)
|
|||
fprintf(fd, ")");
|
||||
}
|
||||
|
||||
for (prp = cell->property ; prp ; prp = prp->next) {
|
||||
fprintf(fd, "\n (property %s",
|
||||
prp->name);
|
||||
|
||||
switch (prp->ptype) {
|
||||
case PRP_NONE:
|
||||
assert(0);
|
||||
case PRP_STRING:
|
||||
fprintf(fd, " (string \"%s\")",
|
||||
prp->value_.str);
|
||||
break;
|
||||
case PRP_INTEGER:
|
||||
fprintf(fd, " (integer %ld)",
|
||||
prp->value_.num);
|
||||
break;
|
||||
}
|
||||
fprintf(fd, ")");
|
||||
}
|
||||
fprintf(fd, ")))\n");
|
||||
}
|
||||
|
||||
|
|
@ -467,8 +521,18 @@ void edif_print(FILE*fd, edif_t edf)
|
|||
ref->u, ref->cell->name, ref->cell->xlib->name);
|
||||
|
||||
for (prp = ref->property ; prp ; prp = prp->next)
|
||||
fprintf(fd, " (property %s (string \"%s\"))",
|
||||
prp->name, prp->value);
|
||||
switch (prp->ptype) {
|
||||
case PRP_STRING:
|
||||
fprintf(fd, " (property %s (string \"%s\"))",
|
||||
prp->name, prp->value_.str);
|
||||
break;
|
||||
case PRP_INTEGER:
|
||||
fprintf(fd, " (property %s (integer %ld))",
|
||||
prp->name, prp->value_.num);
|
||||
break;
|
||||
case PRP_NONE:
|
||||
assert(0);
|
||||
}
|
||||
|
||||
fprintf(fd, ")\n");
|
||||
}
|
||||
|
|
@ -516,8 +580,18 @@ void edif_print(FILE*fd, edif_t edf)
|
|||
fprintf(fd, " (cellRef %s (libraryRef DESIGN))\n", edf->name);
|
||||
|
||||
for (prp = edf->property ; prp ; prp = prp->next) {
|
||||
fprintf(fd, " (property %s (string \"%s\"))\n",
|
||||
prp->name, prp->value);
|
||||
switch (prp->ptype) {
|
||||
case PRP_STRING:
|
||||
fprintf(fd, " (property %s (string \"%s\"))\n",
|
||||
prp->name, prp->value_.str);
|
||||
break;
|
||||
case PRP_INTEGER:
|
||||
fprintf(fd, " (property %s (integer %ld))\n",
|
||||
prp->name, prp->value_.num);
|
||||
break;
|
||||
case PRP_NONE:
|
||||
assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
fprintf(fd, " )\n");
|
||||
|
|
@ -530,6 +604,9 @@ void edif_print(FILE*fd, edif_t edf)
|
|||
|
||||
/*
|
||||
* $Log: edif.c,v $
|
||||
* Revision 1.6 2003/08/07 04:04:01 steve
|
||||
* Add an LPM device type.
|
||||
*
|
||||
* Revision 1.5 2003/06/24 03:55:00 steve
|
||||
* Add ivl_synthesis_cell support for virtex2.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: edif.h,v 1.4 2003/06/24 03:55:00 steve Exp $"
|
||||
#ident "$Id: edif.h,v 1.5 2003/08/07 04:04:01 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include <stdio.h>
|
||||
|
|
@ -172,6 +172,15 @@ extern edif_cell_t edif_xcell_create(edif_xlibrary_t, const char*name,
|
|||
extern void edif_cell_portconfig(edif_cell_t cell, unsigned idx,
|
||||
const char*name, ivl_signal_port_t dir);
|
||||
|
||||
/* Cells may have properties attached to them. These properties are
|
||||
included in the library declaration for the cell, instead of the
|
||||
cell instances. */
|
||||
extern void edif_cell_pstring(edif_cell_t cell, const char*name,
|
||||
const char*value);
|
||||
extern void edif_cell_pinteger(edif_cell_t cell, const char*name,
|
||||
int value);
|
||||
|
||||
|
||||
/* Ports of cells are normally referenced by their port number. If you
|
||||
forget what that number is, this function can look it up by name. */
|
||||
extern unsigned edif_cell_port_byname(edif_cell_t cell, const char*name);
|
||||
|
|
@ -216,6 +225,9 @@ extern void edif_print(FILE*fd, edif_t design);
|
|||
|
||||
/*
|
||||
* $Log: edif.h,v $
|
||||
* Revision 1.5 2003/08/07 04:04:01 steve
|
||||
* Add an LPM device type.
|
||||
*
|
||||
* Revision 1.4 2003/06/24 03:55:00 steve
|
||||
* Add ivl_synthesis_cell support for virtex2.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: fpga.c,v 1.8 2003/06/25 01:49:06 steve Exp $"
|
||||
#ident "$Id: fpga.c,v 1.9 2003/08/07 04:04:01 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include "config.h"
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
# include <ivl_target.h>
|
||||
# include <string.h>
|
||||
# include "fpga_priv.h"
|
||||
|
||||
# include <assert.h>
|
||||
|
||||
/* This is the opened xnf file descriptor. It is the output that this
|
||||
code generator writes to. */
|
||||
|
|
@ -83,6 +83,7 @@ static void show_pads(ivl_scope_t scope)
|
|||
if (pad == 0)
|
||||
continue;
|
||||
|
||||
assert(device->show_pad);
|
||||
device->show_pad(sig, pad);
|
||||
}
|
||||
}
|
||||
|
|
@ -111,7 +112,7 @@ int target_design(ivl_design_t des)
|
|||
arch = 0;
|
||||
|
||||
if (arch == 0)
|
||||
arch = "generic-xnf";
|
||||
arch = "lpm";
|
||||
|
||||
device = device_from_arch(arch);
|
||||
if (device == 0) {
|
||||
|
|
@ -144,6 +145,9 @@ int target_design(ivl_design_t des)
|
|||
|
||||
/*
|
||||
* $Log: fpga.c,v $
|
||||
* Revision 1.9 2003/08/07 04:04:01 steve
|
||||
* Add an LPM device type.
|
||||
*
|
||||
* Revision 1.8 2003/06/25 01:49:06 steve
|
||||
* Spelling fixes.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: gates.c,v 1.11 2003/06/24 03:55:01 steve Exp $"
|
||||
#ident "$Id: gates.c,v 1.12 2003/08/07 04:04:01 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include <ivl_target.h>
|
||||
|
|
@ -37,6 +37,13 @@ static void show_cell_scope(ivl_scope_t scope)
|
|||
|
||||
static void show_gate_logic(ivl_net_logic_t net)
|
||||
{
|
||||
if (device->show_logic == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL LOGIC not supported"
|
||||
" by this target.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
assert(device->show_logic);
|
||||
device->show_logic(net);
|
||||
}
|
||||
|
||||
|
|
@ -152,6 +159,9 @@ int show_scope_gates(ivl_scope_t net, void*x)
|
|||
|
||||
/*
|
||||
* $Log: gates.c,v $
|
||||
* Revision 1.12 2003/08/07 04:04:01 steve
|
||||
* Add an LPM device type.
|
||||
*
|
||||
* Revision 1.11 2003/06/24 03:55:01 steve
|
||||
* Add ivl_synthesis_cell support for virtex2.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: tables.c,v 1.5 2003/03/24 00:47:54 steve Exp $"
|
||||
#ident "$Id: tables.c,v 1.6 2003/08/07 04:04:01 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include "fpga_priv.h"
|
||||
|
|
@ -26,6 +26,7 @@
|
|||
|
||||
extern const struct device_s d_generic;
|
||||
extern const struct device_s d_generic_edif;
|
||||
extern const struct device_s d_lpm_edif;
|
||||
extern const struct device_s d_virtex_edif;
|
||||
extern const struct device_s d_virtex2_edif;
|
||||
|
||||
|
|
@ -36,6 +37,7 @@ const struct device_table_s {
|
|||
} device_table[] = {
|
||||
{ "generic-edif", &d_generic_edif },
|
||||
{ "generic-xnf", &d_generic },
|
||||
{ "lpm", &d_lpm_edif },
|
||||
{ "virtex", &d_virtex_edif },
|
||||
{ "virtex2", &d_virtex2_edif },
|
||||
{ 0, 0 }
|
||||
|
|
@ -58,6 +60,9 @@ device_t device_from_arch(const char*arch)
|
|||
|
||||
/*
|
||||
* $Log: tables.c,v $
|
||||
* Revision 1.6 2003/08/07 04:04:01 steve
|
||||
* Add an LPM device type.
|
||||
*
|
||||
* Revision 1.5 2003/03/24 00:47:54 steve
|
||||
* Add new virtex2 architecture family, and
|
||||
* also the new edif.h EDIF management functions.
|
||||
|
|
|
|||
Loading…
Reference in New Issue