remove lint flagged by gcc-4.3

watch for possible behavior changes in
 elaborate.cc:3409
 vvp/vvp_net.cc:600

PWire.cc

@@ -103,11 +103,12 @@ bool PWire::set_port_type(NetNet::PortType pt)
 
 bool PWire::set_data_type(ivl_variable_type_t dt)
 {
-      if (data_type_ != IVL_VT_NO_TYPE)
+      if (data_type_ != IVL_VT_NO_TYPE) {
 	    if (data_type_ != dt)
 		  return false;
 	    else
 		  return true;
+      }
 
       assert(data_type_ == IVL_VT_NO_TYPE);
       data_type_ = dt;

driver/cflexor.lex

@@ -1,5 +1,6 @@
 
 %option nounput
+%option noinput
 
 %{
 /*

elab_net.cc

@@ -213,17 +213,19 @@ NetNet* PEBinary::elaborate_net_add_(Design*des, NetScope*scope,
 
 	// Pad out the operands, if necessary, the match the width of
 	// the adder device.
-      if (lsig->vector_width() < width)
+      if (lsig->vector_width() < width) {
 	    if (expr_signed)
 		  lsig = pad_to_width_signed(des, lsig, width);
 	    else
 		  lsig = pad_to_width(des, lsig, width);
+      }
 
-      if (rsig->vector_width() < width)
+      if (rsig->vector_width() < width) {
 	    if (expr_signed)
 		  rsig = pad_to_width_signed(des, rsig, width);
 	    else
 		  rsig = pad_to_width(des, rsig, width);
+      }
 
 	// Check that the argument types match.
       if (lsig->data_type() != rsig->data_type()) {

elab_scope.cc

@@ -444,8 +444,8 @@ bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else
 
 	// If the condition evaluates as false, then do not create the
 	// scope.
-      if (test->value().as_long() == 0 && !else_flag
-	  || test->value().as_long() != 0 && else_flag) {
+      if ( (test->value().as_long() == 0 && !else_flag)
+	|| (test->value().as_long() != 0 &&  else_flag) ) {
 	    if (debug_elaborate)
 		  cerr << get_fileline() << ": debug: Generate condition "
 		       << (else_flag? "(else)" : "(if)")

elaborate.cc

@@ -3405,8 +3405,8 @@ void PSpecPath::elaborate(Design*des, NetScope*scope) const
 		  NetNet*src_sig = scope->find_signal(*cur_src);
 		  assert(src_sig);
 
-		  if (src_sig->port_type() != NetNet::PINPUT
-		      & src_sig->port_type() != NetNet::PINOUT) {
+		  if ( (src_sig->port_type() != NetNet::PINPUT)
+		    && (src_sig->port_type() != NetNet::PINOUT) ) {
 
 			cerr << get_fileline() << ": error: Path source "
 			     << *cur_src << " must be an input or inout port."

ivlpp/lexor.lex

@@ -159,6 +159,7 @@ static int ma_parenthesis_level = 0;
 
 %option stack
 %option nounput
+%option noinput
 %option noyy_top_state
 
 %x PPINCLUDE

vpi/sdf_lexor.lex

@@ -1,6 +1,7 @@
 
 %option never-interactive
 %option nounput
+%option noinput
 
 %{
 /*

vpi/sys_readmem_lex.lex

@@ -1,5 +1,6 @@
 
 %option nounput
+%option noinput
 
 %{
 /*

vvp/logic.cc

@@ -629,7 +629,7 @@ void compile_functor(char*label, char*type, unsigned width,
 	/* If both the strengths are the default strong drive, then
 	   there is no need for a specialized driver. Attach the label
 	   to this node and we are finished. */
-      if (strength_aware || ostr0 == 6 && ostr1 == 6) {
+      if (strength_aware || (ostr0 == 6 && ostr1 == 6)) {
 	    define_functor_symbol(label, net);
 	    free(label);
 	    return;

vvp/vvp_net.cc

@@ -597,7 +597,7 @@ bool vvp_vector4_t::has_xz() const
       unsigned long mask = size_%BITS_PER_WORD;
       if (mask > 0) {
 	    mask = WORD_X_BITS >> 2*(BITS_PER_WORD - mask);
-	    return 0 != bits_ptr_[words]&mask;
+	    return 0 != (bits_ptr_[words]&mask);
       }
 
       return false;