More 2001 port declaration support.
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06b4f3cd58
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48
parse.y
48
parse.y
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if HAVE_CVS_IDENT
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#ident "$Id: parse.y,v 1.176 2003/04/25 02:28:53 steve Exp $"
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#ident "$Id: parse.y,v 1.177 2003/04/28 17:50:57 steve Exp $"
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#endif
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# include "config.h"
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@ -1424,7 +1424,8 @@ range_delay : range_opt delay3_opt
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module_item
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: attribute_list_opt net_type signed_opt range_delay list_of_identifiers ';'
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{ pform_makewire(@2, $4.range, $3, $5, $2, $1);
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{ pform_makewire(@2, $4.range, $3, $5, $2,
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NetNet::NOT_A_PORT, $1);
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if ($4.delay != 0) {
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yyerror(@4, "sorry: net delays not supported.");
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delete $4.delay;
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@ -1457,6 +1458,33 @@ module_item
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| port_type signed_opt range_delay list_of_identifiers ';'
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{ pform_set_port_type(@1, $4, $3.range, $2, $1);
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}
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/* The next two rules handle Verilog 2001 statements of the form:
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input wire signed [h:l] <list>;
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This creates the wire and sets the port type all at once. */
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| port_type net_type signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, $1, 0);
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}
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| K_output var_type signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, NetNet::POUTPUT, 0);
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}
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/* var_type declaration (reg variables) cannot be input or output,
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because the port declaration implies an external driver, which
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cannot be attached to a reg. These rules catch that error early. */
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| K_input var_type signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, NetNet::PINPUT, 0);
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yyerror(@2, "error: reg variables cannot be inputs.");
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}
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| K_inout var_type signed_opt range_opt list_of_identifiers ';'
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{ pform_makewire(@1, $4, $3, $5, $2, NetNet::PINOUT, 0);
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yyerror(@2, "error: reg variables cannot be inouts.");
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}
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| port_type signed_opt range_delay error ';'
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{ yyerror(@3, "error: Invalid variable list"
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" in port declaration.");
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@ -1464,7 +1492,14 @@ module_item
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if ($3.delay) delete $3.delay;
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yyerrok;
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}
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/* block_item_decl rule is shared with task blocks and named
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begin/end. */
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| block_item_decl
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/* */
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| K_defparam defparam_assign_list ';'
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| K_event list_of_identifiers ';'
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{ pform_make_events($2, @1.text, @1.first_line);
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@ -2065,11 +2100,13 @@ range_or_type_opt
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so that bit ranges can be assigned. */
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register_variable
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: IDENTIFIER
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{ pform_makewire(@1, $1, NetNet::REG, 0);
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{ pform_makewire(@1, $1, NetNet::REG,
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NetNet::NOT_A_PORT, 0);
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$$ = $1;
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}
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| IDENTIFIER '=' expression
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{ pform_makewire(@1, $1, NetNet::REG, 0);
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{ pform_makewire(@1, $1, NetNet::REG,
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NetNet::NOT_A_PORT, 0);
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if (! pform_expression_is_constant($3))
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yyerror(@3, "error: register declaration assignment"
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" value must be a constant expression.");
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@ -2077,7 +2114,8 @@ register_variable
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$$ = $1;
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}
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| IDENTIFIER '[' expression ':' expression ']'
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{ pform_makewire(@1, $1, NetNet::REG, 0);
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{ pform_makewire(@1, $1, NetNet::REG,
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NetNet::NOT_A_PORT, 0);
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if (! pform_expression_is_constant($3))
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yyerror(@3, "error: msb of register range must be constant.");
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if (! pform_expression_is_constant($5))
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15
pform.cc
15
pform.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: pform.cc,v 1.112 2003/04/14 03:39:15 steve Exp $"
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#ident "$Id: pform.cc,v 1.113 2003/04/28 17:50:57 steve Exp $"
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#endif
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# include "config.h"
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@ -950,7 +950,8 @@ void pform_module_define_port(const struct vlltype&li,
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* function is called for every declaration.
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*/
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void pform_makewire(const vlltype&li, const char*nm,
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NetNet::Type type, svector<named_pexpr_t*>*attr)
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NetNet::Type type, NetNet::PortType pt,
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svector<named_pexpr_t*>*attr)
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{
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hname_t name = hier_name(nm);
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PWire*cur = pform_cur_module->get_wire(name);
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@ -977,7 +978,7 @@ void pform_makewire(const vlltype&li, const char*nm,
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return;
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}
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cur = new PWire(name, type, NetNet::NOT_A_PORT);
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cur = new PWire(name, type, pt);
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cur->set_file(li.text);
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cur->set_lineno(li.first_line);
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@ -996,13 +997,14 @@ void pform_makewire(const vlltype&li,
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bool signed_flag,
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list<char*>*names,
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NetNet::Type type,
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NetNet::PortType pt,
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svector<named_pexpr_t*>*attr)
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{
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for (list<char*>::iterator cur = names->begin()
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; cur != names->end()
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; cur ++ ) {
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char*txt = *cur;
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pform_makewire(li, txt, type, attr);
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pform_makewire(li, txt, type, pt, attr);
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pform_set_net_range(txt, range, signed_flag);
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free(txt);
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}
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@ -1026,7 +1028,7 @@ void pform_makewire(const vlltype&li,
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while (first) {
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net_decl_assign_t*next = first->next;
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pform_makewire(li, first->name, type, 0);
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pform_makewire(li, first->name, type, NetNet::NOT_A_PORT, 0);
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pform_set_net_range(first->name, range, signed_flag);
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hname_t name = hier_name(first->name);
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@ -1464,6 +1466,9 @@ int pform_parse(const char*path, FILE*file)
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/*
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* $Log: pform.cc,v $
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* Revision 1.113 2003/04/28 17:50:57 steve
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* More 2001 port declaration support.
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*
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* Revision 1.112 2003/04/14 03:39:15 steve
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* Break sized constants into a size token
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* and a based numeric constant.
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8
pform.h
8
pform.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: pform.h,v 1.69 2003/04/14 03:39:15 steve Exp $"
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#ident "$Id: pform.h,v 1.70 2003/04/28 17:50:57 steve Exp $"
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#endif
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# include "netlist.h"
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@ -157,7 +157,7 @@ extern verinum* pform_verinum_with_size(verinum*s, verinum*val,
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* go into a module that is currently opened.
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*/
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extern void pform_makewire(const struct vlltype&li, const char*name,
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NetNet::Type type,
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NetNet::Type type, NetNet::PortType pt,
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svector<named_pexpr_t*>*attr);
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extern void pform_makewire(const struct vlltype&li,
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@ -165,6 +165,7 @@ extern void pform_makewire(const struct vlltype&li,
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bool signed_flag,
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list<char*>*names,
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NetNet::Type type,
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NetNet::PortType,
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svector<named_pexpr_t*>*attr);
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extern void pform_makewire(const struct vlltype&li,
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svector<PExpr*>*range,
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@ -279,6 +280,9 @@ extern void pform_dump(ostream&out, Module*mod);
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/*
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* $Log: pform.h,v $
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* Revision 1.70 2003/04/28 17:50:57 steve
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* More 2001 port declaration support.
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*
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* Revision 1.69 2003/04/14 03:39:15 steve
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* Break sized constants into a size token
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* and a based numeric constant.
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