Add structure for asynchronous logic synthesis.
This commit is contained in:
steve
parent
b54ee3b1cd
commit
9b6b081e38
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@ -16,7 +16,7 @@
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# 59 Temple Place - Suite 330
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# Boston, MA 02111-1307, USA
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#
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#ident "$Id: Makefile.in,v 1.128 2002/06/14 04:17:12 steve Exp $"
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#ident "$Id: Makefile.in,v 1.129 2002/06/30 02:21:31 steve Exp $"
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#
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#
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SHELL = /bin/sh
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@ -124,15 +124,15 @@ TT_VVM = mangle.o t-vvm.o
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endif
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TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o $(TT_VVM) t-xnf.o
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FF = nodangle.o synth.o syn-rules.o xnfio.o
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FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
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O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
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O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
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elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
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elab_sig.o emit.o eval.o eval_attrib.o eval_rconst.o \
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eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
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load_module.o netlist.o netmisc.o net_assign.o \
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net_design.o net_event.o net_expr.o net_force.o net_func.o \
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net_link.o net_modulo.o net_nex_input.o \
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net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
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net_proc.o net_scope.o net_udp.o pad_to_width.o \
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parse.o parse_misc.o pform.o pform_dump.o \
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set_width.o \
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@ -0,0 +1,82 @@
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/*
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* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: async.cc,v 1.1 2002/06/30 02:21:31 steve Exp $"
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#endif
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# include "config.h"
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# include "functor.h"
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# include "netlist.h"
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# include <assert.h>
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bool NetAssign::is_asynchronous()
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{
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return true;
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}
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bool NetCondit::is_asynchronous()
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{
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return false;
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}
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bool NetEvWait::is_asynchronous()
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{
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NexusSet*sense = new NexusSet;
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for (unsigned idx = 0 ; idx < nevents_ ; idx += 1) {
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NexusSet*tmp = event(idx)->nex_async_();
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if (tmp == 0) {
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delete sense;
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return false;
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}
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sense->add(*tmp);
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delete tmp;
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}
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NexusSet*inputs = statement_->nex_input();
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if (! sense->contains(*inputs)) {
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delete sense;
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delete inputs;
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return false;
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}
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delete sense;
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delete inputs;
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return true;
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}
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bool NetProc::is_asynchronous()
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{
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return false;
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}
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bool NetProcTop::is_asynchronous()
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{
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return statement_->is_asynchronous();
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}
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/*
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* $Log: async.cc,v $
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* Revision 1.1 2002/06/30 02:21:31 steve
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* Add structure for asynchronous logic synthesis.
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*
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*/
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7
main.cc
7
main.cc
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@ -19,7 +19,7 @@ const char COPYRIGHT[] =
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: main.cc,v 1.60 2002/06/24 01:49:39 steve Exp $"
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#ident "$Id: main.cc,v 1.61 2002/06/30 02:21:31 steve Exp $"
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#endif
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# include "config.h"
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@ -193,6 +193,7 @@ extern Design* elaborate(list <const char*>root);
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extern void cprop(Design*des);
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extern void synth(Design*des);
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extern void synth2(Design*des);
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extern void syn_rules(Design*des);
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extern void nodangle(Design*des);
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extern void xnfio(Design*des);
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@ -205,6 +206,7 @@ static struct net_func_map {
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{ "cprop", &cprop },
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{ "nodangle",&nodangle },
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{ "synth", &synth },
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{ "synth2", &synth2 },
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{ "syn-rules", &syn_rules },
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{ "xnfio", &xnfio },
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{ 0, 0 }
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@ -594,6 +596,9 @@ int main(int argc, char*argv[])
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/*
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* $Log: main.cc,v $
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* Revision 1.61 2002/06/30 02:21:31 steve
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* Add structure for asynchronous logic synthesis.
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*
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* Revision 1.60 2002/06/24 01:49:39 steve
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* Make link_drive_constant cache its results in
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* the Nexus, to improve cprop performance.
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28
net_event.cc
28
net_event.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: net_event.cc,v 1.17 2002/02/02 06:13:38 steve Exp $"
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#ident "$Id: net_event.cc,v 1.18 2002/06/30 02:21:31 steve Exp $"
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#endif
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# include "config.h"
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@ -260,6 +260,29 @@ void NetEvent::replace_event(NetEvent*that)
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}
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}
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NexusSet* NetEvent::nex_async_()
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{
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/* If there are behavioral trigger statements attached to me,
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then this is not an asynchronous event. */
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if (trig_ != 0)
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return 0;
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NexusSet*tmp = new NexusSet;
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for (NetEvProbe*cur = probes_ ; cur != 0 ; cur = cur->enext_) {
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if (cur->edge() != NetEvProbe::ANYEDGE) {
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delete tmp;
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return 0;
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}
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for (unsigned idx = 0 ; idx < cur->pin_count() ; idx += 1)
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tmp->add(cur->pin(idx).nexus());
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}
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return tmp;
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}
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NetEvTrig::NetEvTrig(NetEvent*ev)
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: event_(ev)
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{
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@ -456,6 +479,9 @@ NetProc* NetEvWait::statement()
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/*
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* $Log: net_event.cc,v $
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* Revision 1.18 2002/06/30 02:21:31 steve
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* Add structure for asynchronous logic synthesis.
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*
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* Revision 1.17 2002/02/02 06:13:38 steve
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* event find_similar should not find self.
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*
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21
net_link.cc
21
net_link.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: net_link.cc,v 1.7 2002/06/24 01:49:39 steve Exp $"
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#ident "$Id: net_link.cc,v 1.8 2002/06/30 02:21:31 steve Exp $"
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#endif
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# include "config.h"
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@ -414,13 +414,13 @@ void NexusSet::add(const NexusSet&that)
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add(that.items_[idx]);
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}
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Nexus* NexusSet::operator[] (unsigned idx)
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Nexus* NexusSet::operator[] (unsigned idx) const
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{
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assert(idx < nitems_);
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return items_[idx];
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}
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unsigned NexusSet::bsearch_(Nexus*that)
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unsigned NexusSet::bsearch_(Nexus*that) const
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{
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for (unsigned idx = 0 ; idx < nitems_ ; idx += 1) {
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if (items_[idx] < that)
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@ -432,9 +432,24 @@ unsigned NexusSet::bsearch_(Nexus*that)
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return nitems_;
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}
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bool NexusSet::contains(const NexusSet&that) const
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{
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for (unsigned idx = 0 ; idx < that.nitems_ ; idx += 1) {
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unsigned where = bsearch_(that[idx]);
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if (where == nitems_)
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return false;
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if (items_[where] != that[idx])
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return false;
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}
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return true;
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}
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/*
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* $Log: net_link.cc,v $
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* Revision 1.8 2002/06/30 02:21:31 steve
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* Add structure for asynchronous logic synthesis.
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*
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* Revision 1.7 2002/06/24 01:49:39 steve
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* Make link_drive_constant cache its results in
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* the Nexus, to improve cprop performance.
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@ -0,0 +1,64 @@
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/*
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* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: net_nex_output.cc,v 1.1 2002/06/30 02:21:32 steve Exp $"
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#endif
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#if !defined(WINNT)
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#ident "$Id: net_nex_output.cc,v 1.1 2002/06/30 02:21:32 steve Exp $"
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#endif
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# include "config.h"
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# include <iostream>
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# include <cassert>
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# include <typeinfo>
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# include "netlist.h"
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# include "netmisc.h"
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void NetProc::nex_output(NexusSet&out)
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{
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cerr << get_line()
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<< ": internal error: NetProc::nex_output not implemented"
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<< endl;
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}
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void NetAssign::nex_output(NexusSet&out)
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{
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cerr << get_line()
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<< ": internal error: NetProc::nex_output not implemented"
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<< endl;
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}
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void NetCondit::nex_output(NexusSet&out)
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{
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cerr << get_line()
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<< ": internal error: NetProc::nex_output not implemented"
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<< endl;
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}
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/*
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* $Log: net_nex_output.cc,v $
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* Revision 1.1 2002/06/30 02:21:32 steve
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* Add structure for asynchronous logic synthesis.
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*
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*/
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53
netlist.h
53
netlist.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: netlist.h,v 1.247 2002/06/25 01:33:22 steve Exp $"
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#ident "$Id: netlist.h,v 1.248 2002/06/30 02:21:32 steve Exp $"
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#endif
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/*
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@ -285,13 +285,16 @@ class NexusSet {
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void add(Nexus*that);
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void add(const NexusSet&that);
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Nexus* operator[] (unsigned idx);
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Nexus* operator[] (unsigned idx) const;
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// Return true if this set contains every nexus in that set.
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bool contains(const NexusSet&that) const;
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private:
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Nexus**items_;
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unsigned nitems_;
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unsigned bsearch_(Nexus*that);
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unsigned bsearch_(Nexus*that) const;
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private: // not implemented
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NexusSet(const NexusSet&);
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@ -1184,6 +1187,10 @@ class NetProc : public LineInfo {
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// sensitivity list.
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virtual NexusSet* nex_input();
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// Find the nexa that are set by the statement. Add the output
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// values to the set passed as a parameter.
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virtual void nex_output(NexusSet&);
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// This method is called to emit the statement to the
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// target. The target returns true if OK, false for errors.
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virtual bool emit_proc(struct target_t*) const;
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@ -1192,6 +1199,13 @@ class NetProc : public LineInfo {
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// process in search of matchable patterns.
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virtual int match_proc(struct proc_match_t*);
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// Return true if this represents the root of a combinational
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// process. Most process types are not.
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virtual bool is_asynchronous();
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// synthesize as asynchronous logic, and return true.
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virtual bool synth_async(Design*, NetScope*scope);
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virtual void dump(ostream&, unsigned ind) const;
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private:
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@ -1303,6 +1317,8 @@ class NetAssignBase : public NetProc {
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// accounts for any grouping of NetAssign_ objects that might happen.
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unsigned lwidth() const;
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bool synth_async(Design*des, NetScope*scope);
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// This dumps all the lval structures.
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void dump_lval(ostream&) const;
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@ -1318,6 +1334,10 @@ class NetAssign : public NetAssignBase {
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explicit NetAssign(NetAssign_*lv, NetExpr*rv);
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~NetAssign();
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bool is_asynchronous();
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void nex_output(NexusSet&o);
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virtual bool emit_proc(struct target_t*) const;
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virtual int match_proc(struct proc_match_t*);
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virtual void dump(ostream&, unsigned ind) const;
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@ -1480,6 +1500,11 @@ class NetCondit : public NetProc {
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bool emit_recurse_else(struct target_t*) const;
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virtual NexusSet* nex_input();
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virtual void nex_output(NexusSet&o);
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bool is_asynchronous();
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bool synth_async(Design*des, NetScope*scope);
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virtual bool emit_proc(struct target_t*) const;
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virtual int match_proc(struct proc_match_t*);
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virtual void dump(ostream&, unsigned ind) const;
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@ -1610,6 +1635,11 @@ class NetEvent : public LineInfo {
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// located by the find_similar_event method.
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void replace_event(NetEvent*that);
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private:
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// This returns a nexus set if it represents possibly
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// asynchronous inputs, otherwise 0.
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NexusSet*nex_async_();
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private:
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char* name_;
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@ -1673,6 +1703,13 @@ class NetEvWait : public NetProc {
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virtual bool emit_proc(struct target_t*) const;
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bool emit_recurse(struct target_t*) const;
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virtual int match_proc(struct proc_match_t*);
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// It is possible that this is the root of a combinational
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// process. This method checks.
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virtual bool is_asynchronous();
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virtual bool synth_async(Design*des, NetScope*scope);
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virtual void dump(ostream&, unsigned ind) const;
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private:
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@ -2044,6 +2081,13 @@ class NetProcTop : public LineInfo, public Attrib {
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NetScope*scope();
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const NetScope*scope() const;
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/* Return true of this process represents combinational logic. */
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bool is_asynchronous();
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/* Create asynchronous logic from this thread and return true,
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or return false if that cannot be done. */
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bool synth_async(Design*des);
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void dump(ostream&, unsigned ind) const;
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bool emit(struct target_t*tgt) const;
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@ -2941,6 +2985,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.248 2002/06/30 02:21:32 steve
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* Add structure for asynchronous logic synthesis.
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*
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* Revision 1.247 2002/06/25 01:33:22 steve
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* Cache calculated driven value.
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*
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|
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@ -0,0 +1,107 @@
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/*
|
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* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
|
||||
*
|
||||
* This source code is free software; you can redistribute it
|
||||
* and/or modify it in source code form under the terms of the GNU
|
||||
* General Public License as published by the Free Software
|
||||
* Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#if !defined(WINNT) && !defined(macintosh)
|
||||
#ident "$Id: synth2.cc,v 1.1 2002/06/30 02:21:32 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include "config.h"
|
||||
|
||||
# include "functor.h"
|
||||
# include "netlist.h"
|
||||
# include <assert.h>
|
||||
|
||||
|
||||
/*
|
||||
* Async synthesis of assignments is done by synthesizing the rvalue
|
||||
* expression, then connecting the l-value directly to the output of
|
||||
* the r-value.
|
||||
*/
|
||||
bool NetAssignBase::synth_async(Design*des, NetScope*scope)
|
||||
{
|
||||
NetNet*rsig = rval_->synthesize(des);
|
||||
|
||||
NetNet*lsig = lval_->sig();
|
||||
assert(lsig);
|
||||
assert(lval_->more == 0);
|
||||
|
||||
assert(lsig->pin_count() == rsig->pin_count());
|
||||
for (unsigned idx = 0 ; idx < lsig->pin_count() ; idx += 1)
|
||||
connect(lsig->pin(idx), rsig->pin(idx));
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool NetCondit::synth_async(Design*des, NetScope*scope)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
bool NetEvWait::synth_async(Design*des, NetScope*scope)
|
||||
{
|
||||
return statement_->synth_async(des, scope);
|
||||
}
|
||||
|
||||
bool NetProc::synth_async(Design*des, NetScope*scope)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
bool NetProcTop::synth_async(Design*des)
|
||||
{
|
||||
return statement_->synth_async(des, scope());
|
||||
}
|
||||
|
||||
class synth2_f : public functor_t {
|
||||
|
||||
public:
|
||||
void process(class Design*, class NetProcTop*);
|
||||
|
||||
private:
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Look at a process, and divide the problem into always and initial
|
||||
* threads.
|
||||
*/
|
||||
void synth2_f::process(class Design*des, class NetProcTop*top)
|
||||
{
|
||||
if (! top->is_asynchronous())
|
||||
return;
|
||||
|
||||
if (! top->synth_async(des))
|
||||
return;
|
||||
|
||||
cerr << top->get_line() << ": info: thread is asynchronous." << endl;
|
||||
des->delete_process(top);
|
||||
}
|
||||
|
||||
void synth2(Design*des)
|
||||
{
|
||||
synth2_f synth_obj;
|
||||
des->functor(&synth_obj);
|
||||
}
|
||||
|
||||
/*
|
||||
* $Log: synth2.cc,v $
|
||||
* Revision 1.1 2002/06/30 02:21:32 steve
|
||||
* Add structure for asynchronous logic synthesis.
|
||||
*
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue