Generate mixed real/vector expressions when needed.
When generating a real expression you can have bits of the expression that use vector only operands. When this happens evaluate that part of the expression as a vector and then convert it to a real value.
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@ -938,17 +938,17 @@ static struct vector_info draw_binary_expr_logic(ivl_expr_t exp,
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switch (ivl_expr_opcode(exp)) {
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case '&':
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fprintf(vvp_out, " %%and %u, %u, %u;\n",
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fprintf(vvp_out, " %%and %u, %u, %u;\n",
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lv.base, rv.base, wid);
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break;
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case '|':
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fprintf(vvp_out, " %%or %u, %u, %u;\n",
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fprintf(vvp_out, " %%or %u, %u, %u;\n",
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lv.base, rv.base, wid);
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break;
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case '^':
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fprintf(vvp_out, " %%xor %u, %u, %u;\n",
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fprintf(vvp_out, " %%xor %u, %u, %u;\n",
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lv.base, rv.base, wid);
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break;
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@ -51,11 +51,40 @@ void clr_word(int res)
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word_alloc_mask &= ~ (1U << res);
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}
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static int draw_binary_real(ivl_expr_t exp)
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{
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int l, r = -1;
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/* If the opcode is a vector only opcode then the sub expression
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* must not be a real expression, so use vector evaluation and
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* then convert that result to a real value. */
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switch (ivl_expr_opcode(exp)) {
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case 'E':
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case 'N':
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case 'l':
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case 'r':
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case 'R':
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case '&':
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case '|':
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case '^':
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case 'A':
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case 'O':
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case 'X':
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{
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struct vector_info vi;
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vi = draw_eval_expr(exp, STUFF_OK_XZ);
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int res = allocate_word();
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const char*sign_flag = ivl_expr_signed(exp)? "/s" : "";
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fprintf(vvp_out, " %%ix/get%s %d, %u, %u;\n",
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sign_flag, res, vi.base, vi.wid);
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fprintf(vvp_out, " %%cvt/ri %d, %d;\n", res, res);
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clr_vector(vi);
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return res;
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}
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}
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l = draw_eval_real(ivl_expr_oper1(exp));
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r = draw_eval_real(ivl_expr_oper2(exp));
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@ -359,6 +388,23 @@ static int draw_ternary_real(ivl_expr_t exp)
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static int draw_unary_real(ivl_expr_t exp)
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{
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/* If the opcode is a ~ then the sub expression must not be a
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* real expression, so use vector evaluation and then convert
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* that result to a real value. */
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if (ivl_expr_opcode(exp) == '~') {
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struct vector_info vi;
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vi = draw_eval_expr(exp, STUFF_OK_XZ);
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int res = allocate_word();
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const char*sign_flag = ivl_expr_signed(exp)? "/s" : "";
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fprintf(vvp_out, " %%ix/get%s %d, %u, %u;\n",
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sign_flag, res, vi.base, vi.wid);
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fprintf(vvp_out, " %%cvt/ri %d, %d;\n", res, res);
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clr_vector(vi);
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return res;
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}
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ivl_expr_t sube = ivl_expr_oper1(exp);
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int sub = draw_eval_real(sube);
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