Use scheduler to initialize constant functor inputs.

This commit is contained in:
steve 2005-01-29 17:53:25 +00:00
parent d51503ffd8
commit 0609c5f18c
3 changed files with 40 additions and 17 deletions

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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: compile.cc,v 1.183 2005/01/28 05:34:25 steve Exp $"
#ident "$Id: compile.cc,v 1.184 2005/01/29 17:53:25 steve Exp $"
#endif
# include "arith.h"
@ -700,7 +700,15 @@ void input_connect(vvp_net_t*fdx, unsigned port, char*label)
tmp.set_bit(v4size-idx-1, bit);
}
vvp_send_vec4(ifdx, tmp);
// Inputs that are constants are schedule to execute as
// soon at the simulation starts. In Verilog, constants
// start propagating when the simulation starts, just
// like any other signal value. But letting the
// scheduler distribute the constant value has the
// additional advantage that the constant is not
// propagated until the network is fully linked.
schedule_set_vector(ifdx, tmp);
free(label);
return;
}
@ -1577,6 +1585,9 @@ void compile_param_string(char*label, char*name, char*str, char*value)
/*
* $Log: compile.cc,v $
* Revision 1.184 2005/01/29 17:53:25 steve
* Use scheduler to initialize constant functor inputs.
*
* Revision 1.183 2005/01/28 05:34:25 steve
* Add vector4 implementation of .arith/mult.
*

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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: schedule.cc,v 1.29 2004/12/11 02:31:30 steve Exp $"
#ident "$Id: schedule.cc,v 1.30 2005/01/29 17:53:25 steve Exp $"
#endif
# include "schedule.h"
@ -401,18 +401,6 @@ void functor_s::schedule(vvp_time64_t delay, bool nba_flag)
#endif
}
#if 0
void schedule_assign(vvp_ipoint_t fun, unsigned char val, vvp_time64_t delay)
{
struct event_s*cur = new event_s;
cur->fun = fun;
cur->val = val;
cur->type= TYPE_ASSIGN;
schedule_event_(cur, delay, SEQ_NBASSIGN);
}
#endif
void schedule_assign_vector(vvp_net_ptr_t ptr,
vvp_vector4_t bit,
@ -424,6 +412,14 @@ void schedule_assign_vector(vvp_net_ptr_t ptr,
schedule_event_(cur, delay, SEQ_NBASSIGN);
}
void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector4_t bit)
{
struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
cur->ptr = ptr;
cur->val = bit;
schedule_event_(cur, 0, SEQ_ACTIVE);
}
void schedule_generic(vvp_gen_event_t obj, unsigned char val,
vvp_time64_t delay, bool sync_flag)
{
@ -562,6 +558,9 @@ void schedule_simulate(void)
/*
* $Log: schedule.cc,v $
* Revision 1.30 2005/01/29 17:53:25 steve
* Use scheduler to initialize constant functor inputs.
*
* Revision 1.29 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes

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@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: schedule.h,v 1.17 2004/12/11 02:31:30 steve Exp $"
#ident "$Id: schedule.h,v 1.18 2005/01/29 17:53:25 steve Exp $"
#endif
# include "vthread.h"
@ -40,12 +40,22 @@ extern void schedule_vthread(vthread_t thr, vvp_time64_t delay,
/*
* Create an assignment event. The val passed here will be assigned to
* the specified input when the delay times out.
* the specified input when the delay times out. This is scheduled
* like a non-blocking assignment. This is in fact mostly used to
* implement the non-blocking assignment.
*/
extern void schedule_assign_vector(vvp_net_ptr_t ptr,
vvp_vector4_t val,
vvp_time64_t delay);
/*
* This is very similar to schedule_assign_vector, but generates an
* even in the active queue. It is used at link time to set an initial
* value (a compile time constant) to the input of a functor. This
* creates an event in the active queue.
*/
extern void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector4_t val);
/*
* Create a generic event. This supports scheduled events that are not
@ -110,6 +120,9 @@ extern unsigned long count_event_pool;
/*
* $Log: schedule.h,v $
* Revision 1.18 2005/01/29 17:53:25 steve
* Use scheduler to initialize constant functor inputs.
*
* Revision 1.17 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes