luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Add cassign/link instruction.

This commit is contained in:
steve 2005-05-01 22:05:21 +00:00
parent df271c9fa3
commit 2894cdefc7
4 changed files with 49 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
vvp/README.txt
View File

@ -1,7 +1,7 @@
/*
* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
*
* $Id: README.txt,v 1.64 2005/04/28 04:59:53 steve Exp $
* $Id: README.txt,v 1.65 2005/05/01 22:05:21 steve Exp $
*/
VVP SIMULATION ENGINE
@ -547,24 +547,26 @@ being forced.
FORCE STATEMENTS (new method - implement me):
A %force instruction, as described in the .var section, forces a
constant value onto a .var or .net, and the matching %release release
constant value onto a .var or .net, and the matching %release releases
that value. However, there are times when the value of a functor
(i.e. another .net) needs to be forced onto a .var or .net. For this
task, the %force/link instruction exists:
%force/link <dst>, <src> ;
%release/link <dst>, <src> ;
%release/link <dst> ;
This causes the output of the node <src> to be linked to the force
input of the <dst> .var/.net node. When linked, the output functor
will automatically drive values to the force port of the destination
node. The matching %release/link instruction removes the link (a
%release is still needed) to the destination.
%release is still needed) to the destination. The %release/link
releases the last %force/link, no matter where the link is from. A new
%force/link will remove a previous link.
The instructions:
%cassign/link <dst>, <src> ;
%deassign/link <dst>, <src> ;
%deassign/link <dst> ;
are the same concept, but for the continuous assign port.

6
vvp/codes.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: codes.h,v 1.70 2005/03/03 04:33:10 steve Exp $"
#ident "$Id: codes.h,v 1.71 2005/05/01 22:05:21 steve Exp $"
#endif
@ -48,6 +48,7 @@ extern bool of_ASSIGN_WR(vthread_t thr, vvp_code_t code);
extern bool of_ASSIGN_X0(vthread_t thr, vvp_code_t code);
extern bool of_BLEND(vthread_t thr, vvp_code_t code);
extern bool of_BREAKPOINT(vthread_t thr, vvp_code_t code);
extern bool of_CASSIGN_LINK(vthread_t thr, vvp_code_t code);
extern bool of_CASSIGN_V(vthread_t thr, vvp_code_t code);
extern bool of_CMPIU(vthread_t thr, vvp_code_t code);
extern bool of_CMPS(vthread_t thr, vvp_code_t code);
@ -171,6 +172,9 @@ extern vvp_code_t codespace_null(void);
/*
* $Log: codes.h,v $
* Revision 1.71 2005/05/01 22:05:21 steve
* Add cassign/link instruction.
*
* Revision 1.70 2005/03/03 04:33:10 steve
* Rearrange how memories are supported as vvp_vector4 arrays.
*

6
vvp/compile.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: compile.cc,v 1.198 2005/04/28 04:59:53 steve Exp $"
#ident "$Id: compile.cc,v 1.199 2005/05/01 22:05:21 steve Exp $"
#endif
# include "arith.h"
@ -95,6 +95,7 @@ const static struct opcode_table_s opcode_table[] = {
{ "%assign/x0",of_ASSIGN_X0,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
{ "%blend", of_BLEND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
{ "%breakpoint", of_BREAKPOINT, 0, {OA_NONE, OA_NONE, OA_NONE} },
{ "%cassign/link",of_CASSIGN_LINK,2,{OA_FUNC_PTR,OA_FUNC_PTR2,OA_NONE} },
{ "%cassign/v",of_CASSIGN_V,3,{OA_FUNC_PTR,OA_BIT1, OA_BIT2} },
{ "%cmp/s", of_CMPS, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
{ "%cmp/u", of_CMPU, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
@ -1524,6 +1525,9 @@ void compile_param_string(char*label, char*name, char*str, char*value)
/*
* $Log: compile.cc,v $
* Revision 1.199 2005/05/01 22:05:21 steve
* Add cassign/link instruction.
*
* Revision 1.198 2005/04/28 04:59:53 steve
* Remove dead functor code.
*

33
vvp/vthread.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: vthread.cc,v 1.133 2005/03/22 05:18:34 steve Exp $"
#ident "$Id: vthread.cc,v 1.134 2005/05/01 22:05:21 steve Exp $"
#endif
# include "config.h"
@ -670,6 +670,32 @@ bool of_BREAKPOINT(vthread_t thr, vvp_code_t cp)
return true;
}
/*
* the %cassign/link instruction connects a source node to a
* destination node. The destination node must be a signal, as it is
* marked with the source of the cassign so that it may later be
* unlinked without specifically knowing the source that this
* instruction used.
*/
bool of_CASSIGN_LINK(vthread_t thr, vvp_code_t cp)
{
vvp_net_t*dst = cp->net;
vvp_net_t*src = cp->net2;
/* For now, assert that the destination continuous assign
input is empty. That should be so as you can have only one
continuous assignment active for the destination. */
assert(dst->port[1].nil());
/* Link the output of the src to the port[1] (the cassign
port) of the destination. */
vvp_net_ptr_t dst_ptr (dst, 1);
dst->port[1] = src->out;
src->out = dst_ptr;
return true;
}
/*
* the %cassign/v instruction invokes a continuous assign of a
* constant value to a signal. The instruction arguments are:
@ -957,6 +983,8 @@ bool of_CVT_VR(vthread_t thr, vvp_code_t cp)
* This implements the %deassign instruction. All we do is write a
* long(1) to port-3 of the addressed net. This turns off an active
* continuous assign activated by %cassign/v
*
* FIXME: This does not remove a linked %cassign/link. It should.
*/
bool of_DEASSIGN(vthread_t thr, vvp_code_t cp)
{
@ -3124,6 +3152,9 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp)
/*
* $Log: vthread.cc,v $
* Revision 1.134 2005/05/01 22:05:21 steve
* Add cassign/link instruction.
*
* Revision 1.133 2005/03/22 05:18:34 steve
* The indexed set can write a vector, not just a bit.
*