Add arch=lpm to the documentation.
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FPGA LOADABLE CODE GENERATOR FOR Icarus Verilog
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Copyright 2001 Stephen Williams
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$Id: fpga.txt,v 1.10 2003/07/04 03:57:19 steve Exp $
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$Id: fpga.txt,v 1.11 2003/08/07 05:17:34 steve Exp $
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The FPGA code generator supports a variety of FPGA devices, writing
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XNF or EDIF depending on the target. You can select the architecture
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@ -25,14 +25,21 @@ different output file is specified with the -o flag.
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The following is a list of architecture types that this code generator
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supports.
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* arch=generic-edif
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* arch=lpm
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This is a device independent format, where the gates are device types
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as defined by the LPM 2 1 0 specification. Some backend tools may take
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this format, or users may write interface libraries to connect these
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netlists to the device in question.
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* arch=generic-edif (obsolete)
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This is generic EDIF code. It doesn't necessarily work because the
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external library is not available to the code generator. But, what it
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does is generate generic style gates that a portability library can
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map to target gates if desired.
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* arch=generic-xnf
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* arch=generic-xnf (obsolete)
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If this is selected, then the output is formatted as an XNF file,
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suitable for most any type of device. The devices that it emits
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@ -181,6 +188,9 @@ Compile a single-file design with command line tools like so:
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---
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$Log: fpga.txt,v $
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Revision 1.11 2003/08/07 05:17:34 steve
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Add arch=lpm to the documentation.
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Revision 1.10 2003/07/04 03:57:19 steve
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Allow attributes on Verilog 2001 port declarations.
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