Integrate fixes from 0.8 branch.
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99ace10774
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7250337941
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: vvp_process.c,v 1.97 2004/12/18 18:53:26 steve Exp $"
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#ident "$Id: vvp_process.c,v 1.98 2005/01/28 19:39:03 steve Exp $"
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#endif
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# include "vvp_priv.h"
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@ -163,18 +163,39 @@ static void assign_to_memory(ivl_memory_t mem, unsigned idx,
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* This function, in addition to setting the value into index 0, sets
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* bit 4 to 1 if the value is unknown.
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*/
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void draw_eval_expr_into_integer(ivl_expr_t expr, unsigned ix)
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{
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struct vector_info vec;
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int word;
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switch (ivl_expr_value(expr)) {
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case IVL_VT_VECTOR:
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vec = draw_eval_expr(expr, 0);
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fprintf(vvp_out, " %%ix/get %u, %u, %u;\n",
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ix, vec.base, vec.wid);
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clr_vector(vec);
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break;
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case IVL_VT_REAL:
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word = draw_eval_real(expr);
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clr_word(word);
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fprintf(vvp_out, " %%cvt/ir %u, %u;\n", ix, word);
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break;
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default:
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assert(0);
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}
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}
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static void calculate_into_x0(ivl_expr_t expr)
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{
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struct vector_info vec = draw_eval_expr(expr, 0);
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fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", vec.base, vec.wid);
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clr_vector(vec);
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draw_eval_expr_into_integer(expr, 0);
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}
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static void calculate_into_x1(ivl_expr_t expr)
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{
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struct vector_info vec = draw_eval_expr(expr, 0);
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fprintf(vvp_out, " %%ix/get 1, %u, %u;\n", vec.base, vec.wid);
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clr_vector(vec);
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draw_eval_expr_into_integer(expr, 1);
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}
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/*
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@ -445,7 +466,7 @@ static int show_stmt_assign(ivl_statement_t net)
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* This function handles the case of non-blocking assign to word
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* variables such as real, i.e:
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*
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* read foo;
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* real foo;
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* foo <= 1.0;
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*
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* In this case we know (by Verilog syntax) that there is only exactly
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@ -483,6 +504,8 @@ static int show_stmt_assign_nb_var(ivl_statement_t net)
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fprintf(vvp_out, " %%assign/wr W_%s, %lu, %u;\n",
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vvp_word_label(var), delay, word);
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clr_word(word);
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return 0;
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}
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@ -1537,19 +1560,14 @@ int draw_func_definition(ivl_scope_t scope)
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/*
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* $Log: vvp_process.c,v $
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* Revision 1.97 2004/12/18 18:53:26 steve
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* Use %set/v to trigger events.
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* Revision 1.98 2005/01/28 19:39:03 steve
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* Integrate fixes from 0.8 branch.
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*
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* Revision 1.96 2004/12/17 04:46:40 steve
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* Implement release functionality.
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* Revision 1.93.2.2 2005/01/28 18:29:29 steve
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* Add ability to compile real values into index registers.
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*
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* Revision 1.95 2004/12/11 05:43:30 steve
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* cassign and deassign handle concatenated l-values.
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*
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* Revision 1.94 2004/12/11 02:31:28 steve
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* Rework of internals to carry vectors through nexus instead
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* of single bits. Make the ivl, tgt-vvp and vvp initial changes
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* down this path.
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* Revision 1.93.2.1 2004/12/12 04:25:10 steve
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* Fix leak of word registers in code generator.
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*
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* Revision 1.93 2004/10/04 01:10:57 steve
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* Clean up spurious trailing white space.
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