Implement nmos and pmos devices.
This commit is contained in:
parent
dd4f765b06
commit
a59f3b1fa6
17
vvp/logic.cc
17
vvp/logic.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: logic.cc,v 1.24 2005/06/02 16:02:11 steve Exp $"
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#ident "$Id: logic.cc,v 1.25 2005/06/12 00:44:49 steve Exp $"
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#endif
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# include "logic.h"
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@ -260,12 +260,6 @@ void compile_functor(char*label, char*type,
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} else if (strcmp(type, "BUFZ") == 0) {
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obj = new vvp_fun_bufz();
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#if 0
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} else if (strcmp(type, "PMOS") == 0) {
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obj = new vvp_pmos_s;
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} else if (strcmp(type, "NMOS") == 0) {
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obj= new vvp_nmos_s;
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} else if (strcmp(type, "RPMOS") == 0) {
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obj = new vvp_rpmos_s;
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@ -278,6 +272,12 @@ void compile_functor(char*label, char*type,
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} else if (strcmp(type, "MUXZ") == 0) {
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obj = new vvp_fun_muxz();
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} else if (strcmp(type, "NMOS") == 0) {
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obj = new vvp_fun_pmos(true);
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} else if (strcmp(type, "PMOS") == 0) {
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obj = new vvp_fun_pmos(false);
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} else if (strcmp(type, "EEQ") == 0) {
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obj = new table_functor_s(ft_EEQ);
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@ -346,6 +346,9 @@ void compile_functor(char*label, char*type,
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/*
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* $Log: logic.cc,v $
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* Revision 1.25 2005/06/12 00:44:49 steve
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* Implement nmos and pmos devices.
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*
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* Revision 1.24 2005/06/02 16:02:11 steve
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* Add support for notif0/1 gates.
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* Make delay nodes support inertial delay.
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148
vvp/npmos.cc
148
vvp/npmos.cc
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2005 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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@ -17,119 +17,85 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: npmos.cc,v 1.10 2005/04/28 04:59:53 steve Exp $"
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#ident "$Id: npmos.cc,v 1.11 2005/06/12 00:44:49 steve Exp $"
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#endif
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# include "npmos.h"
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# include "schedule.h"
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void vvp_pmos_s::set(vvp_ipoint_t ptr, bool push, unsigned v, unsigned s)
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vvp_fun_pmos::vvp_fun_pmos(bool enable_invert)
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{
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#if 0
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put(ptr, v);
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inv_en_ = enable_invert;
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}
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unsigned pp = ipoint_port(ptr);
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if (pp == 0) {
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/* from IEEE 1384-1995 Table 7-8 */
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static const unsigned char rmos_table[8]
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= { 0, 1, 1, 2, 2, 3, 5, 5 };
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/* just reduce SUPPLY to STRONG */
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static const unsigned char mos_table[8]
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= { 0, 1, 2, 3, 4, 5, 6, 6 };
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const unsigned char *table = res ? rmos_table : mos_table;
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unsigned vals = s & 0x88;
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unsigned s1 = table[s & 0x7];
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unsigned s2 = table[(s & 0x70) >> 4];
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istr = vals | s1 | (s2 << 4);
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void vvp_fun_pmos::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
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{
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/* Data input is processed throught eh recv_vec8 method,
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because the strength most be preserved. */
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if (ptr.port() == 0) {
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vvp_vector8_t tmp = bit;
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recv_vec8(ptr, tmp);
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return;
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}
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unsigned in0 = ival & 0x03;
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unsigned in1 = (ival >> 2) & 0x03;
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if (ptr.port() != 1)
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return;
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unsigned char outH = 0x88 | ((istr & 7)<<4) | (0);
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unsigned char outL = 0x00 | ((istr & 7)<<0) | (0);
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unsigned char outX = 0x80 | (istr & 7) | (istr & 0x70);
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en_ = inv_en_? ~bit : bit;
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generate_output_(ptr);
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}
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in1 ^= pol;
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void vvp_fun_pmos::recv_vec8(vvp_net_ptr_t ptr, vvp_vector8_t bit)
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{
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if (ptr.port() == 1) {
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recv_vec4(ptr, reduce4(bit));
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return;
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}
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unsigned char val;
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unsigned char str;
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if (ptr.port() != 0)
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return;
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if (in1 == 0) {
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// gate on; output follows input
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val = in0;
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str = istr;
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} else if (in0 == 3) {
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val = 3;
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str = HiZ;
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} else if (in1 == 2 || in1 == 3) {
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// gate X or Z; output is undefined
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val = 2;
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switch (in0) {
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case 0:
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str = outL;
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bit_ = bit;
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generate_output_(ptr);
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}
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void vvp_fun_pmos::generate_output_(vvp_net_ptr_t ptr)
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{
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vvp_vector8_t out (bit_.size());
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for (unsigned idx = 0 ; idx < out.size() ; idx += 1) {
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vvp_bit4_t b_en = en_.value(idx);
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vvp_scalar_t b_bit = bit_.value(idx);
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switch (b_en) {
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case BIT4_0:
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out.set_bit(idx, b_bit);
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break;
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case 1:
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str = outH;
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case BIT4_1:
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out.set_bit(idx, vvp_scalar_t(BIT4_Z,0,0));
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break;
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default:
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str = outX;
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switch (b_bit.value()) {
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case BIT4_0:
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b_bit = vvp_scalar_t(BIT4_X,b_bit.strength0(),0);
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break;
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case BIT4_1:
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b_bit = vvp_scalar_t(BIT4_X,0,b_bit.strength1());
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break;
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default:
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break;
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}
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out.set_bit(idx, b_bit);
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break;
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}
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} else {
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// gate off; output is high impedance
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val = 3;
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str = HiZ;
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}
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put_ostr(val, str, push);
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#else
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assert(0); // not implemented.
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#endif
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vvp_send_vec8(ptr.ptr()->out, out);
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}
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/*
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* $Log: npmos.cc,v $
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* Revision 1.10 2005/04/28 04:59:53 steve
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* Remove dead functor code.
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*
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* Revision 1.9 2004/10/04 01:10:59 steve
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* Clean up spurious trailing white space.
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*
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* Revision 1.8 2002/08/12 01:35:08 steve
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* conditional ident string using autoconfig.
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*
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* Revision 1.7 2001/12/06 03:31:24 steve
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* Support functor delays for gates and UDP devices.
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* (Stephan Boettcher)
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*
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* Revision 1.6 2001/11/07 03:34:42 steve
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* Use functor pointers where vvp_ipoint_t is unneeded.
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*
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* Revision 1.5 2001/10/31 04:27:47 steve
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* Rewrite the functor type to have fewer functor modes,
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* and use objects to manage the different types.
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* (Stephan Boettcher)
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*
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* Revision 1.4 2001/10/24 03:18:52 steve
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* npmos outputs have 3bit strengths, not 2.
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*
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* Revision 1.3 2001/10/18 17:30:26 steve
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* Support rnpmos devices. (Philip Blundell)
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*
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* Revision 1.2 2001/10/11 18:20:51 steve
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* npmos devices pass strength.
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*
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* Revision 1.1 2001/10/09 02:28:17 steve
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* Add the PMOS and NMOS functor types.
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*
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* Revision 1.1 2001/05/31 04:12:43 steve
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* Make the bufif0 and bufif1 gates strength aware,
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* and accurately propagate strengths of outputs.
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* Revision 1.11 2005/06/12 00:44:49 steve
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* Implement nmos and pmos devices.
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*
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*/
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81
vvp/npmos.h
81
vvp/npmos.h
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@ -1,7 +1,7 @@
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#ifndef __npmos_H
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#define __npmos_H
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2005 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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@ -19,62 +19,53 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: npmos.h,v 1.5 2004/10/04 01:10:59 steve Exp $"
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#ident "$Id: npmos.h,v 1.6 2005/06/12 00:44:49 steve Exp $"
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#endif
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# include "functor.h"
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# include "vvp_net.h"
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class vvp_pmos_s : public functor_s {
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/*
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* The vvp_fun_pmos functor is similar to the vvp_fun_bufif. The
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* principle difference is that it has no drive of its own, instead
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* taking drive strength from its data input. In other words, it is
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* not a buffer but a uni-directional switch.
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*
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* The truth table for the PMOS device is:
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*
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* Q = D C (D is port0, C is port1)
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* -------
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* 0 | 0 0
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* Z | 0 1
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* L | 0 x
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* 1 | 1 0
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* Z | 1 1
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* H | 1 x
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*
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* This class also implements the NMOS device, which is the same as
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* the PMOS device, but the Control input inverted. The enable_invert
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* flag to the costructor activates this invertion.
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*/
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class vvp_fun_pmos : public vvp_net_fun_t {
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public:
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vvp_pmos_s() : istr(StX), pol(0), res(0) {}
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virtual void set(vvp_ipoint_t i, bool push, unsigned val, unsigned str);
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explicit vvp_fun_pmos(bool enable_invert);
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protected:
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unsigned char istr;
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unsigned pol : 1;
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unsigned res : 1;
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};
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void recv_vec4(vvp_net_ptr_t port, vvp_vector4_t bit);
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void recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit);
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class vvp_nmos_s : public vvp_pmos_s {
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private:
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void generate_output_(vvp_net_ptr_t port);
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public:
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vvp_nmos_s() { pol = 1; res = 0; }
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};
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class vvp_rpmos_s : public vvp_pmos_s {
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public:
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vvp_rpmos_s() { pol = 0; res = 1; }
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};
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class vvp_rnmos_s : public vvp_pmos_s {
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public:
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vvp_rnmos_s() { pol = 1; res = 1; }
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vvp_vector8_t bit_;
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vvp_vector4_t en_;
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bool inv_en_;
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};
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/*
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* $Log: npmos.h,v $
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* Revision 1.5 2004/10/04 01:10:59 steve
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* Clean up spurious trailing white space.
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*
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* Revision 1.4 2002/08/12 01:35:08 steve
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* conditional ident string using autoconfig.
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*
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* Revision 1.3 2001/10/31 04:27:47 steve
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* Rewrite the functor type to have fewer functor modes,
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* and use objects to manage the different types.
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* (Stephan Boettcher)
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*
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* Revision 1.2 2001/10/18 17:30:26 steve
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* Support rnpmos devices. (Philip Blundell)
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* Revision 1.1 2001/10/09 02:28:17 steve Add the
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* PMOS and NMOS functor types.
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*
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* Revision 1.1 2001/05/31 04:12:43 steve
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* Make the bufif0 and bufif1 gates strength aware,
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* and accurately propagate strengths of outputs.
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* Revision 1.6 2005/06/12 00:44:49 steve
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* Implement nmos and pmos devices.
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*
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*/
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#endif
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@ -18,7 +18,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ident "$Id: vvp_net.h,v 1.29 2005/06/02 16:02:11 steve Exp $"
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#ident "$Id: vvp_net.h,v 1.30 2005/06/12 00:44:49 steve Exp $"
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# include "config.h"
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# include <assert.h>
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*
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* a vvp_vector8_t object can be created from a vvp_vector4_t and a
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* strength value. The vvp_vector8_t bits have the values of the input
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* vector, all with the strength specified.
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* vector, all with the strength specified. If no strength is
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* specified, then the conversion from bit4 to a scalar will use the
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* Verilog convention default of strong (6).
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*/
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class vvp_vector8_t {
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public:
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explicit vvp_vector8_t(unsigned size =0);
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// Make a vvp_vector8_t from a vector4 and a specified strength.
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explicit vvp_vector8_t(const vvp_vector4_t&that, unsigned str);
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vvp_vector8_t(const vvp_vector4_t&that, unsigned str =6);
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explicit vvp_vector8_t(const vvp_vector4_t&that,
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unsigned str0,
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unsigned str1);
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@ -744,6 +746,9 @@ class vvp_wide_fun_t : public vvp_net_fun_t {
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/*
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* $Log: vvp_net.h,v $
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* Revision 1.30 2005/06/12 00:44:49 steve
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* Implement nmos and pmos devices.
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*
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* Revision 1.29 2005/06/02 16:02:11 steve
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* Add support for notif0/1 gates.
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* Make delay nodes support inertial delay.
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