Optimize ==1 when in context where x vs z doesnt matter.
This commit is contained in:
parent
dac99b9374
commit
28725d0d74
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: eval_expr.c,v 1.75 2002/09/12 15:49:43 steve Exp $"
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#ident "$Id: eval_expr.c,v 1.76 2002/09/13 03:12:50 steve Exp $"
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#endif
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# include "vvp_priv.h"
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@ -28,7 +28,6 @@
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# include <stdlib.h>
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# include <assert.h>
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struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned wid);
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static unsigned char allocation_map[0x10000/8];
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@ -162,16 +161,22 @@ unsigned long get_number_immediate(ivl_expr_t ex)
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return imm;
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}
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/*
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* The xz_ok_flag is true if the output is going to be further
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* processed so that x and z values are equivilent. This may allow for
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* new optimizations.
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*/
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static struct vector_info draw_eq_immediate(ivl_expr_t exp, unsigned ewid,
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ivl_expr_t le,
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ivl_expr_t re)
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ivl_expr_t re,
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int xz_ok_flag)
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{
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unsigned wid;
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struct vector_info lv;
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unsigned long imm = get_number_immediate(re);
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wid = ivl_expr_width(le);
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, xz_ok_flag);
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switch (ivl_expr_opcode(exp)) {
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case 'E': /* === */
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@ -183,6 +188,12 @@ static struct vector_info draw_eq_immediate(ivl_expr_t exp, unsigned ewid,
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break;
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case 'e': /* == */
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/* If this is a single bit being compared to 1, and the
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output doesn't care about x vs z, then just return
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the value itself. */
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if (xz_ok_flag && (lv.wid == 1) && (imm == 1))
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break;
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fprintf(vvp_out, " %%cmpi/u %u, %lu, %u;\n",
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lv.base, imm, wid);
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clr_vector(lv);
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@ -215,18 +226,21 @@ static struct vector_info draw_eq_immediate(ivl_expr_t exp, unsigned ewid,
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/* Move the result out out the 4-7 bit that the compare
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uses. This is because that bit may be clobbered by other
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expressions. */
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{ unsigned short base = allocate_vector(ewid);
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fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
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lv.base = base;
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lv.wid = ewid;
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if (ewid > 1)
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fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, ewid-1);
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if (lv.base < 8) {
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unsigned short base = allocate_vector(ewid);
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fprintf(vvp_out, " %%mov %u, %u, 1;\n", base, lv.base);
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lv.base = base;
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lv.wid = ewid;
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if (ewid > 1)
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fprintf(vvp_out, " %%mov %u, 0, %u;\n", base+1, ewid-1);
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}
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return lv;
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}
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static struct vector_info draw_binary_expr_eq(ivl_expr_t exp, unsigned ewid)
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static struct vector_info draw_binary_expr_eq(ivl_expr_t exp,
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unsigned ewid,
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int xz_ok_flag)
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{
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ivl_expr_t le = ivl_expr_oper1(exp);
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ivl_expr_t re = ivl_expr_oper2(exp);
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@ -238,19 +252,19 @@ static struct vector_info draw_binary_expr_eq(ivl_expr_t exp, unsigned ewid)
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if ((ivl_expr_type(re) == IVL_EX_ULONG)
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&& (0 == (ivl_expr_uvalue(re) & ~0xffff)))
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return draw_eq_immediate(exp, ewid, le, re);
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return draw_eq_immediate(exp, ewid, le, re, xz_ok_flag);
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if ((ivl_expr_type(re) == IVL_EX_NUMBER)
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&& (! number_is_unknown(re))
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&& number_is_immediate(re, 16))
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return draw_eq_immediate(exp, ewid, le, re);
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return draw_eq_immediate(exp, ewid, le, re, xz_ok_flag);
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wid = ivl_expr_width(le);
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if (ivl_expr_width(re) > wid)
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wid = ivl_expr_width(re);
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lv = draw_eval_expr_wid(le, wid);
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rv = draw_eval_expr_wid(re, wid);
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lv = draw_eval_expr_wid(le, wid, xz_ok_flag);
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rv = draw_eval_expr_wid(re, wid, xz_ok_flag);
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switch (ivl_expr_opcode(exp)) {
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case 'E': /* === */
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@ -339,7 +353,7 @@ static struct vector_info draw_binary_expr_land(ivl_expr_t exp, unsigned wid)
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struct vector_info rv;
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lv = draw_eval_expr(le);
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lv = draw_eval_expr(le, 1);
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if ((lv.base >= 4) && (lv.wid > 1)) {
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struct vector_info tmp;
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@ -351,7 +365,7 @@ static struct vector_info draw_binary_expr_land(ivl_expr_t exp, unsigned wid)
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lv = tmp;
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}
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rv = draw_eval_expr(re);
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rv = draw_eval_expr(re, 1);
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if ((rv.base >= 4) && (rv.wid > 1)) {
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struct vector_info tmp;
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clr_vector(rv);
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@ -411,7 +425,7 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid)
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struct vector_info lv;
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struct vector_info rv;
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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/* if the left operand has width, then evaluate the single-bit
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logical equivilent. */
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@ -425,7 +439,7 @@ static struct vector_info draw_binary_expr_lor(ivl_expr_t exp, unsigned wid)
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lv = tmp;
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}
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rv = draw_eval_expr_wid(re, wid);
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rv = draw_eval_expr_wid(re, wid, 1);
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/* if the right operand has width, then evaluate the single-bit
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logical equivilent. */
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@ -495,8 +509,8 @@ static struct vector_info draw_binary_expr_le(ivl_expr_t exp, unsigned wid)
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if (ivl_expr_width(re) > owid)
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owid = ivl_expr_width(re);
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lv = draw_eval_expr_wid(le, owid);
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rv = draw_eval_expr_wid(re, owid);
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lv = draw_eval_expr_wid(le, owid, 1);
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rv = draw_eval_expr_wid(re, owid, 1);
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switch (ivl_expr_opcode(exp)) {
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case 'G':
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@ -555,8 +569,8 @@ static struct vector_info draw_binary_expr_logic(ivl_expr_t exp,
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struct vector_info lv;
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struct vector_info rv;
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lv = draw_eval_expr_wid(le, wid);
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rv = draw_eval_expr_wid(re, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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rv = draw_eval_expr_wid(re, wid, 1);
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/* The result goes into the left operand, and that is returned
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as the result. The instructions do not allow the lv value
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@ -659,7 +673,7 @@ static struct vector_info draw_binary_expr_lrs(ivl_expr_t exp, unsigned wid)
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default: {
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struct vector_info rv;
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rv = draw_eval_expr(re);
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rv = draw_eval_expr(re, 0);
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fprintf(vvp_out, " %%ix/get 0, %u, %u;\n",
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rv.base, rv.wid);
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clr_vector(rv);
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@ -667,7 +681,7 @@ static struct vector_info draw_binary_expr_lrs(ivl_expr_t exp, unsigned wid)
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}
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}
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, 0);
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switch (ivl_expr_opcode(exp)) {
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@ -693,7 +707,7 @@ static struct vector_info draw_add_immediate(ivl_expr_t le,
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struct vector_info lv;
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unsigned long imm;
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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assert(lv.wid == wid);
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imm = get_number_immediate(re);
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@ -730,7 +744,7 @@ static struct vector_info draw_sub_immediate(ivl_expr_t le,
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struct vector_info lv;
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unsigned long imm;
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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assert(lv.wid == wid);
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imm = get_number_immediate(re);
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@ -748,7 +762,7 @@ static struct vector_info draw_mul_immediate(ivl_expr_t le,
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struct vector_info lv;
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unsigned long imm;
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lv = draw_eval_expr_wid(le, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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assert(lv.wid == wid);
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imm = get_number_immediate(re);
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@ -794,8 +808,8 @@ static struct vector_info draw_binary_expr_arith(ivl_expr_t exp, unsigned wid)
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&& number_is_immediate(re, 16))
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return draw_mul_immediate(le, re, wid);
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lv = draw_eval_expr_wid(le, wid);
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rv = draw_eval_expr_wid(re, wid);
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lv = draw_eval_expr_wid(le, wid, 1);
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rv = draw_eval_expr_wid(re, wid, 1);
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assert(lv.wid == wid);
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assert(rv.wid == wid);
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@ -845,7 +859,9 @@ static struct vector_info draw_binary_expr_arith(ivl_expr_t exp, unsigned wid)
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return lv;
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}
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static struct vector_info draw_binary_expr(ivl_expr_t exp, unsigned wid)
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static struct vector_info draw_binary_expr(ivl_expr_t exp,
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unsigned wid,
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int xz_ok_flag)
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{
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struct vector_info rv;
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@ -858,7 +874,7 @@ static struct vector_info draw_binary_expr(ivl_expr_t exp, unsigned wid)
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case 'e': /* == */
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case 'N': /* !== */
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case 'n': /* != */
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rv = draw_binary_expr_eq(exp, wid);
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rv = draw_binary_expr_eq(exp, wid, xz_ok_flag);
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break;
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case '<':
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@ -910,7 +926,7 @@ static struct vector_info draw_bitsel_expr(ivl_expr_t exp, unsigned wid)
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/* Evaluate the bit select expression and save the result into
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index register 0. */
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res = draw_eval_expr(sel);
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res = draw_eval_expr(sel, 0);
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fprintf(vvp_out, " %%ix/get 0, %u,%u;\n", res.base, res.wid);
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clr_vector(res);
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@ -968,7 +984,7 @@ static struct vector_info draw_concat_expr(ivl_expr_t exp, unsigned wid)
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unsigned awid = ivl_expr_width(arg);
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/* Evaluate this sub expression. */
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struct vector_info avec = draw_eval_expr_wid(arg, awid);
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struct vector_info avec = draw_eval_expr_wid(arg, awid, 0);
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unsigned trans = awid;
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if ((off + awid) > wid)
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@ -1197,7 +1213,7 @@ void draw_memory_index_expr(ivl_memory_t mem, ivl_expr_t ae)
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break;
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}
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default: {
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struct vector_info addr = draw_eval_expr(ae);
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struct vector_info addr = draw_eval_expr(ae, 0);
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fprintf(vvp_out, " %%ix/get 3, %u, %u;\n",
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addr.base, addr.wid);
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clr_vector(addr);
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@ -1247,7 +1263,7 @@ static struct vector_info draw_select_expr(ivl_expr_t exp, unsigned wid)
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ivl_expr_t shift = ivl_expr_oper2(exp);
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/* Evaluate the sub-expression. */
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subv = draw_eval_expr(sube);
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subv = draw_eval_expr(sube, 0);
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/* Any bit select of a constant zero is another constant zero,
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so short circuit and return the value we know. */
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@ -1258,7 +1274,7 @@ static struct vector_info draw_select_expr(ivl_expr_t exp, unsigned wid)
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/* Evaluate the bit select base expression and store the
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result into index register 0. */
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shiv = draw_eval_expr(shift);
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shiv = draw_eval_expr(shift, 1);
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fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", shiv.base, shiv.wid);
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clr_vector(shiv);
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@ -1302,7 +1318,7 @@ static struct vector_info draw_ternary_expr(ivl_expr_t exp, unsigned wid)
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lab_false = local_count++;
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lab_out = local_count++;
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tmp = draw_eval_expr(cond);
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tmp = draw_eval_expr(cond, 1);
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clr_vector(tmp);
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if ((tmp.base >= 4) && (tmp.wid > 1)) {
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@ -1322,11 +1338,11 @@ static struct vector_info draw_ternary_expr(ivl_expr_t exp, unsigned wid)
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/* Ambiguous case. Evaluate both true and false expressions,
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and use %blend to merge them. */
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tmp = draw_eval_expr_wid(true_ex, wid);
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tmp = draw_eval_expr_wid(true_ex, wid, 0);
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fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base, tmp.base, wid);
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clr_vector(tmp);
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tmp = draw_eval_expr_wid(false_ex, wid);
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tmp = draw_eval_expr_wid(false_ex, wid, 0);
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fprintf(vvp_out, " %%blend %u, %u, %u;\n", res.base, tmp.base, wid);
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fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_out);
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if (tmp.base >= 8)
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@ -1335,7 +1351,7 @@ static struct vector_info draw_ternary_expr(ivl_expr_t exp, unsigned wid)
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/* This is the true case. Just evaluate the true expression. */
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fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_true);
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tmp = draw_eval_expr_wid(true_ex, wid);
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tmp = draw_eval_expr_wid(true_ex, wid, 0);
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fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base, tmp.base, wid);
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fprintf(vvp_out, " %%jmp T_%d.%d;\n", thread_count, lab_out);
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if (tmp.base >= 8)
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@ -1345,7 +1361,7 @@ static struct vector_info draw_ternary_expr(ivl_expr_t exp, unsigned wid)
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/* This is the false case. Just evaluate the false expression. */
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fprintf(vvp_out, "T_%d.%d ;\n", thread_count, lab_false);
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tmp = draw_eval_expr_wid(false_ex, wid);
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tmp = draw_eval_expr_wid(false_ex, wid, 0);
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fprintf(vvp_out, " %%mov %u, %u, %u;\n", res.base, tmp.base, wid);
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if (tmp.base >= 8)
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clr_vector(tmp);
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@ -1402,7 +1418,7 @@ static struct vector_info draw_sfunc_expr(ivl_expr_t exp, unsigned wid)
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vec = (struct vector_info *)
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realloc(vec, (vecs+1)*sizeof(struct vector_info));
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vec[vecs] = draw_eval_expr(expr);
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vec[vecs] = draw_eval_expr(expr, 0);
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vecs++;
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}
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@ -1516,7 +1532,7 @@ static struct vector_info draw_ufunc_expr(ivl_expr_t exp, unsigned wid)
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unsigned pin, bit;
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res = draw_eval_expr_wid(ivl_expr_parm(exp, idx),
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ivl_signal_pins(port));
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ivl_signal_pins(port), 0);
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bit = res.base;
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assert(res.wid <= ivl_signal_pins(port));
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for (pin = 0 ; pin < res.wid ; pin += 1) {
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@ -1583,7 +1599,7 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid)
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switch (ivl_expr_opcode(exp)) {
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case '~':
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res = draw_eval_expr_wid(sub, wid);
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res = draw_eval_expr_wid(sub, wid, 1);
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switch (res.base) {
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case 0:
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res.base = 1;
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@ -1606,7 +1622,7 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid)
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complement of the number. That is the 1's complement
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(bitwise invert) with a 1 added in. Note that the
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%sub subtracts -1 (1111...) to get %add of +1. */
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res = draw_eval_expr_wid(sub, wid);
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res = draw_eval_expr_wid(sub, wid, 1);
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switch (res.base) {
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case 0:
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res.base = 0;
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@ -1626,7 +1642,7 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid)
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break;
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case '!':
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res = draw_eval_expr(sub);
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res = draw_eval_expr(sub, 1);
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if (res.wid > 1) {
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/* a ! on a vector is implemented with a reduction
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nor. Generate the result into the first bit of
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@ -1678,7 +1694,7 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid)
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case '&':
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case '|':
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case '^':
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res = draw_eval_expr(sub);
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res = draw_eval_expr(sub, 0);
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if (res.wid > 1) {
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struct vector_info tmp;
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/* If the previous result is in the constant area
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@ -1728,7 +1744,8 @@ static struct vector_info draw_unary_expr(ivl_expr_t exp, unsigned wid)
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return res;
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}
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struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned wid)
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struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned wid,
|
||||
int xz_ok_flag)
|
||||
{
|
||||
struct vector_info res;
|
||||
|
||||
|
|
@ -1747,7 +1764,7 @@ struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned wid)
|
|||
break;
|
||||
|
||||
case IVL_EX_BINARY:
|
||||
res = draw_binary_expr(exp, wid);
|
||||
res = draw_binary_expr(exp, wid, xz_ok_flag);
|
||||
break;
|
||||
|
||||
case IVL_EX_BITSEL:
|
||||
|
|
@ -1794,13 +1811,16 @@ struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned wid)
|
|||
return res;
|
||||
}
|
||||
|
||||
struct vector_info draw_eval_expr(ivl_expr_t exp)
|
||||
struct vector_info draw_eval_expr(ivl_expr_t exp, int xz_ok_flag)
|
||||
{
|
||||
return draw_eval_expr_wid(exp, ivl_expr_width(exp));
|
||||
return draw_eval_expr_wid(exp, ivl_expr_width(exp), xz_ok_flag);
|
||||
}
|
||||
|
||||
/*
|
||||
* $Log: eval_expr.c,v $
|
||||
* Revision 1.76 2002/09/13 03:12:50 steve
|
||||
* Optimize ==1 when in context where x vs z doesnt matter.
|
||||
*
|
||||
* Revision 1.75 2002/09/12 15:49:43 steve
|
||||
* Add support for binary nand operator.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: vvp_priv.h,v 1.19 2002/08/27 05:39:57 steve Exp $"
|
||||
#ident "$Id: vvp_priv.h,v 1.20 2002/09/13 03:12:50 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include "ivl_target.h"
|
||||
|
|
@ -83,14 +83,19 @@ extern void draw_input_from_net(ivl_nexus_t nex);
|
|||
* allocation. When the caller is done with the bits, it must release
|
||||
* the vector with clr_vector so that the code generator can reuse
|
||||
* those bits.
|
||||
*
|
||||
* The xz_ok_flag is normally false. Set it to true if the result is
|
||||
* going to be further processed so that x and z values are treated
|
||||
* identically.
|
||||
*/
|
||||
struct vector_info {
|
||||
unsigned short base;
|
||||
unsigned short wid;
|
||||
};
|
||||
|
||||
extern struct vector_info draw_eval_expr(ivl_expr_t exp);
|
||||
extern struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned w);
|
||||
extern struct vector_info draw_eval_expr(ivl_expr_t exp, int xz_ok_flag);
|
||||
extern struct vector_info draw_eval_expr_wid(ivl_expr_t exp, unsigned w,
|
||||
int xz_ok_flag);
|
||||
|
||||
/*
|
||||
* This function draws code to evaluate the index expression exp for
|
||||
|
|
@ -115,6 +120,9 @@ extern unsigned thread_count;
|
|||
|
||||
/*
|
||||
* $Log: vvp_priv.h,v $
|
||||
* Revision 1.20 2002/09/13 03:12:50 steve
|
||||
* Optimize ==1 when in context where x vs z doesnt matter.
|
||||
*
|
||||
* Revision 1.19 2002/08/27 05:39:57 steve
|
||||
* Fix l-value indexing of memories and vectors so that
|
||||
* an unknown (x) index causes so cell to be addresses.
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: vvp_process.c,v 1.67 2002/09/01 00:19:35 steve Exp $"
|
||||
#ident "$Id: vvp_process.c,v 1.68 2002/09/13 03:12:50 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include "vvp_priv.h"
|
||||
|
|
@ -131,14 +131,14 @@ static void assign_to_memory(ivl_memory_t mem, unsigned idx,
|
|||
*/
|
||||
static void calculate_into_x0(ivl_expr_t expr)
|
||||
{
|
||||
struct vector_info vec = draw_eval_expr(expr);
|
||||
struct vector_info vec = draw_eval_expr(expr, 0);
|
||||
fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", vec.base, vec.wid);
|
||||
clr_vector(vec);
|
||||
}
|
||||
|
||||
static void calculate_into_x1(ivl_expr_t expr)
|
||||
{
|
||||
struct vector_info vec = draw_eval_expr(expr);
|
||||
struct vector_info vec = draw_eval_expr(expr, 0);
|
||||
fprintf(vvp_out, " %%ix/get 1, %u, %u;\n", vec.base, vec.wid);
|
||||
clr_vector(vec);
|
||||
}
|
||||
|
|
@ -217,7 +217,7 @@ static int show_stmt_assign(ivl_statement_t net)
|
|||
return 0;
|
||||
}
|
||||
|
||||
{ struct vector_info res = draw_eval_expr(rval);
|
||||
{ struct vector_info res = draw_eval_expr(rval, 0);
|
||||
unsigned wid = res.wid;
|
||||
unsigned lidx;
|
||||
unsigned cur_rbit = 0;
|
||||
|
|
@ -374,7 +374,7 @@ static int show_stmt_assign_nb(ivl_statement_t net)
|
|||
}
|
||||
|
||||
|
||||
{ struct vector_info res = draw_eval_expr(rval);
|
||||
{ struct vector_info res = draw_eval_expr(rval, 0);
|
||||
unsigned wid = res.wid;
|
||||
unsigned lidx;
|
||||
unsigned cur_rbit = 0;
|
||||
|
|
@ -488,7 +488,7 @@ static int show_stmt_block_named(ivl_statement_t net, ivl_scope_t scope)
|
|||
static int show_stmt_case(ivl_statement_t net, ivl_scope_t sscope)
|
||||
{
|
||||
ivl_expr_t exp = ivl_stmt_cond_expr(net);
|
||||
struct vector_info cond = draw_eval_expr(exp);
|
||||
struct vector_info cond = draw_eval_expr(exp, 0);
|
||||
unsigned count = ivl_stmt_case_count(net);
|
||||
|
||||
unsigned local_base = local_count;
|
||||
|
|
@ -531,7 +531,7 @@ static int show_stmt_case(ivl_statement_t net, ivl_scope_t sscope)
|
|||
|
||||
/* Oh well, do this case the hard way. */
|
||||
|
||||
cvec = draw_eval_expr_wid(cex, cond.wid);
|
||||
cvec = draw_eval_expr_wid(cex, cond.wid, 0);
|
||||
assert(cvec.wid == cond.wid);
|
||||
|
||||
switch (ivl_statement_type(net)) {
|
||||
|
|
@ -651,7 +651,7 @@ static int show_stmt_condit(ivl_statement_t net, ivl_scope_t sscope)
|
|||
int rc = 0;
|
||||
unsigned lab_false, lab_out;
|
||||
ivl_expr_t exp = ivl_stmt_cond_expr(net);
|
||||
struct vector_info cond = draw_eval_expr(exp);
|
||||
struct vector_info cond = draw_eval_expr(exp, 1);
|
||||
|
||||
assert(cond.wid == 1);
|
||||
|
||||
|
|
@ -714,7 +714,7 @@ static int show_stmt_delayx(ivl_statement_t net, ivl_scope_t sscope)
|
|||
ivl_expr_t exp = ivl_stmt_delay_expr(net);
|
||||
ivl_statement_t stmt = ivl_stmt_sub_stmt(net);
|
||||
|
||||
{ struct vector_info del = draw_eval_expr(exp);
|
||||
{ struct vector_info del = draw_eval_expr(exp, 0);
|
||||
fprintf(vvp_out, " %%ix/get 0, %u, %u;\n", del.base, del.wid);
|
||||
clr_vector(del);
|
||||
}
|
||||
|
|
@ -868,7 +868,7 @@ static int show_stmt_repeat(ivl_statement_t net, ivl_scope_t sscope)
|
|||
int rc = 0;
|
||||
unsigned lab_top = local_count++, lab_out = local_count++;
|
||||
ivl_expr_t exp = ivl_stmt_cond_expr(net);
|
||||
struct vector_info cnt = draw_eval_expr(exp);
|
||||
struct vector_info cnt = draw_eval_expr(exp, 0);
|
||||
|
||||
/* Test that 0 < expr */
|
||||
fprintf(vvp_out, "T_%u.%u %%cmp/u 0, %u, %u;\n", thread_count,
|
||||
|
|
@ -960,7 +960,7 @@ static int show_stmt_while(ivl_statement_t net, ivl_scope_t sscope)
|
|||
/* Draw the evaluation of the condition expression, and test
|
||||
the result. If the expression evaluates to false, then
|
||||
branch to the out label. */
|
||||
cvec = draw_eval_expr(ivl_stmt_cond_expr(net));
|
||||
cvec = draw_eval_expr(ivl_stmt_cond_expr(net), 1);
|
||||
if (cvec.wid > 1)
|
||||
cvec = reduction_or(cvec);
|
||||
|
||||
|
|
@ -1023,7 +1023,7 @@ static int show_system_task_call(ivl_statement_t net)
|
|||
|
||||
vec = (struct vector_info *)
|
||||
realloc(vec, (vecs+1)*sizeof(struct vector_info));
|
||||
vec[vecs] = draw_eval_expr(expr);
|
||||
vec[vecs] = draw_eval_expr(expr, 0);
|
||||
vecs++;
|
||||
}
|
||||
|
||||
|
|
@ -1302,6 +1302,9 @@ int draw_func_definition(ivl_scope_t scope)
|
|||
|
||||
/*
|
||||
* $Log: vvp_process.c,v $
|
||||
* Revision 1.68 2002/09/13 03:12:50 steve
|
||||
* Optimize ==1 when in context where x vs z doesnt matter.
|
||||
*
|
||||
* Revision 1.67 2002/09/01 00:19:35 steve
|
||||
* Watch for x indices in l-value of non-blocking assignments.
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue