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Kill links to vvm.

This commit is contained in:
steve 2002-08-10 22:27:13 +00:00
parent 90c6bc3a61
commit b170a85fef
7 changed files with 14 additions and 4310 deletions
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23
Makefile.in
View File

@ -16,7 +16,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.131 2002/08/04 19:13:16 steve Exp $"
#ident "$Id: Makefile.in,v 1.132 2002/08/10 22:27:13 steve Exp $"
#
#
SHELL = /bin/sh
@ -67,12 +67,8 @@ ifeq ('@HAVE_IPAL@','yes')
TARGETS += tgt-pal
endif
ifeq (@ENABLE_VVM@,yes)
SUB_VVM = vvm
endif
all: ivl@EXEEXT@ libvpi.a
for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) all); done
for dir in $(SUBDIRS) ; do (cd $$dir ; $(MAKE) all); done
cd vpi ; $(MAKE) all
cd ivlpp ; $(MAKE) all
cd driver ; $(MAKE) VERSION=$(VERSION) all
@ -105,13 +101,12 @@ clean:
cd ivlpp ; $(MAKE) clean
cd tgt-verilog ; $(MAKE) clean
cd tgt-stub ; $(MAKE) clean
for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) clean); done
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) clean); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) clean); done
distclean: clean
for dir in $(SUBDIRS) $(SUB_VVM); do (cd $$dir ; $(MAKE) distclean); done
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) distclean); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) distclean); done
rm -f vvm/Makefile
rm -f vpi/Makefile
rm -f ivlpp/Makefile
rm -f driver/Makefile
@ -119,11 +114,7 @@ distclean: clean
rm -f Makefile
rm -f tgt-pal/Makefile tgt-stub/Makefile tgt-verilog/Makefile
ifeq (@ENABLE_VVM@,yes)
TT_VVM = mangle.o t-vvm.o
endif
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o $(TT_VVM) t-xnf.o
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
@ -234,7 +225,7 @@ install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $
cd vpi ; $(MAKE) install
cd ivlpp ; $(MAKE) install
cd driver ; $(MAKE) install
for tgt in $(SUBDIRS) $(SUB_VVM); do (cd $$tgt ; $(MAKE) install); done
for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) install); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) install); done
$(bindir)/iverilog-vpi: ./iverilog-vpi
@ -304,7 +295,7 @@ uninstall:
cd driver ; $(MAKE) uninstall
cd vpi ; $(MAKE) uninstall
cd ivlpp ; $(MAKE) uninstall
for tgt in $(SUBDIRS) $(SUB_VVM); do (cd $$tgt ; $(MAKE) uninstall); done
for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) uninstall); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) uninstall); done

14
configure.in
View File

@ -2,16 +2,6 @@ dnl Process this file with autoconf to produce a configure script.
AC_INIT(netlist.h)
AC_CONFIG_HEADER(config.h)
AC_ARG_ENABLE(vvm, vvm target -- the obsolete vvm code generator,
AC_DEFINE(ENABLE_VVM))
if test "${enable_vvm+set}" = set
then
ENABLE_VVM=yes
else
ENABLE_VVM=no
fi
AC_SUBST(ENABLE_VVM)
dnl Checks for programs.
AC_PROG_CC
AC_PROG_CXX
@ -86,7 +76,7 @@ AC_CANONICAL_HOST
#######################
## test for underscores. The vpi module loader in vvm needs to know this
## test for underscores. The vpi module loader needs to know this
## in order to know the name of the start symbol for the .vpi module.
#######################
@ -247,4 +237,4 @@ AC_MSG_RESULT($shared)
AC_CONFIG_SUBDIRS(vpip vvp tgt-vvp tgt-fpga libveriuser)
AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile vvm/Makefile driver/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile driver/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)

102
driver/main.c
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: main.c,v 1.44 2002/07/15 00:33:50 steve Exp $"
#ident "$Id: main.c,v 1.45 2002/08/10 22:27:13 steve Exp $"
# include "config.h"
@ -217,97 +217,6 @@ static int t_default(char*cmd, unsigned ncmd)
return 0;
}
/*
* This function handles the vvm target. After preprocessing, run the
* ivl translator to get C++, then run g++ to make an executable
* program out of that.
*/
static int t_vvm(char*cmd, unsigned ncmd)
{
int rc;
const char*pattern = lookup_pattern("<ivl>");
if (pattern == 0) {
fprintf(stderr, "No such target: %s\n", targ);
return -1;
}
tmp[0] = ' ';
tmp[1] = '|';
tmp[2] = ' ';
rc = build_string(tmp+3, sizeof tmp - 3, pattern);
cmd = realloc(cmd, ncmd+3+rc+1);
#ifdef __MINGW32__
{
char *t;
for (t = tmp; *t; t++)
{
if (*t == '/') *t = '\\';
}
}
#endif
strcpy(cmd+ncmd, tmp);
if (verbose_flag)
printf("translate: %s\n", cmd);
rc = system(cmd);
remove(source_path);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors translating Verilog program.\n");
return WEXITSTATUS(rc);
} else {
fprintf(stderr, "Command signaled: %s\n", cmd);
return -1;
}
}
#if defined(__MINGW32__)
/* In the Windows world, the path to headers and libraries
for vvm is relative the ivl_root, which is in something like:
d:\iverilog\lib\ivl <-- ivl_root
d:\iverilog\include <-- vvm headers
d:\iverilog\lib <-- vvm libraries
So we make up all the ugly references that are the g++
command line to compile a .cc file generated by vvm. */
sprintf(tmp, "%s " RDYNAMIC " -s -fno-exceptions -o %s "
"-I%s\\..\\..\\include -L%s\\.. %s.cc -lvvm -lvpip %s",
CXX, opath, ivl_root, ivl_root, opath, DLLIB);
#else
/* In the UNIX universe, life is easy. The configure script
has figured everything out and wrote it into the Makefile,
which passes it on as the IVL_INC and IVL_LIB defines. */
sprintf(tmp, "%s " RDYNAMIC " -s -fno-exceptions -o %s -I%s "
"-L%s %s.cc -lvvm -lvpip %s", CXX, opath, IVL_INC,
IVL_LIB, opath, DLLIB);
#endif
if (verbose_flag)
printf("compile: %s\n", tmp);
rc = system(tmp);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors compiling translated program.\n");
return WEXITSTATUS(rc);
} else {
fprintf(stderr, "Command signaled: %s\n", tmp);
return -1;
}
}
sprintf(tmp, "%s.cc", opath);
unlink(tmp);
return 0;
}
static void process_warning_switch(const char*name)
{
@ -745,17 +654,16 @@ int main(int argc, char **argv)
/* Done writing to the iconfig file. Close it now. */
fclose(iconfig_file);
if (strcmp(targ,"vvm") == 0)
return t_vvm(cmd, ncmd);
else {
return t_default(cmd, ncmd);
}
return t_default(cmd, ncmd);
return 0;
}
/*
* $Log: main.c,v $
* Revision 1.45 2002/08/10 22:27:13 steve
* Kill links to vvm.
*
* Revision 1.44 2002/07/15 00:33:50 steve
* Improve temporary file name guess.
*

10
iverilog.conf
View File

@ -77,16 +77,6 @@
[-tvvp]
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fcprop -Fnodangle %f %m -o%o -- -
# --
# The vvm target uses the <ivl> string to take the preprocessed code from
# standard input, compile it with the vvm code generator and write the
# result to %o.cc. The driver assumes this when invoking the C++ compiler
# on the result.
[-tvvm]
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=%B %f %m -o%o.cc -- -
# This is the XNF code generator.
[-txnf]

133
mangle.cc
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@ -1,133 +0,0 @@
/*
* Copyright (c) 1998-1999 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: mangle.cc,v 1.7 2001/07/25 03:10:49 steve Exp $"
#endif
# include "config.h"
# include "target.h"
# include <strstream>
string mangle(const string&str)
{
if (str[0] == '$')
return str;
ostrstream res;
string tmp = str;
while (tmp.length() > 0) {
size_t pos = tmp.find_first_of(".<\\[]/");
if (pos > tmp.length())
pos = tmp.length();
res << "S" << pos << tmp.substr(0, pos);
if (pos >= tmp.length())
break;
tmp = tmp.substr(pos);
switch (tmp[0]) {
case '.':
tmp = tmp.substr(1);
break;
case '<':
tmp = tmp.substr(1);
res << "_";
while (tmp[0] != '>') {
res << tmp[0];
tmp = tmp.substr(1);
}
tmp = tmp.substr(1);
res << "_";
break;
case '\\':
res << "$$";
tmp = tmp.substr(1);
break;
case '/':
res << "$sl$";
tmp = tmp.substr(1);
break;
case '[':
res << "$lb$";
tmp = tmp.substr(1);
break;
case ']':
res << "$rb$";
tmp = tmp.substr(1);
break;
}
}
res << ends;
return res.str();
}
string stresc(const string&str)
{
ostrstream res;
string tmp = str;
while (tmp.length() > 0) {
size_t pos = tmp.find_first_of("\\");
if (pos > tmp.length())
pos = tmp.length();
res << tmp.substr(0, pos);
if (pos >= tmp.length())
break;
tmp = tmp.substr(pos);
switch (tmp[0]) {
case '\\':
res << "\\\\";
tmp = tmp.substr(1);
break;
}
}
res << ends;
return res.str();
}
/*
* $Log: mangle.cc,v $
* Revision 1.7 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.6 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.5 2000/12/11 01:06:24 steve
* Mangle [] characters. (PR#67)
*
* Revision 1.4 2000/10/25 23:21:37 steve
* mangle the backslash to a dollar.
*
* Revision 1.3 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.2 1999/02/15 05:52:50 steve
* Mangle that handles device instance numbers.
*
* Revision 1.1 1998/11/03 23:29:00 steve
* Introduce verilog to CVS.
*
*/

3866
t-vvm.cc
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File diff suppressed because it is too large Load Diff

176
vvm.txt
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@ -1,176 +0,0 @@
WHAT IS VVM
The vvm target is C++ output that uses the VVM library for a
runtime. The Verilog module that is elaborated must have no ports, as
the output program is self contained. It is useful to write a "main"
module that tests a part being designed. This output type is most
useful for batch simulation.
The iverilog target ``vvm'' generates code that uses the vvm library,
and takes care of compiling the code into an executable program.
The vvm library can also be used directly by C++ programmers if
desired, ir order to skip the Verilog compilation step and write
simulations in C++.
WRITING SIMULATIONS IN C++/VVM
It is possible to write simulations using C++ and the vvm library. The
library classes fairly directly represent hardware devices and signal
values, so writing such a simulation should be relatively obvious. The
library also supports calling VPI modules written to work with Icarus
Verilog. There are routines for loading and interfacing with VPI
modules so that they think you are Verilog.
The details of the various classes are covered by comments in the
various header files. The core header file is vvm.h, but the header
files vvm_gates.h and vvm_signal.h are also important.
NEXUS, GATES AND DRIVERS
The vvm library allows the user (the t-vvm code generator from its
point of view) to build up a netlist of gates that operate like
hardware components. The basic unit of connectivity in the vvm_nexus
class.
A vvm_nexus object represents a nexus of a netlist: that is, a point
where drivers and receivers are connected together. The nexus class
defines the sub-classes (not derived classes) driver_t and recvr_t
that objects and code use to connect to the nexus. The nexus also has
a reg_assign() method for simulating procedural assignment.
The driver_t class is a means to drive (as opposed to assign) a value
onto the nexus. Gates with outputs have drive_t objects that they can
connect to exactly one nexus.
The recvr_t class is where the nexus delivers the resolved
value. Receiver objects are actually able to represent many pins of a
device, although a nexus is connected to only one. This is managed by
passing to the nexus a pointer to the object and a key that the
receiver uses to identify the pin. This is done so that the gate class
can derive from the recvr_t class and support multiple input pins.
The vvm_nexus class connects to any number of drivers and any number
of receivers. This is how fan-in and fan-out are achieved in a design
under test. When a connected driver gets a new value, the vvm_nexus
object scans all the drivers and collects the values that are being
driven. It passes the set to a resolution function that calculates the
actual value that the vvm_nexus will take, then passes that value to
all the receivers.
If there are no drivers, the vvm_nexus can also receive a value from
procedural assignment, via the reg_assign() method. When assigned in
this manner, the vvm_nexus simply takes the value given to it and
passes it to all the receivers. The vvm_nexus holds the last value
assigned, and does not perform any resolution.
The vvm/vvm_nexus.h header file describes the vvm_nexus and related
classes.
ATTRIBUTES
(none)
INITIALIZATION OF THE SIMULATION
The t-vvm generates initialization code that causes gates to get
initial values for their inputs, if any were specified by the
programmer, and outputs if the device is sequential. This
initialization code goes into the generated design_init() function.
The t-vvm also generates startup code that causes gates to generate
outputs from the initial inputs. This cannot be done in the
design_init() function because of the possibilities of cycles and
other complexities in the netlist.
THREADS
The generated code does not actually use threads. It instead supports
threads of verilog behavior by reducing the sequential process into
basic blocks, and calling those basic blocks as needed.
SMALL SEQUENTIAL UDP GATES
For gates with 8 or fewer inputs, vvm has a table based
representation. When a transition happens, the transition is converted
into a table index that addresses the next output value. This is a
compact method for representing even the most degenerate UDP
transition tables, but these degenerate tables can get pretty
large. Hence the practical limit.
The index into the transtion table is made up of the current output
and current inputs with the following recursive formula:
I[0] = X
I[N] = X[N] + 3 * I[N-1]
where X[N], the value of pin N, is 0 for V0, 1 for V1 and 2 for Vx. In
other words:
unsigned state = current_output;
for (unsigned idx = 1 ; idx < npins ; idx += 1)
state = 3*state + current_input[idx];
The state indexes into an array of 32bit words that contain all the
transitions out of that state. Each pin transition is represented by 4
bits--two bits for each possible transition for the pin. The 4 bits
represent transitions as in this table:
bits [3:2] bits [1:0]
0 -> 1 0 -> x
1 -> 0 1 -> x
x -> 0 x -> 1
The values of the bit pairs in the table entry are 2b'00 for V0, 2b'01
for V1 and 2b'10 for Vx. The transitions are arranged in the 32bit
entry with the last pin in the lowest 4 bits, the next to last pin in
the next 4 bits, and so on. So, if P is the changing pin on a 7 pin
UDP, and E is the 32bit entry for the current state, the transition
bits are at:
(E >> 4*(6-P)) & 0xf
/*
* Copyright (c) 1998-1999 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
$Id: vvm.txt,v 1.6 2000/05/11 01:44:52 steve Exp $
$Log: vvm.txt,v $
Revision 1.6 2000/05/11 01:44:52 steve
No need for nobufz.
Revision 1.5 2000/03/16 19:03:04 steve
Revise the VVM backend to use nexus objects so that
drivers and resolution functions can be used, and
the t-vvm module doesn't need to write a zillion
output functions.
Revision 1.4 1999/12/30 17:37:14 steve
Remove the now useless sigfold functor.
Revision 1.3 1999/08/18 03:45:36 steve
Update compile command line.
Revision 1.2 1999/08/15 01:23:56 steve
Convert vvm to implement system tasks with vpi.
Revision 1.1 1999/04/29 16:29:04 steve
Add vvm target documentation