Add Xilinx support for A/B MUX devices.
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steve
parent
7b933eddd4
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253f3bc660
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-virtex.c,v 1.25 2003/06/25 02:55:57 steve Exp $"
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#ident "$Id: d-virtex.c,v 1.26 2003/06/26 03:57:05 steve Exp $"
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#endif
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# include "device.h"
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@ -670,7 +670,7 @@ const struct device_s d_virtex_edif = {
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virtex_eq,
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virtex_eq,
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virtex_ge,
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0,
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xilinx_mux,
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virtex_add,
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virtex_add,
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xilinx_shiftl,
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@ -680,6 +680,9 @@ const struct device_s d_virtex_edif = {
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/*
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* $Log: d-virtex.c,v $
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* Revision 1.26 2003/06/26 03:57:05 steve
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* Add Xilinx support for A/B MUX devices.
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*
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* Revision 1.25 2003/06/25 02:55:57 steve
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* Virtex and Virtex2 share much code.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-virtex2.c,v 1.14 2003/06/25 02:55:57 steve Exp $"
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#ident "$Id: d-virtex2.c,v 1.15 2003/06/26 03:57:05 steve Exp $"
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#endif
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# include "device.h"
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@ -141,7 +141,7 @@ const struct device_s d_virtex2_edif = {
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virtex_eq,
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virtex_eq,
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virtex_ge,
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0,
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xilinx_mux,
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virtex_add,
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virtex_add,
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xilinx_shiftl, /* show_shiftl */
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@ -151,6 +151,9 @@ const struct device_s d_virtex2_edif = {
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/*
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* $Log: d-virtex2.c,v $
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* Revision 1.15 2003/06/26 03:57:05 steve
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* Add Xilinx support for A/B MUX devices.
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*
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* Revision 1.14 2003/06/25 02:55:57 steve
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* Virtex and Virtex2 share much code.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: xilinx.c,v 1.2 2003/06/25 02:55:57 steve Exp $"
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#ident "$Id: xilinx.c,v 1.3 2003/06/26 03:57:05 steve Exp $"
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#endif
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# include "edif.h"
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@ -485,6 +485,56 @@ void xilinx_logic(ivl_net_logic_t net)
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}
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}
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/*
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* A fully generic Xilinx MUX is implemented entirely from LUT
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* devices.
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*/
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void xilinx_mux(ivl_lpm_t net)
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{
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unsigned idx;
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edif_cellref_t lut;
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edif_joint_t jnt;
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assert(ivl_lpm_selects(net) == 1);
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/* A/B Mux devices are made from LUT3 devices. I0 is connected
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to A, I1 to B, and I2 to the Select input. Create as many
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as are needed to implement the requested width.
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S B A | Q
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------+--
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0 0 0 | 0
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0 0 1 | 1
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0 1 0 | 0
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0 1 1 | 1
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1 0 0 | 0
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1 0 1 | 0
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1 1 0 | 1
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1 1 1 | 1
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INIT = "CA" */
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for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) {
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lut = edif_cellref_create(edf, xilinx_cell_lut3(xlib));
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jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx));
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edif_add_to_joint(jnt, lut, LUT_O);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, 0, idx));
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edif_add_to_joint(jnt, lut, LUT_I0);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, 1, idx));
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edif_add_to_joint(jnt, lut, LUT_I1);
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jnt = edif_joint_of_nexus(edf, ivl_lpm_select(net, 0));
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edif_add_to_joint(jnt, lut, LUT_I2);
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edif_cellref_pstring(lut, "INIT", "CA");
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}
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}
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/*
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* Any Xilinx device works with this adder.
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* Generic Xilinx add only works for single bit slices.
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@ -682,6 +732,9 @@ void xilinx_shiftl(ivl_lpm_t net)
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/*
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* $Log: xilinx.c,v $
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* Revision 1.3 2003/06/26 03:57:05 steve
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* Add Xilinx support for A/B MUX devices.
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*
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* Revision 1.2 2003/06/25 02:55:57 steve
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* Virtex and Virtex2 share much code.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: xilinx.h,v 1.2 2003/06/25 02:55:57 steve Exp $"
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#ident "$Id: xilinx.h,v 1.3 2003/06/26 03:57:05 steve Exp $"
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#endif
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/*
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@ -104,11 +104,15 @@ extern void virtex_add(ivl_lpm_t net);
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extern void xilinx_show_scope(ivl_scope_t scope);
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extern void xilinx_pad(ivl_signal_t, const char*str);
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extern void xilinx_logic(ivl_net_logic_t net);
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extern void xilinx_mux(ivl_lpm_t net);
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extern void xilinx_add(ivl_lpm_t net);
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extern void xilinx_shiftl(ivl_lpm_t net);
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/*
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* $Log: xilinx.h,v $
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* Revision 1.3 2003/06/26 03:57:05 steve
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* Add Xilinx support for A/B MUX devices.
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*
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* Revision 1.2 2003/06/25 02:55:57 steve
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* Virtex and Virtex2 share much code.
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*
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