Add Virtex code generators for left shift,
subtraction, and GE comparators.
This commit is contained in:
steve
parent
32f1ca6f8b
commit
ae27165ffe
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-generic-edif.c,v 1.9 2002/08/12 01:35:02 steve Exp $"
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#ident "$Id: d-generic-edif.c,v 1.10 2002/10/28 02:05:56 steve Exp $"
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#endif
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# include "device.h"
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@ -394,12 +394,20 @@ const struct device_s d_generic_edif = {
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0,
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0,
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0,
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0
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0,
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0, /* show_add */
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0, /* show_sub */
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0, /* show_shiftl */
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0 /* show_shiftr */
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};
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/*
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* $Log: d-generic-edif.c,v $
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* Revision 1.10 2002/10/28 02:05:56 steve
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* Add Virtex code generators for left shift,
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* subtraction, and GE comparators.
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*
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* Revision 1.9 2002/08/12 01:35:02 steve
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* conditional ident string using autoconfig.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-generic.c,v 1.11 2002/08/12 01:35:02 steve Exp $"
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#ident "$Id: d-generic.c,v 1.12 2002/10/28 02:05:56 steve Exp $"
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#endif
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# include "device.h"
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@ -503,13 +503,21 @@ const struct device_s d_generic = {
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generic_show_dff,
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generic_show_cmp_eq,
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generic_show_cmp_eq,
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0, /* ge not implemented */
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generic_show_mux,
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generic_show_add
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generic_show_add,
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0, /* subtract not implemented */
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0,
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0
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};
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/*
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* $Log: d-generic.c,v $
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* Revision 1.12 2002/10/28 02:05:56 steve
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* Add Virtex code generators for left shift,
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* subtraction, and GE comparators.
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*
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* Revision 1.11 2002/08/12 01:35:02 steve
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* conditional ident string using autoconfig.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: d-virtex.c,v 1.15 2002/09/15 21:52:19 steve Exp $"
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#ident "$Id: d-virtex.c,v 1.16 2002/10/28 02:05:56 steve Exp $"
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#endif
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# include "device.h"
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@ -1159,6 +1159,18 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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char jbuf [1024];
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unsigned idx;
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unsigned nref = 0;
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unsigned ha_init = 6;
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switch (ivl_lpm_type(net)) {
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case IVL_LPM_ADD:
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ha_init = 6;
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break;
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case IVL_LPM_SUB:
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ha_init = 9;
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break;
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default:
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assert(0);
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}
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/* Handle the special case that the adder is only one bit
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wide. Generate an XOR gate to perform the half-add. */
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@ -1169,7 +1181,7 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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ivl_lpm_q(net, 0),
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ivl_lpm_data(net, 0),
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ivl_lpm_datab(net, 0),
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"6");
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(ha_init == 6) ? "6" : "9");
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return;
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}
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@ -1180,8 +1192,8 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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includes the LUT2 device to perform the addition, and a
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MUXCY_L device to send the carry up to the next bit. */
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fprintf(xnf, "(instance (rename U%u_L0 \"%s\"[0])"
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" (property INIT (string \"6\"))", edif_uref,
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ivl_lpm_name(net));
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" (property INIT (string \"%u\"))", edif_uref,
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ivl_lpm_name(net), ha_init);
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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@ -1207,8 +1219,8 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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device, the other devices have local names. */
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for (idx = 1 ; idx < (ivl_lpm_width(net)-1) ; idx += 1) {
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"6\"))",
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edif_uref, idx);
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"%u\"))",
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edif_uref, idx, ha_init);
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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@ -1249,8 +1261,8 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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}
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"6\"))",
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edif_uref, idx);
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"%u\"))",
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edif_uref, idx, ha_init);
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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@ -1282,6 +1294,295 @@ static void edif_show_virtex_add(ivl_lpm_t net)
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edif_set_nexus_joint(ivl_lpm_q(net, idx), jbuf);
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}
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static void virtex_show_cmp_ge(ivl_lpm_t net)
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{
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char jbuf [1024];
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unsigned idx;
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unsigned nref = 0;
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/* Handle the special case that the adder is only one bit
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wide. Generate an XOR gate to perform the half-add. */
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if (ivl_lpm_width(net) == 1) {
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edif_uref += 1;
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edif_show_lut2(ivl_lpm_name(net), edif_uref,
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ivl_lpm_q(net, 0),
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ivl_lpm_data(net, 0),
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ivl_lpm_datab(net, 0),
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"D");
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return;
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}
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assert(ivl_lpm_width(net) > 1);
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edif_uref += 1;
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/* First, draw the bottom bit slice of the comparator. This
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includes the LUT2 device to perform the addition, and a
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MUXCY_L device to send the carry up to the next bit. */
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fprintf(xnf, "(instance (rename U%u_L0 \"%s\"[0])"
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" (property INIT (string \"9\"))", edif_uref,
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ivl_lpm_name(net));
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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fprintf(xnf, "(instance U%u_M0", edif_uref);
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fprintf(xnf, " (viewRef net"
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" (cellRef MUXCY_L (libraryRef VIRTEX))))\n");
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sprintf(jbuf, "(portRef I0 (instanceRef U%u_L0))", edif_uref);
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edif_set_nexus_joint(ivl_lpm_data(net, 0), jbuf);
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sprintf(jbuf, "(portRef I1 (instanceRef U%u_L0))", edif_uref);
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edif_set_nexus_joint(ivl_lpm_datab(net, 0), jbuf);
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sprintf(jbuf, "(portRef DI (instanceRef U%u_M0))", edif_uref);
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edif_set_nexus_joint(ivl_lpm_data(net, 0), jbuf);
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switch (ivl_lpm_type(net)) {
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case IVL_LPM_CMP_GT:
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fprintf(xnf, "(instance U%u_FILL "
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" (viewRef net"
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" (cellRef GND (libraryRef VIRTEX))))\n",
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edif_uref);
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fprintf(xnf, "(net U%u_FILLN (joined"
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" (portRef GROUND (instanceRef U%u_FILL))"
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" (portRef CI (instanceRef U%u_M0))))\n",
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edif_uref, edif_uref, edif_uref);
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break;
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case IVL_LPM_CMP_GE:
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fprintf(xnf, "(instance U%u_FILL "
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" (viewRef net"
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" (cellRef VCC (libraryRef VIRTEX))))\n",
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edif_uref);
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fprintf(xnf, "(net U%u_FILLN (joined"
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" (portRef VCC (instanceRef U%u_FILL))"
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" (portRef CI (instanceRef U%u_M0))))\n",
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edif_uref, edif_uref, edif_uref);
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break;
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default:
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assert(0);
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}
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/* Now draw all the inside bit slices. These include the LUT2
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device for the basic add, the MUXCY_L device to propagate
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the carry, and an XORCY device to generate the real
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output. The XORCY device carries the name of the LPM
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device, the other devices have local names. */
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for (idx = 1 ; idx < (ivl_lpm_width(net)-1) ; idx += 1) {
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"9\"))",
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edif_uref, idx);
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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fprintf(xnf, "(instance U%u_M%u", edif_uref, idx);
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fprintf(xnf, " (viewRef net"
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" (cellRef MUXCY_L (libraryRef VIRTEX))))\n");
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fprintf(xnf, "(net U%uN%u (joined"
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" (portRef O (instanceRef U%u_L%u))"
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" (portRef S (instanceRef U%u_M%u))))\n",
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edif_uref, nref++, edif_uref, idx, edif_uref, idx);
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fprintf(xnf, "(net U%uN%u (joined"
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" (portRef CI (instanceRef U%u_M%u))"
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" (portRef LO (instanceRef U%u_M%u))))\n",
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edif_uref, nref++, edif_uref, idx, edif_uref, idx-1);
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sprintf(jbuf, "(portRef I0 (instanceRef U%u_L%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_data(net, idx), jbuf);
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sprintf(jbuf, "(portRef I1 (instanceRef U%u_L%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_datab(net, idx), jbuf);
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sprintf(jbuf, "(portRef DI (instanceRef U%u_M%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_data(net, idx), jbuf);
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}
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fprintf(xnf, "(instance U%u_L%u) (property INIT (string \"9\"))",
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edif_uref, idx);
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fprintf(xnf, " (viewRef net"
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" (cellRef LUT2 (libraryRef VIRTEX))))\n");
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fprintf(xnf, "(net U%uN%u (joined"
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" (portRef O (instanceRef U%u_L%u))"
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" (portRef LI (instanceRef U%u_X%u))))\n",
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edif_uref, nref++, edif_uref, idx, edif_uref, idx);
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fprintf(xnf, "(net U%uN%u (joined"
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" (portRef CI (instanceRef U%u_X%u))"
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" (portRef LO (instanceRef U%u_M%u))))\n",
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edif_uref, nref++, edif_uref, idx, edif_uref, idx-1);
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sprintf(jbuf, "(portRef I0 (instanceRef U%u_L%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_data(net, idx), jbuf);
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sprintf(jbuf, "(portRef I1 (instanceRef U%u_L%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_datab(net, idx), jbuf);
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sprintf(jbuf, "(portRef DI (instanceRef U%u_M%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_data(net, idx), jbuf);
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sprintf(jbuf, "(portRef LO (instanceRef U%u_M%u))",
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edif_uref, idx);
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edif_set_nexus_joint(ivl_lpm_q(net, 0), jbuf);
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}
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/*
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* The left shift is implemented as a matrix of MUX2_1 devices. The
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* matrix has as many rows as the device width, and a column for each
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* select.
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*/
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static void virtex_show_shiftl(ivl_lpm_t net)
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{
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char jbuf[64];
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unsigned width = ivl_lpm_width(net);
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unsigned nsel = 0, swid = 0;
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unsigned sdx, qdx;
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edif_uref += 1;
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/* First, find out how many select inputs we really need. We
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can only use the selects that are enough to shift out the
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entire width of the device. The excess can be used as an
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enable for the last column. When disabled, the last column
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emits zeros. */
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while (nsel < ivl_lpm_selects(net)) {
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nsel += 1;
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swid = 1 << nsel;
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if (swid >= width)
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break;
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}
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assert(nsel > 0);
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/* Draw the gates of the matrix, and connect the select inputs
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up the columns. Column 0 is the first to see the input
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data, so it gets select[0], and so on. */
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for (sdx = 0 ; sdx < nsel ; sdx += 1) {
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unsigned lutn = 3;
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if ( (sdx == (nsel-1)) && (nsel < ivl_lpm_selects(net)))
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lutn = 4;
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for (qdx = 0 ; qdx < width ; qdx += 1) {
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fprintf(xnf, "(instance U%uC%uR%u"
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" (viewRef net"
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" (cellRef LUT%u (libraryRef VIRTEX)))"
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" (property INIT (string \"CA\")))\n",
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edif_uref, sdx, qdx, lutn);
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sprintf(jbuf, "(portRef I2 (instanceRef U%uC%uR%u))",
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edif_uref, sdx, qdx);
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edif_set_nexus_joint(ivl_lpm_select(net, sdx), jbuf);
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/* If this is the last column, and there are
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excess selects to account for, then connect the
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I3 inputs of the LUT4 devices to the excess
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select, to act as an enable. */
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if (lutn == 4) {
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assert((nsel + 1) == ivl_lpm_selects(net));
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sprintf(jbuf, "(portRef I3 (instanceRef U%uC%uR%u))",
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edif_uref, sdx, qdx);
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edif_set_nexus_joint(ivl_lpm_select(net, nsel), jbuf);
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}
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}
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}
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/* Connect the output of the matrix to the outputs of the
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shiftl. */
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for (qdx = 0 ; qdx < width ; qdx += 1) {
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sprintf(jbuf, "(portRef O (instanceRef U%uC%uR%u))",
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edif_uref, nsel-1, qdx);
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edif_set_nexus_joint(ivl_lpm_q(net, qdx), jbuf);
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}
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/* Connect the input of the matrix to the inputs of the
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shiftl. The B inputs of the input column MUXes also get the
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inputs shifted up 1. */
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for (qdx = 0 ; qdx < width ; qdx += 1) {
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sprintf(jbuf, "(portRef I0 (instanceRef U%uC%uR%u))",
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edif_uref, 0, qdx);
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edif_set_nexus_joint(ivl_lpm_data(net, qdx), jbuf);
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if (qdx < (width-1)) {
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sprintf(jbuf, "(portRef I1 (instanceRef U%uC%uR%u))",
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edif_uref, 0, qdx+1);
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edif_set_nexus_joint(ivl_lpm_data(net, qdx), jbuf);
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}
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}
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/* Connect the B side 0 padding to the input column. */
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fprintf(xnf, "(instance U%uC%uP"
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" (viewRef net"
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" (cellRef GND (libraryRef VIRTEX))))\n",
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edif_uref, 0);
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fprintf(xnf, "(net U%uC0PN (joined"
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" (portRef I1 (instanceRef U%uC0R0))"
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" (portRef GROUND (instanceRef U%uC0P))))\n",
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edif_uref, edif_uref, edif_uref);
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/* Connect the sdx column outputs to the sdx+1 column
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inputs. This includes the A side which is straight
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through, and the B side which is shifted based on the
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selector identity. */
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for (sdx = 0 ; sdx < (nsel-1) ; sdx += 1) {
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unsigned shift = 1 << sdx;
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for (qdx = 0 ; qdx < shift ; qdx += 1) {
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fprintf(xnf, "(net U%uC%uR%uN (joined"
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" (portRef O (instanceRef U%uC%uR%u))"
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" (portRef I0 (instanceRef U%uC%uR%u))))\n",
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edif_uref, sdx, qdx,
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edif_uref, sdx+1, qdx,
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edif_uref, sdx+1, qdx);
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fprintf(xnf, "(instance U%uC%uR%uG"
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" (viewRef net"
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" (cellRef GND (libraryRef VIRTEX))))\n",
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edif_uref, sdx+1, qdx);
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fprintf(xnf, "(net U%uC%uR%uGN (joined"
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" (portRef I1 (instanceRef U%uC%uR%u))"
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" (portRef GROUND (instanceRef U%uC%uR%uG))))\n",
|
||||
edif_uref, sdx+1, qdx,
|
||||
edif_uref, sdx+1, qdx,
|
||||
edif_uref, sdx+1, qdx);
|
||||
}
|
||||
|
||||
for (qdx = shift ; qdx < width ; qdx += 1) {
|
||||
fprintf(xnf, "(net U%uC%uR%uN (joined"
|
||||
" (portRef O (instanceRef U%uC%uR%u))"
|
||||
" (portRef I0 (instanceRef U%uC%uR%u))"
|
||||
" (portRef I1 (instancdRef U%uC%uR%u))))\n",
|
||||
edif_uref, sdx, qdx,
|
||||
edif_uref, sdx, qdx,
|
||||
edif_uref, sdx+1, qdx,
|
||||
edif_uref, sdx+1, qdx - shift);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
const struct device_s d_virtex_edif = {
|
||||
edif_show_header,
|
||||
edif_show_footer,
|
||||
|
|
@ -1290,13 +1591,21 @@ const struct device_s d_virtex_edif = {
|
|||
edif_show_generic_dff,
|
||||
edif_show_virtex_eq,
|
||||
edif_show_virtex_eq,
|
||||
virtex_show_cmp_ge,
|
||||
edif_show_virtex_mux,
|
||||
edif_show_virtex_add
|
||||
edif_show_virtex_add,
|
||||
edif_show_virtex_add,
|
||||
virtex_show_shiftl,
|
||||
0 /* show_shiftr */
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* $Log: d-virtex.c,v $
|
||||
* Revision 1.16 2002/10/28 02:05:56 steve
|
||||
* Add Virtex code generators for left shift,
|
||||
* subtraction, and GE comparators.
|
||||
*
|
||||
* Revision 1.15 2002/09/15 21:52:19 steve
|
||||
* Generate code for 8:1 muxes msing F5 and F6 muxes.
|
||||
*
|
||||
|
|
@ -1317,37 +1626,5 @@ const struct device_s d_virtex_edif = {
|
|||
*
|
||||
* Revision 1.9 2001/09/16 01:48:16 steve
|
||||
* Suppor the PAD attribute on signals.
|
||||
*
|
||||
* Revision 1.8 2001/09/15 18:27:04 steve
|
||||
* Make configure detect malloc.h
|
||||
*
|
||||
* Revision 1.7 2001/09/15 05:06:04 steve
|
||||
* Support != in virtex code generator.
|
||||
*
|
||||
* Revision 1.6 2001/09/14 04:17:20 steve
|
||||
* Add XOR and XNOR gates.
|
||||
*
|
||||
* Revision 1.5 2001/09/12 04:35:25 steve
|
||||
* Xilinx uses GROUND and VCC as pin names for the
|
||||
* GND and VCC devices.
|
||||
*
|
||||
* Connect the top end of the EQ chain to the MUXCY
|
||||
* instead of to the LUT. The MUXCY has the real output.
|
||||
*
|
||||
* Revision 1.4 2001/09/11 05:52:31 steve
|
||||
* Use carry mux to implement wide identity compare,
|
||||
* Place property item in correct place in LUT cell list.
|
||||
*
|
||||
* Revision 1.3 2001/09/10 03:48:34 steve
|
||||
* Add 4 wide identity compare.
|
||||
*
|
||||
* Revision 1.2 2001/09/09 22:23:28 steve
|
||||
* Virtex support for mux devices and adders
|
||||
* with carry chains. Also, make Virtex specific
|
||||
* implementations of primitive logic.
|
||||
*
|
||||
* Revision 1.1 2001/09/06 04:28:40 steve
|
||||
* Separate the virtex and generic-edif code generators.
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: device.h,v 1.9 2002/08/12 01:35:02 steve Exp $"
|
||||
#ident "$Id: device.h,v 1.10 2002/10/28 02:05:56 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include <ivl_target.h>
|
||||
|
|
@ -50,10 +50,15 @@ struct device_s {
|
|||
/* These methods show various comparators */
|
||||
void (*show_cmp_eq)(ivl_lpm_t net);
|
||||
void (*show_cmp_ne)(ivl_lpm_t net);
|
||||
void (*show_cmp_ge)(ivl_lpm_t net);
|
||||
/* This method draws MUX devices */
|
||||
void (*show_mux)(ivl_lpm_t net);
|
||||
/* This method draws ADD devices */
|
||||
void (*show_add)(ivl_lpm_t net);
|
||||
void (*show_sub)(ivl_lpm_t net);
|
||||
/* These methods draw SHIFT devices */
|
||||
void (*show_shiftl)(ivl_lpm_t net);
|
||||
void (*show_shiftr)(ivl_lpm_t net);
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -68,6 +73,10 @@ extern device_t device_from_arch(const char*arch);
|
|||
|
||||
/*
|
||||
* $Log: device.h,v $
|
||||
* Revision 1.10 2002/10/28 02:05:56 steve
|
||||
* Add Virtex code generators for left shift,
|
||||
* subtraction, and GE comparators.
|
||||
*
|
||||
* Revision 1.9 2002/08/12 01:35:02 steve
|
||||
* conditional ident string using autoconfig.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#ifdef HAVE_CVS_IDENT
|
||||
#ident "$Id: gates.c,v 1.9 2002/08/12 01:35:03 steve Exp $"
|
||||
#ident "$Id: gates.c,v 1.10 2002/10/28 02:05:56 steve Exp $"
|
||||
#endif
|
||||
|
||||
# include <ivl_target.h>
|
||||
|
|
@ -42,6 +42,15 @@ static void show_gate_lpm(ivl_lpm_t net)
|
|||
device->show_add(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_SUB:
|
||||
if (device->show_sub == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_SUB not supported"
|
||||
" by this target.\n");
|
||||
return;
|
||||
}
|
||||
device->show_sub(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_CMP_EQ:
|
||||
if (device->show_cmp_eq == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_CMP_EQ not supported"
|
||||
|
|
@ -60,6 +69,15 @@ static void show_gate_lpm(ivl_lpm_t net)
|
|||
device->show_cmp_ne(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_CMP_GE:
|
||||
if (device->show_cmp_ge == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_CMP_GE not supported"
|
||||
" by this target.\n");
|
||||
return;
|
||||
}
|
||||
device->show_cmp_ge(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_FF:
|
||||
if (device->show_dff == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_FF not supported"
|
||||
|
|
@ -78,6 +96,24 @@ static void show_gate_lpm(ivl_lpm_t net)
|
|||
device->show_mux(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_SHIFTL:
|
||||
if (device->show_shiftl == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_SHIFTL not supported"
|
||||
" by this target.\n");
|
||||
return;
|
||||
}
|
||||
device->show_shiftl(net);
|
||||
break;
|
||||
|
||||
case IVL_LPM_SHIFTR:
|
||||
if (device->show_shiftr == 0) {
|
||||
fprintf(stderr, "fpga.tgt: IVL_LPM_SHIFTR not supported"
|
||||
" by this target.\n");
|
||||
return;
|
||||
}
|
||||
device->show_shiftr(net);
|
||||
break;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "fpga.tgt: unknown LPM type %u\n",
|
||||
ivl_lpm_type(net));
|
||||
|
|
@ -100,6 +136,10 @@ int show_scope_gates(ivl_scope_t net, void*x)
|
|||
|
||||
/*
|
||||
* $Log: gates.c,v $
|
||||
* Revision 1.10 2002/10/28 02:05:56 steve
|
||||
* Add Virtex code generators for left shift,
|
||||
* subtraction, and GE comparators.
|
||||
*
|
||||
* Revision 1.9 2002/08/12 01:35:03 steve
|
||||
* conditional ident string using autoconfig.
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue