Add specific BUFZ functor.

This commit is contained in:
steve 2004-12-31 05:56:36 +00:00
parent b1b93f860c
commit 8bfc75d1ee
2 changed files with 48 additions and 5 deletions

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: logic.cc,v 1.15 2004/12/29 23:45:13 steve Exp $"
#ident "$Id: logic.cc,v 1.16 2004/12/31 05:56:36 steve Exp $"
#endif
# include "logic.h"
@ -88,6 +88,28 @@ vvp_fun_buf::~vvp_fun_buf()
}
void vvp_fun_buf::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
{
if (ptr.port() != 0)
return;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1) {
if (bit.value(idx) == BIT4_Z)
bit.set_bit(idx, BIT4_X);
}
vvp_send_vec4(ptr.ptr()->out, bit);
}
vvp_fun_bufz::vvp_fun_bufz()
{
count_functors_table += 1;
}
vvp_fun_bufz::~vvp_fun_bufz()
{
}
void vvp_fun_bufz::recv_vec4(vvp_net_ptr_t ptr, vvp_vector4_t bit)
{
if (ptr.port() != 0)
return;
@ -123,7 +145,7 @@ void compile_functor(char*label, char*type,
obj = new vvp_bufif_s(false,false, ostr0, ostr1);
#endif
} else if (strcmp(type, "BUFZ") == 0) {
obj = new table_functor_s(ft_BUFZ);
obj = new vvp_fun_bufz();
#if 0
} else if (strcmp(type, "PMOS") == 0) {
obj = new vvp_pmos_s;
@ -191,6 +213,9 @@ void compile_functor(char*label, char*type,
/*
* $Log: logic.cc,v $
* Revision 1.16 2004/12/31 05:56:36 steve
* Add specific BUFZ functor.
*
* Revision 1.15 2004/12/29 23:45:13 steve
* Add the part concatenation node (.concat).
*

View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: logic.h,v 1.9 2004/12/29 23:45:13 steve Exp $"
#ident "$Id: logic.h,v 1.10 2004/12/31 05:56:36 steve Exp $"
#endif
# include "vvp_net.h"
@ -48,8 +48,8 @@ class table_functor_s: public vvp_net_fun_t {
/*
* The buffer functor is a very primitive functor that takes the input
* from port-0 (and only port-0) and retransmits it as a vvp_vector4_t.
* This is intended to model the Verilog buf(Q,D) statement. This
* device should be useful for removing strength from vectors.
* The retransmitted vector has all Z values changed to X, just like
* the buf(Q,D) gate in Verilog.
*/
class vvp_fun_buf: public vvp_net_fun_t {
@ -62,6 +62,21 @@ class vvp_fun_buf: public vvp_net_fun_t {
private:
};
/*
* The vvp_fun_bufz is like the vvp_fun_buf, but it does not change
* Z values to X -- it passes Z values unchanged.
*/
class vvp_fun_bufz: public vvp_net_fun_t {
public:
explicit vvp_fun_bufz();
virtual ~vvp_fun_bufz();
void recv_vec4(vvp_net_ptr_t p, vvp_vector4_t bit);
private:
};
// table functor types
extern const unsigned char ft_AND[];
@ -86,6 +101,9 @@ extern const unsigned char ft_var[];
/*
* $Log: logic.h,v $
* Revision 1.10 2004/12/31 05:56:36 steve
* Add specific BUFZ functor.
*
* Revision 1.9 2004/12/29 23:45:13 steve
* Add the part concatenation node (.concat).
*