verilator/test_regress/t
Geza Lore d84af81a11
Optimize Dfg with relaxed live variable analysis (#7739)
Relax the live variable analysis performed by Dfg to bail on fewer
cases. This analysis was already conservative (meaning it might think
variables are live when they are not), which is good enough for Dfg use.
This change in particular enables synthesizing more complex logic
involving arrays, e.g. those introduce by V3Table creating lookup
tables.
2026-06-10 15:59:44 +01:00
..
t_config_libmap
t_dist_attributes
t_flag_relinc_dir Verilog format 2026-02-22 13:50:01 -05:00
t_hier_block_cmake
t_hier_block_import Verilog format 2026-05-13 21:00:34 -04:00
t_preproc_resolve Verilog format 2026-02-22 13:50:01 -05:00
t_sv_bus_mux_demux
t_sv_cpu_code
t_trace_hier_sub Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
tsub
uvm Fix uvm_hdl_release_and_read not reading release value or checking for success (#7425) 2026-04-19 08:24:07 -04:00
.gitattributes
TestCheck.h
TestSimulator.h
TestVpi.h
TestVpiMain.cpp Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
coverage_common.py Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
coverage_covergroup_common.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_EXAMPLE.py
t_EXAMPLE.v
t_a1_first_cc.py
t_a1_first_cc.v Verilog format 2026-03-03 07:21:24 -05:00
t_a2_first_sc.py
t_a3_selftest.py
t_a3_selftest_thread.py
t_a6_examples.py
t_alias_cyclic_bad.out
t_alias_cyclic_bad.py
t_alias_cyclic_bad.v
t_alias_force.py
t_alias_force.v
t_alias_hier_ref_bad.out
t_alias_hier_ref_bad.py
t_alias_hier_ref_bad.v
t_alias_ports_unsup.out
t_alias_ports_unsup.py
t_alias_ports_unsup.v
t_alias_simple.py
t_alias_simple.v
t_alias_sub_select.py
t_alias_sub_select.v
t_alias_transitive.py
t_alias_transitive.v
t_alias_tristate_unsup.out
t_alias_tristate_unsup.py
t_alias_tristate_unsup.v
t_alias_unsup.out
t_alias_unsup.py
t_alias_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_alias_var_bad.out
t_alias_var_bad.py
t_alias_var_bad.v
t_alias_width_bad.out
t_alias_width_bad.py
t_alias_width_bad.v
t_altera_lpm.v Verilog format 2026-06-07 21:55:43 -04:00
t_altera_lpm_abs.py
t_altera_lpm_add_sub.py
t_altera_lpm_and.py
t_altera_lpm_bustri.py
t_altera_lpm_bustri_noinl.py Apply 'make format' 2026-02-09 03:48:11 +00:00
t_altera_lpm_clshift.py
t_altera_lpm_compare.py
t_altera_lpm_constant.py
t_altera_lpm_counter.py
t_altera_lpm_decode.py
t_altera_lpm_divide.py
t_altera_lpm_ff.py
t_altera_lpm_fifo.py
t_altera_lpm_fifo_dc.py
t_altera_lpm_inv.py
t_altera_lpm_latch.py
t_altera_lpm_mult.py
t_altera_lpm_mult_noinl.py
t_altera_lpm_mux.py
t_altera_lpm_or.py
t_altera_lpm_ram_dp.py
t_altera_lpm_ram_dq.py
t_altera_lpm_ram_io.py
t_altera_lpm_rom.py
t_altera_lpm_shiftreg.py
t_altera_lpm_xor.py
t_always_chg_first.py
t_always_chg_first.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_combdly.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_combdly.v Verilog format 2026-05-13 21:00:34 -04:00
t_always_dly.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_dly.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_ff_never.py
t_always_ff_never.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_noreorder.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_nosplit.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_nosplit.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_reorder.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_reorder.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_reorder_inlined_func.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_reorder_inlined_func.v Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_reorder_no_acycsimp.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_sen_compare.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_sen_compare.v Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_split.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_split.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_split_cond.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_split_cond.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_split_rst.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_split_rst.v Verilog format 2026-02-24 04:15:26 -05:00
t_always_splitord.py Tests: Rename t_always tests 2026-02-24 04:11:39 -05:00
t_always_splitord.v Verilog format 2026-02-24 04:15:26 -05:00
t_array_backw_index_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_backw_index_bad.py
t_array_backw_index_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_compare.py
t_array_compare.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_event.py Fix associative array of events causes C++ compile error (#6962). 2026-01-29 20:38:50 -05:00
t_array_event.v Fix associative array of events causes C++ compile error (#6962). 2026-01-29 20:38:50 -05:00
t_array_in_struct.py
t_array_in_struct.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_index_increment.py
t_array_index_increment.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_index_side.py
t_array_index_side.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_list_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_list_bad.py
t_array_list_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_mda.py
t_array_mda.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_method.py
t_array_method.v Support array map() method (#7307) (#7316) 2026-03-24 02:38:50 -07:00
t_array_method_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_method_bad.py
t_array_method_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_non_blocking_loop.py
t_array_non_blocking_loop.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_packed_endian.py
t_array_packed_endian.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_packed_sign.py
t_array_packed_sign.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_packed_sysfunct.py
t_array_packed_sysfunct.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_packed_write_read.py
t_array_packed_write_read.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_2d.py
t_array_pattern_2d.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad.py
t_array_pattern_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad2.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad2.py
t_array_pattern_bad2.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad3.out Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_bad3.py
t_array_pattern_bad3.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_concat.py Fix array pattern concatenation (#7401) (#7402) 2026-05-17 09:49:32 -04:00
t_array_pattern_concat.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_array_pattern_default_recursive.py Fix recursive default assignment for subarrays (#4589) (#7202) 2026-03-05 16:05:54 -05:00
t_array_pattern_default_recursive.v Fix recursive default assignment for subarrays (#4589) (#7202) 2026-03-05 16:05:54 -05:00
t_array_pattern_enum.py
t_array_pattern_enum.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_packed.py
t_array_pattern_packed.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_pattern_scalar_bad.out Commentary: Fix non-grammar 2026-03-11 19:53:23 -04:00
t_array_pattern_scalar_bad.py
t_array_pattern_scalar_bad.v
t_array_pattern_side_effect.py Apply 'make format' 2026-04-15 12:11:06 +00:00
t_array_pattern_side_effect.v Fix side-effect loss when slicing array expressions (#7427) (#7429) 2026-04-15 08:10:11 -04:00
t_array_pattern_unpacked.py
t_array_pattern_unpacked.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_query.py
t_array_query.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_query_with.py
t_array_query_with.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_rev.py
t_array_rev.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_sel_short.py Fix errant integer promotion (#7012) 2026-02-28 09:52:35 -05:00
t_array_sel_short.v Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
t_array_sel_wide.py
t_array_sel_wide.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_type_methods.py
t_array_type_methods.v Verilog format 2026-03-03 07:21:24 -05:00
t_array_unpacked_public.py
t_array_unpacked_public.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_always_unsup.out Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_assert_always_unsup.py
t_assert_always_unsup.v Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_assert_assert.py
t_assert_assert.v
t_assert_bang_in_seq.py Fix regression rejecting boolean `!x` inside sequence expressions (#7549) (#7551) 2026-05-08 18:34:28 -04:00
t_assert_bang_in_seq.v Fix regression rejecting boolean `!x` inside sequence expressions (#7549) (#7551) 2026-05-08 18:34:28 -04:00
t_assert_basic.py
t_assert_basic.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_basic_cover.py
t_assert_basic_fail.py
t_assert_basic_off.py
t_assert_casez.py
t_assert_casez.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_clock_event_unsup.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_clock_event_unsup.py
t_assert_clock_event_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_comp.out
t_assert_comp.py
t_assert_comp.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_comp_bad.out
t_assert_comp_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_assert_comp_bad.v
t_assert_consec_rep.py Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_consec_rep.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_consec_rep_bad.out Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_consec_rep_bad.py Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_consec_rep_bad.v Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_consec_rep_large.py Fix internal error on consecutive repetition with N > 256 (#7552) (#7603) 2026-05-17 21:54:10 -04:00
t_assert_consec_rep_large.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_assert_consec_rep_unroll_limit_bad.out Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_assert_consec_rep_unroll_limit_bad.py Fix internal error on consecutive repetition with N > 256 (#7552) (#7603) 2026-05-17 21:54:10 -04:00
t_assert_consec_rep_unroll_limit_bad.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_assert_consec_rep_unsup.out Commentary: Changes update 2026-04-21 00:33:40 -04:00
t_assert_consec_rep_unsup.py Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_consec_rep_unsup.v Commentary: Changes update 2026-04-21 00:33:40 -04:00
t_assert_cover.py
t_assert_cover.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_cover_off.py
t_assert_ctl_arg.cpp
t_assert_ctl_arg.dat.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_arg.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_arg.py
t_assert_ctl_arg.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_arg_noinl.py
t_assert_ctl_arg_unsup.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_arg_unsup.py
t_assert_ctl_arg_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_concurrent.py
t_assert_ctl_concurrent.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_concurrent_noinl.py
t_assert_ctl_immediate.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_immediate.py
t_assert_ctl_immediate.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_immediate_noinl.py
t_assert_ctl_type_bad.out
t_assert_ctl_type_bad.py
t_assert_ctl_type_bad.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_assert_ctl_unsup.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_ctl_unsup.py
t_assert_ctl_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_disable_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_disable_bad.py
t_assert_disable_bad.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_assert_disable_count.py
t_assert_disable_count.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_disable_iff.py
t_assert_disable_iff.v
t_assert_disabled.py
t_assert_dup_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_dup_bad.py
t_assert_dup_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_elab.py
t_assert_elab.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_elab_bad.py
t_assert_elab_p.out Fix recursive default assignment for subarrays (#4589) (#7202) 2026-03-05 16:05:54 -05:00
t_assert_elab_p.py Tests: Fix t_assert_elab_p.py reruns 2026-02-05 17:42:39 -05:00
t_assert_elab_p.v
t_assert_enabled_bad.py
t_assert_enabled_off.py
t_assert_enabled_on_bad.py
t_assert_future.py
t_assert_future.v
t_assert_future_bad.out
t_assert_future_bad.py
t_assert_future_bad.v
t_assert_future_unsup.out
t_assert_future_unsup.py
t_assert_future_unsup.v
t_assert_goto_rep.py Support SVA goto repetition [->N] in concurrent assertions (#7310) 2026-03-27 10:31:15 -04:00
t_assert_goto_rep.v Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_iff.py
t_assert_iff.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_iff_bad1.py
t_assert_iff_bad2.py
t_assert_iff_clk_unsup.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_iff_clk_unsup.py
t_assert_iff_clk_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_imm_nz_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_imm_nz_bad.py
t_assert_imm_nz_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_implication.py
t_assert_implication.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_implication_bad.py
t_assert_implication_coverage.py
t_assert_implication_coverage.v
t_assert_inside_cond.py
t_assert_inside_cond.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_inside_cond_bad.out
t_assert_inside_cond_bad.py
t_assert_nonconsec_rep.py Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_nonconsec_rep.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_on.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_opt_check.py Optimize runtime assertOn() checks (#7707) 2026-06-03 18:09:49 +01:00
t_assert_opt_check.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_assert_past.py
t_assert_past.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_pre.py
t_assert_pre.v
t_assert_preponed_nba.py Support NBAs in initial blocks with delay/event controls (#7566) (#7600) 2026-05-17 07:34:29 -04:00
t_assert_preponed_nba.v Support NBAs in initial blocks with delay/event controls (#7566) (#7600) 2026-05-17 07:34:29 -04:00
t_assert_procedural.py * Support procedural concurrent assertion simple cases (#6944). 2026-03-05 20:03:48 -05:00
t_assert_procedural.v * Support procedural concurrent assertion simple cases (#6944). 2026-03-05 20:03:48 -05:00
t_assert_procedural_clk_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_procedural_clk_bad.py
t_assert_procedural_clk_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_procedural_gated.py Support procedural concurrent assertions with inferred clock (#7581) 2026-05-13 07:42:28 -04:00
t_assert_procedural_gated.v Support procedural concurrent assertions with inferred clock (#7581) 2026-05-13 07:42:28 -04:00
t_assert_property_stop_bad.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_assert_property_stop_bad.py Fix lost `$stop` on implied assertion `$error` failures. 2026-03-28 10:57:59 -04:00
t_assert_property_stop_bad.v Fix lost `$stop` on implied assertion `$error` failures. 2026-03-28 10:57:59 -04:00
t_assert_property_unsized.py Fix width of unsized literal in property expression (#7668) 2026-05-28 15:10:25 -04:00
t_assert_property_unsized.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_assert_question.py
t_assert_question.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_rep_bad_count.out Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_rep_bad_count.py Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_rep_bad_count.v Support nonconsecutive repetition [=N] in sequence expressions (#7397) 2026-04-09 18:28:28 -04:00
t_assert_rep_range_bad.out Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_bad.py Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_bad.v Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_unsup.out Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_unsup.py Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_unsup.v Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_zero_min_unsup.out Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_zero_min_unsup.py Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_rep_range_zero_min_unsup.v Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_assert_sampled.py
t_assert_sampled.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth.py
t_assert_synth.v Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_full.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_full.py
t_assert_synth_full.vlt
t_assert_synth_full_vlt.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_full_vlt.py
t_assert_synth_off.py
t_assert_synth_parallel.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_parallel.py
t_assert_synth_parallel.vlt Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_parallel_vlt.out Verilog format 2026-03-03 07:21:24 -05:00
t_assert_synth_parallel_vlt.py
t_assert_unique_case.out
t_assert_unique_case.py
t_assert_unique_case_bad.out
t_assert_unique_case_bad.py
t_assert_unique_case_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assign_automatic_bad.out
t_assign_automatic_bad.py
t_assign_automatic_bad.v
t_assign_cont_automatic_bad.out Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_assign_cont_automatic_bad.py
t_assign_cont_automatic_bad.v
t_assign_deassign_concat.py Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_assign_deassign_concat.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_assign_dff.py Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_assign_dff.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_assign_expr.py
t_assign_expr.v Fix side effect internal error (#7519) (#7540) (#7544) 2026-05-07 09:21:04 -04:00
t_assign_func.py Tests: Add t_assign_func 2026-02-24 04:17:42 -05:00
t_assign_func.v Tests: Add t_assign_func 2026-02-24 04:17:42 -05:00
t_assign_inline.py
t_assign_inline.v Verilog format 2026-03-03 07:21:24 -05:00
t_assign_pattern_cmp.py Support assignment patterns as comparison operands (#7269) 2026-03-17 19:36:54 +01:00
t_assign_pattern_cmp.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_assign_slice_overflow.py
t_assign_slice_overflow.v Verilog format 2026-03-03 07:21:24 -05:00
t_assign_slice_overflow_ox.py
t_assigndly_deep_ref.py
t_assigndly_deep_ref.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_assigndly_deep_ref_array.py
t_assigndly_deep_ref_array.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_assigndly_dynamic.py
t_assigndly_dynamic.v Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
t_assigndly_dynamic_delay.py
t_assigndly_dynamic_nofork.py
t_assigndly_dynamic_notiming_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assigndly_dynamic_notiming_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_assigndly_dynamic_notiming_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assigndly_task.py
t_assigndly_task.v Verilog format 2026-03-03 07:21:24 -05:00
t_assignment_compatibility_bad.out Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assignment_compatibility_bad.py Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assignment_compatibility_bad.v Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assignment_pin_bad.out Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assignment_pin_bad.py Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assignment_pin_bad.v Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_assoc.py
t_assoc.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc2.py
t_assoc2.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_compare.py
t_assoc_compare.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_default_func.py
t_assoc_default_func.v
t_assoc_enum.py
t_assoc_enum.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_method.py
t_assoc_method.v Support assoc array methods with wide value types (#7680) 2026-06-10 09:39:43 -04:00
t_assoc_method_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_method_bad.py
t_assoc_method_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_nokey_bad.out Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_assoc_nokey_bad.py
t_assoc_nokey_bad.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_assoc_ref_type.py
t_assoc_ref_type.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_unsup.out Support assoc array methods with wide value types (#7680) 2026-06-10 09:39:43 -04:00
t_assoc_unsup.py Support assoc array methods with wide value types (#7680) 2026-06-10 09:39:43 -04:00
t_assoc_unsup.v Support assoc array methods with wide value types (#7680) 2026-06-10 09:39:43 -04:00
t_assoc_wildcard.py
t_assoc_wildcard.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_wildcard_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_wildcard_bad.py
t_assoc_wildcard_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_assoc_wildcard_method.py
t_assoc_wildcard_method.v Support map() method for associative and wildcard arrays (#7344) 2026-03-29 04:00:52 -04:00
t_attr.py
t_attr.v
t_attr_parenstar.py
t_attr_parenstar.v Verilog format 2026-03-03 07:21:24 -05:00
t_benchmark_mux4k.py
t_benchmark_mux4k.v Verilog format 2026-03-03 07:21:24 -05:00
t_benchmark_mux4k_onecpu.py
t_benchmark_sim.py
t_bind.py
t_bind.v Verilog format 2026-03-03 07:21:24 -05:00
t_bind2.py
t_bind2.v Verilog format 2026-03-03 07:21:24 -05:00
t_bind_nfound.py
t_bind_nfound.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_2d_slice.py
t_bitsel_2d_slice.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_concat.py
t_bitsel_concat.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_const_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_const_bad.py
t_bitsel_const_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_enum.py
t_bitsel_enum.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_lvalue.py
t_bitsel_lvalue.v
t_bitsel_over32.py
t_bitsel_over32.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_slice.py
t_bitsel_slice.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_struct.py
t_bitsel_struct.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_struct2.py
t_bitsel_struct2.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_struct3.py
t_bitsel_struct3.v Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_wire_array_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_bitsel_wire_array_bad.py
t_bitsel_wire_array_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_blocking.py
t_blocking.v Verilog format 2026-03-03 07:21:24 -05:00
t_c_this.py
t_c_this.v Verilog format 2026-03-03 07:21:24 -05:00
t_c_width_bad.out
t_c_width_bad.py
t_c_width_bad.v
t_case_66bits.py
t_case_66bits.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_66bits_no_const_eager.py
t_case_66bits_noexpand.py
t_case_auto1.py
t_case_auto1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_call_count.py
t_case_call_count.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_deep.py
t_case_deep.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_default_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_default_bad.py
t_case_default_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_dupitems.py
t_case_dupitems.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_complete.py
t_case_enum_complete.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_complete_wildcard.py
t_case_enum_complete_wildcard.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_emptyish.py
t_case_enum_emptyish.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_incomplete_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_incomplete_bad.py
t_case_enum_incomplete_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_incomplete_wildcard_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_enum_incomplete_wildcard_bad.py
t_case_enum_incomplete_wildcard_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_genx_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_case_genx_bad.py
t_case_genx_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_case_group.py
t_case_group.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_huge.py Optimize Dfg with relaxed live variable analysis (#7739) 2026-06-10 15:59:44 +01:00
t_case_huge.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_huge_nocase.py
t_case_huge_noopt.py
t_case_huge_sub.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_huge_sub2.v
t_case_huge_sub3.v
t_case_huge_sub4.v
t_case_incrdecr.py
t_case_incrdecr.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_case_inside.py
t_case_inside.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_inside_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_inside_bad.py
t_case_inside_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_inside_call_count.py
t_case_inside_call_count.v Verilog format 2026-05-13 21:00:34 -04:00
t_case_itemwidth.py
t_case_itemwidth.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_nest.py
t_case_nest.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_onehot.py
t_case_onehot.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_orig.py
t_case_orig.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_overlap_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_overlap_bad.py
t_case_overlap_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_reducer.py
t_case_reducer.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_string.py
t_case_string.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_string2.py
t_case_string2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_unique_many.py
t_case_unique_many.v
t_case_unique_overlap.py
t_case_unique_overlap.v
t_case_wild.py
t_case_wild.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_write1.out
t_case_write1.py
t_case_write1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_write1_noexpand.py
t_case_write1_tasks.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_write2.out
t_case_write2.py
t_case_write2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_write2_tasks.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_x.py
t_case_x.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_x_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_x_bad.py
t_case_x_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_zx_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_case_zx_bad.py
t_case_zx_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast.py
t_cast.v Verilog format 2026-03-03 07:21:24 -05:00
t_cast_class.py
t_cast_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_class_incompat_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_class_incompat_bad.py
t_cast_class_incompat_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_param_logic.py
t_cast_param_logic.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_param_type.py
t_cast_param_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_signed.py
t_cast_signed.v Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_cast_size_bad.out Improve too-small cast warning to show size 2026-04-12 18:12:41 -04:00
t_cast_size_bad.py
t_cast_size_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_stream.py
t_cast_stream.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cast_string.py Fix string cast on array call 2026-03-04 20:12:10 -05:00
t_cast_string.v Fix string cast on array call 2026-03-04 20:12:10 -05:00
t_cast_types.py
t_cast_types.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_castdyn.py
t_castdyn.v
t_castdyn_bbox.py
t_castdyn_castconst_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_castdyn_castconst_bad.py
t_castdyn_castconst_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_castdyn_enum.py
t_castdyn_enum.v Verilog format 2026-03-03 07:21:24 -05:00
t_castdyn_run_bad.out
t_castdyn_run_bad.py
t_castdyn_run_bad.v
t_castdyn_unsup_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_castdyn_unsup_bad.py
t_castdyn_unsup_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_ccache_report.py
t_ccache_report__ccache_report_initial.out
t_ccache_report__ccache_report_rebuild.out
t_checker.py
t_checker.v Verilog format 2026-03-03 07:21:24 -05:00
t_checker_top.py
t_checker_top.v
t_checker_unsup.out Verilog format 2026-03-03 07:21:24 -05:00
t_checker_unsup.py
t_checker_unsup.v Verilog format 2026-03-03 07:21:24 -05:00
t_class1.out
t_class1.py
t_class1.v Verilog format 2026-03-03 07:21:24 -05:00
t_class2.py
t_class2.v Verilog format 2026-03-03 07:21:24 -05:00
t_class_assign_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_class_assign_bad.py
t_class_assign_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_assign_cond.py
t_class_assign_cond.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_assign_cond_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_class_assign_cond_bad.py
t_class_assign_cond_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_builtin_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_class_builtin_bad.py
t_class_builtin_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_class_capitalization.py
t_class_capitalization.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_class.py
t_class_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_class_extends.py
t_class_class_extends.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_compare.py
t_class_compare.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_const.py
t_class_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_copy.py
t_class_copy.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_copy2.py
t_class_copy2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_copy_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_copy_bad.py
t_class_copy_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_dead_varscope_uaf.py
t_class_dead_varscope_uaf.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_default_type_param.py Fix resolving default/nondefault type parameters (#7171) (#7346) 2026-04-02 10:51:11 -04:00
t_class_default_type_param.v Commentary: Changes update 2026-04-03 20:16:23 -04:00
t_class_defaultparam_import.py
t_class_defaultparam_import.v
t_class_defaultparams.py
t_class_defaultparams.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_defaultparams_debug.py Fix t_class_param type invalid array access (#7615 repair) (#7653) (#7693) 2026-06-02 09:01:05 -04:00
t_class_diamond.py
t_class_diamond.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_dict.py
t_class_dict.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_dyn_cast_empty_if.py
t_class_dyn_cast_empty_if.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_enum.py
t_class_enum.v Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527) 2026-06-03 14:55:00 -04:00
t_class_eq.py
t_class_eq.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends.py
t_class_extends.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends1.py
t_class_extends1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends2.py
t_class_extends2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_alias.py Fix extending class by a typedef (#6679) (#6855) 2026-02-21 11:13:22 +05:30
t_class_extends_alias.v
t_class_extends_aliased_real_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_aliased_real_bad.py
t_class_extends_aliased_real_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_arg.py
t_class_extends_arg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_arg_super_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_arg_super_bad.py
t_class_extends_arg_super_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_bad.out
t_class_extends_bad.py
t_class_extends_bad.v
t_class_extends_colon.py
t_class_extends_colon.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_default.out
t_class_extends_default.py
t_class_extends_default.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_dot.py
t_class_extends_dot.v
t_class_extends_int_param_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_int_param_bad.py
t_class_extends_int_param_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_nf_bad.out
t_class_extends_nf_bad.py
t_class_extends_nf_bad.v
t_class_extends_param.py
t_class_extends_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_param_unused.py
t_class_extends_param_unused.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_pkg_bad.out
t_class_extends_pkg_bad.py
t_class_extends_pkg_bad.v
t_class_extends_protect_ids.py
t_class_extends_rec_bad.out
t_class_extends_rec_bad.py
t_class_extends_rec_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_this.py
t_class_extends_this.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_this3.py
t_class_extends_this3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extends_this_protect_ids.py
t_class_extends_vsyment.py
t_class_extends_vsyment.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extern.py
t_class_extern.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_extern2.py
t_class_extern2.v
t_class_extern_args.py
t_class_extern_args_bad.out
t_class_extern_args_bad.py
t_class_extern_args_bad.v
t_class_extern_bad.out
t_class_extern_bad.py
t_class_extern_bad.v
t_class_extern_mis2_bad.out Fix internal error instead of missing prototype error (#7485). [Alex Solomatnikov] 2026-04-28 17:59:18 -04:00
t_class_extern_mis2_bad.py Fix internal error instead of missing prototype error (#7485). [Alex Solomatnikov] 2026-04-28 17:59:18 -04:00
t_class_extern_mis2_bad.v Fix internal error instead of missing prototype error (#7485). [Alex Solomatnikov] 2026-04-28 17:59:18 -04:00
t_class_extern_typeref.py
t_class_extern_typeref.v
t_class_field_name.py
t_class_field_name.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_format.out Fix circular class reference %p-printing causing infinite recursion (#7106). 2026-02-19 20:15:37 -05:00
t_class_format.py
t_class_format.v Fix function locals in display %p 2026-02-26 18:12:12 -05:00
t_class_forward.py
t_class_forward.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_func_arg_unused.py
t_class_func_arg_unused.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_func_dot.py
t_class_func_dot.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_func_nvoid_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_func_nvoid_bad.py
t_class_func_nvoid_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_func_static_bad.out
t_class_func_static_bad.py
t_class_func_static_bad.v
t_class_fwd_cc.py
t_class_fwd_cc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_hier_construction.py
t_class_hier_construction.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_if_assign.py
t_class_if_assign.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_imp2.py
t_class_imp2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_inc.py
t_class_inc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_init_order.py Fix class initial-automatic insertion order (#7086 repair) 2026-02-25 19:01:19 -05:00
t_class_init_order.v Fix class initial-automatic insertion order (#7086 repair) 2026-02-25 19:01:19 -05:00
t_class_link_delay.py
t_class_link_delay.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_link_delay2.py
t_class_link_delay2.v
t_class_local.py
t_class_local.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_local_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_local_bad.py
t_class_local_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_local_nested_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_local_nested_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_class_local_nested_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_local_protect_ids.py
t_class_local_typedef_bad.out
t_class_local_typedef_bad.py
t_class_local_typedef_bad.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_class_localparam_dotref.py Fix class::localparam during elaboration (#7524) (#7534) 2026-05-06 11:46:33 -04:00
t_class_localparam_dotref.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_class_localparam_dotref_bad.out Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_class_localparam_dotref_bad.py Fix class::localparam during elaboration (#7524) (#7534) 2026-05-06 11:46:33 -04:00
t_class_localparam_dotref_bad.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_class_localparam_dotref_funcref_arg_bad.out Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_class_localparam_dotref_funcref_arg_bad.py Fix class::localparam during elaboration (#7524) (#7534) 2026-05-06 11:46:33 -04:00
t_class_localparam_dotref_funcref_arg_bad.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_class_lparam_chain.py Fix for access to parameters via class::localparam (#7609) (#7671) 2026-05-28 17:40:18 -04:00
t_class_lparam_chain.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_class_member_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_bad.py
t_class_member_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_bad2.py
t_class_member_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_sens.py
t_class_member_sens.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_var_virt_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_member_var_virt_bad.py
t_class_member_var_virt_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_membersel_int.py
t_class_membersel_int.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_method.py
t_class_method.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_method_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_method_bad.py
t_class_method_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_method_str_literal.py
t_class_method_str_literal.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_method_struct.py
t_class_method_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_mispure_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_mispure_bad.py
t_class_mispure_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_misstatic_bad.out
t_class_misstatic_bad.py
t_class_misstatic_bad.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_mod_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_mod_bad.py
t_class_mod_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_modscope.py
t_class_modscope.v
t_class_module.py
t_class_module.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_name.py
t_class_name.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_nested.py
t_class_nested.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_class_nested_link.py
t_class_nested_link.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new.py
t_class_new.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_bad.py
t_class_new_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_base_call.py Fix super constructor calls with local variables, by using init functions (#6214) (#6933) 2026-03-04 17:55:55 -05:00
t_class_new_base_call.v Fix super constructor calls with local variables, by using init functions (#6214) (#6933) 2026-03-04 17:55:55 -05:00
t_class_new_copy_null_bad.out Fix new <obj> shallow copy not preserving polymorphic runtime type (#7105) (#7109) 2026-02-22 09:22:37 -05:00
t_class_new_copy_null_bad.py Fix new <obj> shallow copy not preserving polymorphic runtime type (#7105) (#7109) 2026-02-22 09:22:37 -05:00
t_class_new_copy_null_bad.v Verilog format 2026-02-22 13:50:01 -05:00
t_class_new_copy_polymorphism.py Fix new <obj> shallow copy not preserving polymorphic runtime type (#7105) (#7109) 2026-02-22 09:22:37 -05:00
t_class_new_copy_polymorphism.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_class_new_default.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_default.py
t_class_new_default.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_noparen.py
t_class_new_noparen.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_ref_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_ref_bad.py
t_class_new_ref_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_return.py
t_class_new_return.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_scoped.py
t_class_new_scoped.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_class_new_scoped_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_scoped_bad.py
t_class_new_scoped_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_supernfirst_bad.out
t_class_new_supernfirst_bad.py
t_class_new_supernfirst_bad.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_new_this.py
t_class_new_this.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_new_typed.py
t_class_new_typed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_null_bad.out
t_class_null_bad.py
t_class_null_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_null_struct.py
t_class_null_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_override.py
t_class_override.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_override_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_override_bad.py
t_class_override_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_package.py
t_class_package.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_packed.py
t_class_packed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param.py
t_class_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_bad1.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_bad1.py
t_class_param_bad1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_bad2.py
t_class_param_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_bad_paren.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_class_param_bad_paren.py
t_class_param_bad_paren.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_class_param_circ_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_circ_bad.py
t_class_param_circ_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_comma_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_comma_bad.py
t_class_param_comma_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_comparator.py Fix for elaboration hang (#7385 repair) #7398 (#7406) 2026-04-10 11:03:14 -04:00
t_class_param_comparator.v Commentary: Changes update 2026-04-11 17:47:39 -04:00
t_class_param_enum.py
t_class_param_enum.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_enum_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_class_param_enum_bad.py
t_class_param_enum_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_extends.py
t_class_param_extends.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_extends2.py
t_class_param_extends2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_extends3.py
t_class_param_extends3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_extends_static_func.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_class_param_extends_static_func.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_class_param_extends_static_member_function_access.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_class_param_extends_static_member_function_access.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_class_param_extra_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_extra_bad.py
t_class_param_extra_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_func_return.py
t_class_param_func_return.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_lvalue.py
t_class_param_lvalue.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_mailbox.py
t_class_param_mailbox.v
t_class_param_mod.py
t_class_param_mod.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_module_typedef.py Fix nested parameterized class typedef chain (#7538) 2026-05-19 14:12:24 -04:00
t_class_param_module_typedef.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_class_param_nconst_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_nconst_bad.py
t_class_param_nconst_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_nested_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_nested_bad.py
t_class_param_nested_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_nested_typedef.py Fix nested parameterized class typedef chain (#7538) 2026-05-19 14:12:24 -04:00
t_class_param_nested_typedef.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_class_param_noinit.py
t_class_param_noinit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_noinit_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_noinit_bad.py
t_class_param_noinit_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_override_local_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_override_local_bad.py
t_class_param_override_local_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_pkg.py
t_class_param_pkg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_rewrite.py
t_class_param_rewrite.v
t_class_param_static.py
t_class_param_static.v
t_class_param_subtype.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_subtype2.py
t_class_param_subtype2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_subtype_bad_paren.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_subtype_bad_paren.py
t_class_param_subtype_constsim.py
t_class_param_super.py
t_class_param_super.v
t_class_param_type.py
t_class_param_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_typedef.py
t_class_param_typedef.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_typedef2.py
t_class_param_typedef2.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_param_typedef3.py
t_class_param_typedef3.v
t_class_param_typedef4.py
t_class_param_typedef4.v
t_class_param_typedef5.py
t_class_param_typedef5.v
t_class_param_typedef6.py
t_class_param_typedef6.v
t_class_param_typedef8.py Fix typedef scope resolution for parameterized class aliases (#5977) (#7319) 2026-03-24 17:25:40 -07:00
t_class_param_typedef8.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_class_param_typedef_extends.py Fix for Returning an object of the wrong type from a static function of a parameterized class (#5479) (#7387) 2026-04-11 07:49:45 -04:00
t_class_param_typedef_extends.v Commentary: Changes update 2026-04-11 17:47:39 -04:00
t_class_param_unused_default.py
t_class_param_unused_default.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_upcast.py
t_class_param_upcast.v
t_class_param_virtual_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_param_virtual_bad.py
t_class_param_virtual_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_ref_as_arg_cast.py
t_class_ref_as_arg_cast.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_ref_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_ref_bad.py
t_class_ref_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_ref_ref.py
t_class_ref_ref.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_reference_name_colision.py
t_class_reference_name_colision.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_scope_import_bad.out
t_class_scope_import_bad.py
t_class_scope_import_bad.v
t_class_short_circuit.py
t_class_short_circuit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_split.py
t_class_split.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static.py
t_class_static.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_after_cg.py
t_class_static_after_cg.v
t_class_static_default_arg.py
t_class_static_default_arg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_member.py
t_class_static_member.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_member_bad.out
t_class_static_member_bad.py
t_class_static_member_bad.v
t_class_static_member_pkg.py
t_class_static_member_pkg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_member_sel.py
t_class_static_member_sel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_method.py
t_class_static_method.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_static_method_protect_ids.py
t_class_static_order.py
t_class_static_order.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_bad.py
t_class_super_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_bad2.py
t_class_super_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_bad3.out
t_class_super_bad3.py
t_class_super_bad3.v
t_class_super_new.py
t_class_super_new.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_new2.py
t_class_super_new2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_new3.py
t_class_super_new3.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_class_super_new_bad_nfirst.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_new_bad_nfirst.py
t_class_super_new_bad_nfirst.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_super_new_noextend_bad.out
t_class_super_new_noextend_bad.py
t_class_super_new_noextend_bad.v
t_class_this_constructor.py
t_class_this_constructor.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_this_super.py
t_class_this_super.v
t_class_to_basic_assignment_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_class_to_basic_assignment_bad.py
t_class_to_basic_assignment_bad.v
t_class_trigger_null.py
t_class_trigger_null.v
t_class_type_param_upcast.py Fix for unction argument expects a class refetence (#7483) (#7489) 2026-04-24 10:31:57 +02:00
t_class_type_param_upcast.v Fix for unction argument expects a class refetence (#7483) (#7489) 2026-04-24 10:31:57 +02:00
t_class_type_param_upcast_all.py Fix for unction argument expects a class refetence (#7483) (#7489) 2026-04-24 10:31:57 +02:00
t_class_type_param_upcast_all.v Verilog format 2026-05-13 21:00:34 -04:00
t_class_type_param_upcast_chain.py Fix for unction argument expects a class refetence (#7483) (#7489) 2026-04-24 10:31:57 +02:00
t_class_type_param_upcast_chain.v Fix for unction argument expects a class refetence (#7483) (#7489) 2026-04-24 10:31:57 +02:00
t_class_typedef.py
t_class_typedef.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_unsup_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_unsup_bad.py
t_class_unsup_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_uses_this.py
t_class_uses_this.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_uses_this_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_uses_this_bad.py
t_class_uses_this_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual.py
t_class_virtual.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual_bad.py
t_class_virtual_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual_chain_ctor.py
t_class_virtual_chain_ctor.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual_extends_pure.py Apply 'make format' 2026-04-10 16:18:06 +00:00
t_class_virtual_extends_pure.v Fix virtual class inheritance (#7403) (#7405) 2026-04-10 12:17:06 -04:00
t_class_virtual_protect_ids.py
t_class_virtual_pure.py
t_class_virtual_pure.v
t_class_virtual_pure_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_virtual_pure_bad.py
t_class_virtual_pure_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_vparam.py
t_class_vparam.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_class_wide.py
t_class_wide.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_2in.cpp
t_clk_2in.py
t_clk_2in.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_2in_vec.py
t_clk_concat.py
t_clk_concat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat.vlt
t_clk_concat2.py
t_clk_concat2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat3.py
t_clk_concat3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat4.py
t_clk_concat4.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat5.py
t_clk_concat5.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat6.py
t_clk_concat6.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_concat_vlt.py
t_clk_condflop.py
t_clk_condflop.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_dpulse.py
t_clk_dpulse.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_dsp.py
t_clk_dsp.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_first.py
t_clk_first.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_first_bad.out Verilog format 2026-06-07 21:55:43 -04:00
t_clk_first_bad.py
t_clk_first_deprecated.py
t_clk_first_deprecated.v Verilog format 2026-06-07 21:55:43 -04:00
t_clk_gate_ext.py
t_clk_gate_ext.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_gated_1.py
t_clk_gated_1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_gater.py
t_clk_gater.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_gen.py
t_clk_gen.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_inp_init.cpp
t_clk_inp_init.py
t_clk_inp_init.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_latch.py
t_clk_latch.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_latch_edgestyle.py
t_clk_latchgate.py
t_clk_latchgate.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_powerdn.py
t_clk_powerdn.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_scope_bad.py
t_clk_scope_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_vecgen1.py
t_clk_vecgen1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clk_vecgen2.py
t_clk_vecgen3.py
t_clocked_release_combo.py
t_clocked_release_combo.v Verilog format 2026-03-03 07:21:24 -05:00
t_clocker.out
t_clocker.py
t_clocker.v Verilog format 2026-03-03 07:21:24 -05:00
t_clocking_bad1.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad1.py
t_clocking_bad1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad2.py
t_clocking_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad3.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad3.py
t_clocking_bad3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad4.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad4.py
t_clocking_bad4.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad5.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_bad5.py
t_clocking_bad5.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_concat.py
t_clocking_concat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_empty_block.py
t_clocking_empty_block.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_event_sense.py Fix events in observed region (#7546) 2026-05-07 17:02:41 -04:00
t_clocking_event_sense.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_clocking_iff_class.py Apply 'make format' 2026-05-27 07:26:42 +00:00
t_clocking_iff_class.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_clocking_inout.py
t_clocking_inout.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_input_0_delay.py
t_clocking_input_0_delay.v
t_clocking_input_default.py
t_clocking_input_default.v
t_clocking_notiming.out Verilog format 2026-05-13 21:00:34 -04:00
t_clocking_notiming.py
t_clocking_notiming.v Verilog format 2026-05-13 21:00:34 -04:00
t_clocking_out_on_change.py
t_clocking_out_on_change.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_clocking_react.py
t_clocking_react.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_sampled_unpacked.py Fix clocking-block sample of unpacked array (#7612) (#7613) 2026-05-18 21:40:54 -04:00
t_clocking_sampled_unpacked.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_clocking_sched.out
t_clocking_sched.py
t_clocking_sched.v
t_clocking_sched_timing.out
t_clocking_sched_timing.py
t_clocking_sched_timing_forkproc.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_clocking_sched_timing_forkproc.py
t_clocking_timing.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_timing1.py
t_clocking_timing2.py
t_clocking_unsup1.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_unsup1.py
t_clocking_unsup1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_unsup2.py Support `##0` cycle delays (#4263) (#7298) 2026-03-20 18:29:20 -04:00
t_clocking_unsup2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_virtual.py
t_clocking_virtual.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_clocking_xref.py
t_clocking_xref.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_clocking_zero_delay.py Support `##0` cycle delays (#4263) (#7298) 2026-03-20 18:29:20 -04:00
t_clocking_zero_delay.v Commentary: Changes update 2026-03-21 10:56:13 -04:00
t_clocking_zero_delay_bad.out Support `##0` cycle delays (#4263) (#7298) 2026-03-20 18:29:20 -04:00
t_clocking_zero_delay_bad.py Support `##0` cycle delays (#4263) (#7298) 2026-03-20 18:29:20 -04:00
t_clocking_zero_delay_bad.v Support `##0` cycle delays (#4263) (#7298) 2026-03-20 18:29:20 -04:00
t_comb_do_not_convert_to.py
t_comb_do_not_convert_to.v Verilog format 2026-03-03 07:21:24 -05:00
t_comb_input_0.cpp
t_comb_input_0.py
t_comb_input_0.v Verilog format 2026-03-03 07:21:24 -05:00
t_comb_input_1.cpp
t_comb_input_1.py
t_comb_input_1.v Verilog format 2026-03-03 07:21:24 -05:00
t_comb_input_2.cpp
t_comb_input_2.py
t_comb_input_2.v Verilog format 2026-03-03 07:21:24 -05:00
t_comb_loop_through_unpacked_array.py
t_comb_loop_through_unpacked_array.v Verilog format 2026-03-03 07:21:24 -05:00
t_compiler_include.cpp
t_compiler_include.h
t_compiler_include.py
t_compiler_include.v Verilog format 2026-03-03 07:21:24 -05:00
t_compiler_include_dpi.cpp
t_compiler_include_dpi.h
t_compiler_include_dpi.py
t_compiler_include_dpi.v Verilog format 2026-03-03 07:21:24 -05:00
t_compiler_include_dpi_split.py
t_compiler_include_split.py
t_concat_casts.py
t_concat_casts.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_impure.py
t_concat_impure.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_init_array_functions.py
t_concat_init_array_functions.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_concat_large.py Add --max-replication option (#7139) 2026-02-23 16:51:37 -05:00
t_concat_large.v Verilog format 2026-02-24 21:03:32 -05:00
t_concat_large_bad.out Verilog format 2026-02-24 21:03:32 -05:00
t_concat_large_bad.py
t_concat_large_bad.v Verilog format 2026-02-24 21:03:32 -05:00
t_concat_large_flag.py Add --max-replication option (#7139) 2026-02-23 16:51:37 -05:00
t_concat_large_flag_zero.py Add --max-replication option (#7139) 2026-02-23 16:51:37 -05:00
t_concat_link_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_concat_link_bad.py
t_concat_link_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_opt.py
t_concat_opt.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_or.py
t_concat_or.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_sel.py
t_concat_sel.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_string.py
t_concat_string.v Verilog format 2026-03-03 07:21:24 -05:00
t_concat_unpack.py
t_concat_unpack.v Verilog format 2026-03-03 07:21:24 -05:00
t_config_default.out
t_config_default.py
t_config_default.v
t_config_hier.out
t_config_hier.py
t_config_hier.v
t_config_include_bad.out
t_config_include_bad.py
t_config_include_bad.v
t_config_inst.out
t_config_inst.py
t_config_inst.v
t_config_inst_missing.out
t_config_inst_missing.py
t_config_inst_missing.v
t_config_liblist.out
t_config_liblist.py
t_config_liblist.v
t_config_libmap.out
t_config_libmap.py
t_config_libmap.v
t_config_libmap_inc.map
t_config_libmap_inc.out
t_config_libmap_inc.py
t_config_libmap_inc.v
t_config_multitop.py
t_config_multitop.v
t_config_param.out
t_config_param.py
t_config_param.v
t_config_rules.py
t_config_rules.v
t_config_rules_sub.v
t_config_top.py
t_config_top.v
t_config_top2.py
t_config_top2.v
t_config_work.map
t_config_work.out
t_config_work.py
t_config_work.v
t_config_work__liba.v
t_config_work__libb.v
t_const.py
t_const.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_const_bad.py
t_const_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_bitoptree_bug3096.cpp
t_const_bitoptree_bug3096.py
t_const_bitoptree_bug3096.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_dec_mixed_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_const_dec_mixed_bad.py
t_const_dec_mixed_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_handle.py Fix modification of members of object with const handle (#7433) 2026-04-16 09:43:12 -04:00
t_const_handle.v Fix modification of members of object with const handle (#7433) 2026-04-16 09:43:12 -04:00
t_const_handle_bad.out Fix modification of members of object with const handle (#7433) 2026-04-16 09:43:12 -04:00
t_const_handle_bad.py Fix modification of members of object with const handle (#7433) 2026-04-16 09:43:12 -04:00
t_const_handle_bad.v Fix modification of members of object with const handle (#7433) 2026-04-16 09:43:12 -04:00
t_const_hi.py
t_const_hi.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_number_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_const_number_bad.py
t_const_number_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_number_unsized.py
t_const_number_unsized.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_number_unsized_parse.py
t_const_number_v_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_const_number_v_bad.py
t_const_number_v_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_op_red_scope.py
t_const_op_red_scope.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_overflow_bad.out Verilog format 2026-03-03 07:21:24 -05:00
t_const_overflow_bad.py
t_const_overflow_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_sel_sel_extend.py
t_const_sel_sel_extend.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_slicesel.py
t_const_slicesel.v Verilog format 2026-03-03 07:21:24 -05:00
t_const_slicesel_bad.out
t_const_slicesel_bad.py
t_const_slicesel_bad.v
t_const_string_func.py
t_const_string_func.v Verilog format 2026-03-03 07:21:24 -05:00
t_constraint.py
t_constraint.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_array_index.py Support constraint `with` item.index array reduction (#7198) 2026-03-06 05:14:55 -05:00
t_constraint_array_index.v Tests: Verilog format 2026-03-07 08:00:45 -05:00
t_constraint_array_index_simple.py Support constraint `with` item.index array reduction (#7198) 2026-03-06 05:14:55 -05:00
t_constraint_array_index_simple.v Tests: Verilog format 2026-03-07 08:00:45 -05:00
t_constraint_array_limit.out Fix string cast on array call 2026-03-04 20:12:10 -05:00
t_constraint_array_limit.py Support array reduction methods with 'with' clause in constraints (#6455) (#6999) 2026-03-04 12:01:35 -05:00
t_constraint_array_limit.v Verilog format 2026-03-04 20:12:10 -05:00
t_constraint_array_reduction_inherit.py Fix array reduction in constraints crashing with class inheritance (#7226) (#7263) 2026-03-16 16:36:48 -04:00
t_constraint_array_reduction_inherit.v Fix array reduction in constraints crashing with class inheritance (#7226) (#7263) 2026-03-16 16:36:48 -04:00
t_constraint_array_sum_with.py Support array reduction methods with 'with' clause in constraints (#6455) (#6999) 2026-03-04 12:01:35 -05:00
t_constraint_array_sum_with.v Verilog format 2026-03-04 20:12:10 -05:00
t_constraint_assoc_arr_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_assoc_arr_bad.py
t_constraint_assoc_arr_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_assoc_arr_basic.py
t_constraint_assoc_arr_basic.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_assoc_arr_others.py
t_constraint_assoc_arr_others.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_assoc_arr_wide.py
t_constraint_assoc_arr_wide.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_before_randc_bad.out Fix constraint 'with' in parameter classes (#7375) 2026-04-04 21:03:44 -04:00
t_constraint_before_randc_bad.py
t_constraint_before_randc_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_cls_arr_member.py Support constraints on fixed-size array of class object members (#7170) (#7183) 2026-03-03 06:27:31 -05:00
t_constraint_cls_arr_member.v Verilog format 2026-03-03 07:21:24 -05:00
t_constraint_cond.py Fix conditional expressions in constraints (#7087) 2026-02-17 11:40:15 -05:00
t_constraint_cond.v Verilog format 2026-02-22 13:50:01 -05:00
t_constraint_countbits_unsup.out Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_countbits_unsup.py Support System Functions in Constraint Blocks (#7028) (#7036) 2026-02-11 05:19:25 -08:00
t_constraint_countbits_unsup.v Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_countones.py
t_constraint_countones.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_constraint_disable_soft_bad.out Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_disable_soft_bad.py Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_disable_soft_bad.v Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_dist.py
t_constraint_dist.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_dist_randc_bad.out Fix constraint 'with' in parameter classes (#7375) 2026-04-04 21:03:44 -04:00
t_constraint_dist_randc_bad.py
t_constraint_dist_randc_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_dist_weight.py Support constraint imperfect distributions (#6811) (#7168) 2026-03-03 11:23:14 -05:00
t_constraint_dist_weight.v Support constraint imperfect distributions (#6811) (#7168) 2026-03-03 11:23:14 -05:00
t_constraint_dyn_array_reduction.py Support array reduction methods without 'with' clause in constraints for dynamic arrays (#7104) (#7108) 2026-02-22 09:23:02 -05:00
t_constraint_dyn_array_reduction.v Verilog format 2026-02-22 13:50:01 -05:00
t_constraint_dyn_queue_basic.py
t_constraint_dyn_queue_basic.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_dyn_size_inline.py Support dynamic array .size in inline randomize() with constraints (#7258) (#7266) 2026-03-16 18:48:36 -04:00
t_constraint_dyn_size_inline.v Support dynamic array .size in inline randomize() with constraints (#7258) (#7266) 2026-03-16 18:48:36 -04:00
t_constraint_extern.py
t_constraint_extern.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_extern_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_extern_bad.py
t_constraint_extern_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_foreach.py
t_constraint_foreach.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_foreach_classref.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_constraint_foreach_classref.v Fix inline constraint on array-indexed randomize target (#7431) (#7434) 2026-04-16 11:02:22 -04:00
t_constraint_func_call.py Support function calls with random arguments in constraints (#7061) (#7083) 2026-02-19 15:37:55 +05:30
t_constraint_func_call.v Verilog format 2026-02-22 13:50:01 -05:00
t_constraint_func_call_root_varref.py Fix function-in-constraint internal error on bare port VarRef return (#7473) (#7480) 2026-04-23 10:47:39 -04:00
t_constraint_func_call_root_varref.v Commentary: Changes update 2026-04-23 12:47:22 -04:00
t_constraint_func_call_unsup.out Verilog format 2026-02-22 13:50:01 -05:00
t_constraint_func_call_unsup.py Support function calls with random arguments in constraints (#7061) (#7083) 2026-02-19 15:37:55 +05:30
t_constraint_func_call_unsup.v Verilog format 2026-02-22 13:50:01 -05:00
t_constraint_global_arr_unsup.out Support constraints on fixed-size array of class object members (#7170) (#7183) 2026-03-03 06:27:31 -05:00
t_constraint_global_arr_unsup.py
t_constraint_global_arr_unsup.v Support constraints on fixed-size array of class object members (#7170) (#7183) 2026-03-03 06:27:31 -05:00
t_constraint_global_nested.py
t_constraint_global_nested.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_global_nested_member.py
t_constraint_global_nested_member.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_global_nested_randmode.py Fix rand_mode() on nested object variables causes Z3 solver error (#7031) (#7034) 2026-02-10 13:59:09 -05:00
t_constraint_global_nested_randmode.v Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_global_randMode.py
t_constraint_global_randMode.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_global_randmode_subobj.py Fix subclass with rand_mode(0) getting randomized (#7376) (#7383) 2026-04-14 16:47:24 -04:00
t_constraint_global_randmode_subobj.v Fix subclass with rand_mode(0) getting randomized (#7376) (#7383) 2026-04-14 16:47:24 -04:00
t_constraint_global_random.py
t_constraint_global_random.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_global_random_simple.py
t_constraint_global_random_simple.v
t_constraint_implication_else_bad.out Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_implication_else_bad.py Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_implication_else_bad.v Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_implication_set.py Support implication operator with constraint_set (#7300) (#7448) 2026-04-23 10:50:23 +02:00
t_constraint_implication_set.v Commentary: Changes update 2026-04-23 12:47:22 -04:00
t_constraint_inheritance.py
t_constraint_inheritance.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_constraint_inheritance_with.py
t_constraint_inheritance_with.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_constraint_inside_typedef_array.py Fix std::randomize inside {typedef array} internal error (#7481) 2026-04-23 11:16:24 -04:00
t_constraint_inside_typedef_array.v Commentary: Changes update 2026-04-23 12:47:22 -04:00
t_constraint_json_only.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_constraint_json_only.py
t_constraint_json_only.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_method_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_method_bad.py
t_constraint_method_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_mode.py
t_constraint_mode.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_constraint_mode_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_mode_bad.py
t_constraint_mode_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_mode_ctor.py Fix constraint_mode()/rand_mode() in constructor being overwritten by init code (#7054) 2026-02-11 09:32:08 -08:00
t_constraint_mode_ctor.v Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_mode_static.py Support constraint_mode() on static constraints (#7027) (#7038) 2026-02-10 13:58:35 -05:00
t_constraint_mode_static.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_constraint_nested_class.py Fix non-member identifiers used inside constraints (#7033) 2026-02-11 05:18:24 -08:00
t_constraint_nested_class.v Internals: Fix marking `AstVar`s as class members (#7070) 2026-02-13 07:45:13 -05:00
t_constraint_non_base2_pow_unsup.out Support 2**n expressions in constraint randomization (#7422) 2026-04-14 07:17:53 -04:00
t_constraint_non_base2_pow_unsup.py Support 2**n expressions in constraint randomization (#7422) 2026-04-14 07:17:53 -04:00
t_constraint_non_base2_pow_unsup.v Support 2**n expressions in constraint randomization (#7422) 2026-04-14 07:17:53 -04:00
t_constraint_non_const_exp_pow_unsup.out Verilog format 2026-02-16 23:21:53 -05:00
t_constraint_non_const_exp_pow_unsup.py Support power expressions with constant exponent in constraints (#7073) 2026-02-16 06:01:24 -05:00
t_constraint_non_const_exp_pow_unsup.v Verilog format 2026-02-16 23:21:53 -05:00
t_constraint_nosolver_bad.py
t_constraint_operators.py
t_constraint_operators.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_pure.py
t_constraint_pure.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_pure_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_pure_missing_bad.py
t_constraint_pure_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_pure_nonabs_bad.out Verilog format 2026-06-07 21:55:43 -04:00
t_constraint_pure_nonabs_bad.py
t_constraint_pure_nonabs_bad.v Verilog format 2026-06-07 21:55:43 -04:00
t_constraint_rand_array_index.py Fix rand variable used as array index in constraint evaluated as constant (#7238) (#7247) 2026-03-12 10:12:53 -04:00
t_constraint_rand_array_index.v Fix rand variable used as array index in constraint evaluated as constant (#7238) (#7247) 2026-03-12 10:12:53 -04:00
t_constraint_shift_width.py Fix shift width mismatch in constraint solver SMT emission (#5420) (#7265) 2026-03-16 18:48:09 -04:00
t_constraint_shift_width.v Commentary: Changes update 2026-03-16 22:21:51 -04:00
t_constraint_soft_randc_bad.out Fix constraint 'with' in parameter classes (#7375) 2026-04-04 21:03:44 -04:00
t_constraint_soft_randc_bad.py
t_constraint_soft_randc_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_solve_before.py Support solve..before constraints (#5647) (#7123) 2026-02-22 11:33:18 -05:00
t_constraint_solve_before.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_constraint_solver_log.py Add `+verilator+solver+file` (#7242). 2026-04-04 17:26:43 -04:00
t_constraint_solver_log.v Add `+verilator+solver+file` (#7242). 2026-04-04 17:26:43 -04:00
t_constraint_state.py
t_constraint_state.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_constraint_struct.py
t_constraint_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_struct_complex.py
t_constraint_struct_complex.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_sysfunc.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_constraint_sysfunc.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_constraint_unpacked_array.py
t_constraint_unpacked_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_constraint_unq_arr_derived.py Fix unique constraint in derived class (#7022) 2026-02-09 09:56:38 -05:00
t_constraint_unq_arr_derived.v Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_unq_arr_derived_inline_unsup.out Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_unq_arr_derived_inline_unsup.py Fix unique constraint in derived class (#7022) 2026-02-09 09:56:38 -05:00
t_constraint_unq_arr_derived_inline_unsup.v Verilog format 2026-02-12 18:23:56 -05:00
t_constraint_unsat.out Fix soft constraint relaxation dropping compatible constraints (#7271) 2026-03-18 10:15:50 +01:00
t_constraint_unsat.py
t_constraint_unsat.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_constraint_unsat_nowarn.out
t_constraint_unsat_nowarn.py
t_constraint_unsat_protect_ids.out Fix soft constraint relaxation dropping compatible constraints (#7271) 2026-03-18 10:15:50 +01:00
t_constraint_unsat_protect_ids.py
t_constraint_unsup.out Support power expressions with constant exponent in constraints (#7073) 2026-02-16 06:01:24 -05:00
t_constraint_unsup.py
t_constraint_unsup.v Support power expressions with constant exponent in constraints (#7073) 2026-02-16 06:01:24 -05:00
t_constraint_unsup_unq_arr.out
t_constraint_unsup_unq_arr.py
t_constraint_unsup_unq_arr.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_coroutine_lambda.py Fix lambda coroutines (#6106) (#7135) 2026-02-28 09:52:02 -05:00
t_coroutine_lambda.v Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
t_cover_assert.py * Support procedural concurrent assertion simple cases (#6944). 2026-03-05 20:03:48 -05:00
t_cover_assert.v Tests: Cleanup t_cover_assert 2026-02-17 08:47:43 -05:00
t_cover_const_compare.py
t_cover_const_compare.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_expr.out Support expression coverage on assign statements (#7543) 2026-05-13 13:59:29 -04:00
t_cover_expr.py
t_cover_expr.v Support expression coverage on assign statements (#7543) 2026-05-13 13:59:29 -04:00
t_cover_expr_array_class.py
t_cover_expr_array_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_expr_associative_array_class.py
t_cover_expr_associative_array_class.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_cover_expr_dyn_array_class.py
t_cover_expr_dyn_array_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_expr_max.out Support expression coverage on assign statements (#7543) 2026-05-13 13:59:29 -04:00
t_cover_expr_max.py
t_cover_expr_queue_class.py
t_cover_expr_queue_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_expr_trace.out Support expression coverage on assign statements (#7543) 2026-05-13 13:59:29 -04:00
t_cover_expr_trace.py
t_cover_fsm_basic.out Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_cover_fsm_basic.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_basic.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_cover_fsm_beginif.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_beginif.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_cover_fsm_beginif.v Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_cover_fsm_case_next_ok_multi.out Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_case_next_ok_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_case_next_ok_multi.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_case_next_ok_multi_incl.out Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_combo_same_warn_bad.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_combo_same_warn_bad.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_combo_same_warn_bad.v Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_decldump.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_flag_off.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_cover_fsm_flag_off.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_cover_fsm_graphdump.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_if_unknown_enum_multi_bad.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_if_unknown_enum_multi_bad.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_if_unknown_enum_multi_bad.v Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_negative_extract.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_negative_extract.py Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_cover_fsm_negative_extract.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_nextstate_overwrite_warn.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_nextstate_overwrite_warn.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_nextstate_overwrite_warn.v Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_nonenum_literal.py Improve FSM Detection when state variables are non-enums (#7529) 2026-05-07 06:53:19 -04:00
t_cover_fsm_nonenum_literal.v Improve FSM Detection when state variables are non-enums (#7529) 2026-05-07 06:53:19 -04:00
t_cover_fsm_nonenum_unsupported_bad.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_nonenum_unsupported_bad.py Improve FSM Detection when state variables are non-enums (#7529) 2026-05-07 06:53:19 -04:00
t_cover_fsm_nonenum_unsupported_bad.v Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_noreset.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_noreset.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_cover_fsm_noreset.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_plain_always_ignore_multi.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_plain_always_ignore_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_plain_always_ignore_multi.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_plain_always_warn_multi_bad.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_plain_always_warn_multi_bad.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_plain_always_warn_multi_bad.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_plain_always_zerohit_multi.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_plain_always_zerohit_multi.py Apply 'make format' 2026-04-30 11:23:36 +00:00
t_cover_fsm_plain_always_zerohit_multi.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_policy_accept_multi.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_policy_accept_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_policy_accept_multi.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_cover_fsm_reset.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_reset.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_reset.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_reset_incl.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_reset_multi.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_reset_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_reset_multi.v Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_transition_shapes_multi.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_transition_shapes_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_transition_shapes_multi.v Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_two_proc_multi.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_two_proc_multi.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_fsm_two_proc_multi.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_cover_fsm_wide_sparse.out Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_wide_sparse.py Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_fsm_wide_sparse.v Extend FSM Detect to support 'Wide State Encodings' (#7573) 2026-05-13 06:59:22 -04:00
t_cover_hier.cpp Fix hierarchical coverage counts for duplicate no-inline module instances (#7649) 2026-05-24 11:42:42 -04:00
t_cover_hier.out Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_hier.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_hier_inline.py Apply 'make format' 2026-05-24 15:43:38 +00:00
t_cover_hier_noinline.py Apply 'make format' 2026-05-24 15:43:38 +00:00
t_cover_lib.py
t_cover_lib.v
t_cover_lib__1.out
t_cover_lib__1_per_instance.out
t_cover_lib__2.out
t_cover_lib__3.out
t_cover_lib__4.out
t_cover_lib_c.cpp
t_cover_lib_legacy.py
t_cover_line.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_line.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_line.vlt
t_cover_line_cc.info.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_cover_line_cc.py
t_cover_line_cc_vlt.py
t_cover_line_expr.out Support expression coverage on assign statements (#7543) 2026-05-13 13:59:29 -04:00
t_cover_line_expr_cc.py
t_cover_line_sc.py
t_cover_line_trace.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_line_trace.py Enable V3LiftExpr with code coverage (#7164) 2026-03-01 15:04:49 +00:00
t_cover_line_tri_gate_cond.py
t_cover_line_wide_ternary.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_line_wide_ternary.py
t_cover_line_wide_ternary.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_main.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_main.py
t_cover_main.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_otherdecl_dump.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_cover_per_instance.dat.out Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_per_instance.out Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_per_instance.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_per_instance_inline.py Tests: Update tests to include parameterized modules (#7655) 2026-05-25 17:46:54 -04:00
t_cover_per_instance_noinline.py Tests: Update tests to include parameterized modules (#7655) 2026-05-25 17:46:54 -04:00
t_cover_per_instance_user.out Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_per_instance_user.py Apply 'make format' 2026-05-24 22:09:56 +00:00
t_cover_per_instance_user.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_cover_sva_notflat.py
t_cover_sva_notflat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_sva_trace.out
t_cover_sva_trace.py
t_cover_sys_line_expr.out Add coverage type information to verilator_coverage annotation output (#7131) (#7133). 2026-02-24 20:59:42 -05:00
t_cover_sys_line_expr.py
t_cover_sys_line_expr.v
t_cover_sys_unsup.out
t_cover_sys_unsup.py
t_cover_sys_unsup.v
t_cover_toggle.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_toggle.py
t_cover_toggle.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_toggle__all.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_toggle__points.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_cover_toggle_min.info.out
t_cover_toggle_min.py
t_cover_toggle_min.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_toggle_underscore.py
t_cover_toggle_width.py
t_cover_trace_always.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_trace_always.py
t_cover_trace_always.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_unused_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_cover_unused_bad.py
t_cover_unused_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_covergroup_args.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_args.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_args.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_array_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_array_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_array_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_auto_bin_max.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_bin_max.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_bin_max.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_auto_bin_max_bad.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_auto_bin_max_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_bin_max_bad.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_auto_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_auto_sample_timing.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_auto_sample_timing.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_autobins_bad.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_autobins_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_autobins_bad.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_bin_counts.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_bin_counts.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_bin_counts.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_clocked_sample.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_clocked_sample.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_clocked_sample.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_coverpoint_method_unsup.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_coverpoint_method_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_coverpoint_method_unsup.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_cross.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_cross.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_cross.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_cross_opt_unsup.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_cross_opt_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_cross_opt_unsup.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_default_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_default_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_default_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_embedded_unsup.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_embedded_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_embedded_unsup.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_empty.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_empty.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_empty.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_func_override_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_func_override_bad.py
t_covergroup_func_override_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_iff.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_iff.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_iff.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_ignore_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_ignore_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_ignore_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_illegal_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_illegal_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_illegal_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_in_class_duplicate_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_in_class_duplicate_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_covergroup_in_class_duplicate_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_in_class_namespace.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_in_class_namespace.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_in_class_namespace.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_member_event_unsup.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_member_event_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_member_event_unsup.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_negative_ranges.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_negative_ranges.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_negative_ranges.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_new_override_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_new_override_bad.py
t_covergroup_new_override_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_option_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option_unsup.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_option_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_option_unsup.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_param_bins.out Fix parameter values in coverage bins widths (#7732) (#7734) 2026-06-07 20:47:43 -04:00
t_covergroup_param_bins.py Fix parameter values in coverage bins widths (#7732) (#7734) 2026-06-07 20:47:43 -04:00
t_covergroup_param_bins.v Fix parameter values in coverage bins widths (#7732) (#7734) 2026-06-07 20:47:43 -04:00
t_covergroup_static_coverage.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_static_coverage.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_static_coverage.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_trans.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_trans.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_trans.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_trans_errors_bad.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_trans_errors_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_trans_errors_bad.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_trans_restart.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_trans_restart.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_trans_restart.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_undef_field_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_undef_field_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_undef_field_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup_ign.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup_ign.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup_ign2.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_unsup_ign2.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_wildcard_bins.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_wildcard_bins.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_wildcard_bins.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_covergroup_with_function_foo_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_function_foo_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_covergroup_with_function_foo_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_sample_args_too_few_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_sample_args_too_few_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_covergroup_with_sample_args_too_few_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_sample_args_too_many_bad.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_sample_args_too_many_bad.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_covergroup_with_sample_args_too_many_bad.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_cpure.py
t_cpure.v
t_cuse_forward.py
t_cuse_forward.v Verilog format 2026-03-03 07:21:24 -05:00
t_debug_emitv.out Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_debug_emitv.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_debug_emitv.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_debug_emitv_addrids.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_debug_exit_elab.py
t_debug_exit_parse.py
t_debug_fatalsrc_bad.py
t_debug_fatalsrc_bt_bad.py
t_debug_gate.py
t_debug_gate.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_debug_graph_test.py
t_debug_graph_test.v
t_debug_inputs.py Fix --debug-inputs for .vlt files 2026-03-07 08:01:27 -05:00
t_debug_inputs.v
t_debug_inputs.vlt Fix --debug-inputs for .vlt files 2026-03-07 08:01:27 -05:00
t_debug_inputs_a.v
t_debug_inputs_b.v
t_debug_sigsegv_bad.py
t_debug_sigsegv_bt_bad.py
t_debug_trace.py
t_debug_trace.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_debug_width.out Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_debug_width.py
t_define_override.out
t_define_override.py
t_define_override.v
t_define_override_empty.out
t_define_override_empty.py
t_define_override_output.out
t_define_override_output.py
t_defparam_hier.py Support more than one dot in defparam (#7262) 2026-03-24 09:20:46 -04:00
t_defparam_hier.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_delay.py
t_delay.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_delay_1step.py
t_delay_1step.v
t_delay_compare.py
t_delay_compare.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_delay_incr.py
t_delay_incr.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_delay_incr_timing.py
t_delay_stmtdly_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_delay_stmtdly_bad.py
t_delay_timing.py Tests: Prefer --binary over timing multipliers 2026-05-11 19:50:48 -04:00
t_delay_var.py
t_delay_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_depth_flop.py
t_depth_flop.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_detectarray_1.py
t_detectarray_1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_detectarray_2.py
t_detectarray_2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_detectarray_3.py
t_detectarray_3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_3676.py
t_dfg_3676.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_3679.py
t_dfg_3679.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_3726.py
t_dfg_3726.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_3817.py
t_dfg_3817.v Verilog format 2026-05-13 21:00:34 -04:00
t_dfg_3872.py
t_dfg_3872.v Verilog format 2026-05-13 21:00:34 -04:00
t_dfg_4943.py
t_dfg_4943.v
t_dfg_astrefs.out Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_dfg_astrefs.py Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_dfg_astrefs.v Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_dfg_bin_to_one_hot.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_bin_to_one_hot.v Verilog format 2026-05-13 21:00:34 -04:00
t_dfg_break_cycles.cpp
t_dfg_break_cycles.py Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447) 2026-04-19 20:28:17 +01:00
t_dfg_break_cycles.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_dfg_circular.py
t_dfg_circular.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_circular_merged_scc.py
t_dfg_circular_merged_scc.v
t_dfg_dump_patterns.out Internals: Add special Dfg vertex for replication (#7471) 2026-04-23 10:14:27 +01:00
t_dfg_dump_patterns.py Change Dfg pattern dumps to use --dump-dfg-patterns (#7455) 2026-04-21 12:07:19 +01:00
t_dfg_dump_patterns.v Change Dfg pattern dumps to use --dump-dfg-patterns (#7455) 2026-04-21 12:07:19 +01:00
t_dfg_inline_const_clock.py Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_dfg_inline_const_clock.v Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_dfg_inline_forced.py
t_dfg_inline_forced.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_multidriver_dfg_bad.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_multidriver_dfg_bad.py
t_dfg_multidriver_dfg_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_multidriver_non_dfg.py
t_dfg_multidriver_non_dfg.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_dfg_oob_sel_rvalue.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_oob_sel_rvalue.v
t_dfg_peephole.cpp
t_dfg_peephole.py Internals: Remove 'VlWide::operator bool()' (#7652) 2026-05-24 13:09:31 +01:00
t_dfg_peephole.v Optimize $countones constant in Dfg 2026-06-06 06:11:13 +01:00
t_dfg_peephole_off_all.py
t_dfg_peephole_off_each.py
t_dfg_push_sel.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_push_sel.v Verilog format 2026-02-12 18:23:56 -05:00
t_dfg_push_sel_off.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_regularize_circular.py
t_dfg_regularize_circular.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_regularize_clk.py
t_dfg_regularize_clk.v
t_dfg_regularize_driver_of_sc_var.py
t_dfg_regularize_driver_of_sc_var.v
t_dfg_result_var_ext_write.py
t_dfg_result_var_ext_write.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dfg_synthesis.cpp
t_dfg_synthesis.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_synthesis.v Optimize Dfg with relaxed live variable analysis (#7739) 2026-06-10 15:59:44 +01:00
t_dfg_true_cycle_bad.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_dfg_true_cycle_bad.py
t_dfg_true_cycle_bad.v
t_difftree.a.tree
t_difftree.b.tree
t_difftree.out
t_difftree.py
t_disable.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_bad.out Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_bad.py
t_disable_bad.v
t_disable_empty.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_empty.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_empty_outside.py
t_disable_empty_outside.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_fork1.py
t_disable_fork1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_fork2.py
t_disable_fork2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_fork2_split.py
t_disable_fork3.py
t_disable_fork3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_fork_notiming.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_fork_notiming.py
t_disable_fork_notiming.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_func_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_func_bad.py
t_disable_func_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_genfor2.py
t_disable_genfor2.v
t_disable_genfor_unsup.out
t_disable_genfor_unsup.py
t_disable_genfor_unsup.v
t_disable_iff_multi_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_iff_multi_bad.py
t_disable_iff_multi_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_inside.py
t_disable_inside.v Tests: Update t_disable_inside (#6591) 2026-03-29 20:34:19 -04:00
t_disable_outside.py
t_disable_outside.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_outside2.py
t_disable_outside2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_outside3.py
t_disable_outside3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_outside4.py
t_disable_outside4.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_task_by_name.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_by_name.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_disable_task_join.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_join.v Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_scope_bad.out Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_scope_bad.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_scope_bad.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_disable_task_simple.py
t_disable_task_simple.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_disable_task_target_bad.out Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_target_bad.py Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_task_target_bad.v Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_disable_within_task_unsup.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_disable_within_task_unsup.py
t_disable_within_task_unsup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display.out Fix display of %m in non-first argument (#7574). 2026-05-11 08:18:34 -04:00
t_display.py
t_display.v Fix display of %m in non-first argument (#7574). 2026-05-11 08:18:34 -04:00
t_display_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_bad.py
t_display_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_brace.py
t_display_brace.v
t_display_class.py Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_class.v Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_concat.out
t_display_concat.py
t_display_concat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_concat2.out
t_display_concat2.py
t_display_concat2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_cwide_bad.out Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_cwide_bad.py
t_display_cwide_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_enum_format.py Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527) 2026-06-03 14:55:00 -04:00
t_display_enum_format.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_display_esc_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_esc_bad.py
t_display_esc_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_exprformat_args_bad.out Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_exprformat_args_bad.py Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_exprformat_args_bad.v Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_format_wide_decimal.out
t_display_format_wide_decimal.py
t_display_format_wide_decimal.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_impure.out
t_display_impure.py
t_display_impure.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_io.py
t_display_io.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_l.py
t_display_l.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_mcd.out
t_display_mcd.py
t_display_mcd.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_merge.out
t_display_merge.py
t_display_merge.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_noopt.py
t_display_p_elab.py
t_display_p_elab.v
t_display_qqq.out
t_display_qqq.py
t_display_qqq.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_real.out
t_display_real.py
t_display_real.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_real_noopt.py
t_display_realtime.py
t_display_realtime.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_recurse.out
t_display_recurse.py
t_display_recurse.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_signed.out Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_signed.py
t_display_signed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_signed_noopt.py
t_display_string.out
t_display_string.py
t_display_string.v Verilog format 2026-05-13 21:00:34 -04:00
t_display_string_noopt.py Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_display_time.out
t_display_time.py
t_display_time.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_display_type_bad.out Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_type_bad.py
t_display_type_bad.v Support $sformat with runtime format string (#7212). (#7257) 2026-03-14 22:43:56 -04:00
t_display_wide.out Support very wide $display arguments (#7280) 2026-03-26 13:55:14 -04:00
t_display_wide.py
t_display_wide.v Support very wide $display arguments (#7280) 2026-03-26 13:55:14 -04:00
t_dist_attributes_bad.out
t_dist_attributes_bad.py
t_dist_attributes_include.py
t_dist_attributes_src.py
t_dist_cinclude.py
t_dist_contributors.py
t_dist_copyright.py Support new FST writer API (#6871) (#6992) 2026-05-12 07:39:43 -04:00
t_dist_cppstyle.py Internals: Enforce types on C++ enums. No functional change intended. 2026-05-22 17:59:57 -04:00
t_dist_docs_options.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_dist_docs_style.py
t_dist_docs_warnings.py
t_dist_error_format.py
t_dist_fixme.py
t_dist_getsetorder.py
t_dist_header_cc.py
t_dist_install.py
t_dist_lint_py.py
t_dist_pl.py
t_dist_portability.py
t_dist_untracked.py
t_dist_warn_coverage.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_dist_whitespace.py Tests: Enforce 2-space indents on Verilog 2026-06-07 22:00:24 -04:00
t_do_while.py
t_do_while.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_do_while_continue_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_do_while_continue_bad.py
t_do_while_continue_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_do_while_jumps.py
t_do_while_jumps.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dos.py
t_dos.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dotfiles.py
t_dpi_2exp_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_2exp_bad.py
t_dpi_2exp_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_2exparg_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_2exparg_bad.py
t_dpi_2exparg_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_accessors.cpp
t_dpi_accessors.py
t_dpi_accessors.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_accessors_inc.vh Verilog format 2026-06-07 21:55:43 -04:00
t_dpi_accessors_macros_inc.vh Verilog format 2026-06-07 21:55:43 -04:00
t_dpi_arg_inout_type.cpp
t_dpi_arg_inout_type.out
t_dpi_arg_inout_type.py
t_dpi_arg_inout_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_arg_inout_type__Dpi.out
t_dpi_arg_inout_unpack.cpp
t_dpi_arg_inout_unpack.py
t_dpi_arg_inout_unpack.v Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_dpi_arg_inout_unpack__Dpi.out
t_dpi_arg_input_type.cpp
t_dpi_arg_input_type.out
t_dpi_arg_input_type.py
t_dpi_arg_input_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_arg_input_type__Dpi.out
t_dpi_arg_input_unpack.cpp
t_dpi_arg_input_unpack.py
t_dpi_arg_input_unpack.v Commentary: Fix non-grammar 2026-03-11 19:53:23 -04:00
t_dpi_arg_input_unpack__Dpi.out
t_dpi_arg_output_type.cpp
t_dpi_arg_output_type.out
t_dpi_arg_output_type.py
t_dpi_arg_output_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_arg_output_type__Dpi.out
t_dpi_arg_output_unpack.cpp
t_dpi_arg_output_unpack.py
t_dpi_arg_output_unpack.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_arg_output_unpack__Dpi.out
t_dpi_argtype_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_argtype_bad.py
t_dpi_argtype_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_binary.py
t_dpi_binary.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_binary_c.cpp
t_dpi_binary_c.h
t_dpi_class_param.cpp
t_dpi_class_param.py
t_dpi_class_param.v
t_dpi_context.py
t_dpi_context.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_context_c.cpp
t_dpi_context_noopt.py
t_dpi_display.out
t_dpi_display.py
t_dpi_display.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_display_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_display_bad.py
t_dpi_display_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_display_c.cpp
t_dpi_dup_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_dup_bad.py
t_dpi_dup_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export.py
t_dpi_export.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export_bad.py
t_dpi_export_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export_c.cpp
t_dpi_export_context2_bad.cpp
t_dpi_export_context2_bad.out
t_dpi_export_context2_bad.py
t_dpi_export_context2_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export_context_bad.cpp
t_dpi_export_context_bad.out
t_dpi_export_context_bad.py
t_dpi_export_context_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_export_noopt.py
t_dpi_export_scope_bad.cpp
t_dpi_export_scope_bad.out
t_dpi_export_scope_bad.py
t_dpi_export_scope_bad.v Fix finding single DPI exports from other scopes 2026-02-24 19:06:05 -05:00
t_dpi_export_scope_flat.cpp Fix finding single DPI exports from other scopes 2026-02-24 19:06:05 -05:00
t_dpi_export_scope_flat.py Fix finding single DPI exports from other scopes 2026-02-24 19:06:05 -05:00
t_dpi_export_scope_flat.v Fix finding single DPI exports from other scopes 2026-02-24 19:06:05 -05:00
t_dpi_export_unpack.py Fix dpi export pointers (#7742) (#7751) 2026-06-10 09:38:41 -04:00
t_dpi_export_unpack.v Fix dpi export pointers (#7742) (#7751) 2026-06-10 09:38:41 -04:00
t_dpi_if_cond.py
t_dpi_if_cond.v Verilog format 2026-05-13 21:00:34 -04:00
t_dpi_if_cond_c.cpp
t_dpi_imp_gen.py
t_dpi_imp_gen.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_imp_gen_c.cpp
t_dpi_import.py
t_dpi_import.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_import_c.cpp
t_dpi_import_hdr_only.py
t_dpi_import_mix_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_import_mix_bad.py
t_dpi_import_mix_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_inline_new.cpp
t_dpi_inline_new.py
t_dpi_inline_new.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_dpi_instr_count_large.cpp
t_dpi_instr_count_large.py
t_dpi_instr_count_large.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_instr_count_large_hier.py
t_dpi_lib.py
t_dpi_lib.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_lib_c.cpp
t_dpi_name_bad.out Fix missing quotes on VPI error signal names 2026-03-27 21:44:11 -04:00
t_dpi_name_bad.py
t_dpi_name_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_open.py
t_dpi_open.v Tests: Update t_dpi_open (#7261 test) 2026-03-18 21:01:07 -04:00
t_dpi_open_c.cpp Tests: Update t_dpi_open (#7261 test) 2026-03-18 21:01:07 -04:00
t_dpi_open_elem.py
t_dpi_open_elem.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_open_elem_c.cpp
t_dpi_open_oob_bad.out
t_dpi_open_oob_bad.py
t_dpi_open_oob_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_open_oob_bad_c.cpp
t_dpi_open_query.cpp
t_dpi_open_query.py
t_dpi_open_query.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_open_vecval.py
t_dpi_open_vecval.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_open_vecval_c.cpp
t_dpi_openfirst.py
t_dpi_openfirst.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_openfirst_c.cpp
t_dpi_qw.py
t_dpi_qw.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_qw_c.cpp
t_dpi_result_type.cpp
t_dpi_result_type.out
t_dpi_result_type.py
t_dpi_result_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_result_type__Dpi.out
t_dpi_result_type_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_result_type_bad.py
t_dpi_result_type_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_shortcircuit.py
t_dpi_shortcircuit.v Commentary: Fix non-grammar 2026-03-11 19:53:23 -04:00
t_dpi_shortcircuit2.py
t_dpi_shortcircuit2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_shortcircuit_c.cpp
t_dpi_string.py
t_dpi_string.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_string_c.cpp
t_dpi_sys.py
t_dpi_sys.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_sys_c.cpp
t_dpi_threads.py
t_dpi_threads.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_threads_c.cpp
t_dpi_threads_collide.py
t_dpi_type_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_type_bad.py
t_dpi_type_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_unpack_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_unpack_bad.py
t_dpi_unpack_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_vams.cpp
t_dpi_vams.py
t_dpi_vams.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_var.cpp
t_dpi_var.py
t_dpi_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dpi_var.vlt
t_dpi_var_vlt.py
t_driver_random.py
t_driver_timeout.py
t_dump.v Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_dump_dfg.py
t_dump_inputs_rerun.py
t_dump_json.py Tests: Fix t_dump_json to not need sensitive golden file 2026-03-11 19:58:07 -04:00
t_dump_tree_dot.py
t_dynarray.py
t_dynarray.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_bad.py
t_dynarray_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_bits.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_bits.py
t_dynarray_bits.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_cast_write.py
t_dynarray_cast_write.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_concat.py
t_dynarray_concat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_init.py
t_dynarray_init.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_method.py
t_dynarray_method.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_method_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_method_bad.py
t_dynarray_method_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_multid.py
t_dynarray_multid.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_param.py
t_dynarray_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_dynarray_unpacked.py
t_dynarray_unpacked.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_embed1.py
t_embed1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_embed1_c.cpp
t_embed1_child.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_embed1_wrap.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_emit_accessors.cpp
t_emit_accessors.py
t_emit_accessors.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_emit_constw.py
t_emit_constw.v Verilog format 2026-05-13 21:00:34 -04:00
t_emit_memb_limit.py
t_enum.py
t_enum.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_cell.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_cell.py
t_enum_bad_cell.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_circdecl.out
t_enum_bad_circdecl.py
t_enum_bad_circdecl.v
t_enum_bad_dup.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_dup.py
t_enum_bad_dup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_hide.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_hide.py
t_enum_bad_hide.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_bad_value.out
t_enum_bad_value.py
t_enum_bad_value.v Verilog format 2026-03-03 07:21:24 -05:00
t_enum_bad_wrap.out
t_enum_bad_wrap.py
t_enum_bad_wrap.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_base.py
t_enum_base.v
t_enum_base_bad.out
t_enum_base_bad.py
t_enum_base_bad.v
t_enum_const_methods.py
t_enum_const_methods.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_enumvalue_struct_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_enum_enumvalue_struct_bad.py
t_enum_enumvalue_struct_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_func.py
t_enum_func.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_huge_methods.py
t_enum_huge_methods.v Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527) 2026-06-03 14:55:00 -04:00
t_enum_huge_methods_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_enum_huge_methods_bad.py
t_enum_huge_methods_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_enum_int.py
t_enum_int.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_large_methods.py
t_enum_large_methods.v Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527) 2026-06-03 14:55:00 -04:00
t_enum_name2.py
t_enum_name2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_name3.py
t_enum_name3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_name_sformatf.py
t_enum_name_sformatf.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_overlap_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_overlap_bad.py
t_enum_overlap_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_param_class.py
t_enum_param_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_param_class2.py
t_enum_param_class2.v
t_enum_public.cpp
t_enum_public.py
t_enum_public.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_recurse_bad.out
t_enum_recurse_bad.py
t_enum_recurse_bad.v
t_enum_recurse_bad2.out
t_enum_recurse_bad2.py
t_enum_recurse_bad2.v
t_enum_signed_wrap.py Fix false illegally-wrapped-around error for signed enums whose auto-incremented values cross zero. (#7268) 2026-03-17 19:36:24 +01:00
t_enum_signed_wrap.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_enum_size.py
t_enum_size.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_enum_type_bad.py
t_enum_type_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_methods.py
t_enum_type_methods.v Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527) 2026-06-03 14:55:00 -04:00
t_enum_type_methods_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_methods_bad.py
t_enum_type_methods_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_nomethod_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_nomethod_bad.py
t_enum_type_nomethod_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_type_pins.py
t_enum_type_pins.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_value_assign.py
t_enum_value_assign.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_x_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enum_x_bad.py
t_enum_x_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_enumeration.py
t_enumeration.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_eq_wild.py
t_eq_wild.v Internals: Four state pre-pull (types) (#7520) 2026-04-30 16:56:15 -04:00
t_eq_wild_unsup.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_eq_wild_unsup.py
t_eq_wild_unsup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event.py
t_event.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_array_fire.py
t_event_array_fire.v
t_event_class_fire.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_class_fire.py
t_event_class_fire.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control.py
t_event_control.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_assign.py
t_event_control_assign.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_double_excessive.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_event_control_double_excessive.v Verilog format 2026-02-12 18:23:56 -05:00
t_event_control_double_lost.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_event_control_double_lost.v Verilog format 2026-02-12 18:23:56 -05:00
t_event_control_expr.py
t_event_control_expr.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_expr_noinl.py
t_event_control_expr_unsup.out
t_event_control_expr_unsup.py
t_event_control_expr_unsup.v
t_event_control_pass.py
t_event_control_pass.v Verilog format 2026-03-03 07:21:24 -05:00
t_event_control_prev_name_collision.py
t_event_control_prev_name_collision.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_scope_var.py
t_event_control_scope_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_star.out Improve E_UNSUPPORTED warning messages (#7329) 2026-03-26 13:25:30 -04:00
t_event_control_star.py
t_event_control_star.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_control_star_never.py
t_event_control_star_never.v
t_event_control_star_never_bad.out
t_event_control_star_never_bad.py
t_event_control_timing.out
t_event_control_timing.py
t_event_copy.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_copy.py
t_event_copy.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_dynamic_wait.py V3Timing: pre-clear destructive event state before dynamic waits (#7340) 2026-05-12 19:01:37 +01:00
t_event_dynamic_wait.v Verilog format 2026-05-13 21:00:34 -04:00
t_event_method_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_event_method_bad.py
t_event_method_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_exit.py
t_exit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_expect.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_expect.py
t_expect.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_export_packed_struct.cpp
t_export_packed_struct.py
t_export_packed_struct.v
t_export_packed_struct2.cpp
t_export_packed_struct2.py
t_export_packed_struct2.v
t_expr_incr_unsup.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_expr_incr_unsup.py
t_expr_incr_unsup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_expr_shortcircuit.py
t_expr_shortcircuit.v
t_exprstmt_on_lhs_of_nba.py
t_exprstmt_on_lhs_of_nba.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extend.py
t_extend.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extend_c_class.py
t_extend_c_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extend_c_class_c.h
t_extend_class.py
t_extend_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extract_static_const.out
t_extract_static_const.py
t_extract_static_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extract_static_const_multimodule.out
t_extract_static_const_multimodule.py
t_extract_static_const_multimodule.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_extract_static_const_no_merge.py
t_fallback_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fallback_bad.py
t_fallback_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_final.py
t_final.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_final_assert.out Fix `final` asserts and $stop (#7249) 2026-03-12 13:09:54 -04:00
t_final_assert.py Fix `final` asserts and $stop (#7249) 2026-03-12 13:09:54 -04:00
t_final_assert.v Commentary: Changes update 2026-03-16 22:21:51 -04:00
t_finish_stops_nonfinal.py Fix `$finish` to immediately stop executing code from non-final blocks (#7213 partial) (#7390). 2026-04-09 17:49:57 -04:00
t_finish_stops_nonfinal.v Fix `$finish` to immediately stop executing code from non-final blocks (#7213 partial) (#7390). 2026-04-09 17:49:57 -04:00
t_flag_aslr.py
t_flag_aslr_no.py
t_flag_bboxsys.py
t_flag_bboxsys.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_binary.py
t_flag_binary_parallel.py
t_flag_build.py
t_flag_build_bad.out
t_flag_build_bad.py
t_flag_build_bad2.py
t_flag_build_dep_bin.py
t_flag_build_dep_bin.v
t_flag_build_jobs_and_j.py
t_flag_build_jobs_bad.out
t_flag_build_jobs_bad.py
t_flag_comp_limit_parens.py
t_flag_comp_limit_parens.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_compiler.v Verilog format 2026-05-13 21:00:34 -04:00
t_flag_compiler_bad.out
t_flag_compiler_bad.py
t_flag_compiler_clang.py
t_flag_compiler_gcc.py
t_flag_compiler_msvc.py
t_flag_context_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_context_bad.py
t_flag_context_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_csplit.py
t_flag_csplit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_csplit_eval.py
t_flag_csplit_eval.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_csplit_groups.py Testing: Relax expected file count in t_flag_csplit_groups (#7163) 2026-03-01 13:27:46 +00:00
t_flag_csplit_off.py
t_flag_csplit_pch.py Apply 'make format' 2026-03-27 05:33:21 +00:00
t_flag_csplit_pch.v Commentary: Changes update 2026-03-27 21:41:52 -04:00
t_flag_debug_noleak.py
t_flag_debug_noleak.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_debugi9.py
t_flag_debugi9.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_decoration.py
t_flag_decoration.v
t_flag_decoration_no.py
t_flag_decorations_bad.out
t_flag_decorations_bad.py
t_flag_decorations_node.py
t_flag_define.py
t_flag_define.v Verilog format 2026-05-13 21:00:34 -04:00
t_flag_define.vc
t_flag_deprecated_bad.out Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_flag_deprecated_bad.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_flag_deprecated_bad.v
t_flag_errorlimit_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_errorlimit_bad.py
t_flag_errorlimit_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_expand_limit.py Optimize wide conditional expansion in V3Premit (#7691) 2026-06-01 20:25:41 +01:00
t_flag_expand_limit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_f.py
t_flag_f.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_f.vc
t_flag_f__2.vc
t_flag_f__3.v
t_flag_f_bad.out
t_flag_f_bad.py
t_flag_f_bad_cmt.out
t_flag_f_bad_cmt.py
t_flag_f_bad_cmt.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_f_bad_cmt.vc
t_flag_f_bad_getenvend.out
t_flag_f_bad_getenvend.py
t_flag_f_bad_getenvend.vc
t_flag_fi.cpp
t_flag_fi.py
t_flag_fi.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_fi_h.h
t_flag_future.py
t_flag_future.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_future_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_future_bad.py
t_flag_generate_key.py
t_flag_getenv.py
t_flag_getenv.v
t_flag_help.py
t_flag_help_valgrind.py
t_flag_hier0_bad.out
t_flag_hier0_bad.py
t_flag_hier1_bad.out
t_flag_hier1_bad.py
t_flag_hierarchical_threads_bad.out
t_flag_hierarchical_threads_bad.py
t_flag_i_empty.py
t_flag_i_empty.v
t_flag_incdir.py
t_flag_incdir.v
t_flag_instr_count_dpi_bad.py
t_flag_invalid2_bad.out
t_flag_invalid2_bad.py
t_flag_invalid_bad.out
t_flag_invalid_bad.py
t_flag_j_hier.py
t_flag_j_hier.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_language.py
t_flag_language.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_language_bad.out
t_flag_language_bad.py
t_flag_language_default.py
t_flag_ldflags.py
t_flag_ldflags.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_ldflags_a.cpp
t_flag_ldflags_c.cpp
t_flag_ldflags_so.cpp
t_flag_lib.py
t_flag_lib.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_lib_dpi.cpp
t_flag_lib_dpi.mk
t_flag_lib_dpi.py
t_flag_lib_dpi.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_lib_dpi_main.cpp
t_flag_libcreate_bad.out
t_flag_libcreate_bad.py
t_flag_libinc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_main.py
t_flag_main.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_main_sc_bad.out
t_flag_main_sc_bad.py
t_flag_main_top_name.py
t_flag_main_top_name.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_main_top_name_empty.py
t_flag_make_bad.out
t_flag_make_bad.py
t_flag_make_cmake.py
t_flag_make_cmake.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_make_cmake_sc.py
t_flag_make_cmake_sc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_make_gmake.py
t_flag_make_json.py
t_flag_mmd.py
t_flag_mmd.v
t_flag_modprefix_bad.out
t_flag_modprefix_bad.py
t_flag_names.py
t_flag_names.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_no_unlimited_stack.py
t_flag_no_unlimited_stack.v
t_flag_nofile_bad.out
t_flag_nofile_bad.py
t_flag_nomod_bad.out
t_flag_nomod_bad.py
t_flag_nomod_bad.v
t_flag_noop_bad.out
t_flag_noop_bad.py
t_flag_noop_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_only_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_flag_only_bad.py
t_flag_only_bad2.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_flag_only_bad2.py
t_flag_only_bad3.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_flag_only_bad3.py
t_flag_output_groups.py Optimize away empty ctor_var_reset. 2026-03-23 18:10:34 -04:00
t_flag_output_groups.v Optimize away empty ctor_var_reset. 2026-03-23 18:10:34 -04:00
t_flag_output_groups_bad.out
t_flag_output_groups_bad.py
t_flag_parameter.py
t_flag_parameter.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_flag_parameter.vc
t_flag_parameter_bad.out
t_flag_parameter_bad.py
t_flag_parameter_hier.py
t_flag_parameter_hier.v Verilog format 2026-05-13 21:00:34 -04:00
t_flag_parameter_pkg.py
t_flag_parameter_pkg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_prefix.py
t_flag_prefix.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_prefix_bad.out
t_flag_prefix_bad.py
t_flag_quiet_build.py
t_flag_quiet_build.v
t_flag_quiet_exit.py
t_flag_quiet_stats.py
t_flag_quiet_stats.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_quiet_stats2.py
t_flag_quiet_stats3.py
t_flag_relinc.py
t_flag_relinc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_runtime_debug.py
t_flag_runtime_timeout_bad.out Add newline on alarm timeouts to help error parsers 2026-04-13 21:07:03 -04:00
t_flag_runtime_timeout_bad.py
t_flag_runtime_timeout_bad.v
t_flag_sched_zero_delay_none_bad.out Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_none_bad.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_none_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_flag_sched_zero_delay_off_bad.out Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_off_bad.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_off_bad.v Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_off_run.out Verilog format 2026-02-16 23:21:53 -05:00
t_flag_sched_zero_delay_off_run.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_off_run.v Verilog format 2026-02-16 23:21:53 -05:00
t_flag_sched_zero_delay_off_run_bad.out Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_off_run_bad.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_on.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_sched_zero_delay_on.v Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_flag_skipidentical.py
t_flag_skipidentical.v
t_flag_stats.py
t_flag_stats.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_structs_packed.out Deprecate `--structs-packed` (#7222). 2026-03-21 10:59:27 -04:00
t_flag_structs_packed.py Apply 'make format' 2026-03-21 15:00:48 +00:00
t_flag_structs_packed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_structs_packed_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_structs_packed_bad.py
t_flag_suggest.out
t_flag_suggest.py
t_flag_supported.py
t_flag_supported_1.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_flag_supported_empty.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_flag_threads_bad.out
t_flag_threads_bad.py
t_flag_threads_bad2.out
t_flag_threads_bad2.py
t_flag_threads_dpi_bad.out
t_flag_threads_dpi_bad.py
t_flag_timescale.out
t_flag_timescale.py
t_flag_timescale.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_timescale_override.out
t_flag_timescale_override.py
t_flag_timescale_override.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_timescale_override2.out
t_flag_timescale_override2.py
t_flag_topmodule.py
t_flag_topmodule.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_flag_topmodule_bad.out
t_flag_topmodule_bad.py
t_flag_topmodule_bad2.out
t_flag_topmodule_bad2.py
t_flag_topmodule_bad3.out
t_flag_topmodule_bad3.py
t_flag_topmodule_bad3.v
t_flag_topmodule_inline.py
t_flag_topmodule_inline.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_flag_unroll_limit_const.out
t_flag_unroll_limit_const.py
t_flag_unroll_limit_const.v
t_flag_unroll_limit_gen.out
t_flag_unroll_limit_gen.py
t_flag_unroll_limit_gen.v
t_flag_unroll_limit_stmt.out
t_flag_unroll_limit_stmt.py
t_flag_unroll_limit_stmt.v
t_flag_values_bad.out Add --max-replication option (#7139) 2026-02-23 16:51:37 -05:00
t_flag_values_bad.py Add --max-replication option (#7139) 2026-02-23 16:51:37 -05:00
t_flag_values_deprecated.out
t_flag_values_deprecated.py
t_flag_verilate.py
t_flag_verilate_threads_bad.out
t_flag_verilate_threads_bad.py
t_flag_verilator_running.py Apply 'make format' 2026-04-25 15:17:45 +00:00
t_flag_version.py
t_flag_werror.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_werror_bad1.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_werror_bad1.py
t_flag_werror_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_werror_bad2.py
t_flag_werror_bad3.out
t_flag_werror_bad3.py
t_flag_wfatal.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_wfatal.py
t_flag_wfatal.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_woff.py
t_flag_woff.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_woff_bad.out
t_flag_woff_bad.py
t_flag_wpedantic_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_wpedantic_bad.py
t_flag_wpedantic_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_wwarn_bad.out
t_flag_wwarn_bad.py
t_flag_x_assign_bad.out
t_flag_x_assign_bad.py
t_flag_x_initial_bad.out
t_flag_x_initial_bad.py
t_flag_xinitial_0.py
t_flag_xinitial_0.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_flag_xinitial_unique.py
t_flag_xinitial_unique.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_assign.py
t_for_assign.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_break.py
t_for_break.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_comma.py
t_for_comma.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_count.py
t_for_count.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_disable_dot.py
t_for_disable_dot.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_funcbound.py
t_for_funcbound.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_init_bug.py
t_for_init_bug.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_local.py
t_for_local.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_for_loop.py
t_for_loop.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force.py
t_force.v Verilog format 2026-05-13 21:00:34 -04:00
t_force_assign.py Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_assign.v Verilog format 2026-05-13 21:00:34 -04:00
t_force_assign_comb.out Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_assign_comb.py Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_assign_comb.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_force_bad_rw.out Fix delete inside foreach skipping elements (#7404) (#7410) 2026-04-11 22:42:50 -04:00
t_force_bad_rw.py
t_force_bad_rw.v Fix delete inside foreach skipping elements (#7404) (#7410) 2026-04-11 22:42:50 -04:00
t_force_chained.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_chained.v Verilog format 2026-05-13 21:00:34 -04:00
t_force_complex_sel_unsup.out
t_force_complex_sel_unsup.py
t_force_complex_sel_unsup.v
t_force_cond.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_cond.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_force_forceable_readwrite_unsup.out Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_forceable_readwrite_unsup.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_forceable_readwrite_unsup.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_forceable_rhs_ref.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_forceable_rhs_ref.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_func.py Support functions on RHS of force (#7491) 2026-04-30 10:38:07 -04:00
t_force_func.v Support functions on RHS of force (#7491) 2026-04-30 10:38:07 -04:00
t_force_immediate_release.py
t_force_immediate_release.v
t_force_initial.py
t_force_initial.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_input_assign_bad.out Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_input_assign_bad.py
t_force_input_assign_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_mid.cpp
t_force_mid.py
t_force_mid.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_multi.py
t_force_multi.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_nested_struct.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_nested_struct.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_nested_struct2.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_nested_struct2.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_force_port_inline.py
t_force_port_inline.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_readwrite.py
t_force_readwrite.v
t_force_readwrite_unsup.out Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_force_readwrite_unsup.py
t_force_readwrite_unsup.v Support force assignments to unpacked structs (#7060) 2026-02-17 05:35:07 +05:30
t_force_release.py Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_release.v Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_force_release_net.py
t_force_release_net.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_release_net_reverse.py
t_force_release_net_trace.out
t_force_release_net_trace.py
t_force_release_var.py
t_force_release_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_release_var_reverse.py
t_force_release_var_trace.out
t_force_release_var_trace.py
t_force_rhs_ref.py
t_force_rhs_ref.v
t_force_rhs_ref_multi_lhs.py
t_force_rhs_ref_multi_lhs.v
t_force_rhs_ref_multiple.py
t_force_rhs_ref_multiple.v
t_force_select_bad.out
t_force_select_bad.py
t_force_select_bad.v
t_force_struct_partial.py
t_force_struct_partial.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_struct_trace.py Fix force of unpacked arrays (#7579) (#7580) 2026-05-14 10:58:16 -04:00
t_force_struct_trace.v Commentary: Changes update 2026-05-14 17:38:11 -04:00
t_force_subnet.py
t_force_subnet.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_subvar.py
t_force_subvar.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_tri.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_tri.py
t_force_tri.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_force_unpacked.py
t_force_unpacked.v Support force assignments to array elements of real type (#7048) 2026-03-05 08:37:20 -05:00
t_force_unpacked_struct.py Support force assignments to unpacked structs (#7060) 2026-02-17 05:35:07 +05:30
t_force_unpacked_struct.v Support force assignments to array elements of real type (#7048) 2026-03-05 08:37:20 -05:00
t_force_wide_sel.py Optimize read selects with no overlapping forces with regular reads (#7594) 2026-05-14 16:46:57 -04:00
t_force_wide_sel.v Commentary: Changes update 2026-05-14 17:38:11 -04:00
t_forceable_assigncont.py Fix forceable signal with a procedural continuous assign (#7638) (#7639) 2026-05-28 16:03:27 -04:00
t_forceable_assigncont.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_forceable_net.cpp
t_forceable_net.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_forceable_net.vlt
t_forceable_net_cmt.py
t_forceable_net_cmt_trace.py
t_forceable_net_trace.vcd.out
t_forceable_net_vlt.py
t_forceable_net_vlt_trace.py
t_forceable_public_flat.py Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_forceable_public_flat.v Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_forceable_string_bad.out Support IEEE-compliant force/release handling (#7391) 2026-04-21 11:54:42 -04:00
t_forceable_string_bad.py
t_forceable_string_bad.v
t_forceable_unpacked.cpp Apply 'make format' 2026-06-06 00:44:02 +00:00
t_forceable_unpacked.v Fix whitespace 2026-06-06 10:46:02 -04:00
t_forceable_unpacked.vlt Support forceable on unpacked array variables (#7677) (#7678) 2026-06-05 20:43:06 -04:00
t_forceable_unpacked_bad.out Support forceable on unpacked array variables (#7677) (#7678) 2026-06-05 20:43:06 -04:00
t_forceable_unpacked_bad.py
t_forceable_unpacked_bad.v Support forceable on unpacked array variables (#7677) (#7678) 2026-06-05 20:43:06 -04:00
t_forceable_unpacked_cmt.py Support forceable on unpacked array variables (#7677) (#7678) 2026-06-05 20:43:06 -04:00
t_forceable_unpacked_vlt.py Support forceable on unpacked array variables (#7677) (#7678) 2026-06-05 20:43:06 -04:00
t_forceable_var.cpp
t_forceable_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_forceable_var.vlt
t_forceable_var_cmt.py
t_forceable_var_cmt_trace.py
t_forceable_var_trace.vcd.out
t_forceable_var_vlt.py
t_forceable_var_vlt_trace.py
t_foreach.py
t_foreach.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_array.py
t_foreach_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_bad.py
t_foreach_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_blkname.py
t_foreach_blkname.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_class.py
t_foreach_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_const.py
t_foreach_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_delete.py Fix delete inside foreach skipping elements (#7404) (#7410) 2026-04-11 22:42:50 -04:00
t_foreach_delete.v Fix delete inside foreach skipping elements (#7404) (#7410) 2026-04-11 22:42:50 -04:00
t_foreach_iface.py
t_foreach_iface.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_nested.py Support `foreach` with nested dots (#6991) 2026-02-03 08:44:18 -05:00
t_foreach_nested.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_foreach_nindex_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_nindex_bad.py
t_foreach_nindex_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_noivar.py
t_foreach_noivar.v
t_foreach_noivar_bad.out
t_foreach_noivar_bad.py
t_foreach_sideeff_uvm.py
t_foreach_sideeff_uvm.v
t_foreach_type_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_foreach_type_bad.py
t_foreach_type_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork.py
t_fork.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_bbox.py
t_fork_bbox.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_block_item_declaration.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_fork_block_item_declaration.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_cfunc_finish.py
t_fork_cfunc_finish.v
t_fork_delay.py
t_fork_delay.v
t_fork_delay_finish.py
t_fork_delay_finish.v
t_fork_dynscope.py
t_fork_dynscope.v Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
t_fork_dynscope_interface.py
t_fork_dynscope_interface.v Verilog format 2026-02-22 13:50:01 -05:00
t_fork_dynscope_out.py
t_fork_dynscope_out.v
t_fork_finish.py
t_fork_finish.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_func2_bad.out
t_fork_func2_bad.py
t_fork_func2_bad.v
t_fork_func_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_func_bad.py
t_fork_func_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_initial.py
t_fork_initial.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_join_none_any_nested.py
t_fork_join_none_any_nested.v Verilog format 2026-03-03 07:21:24 -05:00
t_fork_join_none_capture.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_fork_join_none_capture.v Tests: Fix t_fork_join_none_capture for other simulators 2026-02-22 11:36:22 -05:00
t_fork_join_none_class_cap.py
t_fork_join_none_class_cap.v Verilog format 2026-05-13 21:00:34 -04:00
t_fork_join_none_inactive.out Fix #0 delays to control fork scheduling (#6730 repair) (#6891) 2026-02-17 21:51:11 -05:00
t_fork_join_none_inactive.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_fork_join_none_inactive.v Verilog format 2026-02-22 13:50:01 -05:00
t_fork_join_none_nested_triggered.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_fork_join_none_nested_triggered.v Verilog format 2026-02-22 13:50:01 -05:00
t_fork_join_none_stmt.py
t_fork_join_none_stmt.v
t_fork_join_none_virtual.py
t_fork_join_none_virtual.v Verilog format 2026-05-13 21:00:34 -04:00
t_fork_join_none_wait_ev.py Fix loss of events due to bit shift (#7670) 2026-05-28 12:45:18 -04:00
t_fork_join_none_wait_ev.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_fork_join_none_waiters.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_fork_join_none_waiters.v Verilog format 2026-02-22 13:50:01 -05:00
t_fork_jumpblock.py
t_fork_jumpblock.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_label.py
t_fork_label.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_label_timing.py
t_fork_none_var.py
t_fork_none_var.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_output_arg.py
t_fork_output_arg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_port.py
t_fork_port.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_repeat.py
t_fork_repeat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_repeat_reset.py
t_fork_repeat_reset.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fork_split.py Fix splitting functions containing fork logic (#7717) 2026-06-05 09:32:52 -04:00
t_fork_timing.py
t_fork_write_after_timing.py Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_fork_write_after_timing.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_fork_write_after_timing_bad.out Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_fork_write_after_timing_bad.py Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_fork_write_after_timing_bad.v Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_fourstate_assign.py
t_fourstate_assign.v Verilog format 2026-02-05 17:45:24 -05:00
t_fourstate_assign_bad.out Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
t_fourstate_assign_bad.py
t_fourstate_assign_bad.v Verilog format 2026-02-05 17:45:24 -05:00
t_fourstate_fourstate_hier_unsup.out Internals: Four state pre-pull (types) (#7520) 2026-04-30 16:56:15 -04:00
t_fourstate_fourstate_hier_unsup.py Internals: Four state pre-pull (types) (#7520) 2026-04-30 16:56:15 -04:00
t_fourstate_fourstate_unsup.out Internals: Add `--fourstate` flag and FUTURE warning (#7279) 2026-03-18 13:45:36 -04:00
t_fourstate_fourstate_unsup.py Internals: Add `--fourstate` flag and FUTURE warning (#7279) 2026-03-18 13:45:36 -04:00
t_fourstate_fourstate_unsup.v Internals: Add `--fourstate` flag and FUTURE warning (#7279) 2026-03-18 13:45:36 -04:00
t_fourstate_no_fourstate.py Internals: Add `--fourstate` flag and FUTURE warning (#7279) 2026-03-18 13:45:36 -04:00
t_fourstate_no_fourstate.v Internals: Add `--fourstate` flag and FUTURE warning (#7279) 2026-03-18 13:45:36 -04:00
t_fsm_metacmt_dump.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_fsm_metacmt_dump.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_fsm_register_wrapper.out Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_fsm_register_wrapper.py Apply 'make format' 2026-05-21 17:51:28 +00:00
t_fsm_register_wrapper.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_fsm_register_wrapper.vlt Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_noinline.out Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_fsm_register_wrapper_noinline.py Fix FSM thread nondeterminism (#7644) (#7646) 2026-05-22 22:30:01 -04:00
t_fsm_register_wrapper_noinline.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_fsm_register_wrapper_noinline.vlt Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_vlt_bad.out Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_vlt_bad.py Apply 'make format' 2026-05-21 17:51:28 +00:00
t_fsm_register_wrapper_vlt_bad.v Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_vlt_bad.vlt Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_warn_bad.out Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsm_register_wrapper_warn_bad.py Apply 'make format' 2026-05-21 17:51:28 +00:00
t_fsm_register_wrapper_warn_bad.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_fsm_register_wrapper_warn_bad.vlt Support FSM detection in primitive wrappers (#7607) 2026-05-21 13:50:31 -04:00
t_fsmmulti_combo_multi_warn_bad.out Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_combo_multi_warn_bad.py Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_fsmmulti_combo_multi_warn_bad.v Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_same_bad.out Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_same_bad.py Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_fsmmulti_same_bad.v Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_warn_bad.out Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_warn_bad.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_fsmmulti_warn_bad.v Extend FSM coverage detection to case-free FSMs - Use - if/else chains (#7561) 2026-05-10 13:12:58 -04:00
t_fsmmulti_warn_off.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_fsmmulti_warn_off.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_func.py
t_func.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_arg_complex.py
t_func_arg_complex.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_func_automatic_clear.py
t_func_automatic_clear.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_bad.py
t_func_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_bad_width.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_bad_width.py
t_func_bad_width.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_begin2.py
t_func_begin2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_call_order.py
t_func_call_order.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_call_super_arg.py
t_func_call_super_arg.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_func_check.py
t_func_check.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_complex.py
t_func_complex.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_complex_noinl.py
t_func_cond.py
t_func_cond.v
t_func_const.py
t_func_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const2_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const2_bad.py
t_func_const2_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const3_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_func_const3_bad.py
t_func_const3_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_func_const_bad.out
t_func_const_bad.py
t_func_const_bad.v
t_func_const_packed_array_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_packed_array_bad.py
t_func_const_packed_array_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_packed_struct_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_packed_struct_bad.py
t_func_const_packed_struct_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_packed_struct_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_packed_struct_bad2.py
t_func_const_packed_struct_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_struct_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_const_struct_bad.py
t_func_const_struct_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_crc.py Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_func_crc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_default_warn.py
t_func_default_warn.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_defaults.py
t_func_defaults.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_dotted.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_dotted_inl0.py
t_func_dotted_inl0.vlt
t_func_dotted_inl0_vlt.py
t_func_dotted_inl1.py
t_func_dotted_inl1.vlt
t_func_dotted_inl1_vlt.py
t_func_dotted_inl2.py Testing: Relax expected file count in t_flag_csplit_groups (#7163) 2026-03-01 13:27:46 +00:00
t_func_dotted_inl2.vlt
t_func_dotted_inl2_vlt.py Testing: Relax expected file count in t_flag_csplit_groups (#7163) 2026-03-01 13:27:46 +00:00
t_func_endian.py
t_func_endian.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_first.py
t_func_first.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_flip.py
t_func_flip.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_gen.py
t_func_gen.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_graphcirc.py
t_func_graphcirc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_grey.py
t_func_grey.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_impure_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_impure_bad.py
t_func_impure_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_inconly.py
t_func_inconly.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_inout_bit_sel.py
t_func_inout_bit_sel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_io_order.py
t_func_io_order.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_lib.py
t_func_lib.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_lib_sub.py
t_func_lib_sub.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_lib_sub_timing.py Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_func_link.py
t_func_link.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_many_return.py
t_func_many_return.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_mlog2.py
t_func_mlog2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_modify_input.py
t_func_modify_input.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_named.py
t_func_named.v Verilog format 2026-05-13 21:00:34 -04:00
t_func_nansi_dup_bad.out
t_func_nansi_dup_bad.py
t_func_nansi_dup_bad.v
t_func_nansi_mism_bad.out
t_func_nansi_mism_bad.py
t_func_nansi_mism_bad.v
t_func_no_lifetime_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_no_lifetime_bad.py
t_func_no_lifetime_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_no_paren.py
t_func_no_paren.v
t_func_no_parentheses_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_no_parentheses_bad.py
t_func_no_parentheses_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_noinl.py
t_func_noinl.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_numones.py
t_func_numones.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_outfirst.py
t_func_outfirst.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_outp.py
t_func_outp.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_paramed.py
t_func_paramed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_plog.py
t_func_plog.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_public.py
t_func_public.v Fix erroneous implicit conversions of VlWide (#7642) 2026-05-22 20:05:08 +01:00
t_func_public_trace.py
t_func_purification.py
t_func_purification.v
t_func_rand.cpp
t_func_rand.py
t_func_rand.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_range.py
t_func_range.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_real_abs.py
t_func_real_abs.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_real_exprstmt.py
t_func_real_exprstmt.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_real_param.py
t_func_real_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_recurse.py
t_func_recurse.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_recurse2.py
t_func_recurse2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_recurse_depth.py Add --func-recursion-depth CLI option (#7175) (#7179) 2026-03-04 06:46:07 -05:00
t_func_recurse_depth.v Add --func-recursion-depth CLI option (#7175) (#7179) 2026-03-04 06:46:07 -05:00
t_func_recurse_param.py
t_func_recurse_param.v
t_func_recurse_param_bad.out
t_func_recurse_param_bad.py
t_func_recurse_param_bad.v
t_func_redef.py
t_func_redef.v Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_func_ref.py
t_func_ref.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_ref_arg.py
t_func_ref_arg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_ref_arg_default.py Fix (const) ref default task argument handling (#7698) 2026-06-03 22:31:21 -04:00
t_func_ref_arg_default.v Fix (const) ref default task argument handling (#7698) 2026-06-03 22:31:21 -04:00
t_func_ref_arg_default_noinl.py Fix (const) ref default task argument handling (#7698) 2026-06-03 22:31:21 -04:00
t_func_ref_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_ref_bad.py
t_func_ref_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_ref_noinline.py
t_func_ref_noparen.py
t_func_ref_noparen.v
t_func_refio_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_func_refio_bad.py
t_func_refio_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_regfirst.py
t_func_regfirst.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_return.py
t_func_return.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_return_bad.out Support disable task by name (#6853) (#7136) 2026-03-23 19:56:31 -07:00
t_func_return_bad.py
t_func_return_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_return_init.py Fix non-inlined function return value clearing (#6982). 2026-02-01 11:57:09 -05:00
t_func_return_init.v Fix non-inlined function return value clearing (#6982). 2026-02-01 11:57:09 -05:00
t_func_sel.py
t_func_sel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_sum.py
t_func_sum.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_task_bad.out
t_func_task_bad.py
t_func_task_bad.v
t_func_task_bad2.out
t_func_task_bad2.py
t_func_task_bad2.v
t_func_tie_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_tie_bad.py
t_func_tie_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_twocall.py
t_func_twocall.v Verilog format 2026-05-13 21:00:34 -04:00
t_func_twocall_noexpand.py
t_func_types.py
t_func_types.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_under.py
t_func_under.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_under2.py
t_func_under2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_uninit.py
t_func_uninit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_unit.py
t_func_unit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_unit_recursive.py Fix recursive constant function in $unit scope (#7174) (#7178) 2026-03-02 15:15:34 -05:00
t_func_unit_recursive.v Fix recursive constant function in $unit scope (#7174) (#7178) 2026-03-02 15:15:34 -05:00
t_func_v.py
t_func_v.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_v_noinl.py
t_func_virt_new.py
t_func_virt_new.v
t_func_virt_new_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_func_virt_new_bad.py
t_func_virt_new_bad.v
t_func_void.py
t_func_void.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_void_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_void_bad.py
t_func_void_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_while.py
t_func_while.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_while2.py
t_func_while2.v
t_func_wide.py
t_func_wide.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_wide_out.py
t_func_wide_out.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_wide_out_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_func_wide_out_bad.py
t_func_wide_out_c.cpp
t_func_wide_out_noinl.py
t_function_generate.py Fix functions in generate block resulting in "Broken link in node" (#7236) (#7367) 2026-04-03 11:19:17 -04:00
t_function_generate.v Commentary: Changes update 2026-04-03 20:16:23 -04:00
t_fuzz_always_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_always_bad.py
t_fuzz_always_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_eof_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_eof_bad.py
t_fuzz_eof_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_eqne_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_fuzz_eqne_bad.py
t_fuzz_eqne_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_genintf_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_genintf_bad.py
t_fuzz_genintf_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_negwidth_bad.out
t_fuzz_negwidth_bad.py
t_fuzz_negwidth_bad.v
t_fuzz_nor_bad.out Fix error on illegal nand/nor binary operators (#7353). 2026-03-31 18:35:27 -04:00
t_fuzz_nor_bad.py Fix error on illegal nand/nor binary operators (#7353). 2026-03-31 18:35:27 -04:00
t_fuzz_nor_bad.v Fix error on illegal nand/nor binary operators (#7353). 2026-03-31 18:35:27 -04:00
t_fuzz_triand_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_fuzz_triand_bad.py
t_fuzz_triand_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gantt.py
t_gantt.v
t_gantt_c.cpp
t_gantt_hier.py
t_gantt_io.dat
t_gantt_io.out
t_gantt_io.py
t_gantt_io.vcd.out
t_gantt_io_arm.dat
t_gantt_io_arm.out
t_gantt_io_arm.py
t_gantt_io_noproc.dat
t_gantt_io_noproc.out
t_gantt_io_noproc.py
t_gantt_numa.py
t_gantt_numa_default_threads.cpp Verilog format 2026-02-05 17:45:24 -05:00
t_gantt_numa_default_threads.py Verilog format 2026-02-05 17:45:24 -05:00
t_gantt_two.cpp
t_gantt_two.py
t_gate_array.py
t_gate_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_array_multidim_bad.out Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_gate_array_multidim_bad.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_gate_array_multidim_bad.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_gate_basic.py
t_gate_basic.v Tests: Prefer --binary over timing multipliers 2026-05-11 19:50:48 -04:00
t_gate_basic_specify_bad.out Support rise/fall delays (#7368) 2026-04-07 06:44:52 -04:00
t_gate_basic_specify_bad.py
t_gate_basic_timing.py Tests: Prefer --binary over timing multipliers 2026-05-11 19:50:48 -04:00
t_gate_chained.py Fix exponential expansion in V3Gate (#7550) 2026-05-07 22:01:08 -05:00
t_gate_delay_unsup.out Support rise/fall delays (#7368) 2026-04-07 06:44:52 -04:00
t_gate_delay_unsup.py Support rise/fall delays (#7368) 2026-04-07 06:44:52 -04:00
t_gate_delref.py
t_gate_delref.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_elim.py
t_gate_elim.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_elim_cycle.py
t_gate_elim_cycle.v
t_gate_fdup.py
t_gate_fdup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_implicit.py
t_gate_implicit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_exclude_multiple.py
t_gate_inline_wide_exclude_multiple.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_arraysel.py Optimize Dfg with relaxed live variable analysis (#7739) 2026-06-10 15:59:44 +01:00
t_gate_inline_wide_noexclude_arraysel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_const.py
t_gate_inline_wide_noexclude_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_other_scope.py
t_gate_inline_wide_noexclude_other_scope.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_sel.py
t_gate_inline_wide_noexclude_sel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_small_wide.py
t_gate_inline_wide_noexclude_small_wide.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_inline_wide_noexclude_varref.py
t_gate_inline_wide_noexclude_varref.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_loop.py
t_gate_loop.v
t_gate_lvalue_const.py
t_gate_lvalue_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_opt.py
t_gate_opt.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_ormux.py
t_gate_ormux.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_gate_primitives_implicit_net.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_primitives_implicit_net.py
t_gate_primitives_implicit_net.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_strength.py
t_gate_strength.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_tree.py
t_gate_unsup.py
t_gate_unsup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gate_width_bad.out
t_gate_width_bad.py
t_gate_width_bad.v
t_gen_alw.py
t_gen_alw.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_assign.py
t_gen_assign.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_class.py
t_gen_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_cond_bitrange.py
t_gen_cond_bitrange.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_cond_bitrange_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_cond_bitrange_bad.py
t_gen_cond_bitrange_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_cond_const.py
t_gen_cond_const.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_defparam.py
t_gen_defparam.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_defparam_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_defparam_bad.py
t_gen_defparam_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_defparam_multi.out Support more than one dot in defparam (#7262) 2026-03-24 09:20:46 -04:00
t_gen_defparam_multi.py
t_gen_defparam_multi.v
t_gen_defparam_nfound_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_defparam_nfound_bad.py
t_gen_defparam_nfound_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_div0.py
t_gen_div0.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_duplicated_blocks_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_duplicated_blocks_bad.py
t_gen_duplicated_blocks_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_for.py
t_gen_for.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_for0.py
t_gen_for0.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_for1.py
t_gen_for1.v Tests: Add t_interface_update (#2765) 2026-03-29 20:52:29 -04:00
t_gen_for_interface.py
t_gen_for_interface.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_for_overlap.py
t_gen_for_overlap.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_for_shuffle.py
t_gen_for_shuffle.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_forif.py
t_gen_forif.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_genblk.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_genblk.py
t_gen_genblk.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_genblk_noinl.py
t_gen_if.py
t_gen_if.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_ifelse.py
t_gen_ifelse.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_inc.py
t_gen_inc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_index.py
t_gen_index.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_intdot.py
t_gen_intdot.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_intdot2.py
t_gen_intdot2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_local.py
t_gen_local.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_lsb.py
t_gen_lsb.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_mislevel.py
t_gen_mislevel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_missing.py
t_gen_missing.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_missing_bad.out Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
t_gen_missing_bad.py
t_gen_missing_bad2.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_missing_bad2.py
t_gen_missing_bad2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_nonconst_bad.out Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
t_gen_nonconst_bad.py
t_gen_nonconst_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_self_return.py
t_gen_self_return.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_upscope.out
t_gen_upscope.py
t_gen_upscope.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_var_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_gen_var_bad.py
t_gen_var_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_generate_fatal_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_generate_fatal_bad.py
t_generate_fatal_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_genfor_hier.py
t_genfor_hier.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_genfor_init_o0.py
t_genfor_init_o0.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_genfor_signed.out
t_genfor_signed.py
t_genfor_signed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_genvar_for_bad.out
t_genvar_for_bad.py
t_genvar_for_bad.v
t_genvar_misuse_bad.out
t_genvar_misuse_bad.py
t_genvar_misuse_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_hier_block.cpp
t_hier_block.py Fix --hierarchical dropping arguments in -f/-F files (#7240). 2026-03-12 07:25:32 -04:00
t_hier_block.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_hier_block0_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block0_bad.py
t_hier_block0_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block1_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block1_bad.py
t_hier_block1_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_binary.py
t_hier_block_chained.py Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_hier_block_chained.v Verilog format 2026-06-07 21:55:43 -04:00
t_hier_block_chained.vlt
t_hier_block_cmake.py
t_hier_block_import.py
t_hier_block_import.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_import_cmake.py
t_hier_block_int.py
t_hier_block_int.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_libmod.py
t_hier_block_libmod.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_nohier.py
t_hier_block_perf.py
t_hier_block_perf.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_hier_block_perf.vlt
t_hier_block_prot_lib.py
t_hier_block_prot_lib_shared.py
t_hier_block_sc.py
t_hier_block_signed_logic.py
t_hier_block_signed_logic.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_struct.py
t_hier_block_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_struct_nohier.py
t_hier_block_threads_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_threads_bad.py
t_hier_block_threads_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_threads_bad.vlt
t_hier_block_type_param.py
t_hier_block_type_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_type_param_multiple.py
t_hier_block_type_param_multiple.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_type_param_multiple_instances.py
t_hier_block_type_param_multiple_instances.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_type_param_nested.py
t_hier_block_type_param_nested.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_type_param_notfound_bad.out Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
t_hier_block_type_param_notfound_bad.py
t_hier_block_type_param_typedef.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_block_typedef_param.py
t_hier_block_vlt.py
t_hier_block_vlt.vlt
t_hier_bynum.py
t_hier_bynum.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hier_parm_under.py
t_hier_parm_under.v
t_hier_task.py
t_hier_task.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hierarchy_identifier.py
t_hierarchy_identifier.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hierarchy_identifier_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hierarchy_identifier_bad.py
t_hierarchy_identifier_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_hierarchy_unnamed.py
t_hierarchy_unnamed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_if_deep.py
t_if_deep.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_if_same_bad.py
t_if_same_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_if_swap.py
t_if_swap.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_iface_array_multidim.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_3d.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_3d.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_3d_port.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_3d_port.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_hier.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_hier.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_modport.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_modport.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_multi_inst.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_multi_inst.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_nested.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_nested.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_nested_port.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_nested_port.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_port.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_port.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_port_write.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_port_write.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_ranges.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_ranges.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_array_multidim_xref.py Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_iface_array_multidim_xref.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_iface_chained_consumer_struct.py Fix $bits on local struct with chained-interface (#7515) (#7517) 2026-04-30 07:12:11 -04:00
t_iface_chained_consumer_struct.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_iface_name_collision.py Apply 'make format' 2026-05-15 11:53:21 +00:00
t_iface_name_collision.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_iface_nested_width2.py Fix wrong $bits() for parameterized interface struct typedefs (#7218) (#7219) 2026-03-09 22:32:13 -04:00
t_iface_nested_width2.v Fix wrong $bits() for parameterized interface struct typedefs (#7218) (#7219) 2026-03-09 22:32:13 -04:00
t_iface_nested_width3.py Fix interface derived types passed as parameters to generate loop module instantiation (#7273) 2026-03-18 09:26:55 -04:00
t_iface_nested_width3.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_iface_param_class_type.py Fix parameterized class typedef as interface type parameter (#7000) (#7006) 2026-04-12 20:38:27 -04:00
t_iface_param_class_type.v Commentary: Changes update 2026-04-13 21:09:24 -04:00
t_iface_param_class_type_noinl.py Fix parameterized class typedef as interface type parameter (#7000) (#7006) 2026-04-12 20:38:27 -04:00
t_iface_param_class_typedef.py Apply 'make format' 2026-02-02 03:38:19 +00:00
t_iface_param_class_typedef.v Verilog format 2026-02-05 17:45:24 -05:00
t_iface_param_type_derived_range.py Fix interface derived types passed as parameters to generate loop module instantiation (#7273) 2026-03-18 09:26:55 -04:00
t_iface_param_type_derived_range.v Fix interface derived types passed as parameters to generate loop module instantiation (#7273) 2026-03-18 09:26:55 -04:00
t_iface_self_ref_typedef.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_iface_self_ref_typedef.v Verilog format 2026-03-03 07:21:24 -05:00
t_iface_typedef_scale.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_iface_typedef_struct_member.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_iface_typedef_struct_member.v Verilog format 2026-03-03 07:21:24 -05:00
t_iface_typedef_wrong_clone.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_iface_typedef_wrong_clone.v Verilog format 2026-03-03 07:21:24 -05:00
t_iff.py
t_iff.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements.py
t_implements.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_collision.py
t_implements_collision.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_collision_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_collision_bad.py
t_implements_collision_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_contents_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_contents_bad.py
t_implements_contents_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_missing_bad.py
t_implements_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_nested.py
t_implements_nested.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_nested_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_nested_bad.py
t_implements_nested_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_new_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_new_bad.py
t_implements_new_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_noinherit_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_noinherit_bad.py
t_implements_noinherit_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_noninterface_bad.out
t_implements_noninterface_bad.py
t_implements_noninterface_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_not_nested.py
t_implements_not_nested.v
t_implements_notfound_bad.out
t_implements_notfound_bad.py
t_implements_notfound_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_implements_typed.py
t_implements_typed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_impure_cond_empty_if.py
t_impure_cond_empty_if.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inc_relink.py
t_inc_relink.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_incorrect_multi_driven.py
t_incorrect_multi_driven.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_incr_void.py
t_incr_void.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_increment_bad.out Support pre/post increment/decrement inside && and || (#7683) 2026-05-29 19:51:27 -04:00
t_increment_bad.py
t_increment_bad.v Support pre/post increment/decrement inside && and || (#7683) 2026-05-29 19:51:27 -04:00
t_infinite_recursion.py
t_infinite_recursion.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_init_array_bad.out
t_init_array_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_init_array_bad.v
t_init_concat.py
t_init_concat.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initarray_nonarray.py
t_initarray_nonarray.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initial.py
t_initial.v Support procedural continuous assign/deassign (#7493) 2026-05-08 19:01:11 -04:00
t_initial_assign_sformatf.py
t_initial_assign_sformatf.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initial_assign_sformatf_debug.py
t_initial_delay_assign.py
t_initial_delay_assign.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_initial_dlyass.py
t_initial_dlyass.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initial_dlyass_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initial_dlyass_bad.py
t_initial_edge.py
t_initial_edge.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_initial_edge_bad.py
t_initial_inc.vh Verilog format 2026-06-07 21:55:43 -04:00
t_initialstatic_circ.py
t_initialstatic_circ.v Verilog format 2026-05-13 21:00:34 -04:00
t_inline_varxref_inlineddots.py Apply 'make format' 2026-02-04 21:27:14 +00:00
t_inline_varxref_inlineddots.v Verilog format 2026-02-05 17:45:24 -05:00
t_inside.py
t_inside.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside2.py
t_inside2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside3.py
t_inside3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_inside_assoc_unsup.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_assoc_unsup.py
t_inside_assoc_unsup.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_dyn.py
t_inside_dyn.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_extend.py
t_inside_extend.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_inside_impure_unsized.py Fix inside operator crash with impure expression and unsized range literals (#7063) (#7067) 2026-02-17 08:33:31 +05:30
t_inside_impure_unsized.v Verilog format 2026-02-16 23:21:53 -05:00
t_inside_nonint.py
t_inside_nonint.v Verilog format 2026-03-03 07:21:24 -05:00
t_inside_queue_elem.py
t_inside_queue_elem.v Fix string `inside` queue (#7373). 2026-04-04 14:43:06 -04:00
t_inside_tolerance_unsup.out
t_inside_tolerance_unsup.py
t_inside_tolerance_unsup.v
t_inside_unbounded.py
t_inside_unbounded.v
t_inside_unbounded_both.py
t_inside_unbounded_both.v
t_inside_unbounded_both_bad.out
t_inside_unbounded_both_bad.py
t_inside_unpacked.py
t_inside_unpacked.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_unpacked_param.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_unpacked_param.py
t_inside_unpacked_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inside_wild.py
t_inside_wild.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_2star_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_2star_bad.py
t_inst_2star_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array_bad.py
t_inst_array_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array_connect.py
t_inst_array_connect.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array_inl0.py
t_inst_array_inl1.py
t_inst_array_partial.py
t_inst_array_partial.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_array_slice.py
t_inst_array_slice.v
t_inst_array_struct.py
t_inst_array_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_ccall.py
t_inst_ccall.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_comma.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_comma_inl0.py
t_inst_comma_inl1.py
t_inst_darray.py
t_inst_darray.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_dearray_slice.py
t_inst_dearray_slice.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_dff.py
t_inst_dff.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_dtree.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_dtree_inla.py
t_inst_dtree_inlab.py
t_inst_dtree_inlac.py
t_inst_dtree_inlad.py
t_inst_dtree_inlb.py
t_inst_dtree_inlbc.py
t_inst_dtree_inlbd.py
t_inst_dtree_inlc.py
t_inst_dtree_inlcd.py
t_inst_dtree_inld.py
t_inst_first.py
t_inst_first.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_first_a.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_first_b.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_implicit.py
t_inst_implicit.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_long.py
t_inst_long_bad.out
t_inst_long_bad.py
t_inst_long_bad.v
t_inst_misarray2_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_misarray2_bad.py
t_inst_misarray2_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_misarray_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_misarray_bad.py
t_inst_misarray_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_mism.py
t_inst_mism.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_missing.py
t_inst_missing.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_missing_bad.py
t_inst_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_missing_dot_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_missing_dot_bad.py
t_inst_missing_dot_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_mnpipe.py
t_inst_mnpipe.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_name_long.py
t_inst_name_long.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_nansi.py
t_inst_nansi.v
t_inst_nansi_dup_bad.out
t_inst_nansi_dup_bad.py
t_inst_nansi_dup_bad.v
t_inst_nansi_mism_bad.out
t_inst_nansi_mism_bad.py
t_inst_nansi_mism_bad.v
t_inst_nansi_param.py
t_inst_nansi_param.v
t_inst_noname_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_noname_bad.py
t_inst_noname_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_notunsized.py
t_inst_notunsized.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_overwide.py
t_inst_overwide.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_overwide_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_overwide_bad.py
t_inst_param_comma_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_param_comma_bad.py
t_inst_param_comma_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_param_override_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_param_override_bad.py
t_inst_param_override_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_paren_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_paren_bad.py
t_inst_paren_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_pin_place_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_pin_place_bad.py
t_inst_pin_place_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_pin_realnreal.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_pin_realnreal.py
t_inst_pin_realnreal.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_port_array.py
t_inst_port_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_port_complex_unsup.out Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_inst_port_complex_unsup.py Verilog format 2026-02-05 17:45:24 -05:00
t_inst_port_complex_unsup.v Verilog format 2026-02-05 17:45:24 -05:00
t_inst_port_reverse.py Tests: Add t_inst_port_reverse (#5877) 2026-03-30 19:09:22 -04:00
t_inst_port_reverse.v Tests: Add t_inst_port_reverse (#5877) 2026-03-30 19:09:22 -04:00
t_inst_prepost.py
t_inst_prepost.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_public.py
t_inst_public.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_recurse2_bad.out
t_inst_recurse2_bad.py
t_inst_recurse2_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_recurse_bad.out
t_inst_recurse_bad.py
t_inst_recurse_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_signed.py
t_inst_signed.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_signed1.py
t_inst_signed1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_slice.py
t_inst_slice.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_slice_noinl.py
t_inst_slice_part_select.py
t_inst_slice_part_select.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_sv.py
t_inst_sv.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_tree.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_tree_inl0_pub0.py
t_inst_tree_inl0_pub0.vlt
t_inst_tree_inl0_pub1.py
t_inst_tree_inl0_pub1.vlt
t_inst_tree_inl1_pub0.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_inst_tree_inl1_pub0.vlt
t_inst_tree_inl1_pub1.py Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_inst_tree_inl1_pub1.vlt
t_inst_v2k.py
t_inst_v2k.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_inst_v2k__sub.vi
t_inst_wideconst.py
t_inst_wideconst.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interconnect.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interconnect.py
t_interconnect.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interconnect_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interconnect_bad.py
t_interconnect_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface.py
t_interface.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface1.py
t_interface1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface1_modport.py
t_interface1_modport.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface1_modport_nansi.py
t_interface1_modport_noinl.py
t_interface1_modport_trace.py
t_interface1_noinl.py
t_interface2.py
t_interface2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface2_noinl.py
t_interface_and_struct_pattern.py
t_interface_and_struct_pattern.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_ar2a.py
t_interface_ar2a.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_ar2b.py
t_interface_ar2b.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_ar3.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_ar3.py
t_interface_ar3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array.py
t_interface_array.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array2.py
t_interface_array2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array2_coverage.py
t_interface_array2_noinl.py
t_interface_array3.py
t_interface_array3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array4.py
t_interface_array4.v
t_interface_array_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_bad.py
t_interface_array_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_class_new.py Fix dearray varref scope error (#7530) (#7602) 2026-05-25 17:48:31 -04:00
t_interface_array_class_new.v Fix dearray varref scope error (#7530) (#7602) 2026-05-25 17:48:31 -04:00
t_interface_array_loop.py Tests: Add test cases for interface array access with loop variable index (#1418 tests) (#7011) 2026-02-07 10:06:37 -05:00
t_interface_array_loop.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_array_loop_bad.out Tests: Add test cases for interface array access with loop variable index (#1418 tests) (#7011) 2026-02-07 10:06:37 -05:00
t_interface_array_loop_bad.py Apply 'make format' 2026-02-07 15:07:33 +00:00
t_interface_array_loop_bad.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_array_loop_noinl.py Tests: Add test cases for interface array access with loop variable index (#1418 tests) (#7011) 2026-02-07 10:06:37 -05:00
t_interface_array_modport.py
t_interface_array_modport.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_nocolon.py
t_interface_array_nocolon.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_nocolon_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_nocolon_bad.py
t_interface_array_nocolon_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_noinl.py
t_interface_array_parameter_access.py
t_interface_array_parameter_access.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_array_parameter_aggregate.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_interface_array_parameter_aggregate.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_interface_arraymux.py
t_interface_arraymux.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_asvar_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_asvar_bad.py
t_interface_asvar_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_bind_public.py
t_interface_bind_public.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_colon_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_colon_bad.py
t_interface_colon_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_dearray.py
t_interface_dearray.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_dearray_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_dearray_bad.py
t_interface_dearray_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_derived_type.py
t_interface_derived_type.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_down.py
t_interface_down.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_down_inla.py
t_interface_down_inlab.py
t_interface_down_inlac.py
t_interface_down_inlad.py
t_interface_down_inlb.py
t_interface_down_inlbc.py
t_interface_down_inlbd.py
t_interface_down_inlc.py
t_interface_down_inlcd.py
t_interface_down_inld.py
t_interface_down_noinl.py
t_interface_dups.py
t_interface_dups.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_find.py
t_interface_find.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_find_ifc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_func_impure_bad.out Fix virtual interface method call inlining and IMPURE suppression (#7505) 2026-04-27 16:58:30 -04:00
t_interface_func_impure_bad.py Apply 'make format' 2026-04-27 21:05:49 +00:00
t_interface_func_impure_bad.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_interface_func_no_paren.py Support calling interface functions without parens (#7584) 2026-05-13 08:15:32 -04:00
t_interface_func_no_paren.v Verilog format 2026-05-13 21:00:34 -04:00
t_interface_gen.py
t_interface_gen.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen2.py
t_interface_gen2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen2_collision.py
t_interface_gen2_noinl.py
t_interface_gen3.py
t_interface_gen3.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen3_collision.py
t_interface_gen3_noinl.py
t_interface_gen4.py
t_interface_gen4.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen4_noinl.py
t_interface_gen5.py
t_interface_gen5.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen5_noinl.py
t_interface_gen6.py
t_interface_gen6.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen6_noinl.py
t_interface_gen7.py
t_interface_gen7.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen7_noinl.py
t_interface_gen8.py
t_interface_gen8.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen8_noinl.py
t_interface_gen9.py
t_interface_gen9.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen9_noinl.py
t_interface_gen10.py
t_interface_gen10.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen10_noinl.py
t_interface_gen11.py
t_interface_gen11.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen11_noinl.py
t_interface_gen12.py
t_interface_gen12.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen12_noinl.py
t_interface_gen13.py
t_interface_gen13.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_gen14.py
t_interface_gen14.v
t_interface_gen_noinl.py
t_interface_generic.py Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic.v Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic2.py
t_interface_generic2.v
t_interface_generic_array.py Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic_array.v Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic_array2.py Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic_array2.v Support generic interface arrays (#7604) 2026-06-02 22:28:50 -04:00
t_interface_generic_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_bad.py
t_interface_generic_bad.v
t_interface_generic_bad2.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_bad2.py
t_interface_generic_bad2.v
t_interface_generic_bad3.out
t_interface_generic_bad3.py
t_interface_generic_bad3.v
t_interface_generic_bad4.out
t_interface_generic_bad4.py
t_interface_generic_bad4.v
t_interface_generic_function.py
t_interface_generic_function.v
t_interface_generic_function_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_function_bad.py
t_interface_generic_function_bad.v
t_interface_generic_iface_forward.py Fix generic interface port forwarded to a nested instance (#7454) (#7457) 2026-04-27 21:15:25 -04:00
t_interface_generic_iface_forward.v Fix generic interface port forwarded to a nested instance (#7454) (#7457) 2026-04-27 21:15:25 -04:00
t_interface_generic_iface_param.py
t_interface_generic_iface_param.v
t_interface_generic_mod_param.py
t_interface_generic_mod_param.v
t_interface_generic_modport.py
t_interface_generic_modport.v
t_interface_generic_modport2.py
t_interface_generic_modport2.v
t_interface_generic_modport_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_modport_bad.py
t_interface_generic_modport_bad.v
t_interface_generic_modport_bad2.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_modport_bad2.py
t_interface_generic_modport_bad2.v
t_interface_generic_modport_bad3.out Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_generic_modport_bad3.py
t_interface_generic_modport_bad3.v
t_interface_generic_modport_function.py
t_interface_generic_modport_function.v
t_interface_generic_modport_function2.py
t_interface_generic_modport_function2.v
t_interface_generic_modport_function_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_modport_function_bad.py
t_interface_generic_modport_function_bad.v
t_interface_generic_modport_param.py
t_interface_generic_modport_param.v
t_interface_generic_modport_task.py
t_interface_generic_modport_task.v
t_interface_generic_modport_task2.py
t_interface_generic_modport_task2.v
t_interface_generic_modport_task_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_modport_task_bad.py
t_interface_generic_modport_task_bad.v
t_interface_generic_normal.py
t_interface_generic_normal.v
t_interface_generic_positional.py
t_interface_generic_positional.v
t_interface_generic_submod_param.py
t_interface_generic_submod_param.v
t_interface_generic_task.py
t_interface_generic_task.v
t_interface_generic_task2.py
t_interface_generic_task2.v
t_interface_generic_task_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_interface_generic_task_bad.py
t_interface_generic_task_bad.v
t_interface_hidden.py
t_interface_hidden.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_hierparam_bits.py Fix for HIERPARAM - relax checking (#7570) (#7690) 2026-06-06 11:55:47 -04:00
t_interface_hierparam_bits.v Commentary: Changes update 2026-06-07 08:34:17 -04:00
t_interface_import_param.py
t_interface_import_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_initial.py
t_interface_initial.v
t_interface_inl.py
t_interface_input_port_assign.py Fix false ASSIGNIN on interface input ports driven from outside (#7322) 2026-03-26 12:30:16 -04:00
t_interface_input_port_assign.v Fix false ASSIGNIN on interface input port connections (#7365) 2026-04-02 20:44:48 +02:00
t_interface_input_port_assign_bad.out Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_interface_input_port_assign_bad.py Fix false ASSIGNIN on interface input ports driven from outside (#7322) 2026-03-26 12:30:16 -04:00
t_interface_input_port_assign_bad.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_interface_input_port_assign_noinl.py Fix false ASSIGNIN on interface input ports driven from outside (#7322) 2026-03-26 12:30:16 -04:00
t_interface_localparam.py
t_interface_localparam.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_mismodport_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_mismodport_bad.py
t_interface_mismodport_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_missing_bad.py
t_interface_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport.py
t_interface_modport.v Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_interface_modport_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_bad.py
t_interface_modport_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_coverage.py
t_interface_modport_dir_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_dir_bad.py
t_interface_modport_dir_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_export.out Support modport export/import task prototypes and out-of-block definitions (#7277) 2026-03-18 19:20:34 -04:00
t_interface_modport_export.py
t_interface_modport_export.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_expr.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr.v Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_array.out Verilog format 2026-02-12 18:23:56 -05:00
t_interface_modport_expr_array.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_array.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_modport_expr_bad.out Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_bad.py Apply 'make format' 2026-02-06 11:39:13 +00:00
t_interface_modport_expr_bad.v Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_hier.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_hier.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_modport_expr_hier_noinl.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_nested.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_nested.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_modport_expr_nested_noinl.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_noinl.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_partsel.out Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_partsel.py Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_interface_modport_expr_partsel.v
t_interface_modport_hier.py Fix hierarchical interface/modport issues (#5941) (#6997) 2026-02-05 22:15:30 -05:00
t_interface_modport_hier.v Verilog format 2026-02-12 18:23:56 -05:00
t_interface_modport_hier_noinl.py Fix hierarchical interface/modport issues (#5941) (#6997) 2026-02-05 22:15:30 -05:00
t_interface_modport_import.py
t_interface_modport_import.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_import_export_list.py
t_interface_modport_import_export_list.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_modport_import_noinl.py
t_interface_modport_inl.py
t_interface_modport_noinl.py
t_interface_modport_param.py Fix parameter read through locally-declared interface instance (#7679) 2026-05-28 21:20:49 -04:00
t_interface_modport_param.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_interface_modportlist.py
t_interface_modportlist.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_mp_func.py
t_interface_mp_func.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_mp_func_noinl.py
t_interface_nansi.py
t_interface_nansi.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_ndup_member.py
t_interface_ndup_member.v
t_interface_nest.py
t_interface_nest.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_nest_noinl.py
t_interface_nested_port.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_port.v Verilog format 2026-02-05 17:45:24 -05:00
t_interface_nested_port_array.out Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_interface_nested_port_array.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_port_array.v Verilog format 2026-02-05 17:45:24 -05:00
t_interface_nested_port_array_noinl.out Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_interface_nested_port_array_noinl.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_port_noinl.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_port_type.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_port_type.v Verilog format 2026-02-05 17:45:24 -05:00
t_interface_nested_port_type_noinl.py Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
t_interface_nested_struct_param.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_interface_nested_struct_param.v Verilog format 2026-03-03 07:21:24 -05:00
t_interface_noinl.py
t_interface_notpublic.py
t_interface_notpublic.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_param1.py
t_interface_param1.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_param2.py
t_interface_param2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_param_another_bad.out
t_interface_param_another_bad.py
t_interface_param_another_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_interface_param_dependency.py
t_interface_param_dependency.v
t_interface_param_genblk.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_param_genblk.py
t_interface_param_genblk.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_param_local_access.py
t_interface_param_local_access.v
t_interface_parameter_access.py
t_interface_parameter_access.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_paren_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_paren_missing_bad.py
t_interface_paren_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_parent_scope.py
t_interface_parent_scope.v
t_interface_size_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_size_bad.py
t_interface_size_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_star.py
t_interface_star.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_top_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_top_bad.py
t_interface_top_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_tristate_hier.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_interface_tristate_hier.v Verilog format 2026-03-04 20:12:10 -05:00
t_interface_twod.py
t_interface_twod.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_twod_noinl.py
t_interface_twoports.py Tests: Add t_interface_twoports (#5676) 2026-03-29 21:02:12 -04:00
t_interface_twoports.v Tests: Add t_interface_twoports (#5676) 2026-03-29 21:02:12 -04:00
t_interface_type_ref_internal.py Fix interface internal type reference (#6920) (#6966) 2026-02-18 09:38:42 +05:30
t_interface_type_ref_internal.v Verilog format 2026-02-22 13:50:01 -05:00
t_interface_typedef.py Fix interface data type consistency (#6965) (#7302) 2026-03-21 10:34:36 -04:00
t_interface_typedef.v Fix interface data type consistency (#6965) (#7302) 2026-03-21 10:34:36 -04:00
t_interface_typedef2.py Fix interface data type consistency (#6965) (#7302) 2026-03-21 10:34:36 -04:00
t_interface_typedef2.v Fix interface data type consistency (#6965) (#7302) 2026-03-21 10:34:36 -04:00
t_interface_typedef3.out
t_interface_typedef3.py
t_interface_typedef3.v
t_interface_typedef_bad.out
t_interface_typedef_bad.py
t_interface_typedef_bad.v
t_interface_typo_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_typo_bad.py
t_interface_typo_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_update.py Tests: Add t_interface_update (#2765) 2026-03-29 20:52:29 -04:00
t_interface_update.v Tests: Add t_interface_update (#2765) 2026-03-29 20:52:29 -04:00
t_interface_virtual.out
t_interface_virtual.py
t_interface_virtual.v Fix virtual interface implied comparison with null (#7421). 2026-04-14 07:25:02 -04:00
t_interface_virtual_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_bad.py
t_interface_virtual_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_cond.py
t_interface_virtual_cond.v Fix virtual interface implied comparison with null (#7421). 2026-04-14 07:25:02 -04:00
t_interface_virtual_controlflow.out
t_interface_virtual_controlflow.py
t_interface_virtual_controlflow.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_do_while.py
t_interface_virtual_do_while.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_interface_virtual_for.py
t_interface_virtual_for.v
t_interface_virtual_func_runtime_instance.py Fix virtual interface method call inlining and IMPURE suppression (#7505) 2026-04-27 16:58:30 -04:00
t_interface_virtual_func_runtime_instance.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_interface_virtual_func_static_direct.py Fix virtual interface method call inlining and IMPURE suppression (#7505) 2026-04-27 16:58:30 -04:00
t_interface_virtual_func_static_direct.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_interface_virtual_func_wait.py Fix virtual interface function calls binding to wrong instance (#7363) 2026-04-02 10:53:01 -04:00
t_interface_virtual_func_wait.v Commentary: Changes update 2026-04-03 20:16:23 -04:00
t_interface_virtual_if.py
t_interface_virtual_if.v
t_interface_virtual_inl.py
t_interface_virtual_missing_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_missing_bad.py
t_interface_virtual_missing_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_modport_sel.py Fix modport selection of virtual interface handle (#7321) 2026-03-25 07:16:52 -04:00
t_interface_virtual_modport_sel.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_interface_virtual_nocell.py
t_interface_virtual_nocell.v
t_interface_virtual_opt.py
t_interface_virtual_opt.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_param.py
t_interface_virtual_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_sched_act.out
t_interface_virtual_sched_act.py
t_interface_virtual_sched_act.v Verilog format 2026-05-13 21:00:34 -04:00
t_interface_virtual_sched_ico.out
t_interface_virtual_sched_ico.py
t_interface_virtual_sched_ico.v Verilog format 2026-05-13 21:00:34 -04:00
t_interface_virtual_sched_nba.out
t_interface_virtual_sched_nba.py
t_interface_virtual_sched_nba.v Verilog format 2026-05-13 21:00:34 -04:00
t_interface_virtual_sub_iface.py Fix virtual interface select from sub-interface instance (#7203) (#7370) 2026-04-03 19:04:10 -04:00
t_interface_virtual_sub_iface.v Fix virtual interface select from sub-interface instance (#7203) (#7370) 2026-04-03 19:04:10 -04:00
t_interface_virtual_timing.out
t_interface_virtual_timing.py
t_interface_virtual_timing.v
t_interface_virtual_unused.py
t_interface_virtual_unused.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_unused2.py
t_interface_virtual_unused2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_virtual_unused3.py
t_interface_virtual_unused3.v
t_interface_virtual_while.py
t_interface_virtual_while.v
t_interface_wire_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_wire_bad.py
t_interface_wire_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_wire_bad_param.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_wire_bad_param.py
t_interface_wire_bad_param.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_wrong_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_interface_wrong_bad.py
t_interface_wrong_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_json_only_begin_hier.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_begin_hier.py
t_json_only_begin_hier.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_json_only_debugcheck.py Tests: Fix t_json_only_debugcheck to not need sensitive golden file 2026-03-07 08:35:54 -05:00
t_json_only_first.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_first.py
t_json_only_first.v Add mnemonic to parameter constants in JSON for FSM Coverage (#7531) 2026-05-06 07:25:03 -04:00
t_json_only_flat.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_flat.py
t_json_only_flat_no_inline_mod.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_flat_no_inline_mod.py
t_json_only_flat_no_inline_mod.v
t_json_only_flat_pub_mod.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_flat_pub_mod.py
t_json_only_flat_pub_mod.v
t_json_only_flat_vlvbound.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_flat_vlvbound.py
t_json_only_flat_vlvbound.v Verilog format 2026-05-13 21:00:34 -04:00
t_json_only_output.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_output.py
t_json_only_output.v Verilog format 2026-05-13 21:00:34 -04:00
t_json_only_primary_io.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_primary_io.py
t_json_only_primary_io.v
t_json_only_tag.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_json_only_tag.py
t_json_only_tag.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_jumps_uninit_destructor_call.py
t_jumps_uninit_destructor_call.v Verilog format 2026-03-03 07:21:24 -05:00
t_langext_1.py
t_langext_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_1_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_1_bad.py
t_langext_1d.py
t_langext_1d_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_1d_bad.py
t_langext_2.py
t_langext_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_2_bad.py
t_langext_3.py
t_langext_3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_3_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_3_bad.py
t_langext_4.py
t_langext_4_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_4_bad.py
t_langext_2012ext.py
t_langext_2017ext.py
t_langext_2023ext.py
t_langext_order.py
t_langext_order.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_langext_order_sub.v
t_leak.cpp
t_leak.py
t_leak.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let.py
t_let.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_arg_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_arg_bad.py
t_let_arg_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_recurse_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_recurse_bad.py
t_let_recurse_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_stmt_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_stmt_bad.py
t_let_stmt_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_let_unsup.py
t_let_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib.py
t_lib_clk_vec.py
t_lib_clk_vec.v Internals: Minor cleanups preparing for initialization fixes. 2026-02-16 08:10:29 -05:00
t_lib_nolib.py
t_lib_prof_exec.py
t_lib_prot.py
t_lib_prot.v Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_lib_prot_clk_gated.py
t_lib_prot_comb.py
t_lib_prot_comb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib_prot_delay_bad.out
t_lib_prot_delay_bad.py
t_lib_prot_delay_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib_prot_exe_bad.out
t_lib_prot_exe_bad.py
t_lib_prot_inout_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib_prot_inout_bad.py
t_lib_prot_inout_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib_prot_secret.py
t_lib_prot_secret.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lib_prot_shared.py
t_lint_always_comb_automatic.py
t_lint_always_comb_automatic.v
t_lint_always_comb_bad.out Fix ALWCOMBORDER on variable ordering (#7350) (#7608) 2026-05-26 06:40:55 -04:00
t_lint_always_comb_bad.py
t_lint_always_comb_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_always_comb_iface.py
t_lint_always_comb_iface.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_always_comb_multidriven_bad.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_lint_always_comb_multidriven_bad.py
t_lint_always_comb_multidriven_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_always_comb_multidriven_public_bad.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_lint_always_comb_multidriven_public_bad.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lint_always_comb_order_bad.out Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_lint_always_comb_order_bad.py Apply 'make format' 2026-05-26 16:21:12 +00:00
t_lint_always_comb_order_bad.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_lint_always_ff_multidriven_bad.out Fix signing off new MULTIDRIVEN warnigns on variable (#7672) 2026-05-28 13:34:36 -04:00
t_lint_always_ff_multidriven_bad.py Apply 'make format' 2026-05-27 12:35:09 +00:00
t_lint_always_ff_multidriven_bad.v Fix signing off new MULTIDRIVEN warnigns on variable (#7672) 2026-05-28 13:34:36 -04:00
t_lint_always_ff_multidriven_genif.py Fix MULTIDRIVEN in generates (#7709) 2026-06-03 19:50:56 -04:00
t_lint_always_ff_multidriven_genif.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_lint_assigneqexpr.py
t_lint_assigneqexpr.v Add V3LiftExpr pass to lower impure expressions and calls (#7141) 2026-02-28 22:20:09 +00:00
t_lint_assigneqexpr_bad.out Add V3LiftExpr pass to lower impure expressions and calls (#7141) 2026-02-28 22:20:09 +00:00
t_lint_assigneqexpr_bad.py Add V3LiftExpr pass to lower impure expressions and calls (#7141) 2026-02-28 22:20:09 +00:00
t_lint_badvltpragma_bad.out
t_lint_badvltpragma_bad.py
t_lint_badvltpragma_bad.v
t_lint_blkseq_bad.out
t_lint_blkseq_bad.py
t_lint_blkseq_bad.v
t_lint_blkseq_loop.py
t_lint_blkseq_loop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_blkseq_noedge.py
t_lint_blkseq_noedge.v
t_lint_block_redecl_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_lint_block_redecl_bad.py
t_lint_block_redecl_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_bsspace_bad.out
t_lint_bsspace_bad.py
t_lint_bsspace_bad.v
t_lint_caseincomplete_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_lint_caseincomplete_bad.py
t_lint_caseincomplete_bad.v Fix CASEINCOMPLETE to not warn on `unique0 case` (#7647). 2026-05-23 20:04:54 -04:00
t_lint_cmpconst_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_cmpconst_bad.py
t_lint_cmpconst_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_colonplus_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_colonplus_bad.py
t_lint_colonplus_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_comb_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_lint_comb_bad.py
t_lint_comb_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_comb_use.py
t_lint_comb_use.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_const_func_dpi_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_const_func_dpi_bad.py
t_lint_const_func_dpi_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_const_func_gen_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_const_func_gen_bad.py
t_lint_const_func_gen_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_contassinit_bad.out Fix CONTASSINIT false positive on wire inside two different instantiations 2026-05-30 15:23:02 -04:00
t_lint_contassinit_bad.py Tests: Rename t_lint_contassinit 2026-05-30 14:48:01 -04:00
t_lint_contassinit_bad.v Fix CONTASSINIT false positive on wire inside two different instantiations 2026-05-30 15:23:02 -04:00
t_lint_contassreg_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_lint_contassreg_bad.py
t_lint_contassreg_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_declfilename.py
t_lint_declfilename.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_declfilename_bad.out
t_lint_declfilename_bad.py
t_lint_declfilename_bbox.py
t_lint_declfilename_bbox.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_defparam.py
t_lint_defparam.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_defparam_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_defparam_bad.py
t_lint_didnotconverge_bad.out Change `--converge-limit` default to 10000 (#7209). 2026-03-07 09:05:37 -05:00
t_lint_didnotconverge_bad.py
t_lint_didnotconverge_bad.v
t_lint_didnotconverge_nodbg_bad.out Change `--converge-limit` default to 10000 (#7209). 2026-03-07 09:05:37 -05:00
t_lint_didnotconverge_nodbg_bad.py
t_lint_dtype_compare.py
t_lint_dtype_compare.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_lint_dtype_compare_bad.out Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_lint_dtype_compare_bad.py
t_lint_dtype_compare_bad.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_lint_edge_real_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_edge_real_bad.py
t_lint_edge_real_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_eofnewline.out
t_lint_eofnewline.py
t_lint_eofnewline_bad.out
t_lint_eofnewline_bad.py
t_lint_eofnewline_vlt.py
t_lint_eofnewline_vlt.vlt
t_lint_ftask_output_assign_bad.out
t_lint_ftask_output_assign_bad.py
t_lint_ftask_output_assign_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_functimectl_bad.out
t_lint_functimectl_bad.py
t_lint_functimectl_bad.v
t_lint_genunnamed_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_genunnamed_bad.py
t_lint_genunnamed_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_historical.py
t_lint_historical.v Add NOTREDOP error on reduction and negation operators (#7417) (#7623) (#7624) 2026-05-26 12:20:15 -04:00
t_lint_iface_array_topmodule1.py
t_lint_iface_array_topmodule1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_array_topmodule2.py
t_lint_iface_array_topmodule2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_array_topmodule3.py
t_lint_iface_array_topmodule3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_array_topmodule_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_array_topmodule_bad.py
t_lint_iface_array_topmodule_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_topmodule1.py
t_lint_iface_topmodule1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_topmodule2.py
t_lint_iface_topmodule2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_topmodule3.py
t_lint_iface_topmodule3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_topmodule_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_iface_topmodule_bad.py
t_lint_iface_topmodule_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_ifdepth_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_ifdepth_bad.py
t_lint_ifdepth_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit.py
t_lint_implicit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_bad.py
t_lint_implicit_def_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_def_bad.py
t_lint_implicit_def_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_func_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_func_bad.py
t_lint_implicit_func_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_port.py
t_lint_implicit_port.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_type_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicit_type_bad.py
t_lint_implicit_type_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_implicitstatic_bad.out Change INITIALSTATIC to also report on processes, per IEEE (#7020) 2026-02-08 20:47:12 -05:00
t_lint_implicitstatic_bad.py Internals: Minor cleanups preparing for initialization fixes. 2026-02-16 08:10:29 -05:00
t_lint_implicitstatic_bad.v Internals: Minor cleanups preparing for initialization fixes. 2026-02-16 08:10:29 -05:00
t_lint_import_name2_bad.out
t_lint_import_name2_bad.py
t_lint_import_name2_bad.v
t_lint_import_name_bad.out
t_lint_import_name_bad.py
t_lint_import_name_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_importstar_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_importstar_bad.py
t_lint_importstar_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_in_inc_bad.out Verilog format 2026-06-07 21:55:43 -04:00
t_lint_in_inc_bad.py
t_lint_in_inc_bad.v
t_lint_in_inc_bad_1.vh
t_lint_in_inc_bad_2.vh Verilog format 2026-06-07 21:55:43 -04:00
t_lint_incabspath.py
t_lint_incabspath.v
t_lint_incabspath_bad.out
t_lint_incabspath_bad.py
t_lint_infinite.py
t_lint_infinite.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_infinite_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_infinite_bad.py
t_lint_infinite_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_inherit.py
t_lint_inherit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_input_eq_good.py
t_lint_input_eq_good.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_1.py
t_lint_latch_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_2.py
t_lint_latch_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_3.py
t_lint_latch_3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_4.py
t_lint_latch_4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_5.py
t_lint_latch_5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_6.py
t_lint_latch_6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_7.py
t_lint_latch_7.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_8.py
t_lint_latch_8.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_bad.py
t_lint_latch_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_bad_2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_bad_2.py
t_lint_latch_bad_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_latch_bad_3.out Verilog format 2026-06-07 21:55:43 -04:00
t_lint_latch_bad_3.py
t_lint_latch_bad_3.v Verilog format 2026-06-07 21:55:43 -04:00
t_lint_latch_casei_bad.out
t_lint_latch_casei_bad.py
t_lint_latch_casei_bad.v
t_lint_lint_bad.out
t_lint_lint_bad.py
t_lint_lint_bad.v
t_lint_lint_no.py
t_lint_literal_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_lint_literal_bad.py
t_lint_literal_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_misindent_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_misindent_bad.py
t_lint_misindent_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_lint_mod_paren_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_mod_paren_bad.py
t_lint_mod_paren_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_modmissing.py
t_lint_modmissing.v
t_lint_modport_dir_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_modport_dir_bad.py
t_lint_modport_dir_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_multidriven_bad.out
t_lint_multidriven_bad.py
t_lint_multidriven_bad.v
t_lint_multidriven_coverage_bad.out Optimize Dfg only once, after V3Scope (#7362) 2026-04-09 08:31:12 -04:00
t_lint_multidriven_coverage_bad.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_lint_multidriven_coverage_bad.v Verilog format 2026-03-04 20:12:10 -05:00
t_lint_multidriven_taskcall_bad.out
t_lint_multidriven_taskcall_bad.py
t_lint_multidriven_taskcall_bad.v
t_lint_multiple_msgs.py
t_lint_multiple_msgs.v
t_lint_nolatch_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_nolatch_bad.py
t_lint_nolatch_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_noreturn.py
t_lint_noreturn.v
t_lint_noreturn_bad.out
t_lint_noreturn_bad.py
t_lint_noreturn_param.py
t_lint_noreturn_param.v
t_lint_noreturn_param_bad.out
t_lint_noreturn_param_bad.py
t_lint_noreturn_param_bad.v
t_lint_notredop.py Apply 'make format' 2026-05-26 16:21:12 +00:00
t_lint_notredop_bad.out Add NOTREDOP error on reduction and negation operators (#7417) (#7623) (#7624) 2026-05-26 12:20:15 -04:00
t_lint_notredop_bad.py Apply 'make format' 2026-05-26 16:21:12 +00:00
t_lint_notredop_bad.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_lint_nullport_bad.out
t_lint_nullport_bad.py
t_lint_nullport_bad.v
t_lint_numwidth.py
t_lint_numwidth.v
t_lint_once_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_once_bad.py
t_lint_once_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_only.py
t_lint_only.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_paramnodefault.py
t_lint_paramnodefault.v
t_lint_paramnodefault_bad.out
t_lint_paramnodefault_bad.py
t_lint_paramnodefault_top_bad.out Commentary/Tests: Describe PARAMNODEFAULT as top. 2026-04-18 11:34:19 -04:00
t_lint_paramnodefault_top_bad.py Commentary/Tests: Describe PARAMNODEFAULT as top. 2026-04-18 11:34:19 -04:00
t_lint_paramnodefault_top_bad.v Commentary/Tests: Describe PARAMNODEFAULT as top. 2026-04-18 11:34:19 -04:00
t_lint_pindup_bad.out Support more than one dot in defparam (#7262) 2026-03-24 09:20:46 -04:00
t_lint_pindup_bad.py
t_lint_pindup_bad.v Support more than one dot in defparam (#7262) 2026-03-24 09:20:46 -04:00
t_lint_pinmissing_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pinmissing_bad.py
t_lint_pinmissing_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pinnotfound.py
t_lint_pinnotfound.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pinnotfound_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pinnotfound_bad.py
t_lint_pinnotfound_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pkg_colon_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pkg_colon_bad.py
t_lint_pkg_colon_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pragma_protected.py
t_lint_pragma_protected.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_pragma_protected_bad.out
t_lint_pragma_protected_bad.py
t_lint_pragma_protected_bad.v
t_lint_procassinit_bad.out
t_lint_procassinit_bad.py
t_lint_procassinit_bad.v
t_lint_range_negative_bad.out
t_lint_range_negative_bad.py
t_lint_range_negative_bad.v
t_lint_realcvt_bad.out
t_lint_realcvt_bad.py
t_lint_realcvt_bad.v
t_lint_repeat_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_repeat_bad.py
t_lint_repeat_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_restore_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_restore_bad.py
t_lint_restore_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_restore_prag_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_restore_prag_bad.py
t_lint_restore_prag_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_setout_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_setout_bad.py
t_lint_setout_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_setout_bad_noinl.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_setout_bad_noinl.py
t_lint_sideeffect_bad.out Fix array indexing side effects in compound assignments (#7519) 2026-05-01 20:35:51 -04:00
t_lint_sideeffect_bad.py
t_lint_sideeffect_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_stmtdly_bad.out
t_lint_stmtdly_bad.py
t_lint_stmtdly_bad.v
t_lint_style_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_style_bad.py
t_lint_style_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_style_no.py
t_lint_subout_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_subout_bad.py
t_lint_subout_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_syncasyncnet_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_syncasyncnet_bad.py
t_lint_syncasyncnet_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_top_bad.out
t_lint_top_bad.py
t_lint_top_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unsigned_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unsigned_bad.py
t_lint_unsigned_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unsup_mixed.py
t_lint_unsup_mixed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused.py
t_lint_unused.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_bad.py
t_lint_unused_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_func_bad.out Tests: Improve t_lint_unused_func_bad.v 2026-02-17 06:20:42 -05:00
t_lint_unused_func_bad.py Tests: Cleanup t_cover_assert 2026-02-17 08:47:43 -05:00
t_lint_unused_func_bad.v Tests: Improve t_lint_unused_func_bad.v 2026-02-17 06:20:42 -05:00
t_lint_unused_iface.py
t_lint_unused_iface.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_iface_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_iface_bad.py
t_lint_unused_iface_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_tri.py
t_lint_unused_tri.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_unused_vlt.py
t_lint_unused_vlt.vlt
t_lint_unused_werror_bad.py
t_lint_unusedloop_removed_bad.out Fix exponential expansion in V3Gate (#7550) 2026-05-07 22:01:08 -05:00
t_lint_unusedloop_removed_bad.py
t_lint_unusedloop_removed_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_vcmarker_bad.out
t_lint_vcmarker_bad.py
t_lint_vcmarker_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_waitconst_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_waitconst_bad.py
t_lint_warn_incfile2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_warn_incfile2_bad.py
t_lint_warn_incfile2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_warn_incfile2_bad_b.vh Verilog format 2026-06-07 21:55:43 -04:00
t_lint_warn_line_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_warn_line_bad.py
t_lint_warn_line_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width.py
t_lint_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_arraydecl.py
t_lint_width_arraydecl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_bad.py
t_lint_width_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_cast.py
t_lint_width_cast.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_genfor.py
t_lint_width_genfor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_genfor_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_genfor_bad.py
t_lint_width_genfor_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_shift_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_width_shift_bad.py
t_lint_width_shift_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_lint_widthexpand_docs_bad.out
t_lint_widthexpand_docs_bad.py
t_lint_widthexpand_docs_bad.v
t_lint_wireloop.py With -Wpendantic allow circular assigns 2026-04-23 00:50:12 -04:00
t_lint_wireloop.v With -Wpendantic allow circular assigns 2026-04-23 00:50:12 -04:00
t_lint_wireloop_bad.out With -Wpendantic allow circular assigns 2026-04-23 00:50:12 -04:00
t_lint_wireloop_bad.py With -Wpendantic allow circular assigns 2026-04-23 00:50:12 -04:00
t_lparam_assign_iface_array_typedef.py
t_lparam_assign_iface_array_typedef.v
t_lparam_assign_iface_array_typedef2.py
t_lparam_assign_iface_array_typedef2.v
t_lparam_assign_iface_const.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_const.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_assign_iface_typedef.py
t_lparam_assign_iface_typedef.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef2.py
t_lparam_assign_iface_typedef2.v
t_lparam_assign_iface_typedef3.py
t_lparam_assign_iface_typedef3.v
t_lparam_assign_iface_typedef4.py
t_lparam_assign_iface_typedef4.v Verilog format 2026-02-05 17:45:24 -05:00
t_lparam_assign_iface_typedef_bad.out Improve error message when variable used as data type (#7318) 2026-03-24 01:45:09 -07:00
t_lparam_assign_iface_typedef_bad.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_assign_iface_typedef_nested.py
t_lparam_assign_iface_typedef_nested.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested2.py
t_lparam_assign_iface_typedef_nested2.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested3.py
t_lparam_assign_iface_typedef_nested3.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested4.py
t_lparam_assign_iface_typedef_nested4.v
t_lparam_assign_iface_typedef_nested5.py
t_lparam_assign_iface_typedef_nested5.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested6.py
t_lparam_assign_iface_typedef_nested6.v
t_lparam_assign_iface_typedef_nested_mod1.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mod1.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested_mod2.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mod2.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested_mod3.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mod3.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested_mpkg1.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg1.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested_mpkg2.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg2.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg3.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg3.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg4.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg4.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg5.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_mpkg5.v Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_lparam_assign_iface_typedef_nested_pkg.py
t_lparam_assign_iface_typedef_nested_pkg.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_assign_iface_typedef_nested_pkg2.py
t_lparam_assign_iface_typedef_nested_pkg2.v
t_lparam_assign_iface_typedef_nested_pkg3.py
t_lparam_assign_iface_typedef_nested_pkg3.v
t_lparam_dep_iface0.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface0.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface1.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface1.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface2.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface2.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface3.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface3.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface4.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface4.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface5.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface5.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface6.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface6.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface7.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface7.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface8.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface8.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface9.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface9.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface10.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface10.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface11.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface11.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface12.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface12.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface13.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface13.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface14.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface14.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface15.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface15.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_dep_iface16.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_lparam_dep_iface16.v Verilog format 2026-03-03 07:21:24 -05:00
t_lparam_pkg_assign.py Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
t_lparam_pkg_assign.v Verilog format 2026-03-04 20:12:10 -05:00
t_lparam_pkg_assign2.py Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
t_lparam_pkg_assign2.v Verilog format 2026-03-04 20:12:10 -05:00
t_lparam_pkg_assign3.py Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
t_lparam_pkg_assign3.v Verilog format 2026-03-04 20:12:10 -05:00
t_lparam_pkg_assign4.py Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
t_lparam_pkg_assign4.v Verilog format 2026-03-04 20:12:10 -05:00
t_lparam_pkg_assign5.py Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
t_lparam_pkg_assign5.v Verilog format 2026-03-04 20:12:10 -05:00
t_mailbox.py
t_mailbox.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_array.py
t_mailbox_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_bad.py
t_mailbox_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_class.py
t_mailbox_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_mailbox_concurrent.out
t_mailbox_concurrent.py
t_mailbox_concurrent.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_notiming.py
t_mailbox_notiming.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mailbox_std.py
t_mailbox_struct_param.py Fix mailbox#(packed_struct) type mismatch with parameterized class (#7494) (#7495) 2026-04-28 15:25:37 -04:00
t_mailbox_struct_param.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_mailbox_unbounded.py
t_mailbox_unbounded.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_arith.py
t_math_arith.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_clog2.py
t_math_clog2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_cmp.py
t_math_cmp.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_concat.py
t_math_concat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_concat0.py
t_math_concat0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_concat64.py
t_math_concat64.v
t_math_cond_clean.py
t_math_cond_clean.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_cond_huge.py
t_math_cond_huge.v
t_math_cond_huge_noexpand.py
t_math_cond_short_circuit.py Fix wide conditional short circuiting (#7155). 2026-02-28 09:40:10 -05:00
t_math_cond_short_circuit.v Fix wide conditional short circuiting (#7155). 2026-02-28 09:40:10 -05:00
t_math_const.py
t_math_const.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits.py
t_math_countbits.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits2_bad.py
t_math_countbits2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits_bad.py
t_math_countbits_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_countbits_tri.py
t_math_countbits_tri.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_cv_bitop.out
t_math_cv_bitop.py
t_math_cv_bitop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_cv_concat.py
t_math_cv_concat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_cv_format.py
t_math_cv_format.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_div.py
t_math_div.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_div0.py
t_math_div0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_div_noexpand.py
t_math_divw.py
t_math_divw.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_eq.py
t_math_eq.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_eq_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_eq_bad.py
t_math_eq_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_eq_noexpand.py
t_math_equal.py
t_math_equal.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_imm.py
t_math_imm.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_imm2.cpp
t_math_imm2.py
t_math_imm2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_insert_bound.py
t_math_insert_bound.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_mul.py
t_math_mul.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pick.py
t_math_pick.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_postinc.py Support pre/post increment/decrement inside && and || (#7683) 2026-05-29 19:51:27 -04:00
t_math_postinc.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_math_pow.out
t_math_pow.py
t_math_pow.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow2.py
t_math_pow2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow3.py
t_math_pow3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow4.py
t_math_pow4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow5.py
t_math_pow5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow6.py
t_math_pow6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_pow7.cpp
t_math_pow7.py
t_math_pow7.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_precedence.py
t_math_precedence.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_real.py
t_math_real.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_real_private.py
t_math_real_public.py
t_math_real_public.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_real_random.py
t_math_real_random.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_real_round.py
t_math_real_round.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_red.py
t_math_red.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_red_noexpand.py
t_math_repl.py
t_math_repl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_repl2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_repl2_bad.py
t_math_repl2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_repl3_bad.out
t_math_repl3_bad.py
t_math_repl3_bad.v
t_math_repl_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_repl_bad.py
t_math_repl_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_reverse.py
t_math_reverse.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shift.py
t_math_shift.v Verilog format 2026-06-07 21:55:43 -04:00
t_math_shift_extend.py
t_math_shift_extend.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shift_huge.py
t_math_shift_huge.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shift_noexpand.py
t_math_shift_rep.py
t_math_shift_rep.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shift_sel.py
t_math_shift_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shift_side.py
t_math_shift_side.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shiftls.py
t_math_shiftls.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shiftrs.py
t_math_shiftrs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shiftrs2.py
t_math_shiftrs2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shortcircuit_assocsel.py
t_math_shortcircuit_assocsel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shortcircuit_dynsel.py
t_math_shortcircuit_dynsel.v Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_math_shortreal.py
t_math_shortreal.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shortreal_unsup_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_shortreal_unsup_bad.py
t_math_shortreal_unsup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_sign_extend.py
t_math_sign_extend.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed.py
t_math_signed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed2.py
t_math_signed2.v
t_math_signed3.py
t_math_signed3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed3_noopt.py
t_math_signed4.py
t_math_signed4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed5.py
t_math_signed5.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_math_signed5_timing.py
t_math_signed6.py
t_math_signed6.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_math_signed7.py
t_math_signed7.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed_calc.py
t_math_signed_calc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_signed_noexpand.py
t_math_signed_wire.py
t_math_signed_wire.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_strwidth.py
t_math_strwidth.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_svl.py
t_math_svl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_svl2.py
t_math_svl2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_swap.py
t_math_swap.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_synmul.py
t_math_synmul.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_synmul_mul.v
t_math_tri.py
t_math_tri.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_trig.py
t_math_trig.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_vgen.py
t_math_vgen.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_vliw.py
t_math_vliw.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_vliw_noexpand.py
t_math_wallace.py
t_math_wallace.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_wallace_mul.v
t_math_wide_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_wide_bad.py
t_math_wide_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_wide_inc.py
t_math_wide_inc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_width.py
t_math_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_math_yosys.py
t_math_yosys.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem.py
t_mem.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_banks.py
t_mem_banks.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_big_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_big_bad.py
t_mem_big_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_bound_bad.py
t_mem_bound_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_cond.py
t_mem_cond.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_fifo.py
t_mem_fifo.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_file.py
t_mem_file.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_first.py
t_mem_first.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_func.py
t_mem_func.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_iforder.py
t_mem_iforder.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multi_io.py
t_mem_multi_io.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multi_io2.cpp
t_mem_multi_io2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multi_io2_cc.py
t_mem_multi_io2_sc.py
t_mem_multi_io3.cpp
t_mem_multi_io3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multi_io3_cc.py
t_mem_multi_io3_sc.py
t_mem_multi_ref_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multi_ref_bad.py
t_mem_multi_ref_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multidim.py
t_mem_multidim.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_multidim_Ox.py
t_mem_multidim_trace.py
t_mem_multiwire.py
t_mem_multiwire.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_packed.py
t_mem_packed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_packed_assign.py
t_mem_packed_assign.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_mem_packed_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_packed_bad.py
t_mem_packed_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_packed_noexpand.py
t_mem_shift.py
t_mem_shift.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice.py
t_mem_slice.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_bad.py
t_mem_slice_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_conc_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_conc_bad.py
t_mem_slice_conc_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_dtype_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slice_dtype_bad.py
t_mem_slice_dtype_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_slot.cpp
t_mem_slot.py
t_mem_slot.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_trace_split.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_mem_trace_split.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mem_twoedge.py
t_mem_twoedge.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_metacmt_fargs.py
t_metacmt_fargs.v
t_metacmt_fargs_bad.out
t_metacmt_fargs_bad.py
t_metacmt_fargs_bad.v
t_metacmt_onoff.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_metacmt_onoff.py
t_metacmt_onoff.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_missing_module_pruned.py Fix of ignoring not found pruned modules with encoded names (#7706) 2026-06-03 12:19:33 -04:00
t_missing_module_pruned.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_mod_automatic.py
t_mod_automatic.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_dollar$.py
t_mod_dollar$.v
t_mod_dot.py
t_mod_dot.v
t_mod_dup_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_dup_bad.py
t_mod_dup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_dup_bad_lib.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_dup_bad_lib.py
t_mod_dup_bad_lib.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_dup_ign.py
t_mod_dup_ign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_empty.py
t_mod_empty.v
t_mod_interface_array0.py
t_mod_interface_array0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array0_noinl.py
t_mod_interface_array1.py
t_mod_interface_array1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array1_noinl.py
t_mod_interface_array2.py
t_mod_interface_array2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array2_noinl.py
t_mod_interface_array3.out Support multidimensional arrays of interfaces (#6230) (#7451) 2026-04-22 13:42:10 +02:00
t_mod_interface_array3.py
t_mod_interface_array3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array4.py
t_mod_interface_array4.v Internals: Four state pre-pull (types) (#7520) 2026-04-30 16:56:15 -04:00
t_mod_interface_array4_noinl.py
t_mod_interface_array5.py
t_mod_interface_array5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array6.py
t_mod_interface_array6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_interface_array6_noinl.py
t_mod_interface_clocking.py
t_mod_interface_clocking.v
t_mod_interface_clocking_bad.out Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
t_mod_interface_clocking_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_mod_interface_clocking_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_mod_longname.py
t_mod_longname.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_macromodule.py
t_mod_macromodule.v
t_mod_mod.out Verilog format 2026-05-13 21:00:34 -04:00
t_mod_mod.py
t_mod_mod.v Verilog format 2026-05-13 21:00:34 -04:00
t_mod_nomod.py
t_mod_nomod.v
t_mod_param_class_typedef1.py
t_mod_param_class_typedef1.v
t_mod_param_class_typedef2.py
t_mod_param_class_typedef2.v
t_mod_param_class_typedef3.py
t_mod_param_class_typedef3.v
t_mod_param_class_typedef4.py
t_mod_param_class_typedef4.v
t_mod_param_class_typedef5.py
t_mod_param_class_typedef5.v
t_mod_param_class_typedef6.py
t_mod_param_class_typedef6.v
t_mod_param_class_typedef7.py
t_mod_param_class_typedef7.v
t_mod_recurse.py
t_mod_recurse.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_recurse1.py
t_mod_recurse1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_topmodule.py
t_mod_topmodule.v Verilog format 2026-06-07 21:55:43 -04:00
t_mod_topmodule__underunder.py
t_mod_topmodule__underunder.v
t_mod_topmodule_nest.py
t_mod_topmodule_nest.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_mod_uselib.py
t_mod_uselib.v
t_modport_export_bad.out Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_modport_export_bad.py Support modport export/import task prototypes and out-of-block definitions (#7277) 2026-03-18 19:20:34 -04:00
t_modport_export_bad.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_modport_export_task.py Support modport export/import task prototypes and out-of-block definitions (#7277) 2026-03-18 19:20:34 -04:00
t_modport_export_task.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_module_class_static_method.py
t_module_class_static_method.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_module_input_default_value.py
t_module_input_default_value.v Fix variable conflict when multiple cells with unused input defaults 2026-02-07 18:11:55 -05:00
t_module_input_default_value_1_bad.out
t_module_input_default_value_1_bad.py
t_module_input_default_value_1_bad.v
t_module_input_default_value_2_bad.out
t_module_input_default_value_2_bad.py
t_module_input_default_value_2_bad.v
t_module_input_default_value_3_bad.out
t_module_input_default_value_3_bad.py
t_module_input_default_value_3_bad.v
t_module_input_default_value_noinl.py
t_module_reserved_keyword.out Fix reserved keywords reaching emitter (#7666) 2026-05-28 10:04:14 -04:00
t_module_reserved_keyword.py Fix reserved keywords reaching emitter (#7666) 2026-05-28 10:04:14 -04:00
t_module_reserved_keyword.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_multidriven_class.py
t_multidriven_class.v
t_multidriven_funcret0.py
t_multidriven_funcret0.v
t_multidriven_iface.py
t_multidriven_iface.v
t_multidriven_simple.py
t_multidriven_simple.v
t_multitop1.py
t_multitop1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_multitop1s.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_multitop_sig.cpp
t_multitop_sig.py
t_multitop_sig.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_multitop_sig_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_multitop_sig_bad.py
t_multitop_xref.py
t_multitop_xref.v
t_name_collision.py
t_name_collision.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_nba_assign_on_rhs.py
t_nba_assign_on_rhs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_nba_commit_queue.py Fix NBA to whole arrays (#7583) 2026-05-13 13:20:22 +01:00
t_nba_commit_queue.v Fix NBA to whole arrays (#7583) 2026-05-13 13:20:22 +01:00
t_nba_commit_queue_suspenable.py
t_nba_commit_queue_suspenable.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_nba_hier.py
t_nba_hier.v
t_nba_mixed_update_clocked.py
t_nba_mixed_update_clocked.v
t_nba_mixed_update_comb.py
t_nba_mixed_update_comb.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_nba_shared_flag_reuse.py
t_nba_shared_flag_reuse.v
t_nba_struct_array.py
t_nba_struct_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_net_delay.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_net_delay.py
t_net_delay.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_net_delay_timing.py
t_net_delay_timing_sc.py Fix Ubuntu 26.04.beta issues 2026-03-26 22:33:20 -04:00
t_net_dtype_bad.out
t_net_dtype_bad.py
t_net_dtype_bad.v
t_nettype.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_nettype.py
t_nettype.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_no_sel_assign_merge_in_cpp.py
t_no_sel_assign_merge_in_cpp.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_no_std_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_no_std_bad.py
t_no_std_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_no_std_pkg_bad.py
t_no_trace_top.cpp
t_no_trace_top.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_no_trace_top.py
t_noninl_port_type.py Fix C++ types of non-inlined module ports (#7002) 2026-02-05 14:49:07 +00:00
t_noninl_port_type.v Fix C++ types of non-inlined module ports (#7002) 2026-02-05 14:49:07 +00:00
t_notiming.out Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_notiming.py
t_notiming.v Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_notiming_off.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_notiming_off.py
t_opt_0.py
t_opt_0.v
t_opt_assemble_cellarray.py
t_opt_assemble_cellarray.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_assemble_cellarray_off.py
t_opt_balance_cats.py Optimize mix of Concat/Extend assignments (#7479) 2026-04-23 16:57:43 +01:00
t_opt_balance_cats.v Commentary: Changes update 2026-04-23 12:47:22 -04:00
t_opt_balance_cats_nofunc.py
t_opt_balance_cats_sc.py Optimize mix of Concat/Extend assignments (#7479) 2026-04-23 16:57:43 +01:00
t_opt_cond_double.py Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_opt_cond_double.v Internals: Four-state pre-pull cleanup (#7281) 2026-03-20 12:11:22 -04:00
t_opt_const.cpp
t_opt_const.py Optimize mix of Concat/Extend assignments (#7479) 2026-04-23 16:57:43 +01:00
t_opt_const.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_opt_const_big_or_tree.py
t_opt_const_big_or_tree.v
t_opt_const_cond_redundant.py
t_opt_const_cond_redundant.v
t_opt_const_cov.py
t_opt_const_cov.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_const_dfg.py Optimize more Dfg patterns (#7452) 2026-04-20 18:28:11 +01:00
t_opt_const_no_expand.py
t_opt_const_no_opt.py
t_opt_const_or.py
t_opt_const_or.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_const_red.py Optimize commutative vertex operands in Dfg for better combining 2026-03-25 08:09:37 +00:00
t_opt_const_red.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_const_shortcut.cpp
t_opt_const_shortcut.py
t_opt_const_shortcut.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_dead.cpp Fix dead removing packages with only DPI. 2026-04-21 00:34:20 -04:00
t_opt_dead.py Fix dead removing packages with only DPI. 2026-04-21 00:34:20 -04:00
t_opt_dead.v Fix reference counting for modport task references (#7628) 2026-05-20 14:24:56 -04:00
t_opt_dead_enumpkg.py
t_opt_dead_enumpkg.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_dead_noassigns.py
t_opt_dead_noassigns.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_dead_nocells.py
t_opt_dead_nocells.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_dead_task.py
t_opt_dead_task.v
t_opt_dedupe_clk_gate.py Optimize Ast read references in Dfg directly (#7354) 2026-04-01 10:52:56 +01:00
t_opt_dedupe_clk_gate.v
t_opt_dedupe_clk_gate_off.py
t_opt_dedupe_seq_logic.py
t_opt_dedupe_seq_logic.v
t_opt_expand_keep_widths.out
t_opt_expand_keep_widths.py
t_opt_expand_keep_widths.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_gate_blow_up.py Fix exponential expansion in V3Gate (#7550) 2026-05-07 22:01:08 -05:00
t_opt_gate_blow_up.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_opt_if_array.py
t_opt_if_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_ifjumpgo.py
t_opt_ifjumpgo.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_inline_cfuncs.py
t_opt_inline_cfuncs.v
t_opt_inline_cfuncs_off.py
t_opt_inline_cfuncs_threshold.py
t_opt_inline_cfuncs_threshold.v
t_opt_inline_funcs.py
t_opt_inline_funcs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_inline_funcs_no.py
t_opt_inline_funcs_no_eager.py
t_opt_life.py Internals: Move CReset under Assign (#6978) 2026-01-31 21:27:36 -05:00
t_opt_life.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_life_dpi_read.cpp Fix eliminating assignments to DPI-read vaiables (#7158) 2026-02-28 10:09:01 -05:00
t_opt_life_dpi_read.py Fix eliminating assignments to DPI-read vaiables (#7158) 2026-02-28 10:09:01 -05:00
t_opt_life_dpi_read.v Fix eliminating assignments to DPI-read vaiables (#7158) 2026-02-28 10:09:01 -05:00
t_opt_life_dpi_written.cpp Fix constant propagating DPI-written variables (#7074) 2026-02-13 18:28:14 +00:00
t_opt_life_dpi_written.py Fix constant propagating DPI-written variables (#7074) 2026-02-13 18:28:14 +00:00
t_opt_life_dpi_written.v Verilog format 2026-02-16 23:21:53 -05:00
t_opt_life_off.py
t_opt_life_timing_loop.py
t_opt_life_timing_loop.v
t_opt_lift_expr.py Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
t_opt_lift_expr.v Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
t_opt_localize_deep.py
t_opt_localize_deep.v
t_opt_localize_max_size.py
t_opt_localize_max_size.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_localize_max_size_1.py
t_opt_merge_cond.py Optimize conditional merging across some impure statements (#7159) 2026-03-01 05:47:05 -05:00
t_opt_merge_cond.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_merge_cond_blowup.py
t_opt_merge_cond_blowup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_merge_cond_bug_3409.py
t_opt_merge_cond_bug_3409.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_merge_cond_motion_branch.py
t_opt_merge_cond_motion_branch.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_merge_cond_no_extend.py
t_opt_merge_cond_no_extend.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_merge_cond_no_merge.py
t_opt_merge_cond_no_motion.py
t_opt_merge_cond_relaxed.cpp Optimize conditional merging across some impure statements (#7159) 2026-03-01 05:47:05 -05:00
t_opt_merge_cond_relaxed.out Optimize conditional merging across some impure statements (#7159) 2026-03-01 05:47:05 -05:00
t_opt_merge_cond_relaxed.py Optimize conditional merging across some impure statements (#7159) 2026-03-01 05:47:05 -05:00
t_opt_merge_cond_relaxed.v Verilog format 2026-03-03 07:21:24 -05:00
t_opt_redor.py
t_opt_redor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_slice.py Do not unroll simple array assignments in V3Slice (#7359) 2026-04-01 22:35:29 +01:00
t_opt_slice.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_slice_element_limit.py
t_opt_slice_element_limit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_slice_element_limit_allow_all.py
t_opt_slice_element_limit_bad.out Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_opt_slice_element_limit_bad.py Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_opt_slice_element_limit_default.py
t_opt_slice_no.py
t_opt_subst.py Optimize expanded constant pool words (#6979) 2026-02-01 17:08:49 +00:00
t_opt_subst.v Optimize expanded constant pool words (#6979) 2026-02-01 17:08:49 +00:00
t_opt_subst_off.py Optimize expanded constant pool words (#6979) 2026-02-01 17:08:49 +00:00
t_opt_table_display.out
t_opt_table_display.py
t_opt_table_display.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_enum.out
t_opt_table_enum.py
t_opt_table_enum.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_fsm.py
t_opt_table_fsm.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_packed_array.out
t_opt_table_packed_array.py
t_opt_table_packed_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_real.out
t_opt_table_real.py
t_opt_table_real.v
t_opt_table_real_off.py
t_opt_table_same.out
t_opt_table_same.py
t_opt_table_same.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_signed.out
t_opt_table_signed.py
t_opt_table_signed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_sparse.out
t_opt_table_sparse.py
t_opt_table_sparse.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_sparse_output_split.py
t_opt_table_string.out
t_opt_table_string.py
t_opt_table_string.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_opt_table_struct.out
t_opt_table_struct.py
t_opt_table_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order.py
t_order.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_2d.py
t_order_2d.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_a.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_b.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_blkandnblk_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_blkandnblk_bad.py
t_order_blkandnblk_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_blkloopinit_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_blkloopinit_bad.py
t_order_blkloopinit_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_clkinst.out
t_order_clkinst.py
t_order_clkinst.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_comboclkloop.py
t_order_comboclkloop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_comboloop.py
t_order_comboloop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_doubleloop.py
t_order_doubleloop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_1.cpp
t_order_dpi_export_1.py
t_order_dpi_export_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_2.cpp
t_order_dpi_export_2.py
t_order_dpi_export_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_3.cpp
t_order_dpi_export_3.py
t_order_dpi_export_3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_4.cpp
t_order_dpi_export_4.py
t_order_dpi_export_4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_5.cpp
t_order_dpi_export_5.py
t_order_dpi_export_5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_6.cpp
t_order_dpi_export_6.py
t_order_dpi_export_6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_7.cpp
t_order_dpi_export_7.py
t_order_dpi_export_7.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_dpi_export_8.cpp
t_order_dpi_export_8.py
t_order_dpi_export_8.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_first.py
t_order_first.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_loop_bad.py
t_order_loop_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_multialways.py
t_order_multialways.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_multidriven.cpp
t_order_multidriven.py
t_order_multidriven.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_quad.cpp
t_order_quad.py
t_order_quad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_order_timing.py
t_order_wireloop.py
t_order_wireloop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package.py
t_package.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_abs.py
t_package_abs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_alone_bad.out
t_package_alone_bad.py
t_package_alone_bad.v
t_package_ddecl.py
t_package_ddecl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_ddecl_timing.py
t_package_dimport.py
t_package_dimport.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_dot.py
t_package_dot.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_dup_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_dup_bad.py
t_package_dup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_dup_bad2.out Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
t_package_dup_bad2.py
t_package_dup_bad2.v
t_package_enum.py
t_package_enum.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_export.py
t_package_export.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_export_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_export_bad.py
t_package_export_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_export_bad2.py
t_package_export_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_identifier_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_identifier_bad.py
t_package_identifier_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_import_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_import_bad2.py
t_package_import_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_import_override.py
t_package_import_override.v
t_package_import_param.py
t_package_import_param.v
t_package_local_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_local_bad.py
t_package_local_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_param.py
t_package_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_struct.out
t_package_struct.py
t_package_struct.v
t_package_twodeep.py
t_package_twodeep.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_using_dollar_unit.py
t_package_using_dollar_unit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_package_verb.py
t_package_verb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_packed_concat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_packed_concat_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_packed_concat_bad.py
t_packed_concat_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param.py
t_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array.py
t_param_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array2.py
t_param_array2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array3.py
t_param_array3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array4.py
t_param_array4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array5.py
t_param_array5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array6.py
t_param_array6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array6_noslice.py
t_param_array7.py
t_param_array7.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array8.py
t_param_array8.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_array9.py
t_param_array9.v
t_param_avec.py
t_param_avec.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_bit_sel.py
t_param_bit_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_bracket.py
t_param_bracket.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_cast_default.py Fix parameter default comparison when value contains type cast (#6281) (#7369) 2026-04-04 11:02:20 -04:00
t_param_cast_default.v Commentary: Changes update 2026-04-04 14:42:11 -04:00
t_param_ceil.py
t_param_ceil.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_chain.py
t_param_chain.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_circ_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_circ_bad.py
t_param_circ_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_concat.py
t_param_concat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_concat_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_concat_bad.py
t_param_const_part.py
t_param_const_part.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_ddeep_width.py
t_param_ddeep_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default.py
t_param_default.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_2.py
t_param_default_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_bad.py
t_param_default_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_override.py
t_param_default_override.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_presv_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_default_presv_bad.py
t_param_first.py
t_param_first.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_first_a.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_first_b.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_func.py
t_param_func.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_func2.py
t_param_func2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_hier_bad.out
t_param_hier_bad.py
t_param_hier_bad.v
t_param_if_blk.py
t_param_if_blk.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_implicit_bad.out
t_param_implicit_bad.py
t_param_implicit_bad.v
t_param_implicit_local_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_implicit_local_bad.py
t_param_implicit_local_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_implicit_string.py
t_param_implicit_string.v
t_param_in_func.py
t_param_in_func.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_in_func_noinline.py
t_param_local.py
t_param_local.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_localparam_recompute.py Fix zero-size parameter (#7387 repair) (#7411) (#7418) 2026-04-13 13:19:11 -04:00
t_param_localparam_recompute.v Commentary: Changes update 2026-04-13 21:09:24 -04:00
t_param_long.py
t_param_long.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_mem_attr.py
t_param_mem_attr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_mintypmax.py
t_param_mintypmax.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_module.py
t_param_module.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_named.py
t_param_named.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_named_2.py
t_param_named_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_no_parentheses.py
t_param_no_parentheses.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_noval_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_noval_bad.py
t_param_noval_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_order.py Fix type parameters order (#7615) 2026-05-19 09:52:09 -04:00
t_param_order.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_param_package.py
t_param_package.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_passed_to_port.py
t_param_passed_to_port.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_pattern.py
t_param_pattern.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_pattern2.py
t_param_pattern2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_pattern3.py
t_param_pattern3.v
t_param_pattern_init.py
t_param_pattern_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_pattern_init_scope.py
t_param_pattern_init_scope.v
t_param_public.cpp
t_param_public.py
t_param_public.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_real.py
t_param_real.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_real2.py
t_param_real2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_real2_collision.py
t_param_repl.py
t_param_repl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_resolve_args.py
t_param_resolve_args.v
t_param_scope_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_scope_bad.py
t_param_scope_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_seg.py
t_param_seg.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_sel.py
t_param_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_sel_range1.py Internals: Favor std::swap. No functional change. 2026-03-29 20:33:06 -04:00
t_param_sel_range1.v Internals: Favor std::swap. No functional change. 2026-03-29 20:33:06 -04:00
t_param_sel_range1_bad.out Internals: Favor std::swap. No functional change. 2026-03-29 20:33:06 -04:00
t_param_sel_range1_bad.py Internals: Favor std::swap. No functional change. 2026-03-29 20:33:06 -04:00
t_param_shift.py
t_param_shift.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_slice.py
t_param_slice.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_param_store_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_store_bad.py
t_param_store_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type.py
t_param_type.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type2.py
t_param_type2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type3.py
t_param_type3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type4.py
t_param_type4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type4_collision.py
t_param_type5.py
t_param_type5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type6.py
t_param_type6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad.py
t_param_type_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad2.py
t_param_type_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bad3.py
t_param_type_bad3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_bit.py
t_param_type_bit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_chain.py
t_param_type_chain.v Verilog format 2026-02-05 17:45:24 -05:00
t_param_type_cmp.py
t_param_type_cmp.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_collision.py
t_param_type_dep_chain.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_chain.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_cross_inst.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_cross_inst.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_deep.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_deep.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_hash_norm.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_hash_norm.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_hier.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_hier.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_recompute.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_recompute.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_struct.py Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_dep_struct.v Fix module parameters not re-evaluated upon instantiation (#7463) (#7477) 2026-04-23 12:30:42 -04:00
t_param_type_from_iface_struct.py Fix interface derived types passed as parameters to generate loop module instantiation (#7273) 2026-03-18 09:26:55 -04:00
t_param_type_from_iface_struct.v Verilog format 2026-03-03 07:21:24 -05:00
t_param_type_fwd.py
t_param_type_fwd.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_fwd_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_fwd_bad.py
t_param_type_fwd_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_type_id_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_param_type_id_bad.py
t_param_type_id_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_param_type_struct_member.py Fix for ariane/CVA6 false member call on object error (#7445) (#7450) 2026-04-20 18:21:59 +02:00
t_param_type_struct_member.v Commentary: Changes update 2026-04-21 00:33:40 -04:00
t_param_type_struct_member2.py Fix for ariane/CVA6 false member call on object error (#7445) (#7450) 2026-04-20 18:21:59 +02:00
t_param_type_struct_member2.v Commentary: Changes update 2026-04-21 00:33:40 -04:00
t_param_typedef.py
t_param_typedef.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_typedef2.py
t_param_typedef2.v
t_param_unreachable.py
t_param_unreachable.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_up_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_up_bad.py
t_param_up_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_value.py
t_param_value.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_while.py
t_param_while.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_wide_io.py
t_param_wide_io.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_width.py
t_param_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_param_width_loc_bad.out Fix for Returning an object of the wrong type from a static function of a parameterized class (#5479) (#7387) 2026-04-11 07:49:45 -04:00
t_param_width_loc_bad.py
t_param_width_loc_bad.v Fix parameter default comparison when value contains type cast (#6281) (#7369) 2026-04-04 11:02:20 -04:00
t_param_x_unique.py
t_param_x_unique.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_paramgraph_ascrange_prelim_cfg.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_ascrange_prelim_cfg.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_bisect1.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_bisect1.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_bits_corruption.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_bits_corruption.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_bits_iface_typedef.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_bits_iface_typedef.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_cloned_refdtype.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_cloned_refdtype.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_comined_iface.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_comined_iface.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_comined_iface_stats.py Fix $bits on local struct with chained-interface (#7515) (#7517) 2026-04-30 07:12:11 -04:00
t_paramgraph_iface_array_ports.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_array_ports.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_cfg_zero.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_cfg_zero.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_deadmod.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_deadmod.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_dependency1.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_dependency1.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_dependency2.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_dependency2.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_dependency3.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_dependency3.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_param_from_port.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_param_from_port.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_pin.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_pin.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_port_typedef.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_port_typedef.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_template_mismatch.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_template_mismatch.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_template_mismatch2.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_template_mismatch2.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_template_mismatch3.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_template_mismatch3.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_template_nested.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_iface_template_nested.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_iface_template_nested_stats.py Fix $bits on local struct with chained-interface (#7515) (#7517) 2026-04-30 07:12:11 -04:00
t_paramgraph_member_refdtype.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype_iface_chain.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype_iface_chain.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_member_refdtype_iface_struct.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype_iface_struct.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_member_refdtype_iface_typedef.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype_iface_typedef.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_member_refdtype_pkg_iface.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_member_refdtype_pkg_iface.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_minimal_sibling.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_minimal_sibling.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_paramgraph_nested_iface_typedef.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_nested_iface_typedef.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_nested_iface_typedef_stats.py Fix $bits on local struct with chained-interface (#7515) (#7517) 2026-04-30 07:12:11 -04:00
t_paramgraph_param_not_const.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_param_not_const.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_paramtype_cast.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_paramtype_cast.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_paramtype_default.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_paramtype_default.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_paramtype_range.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_paramtype_range.v Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_refdtype_iface.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_refdtype_iface.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_refdtype_unlinked.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_refdtype_unlinked.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_selbit_dtype.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_selbit_dtype.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_simple_cache_localparam_cfg.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_simple_cache_localparam_cfg.v Verilog format 2026-03-03 07:21:24 -05:00
t_paramgraph_simple_cache_types_if.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_paramgraph_simple_cache_types_if.v Verilog format 2026-03-03 07:21:24 -05:00
t_parse_delay.py
t_parse_delay.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_parse_delay_timing.py
t_parse_eof_attr_bad.out
t_parse_eof_attr_bad.py
t_parse_eof_attr_bad.v
t_parse_eof_qqq_bad.out
t_parse_eof_qqq_bad.py
t_parse_eof_qqq_bad.v
t_parse_eof_str_bad.out
t_parse_eof_str_bad.py
t_parse_eof_str_bad.v
t_parse_sync_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_parse_sync_bad.py
t_parse_sync_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_parse_sync_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_parse_sync_bad2.py
t_parse_sync_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past.py
t_past.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_bad.py
t_past_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_funcs.py
t_past_funcs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_strobe.out
t_past_strobe.py
t_past_strobe.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_past_unsup.py
t_past_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pattern_unsup_xor.out
t_pattern_unsup_xor.py
t_pattern_unsup_xor.v
t_pgo_profoutofdate_bad.out
t_pgo_profoutofdate_bad.py
t_pgo_profoutofdate_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pgo_threads.py
t_pgo_threads_hier.py
t_pgo_threads_hier.vlt
t_pipe_exit_bad.py
t_pipe_exit_bad_pf.pf
t_pipe_filter.out
t_pipe_filter.py
t_pipe_filter.v
t_pipe_filter_inc.vh
t_pipe_filter_pf.pf
t_pli_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pli_bad.py
t_pli_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pli_bbox.py
t_pp_circ_subst_bad.out
t_pp_circ_subst_bad.py
t_pp_circ_subst_bad.v
t_pp_circ_subst_bad2.out
t_pp_circ_subst_bad2.py
t_pp_circdef_bad.py
t_pp_circdef_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_pp_defkwd_bad.out
t_pp_defkwd_bad.py
t_pp_defkwd_bad.v
t_pp_defnettype_bad.out
t_pp_defnettype_bad.py
t_pp_defnettype_bad.v
t_pp_defparen_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_pp_defparen_bad.py
t_pp_defparen_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_pp_display.out
t_pp_display.py
t_pp_display.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_dupdef.py
t_pp_dupdef.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_dupdef_bad.out
t_pp_dupdef_bad.py
t_pp_dupdef_pragma_bad.out
t_pp_dupdef_pragma_bad.py
t_pp_dupdef_pragma_bad.v
t_pp_lib.py
t_pp_lib.v Verilog format 2026-05-13 21:00:34 -04:00
t_pp_lib_inc.vh
t_pp_lib_library.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_line.out
t_pp_line.py
t_pp_line.v
t_pp_line_bad.out
t_pp_line_bad.py
t_pp_line_bad.v
t_pp_misdef_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_misdef_bad.py
t_pp_misdef_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_pragma_bad.out
t_pp_pragma_bad.py
t_pp_pragma_bad.v
t_pp_pragmas.py
t_pp_pragmas.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_recursedef_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_recursedef_bad.py
t_pp_recursedef_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_resetall_bad.out
t_pp_resetall_bad.py
t_pp_resetall_bad.v
t_pp_underline.py Change metacomment extra underscore error to warning (#6968) 2026-01-31 15:16:20 +00:00
t_pp_underline_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_underline_bad.py
t_pp_underline_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_underline_bad_vlt.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_pp_underline_bad_vlt.py Change metacomment extra underscore error to warning (#6968) 2026-01-31 15:16:20 +00:00
t_pp_underline_bad_vlt.vlt Change metacomment extra underscore error to warning (#6968) 2026-01-31 15:16:20 +00:00
t_premit_rw.py
t_premit_rw.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_preproc.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc.py
t_preproc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_cmtend_bad.out
t_preproc_cmtend_bad.py
t_preproc_cmtend_bad.v
t_preproc_comments.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_comments.py
t_preproc_debugi.py
t_preproc_debugi.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_def09.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_def09.py
t_preproc_def09.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_defarg_bad.out
t_preproc_defarg_bad.py
t_preproc_defarg_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_defines.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_defines.py
t_preproc_dos.py
t_preproc_dump_defines.out
t_preproc_dump_defines.py
t_preproc_elsif_bad.out
t_preproc_elsif_bad.py
t_preproc_elsif_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_eof1_bad.out
t_preproc_eof1_bad.py
t_preproc_eof1_bad.v
t_preproc_eof2_bad.out
t_preproc_eof2_bad.py
t_preproc_eof2_bad.v
t_preproc_eof3_bad.out
t_preproc_eof3_bad.py
t_preproc_eof3_bad.v
t_preproc_eof4_bad.out
t_preproc_eof4_bad.py
t_preproc_eof4_bad.v
t_preproc_eof_qqq_bad.out
t_preproc_eof_qqq_bad.py
t_preproc_eof_qqq_bad.v
t_preproc_ifdef.py
t_preproc_ifdef.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_preproc_ifdefend_bad.out
t_preproc_ifdefend_bad.py
t_preproc_ifdefend_bad.v
t_preproc_ifexpr.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_ifexpr.py
t_preproc_ifexpr.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_ifexpr_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_ifexpr_bad.py
t_preproc_ifexpr_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_inc2.vh
t_preproc_inc3.vh
t_preproc_inc4.vh
t_preproc_inc_bad.out
t_preproc_inc_bad.py
t_preproc_inc_bad.v
t_preproc_inc_fn_bad.out
t_preproc_inc_fn_bad.py
t_preproc_inc_fn_bad.v
t_preproc_inc_inc_bad.vh Verilog format 2026-06-07 21:55:43 -04:00
t_preproc_inc_notfound_bad.out Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
t_preproc_inc_notfound_bad.py
t_preproc_inc_notfound_bad.v
t_preproc_inc_recurse_bad.out
t_preproc_inc_recurse_bad.py
t_preproc_inc_recurse_bad.v
t_preproc_kwd.py
t_preproc_kwd.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_preproc_kwd_bad.out
t_preproc_kwd_bad.py
t_preproc_kwd_bad.v
t_preproc_nodef_bad.out
t_preproc_nodef_bad.py
t_preproc_nodef_bad.v
t_preproc_noline.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_noline.py
t_preproc_noline.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_persist.out
t_preproc_persist.py
t_preproc_persist.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_persist2.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_persist_inc.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_preproczero_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_preproczero_bad.py
t_preproc_preproczero_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_resolve.out Verilog format 2026-02-22 13:50:01 -05:00
t_preproc_resolve.py
t_preproc_resolve.v Verilog format 2026-02-22 13:50:01 -05:00
t_preproc_resolve_config.vlt
t_preproc_str_undef.out
t_preproc_str_undef.py
t_preproc_str_undef.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_preproc_strify_join.out
t_preproc_strify_join.py
t_preproc_strify_join.v
t_preproc_stringend_bad.out
t_preproc_stringend_bad.py
t_preproc_stringend_bad.v
t_preproc_ttempty.out
t_preproc_ttempty.py
t_preproc_ttempty.v
t_preproc_undefineall.py
t_preproc_undefineall.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_priority_case.out
t_priority_case.py
t_priority_case.v
t_probdist.py
t_probdist.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_probdist_bad.py
t_probdist_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_probdist_cmake.py
t_process.out
t_process.py
t_process.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_always.py
t_process_always.v
t_process_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_bad.py
t_process_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_compare.py
t_process_compare.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_compare_flat.py Fix process comparison compile error with `--public-flat-rw` (#7592). 2026-05-14 17:52:28 -04:00
t_process_copy_constr.py
t_process_copy_constr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_finished.py
t_process_finished.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_fork.out
t_process_fork.py
t_process_fork.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_fork_block.out
t_process_fork_block.py
t_process_fork_block.v Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
t_process_kill.py
t_process_kill.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_notiming.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_notiming.py
t_process_propagation.py
t_process_propagation.v Verilog format 2026-05-13 21:00:34 -04:00
t_process_rand.py
t_process_rand.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_rand_state.py Support per-process RNG for process::srandom() and object seeding (#7408) (#7415) 2026-04-13 13:58:53 -04:00
t_process_rand_state.v Support per-process RNG for process::srandom() and object seeding (#7408) (#7415) 2026-04-13 13:58:53 -04:00
t_process_rand_state_fork.py Support per-process RNG for process::srandom() and object seeding (#7408) (#7415) 2026-04-13 13:58:53 -04:00
t_process_rand_state_fork.v Support per-process RNG for process::srandom() and object seeding (#7408) (#7415) 2026-04-13 13:58:53 -04:00
t_process_rand_state_public.py Fix process comparison compile error with `--public-flat-rw` (#7592). 2026-05-15 18:22:46 -04:00
t_process_redecl.py
t_process_redecl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_process_self_srand.py Support process::self().srand() (#7695) 2026-06-02 12:00:27 -04:00
t_process_self_srand.v Support process::self().srand() (#7695) 2026-06-02 12:00:27 -04:00
t_process_std.py
t_process_task.py
t_process_task.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_prof.py
t_prof.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_prof_timing.py
t_profc.py
t_profcfunc.gprof
t_profcfunc.out
t_profcfunc.py
t_program.py
t_program.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_program_anonymous.out
t_program_anonymous.py
t_program_anonymous.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_program_extern.py
t_program_extern.v
t_prop_always.py Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always.v Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_bad.out Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_bad.py Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_bad.v Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_unsup.out Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_unsup.py Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_unsup.v Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_prop_always_wide.py Internals: V3AssertNfa: hoist sampled(propp) into a per-property temp (#7502) (#7525) 2026-05-02 12:13:58 -04:00
t_prop_always_wide.v Internals: V3AssertNfa: hoist sampled(propp) into a per-property temp (#7502) (#7525) 2026-05-02 12:13:58 -04:00
t_prop_followed_by.py Support followed-by operators `#-#` and `#=#` in properties (#7523) 2026-05-04 08:10:37 -04:00
t_prop_followed_by.v Support followed-by operators `#-#` and `#=#` in properties (#7523) 2026-05-04 08:10:37 -04:00
t_prop_followed_by_bad.out Support followed-by operators `#-#` and `#=#` in properties (#7523) 2026-05-04 08:10:37 -04:00
t_prop_followed_by_bad.py Support followed-by operators `#-#` and `#=#` in properties (#7523) 2026-05-04 08:10:37 -04:00
t_prop_followed_by_bad.v Support followed-by operators `#-#` and `#=#` in properties (#7523) 2026-05-04 08:10:37 -04:00
t_property.py
t_property.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_accept_reject_on.py Support property abort operators (accept_on, reject_on) (#7578) 2026-05-15 08:38:38 -04:00
t_property_accept_reject_on.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_property_arg_type.py Fix property argument retaining type of the previous variable (#7582) 2026-05-13 07:41:35 -04:00
t_property_arg_type.v Verilog format 2026-05-13 21:00:34 -04:00
t_property_case.py Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_case.v Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_case_bad.out Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_case_bad.py Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_case_bad.v Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_clock_collision_unsup.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_clock_collision_unsup.py Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_clock_collision_unsup.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_default_clocking_sexpr.py Fix internal error on multi-cycle SVA under default clocking (#7472) (#7506) 2026-04-28 06:50:16 -04:00
t_property_default_clocking_sexpr.v Fix internal error on multi-cycle SVA under default clocking (#7472) (#7506) 2026-04-28 06:50:16 -04:00
t_property_disable_iff_midreset.py Fix `disable iff` imply-delay statement linking (#7337) 2026-03-27 14:31:03 -04:00
t_property_disable_iff_midreset.v Fix sampling of hierarchical references (#7386) 2026-04-08 07:09:25 -04:00
t_property_disable_iff_unsup.out Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_disable_iff_unsup.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_disable_iff_unsup.v Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_fail_1.py
t_property_fail_2_bad.py
t_property_if_else.py Support if/if-else in properties (#7692) 2026-06-03 15:54:15 -04:00
t_property_if_else.v Support if/if-else in properties (#7692) 2026-06-03 15:54:15 -04:00
t_property_imply_delay.py Support ## delay on implication RHS in SVA properties (#7284) 2026-03-20 09:53:49 -04:00
t_property_imply_delay.v Support ## delay on implication RHS in SVA properties (#7284) 2026-03-20 09:53:49 -04:00
t_property_local_var_delay.py Fix wrong false assert for property local variables with cycle-delayed consequents (#7587) (#7651) 2026-05-25 20:13:27 +08:00
t_property_local_var_delay.v Fix wrong false assert for property local variables with cycle-delayed consequents (#7587) (#7651) 2026-05-25 20:13:27 +08:00
t_property_local_var_range_unsup.out Fix wrong false assert for property local variables with cycle-delayed consequents (#7587) (#7651) 2026-05-25 20:13:27 +08:00
t_property_local_var_range_unsup.py Fix wrong false assert for property local variables with cycle-delayed consequents (#7587) (#7651) 2026-05-25 20:13:27 +08:00
t_property_local_var_range_unsup.v Fix wrong false assert for property local variables with cycle-delayed consequents (#7587) (#7651) 2026-05-25 20:13:27 +08:00
t_property_named.py
t_property_named.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_negated.py
t_property_negated.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_pexpr.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_pexpr.v Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_pexpr_parse_unsup.out Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_pexpr_parse_unsup.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_pexpr_unsup.out Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_pexpr_unsup.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_pexpr_unsup.v Support property case (#7721) 2026-06-08 15:16:30 -07:00
t_property_recursive_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_recursive_unsup.py
t_property_recursive_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_s_eventually.out Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually.v Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually2.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually2.v Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually_iface.py Fix s_eventually on interface (#7731) (#7733) 2026-06-07 20:46:00 -04:00
t_property_s_eventually_iface.v Verilog format 2026-06-07 21:55:43 -04:00
t_property_s_eventually_unsup.out Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually_unsup.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_s_eventually_unsup.v Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_sexpr.out
t_property_sexpr.py
t_property_sexpr.v
t_property_sexpr2_bad.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr2_bad.py Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_sexpr2_bad.v
t_property_sexpr_bad.out
t_property_sexpr_bad.py
t_property_sexpr_bad.v
t_property_sexpr_cov.dat.out
t_property_sexpr_cov.out
t_property_sexpr_cov.py
t_property_sexpr_cov.v
t_property_sexpr_disable.py Support `disable iff` with sequences (#7090) 2026-02-19 11:33:30 +01:00
t_property_sexpr_disable.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_sexpr_disable_sampled.py Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr_disable_sampled.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr_multi.py
t_property_sexpr_multi.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr_parse_unsup.out Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_property_sexpr_parse_unsup.py
t_property_sexpr_range_delay.py Support ##[M:N] range cycle delay in SVA sequences (#7312) 2026-03-26 10:08:22 -04:00
t_property_sexpr_range_delay.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr_range_delay_bad.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_property_sexpr_range_delay_bad.py Support ##[M:N] range cycle delay in SVA sequences (#7312) 2026-03-26 10:08:22 -04:00
t_property_sexpr_range_delay_bad.v Support ##[*], ##[+], ##[M:$] unbounded cycle delays in SVA properties (#7377) 2026-04-06 16:31:43 -04:00
t_property_sexpr_unsup.out Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_property_sexpr_unsup.py
t_property_sexpr_unsup.v Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_property_unsup.out Support `s_eventually` (#7291) (#7508) 2026-05-04 09:57:03 -04:00
t_property_unsup.py
t_property_unsup.v Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482) 2026-04-27 08:20:34 -04:00
t_property_until.py Support 'until' property (partial #7290) (#7399) 2026-04-10 08:17:54 -04:00
t_property_until.v Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_property_until_implication.py Support weak `until` / `until_with` property operators (#7290) (#7548) (#7685) 2026-06-01 14:50:13 -04:00
t_property_until_implication.v Support weak `until` / `until_with` property operators (#7290) (#7548) (#7685) 2026-06-01 14:50:13 -04:00
t_property_untyped.py
t_property_untyped.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_untyped_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_untyped_unsup.py
t_property_untyped_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_property_var_unsup.out Support property-local variables and sequence match items (#7286) 2026-03-22 06:21:57 -07:00
t_property_var_unsup.py
t_property_var_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_protect_ids.py
t_protect_ids.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_protect_ids_bad.out
t_protect_ids_bad.py
t_protect_ids_bad.v
t_protect_ids_c.cpp
t_protect_ids_debug.py
t_protect_ids_key.out Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_protect_ids_key.py Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_public_clk.cpp
t_public_clk.py
t_public_clk.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_public_seq.cpp
t_public_seq.py
t_public_seq.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_public_unpacked_port.py
t_public_unpacked_port.v Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_pull_bitsel.py Support busses with mix of pullup/pulldown (#7632) 2026-05-21 14:45:40 -04:00
t_pull_bitsel.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_pull_bitsel_conflict_bad.out Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_pull_bitsel_conflict_bad.py Support busses with mix of pullup/pulldown (#7632) 2026-05-21 14:45:40 -04:00
t_pull_bitsel_conflict_bad.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_pull_bitsel_whole.py Support busses with mix of pullup/pulldown (#7632) 2026-05-21 14:45:40 -04:00
t_pull_bitsel_whole.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_queue.py
t_queue.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_arg.py
t_queue_arg.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_assignment.py
t_queue_assignment.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_back.py
t_queue_back.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_bounded.py
t_queue_bounded.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_class.py
t_queue_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_compare.py
t_queue_compare.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_concat_assign.py
t_queue_concat_assign.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_queue_empty_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_empty_bad.py
t_queue_empty_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_empty_pin.py
t_queue_empty_pin.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_inherit_call.py * Fix class extend references between queues (#7195). 2026-03-05 18:04:22 -05:00
t_queue_inherit_call.v Tests: Verilog format 2026-03-07 08:00:45 -05:00
t_queue_init.py
t_queue_init.v
t_queue_insert_at_end.py
t_queue_insert_at_end.v Verilog format 2026-03-03 07:21:24 -05:00
t_queue_method.py
t_queue_method.v Support array map() method (#7307) (#7316) 2026-03-24 02:38:50 -07:00
t_queue_method2_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_method2_bad.py
t_queue_method2_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_method3_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_method3_bad.py
t_queue_method3_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_method_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_method_bad.py
t_queue_method_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_output_func.py
t_queue_output_func.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_persistence.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_persistence_inl.py
t_queue_persistence_noinl.py
t_queue_pushpop.py
t_queue_pushpop.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_slice.py
t_queue_slice.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_slice_assign.py Fix queue slice LHS assignment being silently discarded (#7270) 2026-03-17 15:10:49 -04:00
t_queue_slice_assign.v Commentary: Changes update 2026-03-18 20:35:08 -04:00
t_queue_struct.py
t_queue_struct.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_unknown_sel.py
t_queue_unknown_sel.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_unpacked.py
t_queue_unpacked.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_var_slice.py
t_queue_var_slice.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_queue_void_ops.py
t_queue_void_ops.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_rand_member_mode_deriv.py
t_rand_member_mode_deriv.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_rand_stability_class.py
t_rand_stability_class.v
t_rand_stability_process.py
t_rand_stability_process.v
t_randc.py
t_randc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randc_constraint.py Fix randc cyclic behavior broken with constraints (#7029) (#7035) 2026-02-12 10:58:04 -05:00
t_randc_constraint.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_randc_enum_constraint.py Fix enum variables in constraint solver producing invalid enum values (#7058) (#7065) 2026-02-16 22:44:38 -05:00
t_randc_enum_constraint.v Verilog format 2026-02-16 23:21:53 -05:00
t_randc_extends.py
t_randc_extends.v
t_randc_oversize_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randc_oversize_bad.py
t_randc_oversize_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randc_wide_constraint.py Fix randc solver hang with wide variables (#7068) (#7248) 2026-03-13 07:53:51 -04:00
t_randc_wide_constraint.v Fix randc solver hang with wide variables (#7068) (#7248) 2026-03-13 07:53:51 -04:00
t_randcase.py
t_randcase.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randcase_bad.out
t_randcase_bad.py
t_randcase_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randcase_fork.py
t_randcase_fork.v
t_randomize.py Support constraint imperfect distributions (#6811) (#7168) 2026-03-03 11:23:14 -05:00
t_randomize.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_array.py
t_randomize_array.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_randomize_array_elem_with.py Fix randomize() null pointer dereference (#7026) 2026-02-16 19:43:59 -05:00
t_randomize_array_elem_with.v Fix randomize() null pointer dereference (#7026) 2026-02-16 19:43:59 -05:00
t_randomize_arraysel_membersel.py
t_randomize_arraysel_membersel.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_assoc_size.py Fix associative array size() constraint generating invalid resize() call (#7103) (#7112) 2026-02-20 10:54:02 -05:00
t_randomize_assoc_size.v Verilog format 2026-02-22 13:50:01 -05:00
t_randomize_bbox.py
t_randomize_class_inherit_size_foreach.py Fix inherited rand array with .size + foreach constraint (#7650) 2026-05-24 09:02:01 -04:00
t_randomize_class_inherit_size_foreach.v Fix inherited rand array with .size + foreach constraint (#7650) 2026-05-24 09:02:01 -04:00
t_randomize_complex.py
t_randomize_complex.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_complex_arrays.py
t_randomize_complex_arrays.v
t_randomize_complex_associative_arrays.py
t_randomize_complex_associative_arrays.v
t_randomize_complex_dynamic_arrays.py
t_randomize_complex_dynamic_arrays.v
t_randomize_complex_member_bad.out
t_randomize_complex_member_bad.py
t_randomize_complex_member_bad.v
t_randomize_complex_queue.py
t_randomize_complex_queue.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_complex_typedef.py
t_randomize_complex_typedef.v
t_randomize_derived_this.py Fix internal error when derived class calls this.randomize() with inherited rand members (#7229) (#7234) 2026-03-10 19:03:18 -04:00
t_randomize_derived_this.v Fix internal error when derived class calls this.randomize() with inherited rand members (#7229) (#7234) 2026-03-10 19:03:18 -04:00
t_randomize_dist_conditional.py V3Randomize: Fix dist operator inside ConstraintIf blocks (#7221) (#7224) 2026-03-10 07:06:00 +00:00
t_randomize_dist_conditional.v Commentary: Changes update 2026-03-11 07:10:41 -04:00
t_randomize_dist_foreach.py Support dist and solve...before inside foreach constraints (#7245) (#7253) 2026-03-13 11:05:18 -04:00
t_randomize_dist_foreach.v Support dist and solve...before inside foreach constraints (#7245) (#7253) 2026-03-13 11:05:18 -04:00
t_randomize_dist_implication.py Fix internal error on `dist` under implication operator in constraints (#7440) (#7442) 2026-04-19 08:03:19 +02:00
t_randomize_dist_implication.v Fix internal error on `dist` under implication operator in constraints (#7440) (#7442) 2026-04-19 08:03:19 +02:00
t_randomize_from_randomized_class.py
t_randomize_from_randomized_class.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_inline_funclocal.py
t_randomize_inline_funclocal.v
t_randomize_inline_var_ctl.py
t_randomize_inline_var_ctl.v Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
t_randomize_inline_var_ctl_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_inline_var_ctl_bad.py
t_randomize_inline_var_ctl_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_inline_var_ctl_unsup_1.out Support `obj.randomize(null)` (#7487) (#7509) 2026-04-28 15:31:08 -04:00
t_randomize_inline_var_ctl_unsup_1.py
t_randomize_inline_var_ctl_unsup_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_inline_var_ctl_unsup_2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_inline_var_ctl_unsup_2.py
t_randomize_inline_var_ctl_unsup_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_inside_cond.py Fix V3Assert stale failsp after recursive iteration (#7500) (#7513) 2026-04-29 05:18:12 -04:00
t_randomize_inside_cond.v Commentary: Changes update 2026-05-04 18:00:37 -04:00
t_randomize_local_param.py
t_randomize_local_param.v
t_randomize_local_paramed.py Fix `local::` false error in randomize() with on parameterized class (#6680) (#7293)` 2026-03-20 10:25:46 -04:00
t_randomize_local_paramed.v Commentary: Changes update 2026-03-21 10:56:13 -04:00
t_randomize_member_select.py
t_randomize_member_select.v
t_randomize_method.py
t_randomize_method.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_bad.py
t_randomize_method_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_complex_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_complex_bad.py
t_randomize_method_complex_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_constraints.py
t_randomize_method_constraints.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_nclass_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_nclass_bad.py
t_randomize_method_nclass_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_param.py
t_randomize_method_param.v
t_randomize_method_std.py
t_randomize_method_std.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_method_types_unsup.out Support dynamic array .size in inline randomize() with constraints (#7258) (#7266) 2026-03-16 18:48:36 -04:00
t_randomize_method_types_unsup.py
t_randomize_method_types_unsup.v Fix randomize size+element queue constraints (#5582) (#7225) 2026-03-11 06:51:32 -04:00
t_randomize_method_with.py
t_randomize_method_with.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_method_with_bad.out Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_method_with_bad.py
t_randomize_method_with_bad.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_method_with_scoping.py
t_randomize_method_with_scoping.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_module_var.py
t_randomize_module_var.v Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_randomize_nested_unsup.out Fix constraint 'with' in parameter classes (#7375) 2026-04-04 21:03:44 -04:00
t_randomize_nested_unsup.py
t_randomize_nested_unsup.v
t_randomize_null.py Support `obj.randomize(null)` (#7487) (#7509) 2026-04-28 15:31:08 -04:00
t_randomize_null.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_randomize_null_object.py Fix randomize() on null object handle crashing instead of returning 0 (#7059) (#7066) 2026-02-16 22:43:57 -05:00
t_randomize_null_object.v Verilog format 2026-02-16 23:21:53 -05:00
t_randomize_null_unsup.out Support `obj.randomize(null)` (#7487) (#7509) 2026-04-28 15:31:08 -04:00
t_randomize_null_unsup.py Support `obj.randomize(null)` (#7487) (#7509) 2026-04-28 15:31:08 -04:00
t_randomize_null_unsup.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_randomize_param_with.py
t_randomize_param_with.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_pow2.py Support 2**n expressions in constraint randomization (#7422) 2026-04-14 07:17:53 -04:00
t_randomize_pow2.v Support 2**n expressions in constraint randomization (#7422) 2026-04-14 07:17:53 -04:00
t_randomize_prepost.py
t_randomize_prepost.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_prepost_alone.py
t_randomize_prepost_alone.v
t_randomize_prepost_nested.py Support inherited and nested pre/post_randomize callbacks (#7049) (#7053) 2026-02-11 09:33:57 -08:00
t_randomize_prepost_nested.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_randomize_prepost_super.py
t_randomize_prepost_super.v
t_randomize_queue_constraints.py
t_randomize_queue_constraints.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_queue_size.py
t_randomize_queue_size.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_queue_size_element.py Fix randomize size+element queue constraints (#5582) (#7225) 2026-03-11 06:51:32 -04:00
t_randomize_queue_size_element.v Fix randomize size+element queue constraints (#5582) (#7225) 2026-03-11 06:51:32 -04:00
t_randomize_queue_wide.py
t_randomize_queue_wide.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_rand_mode.py
t_randomize_rand_mode.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_rand_mode_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_rand_mode_bad.py
t_randomize_rand_mode_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_rand_mode_constr.py
t_randomize_rand_mode_constr.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_rand_mode_funcarg.py Fix rand_mode()/constraint_mode() when used as function arguments (#7051) (#7055) 2026-02-11 09:33:09 -08:00
t_randomize_rand_mode_funcarg.v Verilog format 2026-02-12 18:23:56 -05:00
t_randomize_rand_mode_static.py Support rand_mode() on static rand class members (#7484) (#7510) 2026-04-29 17:07:27 -04:00
t_randomize_rand_mode_static.v Support rand_mode() on static rand class members (#7484) (#7510) 2026-04-29 17:07:27 -04:00
t_randomize_rand_mode_unsup.out Support rand_mode() on static rand class members (#7484) (#7510) 2026-04-29 17:07:27 -04:00
t_randomize_rand_mode_unsup.py
t_randomize_rand_mode_unsup.v Support rand_mode() on static rand class members (#7484) (#7510) 2026-04-29 17:07:27 -04:00
t_randomize_randmode_subobj.py Fix rand_mode(0) on sub-object members not preventing solver write-back (#7272) 2026-03-17 15:09:14 -04:00
t_randomize_randmode_subobj.v Fix rand_mode(0) on sub-object members not preventing solver write-back (#7272) 2026-03-17 15:09:14 -04:00
t_randomize_real.py Fix randomize of real (#7115). 2026-02-20 19:39:20 -05:00
t_randomize_real.v Fix randomize of real (#7115). 2026-02-20 19:39:20 -05:00
t_randomize_shift_distribution.py Fix biased bit distribution under value < (1 << N) constraints (#7563) (#7684) 2026-05-30 13:00:35 -04:00
t_randomize_shift_distribution.v Commentary: Changes update 2026-05-30 15:16:41 -04:00
t_randomize_soft.py Support soft constraint solving with last-wins priority (#7124) (#7166) 2026-03-01 15:16:55 -05:00
t_randomize_soft.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_randomize_soft_cross_object.py Fix soft cross-object constraint priority inversion (#7228) (#7233) 2026-03-10 19:02:15 -04:00
t_randomize_soft_cross_object.v Fix soft cross-object constraint priority inversion (#7228) (#7233) 2026-03-10 19:02:15 -04:00
t_randomize_soft_relaxation.py Fix soft constraint relaxation dropping compatible constraints (#7271) 2026-03-18 10:15:50 +01:00
t_randomize_soft_relaxation.v Fix soft constraint relaxation dropping compatible constraints (#7271) 2026-03-18 10:15:50 +01:00
t_randomize_solve_before_foreach.py Support dist and solve...before inside foreach constraints (#7245) (#7253) 2026-03-13 11:05:18 -04:00
t_randomize_solve_before_foreach.v Support dist and solve...before inside foreach constraints (#7245) (#7253) 2026-03-13 11:05:18 -04:00
t_randomize_srandom.py
t_randomize_srandom.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_std_inside_queue.py Fix std::randomize `inside` corrupting class-member queue operand (#7449) (#7456) 2026-04-21 17:37:58 +02:00
t_randomize_std_inside_queue.v Fix std::randomize `inside` corrupting class-member queue operand (#7449) (#7456) 2026-04-21 17:37:58 +02:00
t_randomize_std_param_extends.py Fix std::randomize treated as this.randomize in parameterized-derived class (#7409) (#7416) 2026-04-13 11:34:17 -04:00
t_randomize_std_param_extends.v Commentary: Changes update 2026-04-13 21:09:24 -04:00
t_randomize_std_static.py Fix std::randomize() in static function with static class members (#7167) (#7169) 2026-03-02 05:59:00 -05:00
t_randomize_std_static.v Verilog format 2026-03-03 07:21:24 -05:00
t_randomize_struct_sel.py Fix accessing non-rand struct member in constraints (#6960) 2026-01-28 07:33:16 -05:00
t_randomize_struct_sel.v Verilog format 2026-02-05 17:45:24 -05:00
t_randomize_subobj_enum.py Fix enum range constraints missing for rand variables in sub-objects (#7230) (#7235) 2026-03-11 07:21:40 -04:00
t_randomize_subobj_enum.v Commentary: Changes update 2026-03-12 07:22:33 -04:00
t_randomize_this.py
t_randomize_this.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_this_inline.py Support 'this' keyword inside inline randomize() with {} constraint blocks (#7102) (#7113) 2026-02-20 10:53:34 -05:00
t_randomize_this_inline.v Verilog format 2026-02-22 13:50:01 -05:00
t_randomize_this_with.py
t_randomize_this_with.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_union.py
t_randomize_union.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_union_bad.out
t_randomize_union_bad.py
t_randomize_union_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randomize_unique_elem.py Support unique constraint on explicit array element subsets (#7057) (#7064) 2026-02-16 19:46:46 -05:00
t_randomize_unique_elem.v Verilog format 2026-02-16 23:21:53 -05:00
t_randomize_unpacked_bad.out
t_randomize_unpacked_bad.py
t_randomize_unpacked_bad.v
t_randomize_unpacked_wide.py
t_randomize_unpacked_wide.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randomize_with_constraint.py Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_constraint.v Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_bad.out Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_bad.py Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_bad.v Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_method_bad.out Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_method_bad.py Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_with_idlist_method_bad.v Support randomize() with (identifier_list) {constraint_block} (#7486) (#7507) 2026-04-28 06:10:53 -04:00
t_randomize_within_func.py
t_randomize_within_func.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randsequence.py
t_randsequence.v
t_randsequence_bad.out
t_randsequence_bad.py
t_randsequence_bad.v
t_randsequence_func.py Support randsequence production function ports (#7522) 2026-05-04 11:28:17 -04:00
t_randsequence_func.v Support randsequence production function ports (#7522) 2026-05-04 11:28:17 -04:00
t_randsequence_func_bad.out Support randsequence production function ports (#7522) 2026-05-04 11:28:17 -04:00
t_randsequence_func_bad.py Support randsequence production function ports (#7522) 2026-05-04 11:28:17 -04:00
t_randsequence_func_bad.v Support randsequence production function ports (#7522) 2026-05-04 11:28:17 -04:00
t_randsequence_randjoin.py
t_randsequence_randjoin.v
t_randsequence_recurse.py
t_randsequence_recurse.v
t_randsequence_rs_bad.out
t_randsequence_rs_bad.py
t_randsequence_rs_bad.v
t_randsequence_svtests.py
t_randsequence_svtests.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_randstate_func.py
t_randstate_func.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_randstate_obj.py
t_randstate_obj.v
t_randstate_seed_bad.out
t_randstate_seed_bad.py
t_randstate_seed_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_real_cast.py
t_real_cast.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_real_out_of_bounds.py
t_real_out_of_bounds.v
t_real_param.py
t_real_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_recursive_definition.py Fix false recursive definition error (#6769) (#7118) 2026-03-16 07:31:35 -04:00
t_recursive_definition.v Commentary: Changes update 2026-03-16 22:21:51 -04:00
t_recursive_method.py
t_recursive_method.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_recursive_module_bug.py
t_recursive_module_bug.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_recursive_module_bug_2.py
t_recursive_module_bug_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_recursive_typedef_bad.out Verilog format 2026-02-25 20:28:07 -05:00
t_recursive_typedef_bad.py Change type definition error to show type chain with source context (#7151) 2026-02-25 14:47:13 -05:00
t_recursive_typedef_bad.v Verilog format 2026-03-03 07:21:24 -05:00
t_ref_arg_array_range_dir.py Fix ref-arg type check for packed arrays with differing range directions (#7700) 2026-06-03 12:49:14 -04:00
t_ref_arg_array_range_dir.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_ref_arg_array_range_dir_bad.out Fix ref-arg type check for packed arrays with differing range directions (#7700) 2026-06-03 12:49:14 -04:00
t_ref_arg_array_range_dir_bad.py Fix ref-arg type check for packed arrays with differing range directions (#7700) 2026-06-03 12:49:14 -04:00
t_ref_arg_array_range_dir_bad.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_ref_arg_array_range_dir_noinline.py Fix ref-arg type check for packed arrays with differing range directions (#7700) 2026-06-03 12:49:14 -04:00
t_reloop_cam.py Optimize expanded constant pool words (#6979) 2026-02-01 17:08:49 +00:00
t_reloop_cam.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_reloop_cam_off.py
t_reloop_inlined.py Fix inlining of CFuncs with reloop locals (#7132) 2026-02-23 17:35:15 +00:00
t_reloop_inlined.v Verilog format 2026-02-24 21:03:32 -05:00
t_reloop_local.py
t_reloop_local.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_reloop_offset.out
t_reloop_offset.py
t_reloop_offset.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_reloop_offset_lim_63.py
t_repeat.py
t_repeat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_resize_lvalue.py
t_resize_lvalue.v
t_risefall_delay.py Support rise/fall delays (#7368) 2026-04-07 06:44:52 -04:00
t_risefall_delay.v Fix floating point compile warning on min/max delays. 2026-05-11 19:50:48 -04:00
t_rnd.py
t_rnd.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag.py
t_runflag.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_bad.py
t_runflag_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_bad__a.out
t_runflag_bad__b.out
t_runflag_bad__c.out
t_runflag_bad__d.out
t_runflag_bad__e.out
t_runflag_errorlimit_bad.out
t_runflag_errorlimit_bad.py
t_runflag_errorlimit_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_errorlimit_fatal_bad.out
t_runflag_errorlimit_fatal_bad.py
t_runflag_errorlimit_fatal_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_logfile.out Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile.py Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile.v Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile_debugger.py Support MacOS lldb (#7697) 2026-06-02 16:42:42 -04:00
t_runflag_logfile_debugger.v Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile_error.out Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile_error.py Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile_error.v Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_logfile_open_bad.out Tests: Simplify t_runflag_logfile_open_bad.py (#7669) 2026-05-28 12:43:07 -04:00
t_runflag_logfile_open_bad.py Tests: Simplify t_runflag_logfile_open_bad.py (#7669) 2026-05-28 12:43:07 -04:00
t_runflag_logfile_open_bad.v Add `+verilator+log+file` (#4505) (#7645) 2026-05-27 14:33:19 -04:00
t_runflag_quiet.py
t_runflag_quiet.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_seed.py Fix variable randomization to better differ by seed (#6945) (#6956) 2026-02-01 14:53:33 -05:00
t_runflag_seed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_runflag_seed_zero.py Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_runflag_seed_zero.v Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_runflag_uninit_bad.cpp
t_runflag_uninit_bad.out
t_runflag_uninit_bad.py
t_runflag_uninit_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sampled_expr.py
t_sampled_expr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sampled_expr_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sampled_expr_unsup.py
t_sampled_expr_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sampled_sensitivity.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sampled_sensitivity.py Add UNSUPPORTED on $sampled in sensitivity list (#7093) 2026-02-19 08:36:21 +01:00
t_sampled_sensitivity.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sarif.out
t_sarif.py
t_sarif.sarif.out
t_sarif.v
t_sarif_output.py
t_savable.py
t_savable.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_savable_class_bad.out
t_savable_class_bad.py
t_savable_class_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_savable_coverage_bad.out
t_savable_coverage_bad.py
t_savable_coverage_bad.v
t_savable_format1_bad.out
t_savable_format1_bad.py
t_savable_format2_bad.out
t_savable_format2_bad.py
t_savable_format3_bad.out
t_savable_format3_bad.py
t_savable_open_bad.out
t_savable_open_bad.py
t_savable_open_bad2.cpp
t_savable_open_bad2.py
t_savable_open_bad2.v
t_savable_timing_bad.out
t_savable_timing_bad.py
t_sc_names.cpp
t_sc_names.py
t_sc_names.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sc_vl_assign_sbw.cpp
t_sc_vl_assign_sbw.py
t_sc_vl_assign_sbw.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_scheduling_0.py
t_scheduling_0.v
t_scheduling_1.py
t_scheduling_1.v
t_scheduling_2.py
t_scheduling_2.v Verilog format 2026-05-13 21:00:34 -04:00
t_scheduling_3.py
t_scheduling_3.v Verilog format 2026-05-13 21:00:34 -04:00
t_scheduling_4.py
t_scheduling_4.v Verilog format 2026-05-13 21:00:34 -04:00
t_scheduling_5.py
t_scheduling_5.v Verilog format 2026-05-13 21:00:34 -04:00
t_scheduling_6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_scheduling_7.py
t_scheduling_7.v
t_scheduling_beforeTrig_life_opt.py Fix of event triggering with V3Life (#6932 effect) (#7068 partial) (#7072) 2026-02-13 11:01:19 -05:00
t_scheduling_beforeTrig_life_opt.v Verilog format 2026-02-16 23:21:53 -05:00
t_scheduling_different_edges.py Fix event triggering (#6932) 2026-02-11 10:35:59 -08:00
t_scheduling_different_edges.v Verilog format 2026-02-12 18:23:56 -05:00
t_scheduling_initial_event.py
t_scheduling_initial_event.v
t_scheduling_many_clocks.py
t_scheduling_many_clocks.v Commentary: Fix non-grammar 2026-03-11 19:53:23 -04:00
t_scheduling_virt_iface_array.py Tests: Add virtual interface scheduling convergence tests (#7323 test) (#7536) 2026-05-05 19:17:53 -04:00
t_scheduling_virt_iface_array.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_scheduling_virt_iface_class.py Tests: Add virtual interface scheduling convergence tests (#7323 test) (#7536) 2026-05-05 19:17:53 -04:00
t_scheduling_virt_iface_class.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_scheduling_virt_iface_converge_simple.py Tests: Add virtual interface scheduling convergence tests (#7323 test) (#7536) 2026-05-05 19:17:53 -04:00
t_scheduling_virt_iface_converge_simple.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_scheduling_virt_iface_dual_vif.py Tests: Add virtual interface scheduling convergence tests (#7323 test) (#7536) 2026-05-05 19:17:53 -04:00
t_scheduling_virt_iface_dual_vif.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_scheduling_virt_iface_nonvirt_write.py Tests: Add virtual interface scheduling convergence tests (#7323 test) (#7536) 2026-05-05 19:17:53 -04:00
t_scheduling_virt_iface_nonvirt_write.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_scheduling_zero_delay.out Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_scheduling_zero_delay.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_scheduling_zero_delay.v Verilog format 2026-02-16 23:21:53 -05:00
t_scope_cxx_equal_to.py
t_scope_cxx_equal_to.v
t_scope_map.cpp
t_scope_map.py
t_scope_map.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sdf_annotate_unsup.out
t_sdf_annotate_unsup.py
t_sdf_annotate_unsup.v
t_select_2d.py
t_select_2d.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_ascending.py
t_select_ascending.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_msb.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_msb.py
t_select_bad_msb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range.py
t_select_bad_range.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range2.py
t_select_bad_range2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range3.py
t_select_bad_range3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range4.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range4.py
t_select_bad_range4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range5.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range5.py
t_select_bad_range5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range6.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_range6.py
t_select_bad_range6.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_tri.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_tri.py
t_select_bad_tri.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_width0.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bad_width0.py
t_select_bad_width0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bound1.py
t_select_bound1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bound2.py
t_select_bound2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_bound3.py
t_select_bound3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_c.py
t_select_c.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_crazy.py
t_select_crazy.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_index.py
t_select_index.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_index2.py
t_select_index2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_lhs_oob.py
t_select_lhs_oob.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_lhs_oob2.py
t_select_lhs_oob2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_little.py
t_select_little.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_little_pack.py
t_select_little_pack.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_loop.py
t_select_loop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_mul_extend.py
t_select_mul_extend.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_negative.py
t_select_negative.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_out_of_range.py
t_select_out_of_range.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_param.py
t_select_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_plus.py
t_select_plus.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_plus_mul_pow2.py
t_select_plus_mul_pow2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_plusloop.py
t_select_plusloop.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_runtime_range.py
t_select_runtime_range.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_set.py
t_select_set.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_select_sideeffect.py
t_select_sideeffect.v Tests: Fix race in t_select_sideeffect. 2026-03-16 22:23:07 -04:00
t_select_width.py
t_select_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_selextract_in_paramextends.py
t_selextract_in_paramextends.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_selrange_iface_type_param.py Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
t_selrange_iface_type_param.v Verilog format 2026-03-03 07:21:24 -05:00
t_semaphore.py
t_semaphore.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_semaphore_always.py
t_semaphore_always.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_semaphore_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_semaphore_bad.py
t_semaphore_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_semaphore_class.py
t_semaphore_class.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_semaphore_class_nested.py
t_semaphore_class_nested.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_semaphore_concurrent.out
t_semaphore_concurrent.py
t_semaphore_concurrent.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_semaphore_fair.out IEEE-compliant, fair `std::semaphore` (#7435) (#7605) 2026-05-18 11:11:42 +02:00
t_semaphore_fair.py IEEE-compliant, fair `std::semaphore` (#7435) (#7605) 2026-05-18 11:11:42 +02:00
t_semaphore_fair.v IEEE-compliant, fair `std::semaphore` (#7435) (#7605) 2026-05-18 11:11:42 +02:00
t_semaphore_fifo_block.out IEEE-compliant, fair `std::semaphore` (#7435) (#7605) 2026-05-18 11:11:42 +02:00
t_semaphore_fifo_block.py IEEE-compliant, fair `std::semaphore` (#7435) (#7605) 2026-05-18 11:11:42 +02:00
t_semaphore_fifo_block.v Commentary: Changes update 2026-05-19 21:40:08 -04:00
t_semaphore_std.py
t_sequence_bool_ops.py Support boolean and/or in sequence expressions (#7285) 2026-03-24 08:56:14 -04:00
t_sequence_bool_ops.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_first_match.py Support first_match sequence operator (#7392) 2026-04-09 11:42:43 -04:00
t_sequence_first_match.v Support first_match sequence operator (#7392) 2026-04-09 11:42:43 -04:00
t_sequence_first_match_unsup.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_first_match_unsup.py
t_sequence_first_match_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sequence_intersect.py Support sequence intersect operator (#7374) 2026-04-08 09:31:54 +02:00
t_sequence_intersect.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_intersect_len_warn.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_intersect_len_warn.py Support sequence intersect operator (#7374) 2026-04-08 09:31:54 +02:00
t_sequence_intersect_len_warn.v Support sequence intersect operator (#7374) 2026-04-08 09:31:54 +02:00
t_sequence_intersect_range_unsup.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_intersect_range_unsup.py Support sequence intersect operator (#7374) 2026-04-08 09:31:54 +02:00
t_sequence_intersect_range_unsup.v Support sequence intersect operator (#7374) 2026-04-08 09:31:54 +02:00
t_sequence_local_var.py Support property-local variables and sequence match items (#7286) 2026-03-22 06:21:57 -07:00
t_sequence_local_var.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_nonconst_delay_unsup.out Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_nonconst_delay_unsup.py Support boolean and/or in sequence expressions (#7285) 2026-03-24 08:56:14 -04:00
t_sequence_nonconst_delay_unsup.v Support boolean and/or in sequence expressions (#7285) 2026-03-24 08:56:14 -04:00
t_sequence_ref.py Support named sequence declarations and instances in assertions (#7283) 2026-03-20 10:24:46 -04:00
t_sequence_ref.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_ref_unsup.out Support named sequence declarations and instances in assertions (#7283) 2026-03-20 10:24:46 -04:00
t_sequence_ref_unsup.py
t_sequence_ref_unsup.v
t_sequence_sexpr_throughout.py Support sequence 'throughout' operator (#7378) 2026-04-06 17:12:22 -04:00
t_sequence_sexpr_throughout.v Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430) 2026-04-20 07:43:18 +02:00
t_sequence_sexpr_unsup.out Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_sequence_sexpr_unsup.py
t_sequence_sexpr_unsup.v Support SVA goto repetition with range `[->M:N]` (#7569) 2026-05-11 07:07:51 -04:00
t_sequence_unused.py
t_sequence_unused.v
t_sequence_within.py Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_sequence_within_bad.out Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within_bad.py Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within_bad.v Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within_range_unsup.out Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within_range_unsup.py Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_sequence_within_range_unsup.v Support sequence within operator (#7461) 2026-04-23 05:47:24 +02:00
t_setuphold.py
t_setuphold.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_simulate_array.py
t_simulate_array.v
t_slice_cmp.py
t_slice_cmp.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_slice_cond.py
t_slice_cond.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_slice_cond_2d_side_effect.py
t_slice_cond_2d_side_effect.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_slice_cond_side_effect.py
t_slice_cond_side_effect.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_slice_init.py
t_slice_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_slice_struct_array_modport.py
t_slice_struct_array_modport.v
t_specparam.py
t_specparam.v Allow constant expressions without parentheses in PATHPULSE$ declaration (#7199) 2026-03-11 06:01:33 -04:00
t_split_var_0.py
t_split_var_0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_0.vlt
t_split_var_1_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_1_bad.py
t_split_var_1_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_2_trace.out Change automatic variables to not be traced. 2026-02-17 01:38:39 -05:00
t_split_var_2_trace.py
t_split_var_3_wreal.py
t_split_var_3_wreal.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_4.py
t_split_var_4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_5.py
t_split_var_auto.py
t_split_var_auto.v
t_split_var_issue.py
t_split_var_issue.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_types.py
t_split_var_types.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_split_var_xref.py
t_split_var_xref.v
t_srandom_class_dep.py
t_srandom_class_dep.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stack_check.py
t_stack_check.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stack_check_fail.py
t_stacktrace.py Fix `$stacktrace` to decode through internal-c++filt (#6985). 2026-02-02 19:01:24 -05:00
t_stacktrace.v Fix `$stacktrace` to decode through internal-c++filt (#6985). 2026-02-02 19:01:24 -05:00
t_static_dup_name.py
t_static_dup_name.v Verilog format 2026-05-13 21:00:34 -04:00
t_static_elab.py
t_static_elab.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_static_function_in_class.py
t_static_function_in_class.v
t_static_function_in_class_noparen.py Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
t_static_function_in_class_noparen.v Verilog format 2026-03-03 07:21:24 -05:00
t_static_in_loop.py Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_static_in_loop.v Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_static_init_pkg_order.py Fix static initialization order for packages with class hierarchies (#7324) 2026-03-27 12:53:45 -04:00
t_static_init_pkg_order.v Commentary: Changes update 2026-03-27 21:41:52 -04:00
t_static_task_args.py Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_static_task_args.v Commentary: Changes update 2026-05-09 19:22:47 -04:00
t_static_task_args_bad.out Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_static_task_args_bad.py Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_static_task_args_bad.v Support writing to inout in fork after timing (#7345) 2026-05-08 16:35:34 -04:00
t_static_var_xref.py Fix access to static variable inside function (#7474) (#7475) 2026-04-23 11:17:14 -04:00
t_static_var_xref.v Fix access to static variable inside function (#7474) (#7475) 2026-04-23 11:17:14 -04:00
t_std_identifier.py
t_std_identifier.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_identifier_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_identifier_bad.py
t_std_pkg_bad.out
t_std_pkg_bad.py
t_std_pkg_bad.v
t_std_process_self.py
t_std_process_self.v Verilog format 2026-03-03 07:21:24 -05:00
t_std_process_self_std.py
t_std_randomize.py
t_std_randomize.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_randomize_assoc.py Support std::randomize() for queue, dynamic array, and associative array variables (#7044) 2026-02-10 18:24:25 -08:00
t_std_randomize_assoc.v Verilog format 2026-02-12 18:23:56 -05:00
t_std_randomize_bad1.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_randomize_bad1.py
t_std_randomize_bad1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_randomize_mod.py
t_std_randomize_mod.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_std_randomize_no_args.py
t_std_randomize_no_args.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_std_randomize_queue.py Support std::randomize() for queue, dynamic array, and associative array variables (#7044) 2026-02-10 18:24:25 -08:00
t_std_randomize_queue.v Verilog format 2026-02-12 18:23:56 -05:00
t_std_randomize_static_member.py Apply 'make format' 2026-04-26 10:29:56 +00:00
t_std_randomize_static_member.v Commentary: Changes update 2026-04-28 17:56:24 -04:00
t_std_randomize_unsup_unq_arr.out Verilog format 2026-02-12 18:23:56 -05:00
t_std_randomize_unsup_unq_arr.py Fix unique constraint in derived class (#7022) 2026-02-09 09:56:38 -05:00
t_std_randomize_unsup_unq_arr.v Verilog format 2026-02-12 18:23:56 -05:00
t_std_randomize_with.py
t_std_randomize_with.v Verilog format 2026-05-13 21:00:34 -04:00
t_std_waiver.py
t_std_waiver.v
t_std_waiver_no.py
t_std_waiver_no.v
t_stmt_incr_unsup.out Fix array indexing side effects in compound assignments (#7519) 2026-05-01 20:35:51 -04:00
t_stmt_incr_unsup.py
t_stmt_incr_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stop_bad.out
t_stop_bad.py
t_stop_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stop_winos_bad.out
t_stop_winos_bad.py
t_stop_winos_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream.py
t_stream.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream2.py
t_stream2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream3.py
t_stream3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream4.py
t_stream4.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream5.py
t_stream5.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_bad.out
t_stream_bad.py
t_stream_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_stream_bitqueue.py
t_stream_bitqueue.v Fix too-short bit pack returning wrong value (#7111). 2026-02-20 22:25:02 -05:00
t_stream_crc_example.py
t_stream_crc_example.v
t_stream_dynamic.py
t_stream_dynamic.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_integer_type.py
t_stream_integer_type.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_queue.py Support streaming on queues (#7597) 2026-05-20 19:14:02 -04:00
t_stream_queue.v Support streaming on queues (#7597) 2026-05-20 19:14:02 -04:00
t_stream_queue_interface.py Support streaming on queues (#7597) 2026-05-20 19:14:02 -04:00
t_stream_queue_interface.sv Support streaming on queues (#7597) 2026-05-20 19:14:02 -04:00
t_stream_string_array.py
t_stream_string_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_struct.py
t_stream_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_trace.out
t_stream_trace.py Support streaming on queues (#7597) 2026-05-20 19:14:02 -04:00
t_stream_trace.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_stream_type.py
t_stream_type.v
t_stream_unpack.py
t_stream_unpack.v Support streaming into 2-D unpacked arrays (#7686) (#7687) 2026-05-30 22:08:32 -04:00
t_stream_unpack_lhs.py Fix StreamR LHS assertion when source is narrower than destination (#7276) (#7282) 2026-03-18 15:15:27 -04:00
t_stream_unpack_lhs.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_stream_unpack_narrower.out
t_stream_unpack_narrower.py
t_stream_unpack_narrower.v
t_stream_unpack_wider.py
t_stream_unpack_wider.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_2_uneq_assign.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_2_uneq_assign.py
t_strength_2_uneq_assign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_assignments_constants.py
t_strength_assignments_constants.v
t_strength_buf_not.py Support strength on buf/not 2026-05-31 08:54:29 -04:00
t_strength_buf_not.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_strength_equal_strength.py
t_strength_equal_strength.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_highz.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_highz.py
t_strength_highz.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_strong1_strong1_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_strong1_strong1_bad.py
t_strength_strong1_strong1_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_strongest_constant.py
t_strength_strongest_constant.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_strength_strongest_non_tristate.py
t_strength_strongest_non_tristate.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string.py
t_string.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_add_bad.out
t_string_add_bad.py
t_string_add_bad.v
t_string_byte.py
t_string_byte.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_convert2.py
t_string_convert2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_dyn_num.out
t_string_dyn_num.py
t_string_dyn_num.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_octal.py
t_string_octal.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_repl.py
t_string_repl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_sel.py
t_string_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_size.out
t_string_size.py
t_string_size.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_to_bit.py
t_string_to_bit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_type_methods.py
t_string_type_methods.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_type_methods_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_string_type_methods_bad.py
t_string_type_methods_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_anon.py
t_struct_anon.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_array.py
t_struct_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_array_assignment.py
t_struct_array_assignment.v Verilog format 2026-05-13 21:00:34 -04:00
t_struct_array_assignment_delayed.py
t_struct_array_assignment_delayed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_assign.out
t_struct_assign.py
t_struct_assign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_circ_bad.out
t_struct_circ_bad.py
t_struct_circ_bad.v
t_struct_clk.py
t_struct_clk.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_cons_cast.py
t_struct_cons_cast.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_contents.py
t_struct_contents.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_contents_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_contents_bad.py
t_struct_contents_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_genfor.py
t_struct_genfor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_init.py
t_struct_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_init_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_init_bad.py
t_struct_init_trace.py
t_struct_initial_assign.py Fix inlining static initializer in V3Gate (#7503) 2026-04-27 16:58:38 +01:00
t_struct_initial_assign.v Fix inlining static initializer in V3Gate (#7503) 2026-04-27 16:58:38 +01:00
t_struct_initial_assign_public.py
t_struct_literal_param.py
t_struct_literal_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_negate.py
t_struct_negate.v
t_struct_nest.py
t_struct_nest.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_nest_uarray.py
t_struct_nest_uarray.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_notfound_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_notfound_bad.py
t_struct_notfound_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_packed_init_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_packed_init_bad.py Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_struct_packed_init_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_packed_sysfunct.py
t_struct_packed_sysfunct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_packed_value_list.py
t_struct_packed_value_list.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_packed_write_read.py
t_struct_packed_write_read.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_param.py
t_struct_param.v
t_struct_param_overflow.py
t_struct_param_overflow.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_pat.py
t_struct_pat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_pat_toomany_bad.out
t_struct_pat_toomany_bad.py
t_struct_pat_toomany_bad.v
t_struct_pat_width.py
t_struct_pat_width.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_port.py
t_struct_port.v Verilog format 2026-05-13 21:00:34 -04:00
t_struct_portsel.py
t_struct_portsel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_type_bad.out Improve error message when variable used as data type (#7318) 2026-03-24 01:45:09 -07:00
t_struct_type_bad.py
t_struct_type_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_unaligned.py
t_struct_unaligned.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_unpacked.py
t_struct_unpacked.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_unpacked_array.py
t_struct_unpacked_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_unpacked_clean.py
t_struct_unpacked_clean.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_unpacked_init.py Support structure initial values (#6130). 2026-02-01 13:44:20 -05:00
t_struct_unpacked_init.v Support structure initial values (#6130). 2026-02-01 13:44:20 -05:00
t_struct_unpacked_init_param.py Support structure initial values (#6130). 2026-02-01 13:44:20 -05:00
t_struct_unpacked_init_param.v Support structure initial values (#6130). 2026-02-01 13:44:20 -05:00
t_struct_unpacked_param.py
t_struct_unpacked_param.v
t_struct_unused.py
t_struct_unused.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_struct_with_param_class.py Fix internal error when handling typedefs containing parameterized class type members (#7635) (#7661) 2026-05-27 12:17:49 -07:00
t_struct_with_param_class.v Fix internal error when handling typedefs containing parameterized class type members (#7635) (#7661) 2026-05-27 12:17:49 -07:00
t_structu_dataType_assignment.py Deprecate `--structs-packed` (#7222). 2026-03-21 10:59:27 -04:00
t_structu_dataType_assignment.v Verilog format 2026-06-07 21:55:43 -04:00
t_structu_dataType_assignment_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_structu_dataType_assignment_bad.py Deprecate `--structs-packed` (#7222). 2026-03-21 10:59:27 -04:00
t_structu_dataType_assignment_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_structu_wide.py
t_structu_wide.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sv_bus_mux_demux.py
t_sv_bus_mux_demux.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sv_conditional.py
t_sv_conditional.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sv_cpu.py
t_sv_cpu.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_delta_monitor.out
t_sys_delta_monitor.py
t_sys_delta_monitor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_autoflush.py
t_sys_file_basic.out
t_sys_file_basic.py
t_sys_file_basic.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_basic_cover_expr.out
t_sys_file_basic_cover_expr.py
t_sys_file_basic_input.dat
t_sys_file_basic_mcd.out
t_sys_file_basic_mcd.py
t_sys_file_basic_mcd.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_basic_mcd_test2_0.dat
t_sys_file_basic_mcd_test2_1.dat
t_sys_file_basic_mcd_test2_2.dat
t_sys_file_basic_mcd_test5.dat
t_sys_file_basic_uz.dat
t_sys_file_basic_uz.out
t_sys_file_basic_uz.py
t_sys_file_basic_uz.v
t_sys_file_eof.py
t_sys_file_eof.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_null.py
t_sys_file_null.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_scan.dat
t_sys_file_scan.out Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_sys_file_scan.py Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_sys_file_scan.v Tests: Misc string format test improvements 2026-03-11 19:58:52 -04:00
t_sys_file_scan2.dat
t_sys_file_scan2.py
t_sys_file_scan2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_file_zero.py
t_sys_file_zero.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_fmonitor.out
t_sys_fmonitor.py
t_sys_fmonitor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_fread.out
t_sys_fread.py
t_sys_fread.v
t_sys_fscanf_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_fscanf_bad.py
t_sys_fscanf_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_fstrobe.out
t_sys_fstrobe.py
t_sys_fstrobe.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_get_init_seed.py Support `$get_initial_random_seed` (#7056) (#7069). 2026-02-16 05:57:44 -05:00
t_sys_get_init_seed.v Support `$get_initial_random_seed` (#7056) (#7069). 2026-02-16 05:57:44 -05:00
t_sys_monitor.out
t_sys_monitor.py
t_sys_monitor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_monitor_changes.out
t_sys_monitor_changes.py
t_sys_monitor_changes.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_monitor_dotted.py
t_sys_monitor_dotted.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_plusargs.py
t_sys_plusargs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_plusargs_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_plusargs_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_psprintf.py
t_sys_psprintf.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_psprintf_warn_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_psprintf_warn_bad.py
t_sys_queue_unsup.out
t_sys_queue_unsup.py
t_sys_queue_unsup.v
t_sys_random.py Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_random.v Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_random_concat.py Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_random_concat.v Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_random_seed.py Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_random_seed.v Tests: Renames. No test change. 2026-02-20 18:54:36 -05:00
t_sys_readmem.py
t_sys_readmem.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_4state.mem
t_sys_readmem_4state.py
t_sys_readmem_4state.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_4state__b.mem.out
t_sys_readmem_4state__h.mem.out
t_sys_readmem_align_h.mem
t_sys_readmem_assoc.py
t_sys_readmem_assoc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_assoc__c_b.mem.out
t_sys_readmem_assoc__w_h.mem.out
t_sys_readmem_assoc_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_assoc_bad.py
t_sys_readmem_assoc_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_b.mem
t_sys_readmem_b_8.mem
t_sys_readmem_bad_addr.mem
t_sys_readmem_bad_addr.out
t_sys_readmem_bad_addr.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_readmem_bad_addr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_bad_addr2.mem
t_sys_readmem_bad_addr2.out
t_sys_readmem_bad_addr2.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_readmem_bad_addr2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_bad_digit.mem
t_sys_readmem_bad_digit.out
t_sys_readmem_bad_digit.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_readmem_bad_digit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_bad_end.mem
t_sys_readmem_bad_end.out
t_sys_readmem_bad_end.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_readmem_bad_end.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_bad_end2.mem
t_sys_readmem_bad_notfound.out
t_sys_readmem_bad_notfound.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_sys_readmem_bad_notfound.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_c.mem
t_sys_readmem_eof.py
t_sys_readmem_eof.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_readmem_h.mem
t_sys_readmem_i.mem
t_sys_readmem_q.mem
t_sys_readmem_s.mem
t_sys_sformat.py
t_sys_sformat.v Fix display of %m in non-first argument (#7574). 2026-05-11 08:18:34 -04:00
t_sys_sformat_noopt.py
t_sys_sscanf.py
t_sys_sscanf.v Fix skipping nulls in $sscanf (#7689). 2026-05-31 17:25:28 -04:00
t_sys_strobe.out
t_sys_strobe.py
t_sys_strobe.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_system.py
t_sys_system.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_time.py
t_sys_time.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_sys_writemem.gold1.mem
t_sys_writemem.gold2.mem
t_sys_writemem.gold3.mem
t_sys_writemem.gold4.mem
t_sys_writemem.gold5.mem
t_sys_writemem.gold6.mem
t_sys_writemem.gold7.mem
t_sys_writemem.gold8.mem
t_sys_writemem.py
t_sys_writemem_b.gold1.mem
t_sys_writemem_b.gold2.mem
t_sys_writemem_b.gold3.mem
t_sys_writemem_b.gold4.mem
t_sys_writemem_b.gold5.mem
t_sys_writemem_b.gold6.mem
t_sys_writemem_b.gold7.mem
t_sys_writemem_b.gold8.mem
t_sys_writemem_b.py
t_tagged.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged.py
t_tagged.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_case.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_case.py
t_tagged_case.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_if.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_if.py
t_tagged_if.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_union.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tagged_union.py
t_tagged_union.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_threads_counter.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_threads_counter_0.py
t_threads_counter_1.py
t_threads_counter_2.py
t_threads_counter_4.py
t_threads_crazy.py
t_threads_crazy.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_threads_crazy_context.py
t_threads_nondeterminism.py
t_time.py
t_time.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_time_literals.py
t_time_literals.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_time_param.py
t_time_param.v
t_time_passed.out
t_time_passed.py
t_time_passed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_time_print.out
t_time_print.py
t_time_print.v
t_time_sc.v
t_time_sc_10_ns.out
t_time_sc_10_ns.py
t_time_sc_bad.out
t_time_sc_bad.py
t_time_sc_bad_mt.out
t_time_sc_bad_mt.py
t_time_sc_fs.out
t_time_sc_fs.py
t_time_sc_ms.out
t_time_sc_ms.py
t_time_sc_ns.out
t_time_sc_ns.py
t_time_sc_sec.out
t_time_sc_sec.py
t_time_sc_us.out
t_time_sc_us.py
t_time_sscanf.py
t_time_sscanf.v
t_time_stamp64.py
t_time_stamp64.v
t_time_stamp_double.py
t_time_timeunit.py
t_time_timeunit.v
t_time_vpi.v
t_time_vpi_1fs1fs.out
t_time_vpi_1fs1fs.py
t_time_vpi_1ms10ns.out
t_time_vpi_1ms10ns.py
t_time_vpi_1ns1ns.out
t_time_vpi_1ns1ns.py
t_time_vpi_1ps1fs.out
t_time_vpi_1ps1fs.py
t_time_vpi_1s10ns.out
t_time_vpi_1s10ns.py
t_time_vpi_1us1ns.out
t_time_vpi_1us1ns.py
t_time_vpi_10ms10ns.out
t_time_vpi_10ms10ns.py
t_time_vpi_100s10ms.out
t_time_vpi_100s10ms.py
t_time_vpi_c.cpp
t_timescale_default.out
t_timescale_default.py
t_timescale_default.v
t_timescale_lint.py
t_timescale_lint.v
t_timescale_lint2.py
t_timescale_lint_bad.out
t_timescale_lint_bad.py
t_timescale_nobackwards.out
t_timescale_nobackwards.py
t_timescale_nobackwards.v
t_timescale_parse.cpp
t_timescale_parse.py
t_timescale_parse.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timescale_parse_bad.out
t_timescale_parse_bad.py
t_timescale_parse_bad.v
t_timescale_udp.py
t_timescale_udp.v
t_timescale_unit.out
t_timescale_unit.py
t_timescale_unit.v
t_timing_always.py
t_timing_always.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_at_class.py
t_timing_at_class.v
t_timing_at_dtype_bad.out
t_timing_at_dtype_bad.py
t_timing_at_dtype_bad.v
t_timing_class.py
t_timing_class.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_class_static_delay.py
t_timing_class_static_delay.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_clkgen1.py
t_timing_clkgen1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_clkgen2.py
t_timing_clkgen2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_clkgen3.py
t_timing_clkgen3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_clkgen_sc.py Fix Ubuntu 26.04.beta issues 2026-03-26 22:33:20 -04:00
t_timing_clkgen_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_clkgen_unsup.py
t_timing_cmake.py
t_timing_debug1.out Fix `$finish` to immediately stop executing code from non-final blocks (#7213 partial) (#7390). 2026-04-09 17:49:57 -04:00
t_timing_debug1.py
t_timing_debug2.out Fix `$finish` to immediately stop executing code from non-final blocks (#7213 partial) (#7390). 2026-04-09 17:49:57 -04:00
t_timing_debug2.py
t_timing_delay_callstack.py
t_timing_delay_callstack.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_dlyassign.py
t_timing_dlyassign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_dpi_unsup.cpp
t_timing_dpi_unsup.out Verilog format 2026-05-13 21:00:34 -04:00
t_timing_dpi_unsup.py
t_timing_dpi_unsup.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_dynscope.py
t_timing_dynscope.v Verilog format 2026-03-03 07:21:24 -05:00
t_timing_eval_act.out Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_timing_eval_act.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_timing_eval_act.v Verilog format 2026-02-12 18:23:56 -05:00
t_timing_events.py
t_timing_events.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_finish.py
t_timing_finish.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_timing_finish2.py
t_timing_finish2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_finish3.py Fix time to not advance after `$finish` (#7095). 2026-02-18 19:36:36 -05:00
t_timing_finish3.v Fix time to not advance after `$finish` (#7095). 2026-02-18 19:36:36 -05:00
t_timing_fork_comb.py Fix #0 delays to control fork scheduling (#6730 repair) (#6891) 2026-02-17 21:51:11 -05:00
t_timing_fork_comb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_fork_comb_bad.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_timing_fork_join.out
t_timing_fork_join.py
t_timing_fork_join.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_fork_join_forkproc.out
t_timing_fork_join_forkproc.py
t_timing_fork_many.py
t_timing_fork_many.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_fork_nba.py
t_timing_fork_nba.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_fork_no_timing_ctrl.py
t_timing_fork_no_timing_ctrl.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_fork_rec_method.py
t_timing_fork_rec_method.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_fork_taskcall.py
t_timing_fork_taskcall.v
t_timing_func_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_func_bad.py
t_timing_func_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_func_fork.py
t_timing_func_fork.v
t_timing_func_fork_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_timing_func_fork_bad.py Tests: Remove some vltmt-scenario runs. 2026-03-18 19:20:52 -04:00
t_timing_func_fork_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_func_join.py
t_timing_func_join.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_initial_always.py
t_timing_initial_always.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_initial_edge.py
t_timing_initial_edge.v
t_timing_intra_assign.out
t_timing_intra_assign.py
t_timing_intra_assign.v Fix optimizations of assignments with timing controls (#7718) 2026-06-05 12:21:21 -04:00
t_timing_intra_assign_func.py
t_timing_intra_assign_func.v
t_timing_intra_assign_nolocalize.py
t_timing_localevent.py
t_timing_localevent.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_long.py
t_timing_nba_1.py
t_timing_nba_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_nba_2.py
t_timing_nba_2.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_timing_nested_assignment_on_lhs.py
t_timing_nested_assignment_on_lhs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_off.py
t_timing_off.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_osc.out
t_timing_osc.py
t_timing_osc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_pong.py
t_timing_pong.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_protect.py
t_timing_reentry.py
t_timing_reentry.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_sched.py
t_timing_sched.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_timing_sched_if.py
t_timing_sched_if.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_timing_sched_nba.py
t_timing_sched_nba.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_timing_split.py
t_timing_split.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_strobe.out
t_timing_strobe.py
t_timing_strobe.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_suspend_two_retrigger.py
t_timing_suspend_two_retrigger.v
t_timing_suspendable_deep.py
t_timing_suspendable_deep.v
t_timing_timescale.out Fix time to not advance after `$finish` (#7095). 2026-02-18 19:36:36 -05:00
t_timing_timescale.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_timing_timescale.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_unset1.out Support `s_until` and `s_until_with` (IEEE1800-2023 16.12.12) (#7722) 2026-06-08 14:08:04 -04:00
t_timing_unset1.py
t_timing_unset2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_unset2.py
t_timing_unset3.out Verilog format 2026-05-13 21:00:34 -04:00
t_timing_unset3.py
t_timing_wait1.py
t_timing_wait1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_wait2.out
t_timing_wait2.py
t_timing_wait2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_wait3.py
t_timing_wait3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_wait_long.out
t_timing_wait_long.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_timing_wait_long.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_write_expr.py
t_timing_write_expr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_timing_zerodly.py
t_timing_zerodly.v Verilog format 2026-05-13 21:00:34 -04:00
t_timing_zerodly_2.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_timing_zerodly_2.v Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_timing_zerodly_consecutive.py
t_timing_zerodly_consecutive.v
t_to_string_emitted.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted.v Verilog format 2026-05-13 21:00:34 -04:00
t_to_string_emitted_class_hierarchy.v Verilog format 2026-05-13 21:00:34 -04:00
t_to_string_emitted_class_hierarchy1.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy1.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy2.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy2.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy3.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy3.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy4.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy4.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy5.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy5.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy6.out Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_class_hierarchy6.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_to_string_emitted_not.py Optimize emitting to_string() for compiler speedup (#7468) 2026-05-12 09:49:21 -04:00
t_trace_abort.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_abort_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_abort_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_abort_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_abort_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_abort_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_abort_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_abort_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_abort_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_array_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_array_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_cc_fst_portable.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_cc_saif_portable.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_array_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_array_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_array_sc_fst_portable.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_ascendingrange.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_ascendingrange_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ascendingrange_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_ascendingrange_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_ascendingrange_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_ascendingrange_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ascendingrange_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_ascendingrange_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ascendingrange_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_basic_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_fst_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_saif_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_basic_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_cc_vcd_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_basic_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_fst_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_saif_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_basic_sc_vcd_cmake.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_binary.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_binary.py
t_trace_binary.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_binary_flag_off.out
t_trace_binary_flag_off.py
t_trace_cat.cpp Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_fst.cpp
t_trace_cat_opennext_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_opennext_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_fst_part_0000.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_cat_renew_fst_part_0100.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_cat_renew_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_saif_part_0000.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_saif_part_0100.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_vcd_part_0000.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_renew_vcd_part_0100.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_fst_part_0000.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_cat_reopen_fst_part_0100.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_cat_reopen_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_saif_part_0000.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_saif_part_0100.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_vcd_part_0000.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_cat_reopen_vcd_part_0100.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_class.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_class.py
t_trace_class.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_complex.v Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_fst_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_saif_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_cc_vcd_portable.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_default_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_default_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_params_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_fst_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_params_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_saif_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_params_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_cc_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_params_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_params_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_params_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_structs_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_fst_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_structs_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_saif_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_structs_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_cc_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_structs_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_complex_structs_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_complex_structs_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_decoration.py
t_trace_decoration.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_depth.py
t_trace_depth.v
t_trace_dumporder_bad.out
t_trace_dumporder_bad.py
t_trace_dumporder_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_dumpvars_dyn.cpp Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_dumpvars_dyn_0_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_dumpvars_dyn_0_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_0_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_0_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_0_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_dumpvars_dyn_0_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_1_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_dumpvars_dyn_1_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_1_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_1_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_dumpvars_dyn_1_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_dumpvars_dyn_1_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_empty.py
t_trace_empty.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_ena.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_ena_cc.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ena_cc.py
t_trace_ena_sc.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ena_sc.py
t_trace_enum.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_enum_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_enum_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_enum_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_enum_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_enum_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_enum_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_event.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_event_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_event_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_event_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_event_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_event_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_event_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_flag_off.out
t_trace_flag_off.py
t_trace_flag_off.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_hier.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_default_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_fst_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_saif_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_default_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_cc_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_default_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_default_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_default_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_notop_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_notop_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_notop_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_notop_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_notop_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_notop_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_block_statefulpkg_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_block_statefulpkg_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_hier_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_fst_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_saif_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_hier_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_huge_array.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_huge_array.v Commentary: Changes update 2026-04-15 17:46:08 -04:00
t_trace_iface.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_iface.py
t_trace_iface.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_interface_ref.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_interface_ref_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_interface_ref_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_interface_ref_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_vcd_inla.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_vcd_inlab.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_vcd_inlb.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_cc_vcd_noinl.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_interface_ref_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_interface_ref_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_jumps_do_while_saif.out
t_trace_jumps_do_while_saif.py
t_trace_lib.v Commentary: Changes update 2026-03-26 21:43:16 -04:00
t_trace_lib_as_top.cpp Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top.v Verilog format 2026-05-13 21:00:34 -04:00
t_trace_lib_as_top_fst.out Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top_fst.py Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top_saif.out Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top_saif.py Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top_vcd.out Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_as_top_vcd.py Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
t_trace_lib_default_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_lib_default_fst.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_default_saif.out Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_default_saif.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_default_vcd.out Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_default_vcd.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_notop_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_lib_notop_fst.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_notop_saif.out Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_notop_saif.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_notop_vcd.out Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_lib_notop_vcd.py Tests: Add t_trace_lib* tests 2026-03-21 22:21:00 +00:00
t_trace_max.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_max.py
t_trace_max.v
t_trace_max_default.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_max_default.py
t_trace_multi_bad.out
t_trace_multi_bad.py
t_trace_multi_bad.v
t_trace_no_top_name.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_no_top_name2.cpp Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_no_top_name2_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_no_top_name2_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name2_saif.out
t_trace_no_top_name2_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name2_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_no_top_name2_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_no_top_name_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_no_top_name_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_no_top_name_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_noflag_bad.out
t_trace_noflag_bad.py
t_trace_noflag_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_noflag_bad_c.cpp
t_trace_off_cc.py
t_trace_off_sc.py
t_trace_open_wrong_order_bad.cpp
t_trace_open_wrong_order_bad.out Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
t_trace_open_wrong_order_bad.py
t_trace_open_wrong_order_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_packed_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_packed_struct_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_packed_struct_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_packed_struct_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_packed_struct_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_packed_struct_cc_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_packed_struct_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_packed_struct_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_packed_struct_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_param_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_param_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_param_override.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_param_override.py
t_trace_param_override.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_param_saif.out
t_trace_param_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_param_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_param_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_primitive_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_primitive_cc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive_cc_vcd.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_primitive_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_primitive_sc_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_public.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_public.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_public_func.cpp
t_trace_public_func.py
t_trace_public_func.vlt
t_trace_public_func_vlt.py
t_trace_public_sig.cpp
t_trace_public_sig.py
t_trace_public_sig.vlt
t_trace_public_sig_vlt.py
t_trace_rollover.cpp
t_trace_rollover.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_rollover.py
t_trace_sc_empty.py
t_trace_sc_empty.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_scope_no_inline.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_scope_no_inline.py
t_trace_scope_no_inline.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_scope_no_inline.vlt
t_trace_scope_vlt.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_scope_vlt.py
t_trace_scope_vlt.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_scope_vlt.vlt
t_trace_scstruct.py
t_trace_scstruct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_split_cfuncs.py
t_trace_split_cfuncs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_split_cfuncs_dpi_export.py
t_trace_split_cfuncs_dpi_export.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_split_struct.v Commentary: Changes update 2026-04-15 17:46:08 -04:00
t_trace_split_struct_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_split_struct_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_split_struct_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_split_struct_saif.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_split_struct_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_split_struct_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_string.py
t_trace_string.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_string_fst.py
t_trace_string_fst_sc.py
t_trace_struct_alias.v Commentary: Changes update 2026-04-15 17:46:08 -04:00
t_trace_struct_alias_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_alias_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_alias_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_alias_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst.v Commentary: Changes update 2026-04-15 17:46:08 -04:00
t_trace_struct_array_multi_inst_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_cc_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_cc_saif.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_cc_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_sc_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_struct_array_multi_inst_sc_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_timescale.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_timescale.py
t_trace_timescale.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_timing.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_timing1.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_timing1.py
t_trace_timing1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_timing_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_timing_fst.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_timing_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_timing_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_timing_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_timing_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_a.v Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_b.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_trace_two_cc.cpp Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_dump_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_dump_cc_fst.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_trace_two_dump_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_dump_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_dump_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_dump_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_dump_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_dump_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_hdr_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_hdr_cc_fst.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_trace_two_hdr_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_hdr_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_hdr_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_hdr_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_hdr_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_hdr_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_port_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_port_cc_fst.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_trace_two_port_cc_saif.out Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_port_cc_saif.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_port_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_port_cc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_port_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_two_port_sc_vcd.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_two_sc.cpp Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
t_trace_type_alias.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_alias.v Commentary: Changes update 2026-04-15 17:46:08 -04:00
t_trace_type_dupes.v Fix false MULTIDRIVEN warning on always_ff variables (#7351) (#7621) 2026-05-27 08:34:11 -04:00
t_trace_type_dupes_default_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_default_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_default_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_default_saif.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_default_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_default_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_saif.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_type_dupes_structs_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_ub_misaligned_address.py
t_trace_ub_misaligned_address.v
t_trace_var_kind.v Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_saif.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_saif.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_cc_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_sc_fst.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_sc_fst.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_sc_vcd.out Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_var_kind_sc_vcd.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
t_trace_vif_class_clk.py Apply 'make format' 2026-04-22 16:13:36 +00:00
t_trace_vif_class_clk.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_trace_vif_class_clk_multi.py Apply 'make format' 2026-04-22 16:13:36 +00:00
t_trace_vif_class_clk_multi.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_trace_wide_initial_wait.out Fix coroutine trace setters (#7078 repair) (#7296) 2026-03-20 09:23:32 -07:00
t_trace_wide_initial_wait.py Fix coroutine trace setters (#7078 repair) (#7296) 2026-03-20 09:23:32 -07:00
t_trace_wide_initial_wait.v Fix coroutine trace setters (#7078 repair) (#7296) 2026-03-20 09:23:32 -07:00
t_trace_wide_struct.py
t_trace_wide_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_and_eqcase.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_and_eqcase.py
t_tri_and_eqcase.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_array.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_array.py
t_tri_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_array_bufif.py
t_tri_array_bufif.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_array_pull.py
t_tri_array_pull.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_assigndly_nba.py Support Z non-blocking assignment (#7192) (#496) (#7197) 2026-03-04 22:39:05 -05:00
t_tri_assigndly_nba.v Tests: Verilog format 2026-03-07 08:00:45 -05:00
t_tri_clocking.py
t_tri_clocking.v
t_tri_compass_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_compass_bad.py
t_tri_compass_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_cond_eqcase_with_1.py
t_tri_cond_eqcase_with_1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_dangle.py
t_tri_dangle.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_eqcase.py
t_tri_eqcase.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_eqcase_input.py
t_tri_eqcase_input.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_gate.cpp
t_tri_gate.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_gate_bufif0.py
t_tri_gate_bufif0_pins_inout.py
t_tri_gate_bufif1.py
t_tri_gate_bufif1_pins_inout.py
t_tri_gate_cond.py
t_tri_gate_cond_pins_inout.py
t_tri_gate_nmos.py
t_tri_gate_nmos_pins_inout.py
t_tri_gate_notif0.py
t_tri_gate_notif0_pins_inout.py
t_tri_gate_notif1.py
t_tri_gate_notif1_pins_inout.py
t_tri_gate_pmos.py
t_tri_gate_pmos_pins_inout.py
t_tri_gen.py
t_tri_gen.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_graph.py
t_tri_graph.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_hier_ref_unsup.out Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_hier_ref_unsup.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_hier_ref_unsup.v Verilog format 2026-03-04 20:12:10 -05:00
t_tri_iface_eqcase_modport_bad.out Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_iface_eqcase_modport_bad.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_iface_eqcase_modport_bad.v Verilog format 2026-03-04 20:12:10 -05:00
t_tri_iface_port.py Fix tristate lowering for interface inout ports (#7134 repair) (#7708) (#7710) 2026-06-03 19:51:49 -04:00
t_tri_iface_port.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_tri_iface_semantics.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_iface_semantics.v Verilog format 2026-03-04 20:12:10 -05:00
t_tri_ifbegin.py
t_tri_ifbegin.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_inout.cpp
t_tri_inout.py
t_tri_inout.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_inout2.py
t_tri_inout2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_inout_pins_inout.py
t_tri_inz.cpp
t_tri_inz.py
t_tri_inz.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_no_top.py
t_tri_no_top.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_public.py
t_tri_public.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull01.py
t_tri_pull01.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull2_bad.py
t_tri_pull2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull_bad.py
t_tri_pull_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull_implicit.py
t_tri_pull_implicit.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull_unsup.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pull_unsup.py
t_tri_pull_unsup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pullup.cpp
t_tri_pullup.py
t_tri_pullup.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pullup_bus.py Support busses with mix of pullup/pulldown (#7632) 2026-05-21 14:45:40 -04:00
t_tri_pullup_bus.v Commentary: Changes update 2026-05-22 17:57:11 -04:00
t_tri_pullup_pins_inout.py
t_tri_pullvec_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_pullvec_bad.py
t_tri_pullvec_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_root_ref.py Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
t_tri_root_ref.v Verilog format 2026-03-04 20:12:10 -05:00
t_tri_select.cpp
t_tri_select.py
t_tri_select.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_select_eqcase.py
t_tri_select_eqcase.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_select_pins_inout.py
t_tri_select_unsized.py
t_tri_select_unsized.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_struct.py
t_tri_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_struct_packed.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_struct_packed.py
t_tri_struct_packed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_struct_pins_inout.py
t_tri_top_en_out.cpp
t_tri_top_en_out.py
t_tri_top_en_out.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_top_en_out_bad.py
t_tri_top_en_out_bad.v
t_tri_unconn.py
t_tri_unconn.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_tri_various.py
t_tri_various.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type.py
t_type.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_array.py
t_type_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_compare.py
t_type_compare.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_compare_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_compare_bad.py
t_type_compare_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_expression_compare.py
t_type_expression_compare.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_type_match.py
t_type_match.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_non_type.py
t_type_non_type.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_param.py
t_type_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_param_circ_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_param_circ_bad.py
t_type_param_circ_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_type_param_collision.py
t_typedef.py
t_typedef.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_typedef_array.py
t_typedef_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_circ_bad.out
t_typedef_circ_bad.py
t_typedef_circ_bad.v
t_typedef_consistency_0.py
t_typedef_consistency_0.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_fwd.py
t_typedef_fwd.v
t_typedef_fwd_bad.out
t_typedef_fwd_bad.py
t_typedef_fwd_class.py
t_typedef_fwd_class.v
t_typedef_fwd_nested.py
t_typedef_fwd_nested.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_id_bad.out Verilog format 2026-05-13 21:00:34 -04:00
t_typedef_id_bad.py
t_typedef_id_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_typedef_iface_typedef.py
t_typedef_iface_typedef.v
t_typedef_iface_typedef2.py
t_typedef_iface_typedef2.v
t_typedef_iface_typedef3.py
t_typedef_iface_typedef3.v
t_typedef_iface_typedef4.py
t_typedef_iface_typedef4.v
t_typedef_iface_typedef5.py
t_typedef_iface_typedef5.v
t_typedef_iface_typedef6.py
t_typedef_iface_typedef6.v
t_typedef_iface_typedef7.py
t_typedef_iface_typedef7.v
t_typedef_no_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_no_bad.py
t_typedef_no_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_package.py
t_typedef_package.v
t_typedef_param.py
t_typedef_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_param_class.py
t_typedef_param_class.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_typedef_port.py
t_typedef_port.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_signed.py
t_typedef_signed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_typedef_unused_bad.out
t_typedef_unused_bad.py
t_typedef_unused_bad.v
t_typename.out
t_typename.py
t_typename.v Commentary: Refer to latest standard where can 2026-03-29 18:06:12 -04:00
t_typename_min.py
t_typename_min.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad.py
t_udp_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_comb_trigger.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_comb_trigger.py
t_udp_bad_comb_trigger.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_first_input.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_first_input.py
t_udp_bad_first_input.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_illegal_output.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_illegal_output.py
t_udp_bad_illegal_output.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_input_num.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_input_num.py
t_udp_bad_input_num.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_line_inputs.out
t_udp_bad_line_inputs.py
t_udp_bad_line_inputs.v
t_udp_bad_line_outputs.out
t_udp_bad_line_outputs.py
t_udp_bad_line_outputs.v
t_udp_bad_multi_output.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_bad_multi_output.py
t_udp_bad_multi_output.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_binary.py
t_udp_binary.v
t_udp_binary_top.py
t_udp_binary_top.v
t_udp_delay.py
t_udp_delay.v
t_udp_noname.py
t_udp_noname.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_nonsequential.py Testing: Rename UDP test to fix typo 2026-06-09 09:53:37 +01:00
t_udp_nonsequential.v Tests: Fix race condition in t_udp_nonsequential 2026-06-09 13:07:21 +01:00
t_udp_nonsequential_x.py
t_udp_nonsequential_x.v Verilog format 2026-03-03 07:21:24 -05:00
t_udp_param_bad.out
t_udp_param_bad.py
t_udp_param_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_sequential.py
t_udp_sequential.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_sequential_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_sequential_bad.py
t_udp_sequential_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_udp_sequential_x.py
t_udp_sequential_x.v
t_udp_tableend_bad.out Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_udp_tableend_bad.py
t_udp_tableend_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_udp_tableeof_bad.py
t_udp_tableeof_bad.v Tests: Verilog format 2026-03-08 18:26:40 -04:00
t_unbounded.py
t_unbounded.v
t_unbounded_bad.out Improve E_UNSUPPORTED warning messages (#7329) 2026-03-26 13:25:30 -04:00
t_unbounded_bad.py
t_unbounded_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unconnected.py
t_unconnected.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unconnected_bad.out
t_unconnected_bad.py
t_unconnected_bad.v
t_unicode.py
t_union_hard_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_union_hard_bad.py
t_union_hard_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_union_soft.py
t_union_soft.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_union_unpacked.py
t_union_unpacked.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif.py
t_uniqueif.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif_else.py
t_uniqueif_else.v
t_uniqueif_fail1.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif_fail1.py
t_uniqueif_fail2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif_fail2.py
t_uniqueif_fail3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif_fail3.py
t_uniqueif_fail4.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uniqueif_fail4.py
t_unopt_array.py
t_unopt_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_array_csplit.py
t_unopt_array_typedef.py
t_unopt_bound.py
t_unopt_bound.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_combo.py
t_unopt_combo.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_combo.vlt
t_unopt_combo_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_combo_bad.py
t_unopt_combo_isolate.py Add V3LiftExpr pass to lower impure expressions and calls (#7141) 2026-02-28 22:20:09 +00:00
t_unopt_combo_isolate.vlt
t_unopt_combo_isolate_vlt.py Add V3LiftExpr pass to lower impure expressions and calls (#7141) 2026-02-28 22:20:09 +00:00
t_unopt_combo_waive.py
t_unopt_converge.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_converge_initial.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_converge_initial_run_bad.out Change `--converge-limit` default to 10000 (#7209). 2026-03-07 09:05:37 -05:00
t_unopt_converge_initial_run_bad.py
t_unopt_converge_ndbg_bad.out Change `--converge-limit` default to 10000 (#7209). 2026-03-07 09:05:37 -05:00
t_unopt_converge_ndbg_bad.py
t_unopt_converge_print_bad.out Change `--converge-limit` default to 10000 (#7209). 2026-03-07 09:05:37 -05:00
t_unopt_converge_print_bad.py
t_unopt_converge_run_bad.out Improve converge-limit error message 2026-01-28 18:32:50 -05:00
t_unopt_converge_run_bad.py
t_unopt_converge_unopt_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unopt_converge_unopt_bad.py
t_unoptflat_simple.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_2_bad.py Internals: Add stats/dump of circular logic in scheduling (#6953) 2026-01-28 10:45:23 +00:00
t_unoptflat_simple_3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_3_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_3_bad.py
t_unoptflat_simple_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unoptflat_simple_bad.py
t_unpack_array_direct_assignment.py
t_unpack_array_no_expand.py
t_unpack_array_no_expand.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_array_order.py
t_unpacked_array_order.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_array_p_fmt.out
t_unpacked_array_p_fmt.py
t_unpacked_array_p_fmt.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat.py
t_unpacked_concat.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad.py
t_unpacked_concat_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad2.py
t_unpacked_concat_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_concat_bad3.py
t_unpacked_concat_bad3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_init.py
t_unpacked_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_slice.py
t_unpacked_slice.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_slice_range.py
t_unpacked_slice_range.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_str_init.py
t_unpacked_str_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_str_init2.out
t_unpacked_str_init2.py
t_unpacked_str_init2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_str_pair.py
t_unpacked_str_pair.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_struct_eq.py
t_unpacked_struct_eq.v Fix VlWide equality comparion in unpacked structs (#7618) 2026-05-20 00:57:33 +01:00
t_unpacked_struct_redef.py
t_unpacked_struct_redef.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_struct_sel.py
t_unpacked_struct_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_to_packed_param.py
t_unpacked_to_packed_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_to_queue.py
t_unpacked_to_queue.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unpacked_wide_unknown.py
t_unpacked_wide_unknown.v
t_unroll_automatic_task_fork.out
t_unroll_automatic_task_fork.py
t_unroll_automatic_task_fork.v
t_unroll_complexcond.py
t_unroll_complexcond.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_delay.out
t_unroll_delay.py
t_unroll_delay.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_forfor.py
t_unroll_forfor.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_genf.py
t_unroll_genf.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_nested.out
t_unroll_nested.py
t_unroll_nested.v
t_unroll_nested_param.py
t_unroll_nested_param.v
t_unroll_nested_unroll.py
t_unroll_pragma.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_pragma_disable.py
t_unroll_pragma_full.py
t_unroll_pragma_none.py Improve procedural loop unrolling 2026-06-06 06:11:13 +01:00
t_unroll_signed.py
t_unroll_signed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_unroll_stmt.out Improve procedural loop unrolling 2026-06-06 06:11:13 +01:00
t_unroll_stmt.py Improve procedural loop unrolling 2026-06-06 06:11:13 +01:00
t_unroll_stmt.v Improve procedural loop unrolling 2026-06-06 06:11:13 +01:00
t_unroll_unopt_io.py
t_unroll_unopt_io.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_urandom.py
t_urandom.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_user_type_xassign.py
t_user_type_xassign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_uvm_dpi.v Fix uvm_hdl_release_and_read not reading release value or checking for success (#7425) 2026-04-19 08:24:07 -04:00
t_uvm_dpi_v2017_1_0.out Fix uvm_hdl_release_and_read not reading release value or checking for success (#7425) 2026-04-19 08:24:07 -04:00
t_uvm_dpi_v2017_1_0.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_dpi_v2020_3_1.out Fix uvm_hdl_release_and_read not reading release value or checking for success (#7425) 2026-04-19 08:24:07 -04:00
t_uvm_dpi_v2020_3_1.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_hello.v Tests: Improve t_uvm_hello.v 2026-02-01 11:42:32 -05:00
t_uvm_hello_all_v2017_1_0_dpi.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_hello_all_v2017_1_0_nodpi.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_hello_all_v2020_3_1_dpi.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_hello_all_v2020_3_1_nodpi.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_uvm_return_type.py Fix for Returning an object of the wrong type from a static function of a parameterized class (#5479) (#7387) 2026-04-11 07:49:45 -04:00
t_uvm_return_type.v Commentary: Changes update 2026-04-11 17:47:39 -04:00
t_uvm_return_type2.py Fix for Returning an object of the wrong type from a static function of a parameterized class (#5479) (#7387) 2026-04-11 07:49:45 -04:00
t_uvm_return_type2.v Commentary: Changes update 2026-04-11 17:47:39 -04:00
t_uvm_return_type3.py Fix for Returning an object of the wrong type from a static function of a parameterized class (#5479) (#7387) 2026-04-11 07:49:45 -04:00
t_uvm_return_type3.v Commentary: Changes update 2026-04-11 17:47:39 -04:00
t_uvm_static_func1.py Fix static function not found from parameterized extends class (#7204) (#7208) 2026-03-06 16:23:02 -05:00
t_uvm_static_func1.v Fix static function not found from parameterized extends class (#7204) (#7208) 2026-03-06 16:23:02 -05:00
t_uvm_typeof_type.py Fix resolving default/nondefault type-of-type parameters (#7380) (#7385) 2026-04-07 17:58:36 -04:00
t_uvm_typeof_type.v Verilog format 2026-05-13 21:00:34 -04:00
t_vams_basic.py
t_vams_basic.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vams_kwd_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vams_kwd_bad.py
t_vams_kwd_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vams_wreal.py
t_vams_wreal.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_assign_landr.py
t_var_assign_landr.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_assign_landr_noexpand.py
t_var_bad_hide.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_hide.py
t_var_bad_hide.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_hide2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_hide2.py
t_var_bad_hide2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_hide_docs.out
t_var_bad_hide_docs.py
t_var_bad_hide_docs.v
t_var_bad_sameas.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_sameas.py
t_var_bad_sameas.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_sv.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_bad_sv.py
t_var_bad_sv.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_const.py
t_var_const.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_const2.py
t_var_const2.v
t_var_const_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_const_bad.py
t_var_const_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dotted1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dotted1_inl0.py
t_var_dotted1_inl1.py
t_var_dotted1_inl2.py
t_var_dotted2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dotted2_inl0.py
t_var_dotted2_inl1.py
t_var_dotted_dup_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dotted_dup_bad.py
t_var_dotted_dup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup2.py
t_var_dup2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup2_bad.py
t_var_dup2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup3.py
t_var_dup3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_dup_bad.py
t_var_dup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_escape.out
t_var_escape.py
t_var_escape.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_escape_noinl.py
t_var_extern_method_lifetime.py Support #0 delays with IEEE-1800 compliant semantics (#7079) 2026-02-16 03:55:55 +00:00
t_var_extern_method_lifetime.v Verilog format 2026-05-13 21:00:34 -04:00
t_var_in_assign.py
t_var_in_assign.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_in_assign_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_in_assign_bad.py
t_var_in_assign_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_in_assign_pedantic.py
t_var_in_fork.py
t_var_in_fork.v Verilog format 2026-05-13 21:00:34 -04:00
t_var_init.py
t_var_init.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_init_static_automatic.py Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_var_init_static_automatic.v Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_var_lifetime_module_bad.out
t_var_lifetime_module_bad.py
t_var_lifetime_module_bad.v
t_var_local.py
t_var_local.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_nonamebegin.out
t_var_nonamebegin.py
t_var_nonamebegin.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_nonamebegin__log.out
t_var_notfound_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_notfound_bad.py
t_var_notfound_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_outoforder.py
t_var_outoforder.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_overcmp.py
t_var_overcmp.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_overwidth_bad.cpp
t_var_overwidth_bad.out
t_var_overwidth_bad.py
t_var_overwidth_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_overzero.py
t_var_overzero.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_pins_array_assign.py Fix port assignment to large arrays (#6904). 2026-03-30 19:09:23 -04:00
t_var_pins_array_assign.v Fix port assignment to large arrays (#6904). 2026-03-30 19:09:23 -04:00
t_var_pins_bad.out
t_var_pins_bad.py
t_var_pins_cc.py
t_var_pins_sc1.py
t_var_pins_sc2.py
t_var_pins_sc32.py
t_var_pins_sc64.py
t_var_pins_sc_biguint.py
t_var_pins_sc_uint.py
t_var_pins_sc_uint_biguint.py
t_var_pins_sc_uint_bool.py
t_var_pins_sc_uint_bool_nomain.py
t_var_pins_scui.py
t_var_pinsizes.cpp
t_var_pinsizes.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_pinsizes.vlt
t_var_port2_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_port2_bad.py
t_var_port2_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_port_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_port_bad.py
t_var_port_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_port_json_only.out Internals: Rename stdPackageProcessp etc. No functional change. 2026-05-15 17:33:19 -04:00
t_var_port_json_only.py
t_var_port_json_only.v
t_var_ref.py
t_var_ref.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad1.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad1.py
t_var_ref_bad1.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad2.py
t_var_ref_bad2.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_bad3.py
t_var_ref_bad3.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_noinline.py
t_var_ref_static.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_ref_static.py
t_var_ref_static.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_rsvd.py
t_var_rsvd.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_rsvd_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_rsvd_bad.py
t_var_rsvd_port.py
t_var_rsvd_port.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_sc_bv.cpp Fix erroneous implicit conversions of VlWide (#7642) 2026-05-22 20:05:08 +01:00
t_var_sc_bv.py
t_var_sc_bv.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_sc_double.cpp
t_var_sc_double.py
t_var_sc_double.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_set_link.py
t_var_set_link.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_static.py
t_var_static.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_static_assign_decl_bad.out Tests: Improve t_var_static_assign_decl_bad 2026-02-17 02:18:56 -05:00
t_var_static_assign_decl_bad.py
t_var_static_assign_decl_bad.v Tests: Improve t_var_static_assign_decl_bad 2026-02-17 02:18:56 -05:00
t_var_static_param.py
t_var_static_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_suggest_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_suggest_bad.py
t_var_suggest_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_tieout.py
t_var_tieout.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_top_struct.py
t_var_top_struct.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_types.py
t_var_types.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_types_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_types_bad.py
t_var_types_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_vec_sel.py
t_var_vec_sel.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_xref_bad.out Fix access to static variable inside function (#7474) (#7475) 2026-04-23 11:17:14 -04:00
t_var_xref_bad.py
t_var_xref_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_var_xref_gen.py
t_var_xref_gen.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_variable_order_mtask.py Fix TSP variable ordering for mtasks (#5342) (#7610) 2026-05-30 15:35:12 -04:00
t_varref_scope_in_interface.py
t_varref_scope_in_interface.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_verilated_all.py Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
t_verilated_all.v Verilog format 2026-05-13 21:00:34 -04:00
t_verilated_all_newest.py
t_verilated_all_oldest.py
t_verilated_debug.out Fix event triggering (#6932) 2026-02-11 10:35:59 -08:00
t_verilated_debug.py
t_verilated_debug.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_verilated_header.py
t_verilated_header.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_verilated_threaded.py
t_virtual_interface_delayed.py
t_virtual_interface_delayed.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_virtual_interface_gen_for_ref.py
t_virtual_interface_gen_for_ref.v
t_virtual_interface_member_trigger.py Fix virtual interface member trigger convergence (#5116) (#7323) 2026-04-01 21:42:42 +01:00
t_virtual_interface_member_trigger.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_virtual_interface_member_trigger_real.py Fix virtual interface member trigger convergence (#5116) (#7323) 2026-04-01 21:42:42 +01:00
t_virtual_interface_member_trigger_real.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_virtual_interface_method.py
t_virtual_interface_method.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_virtual_interface_method_bad.out
t_virtual_interface_method_bad.py
t_virtual_interface_method_bad.v Verilog format 2026-05-13 21:00:34 -04:00
t_virtual_interface_nba_assign.py
t_virtual_interface_nba_assign.v Fix error on mixed-initialization (#7352) (#7357) 2026-05-11 18:32:55 -04:00
t_virtual_interface_only_with_assignw.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_virtual_interface_only_with_assignw.v Verilog format 2026-02-12 18:23:56 -05:00
t_virtual_interface_param.py
t_virtual_interface_param.v Internals: Minor cleanups preparing for initialization fixes. 2026-02-16 08:10:29 -05:00
t_virtual_interface_param_bind.py
t_virtual_interface_param_bind.v Internals: Minor cleanups preparing for initialization fixes. 2026-02-16 08:10:29 -05:00
t_virtual_interface_pkg.py
t_virtual_interface_pkg.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_virtual_interface_trigger_unsup.out Fix virtual interface member trigger convergence (#5116) (#7323) 2026-04-01 21:42:42 +01:00
t_virtual_interface_trigger_unsup.py Fix virtual interface member trigger convergence (#5116) (#7323) 2026-04-01 21:42:42 +01:00
t_virtual_interface_trigger_unsup.v Commentary: Changes update 2026-04-03 20:16:23 -04:00
t_virtual_interface_unused_task_trigger.py Fix false sensitivity of signals to unrelated interface members 2026-03-30 09:42:51 +01:00
t_virtual_interface_unused_task_trigger.v Commentary: Changes update 2026-03-30 19:09:13 -04:00
t_vlcov_covergroup.annotate.out Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_vlcov_covergroup.py Support covergroups, coverpoints, and bins (#784) (#7117) 2026-06-05 09:35:01 -04:00
t_vlcov_data_a.dat
t_vlcov_data_b.dat
t_vlcov_data_c.dat
t_vlcov_data_d.dat
t_vlcov_data_e.dat
t_vlcov_data_f.dat
t_vlcov_debugi.py
t_vlcov_flag_invalid_bad.out
t_vlcov_flag_invalid_bad.py
t_vlcov_fsm_report.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_vlcov_fsm_report.py Apply 'make format' 2026-04-22 19:20:00 +00:00
t_vlcov_fsm_report.v Commentary: Changes update 2026-04-23 00:44:50 -04:00
t_vlcov_fsm_report_incl.out Improve FSM coverage detection (#7490) 2026-04-30 07:22:34 -04:00
t_vlcov_hier_report.out Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report.py Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report_bad.out Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report_bad.py Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report_runtime.out Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report_runtime.py Add hierarchy-aware reporting to `verilator_coverage` (#7657) 2026-06-04 09:32:19 -04:00
t_vlcov_hier_report_runtime.v Commentary: Changes update 2026-06-05 18:36:55 -04:00
t_vlcov_info.info.out
t_vlcov_info.py
t_vlcov_merge.out
t_vlcov_merge.py Tests: Remove old .out files and related cleanups 2026-04-24 12:25:28 -04:00
t_vlcov_nfound_bad.out
t_vlcov_nfound_bad.py
t_vlcov_opt_branch.info.out
t_vlcov_opt_branch.py
t_vlcov_opt_expr.info.out
t_vlcov_opt_expr.py
t_vlcov_opt_line.info.out
t_vlcov_opt_line.py
t_vlcov_opt_toggle.info.out
t_vlcov_opt_toggle.py
t_vlcov_opt_user.info.out
t_vlcov_opt_user.py
t_vlcov_opt_wild.info.out
t_vlcov_opt_wild.py
t_vlcov_rank.out
t_vlcov_rank.py
t_vlcov_rewrite.py
t_vlcov_summary_typed.out Add Fsm coverage to print summary (#7462) 2026-04-23 09:13:45 +02:00
t_vlcov_summary_typed.py Apply 'make format' 2026-04-21 12:22:33 +00:00
t_vlcov_unlink.py
t_vlprocess_missing.py
t_vlt_legacy.py
t_vlt_legacy.v
t_vlt_legacy.vlt
t_vlt_match_contents.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_contents.py
t_vlt_match_contents.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_contents.vlt
t_vlt_match_error.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_error.vlt
t_vlt_match_error_1.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_error_1.py
t_vlt_match_error_2.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_error_2.py
t_vlt_match_error_3.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_match_error_3.py
t_vlt_public_spec.out
t_vlt_public_spec.py
t_vlt_public_spec.v
t_vlt_public_spec.vlt
t_vlt_syntax_bad.out
t_vlt_syntax_bad.py
t_vlt_syntax_bad.v
t_vlt_syntax_bad.vlt
t_vlt_timing.py
t_vlt_timing.v
t_vlt_timing.vlt
t_vlt_var_sc_biguint_bad.out
t_vlt_var_sc_biguint_bad.py
t_vlt_var_sc_biguint_bad.vlt
t_vlt_var_spec_bad.out
t_vlt_var_spec_bad.py
t_vlt_var_spec_bad.vlt
t_vlt_warn.py
t_vlt_warn.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_warn.vlt
t_vlt_warn_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_warn_bad.py
t_vlt_warn_bad.vlt
t_vlt_warn_ecode_bad.out
t_vlt_warn_ecode_bad.py
t_vlt_warn_ecode_bad.vlt
t_vlt_warn_file2_bad.out
t_vlt_warn_file2_bad.py
t_vlt_warn_file2_bad.v
t_vlt_warn_file_bad.out Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_warn_file_bad.py
t_vlt_warn_file_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vlt_warn_file_bad.vlt
t_vlt_warn_file_bad_b.vh Verilog format 2026-06-07 21:55:43 -04:00
t_vlt_warn_one_on_bad.out
t_vlt_warn_one_on_bad.py
t_vlt_warn_one_on_bad.v
t_vlt_warn_range_bad.out
t_vlt_warn_range_bad.py
t_vlt_warn_range_bad.v
t_vpi_cb_iter.cpp
t_vpi_cb_iter.py
t_vpi_cb_iter.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_const_type.cpp
t_vpi_const_type.py
t_vpi_const_type.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_dump.cpp Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_dump.iv.out
t_vpi_dump.out
t_vpi_dump.py
t_vpi_dump.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_dump_missing_scopes.iv.out
t_vpi_dump_missing_scopes.out
t_vpi_dump_missing_scopes.py
t_vpi_dump_missing_scopes.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_dump_no_inline.py
t_vpi_empty.py Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_empty.v Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_escape.cpp
t_vpi_escape.py
t_vpi_escape.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_escape.vlt
t_vpi_finish.py
t_vpi_finish.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_finish_c.cpp
t_vpi_force.cpp Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_force.py Tests: Reduce peak memory use of UVM tests (#7648) 2026-05-23 19:36:25 -04:00
t_vpi_force.v Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_forceable_bad.cpp
t_vpi_forceable_bad.out
t_vpi_forceable_bad.py
t_vpi_forceable_bad.v
t_vpi_forceable_var.py Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_forceable_var.vlt Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_get.cpp
t_vpi_get.py
t_vpi_get.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_get_public_rw_switch.py
t_vpi_get_value_array.cpp
t_vpi_get_value_array.py
t_vpi_get_value_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_hierarchy_clear.cpp
t_vpi_hierarchy_clear.py
t_vpi_hierarchy_clear.v
t_vpi_memory.cpp Commentary: Fix non-grammar 2026-03-11 19:53:23 -04:00
t_vpi_memory.py
t_vpi_memory.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_module.cpp
t_vpi_module.py
t_vpi_module.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_module_dpi.py
t_vpi_module_empty.cpp
t_vpi_module_empty.py
t_vpi_module_empty.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_multidim.cpp
t_vpi_multidim.py
t_vpi_multidim.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_onetime_cbs.cpp Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_onetime_cbs.py Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_onetime_cbs.v Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_package.cpp
t_vpi_package.py
t_vpi_package.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_param.cpp
t_vpi_param.py
t_vpi_param.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_public_depth.cpp
t_vpi_public_depth.py
t_vpi_public_depth.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_public_depth_off.py
t_vpi_public_depthn.v
t_vpi_public_depthn_1.out
t_vpi_public_depthn_1.py
t_vpi_public_depthn_2.out
t_vpi_public_depthn_2.py
t_vpi_public_depthn_3.out
t_vpi_public_depthn_3.py
t_vpi_public_off.py
t_vpi_public_params.py
t_vpi_public_params.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_put_value_array.cpp
t_vpi_put_value_array.py
t_vpi_put_value_array.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_release_dup_bad.py
t_vpi_release_dup_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_release_dup_bad_c.cpp
t_vpi_repetitive_cbs.cpp Internals: Enforce types on C++ enums. No functional change intended. 2026-05-22 17:59:57 -04:00
t_vpi_repetitive_cbs.py
t_vpi_repetitive_cbs.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_sc.cpp
t_vpi_sc.py
t_vpi_sc.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_stop_bad.out
t_vpi_stop_bad.py
t_vpi_stop_bad.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_stop_bad_c.cpp
t_vpi_time_cb.cpp
t_vpi_time_cb.py
t_vpi_time_cb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_time_cb_c.cpp
t_vpi_unimpl.cpp Add VPI callback support to --main (#7145). 2026-02-28 09:42:28 -05:00
t_vpi_unimpl.py
t_vpi_unimpl.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vpi_var.cpp Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_var.py
t_vpi_var.v Fix vpi_put_value not updating forced read value (#7092) (#7395) 2026-04-09 19:08:36 -04:00
t_vpi_var2.py
t_vpi_var2.v Support very wide $display arguments (#7280) 2026-03-26 13:55:14 -04:00
t_vpi_var3.py
t_vpi_var3.v Support very wide $display arguments (#7280) 2026-03-26 13:55:14 -04:00
t_vpi_zero_time_cb.cpp
t_vpi_zero_time_cb.py
t_vpi_zero_time_cb.v Tests: Verilog format 2026-03-09 21:39:16 -04:00
t_vthread.py
t_wait.out Verilog format 2026-02-16 23:21:53 -05:00
t_wait.py
t_wait.v Verilog format 2026-02-16 23:21:53 -05:00
t_wait_const.py
t_wait_const.v Verilog format 2026-02-16 23:21:53 -05:00
t_wait_fork.py
t_wait_fork.v Verilog format 2026-02-16 23:21:53 -05:00
t_wait_iface_vif.py Fix wait() hang when interface with combinational logic using process calls and VIF function (#7342) 2026-03-30 15:34:32 +01:00
t_wait_iface_vif.v Commentary: Changes update 2026-03-30 19:09:13 -04:00
t_wait_no_triggered_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wait_no_triggered_bad.py
t_wait_no_triggered_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wait_order.out Verilog format 2026-02-16 23:21:53 -05:00
t_wait_order.py
t_wait_order.v Verilog format 2026-02-16 23:21:53 -05:00
t_wait_timing.py
t_waiveroutput.out
t_waiveroutput.py
t_waiveroutput.v Verilog format 2026-02-16 23:21:53 -05:00
t_waiveroutput.vlt
t_waiveroutput_allgood.out
t_waiveroutput_allgood.py
t_waiveroutput_multiline.out
t_waiveroutput_multiline.py
t_waiveroutput_roundtrip.py
t_waiveroutput_roundtrip.v Verilog format 2026-02-16 23:21:53 -05:00
t_while_cond_is_stmt.py
t_while_cond_is_stmt.v Verilog format 2026-02-16 23:21:53 -05:00
t_while_finish.py
t_while_finish.v
t_while_timing_control.py
t_while_timing_control.v Verilog format 2026-02-16 23:21:53 -05:00
t_wide_temp_while_cond.cpp
t_wide_temp_while_cond.py
t_wide_temp_while_cond.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_beh1364_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wire_beh1364_bad.py
t_wire_beh1364_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_beh1800_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wire_beh1800_bad.py
t_wire_beh1800_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_behp1364_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wire_behp1364_bad.py
t_wire_behp1364_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_behp1800_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wire_behp1800_bad.py
t_wire_behp1800_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_self_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_wire_self_bad.py
t_wire_self_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wire_trireg_unsup.out
t_wire_trireg_unsup.py
t_wire_trireg_unsup.v
t_wire_types.py
t_wire_types.v Verilog format 2026-02-16 23:21:53 -05:00
t_wired_net_test.py
t_wired_net_test.v Verilog format 2026-02-16 23:21:53 -05:00
t_with.py
t_with.v Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
t_with_suggest_bad.out Verilog format 2026-02-16 23:21:53 -05:00
t_with_suggest_bad.py
t_with_suggest_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wrapper_clone.cpp
t_wrapper_clone.out
t_wrapper_clone.py
t_wrapper_clone.v Verilog format 2026-02-16 23:21:53 -05:00
t_wrapper_context.cpp
t_wrapper_context.py
t_wrapper_context.v Verilog format 2026-02-16 23:21:53 -05:00
t_wrapper_context__top0.dat.out Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_wrapper_context__top1.dat.out Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00
t_wrapper_context__trace0.vcd.out
t_wrapper_context__trace1.vcd.out
t_wrapper_context_fst.py
t_wrapper_context_seq.py
t_wrapper_del_context_bad.cpp
t_wrapper_del_context_bad.out
t_wrapper_del_context_bad.py
t_wrapper_del_context_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_wrapper_legacy.cpp
t_wrapper_legacy.py
t_wrapper_legacy.v Verilog format 2026-02-16 23:21:53 -05:00
t_wrapper_legacy_time64.py
t_wrapper_legacy_timed.py
t_wrapper_reuse_context_bad.cpp
t_wrapper_reuse_context_bad.out
t_wrapper_reuse_context_bad.py
t_wrapper_reuse_context_bad.v Verilog format 2026-02-16 23:21:53 -05:00
t_x_assign.cpp
t_x_assign.v Verilog format 2026-02-16 23:21:53 -05:00
t_x_assign_0.py
t_x_assign_1.py
t_x_assign_unique_0.py
t_x_assign_unique_1.py
t_x_rand_mt_stability.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_mt_stability.py
t_x_rand_mt_stability_add.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_mt_stability_add.py
t_x_rand_mt_stability_add_trace.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_mt_stability_add_trace.py
t_x_rand_mt_stability_trace.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_mt_stability_trace.py
t_x_rand_mt_stability_zeros.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_mt_stability_zeros.py
t_x_rand_scoped_is_random.py Tests: Enforce SPDX-FileCopyrightText 2026-02-22 15:23:19 -05:00
t_x_rand_scoped_is_random.v Verilog format 2026-03-03 07:21:24 -05:00
t_x_rand_stability.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_stability.py
t_x_rand_stability.v Verilog format 2026-02-16 23:21:53 -05:00
t_x_rand_stability_add.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_stability_add.py
t_x_rand_stability_add_trace.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_stability_add_trace.py
t_x_rand_stability_trace.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_stability_trace.py
t_x_rand_stability_zeros.out Fix `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516) 2026-05-05 12:10:51 -04:00
t_x_rand_stability_zeros.py
trace_abort_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_array_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_ascendingrange_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_basic_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_cat_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_complex_common.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
trace_dumpvars_dyn_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_enum_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_event_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_hier_block_common.py Tests: Switch VCD/FST compare to wavediff (#7426) 2026-04-21 13:53:53 -04:00
trace_hier_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_interface_ref_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_lib_as_top_common.py Fix segmentation fault when using --trace with --lib-create (#7299) (#7518) 2026-05-12 10:16:47 -04:00
trace_lib_common.py Tests: Switch VCD/FST compare to wavediff (#7426) 2026-04-21 13:53:53 -04:00
trace_no_top_name2_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_no_top_name_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_packed_struct_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_param_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_primitive_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_split_struct_common.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
trace_struct_alias_common.py Tests: Switch VCD/FST compare to wavediff (#7426) 2026-04-21 13:53:53 -04:00
trace_struct_array_multi_inst_common.py Tests: Switch VCD/FST compare to wavediff (#7426) 2026-04-21 13:53:53 -04:00
trace_timing_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_two_common.py Tests: Consolidate format specific t_trace_* tests (#7216) 2026-03-12 15:21:02 +00:00
trace_type_dupes_common.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
trace_var_kind_common.py Optimize trace code for faster compiles on repeated types (#6707) (#6832) 2026-04-14 19:16:21 -04:00
vltest_bootstrap.py