Support calling interface functions without parens (#7584)

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
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Krzysztof Bieganski 2026-05-13 14:15:32 +02:00 committed by GitHub
parent 05302080a9
commit 3381d656c7
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3 changed files with 60 additions and 0 deletions

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@ -3762,6 +3762,16 @@ class WidthVisitor final : public VNVisitor {
return;
}
}
if (AstNodeFTask* const ftaskp = VN_CAST(foundp, NodeFTask)) {
AstMethodCall* const newp = new AstMethodCall{
nodep->fileline(), nodep->fromp()->unlinkFrBack(), nodep->name()};
newp->taskp(ftaskp);
newp->dtypep(ftaskp->dtypep());
nodep->replaceWith(newp);
VL_DO_DANGLING(pushDeletep(nodep), nodep);
userIterate(newp, m_vup);
return;
}
UINFO(1, "found object " << foundp);
nodep->v3fatalSrc("MemberSel of non-variable\n"
<< nodep->warnContextPrimary() << '\n'

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@ -0,0 +1,18 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of either the GNU Lesser General Public License Version 3
# or the Perl Artistic License Version 2.0.
# SPDX-FileCopyrightText: 2026 Wilson Snyder
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.compile()
test.execute()
test.passes()

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@ -0,0 +1,32 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain
// SPDX-FileCopyrightText: 2026 Antmicro
// SPDX-License-Identifier: CC0-1.0
interface intf;
int status;
function int get_status;
return status;
endfunction
endinterface
class cls;
virtual intf i;
function int get_status;
return i.get_status;
endfunction
endclass
module t;
intf intf();
cls c;
initial begin
intf.status = 'hdeadbeef;
c = new();
c.i = intf;
if (c.get_status !== 'hdeadbeef) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule