Support calling interface functions without parens (#7584)
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
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@ -3762,6 +3762,16 @@ class WidthVisitor final : public VNVisitor {
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return;
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}
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}
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if (AstNodeFTask* const ftaskp = VN_CAST(foundp, NodeFTask)) {
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AstMethodCall* const newp = new AstMethodCall{
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nodep->fileline(), nodep->fromp()->unlinkFrBack(), nodep->name()};
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newp->taskp(ftaskp);
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newp->dtypep(ftaskp->dtypep());
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nodep->replaceWith(newp);
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VL_DO_DANGLING(pushDeletep(nodep), nodep);
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userIterate(newp, m_vup);
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return;
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}
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UINFO(1, "found object " << foundp);
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nodep->v3fatalSrc("MemberSel of non-variable\n"
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<< nodep->warnContextPrimary() << '\n'
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@ -0,0 +1,18 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile()
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test.execute()
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test.passes()
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@ -0,0 +1,32 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain
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// SPDX-FileCopyrightText: 2026 Antmicro
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// SPDX-License-Identifier: CC0-1.0
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interface intf;
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int status;
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function int get_status;
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return status;
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endfunction
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endinterface
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class cls;
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virtual intf i;
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function int get_status;
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return i.get_status;
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endfunction
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endclass
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module t;
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intf intf();
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cls c;
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initial begin
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intf.status = 'hdeadbeef;
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c = new();
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c.i = intf;
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if (c.get_status !== 'hdeadbeef) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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