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Commentary: Changes update

This commit is contained in:
Wilson Snyder 2026-06-07 08:34:17 -04:00
parent 4e3be56415
commit f20076c4a3
2 changed files with 20 additions and 13 deletions
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19
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@ -21,6 +21,15 @@ Verilator 5.049 devel
**Other:**
* Add `+verilator+log+file` (#4505) (#7645). [Tracy Narine]
* Add peak memory usage to `--stats`. [Geza Lore, Testorrent USA, Inc.]
* Add error on mixed-initialization (#7352) (#7357).
* Add `--coverage-per-instance` (#7636). [Yogish Sekhar]
* Add NOTREDOP error on reduction and negation operators (#7417) (#7623) (#7624).
* Add hierarchy-aware reporting to `verilator_coverage` (#7657). [Yogish Sekhar]
* Improve `--coverage-fsm` (#7490) (#7529) (#7561) (#7573) (#7619). [Yogish Sekhar]
* Change `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516). [Miguel]
* Change JSON to include parameter constant mnemonics for FSM Coverage (#7531). [Yogish Sekhar]
* Support printing enum names for %p and %s (#5523) (#7338 repair) (#7521) (#7527). [Nick Brereton]
* Support weak `until` / `until_with` property operators (#7290) (#7548) (#7685). [Yilou Wang]
* Support `s_eventually` (#7291) (#7508). [Bartłomiej Chmiel, Antmicro Ltd.]
@ -50,15 +59,6 @@ Verilator 5.049 devel
* Support if/if-else in properties (#7692). [Artur Bieniek, Antmicro Ltd.]
* Support process::self().srand() (#7695). [Igor Zaworski, Antmicro Ltd.]
* Support MacOS lldb (#7697). [Tracy Narine]
* Add `+verilator+log+file` (#4505) (#7645). [Tracy Narine]
* Add peak memory usage to `--stats`. [Geza Lore, Testorrent USA, Inc.]
* Add error on mixed-initialization (#7352) (#7357).
* Add `--coverage-per-instance` (#7636). [Yogish Sekhar]
* Add NOTREDOP error on reduction and negation operators (#7417) (#7623) (#7624).
* Add hierarchy-aware reporting to `verilator_coverage` (#7657). [Yogish Sekhar]
* Improve `--coverage-fsm` (#7490) (#7529) (#7561) (#7573) (#7619). [Yogish Sekhar]
* Change `+verilator+seed` to default to 1, and 0 to randomly select (#7325) (#7516). [Miguel]
* Change JSON to include parameter constant mnemonics for FSM Coverage (#7531). [Yogish Sekhar]
* Optimize emitting to_string() for compiler speedup (#7468). [Jakub Michalski, Antmicro Ltd.]
* Optimize additional DFG peephole cases (#7553). [Varun Koyyalagunta, Testorrent USA, Inc.]
* Optimize forced signal handling (#7554 partial) (#7572) (#7594) (#7596). [Krzysztof Bieganski, Artur Bieniek, Antmicro Ltd.]
@ -99,6 +99,7 @@ Verilator 5.049 devel
* Fix internal error on consecutive repetition with N > 256 (#7552) (#7603). [Yilou Wang]
* Fix inherited rand array with .size + foreach constraint (#7558) (#7650). [Yilou Wang]
* Fix biased bit distribution under value < (1 << N) constraints (#7563) (#7684). [Yilou Wang]
* Fix HIERPARAM lint checking (#7570) (#7690). [em2machine]
* Fix display of %m in non-first argument (#7574).
* Fix floating point compile warning on min/max delays.
* Fix force of unpacked arrays (#7579) (#7580). [Zubin Jain]

14
test_regress/t/t_interface_hierparam_bits.v
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@ -17,9 +17,9 @@ interface axi_if #(
parameter int ID_W = 8,
parameter int ADDR_W = 32
);
logic [ID_W-1:0] AWID;
logic [ID_W-1:0] AWID;
logic [ADDR_W-1:0] AWADDR;
logic [7:0] AWLEN;
logic [7:0] AWLEN;
endinterface
module chkmod #(
@ -47,8 +47,14 @@ module bridge #(
endmodule
module t;
axi_if #(.ID_W(12), .ADDR_W(64)) if0 (); // 12 + 64 + 8 = 84
axi_if #(.ID_W(12), .ADDR_W(16)) if1 (); // 12 + 16 + 8 = 36
axi_if #(
.ID_W(12),
.ADDR_W(64)
) if0 (); // 12 + 64 + 8 = 84
axi_if #(
.ID_W(12),
.ADDR_W(16)
) if1 (); // 12 + 16 + 8 = 36
bridge #(.EXPECT(84)) dut0 (.axi(if0));
bridge #(.EXPECT(36)) dut1 (.axi(if1));