parent
927b6fd3c1
commit
0051d91555
1
Changes
1
Changes
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@ -121,6 +121,7 @@ Verilator 5.045 devel
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* Fix time to not advance after `$finish` (#7095).
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* Fix associative array size() constraint generating invalid resize() call (#7103) (#7112). [Yilou Wang]
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* Fix circular class reference %p-printing causing infinite recursion (#7106).
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* Fix too-short bit pack returning wrong value (#7111).
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* Fix randomize of real (#7115). [Srinivasan Venkataramanan]
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@ -1718,24 +1718,33 @@ static inline QData VL_PACK_Q_UQ(int obits, int lbits, const VlUnpacked<QData, N
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static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
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const VlQueue<CData>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < q.size(); ++i)
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_vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
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_vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1 + offset,
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i * lbits + offset);
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return owp;
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}
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static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
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const VlQueue<SData>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < q.size(); ++i)
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_vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
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_vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1 + offset,
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i * lbits + offset);
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return owp;
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}
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static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
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const VlQueue<IData>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < q.size(); ++i)
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_vl_insert_WI(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
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_vl_insert_WI(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1 + offset,
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i * lbits + offset);
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return owp;
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}
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@ -1769,8 +1778,11 @@ static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
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static inline WDataOutP VL_PACK_W_RQ(int obits, int lbits, WDataOutP owp,
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const VlQueue<QData>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < q.size(); ++i)
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_vl_insert_WQ(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
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_vl_insert_WQ(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1 + offset,
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i * lbits + offset);
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return owp;
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}
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@ -1787,8 +1799,11 @@ template <std::size_t N_Words>
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static inline WDataOutP VL_PACK_W_RW(int obits, int lbits, WDataOutP owp,
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const VlQueue<VlWide<N_Words>>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < q.size(); ++i)
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_vl_insert_WW(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
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_vl_insert_WW(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1 + offset,
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i * lbits + offset);
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return owp;
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}
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@ -1796,8 +1811,10 @@ template <std::size_t N_Depth, std::size_t N_Words>
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static inline WDataOutP VL_PACK_W_UW(int obits, int lbits, WDataOutP owp,
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const VlUnpacked<VlWide<N_Words>, N_Depth>& q) {
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VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
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if (VL_UNLIKELY(obits < q.size() * lbits)) return owp; // Though is illegal for q to be larger
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const int offset = obits - q.size() * lbits;
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for (size_t i = 0; i < N_Depth; ++i)
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_vl_insert_WW(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
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_vl_insert_WW(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1 + offset, i * lbits + offset);
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return owp;
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}
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@ -48,14 +48,14 @@ module t ( /*AUTOARG*/
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`checkh(bit_q[2], 1'b1);
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`checkh(bit_q[3], 1'b0);
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bit_q = bit_q_t'(4'h3);
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bit_q = bit_q_t'(4'h3);
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bit_qq = bit_q;
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`checkh(bit_qq[0], 1'b0);
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`checkh(bit_qq[1], 1'b0);
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`checkh(bit_qq[2], 1'b1);
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`checkh(bit_qq[3], 1'b1);
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bit_q = bit_q_t'(4'h2);
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bit_q = bit_q_t'(4'h2);
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bit_qq = bit_q_t'(bit_q);
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`checkh(bit_qq[0], 1'b0);
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`checkh(bit_qq[1], 1'b0);
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@ -256,7 +256,7 @@ module t ( /*AUTOARG*/
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begin
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byte_q_t bytq_init;
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byte_q_t bytq;
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bit_q_t bitq;
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bit_q_t bitq;
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bytq_init.push_back(8'h84);
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bytq_init.push_back(8'haa);
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@ -269,8 +269,9 @@ module t ( /*AUTOARG*/
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bitq = {<<8{bit_q_t'({<<{bytq}})}};
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bytq = {<<8{bit_q_t'({<<{bitq}})}};
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s = $sformatf("bitq=%p", bitq);
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`checks(s,
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"bitq='{'h0, 'h0, 'h1, 'h0, 'h0, 'h0, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1}");
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`checks(
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s,
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"bitq='{'h0, 'h0, 'h1, 'h0, 'h0, 'h0, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1}");
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s = $sformatf("bytq=%p", bytq);
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`checks(s, "bytq='{'h84, 'haa}");
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@ -403,7 +404,7 @@ module t ( /*AUTOARG*/
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// Test StreamR (>>) operations - fairly simple since this should maintain left-to-right order.
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begin
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bit_q_t bitq;
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bit_q_t bitq;
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byte_q_t bytq;
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bitq = {1'b1, 1'b0, 1'b1, 1'b0, 1'b1, 1'b0, 1'b1, 1'b0};
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@ -414,8 +415,9 @@ module t ( /*AUTOARG*/
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bytq = {8'h84, 8'haa};
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bitq = {>>{bit_q_t'({<<{bytq}})}};
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s = $sformatf("bitq=%p", bitq);
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`checks(s,
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"bitq='{'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h0, 'h1, 'h0, 'h0, 'h0, 'h0, 'h1}");
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`checks(
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s,
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"bitq='{'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h0, 'h1, 'h0, 'h0, 'h0, 'h0, 'h1}");
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bitq = {
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1'b1,
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@ -452,8 +454,9 @@ module t ( /*AUTOARG*/
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bytq = {8'h84, 8'haa};
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bitq = {>>{bit_q_t'({>>{bytq}})}};
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s = $sformatf("bitq=%p", bitq);
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`checks(s,
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"bitq='{'h1, 'h0, 'h0, 'h0, 'h0, 'h1, 'h0, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0}");
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`checks(
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s,
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"bitq='{'h1, 'h0, 'h0, 'h0, 'h0, 'h1, 'h0, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0, 'h1, 'h0}");
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bitq = {
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1'b1,
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@ -483,6 +486,36 @@ module t ( /*AUTOARG*/
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`checks(s, "bytq='{'h12, 'h34, 'h56}");
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end
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begin
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bit wide_bits[];
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bit [1023:0] wide_stream;
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// verilator lint_off ASCRANGE
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bit [0:1023] wide_streamr;
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// verilator lint_on ASCRANGE
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// verilog_format: off
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wide_bits = '{1,0,1,0,1,0,1,1,0,0,1,1,0,0,0,1,0,1,0,1,0,1,1,0,1,1,0,1,0,1,0,0,
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1,0,1,1,0,1,1,1,0,1,0,1,0,0,1,0,1,1,1,1,1,0,0,0,0,1,0,0,0,0,1,1,
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0,1,0,1,0,0,1,1,0,1,1,1,1,1,0,1,0,1,1,0,1,0,0,0,1,1,0,1,1,1,1,1,
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1,0,1,1,1,1,1,1,0,1,0,0,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,1,0,1,1,1,
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1,0,0,0,1,0,1,0,1,1,1,1,0,1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,
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1,0,0,0,1,1,0,1,1,1,1,1,0,0,1,0,1,1,0,0,0,0,1,0,0,1,0,1,0,1,1,1,
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1,1,0,0,1,1,0,1,0,1,1,0,1,1,1,1,1,0,1,0,0,1,1,1,1,1,0,0,0,1,1,1,
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1,0,0,1,0,1,0,1,1,1,0,1,0,0,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,0,1,0,1,1,0,1,1,1,0,1,1,
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1,1,1,1,0,1,0,1,1,1,0,0,1,1,0,0};
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// verilog_format: on
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`checkh(wide_bits.size(), 432);
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wide_stream = {>>bit{wide_bits}};
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`checkh(wide_stream,
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1024'hab3156d4b752f843537d68dfbf48f1f78af787ff8df2c257cd6fa7c795d300000000000000000000000000000000ffffffffa5bbf5cc0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000);
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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