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Commentary: Changes update

This commit is contained in:
Wilson Snyder 2026-04-28 17:56:24 -04:00
parent 0188679631
commit 6aebcd2b1c
8 changed files with 117 additions and 65 deletions
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11
Changes
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@ -11,7 +11,16 @@ contributors that suggested or implemented a given issue are shown in []. Thanks
Verilator 5.049 devel
==========================
* TBD
* Support `always` / `always[m:n]` / `s_always[m:n]` property operators (#7482). [Yilou Wang]
* Support `randomize() with (identifier_list) {constraint_block}` (#7486) (#7507). [Yilou Wang]
* Support `obj.randomize(null)` (#7487) (#7509). [Yilou Wang]
* Fix inlining static initializer in V3Gate (#5381) (#7503). [Andrew Nolte] [Geza Lore, Testorrent USA, Inc.]
* Fix generic interface port forwarded to a nested instance (#7454) (#7457). [Yilou Wang]
* Fix internal error on multi-cycle SVA under default clocking (#7472) (#7506). [Yilou Wang]
* Fix mailbox#(packed_struct) type mismatch with parameterized class (#7494) (#7495). [Nikolai Kumar]
* Fix std::randomize internal error on static member of different class (#7498) (#7499). [Alex Solomatnikov]
* Fix virtual interface method call inlining and IMPURE suppression (#7505). [Nikolay Puzanov]
* Fix expression coverage in loops (#7511). [Todd Strader]
Verilator 5.048 2026-04-26

2
test_regress/t/t_interface_func_impure_bad.v
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@ -25,7 +25,7 @@ interface iface;
endinterface
module t;
iface i();
iface i ();
initial begin
i.local_write();

4
test_regress/t/t_interface_virtual_func_runtime_instance.v
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@ -21,8 +21,8 @@ class Driver;
endclass
module t;
iface a();
iface b();
iface a ();
iface b ();
initial begin
automatic Driver d = new;

2
test_regress/t/t_interface_virtual_func_static_direct.v
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@ -16,7 +16,7 @@ class Holder;
endclass
module t;
iface i();
iface i ();
initial begin
automatic Holder h = new;

16
test_regress/t/t_mailbox_struct_param.v
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@ -5,10 +5,10 @@
// SPDX-License-Identifier: CC0-1.0
package pkg;
class C #(parameter P = 0);
typedef struct packed {
bit [7:0] x;
} my_t;
class C #(
parameter P = 0
);
typedef struct packed {bit [7:0] x;} my_t;
mailbox #(my_t) mb = new();
@ -26,8 +26,8 @@ module top;
initial begin
C #(0) c0;
C #(1) c1;
C#(0)::my_t s0;
C#(1)::my_t s1;
C #(0)::my_t s0;
C #(1)::my_t s1;
bit [7:0] got0;
bit [7:0] got1;
@ -42,8 +42,8 @@ module top;
c0.run(got0);
c1.run(got1);
if(got0 !== 8'hA5) $stop;
if(got0 !== 8'hA5) $stop;
if (got0 !== 8'hA5) $stop;
if (got0 !== 8'hA5) $stop;
$write("*-* All Finished *-*\n");
$finish;

85
test_regress/t/t_randomize_null.v
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@ -21,7 +21,10 @@ class Multi;
rand int y;
int lo;
int hi;
constraint c_x {x >= lo; x <= hi;}
constraint c_x {
x >= lo;
x <= hi;
}
constraint c_y {y > x;}
function int self_check;
@ -50,7 +53,10 @@ class Wide;
rand bit [95:0] w96;
bit [64:0] lo65;
bit [95:0] lo96;
constraint c_wide {w65 >= lo65; w96 >= lo96;}
constraint c_wide {
w65 >= lo65;
w96 >= lo96;
}
endclass
// Cover the 16-bit (SData) and 64-bit (QData) tiers of
@ -58,10 +64,13 @@ endclass
// pinned current values are serialized to the SMT solver.
class Widths;
rand shortint s16;
rand longint l64;
rand longint l64;
shortint s_lo;
longint l_lo;
constraint c_widths {s16 >= s_lo; l64 >= l_lo;}
longint l_lo;
constraint c_widths {
s16 >= s_lo;
l64 >= l_lo;
}
endclass
class Cyc;
@ -78,8 +87,12 @@ class Cb;
int pre_count;
int post_count;
constraint c_lt {x < v;}
function void pre_randomize; pre_count = pre_count + 1; endfunction
function void post_randomize; post_count = post_count + 1; endfunction
function void pre_randomize;
pre_count = pre_count + 1;
endfunction
function void post_randomize;
post_count = post_count + 1;
endfunction
endclass
module t;
@ -98,13 +111,15 @@ module t;
initial begin
// 1. Original issue reproducer: unsat keeps values, sat preserves them.
a = new;
a.x = 2; a.v = 1;
a.x = 2;
a.v = 1;
i = a.randomize(null);
`checkd(i, 0);
`checkd(a.x, 2);
`checkd(a.v, 1);
a.x = 1; a.v = 2;
a.x = 1;
a.v = 2;
i = a.randomize(null);
`checkd(i, 1);
`checkd(a.x, 1);
@ -112,23 +127,35 @@ module t;
// 2. Multiple rand members, multiple constraints, plus implicit-this path.
m = new;
m.x = 5; m.y = 7; m.lo = 0; m.hi = 10;
m.x = 5;
m.y = 7;
m.lo = 0;
m.hi = 10;
i = m.randomize(null);
`checkd(i, 1);
`checkd(m.x, 5);
`checkd(m.y, 7);
m.x = -1; m.y = 7; m.lo = 0; m.hi = 10;
m.x = -1;
m.y = 7;
m.lo = 0;
m.hi = 10;
i = m.randomize(null);
`checkd(i, 0);
`checkd(m.x, -1);
m.x = 5; m.y = 5; m.lo = 0; m.hi = 10;
m.x = 5;
m.y = 5;
m.lo = 0;
m.hi = 10;
i = m.randomize(null);
`checkd(i, 0);
`checkd(m.y, 5);
m.x = 3; m.y = 9; m.lo = 0; m.hi = 10;
m.x = 3;
m.y = 9;
m.lo = 0;
m.hi = 10;
i = m.self_check();
`checkd(i, 1);
@ -143,18 +170,24 @@ module t;
// 4. Inheritance: base and derived constraints validated together.
d = new;
d.x = 2; d.y = 5; d.v = 10;
d.x = 2;
d.y = 5;
d.v = 10;
i = d.randomize(null);
`checkd(i, 1);
`checkd(d.x, 2);
`checkd(d.y, 5);
d.x = 11; d.y = 20; d.v = 10;
d.x = 11;
d.y = 20;
d.v = 10;
i = d.randomize(null);
`checkd(i, 0);
`checkd(d.x, 11);
d.x = 3; d.y = 1; d.v = 10;
d.x = 3;
d.y = 1;
d.v = 10;
i = d.randomize(null);
`checkd(i, 0);
`checkd(d.y, 1);
@ -203,23 +236,27 @@ module t;
`checkd(i, 1);
end
cyc.c = 2'd0; cyc.lo = 2'd0;
cyc.c = 2'd0;
cyc.lo = 2'd0;
i = cyc.randomize(null);
`checkd(i, 1);
`checkd(cyc.c, 2'd0);
cyc.c = 2'd3; cyc.lo = 2'd0;
cyc.c = 2'd3;
cyc.lo = 2'd0;
i = cyc.randomize(null);
`checkd(i, 1);
`checkd(cyc.c, 2'd3);
cyc.c = 2'd0; cyc.lo = 2'd1;
cyc.c = 2'd0;
cyc.lo = 2'd1;
i = cyc.randomize(null);
`checkd(i, 0);
`checkd(cyc.c, 2'd0);
cyc.lo = 2'd0;
ok0 = 0; ok1 = 0;
ok0 = 0;
ok1 = 0;
repeat (20) begin
i = cyc.randomize();
`checkd(i, 1);
@ -233,13 +270,17 @@ module t;
// IEEE 1800-2023 18.6.2: pre is always called.
// IEEE 1800-2023 18.6.3: post is called iff randomize() returned 1.
cb = new;
cb.x = 1; cb.v = 2; cb.pre_count = 0; cb.post_count = 0;
cb.x = 1;
cb.v = 2;
cb.pre_count = 0;
cb.post_count = 0;
i = cb.randomize(null); // sat: pre + post
`checkd(i, 1);
`checkd(cb.pre_count, 1);
`checkd(cb.post_count, 1);
cb.x = 5; cb.v = 1;
cb.x = 5;
cb.v = 1;
i = cb.randomize(null); // unsat: pre only, no post
`checkd(i, 0);
`checkd(cb.pre_count, 2);

12
test_regress/t/t_randomize_null_unsup.v
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@ -35,12 +35,12 @@ endclass
module t;
initial begin
automatic FooQ fq = new;
automatic FooU fu = new;
automatic FooD fd = new;
automatic FooA fa = new;
automatic FooW fw = new;
automatic Outer o = new;
automatic FooQ fq = new;
automatic FooU fu = new;
automatic FooD fd = new;
automatic FooA fa = new;
automatic FooW fw = new;
automatic Outer o = new;
o.inner = new;
void'(fq.randomize(null));
void'(fu.randomize(null));

50
test_regress/t/t_std_randomize_static_member.v
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@ -10,36 +10,38 @@
// in V3Randomize ("Invalid reference?").
package tlogy_m_pkg;
class v_cfg;
static int num_of_ds = 0;
endclass
class v_cfg;
static int num_of_ds = 0;
endclass
class tlogy_m;
v_cfg v[$];
endclass
class tlogy_m;
v_cfg v[$];
endclass
endpackage
package s_pkg;
import tlogy_m_pkg::*;
class s_cfg;
tlogy_m t_m;
bit t_mode;
int a_d_idx;
import tlogy_m_pkg::*;
class s_cfg;
tlogy_m t_m;
bit t_mode;
int a_d_idx;
function void setup_h_iw_cfg();
if (t_mode) begin
foreach (t_m.v[i]) begin
if (std::randomize(a_d_idx) with {
if (t_m.v[i].num_of_ds > 1) {
a_d_idx inside {[0:(t_m.v[i].num_of_ds - 1)]};
a_d_idx != 0;
}
} == 0)
$stop;
function void setup_h_iw_cfg();
if (t_mode) begin
foreach (t_m.v[i]) begin
if (std::randomize(
a_d_idx
) with {
if (t_m.v[i].num_of_ds > 1) {
a_d_idx inside {[0 : (t_m.v[i].num_of_ds - 1)]};
a_d_idx != 0;
}
} == 0)
$stop;
end
end
end
endfunction
endclass
endfunction
endclass
endpackage
module t;