Tests: Avoid implied static variables, to avoid future warning

test_regress/t/t_array_method_map.v

@@ -12,8 +12,8 @@
 module t;
 
    initial begin
-      int res[];
-      int a[3] = '{100, 200, 300};
+      automatic int res[];
+      automatic int a[3] = '{100, 200, 300};
 
       // TODO results not known to be correct
       res = a.map(el) with (el == 200);

test_regress/t/t_assigndly_deep_ref.v

@@ -51,9 +51,9 @@ module t;
   endtask
 
   initial begin
-    Foo foo = new(iface);
-    Foo foo2 = new(iface2);
-    Bar bar = new(foo);
+    automatic Foo foo = new(iface);
+    automatic Foo foo2 = new(iface2);
+    automatic Bar bar = new(foo);
     clockSome();
     if (iface.x != 0) $stop;
     if (iface2.x != 0) $stop;

test_regress/t/t_assigndly_deep_ref_array.v

@@ -55,9 +55,9 @@ module t;
   endtask
 
   initial begin
-    Foo foo = new(iface);
-    Foo foo2 = new(iface2);
-    Bar bar = new(foo);
+    automatic Foo foo = new(iface);
+    automatic Foo foo2 = new(iface2);
+    automatic Bar bar = new(foo);
     clockSome();
     if (iface.x[0] != 0) $stop;
     if (iface.x[1] != 0) $stop;

test_regress/t/t_assoc_compare.v

@@ -39,8 +39,8 @@ module t;
       begin // check that a class as key is fine
          int assoc1[Cls];
          int assoc2[Cls];
-         Cls a = new;
-         Cls b = new;
+         automatic Cls a = new;
+         automatic Cls b = new;
          int t;
          assoc1[a] = 0;
          `check_ne(assoc1, assoc2)
@@ -53,8 +53,8 @@ module t;
       begin // check that a class as value is fine
          Cls assoc1[int];
          Cls assoc2[int];
-         Cls a = new;
-         Cls b = new;
+         automatic Cls a = new;
+         automatic Cls b = new;
          assoc1[1] = a;
          assoc2[1] = b;
          `check_ne(assoc1, assoc2)

test_regress/t/t_assoc_enum.v

@@ -36,7 +36,7 @@ endclass
 module t;
 
   initial begin
-    X x = new;
+    automatic X x = new;
     $finish;
   end
 

test_regress/t/t_assoc_method_map.v

@@ -10,8 +10,8 @@
 module t;
 
    initial begin
-      int res[];
-      int a[int] = '{1: 100, 2: 200, 3: 300};
+      automatic int res[];
+      automatic int a[int] = '{1: 100, 2: 200, 3: 300};
 
       // TODO results not known to be correct
       res = a.map(el) with (el == 2);

test_regress/t/t_assoc_nokey_bad.out

@@ -1,10 +1,10 @@
-%Error: t/t_assoc_nokey_bad.v:12:28: Missing pattern key (need an expression then a ':')
+%Error: t/t_assoc_nokey_bad.v:12:36: Missing pattern key (need an expression then a ':')
                                    : ... note: In instance 't'
-   12 |       int dict[string] = '{1, 2};
-      |                            ^
+   12 |     automatic int dict[string] = '{1, 2};
+      |                                    ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_assoc_nokey_bad.v:12:31: Missing pattern key (need an expression then a ':')
+%Error: t/t_assoc_nokey_bad.v:12:39: Missing pattern key (need an expression then a ':')
                                    : ... note: In instance 't'
-   12 |       int dict[string] = '{1, 2};
-      |                               ^
+   12 |     automatic int dict[string] = '{1, 2};
+      |                                       ^
 %Error: Exiting due to

test_regress/t/t_assoc_nokey_bad.v

@@ -8,13 +8,13 @@
 
 module t;
 
-   initial begin
-      int dict[string] = '{1, 2};
-      int dict2[string] = '{3: 4};  // Legal due to value-to-string conversion
-      $display("dict=%p", dict);
-      $display("dict2=%p", dict2);
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
+  initial begin
+    automatic int dict[string] = '{1, 2};
+    automatic int dict2[string] = '{3: 4};  // Legal due to value-to-string conversion
+    $display("dict=%p", dict);
+    $display("dict2=%p", dict2);
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
 
 endmodule

test_regress/t/t_assoc_ref_type.v

@@ -66,13 +66,13 @@ module t;
    localparam string str_key = "the_key";
 
    initial begin
-      Bar bar_i = new;
-      Baz baz_1_i = new;
-      Baz #(Foo2) baz_2_i = new;
-      Bum bum_i;
+      automatic Bar bar_i = new;
+      automatic Baz baz_1_i = new;
+      automatic Baz #(Foo2) baz_2_i = new;
+      automatic Bum bum_i;
 
-      Wrapper#(wrap_map_t) wrap_map = new();
-      Wrapper#(wrap_queue_t) wrap_queue = new();
+      automatic Wrapper#(wrap_map_t) wrap_map = new();
+      automatic Wrapper#(wrap_queue_t) wrap_queue = new();
 
       bar_i.set(1);
       baz_1_i.set(2);

test_regress/t/t_assoc_wildcard_map.v

@@ -12,8 +12,8 @@
 module t;
 
    initial begin
-      int res[];
-      int a [*] = '{1: 100, 2: 200, 3: 300};
+      automatic int res[];
+      automatic int a [*] = '{1: 100, 2: 200, 3: 300};
 
       // TODO results not known to be correct
       res = a.map(el) with (el == 2);

test_regress/t/t_assoc_wildcard_method.v

@@ -18,7 +18,7 @@ module t;
    initial begin
       int q[*];
       int qe [ * ];  // Empty - Note spaces around [*] for parsing coverage
-      point points_q[*] = '{"a": point'{1, 2}, "b": point'{2, 4}, "c": point'{1, 4}};
+      automatic point points_q[*] = '{"a": point'{1, 2}, "b": point'{2, 4}, "c": point'{1, 4}};
       int qv[$];  // Value returns
       int qi[$];  // Index returns
       int i;

test_regress/t/t_case_call_count.v

@@ -25,7 +25,7 @@ endclass
 module t;
   Cls c;
   initial begin
-    bit called = 0;
+    bit called;
     c = new;
     case (c.get())
       4: $stop;

test_regress/t/t_case_inside_call_count.v

@@ -25,7 +25,7 @@ endclass
 module t;
   Cls c;
   initial begin
-    bit called = 0;
+    bit called;
     c = new;
     case (c.get()) inside
       [0:5]: $stop;

test_regress/t/t_cast_stream.v

@@ -18,9 +18,9 @@ typedef enum {
 module t;
 
    initial begin
-      bit array[] = new [8];
-      int unsigned m_length;
-      uvm_tlm_command_e m_command;
+      automatic bit array[] = new [8];
+      automatic int unsigned m_length;
+      automatic uvm_tlm_command_e m_command;
 
       m_length = 2;
       array = '{0, 0, 0, 0, 0, 0, 1, 0};

test_regress/t/t_class_assign_cond.v

@@ -33,10 +33,11 @@ module t;
    typedef ExtendCls ExtendCls_t;
 
    initial begin
-      Cls cls1 = null, cls2 = null;
-      ExtendCls_t ext_cls = null;
-      AnotherExtendCls an_ext_cls = null;
-      ExtendExtendCls ext_ext_cls = null;
+      automatic Cls cls1 = null;
+      automatic Cls cls2 = null;
+      automatic ExtendCls_t ext_cls = null;
+      automatic AnotherExtendCls an_ext_cls = null;
+      automatic ExtendExtendCls ext_ext_cls = null;
       int r;
 
       cls1 = (cls1 == null) ? cls2 : cls1;

test_regress/t/t_class_class_extends.v

@@ -107,7 +107,7 @@ module t;
   endclass
 
   initial begin
-    Cls c = new();
+    automatic Cls c = new();
     $finish;
   end
 endmodule

test_regress/t/t_class_compare.v

@@ -22,12 +22,12 @@ endclass
 
 module t;
    initial begin
-      Cls a = new;
-      Cls b = new;
-      ExtendCls ext = new;
-      Cls::InnerCls ia = new;
-      Cls::InnerCls ib = new;
-      ExtendCls::InnerCls iext = new;
+      automatic Cls a = new;
+      automatic Cls b = new;
+      automatic ExtendCls ext = new;
+      automatic Cls::InnerCls ia = new;
+      automatic Cls::InnerCls ib = new;
+      automatic ExtendCls::InnerCls iext = new;
       `check_ne(a, b)
       `check_ne(a, ext)
       `check_ne(ext, a)

test_regress/t/t_class_const.v

@@ -11,7 +11,7 @@ endclass
 
 module t;
    initial begin
-      Cls c = new;
+      automatic Cls c = new;
       if (c.aconst !== 10) $stop;
       if (Cls::astatic !== 20) $stop;
       $write("*-* All Finished *-*\n");

test_regress/t/t_class_dead_varscope_uaf.v

@@ -49,7 +49,7 @@ module t;
   import p::*;
 
   initial begin
-    comp_proxy cp = new;
+    automatic comp_proxy cp = new;
     void'(cp.get_config_object("x"));
     $finish;
   end

test_regress/t/t_class_dict.v

@@ -16,9 +16,9 @@ endclass
 
 module t;
    initial begin
-      int dict[Cls];
-      Cls c1 = new(1);
-      Cls c2 = new(2);
+      automatic int dict[Cls];
+      automatic Cls c1 = new(1);
+      automatic Cls c2 = new(2);
       dict[c1] = 1;
       dict[c2] = 2;
       `checkh(dict[c1], 1);

test_regress/t/t_class_dyn_cast_empty_if.v

@@ -23,9 +23,9 @@ endclass
 
 module t;
   initial begin
-    Derived d = new("Hello");
-    Base b = d;
-    Derived c = b.cast();
+    automatic Derived d = new("Hello");
+    automatic Base b = d;
+    automatic Derived c = b.cast();
     if (d.get() != c.get()) $stop;
     $write("*-* All Finished *-*\n");
     $finish;

test_regress/t/t_class_extern.v

@@ -87,8 +87,8 @@ endtask
 
 module t;
    initial begin
-      Cls c = new;
-      Cls::SubCls subc = new;
+      automatic Cls c = new;
+      automatic Cls::SubCls subc = new;
       c.ext_t_i(2);
       if (c.ext_f_np() != 1) $stop;
       if (c.ext_f_p() != 2) $stop;

test_regress/t/t_class_field_name.v

@@ -11,7 +11,7 @@ endclass
 module t;
 
    initial begin
-      Cls cls = new;
+      automatic Cls cls = new;
       cls.queue = 1;
       if (cls.queue == 1) begin
          $write("*-* All Finished *-*\n");

test_regress/t/t_class_func_arg_unused.v

@@ -19,7 +19,7 @@ endpackage
 module t;
 
    initial begin
-      uvm_pkg::uvm_reg_field c = new;
+      automatic uvm_pkg::uvm_reg_field c = new;
       c.configure(1, 0);
       c.configure(0, 0);
       $write("*-* All Finished *-*\n");

test_regress/t/t_class_hier_construction.v

@@ -72,10 +72,10 @@ endclass
 module t;
 
   initial begin
-    sky_class s = new("ahoj");
-    bottom_class b = s;
-    top_class t = s;
-    IMid im;
+    automatic sky_class s = new("ahoj");
+    automatic bottom_class b = s;
+    automatic top_class t = s;
+    automatic IMid im;
 
     `checks(b.name, "middle ahoj 42");
     `checks(s.name, "middle ahoj 42");

test_regress/t/t_class_if_assign.v

@@ -25,9 +25,9 @@ endclass
 
 module t;
    initial begin
-      Cls cls = new;
-      ExtendCls ext_cls = new;
-      AnotherExtendCls an_ext_cls = new;
+      automatic Cls cls = new;
+      automatic ExtendCls ext_cls = new;
+      automatic AnotherExtendCls an_ext_cls = new;
 
       if (cls.x == 1) cls = ext_cls;
       else cls = an_ext_cls;

test_regress/t/t_class_local_nested_bad.v

@@ -17,7 +17,7 @@ endclass
 
 module t;
     initial begin
-        NodeList n = new;
+        automatic NodeList n = new;
 
         $write("*-* All Finished *-*\n");
         $finish;

test_regress/t/t_class_method_str_literal.v

@@ -36,8 +36,8 @@ endclass
 
 
 initial begin
-    T t_c = new;
-    uvm_reg u_r = new;
+    automatic T t_c = new;
+    automatic uvm_reg u_r = new;
     if (u_r.get_string() != "user backdoor") $stop;
     if (t_c.return_str("A") != "A") $stop;
     if (t_c.static_return_str("B") != "B") $stop;

test_regress/t/t_class_method_struct.v

@@ -22,8 +22,8 @@ endclass : Cls
 
 module t;
    initial begin
-      Cls c = new;
-      my_struct s = c.get_struct;
+      automatic Cls c = new;
+      automatic my_struct s = c.get_struct;
       if (s.x != 1) $stop;
       if (s.y != 2) $stop;
       if (s.z != 3) $stop;

test_regress/t/t_class_mispure_bad.v

@@ -14,7 +14,7 @@ endclass
 
 module t;
    initial begin
-      Bar obj = new();
+      automatic Bar obj = new();
       obj.pvfunc();
       $stop;
    end

test_regress/t/t_class_misstatic_bad.v

@@ -46,7 +46,7 @@ module t;
     Cls::isst();
   endfunction
   initial begin
-    Bar obj = new();
+    automatic Bar obj = new();
     obj.bar();
     Cls::nonstatic();  // <--- bad static ref
     Cls::isst();

test_regress/t/t_class_nested.v

@@ -46,14 +46,14 @@ endclass
 
 module t;
     initial begin
-        NodeList n = new;
-        NodeList::Node n1 = new;
-        NodeList::Node n2 = new;
-        NodeTree tr = new;
-        NodeTree::Node t1 = new;
-        NodeTree::Node t2 = new;
-        Outer o = new;
-        Outer::Inner i = new;
+        automatic NodeList n = new;
+        automatic NodeList::Node n1 = new;
+        automatic NodeList::Node n2 = new;
+        automatic NodeTree tr = new;
+        automatic NodeTree::Node t1 = new;
+        automatic NodeTree::Node t2 = new;
+        automatic Outer o = new;
+        automatic Outer::Inner i = new;
 
         i.innerMethod(o);
 

test_regress/t/t_class_new.v

@@ -63,7 +63,7 @@ module t;
       ClsArg   c2;
       Cls2Arg  c3;
       Cls2Arg  c4;
-      ClsNoArg::InnerNoArg c5 = new;
+      automatic ClsNoArg::InnerNoArg c5 = new;
 
       c1 = new;
       if (c1.imembera != 5) $stop;

test_regress/t/t_class_new_ref_bad.out

@@ -7,8 +7,8 @@
                                      : ... note: In instance 't'
    17 |       txn_type_t copy = new txn;
       |                         ^~~
-%Error: t/t_class_new_ref_bad.v:26:21: Assign RHS expects a CLASSREFDTYPE 'Base', got BASICDTYPE 'int'
+%Error: t/t_class_new_ref_bad.v:26:31: Assign RHS expects a CLASSREFDTYPE 'Base', got BASICDTYPE 'int'
                                      : ... note: In instance 't'
-   26 |       Base b = Cls::generate_txn();
-      |                     ^~~~~~~~~~~~
+   26 |       automatic Base b = Cls::generate_txn();
+      |                               ^~~~~~~~~~~~
 %Error: Exiting due to

test_regress/t/t_class_new_ref_bad.v

@@ -23,7 +23,7 @@ endclass
 module t;
 
    initial begin
-      Base b = Cls::generate_txn();
+      automatic Base b = Cls::generate_txn();
       $display("%p", b);
 
       $write("*-* All Finished *-*\n");

test_regress/t/t_class_new_supernfirst_bad.v

@@ -23,7 +23,7 @@ endclass
 
 module t;
   initial begin
-    spi_reg_block test = new;
+    automatic spi_reg_block test = new;
     $finish;
   end
 endmodule

test_regress/t/t_class_param_enum.v

@@ -14,8 +14,9 @@ endclass
 
 module t;
    initial begin
-      Converter#(enum_t) conv1 = new;
-      Converter#(bit) conv2 = new;
+      automatic Converter#(enum_t) conv1 = new;
+      automatic Converter#(bit) conv2 = new;
+
       if (conv1.toInt(A) != 0) $stop;
       if (conv2.toInt(1) != 1) $stop;
 

test_regress/t/t_class_param_enum_bad.out

@@ -1,7 +1,7 @@
-%Error: t/t_class_param_enum_bad.v:20:31: Assign RHS expects a CLASSREFDTYPE 'Converter__Tz2', got CLASSREFDTYPE 'Converter__Tz1'
+%Error: t/t_class_param_enum_bad.v:20:41: Assign RHS expects a CLASSREFDTYPE 'Converter__Tz2', got CLASSREFDTYPE 'Converter__Tz1'
                                         : ... note: In instance 't'
-   20 |       Converter#(bit) conv2 = conv1;
-      |                               ^~~~~
+   20 |       automatic Converter#(bit) conv2 = conv1;
+      |                                         ^~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error-ENUMVALUE: t/t_class_param_enum_bad.v:21:19: Implicit conversion to enum 'enum{}$unit::enum_t' from 'logic[31:0]' (IEEE 1800-2023 6.19.3)
                                                   : ... note: In instance 't'

test_regress/t/t_class_param_enum_bad.v

@@ -14,10 +14,10 @@ endclass
 
 module t;
    initial begin
-      Converter#(enum_t) conv1 = new;
+      automatic Converter#(enum_t) conv1 = new;
       // enum types does not match with other types (IEEE 1800-2023 6.22.1 and 6.22.4)
       // The assignment and the function call should throw an error.
-      Converter#(bit) conv2 = conv1;
+      automatic Converter#(bit) conv2 = conv1;
       conv1.toInt(0);
       $stop;
    end

test_regress/t/t_class_param_extends2.v

@@ -26,8 +26,8 @@ typedef Baz baz_t;
 
 module t;
    initial begin
-      bar_default_t bar_default = new;
-      baz_t baz = new;
+      automatic bar_default_t bar_default = new;
+      automatic baz_t baz = new;
 
       if (bar_default.x != 32) $stop;
       if (baz.bar_x != 8) $stop;

test_regress/t/t_class_param_type.v

@@ -125,9 +125,9 @@ module t;
       automatic GetStaticXVal#(StaticX) get_statix_x_val = new;
 
       typedef bit my_bit_t;
-      Bar#(.A(my_bit_t)) bar_a_bit = new;
-      Bar#(.B(my_bit_t)) bar_b_bit = new;
-      Bar#() bar_default = new;
+      automatic Bar#(.A(my_bit_t)) bar_a_bit = new;
+      automatic Bar#(.B(my_bit_t)) bar_b_bit = new;
+      automatic Bar#() bar_default = new;
 
       if (bar_a_bit.get_size_A != 1) $stop;
       if (bar_a_bit.get_size_B != 1) $stop;

test_regress/t/t_class_param_typedef.v

@@ -46,14 +46,14 @@ endclass
 
 module t;
    initial begin
-      Cls1::type_id bar1 = new;
-      Cls2::type_id bar2 = new;
+      automatic Cls1::type_id bar1 = new;
+      automatic Cls2::type_id bar2 = new;
 
-      ClsTypedefParam #(int) cls_int = new;
-      ClsTypedefParam#() cls_def;
+      automatic ClsTypedefParam #(int) cls_int = new;
+      automatic ClsTypedefParam#() cls_def;
 
-      uvm_sequencer #(int, int) uvm_seq1 = new;
-      uvm_sequencer #(int, int)::this_type uvm_seq2;
+      automatic uvm_sequencer #(int, int) uvm_seq1 = new;
+      automatic uvm_sequencer #(int, int)::this_type uvm_seq2;
 
       if (bar1.get_x() != 1) $stop;
       if (bar2.get_x() != 2) $stop;

test_regress/t/t_class_param_typedef2.v

@@ -25,7 +25,7 @@ typedef uvm_object_registry#(MyInt) type_id;
 
 module t;
   initial begin
-    MyInt mi = type_id::create_object();
+    automatic MyInt mi = type_id::create_object();
     if (mi.x != 1) $stop;
 
     $write("*-* All Finished *-*\n");

test_regress/t/t_class_param_unused_default.v

@@ -17,7 +17,7 @@ endclass
 
 module t;
    initial begin
-      Bar#(Baz) bar_baz = new;
+      automatic Bar#(Baz) bar_baz = new;
       if (bar_baz.t.x != 1) $stop;
 
       $write("*-* All Finished *-*\n");

test_regress/t/t_class_param_virtual_bad.out

@@ -1,7 +1,7 @@
-%Error: t/t_class_param_virtual_bad.v:23:28: Illegal to call 'new' using an abstract virtual class 'ClsVirt' (IEEE 1800-2023 8.21)
+%Error: t/t_class_param_virtual_bad.v:23:38: Illegal to call 'new' using an abstract virtual class 'ClsVirt' (IEEE 1800-2023 8.21)
                                            : ... note: In instance 't'
-   23 |       ClsVirt#(VBase) cv = new;   
-      |                            ^~~
+   23 |       automatic ClsVirt#(VBase) cv = new;   
+      |                                      ^~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: t/t_class_param_virtual_bad.v:13:11: Illegal to call 'new' using an abstract virtual class 'VBase' (IEEE 1800-2023 8.21)
                                            : ... note: In instance 't'

test_regress/t/t_class_param_virtual_bad.v

@@ -19,8 +19,8 @@ endclass
 
 module t;
    initial begin
-      Cls c = new;  // Error
-      ClsVirt#(VBase) cv = new;  // Error
+      automatic Cls c = new;  // Error
+      automatic ClsVirt#(VBase) cv = new;  // Error
       $stop;
    end
 endmodule

test_regress/t/t_class_ref_as_arg_cast.v

@@ -14,7 +14,8 @@ endclass
 
 module t;
   initial begin
-    Qux qux = new;
+    Qux qux;
+    qux = new;
     Foo::bar(qux);
     Foo::bar(null);
   end

test_regress/t/t_class_static_default_arg.v

@@ -14,7 +14,7 @@ module t;
 
    initial begin
       bit first;
-      bit arg[$] = {1'b0, 1'b1};
+      automatic bit arg[$] = {1'b0, 1'b1};
       first = Foo::get_first();
       if (first != 1) $stop;
       first = Foo::get_first(arg);

test_regress/t/t_class_static_member_sel.v

@@ -57,11 +57,11 @@ endclass
 module t;
 
    initial begin
-      Foo foo = new;
-      Bar bar = new;
-      Baz baz = new;
-      ExtendCls ec = new;
-      Getter1 getter1 = new;
+      automatic Foo foo = new;
+      automatic Bar bar = new;
+      automatic Baz baz = new;
+      automatic ExtendCls ec = new;
+      automatic Getter1 getter1 = new;
 
       if (foo.x != 1) $stop;
 

test_regress/t/t_class_super_new3.v

@@ -21,7 +21,7 @@ endclass
 
 module t;
   initial begin
-    Derived d = new;
+    automatic Derived d = new;
     if (d.j != 8) $stop;
     $write("*-* All Finished *-*\n");
     $finish;

test_regress/t/t_class_typedef.v

@@ -23,7 +23,7 @@ endclass
 
 module t;
    initial begin
-      uvm_resource_pool pool = new;
+      automatic uvm_resource_pool pool = new;
       typedef logic [7:0] t_t0;
       C#(t_t0,3)::t_vector v0;
       C#(t_t0,3)::t_array a0;

test_regress/t/t_class_virtual.v

@@ -72,12 +72,12 @@ endclass
 
 module t;
    initial begin
-      VA va = new;
-      VB vb = new;
-      VA::VNested vna = new;
-      VB::VNested vnb = new;
-      VBase b;
-      VBase::VNested bn;
+      automatic VA va = new;
+      automatic VB vb = new;
+      automatic VA::VNested vna = new;
+      automatic VB::VNested vnb = new;
+      automatic VBase b;
+      automatic VBase::VNested bn;
 
       uvm_build_phase ph;
       ExtendsCls ec;

test_regress/t/t_class_virtual_bad.out

@@ -1,6 +1,6 @@
-%Error: t/t_class_virtual_bad.v:12:17: Illegal to call 'new' using an abstract virtual class 'VBase' (IEEE 1800-2023 8.21)
+%Error: t/t_class_virtual_bad.v:12:27: Illegal to call 'new' using an abstract virtual class 'VBase' (IEEE 1800-2023 8.21)
                                      : ... note: In instance 't'
-   12 |       VBase b = new;   
-      |                 ^~~
+   12 |       automatic VBase b = new;   
+      |                           ^~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to

test_regress/t/t_class_virtual_bad.v

@@ -9,6 +9,6 @@ endclass
 
 module t;
    initial begin
-      VBase b = new;  // Error
+      automatic VBase b = new;  // Error
    end
 endmodule

test_regress/t/t_class_virtual_chain_ctor.v

@@ -29,6 +29,6 @@ endclass
 
 module t;
    initial begin
-      VChild2 c = new;
+      automatic VChild2 c = new;
    end
 endmodule

test_regress/t/t_constraint_countones.v

@@ -6,8 +6,8 @@
 
 `define check_rand(cl, field, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize())) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \

test_regress/t/t_constraint_dist.v

@@ -6,8 +6,8 @@
 
 `define check_rand(cl, field, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize())) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \
@@ -39,7 +39,8 @@ endclass
 
 module t;
    initial begin
-      C c = new;
+      C c;
+      c = new;
       `check_rand(c, c.x, 5 <= c.x && c.x <= 6);
       `check_rand(c, c.y, 5 <= c.y && c.y <= 6);
       `check_rand(c, c.z, 3 <= c.z && c.z <= 5);

test_regress/t/t_constraint_foreach.v

@@ -6,8 +6,8 @@
 
 `define check_rand(cl, field, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize())) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \
@@ -61,8 +61,8 @@ endclass
 
 module t;
    initial begin
-      C c = new;
-      D d = new;
+      automatic C c = new;
+      automatic D d = new;
       `check_rand(c, c.x, 4 < c.x && c.x < 7);
       `check_rand(d, d.posit, (d.posit ? 4 : -3) < d.x && d.x < (d.posit ? 7 : 0));
       $write("*-* All Finished *-*\n");

test_regress/t/t_constraint_global_arr_unsup.v

@@ -56,7 +56,7 @@ endclass
 
 module t_constraint_global_arr_unsup;
   initial begin
-    Outer o = new;
+    automatic Outer o = new;
     if (o.randomize()) begin
       $display("Case 1 - Simple: mid.obj.x = %0d (expected 100)", o.m_mid.m_obj.m_x);
       $display("Case 1 - Simple: mid.obj.y = %0d (expected 101)", o.m_mid.m_obj.m_y);

test_regress/t/t_constraint_inheritance.v

@@ -6,8 +6,8 @@
 
 `define check_rand(cl, field, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize())) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \
@@ -47,11 +47,11 @@ endclass
 
 module t;
   initial begin
-    B b = new;
-    C c = new;
-    D d = new;
-    E e = new;
-    A a = b;
+    automatic B b = new;
+    automatic C c = new;
+    automatic D d = new;
+    automatic E e = new;
+    automatic A a = b;
     `check_rand(a, b.x, b.x > 0);
     `check_rand(c, c.x, c.x > 0);
     `check_rand(c, c.y, c.x > 0);

test_regress/t/t_constraint_inheritance_with.v

@@ -6,8 +6,8 @@
 
 `define check_rand(cl, field, constr, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize() with { constr; })) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \
@@ -47,11 +47,11 @@ endclass
 
 module t;
   initial begin
-    B b = new;
-    C c = new;
-    D d = new;
-    E e = new;
-    A a = b;
+    automatic B b = new;
+    automatic C c = new;
+    automatic D d = new;
+    automatic E e = new;
+    automatic A a = b;
     `check_rand(a, a.x, x < 10, a.x > 0 && a.x < 10);
     `check_rand(c, c.x, x < 100, c.x > 0 && c.x < 100);
     `check_rand(c, c.y, x == 5, c.x == 5);

test_regress/t/t_constraint_mode.v

@@ -62,10 +62,10 @@ endclass
 
 module t;
   initial begin
-    logic[1:0] ok = 0;
-    int res;
-    Qux qux = new;
-    Bar bar = qux;
+    automatic logic[1:0] ok = 0;
+    automatic int res;
+    automatic Qux qux = new;
+    automatic Bar bar = qux;
 
     qux.test;
 

test_regress/t/t_constraint_pure.v

@@ -19,7 +19,7 @@ endclass
 
 module t;
    initial begin
-      Cls c = new;
+      automatic Cls c = new;
       $write("*-* All Finished *-*\n");
       $finish;
    end

test_regress/t/t_constraint_state.v

@@ -7,8 +7,8 @@
 
 `define check_rand(cl, field, cond) \
 begin \
-   longint prev_result; \
-   int ok = 0; \
+   automatic longint prev_result; \
+   automatic int ok; \
    if (!bit'(cl.randomize())) $stop; \
    prev_result = longint'(field); \
    if (!(cond)) $stop; \

test_regress/t/t_constraint_unsup_unq_arr.v

@@ -57,7 +57,7 @@ endclass : UniqueMultipleArray
 module t;
   initial begin
     // Create an instance of the UniqueMultipleArray class
-    UniqueMultipleArray array_instance = new();
+    automatic UniqueMultipleArray array_instance = new();
 
     // Attempt to randomize and verify the constraints
     /* verilator lint_off WIDTHTRUNC */

test_regress/t/t_cover_expr.out

@@ -288,10 +288,10 @@
         
             logic ta, tb, tc;
             initial begin
-                cls obj = new;
-                cls null_obj = null;
-                int q[5];
-                int qv[$];
+                automatic cls obj = new;
+                automatic cls null_obj = null;
+                automatic int q[5];
+                automatic int qv[$];
         
                 q = '{1, 2, 2, 4, 3};
                 // lambas not handled

test_regress/t/t_cover_expr.v

@@ -128,10 +128,10 @@ module t (/*AUTOARG*/
 
     logic ta, tb, tc;
     initial begin
-        cls obj = new;
-        cls null_obj = null;
-        int q[5];
-        int qv[$];
+        automatic cls obj = new;
+        automatic cls null_obj = null;
+        automatic int q[5];
+        automatic int qv[$];
 
         q = '{1, 2, 2, 4, 3};
         // lambas not handled

test_regress/t/t_cover_expr_array_class.v

@@ -10,10 +10,10 @@ endclass
 
 module t;
    initial begin
-      int i = 0;
+      int i;
       Class1 q[15];
       for (int j = 0; j < 15; j = j + 1) begin
-         Class1 x = new;
+         automatic Class1 x = new;
          q[j] = x;
       end
       while (i < 15) begin

test_regress/t/t_cover_expr_associative_array_class.v

@@ -10,10 +10,10 @@ endclass
 
 module t;
   initial begin
-    int i = 0;
-    Class1 q[int] = '{};
+    int i;
+    automatic Class1 q[int] = '{};
     for (int j = 0; j < 15; j = j + 1) begin
-      Class1 x = new;
+      automatic Class1 x = new;
       q[j] = x;
     end
     while (i < 15) begin

test_regress/t/t_cover_expr_dyn_array_class.v

@@ -10,10 +10,10 @@ endclass
 
 module t;
    initial begin
-      int i = 0;
-      Class1 q[] = new [15];
+      automatic int i;
+      automatic Class1 q[] = new [15];
       for (int j = 0; j < 15; j = j + 1) begin
-         Class1 x = new;
+         automatic Class1 x = new;
          q[j] = x;
       end
       while (i < 15) begin

test_regress/t/t_cover_expr_max.out

@@ -416,10 +416,10 @@
         
             logic ta, tb, tc;
             initial begin
-                cls obj = new;
-                cls null_obj = null;
-                int q[5];
-                int qv[$];
+                automatic cls obj = new;
+                automatic cls null_obj = null;
+                automatic int q[5];
+                automatic int qv[$];
         
                 q = '{1, 2, 2, 4, 3};
                 // lambas not handled

test_regress/t/t_cover_expr_queue_class.v

@@ -10,10 +10,10 @@ endclass
 
 module t;
    initial begin
-      int i = 0;
+      int i;
       Class1 q[$];
       repeat(15) begin
-         Class1 x = new;
+         automatic Class1 x = new;
          q = { q, x };
       end
       while (i < q.size()) begin

test_regress/t/t_cover_expr_trace.out

@@ -288,10 +288,10 @@
         
             logic ta, tb, tc;
             initial begin
-                cls obj = new;
-                cls null_obj = null;
-                int q[5];
-                int qv[$];
+                automatic cls obj = new;
+                automatic cls null_obj = null;
+                automatic int q[5];
+                automatic int qv[$];
         
                 q = '{1, 2, 2, 4, 3};
                 // lambas not handled

test_regress/t/t_cover_line_expr.out

@@ -397,12 +397,12 @@
             logic ta, tb, tc;
 %000001     initial begin
 -000001  point: comment=block hier=top.t
-%000001         cls obj = new;
+%000001         automatic cls obj = new;
 -000001  point: comment=block hier=top.t
-%000001         cls null_obj = null;
+%000001         automatic cls null_obj = null;
 -000001  point: comment=block hier=top.t
-                int q[5];
-                int qv[$];
+                automatic int q[5];
+                automatic int qv[$];
         
 %000001         q = '{1, 2, 2, 4, 3};
 -000001  point: comment=block hier=top.t

test_regress/t/t_covergroup_unsup.v

@@ -197,9 +197,9 @@ module t (/*AUTOARG*/
    endclass
 
    initial begin
-      cg_empty cov1 = new;
+      automatic cg_empty cov1 = new;
 `ifndef T_COVERGROUP_UNSUP_IGN
-      cgArgs cov2 = new(2);
+      automatic cgArgs cov2 = new(2);
 `endif
    end
 

test_regress/t/t_disable_empty_outside.v

@@ -7,7 +7,7 @@
 module t;
    initial begin
       begin : blk
-         int x = 0;
+         static int x = 0;
          fork : fork_blk
             begin
             end

test_regress/t/t_disable_inside.v

@@ -6,7 +6,7 @@
 
 module t;
   initial begin
-    int x = 0;
+    static int x = 0;
     fork : fork_blk
       begin
         #1;
@@ -28,7 +28,7 @@ module t;
   end
 
   initial begin
-    int y = 0;
+    static int y = 0;
     fork
       begin : fork_branch
         #1;

test_regress/t/t_disable_outside.v

@@ -7,7 +7,7 @@
 module t;
    initial begin
       begin : blk
-         int x = 0;
+         int x;
          fork : fork_blk
             begin
                x = 1;

test_regress/t/t_disable_outside2.v

@@ -8,7 +8,7 @@ module t;
    initial begin
       for (int i = 0; i < 3; i++) begin
          begin : blk
-            int x = 0;
+            int x;
             fork : fork_blk
                begin
                   x = 1;

test_regress/t/t_disable_outside3.v

@@ -7,7 +7,7 @@
 module t;
    initial begin
       begin : blk
-         int x = 0;
+         int x;
          fork : fork_blk
             begin
                #4;

test_regress/t/t_disable_outside4.v

@@ -7,7 +7,7 @@
 module t;
    initial begin
       begin : blk
-         int x = 0;
+         int x;
          fork
             begin
                #1;

test_regress/t/t_disable_task_simple.v

@@ -34,7 +34,7 @@ endclass
 
 module t;
   initial begin
-    Cls c = new;
+    automatic Cls c = new;
     c.disable_outside_fork();
     #2;
     if (c.x != 1) $stop;

test_regress/t/t_disable_within_task_unsup.v

@@ -11,7 +11,7 @@ endtask
 module t;
 
    initial begin : init
-      int x = 0;
+      int x;
       fork : fork_blk
          begin
             x = 1;

test_regress/t/t_do_while.v

@@ -20,7 +20,7 @@ module t;
 
       a = 0;
       do begin
-         int x = 1;
+         automatic int x = 1;
          a += x;
          if (a == 1) begin
             a = 2;
@@ -55,7 +55,7 @@ module t;
       a = 1;
       do begin
          do begin
-            int x = 1;
+            automatic int x = 1;
             a += x;
          end while (a < 3);
       end while (a < 5);

test_regress/t/t_dpi_inline_new.v

@@ -41,7 +41,7 @@ module t (
   import pyhdl_if::*;
 
   initial begin
-    py_tuple t0 = new;
+    automatic py_tuple t0 = new;
     py_object o;
     o = t0.get_item(1);
     $write("*-* All Finished *-*\n");

test_regress/t/t_dynarray_cast_write.v

@@ -16,10 +16,10 @@ endclass
 
 module t;
    initial begin
-      int sel_bit = 3;
-      Bar bar = new;
-      Foo foo = bar;
-      Bar bars[] = new[4];
+      automatic int sel_bit = 3;
+      automatic Bar bar = new;
+      automatic Foo foo = bar;
+      automatic Bar bars[] = new[4];
       $cast(bars[0], foo);
       if (bars[0].x != 2) $stop;
 

test_regress/t/t_expr_incr_unsup.v

@@ -12,7 +12,7 @@ endfunction
 
 module t;
     initial begin
-        int arr [1:0] = {0, 0};
+        automatic int arr [1:0] = {0, 0};
         i = 0;
         $display("Value: %d", arr[postincrement_i()]++);
     end

test_regress/t/t_flag_output_groups.v

@@ -27,7 +27,7 @@ module t (/*AUTOARG*/
       genvar i;
       for (i = 0; i < MAX; i++)
          initial begin
-            Foo#(i) item = new;
+            automatic Foo#(i) item = new;
             q.push_back(item);
          end
    endgenerate

test_regress/t/t_foreach_iface.v

@@ -6,7 +6,7 @@
 
 interface Iface (input bit [31:0] regs [1]);
    initial begin
-      string instance_path = $sformatf("%m");
+      automatic string instance_path = $sformatf("%m");
       $display("Iface path %s\n", instance_path);
       $write("*-* All Finished *-*\n");
       $finish;

test_regress/t/t_foreach_nested.v

@@ -21,7 +21,7 @@ endclass
 
 module t;
   initial begin
-    Bar b = new;
+    automatic Bar b = new;
     b.test;
     $write("*-* All Finished *-*\n");
     $finish;

test_regress/t/t_fork_block_item_declaration.v

@@ -23,7 +23,7 @@ endclass
 
 module t();
   initial begin
-    int desired_counts[10] = '{10{1}};
+    automatic int desired_counts[10] = '{10{1}};
     counts = '{10{0}};
 
     Foo::do_something();

test_regress/t/t_fork_none_var.v

@@ -10,7 +10,7 @@ module t;
 
    initial begin
       int i;
-      int n = 4;
+      automatic int n = 4;
       m_mask = 0;
       fork
          begin

test_regress/t/t_func_call_super_arg.v

@@ -23,6 +23,6 @@ endclass
 
 module t;
   initial begin
-    derived test = new;
+    automatic derived test = new;
   end
 endmodule

test_regress/t/t_inside_extend.v

@@ -10,12 +10,13 @@ class Cls;
 endclass
 
 module t;
-   initial begin
-      Cls c = new;
-      int i = 0;
-      if (i inside {c.sp}) $stop;
+  initial begin
+    Cls c;
+    int i;
+    c = new;
+    if (i inside {c.sp}) $stop;
 
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
 endmodule

test_regress/t/t_inside_queue_elem.v

@@ -7,7 +7,8 @@
 module t;
 
    initial begin
-      int q[$] = {1, 2};
+      automatic int q[$] = {1, 2};
+
       if (!(1 inside {q[0], q[1]})) $stop;
       if (3 inside {q[0], q[1]}) $stop;
 

test_regress/t/t_interface_dearray.v

@@ -31,7 +31,7 @@ module tb_top();
    initial begin
       static a_t aa = a[0];
 
-      B b = new(a[0]);
+      automatic B b = new(a[0]);
 
       c = new();
       c.vif = a;

test_regress/t/t_interface_virtual_do_while.v

@@ -23,7 +23,7 @@ module t;
   initial @(posedge vif.data) ok = 1;
 
   initial begin
-    bit first = 1;
+    static bit first = 1;
     #1;
     do begin
       if (!first) $stop;

test_regress/t/t_lint_dtype_compare.v

@@ -14,42 +14,42 @@ module t;
 
   initial begin
     // Scalar
-    int a = 1, b = 1;
+    automatic int a = 1, b = 1;
 
     // Unpacked array
-    int u1[2] = '{1, 2};
-    int u2[2] = '{1, 2};
+    automatic int u1[2] = '{1, 2};
+    automatic int u2[2] = '{1, 2};
 
-    int m1[2][2] = '{{1, 2}, {3, 4}};
-    int m2[2][2] = '{{1, 2}, {3, 4}};
+    automatic int m1[2][2] = '{{1, 2}, {3, 4}};
+    automatic int m2[2][2] = '{{1, 2}, {3, 4}};
 
     // Dynamic array
-    int d1[] = new[2];
-    int d2[] = new[2];
+    automatic int d1[] = new[2];
+    automatic int d2[] = new[2];
 
     // Queue
-    int q1[$] = '{10, 20};
-    int q2[$] = '{10, 20};
+    automatic int q1[$] = '{10, 20};
+    automatic int q2[$] = '{10, 20};
 
     // Associative array
-    int aa1[string];
-    int aa2[string];
+    automatic int aa1[string];
+    automatic int aa2[string];
 
     // Typedef array
-    myint_t t1[2] = '{1, 2};
-    myint2_t t2[2] = '{1, 2};
+    automatic myint_t t1[2] = '{1, 2};
+    automatic myint2_t t2[2] = '{1, 2};
 
     // Typedef queue
-    myq_t tq1 = '{1, 2};
-    int   tq2[$] = '{1, 2};
+    automatic myq_t tq1 = '{1, 2};
+    automatic int tq2[$] = '{1, 2};
 
     // Typedef associative array
-    myval_t aa_typedef1[mykey_t];
-    int     aa_typedef2[string];
+    automatic myval_t aa_typedef1[mykey_t];
+    automatic int aa_typedef2[string];
 
     // Typedef scalar
-    bit signed [31:0] b1 = 1;
-    int               i1 = 1;
+    automatic bit signed [31:0] b1 = 1;
+    automatic int i1 = 1;
 
     d1[0] = 5; d1[1] = 6;
     d2[0] = 5; d2[1] = 6;

test_regress/t/t_lint_dtype_compare_bad.v

@@ -18,33 +18,33 @@ module t;
   typedef logic [31:0] mylogic_t;
 
   initial begin
-    int queue_var[$] = '{1, 2, 3};
-    int q1[$] = '{1, 2};
-    bit q2[$] = '{1'b1, 1'b0};
+    automatic int queue_var[$] = '{1, 2, 3};
+    automatic int q1[$] = '{1, 2};
+    automatic bit q2[$] = '{1'b1, 1'b0};
 
-    int d1[] = new[2];
-    bit d2[] = new[2];
+    automatic int d1[] = new[2];
+    automatic bit d2[] = new[2];
 
-    int u1[2] = '{1, 2};
-    int u2[2][1] = '{{1}, {2}};
+    automatic int u1[2] = '{1, 2};
+    automatic int u2[2][1] = '{{1}, {2}};
 
-    int a1[2] = '{1, 2};
-    int a2[3] = '{1, 2, 3};
+    automatic int a1[2] = '{1, 2};
+    automatic int a2[3] = '{1, 2, 3};
 
-    int aa1[string];
-    int aa2[int];
+    automatic int aa1[string];
+    automatic int aa2[int];
 
-    int aa3[string];
-    logic [3:0] aa4[string];
+    automatic int aa3[string];
+    automatic logic [3:0] aa4[string];
 
-    myint_t bad1[2] = '{1, 2};
-    mybit_t bad2[2] = '{1, 0};
+    automatic myint_t bad1[2] = '{1, 2};
+    automatic mybit_t bad2[2] = '{1, 0};
 
-    myval_t   val1[mystr_t] = '{"foo": 123};
-    mylogic_t val2[string] = '{"foo": 32'h12345678};
+    automatic myval_t   val1[mystr_t] = '{"foo": 123};
+    automatic mylogic_t val2[string] = '{"foo": 32'h12345678};
 
-    myint_t aa5[string];
-    myint_t aa6[int];
+    automatic myint_t aa5[string];
+    automatic myint_t aa6[int];
     aa5["a"] = 1;
     aa6[1] = 1;
 

test_regress/t/t_lint_sideeffect_bad.v

@@ -12,7 +12,7 @@ endfunction
 
 module t;
     initial begin
-        int arr [3][3] = {{1, 2, 3}, {4, 5, 6}, {7, 8, 9}};
+        automatic int arr [3][3] = {{1, 2, 3}, {4, 5, 6}, {7, 8, 9}};
         i = 0;
         arr[postincrement_i()][postincrement_i()]++;
         $display("Value: %d", i);