Fix soft constraint relaxation dropping compatible constraints (#7271)
* Fix soft constraint relaxation dropping compatible constraints * patch changes the soft handle ordering so update the out files
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@ -468,16 +468,36 @@ bool VlRandomizer::next(VlRNG& rngr) {
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const size_t nSoft = m_softConstraints.size();
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bool sat = false;
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for (size_t phase = 0; phase <= nSoft && !sat; ++phase) {
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const bool hasSoft = (phase < nSoft);
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if (hasSoft) {
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os << "(push 1)\n";
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for (size_t i = phase; i < nSoft; ++i)
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os << "(assert (= #b1 " << m_softConstraints[i] << "))\n";
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}
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if (nSoft > 0) {
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// Fast path: try all soft constraints at once
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os << "(push 1)\n";
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for (const auto& s : m_softConstraints) os << "(assert (= #b1 " << s << "))\n";
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os << "(check-sat)\n";
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sat = parseSolution(os, /*log=*/phase == nSoft);
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if (!sat && hasSoft) os << "(pop 1)\n";
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sat = parseSolution(os, false);
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if (!sat) {
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// Some soft constraints conflict. Incrementally add from back
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// (highest priority first), keeping only compatible ones.
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// This preserves the maximum set of compatible soft constraints.
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os << "(pop 1)\n";
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for (int i = static_cast<int>(nSoft) - 1; i >= 0; --i) {
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os << "(push 1)\n";
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os << "(assert (= #b1 " << m_softConstraints[i] << "))\n";
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os << "(check-sat)\n";
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if (checkSat(os)) {
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// Compatible -- keep this push level
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} else {
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// Incompatible -- remove this soft constraint
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os << "(pop 1)\n";
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}
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}
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// Read solution with remaining compatible soft constraints
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os << "(check-sat)\n";
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sat = parseSolution(os, false);
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}
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} else {
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// No soft constraints -- hard-only
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os << "(check-sat)\n";
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sat = parseSolution(os, false);
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}
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if (!sat) {
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@ -530,6 +550,12 @@ bool VlRandomizer::next(VlRNG& rngr) {
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return false; // Should not reach here
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}
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bool VlRandomizer::checkSat(std::iostream& os) {
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std::string result;
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do { std::getline(os, result); } while (result.empty());
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return result == "sat";
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}
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bool VlRandomizer::parseSolution(std::iostream& os, bool log) {
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std::string sat;
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do { std::getline(os, sat); } while (sat == "");
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@ -230,6 +230,7 @@ class VlRandomizer VL_NOT_FINAL {
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// PRIVATE METHODS
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void randomConstraint(std::ostream& os, VlRNG& rngr, int bits);
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bool parseSolution(std::iostream& file, bool log = false);
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bool checkSat(std::iostream& os);
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void emitRandcExclusions(std::ostream& os) const; // Emit randc exclusion constraints
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void recordRandcValues(); // Record solved randc values for future exclusion
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size_t hashConstraints() const;
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@ -2,8 +2,6 @@
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=== Test 1: Valid constraints ===
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=== Test 2: addr out of range ===
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%Warning-UNSATCONSTR: t/t_constraint_unsat.v:16: Unsatisfied constraint: 'if (!randomize() with { addr == a; data == d; }) begin'
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%Warning-UNSATCONSTR: t/t_constraint_unsat.v:12: Unsatisfied constraint: 'constraint data_range { data > 10 && data < 200; }'
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%Warning-UNSATCONSTR: t/t_constraint_unsat.v:11: Unsatisfied constraint: 'constraint addr_range { addr < 127; }'
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%Warning-UNSATCONSTR: t/t_constraint_unsat.v:16: Unsatisfied constraint: 'if (!randomize() with { addr == a; data == d; }) begin'
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Randomization failed.
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@ -2,8 +2,6 @@
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=== Test 1: Valid constraints ===
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=== Test 2: addr out of range ===
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%Warning-UNSATCONSTR: PSTByA:16: Unsatisfied constraint
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%Warning-UNSATCONSTR: PSTByA:12: Unsatisfied constraint
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%Warning-UNSATCONSTR: PSTByA:11: Unsatisfied constraint
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%Warning-UNSATCONSTR: PSTByA:16: Unsatisfied constraint
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Randomization failed.
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@ -0,0 +1,21 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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if not test.have_solver:
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test.skip("No constraint solver installed")
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test.compile()
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test.execute()
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test.passes()
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@ -0,0 +1,45 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 PlanV GmbH
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// SPDX-License-Identifier: CC0-1.0
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// verilog_format: off
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`define stop $stop
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`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
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`define check_range(gotv,minv,maxv) do if ((gotv) < (minv) || (gotv) > (maxv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d-%0d\n", `__FILE__,`__LINE__, (gotv), (minv), (maxv)); `stop; end while(0);
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// verilog_format: on
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// Soft constraint relaxation must preserve the maximum compatible set.
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// When soft[1] conflicts with soft[2], a correct algorithm should still
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// keep soft[0] if it is compatible with soft[2].
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//
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// soft[0]: b > 100 (low priority, COMPATIBLE with soft[2])
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// soft[1]: a == 30 (mid priority, CONFLICTS with soft[2])
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// soft[2]: a == 80 (high priority, should win over soft[1])
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//
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// Correct result: a == 80, b > 100 (soft[0] and soft[2] both kept)
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// Bug result: a == 80, b unconstrained (soft[0] wrongly dropped)
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class SoftRelax;
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rand bit [7:0] a;
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rand bit [7:0] b;
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constraint c_hard { a < 8'd200; b < 8'd200; }
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constraint c_soft0 { soft b > 8'd100; }
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constraint c_soft1 { soft a == 8'd30; }
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constraint c_soft2 { soft a == 8'd80; }
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endclass
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module t;
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initial begin
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SoftRelax obj;
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obj = new;
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repeat (20) begin
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`checkd(obj.randomize(), 1)
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`checkd(obj.a, 8'd80)
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`check_range(obj.b, 8'd101, 8'd199)
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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