Version bump

Commentary: Changes update
Support constrained random for arrays in structs (#5765 ) (#5802 )
2026-10-02 16:13:34 +02:00 · 2025-02-24 18:19:40 -05:00 · 2025-02-24 18:15:08 -05:00 · 2025-02-24 17:51:51 -05:00 · 2025-02-24 04:04:23 -05:00 · 2025-02-24 03:51:49 -05:00
7207 changed files with 306526 additions and 127802 deletions
@@ -63,6 +63,8 @@ ForEachMacros:
 SortIncludes:    true
 IncludeBlocks:   Regroup
 IncludeCategories:
+  - Regex:           '"V3Pch.*\.h"'
+    Priority:        -2 # Precompiled headers
  - Regex:           '"(config_build|verilated_config|verilatedos)\.h"'
    Priority:        -1 # Sepecials before main header
  - Regex:           '(<|")verilated.*'
@@ -112,6 +114,9 @@ SpacesBeforeTrailingComments: 2
 SpacesInAngles:  false
 SpacesInContainerLiterals: true
 SpacesInCStyleCastParentheses: false
+SpacesInLineCommentPrefix:
+  Minimum: 0
+  Maximum: -1
 SpacesInParentheses: false
 SpacesInSquareBrackets: false
 Standard:        Cpp11
@@ -1,4 +1,4 @@
-Checks:          '*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-avoid-magic-numbers,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-*,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-modernize-use-auto,-modernize-use-trailing-return-type,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance'
+Checks:          '*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-avoid-magic-numbers,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-*,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-modernize-use-auto,-modernize-use-trailing-return-type,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance,-llvmlibc-*,-altera-*'
 WarningsAsErrors: ''
 HeaderFilterRegex: ''
 FormatStyle:     none
@@ -1,6 +1,6 @@
 ---
 exclude_paths:
-  - '.github/**'
-  - 'ci/build_verilator.sh'
-  - 'include/vltstd/**'
-  - 'nodist/fastcov.py'
+  - ".github/**"
+  - "ci/build_verilator.sh"
+  - "include/vltstd/**"
+  - "nodist/fastcov.py"
@@ -0,0 +1,8 @@
+{
+        "name": "Verilator Build Environment",
+
+        "build": {
+        "dockerfile": "../ci/docker/buildenv/Dockerfile"
+    }
+
+}
@@ -9,10 +9,14 @@ assignees: ''

 Thanks for taking the time to report this.

-Can you attach an example that shows the issue?  (Must be openly licensed, ideally in test_regress format.)
+Can you attach an example that shows the issue?  (Must be openly licensed, completely self-contaned so can directly run what you provide. Ideally use test_regress format, see https://veripool.org/guide/latest/contributing.html?highlight=test_regress#reporting-bugs
+
+What 'verilator' command line do we use to run your example?

 What 'verilator --version' are you using?  Did you try it with the git master version?

 What OS and distribution are you using?

 May we assist you in trying to fix this in Verilator yourself?
+
+(Please avoid attaching screenshots that show text - you can convert images to text using e.g. https://ocr.space)
@@ -11,6 +11,8 @@ Thanks for taking the time to report this.

 What would you like added/supported?

+What 'verilator --version' are you using?  Did you try it with the git master version?
+
 Can you attach an example that runs on other simulators?  (Must be openly licensed, ideally in test_regress format.)

 May we assist you in trying to fix this in Verilator yourself?
@@ -8,3 +8,5 @@ assignees: ''
 ---

 How may we help - what is your question?
+
+(If reporting a bug or requesting a feature please use one of the other issue templates.)
@@ -1,3 +1,4 @@
+---
 # DESCRIPTION: Github actions config
 # This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
@@ -9,7 +10,7 @@ on:
  pull_request:
  workflow_dispatch:
  schedule:
-  - cron: '0 0 * * 0' # weekly
+    - cron: '0 0 * * 0'  # weekly

 env:
  CI_OS_NAME: linux
@@ -17,80 +18,74 @@ env:
  CCACHE_COMPRESS: 1
  CCACHE_DIR: ${{ github.workspace }}/.ccache
  CCACHE_LIMIT_MULTIPLE: 0.95
+  INSTALL_DIR: ${{ github.workspace }}/install
+  RELOC_DIR: ${{ github.workspace }}/relloc

 defaults:
  run:
    shell: bash
    working-directory: repo

+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
 jobs:

  build:
    strategy:
      fail-fast: false
      matrix:
-        os: [ubuntu-22.04, ubuntu-20.04]
+        os: [ubuntu-24.04, ubuntu-22.04, ubuntu-20.04]
        compiler:
-          - { cc: clang, cxx: clang++ }
-          - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
-        exclude:
-          # Build pull requests only with ubuntu-22.04 and without m32
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }}
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }}
-          - m32: ${{ github.event_name == 'pull_request' && 1              || 'do-not-exclude' }}
-          # Build -m32 only on ubuntu-22.04
-          - {os: ubuntu-18.04, m32: 1}
-          - {os: ubuntu-20.04, m32: 1}
+          - {cc: clang, cxx: clang++}
+          - {cc: gcc, cxx: g++}
        include:
          # Build GCC 10 on ubuntu-20.04
          - os: ubuntu-20.04
-            compiler: { cc: gcc-10, cxx: g++-10 }
-            m32: 0
+            compiler: {cc: gcc-10, cxx: g++-10}
    runs-on: ${{ matrix.os }}
-    name: Build | ${{ matrix.os }} | ${{ matrix.compiler.cc }} ${{ matrix.m32 && '| -m32' || '' }}
+    name: Build | ${{ matrix.os }} | ${{ matrix.compiler.cc }}
    env:
      CI_BUILD_STAGE_NAME: build
      CI_RUNS_ON: ${{ matrix.os }}
-      CI_M32: ${{ matrix.m32 }}
      CC: ${{ matrix.compiler.cc }}
      CXX: ${{ matrix.compiler.cxx }}
-      CACHE_BASE_KEY: build-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}
-      CCACHE_MAXSIZE: 250M # Per build matrix entry (2000M in total)
-      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
+      CACHE_BASE_KEY: build-${{ matrix.os }}-${{ matrix.compiler.cc }}
+      CCACHE_MAXSIZE: 1000M  # Per build matrix entry (* 5 = 5000M in total)
+      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}.tar.gz
    steps:

-    - name: Checkout
-      uses: actions/checkout@v3
-      with:
-        path: repo
+      - name: Checkout
+        uses: actions/checkout@v4
+        with:
+          path: repo

-    - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
-      env:
-        CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache
-      with:
-        path: ${{ env.CCACHE_DIR }}
-        key: ${{ env.CACHE_KEY }}-${{ github.sha }}
-        restore-keys: |
-          ${{ env.CACHE_KEY }}-
+      - name: Cache $CCACHE_DIR
+        uses: actions/cache@v4
+        env:
+          CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache
+        with:
+          path: ${{ env.CCACHE_DIR }}
+          key: ${{ env.CACHE_KEY }}-${{ github.sha }}
+          restore-keys: |
+            ${{ env.CACHE_KEY }}-

-    - name: Install packages for build
-      run: ./ci/ci-install.bash
+      - name: Install packages for build
+        run: ./ci/ci-install.bash

-    - name: Build
-      run: ./ci/ci-script.bash
+      - name: Build
+        run: ./ci/ci-script.bash

-    - name: Tar up repository
-      working-directory: ${{ github.workspace }}
-      run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo
-
-    - name: Upload tar archive
-      uses: actions/upload-artifact@v3
-      with:
-        path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
-        name: ${{ env.VERILATOR_ARCHIVE }}
+      - name: Tar up repository
+        working-directory: ${{ github.workspace }}
+        run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo

+      - name: Upload tar archive
+        uses: actions/upload-artifact@v4
+        with:
+          path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
+          name: ${{ env.VERILATOR_ARCHIVE }}

  test:
    needs: build
@@ -99,62 +94,88 @@ jobs:
      matrix:
        os: [ubuntu-22.04, ubuntu-20.04]
        compiler:
-          - { cc: clang, cxx: clang++ }
-          - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
-        suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, vltmt-0, vltmt-1]
-        exclude:
-          # Build pull requests only with ubuntu-22.04 and without m32
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }}
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }}
-          - m32: ${{ github.event_name == 'pull_request' && 1              || 'do-not-exclude' }}
-          # Build -m32 only on ubuntu-22.04
-          - {os: ubuntu-18.04, m32: 1}
-          - {os: ubuntu-20.04, m32: 1}
+          - {cc: clang, cxx: clang++}
+          - {cc: gcc, cxx: g++}
+        reloc: [0]
+        suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, dist-vlt-3, vltmt-0, vltmt-1]
        include:
-          # Test with GCC 10 on ubuntu-20.04 without m32
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-0}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-1}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-2}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: vltmt-0}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: vltmt-1}
+          # Test with GCC 10 on ubuntu-20.04, also test relocation
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: dist-vlt-0}
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: dist-vlt-1}
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: dist-vlt-2}
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: dist-vlt-3}
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: vltmt-0}
+          - {os: ubuntu-20.04, compiler: {cc: gcc-10, cxx: g++-10}, reloc: 1, suite: vltmt-1}
+          # Ubuntu 24.04 only on GCC; not passing on clang yet
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: dist-vlt-0}
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: dist-vlt-1}
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: dist-vlt-2}
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: dist-vlt-3}
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: vltmt-0}
+          - {os: ubuntu-24.04, compiler: {cc: gcc, cxx: g++}, suite: vltmt-1}
    runs-on: ${{ matrix.os }}
-    name: Test | ${{ matrix.os }} | ${{ matrix.compiler.cc }} | ${{ matrix.suite }} ${{ matrix.m32 && '| -m32' || '' }}
+    name: Test | ${{ matrix.os }} | ${{ matrix.compiler.cc }} | ${{ matrix.reloc && 'reloc | ' || '' }} ${{ matrix.suite }}
    env:
      CI_BUILD_STAGE_NAME: test
      CI_RUNS_ON: ${{ matrix.os }}
-      CI_M32: ${{ matrix.m32 }}
+      CI_RELOC: ${{ matrix.reloc }}
      CC: ${{ matrix.compiler.cc }}
      CXX: ${{ matrix.compiler.cxx }}
-      CACHE_BASE_KEY: test-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}-${{ matrix.suite }}
-      CCACHE_MAXSIZE: 64M # Per build matrix entry (2160M in total)
-      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
+      CACHE_BASE_KEY: test-${{ matrix.os }}-${{ matrix.compiler.cc }}-${{ matrix.reloc }}-${{ matrix.suite }}
+      CCACHE_MAXSIZE: 100M  # Per build per suite (* 5 * 5 = 2500M in total)
+      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}.tar.gz
    steps:

-    - name: Download tar archive
-      uses: actions/download-artifact@v3
-      with:
-        name: ${{ env.VERILATOR_ARCHIVE }}
-        path: ${{ github.workspace }}
+      - name: Download tar archive
+        uses: actions/download-artifact@v4
+        with:
+          name: ${{ env.VERILATOR_ARCHIVE }}
+          path: ${{ github.workspace }}

-    - name: Unpack tar archive
-      working-directory: ${{ github.workspace }}
-      run: tar -x -z -f ${{ env.VERILATOR_ARCHIVE }}
+      - name: Unpack tar archive
+        working-directory: ${{ github.workspace }}
+        run: tar -x -z -f ${{ env.VERILATOR_ARCHIVE }}

-    - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
-      env:
-        CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache
-      with:
-        path: ${{ env.CCACHE_DIR }}
-        key: ${{ env.CACHE_KEY }}-${{ github.sha }}
-        restore-keys: |
-          ${{ env.CACHE_KEY }}-
+      - name: Cache $CCACHE_DIR
+        uses: actions/cache@v4
+        env:
+          CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache2
+        with:
+          path: ${{ env.CCACHE_DIR }}
+          key: ${{ env.CACHE_KEY }}-${{ github.sha }}
+          restore-keys: |
+            ${{ env.CACHE_KEY }}-

-    - name: Install test dependencies
-      run: ./ci/ci-install.bash
+      - name: Install test dependencies
+        run: ./ci/ci-install.bash

-    - name: Test
-      env:
-        TESTS: ${{ matrix.suite }}
-      run: ./ci/ci-script.bash
+      - name: Test
+        env:
+          TESTS: ${{ matrix.suite }}
+        run: ./ci/ci-script.bash
+
+  lint-py:
+    runs-on: ubuntu-22.04
+    name: Lint Python
+    env:
+      CI_BUILD_STAGE_NAME: build
+      CI_RUNS_ON: ubuntu-22.04
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v4
+        with:
+          path: repo
+
+      - name: Install packages for build
+        run: ./ci/ci-install.bash
+
+    # We use specific version numbers, otherwise a Python package
+    # update may add a warning and break our build
+      - name: Install packages for lint
+        run: sudo pip3 install pylint==3.0.2 ruff==0.1.3 clang sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+
+      - name: Configure
+        run: autoconf && ./configure --enable-longtests --enable-ccwarn
+
+      - name: Lint
+        run: make -k lint-py
@@ -1,17 +1,16 @@
+---
 # DESCRIPTION: Github actions config
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
+#
 name: Contributor Agreement
-
 on:
  push:
  pull_request:
  workflow_dispatch:
-
 jobs:
  Test:
    name: "'docs/CONTRIBUTORS' was signed"
    runs-on: ubuntu-22.04
    steps:
-    - uses: actions/checkout@v3
-    - run: test_regress/t/t_dist_contributors.pl
+      - uses: actions/checkout@v4
+      - run: test_regress/t/t_dist_contributors.py
@@ -1,3 +1,4 @@
+---
 # DESCRIPTION: Github actions config
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

@@ -6,12 +7,11 @@ name: coverage
 on:
  workflow_dispatch:
  schedule:
-  - cron: '0 0 * * 0' # weekly
+    - cron: '0 0 * * 0'  # weekly

 env:
  CI_OS_NAME: linux
  CI_COMMIT: ${{ github.sha }}
-  CI_M32: 0
  COVERAGE: 1
  VERILATOR_ARCHIVE: verilator-coverage-${{ github.sha }}.tar.gz

@@ -22,7 +22,6 @@ defaults:

 jobs:

-
  Build:
    runs-on: ubuntu-22.04
    env:
@@ -30,49 +29,36 @@ jobs:
      CI_RUNS_ON: ubuntu-22.04
    steps:

-    - name: Checkout
-      uses: actions/checkout@v3
-      with:
-        path: repo
+      - name: Checkout
+        uses: actions/checkout@v4
+        with:
+          path: repo

-    - name: Install packages for build
-      run: ./ci/ci-install.bash
+      - name: Install packages for build
+        run: ./ci/ci-install.bash

-    - name: Build
-      run: ./ci/ci-script.bash
+      - name: Build
+        run: ./ci/ci-script.bash

-    - name: Tar up repository
-      working-directory: ${{ github.workspace }}
-      run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo
-
-    - name: Upload tar archive
-      uses: actions/upload-artifact@v3
-      with:
-        path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
-        name: ${{ env.VERILATOR_ARCHIVE }}
+      - name: Tar up repository
+        working-directory: ${{ github.workspace }}
+        run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo

+      - name: Upload tar archive
+        uses: actions/upload-artifact@v4
+        with:
+          path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
+          name: ${{ env.VERILATOR_ARCHIVE }}

  Test:
    needs: Build
    strategy:
      fail-fast: false
      matrix:
-        test:
-        - vlt-
-        - vltmt-
-        num:
-        - 0
-        - 1
-        - 2
-        - 3
-        - 4
-        - 5
-        - 6
-        - 7
-        - 8
-        - 9
+        test: [vlt-, vltmt-]
+        num: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9]
        include:
-        - { test: dist, num: '' }
+          - {test: dist, num: ''}
    runs-on: ubuntu-22.04
    name: test-${{ matrix.test }}${{ matrix.num }}
    env:
@@ -80,20 +66,27 @@ jobs:
      CI_RUNS_ON: ubuntu-22.04
    steps:

-    - name: Download tar archive
-      uses: actions/download-artifact@v3
-      with:
-        name: ${{ env.VERILATOR_ARCHIVE }}
-        path: ${{ github.workspace }}
+      - name: Download tar archive
+        uses: actions/download-artifact@v4
+        with:
+          name: ${{ env.VERILATOR_ARCHIVE }}
+          path: ${{ github.workspace }}

-    - name: Unpack tar archive
-      working-directory: ${{ github.workspace }}
-      run: tar -x -z -f ${{ env.VERILATOR_ARCHIVE }}
+      - name: Unpack tar archive
+        working-directory: ${{ github.workspace }}
+        run: tar -x -z -f ${{ env.VERILATOR_ARCHIVE }}

-    - name: Install test dependencies
-      run: ./ci/ci-install.bash
+      - name: Install test dependencies
+        run: ./ci/ci-install.bash

-    - name: Test
-      env:
-        TESTS: coverage-${{ matrix.test }}${{ matrix.num }}
-      run: ./ci/ci-script.bash
+      - name: Test
+        env:
+          TESTS: coverage-${{ matrix.test }}${{ matrix.num }}
+        run: ./ci/ci-script.bash
+
+      - name: Upload coverage data to Codecov
+        env:
+          CODECOV_TOKEN: ${{ secrets.CODECOV_TOKEN }}
+        run: |
+          find . -name '*.gcno' -exec rm {} \;
+          ./ci/codecov -v upload-process -Z --sha ${{ github.sha }} -f nodist/obj_dir/coverage/app_total.info
@@ -0,0 +1,86 @@
+---
+# Build and push verilator docker image when tags are pushed to the repository.
+# The following variable(s) must be configured in the github repository:
+# DOCKER_HUB_NAMESPACE: docker hub namespace.
+# The following secrets must be configured in the github repository:
+# DOCKER_HUB_USER: user name for logging into docker hub
+# DOCKER_HUB_ACCESS_TOKEN: docker hub access token.
+name: Build Verilator Container
+
+on:
+  push:
+    tags: ['v*']
+  workflow_dispatch:
+    inputs:
+      manual_tag:
+        description: 'Git tag to use for image build'
+        required: true
+        type: string
+      add_latest_tag:
+        description: 'Tag workflow_dispatch docker image as "latest"'
+        required: true
+        type: boolean
+        default: false
+
+jobs:
+
+  build:
+
+    runs-on: ubuntu-22.04
+
+    strategy:
+      matrix:
+        contexts:
+          - "ci/docker/run:verilator"
+          # - "ci/docker/buildenv:verilator-buildenv"
+
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v4
+
+      - name: Extract context variables
+        run: |
+          echo "${{ matrix.contexts }}" | sed -r 's/(.*):.*/build_context=\1/' >> "$GITHUB_ENV"
+          echo "${{ matrix.contexts }}" | sed -r 's/.*:(.*)/image_name=\1/' >> "$GITHUB_ENV"
+          echo "git_tag=${GITHUB_REF#refs/*/}" >> "$GITHUB_ENV"
+
+      - name: Use manual tag
+        if: ${{ inputs.manual_tag }}
+        run: |
+          echo "git_tag=${{ inputs.manual_tag }}" >> "$GITHUB_ENV"
+
+      - name: Docker meta
+        id: docker_meta
+        uses: docker/metadata-action@v4
+        with:
+          images: |
+            ${{ vars.DOCKER_HUB_NAMESPACE }}/${{ env.image_name }}
+          tags: |
+            type=match,pattern=(v.*),group=1,enable=${{ startsWith(github.ref, 'refs/tags/v') }}
+            type=raw,value=${{ inputs.manual_tag }},enable=${{ inputs.manual_tag != '' }}
+            type=raw,value=latest,enable=${{ inputs.add_latest_tag == true }}
+
+      - name: Set up QEMU
+        uses: docker/setup-qemu-action@v2
+
+      - name: Set up Docker Buildx
+        uses: docker/setup-buildx-action@v2
+        with:
+          buildkitd-flags: --debug
+
+      - name: Login to Docker Hub
+        uses: docker/login-action@v2
+        with:
+          username: ${{ secrets.DOCKER_HUB_USER }}
+          password: ${{ secrets.DOCKER_HUB_ACCESS_TOKEN }}
+
+      - name: Build and Push to Docker
+        uses: docker/build-push-action@v4
+        if: startsWith(github.ref, 'refs/tags/v')
+        with:
+          context: ${{ env.build_context }}
+          build-args: SOURCE_COMMIT=${{ env.git_tag }}
+          platforms: linux/arm64,linux/amd64
+          push: ${{ !env.ACT && startsWith(github.ref, 'refs/tags/v') }}
+          tags: ${{ steps.docker_meta.outputs.tags }}
+          labels: ${{ steps.docker_meta.outputs.labels }}
@@ -1,13 +1,12 @@
+---
 # DESCRIPTION: Github actions config
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
+#
 name: format
-
 on:
  push:
  pull_request_target:
  workflow_dispatch:
-
 jobs:
  format:
    runs-on: ubuntu-22.04
@@ -16,10 +15,9 @@ jobs:
      CI_OS_NAME: linux
      CI_RUNS_ON: ubuntu-22.04
      CI_COMMIT: ${{ github.sha }}
-      CI_M32: 0
    steps:
      - name: Checkout
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4
        with:
          token: ${{ secrets.GITHUB_TOKEN }}
      - name: Install packages for build
@@ -1,51 +1,50 @@
+---
 # DESCRIPTION: Github actions config
 # This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
+#
 name: msbuild
-
 on:
  push:
  pull_request:
  workflow_dispatch:
  schedule:
-  - cron: '0 0 * * 0' # weekly
-
+    - cron: 0 0 * * 0  # weekly
 env:
  CI_OS_NAME: win
  CI_COMMIT: ${{ github.sha }}
  CCACHE_COMPRESS: 1
  CCACHE_DIR: ${{ github.workspace }}/.ccache
  CCACHE_LIMIT_MULTIPLE: 0.95
-
 defaults:
  run:
    working-directory: repo
-
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
 jobs:
-
-   windows:
+  windows:
    name: run on windows
    runs-on: windows-latest
    steps:
-    - uses: actions/checkout@v3
-      with:
-        path: repo
-    - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
-      with:
-        path: ${{ env.CCACHE_DIR }}
-        key: msbuild-msvc-cmake
-    - name: compile
-      env:
-        WIN_FLEX_BISON: ${{ github.workspace }}/.ccache
-      run: ./ci/ci-win-compile.ps1
-    - name: test build
-      run: ./ci/ci-win-test.ps1
-    - name: Zip up repository
-      run: Compress-Archive -LiteralPath install -DestinationPath verilator.zip
-    - name: Upload zip archive
-      uses: actions/upload-artifact@v3
-      with:
-        path: ${{ github.workspace }}/repo/verilator.zip
-        name: verilator-win.zip
+      - uses: actions/checkout@v4
+        with:
+          path: repo
+      - name: Cache $CCACHE_DIR
+        uses: actions/cache@v4
+        with:
+          path: ${{ env.CCACHE_DIR }}
+          key: msbuild-msvc-cmake
+      - name: compile
+        env:
+          WIN_FLEX_BISON: ${{ github.workspace }}/.ccache
+        run: ./ci/ci-win-compile.ps1
+      - name: test build
+        run: ./ci/ci-win-test.ps1
+      - name: Zip up repository
+        run: Compress-Archive -LiteralPath install -DestinationPath verilator.zip
+      - name: Upload zip archive
+        uses: actions/upload-artifact@v4
+        with:
+          path: ${{ github.workspace }}/repo/verilator.zip
+          name: verilator-win.zip
@@ -29,15 +29,24 @@ dddrun*
 doxygen-doc
 gdbrun*
 gmon.out
-ncverilog.history
 internals.txt
+ncverilog.history
+nohup.out
+verilator-config-version.cmake
+verilator-config.cmake
+verilator.pc
 verilator.txt
 verilator_bin*
 verilator_coverage_bin*
-verilator.pc
-verilator-config.cmake
-verilator-config-version.cmake
 **/__pycache__/*
 **/_build/*
 **/obj_dir/*
 /.vscode/
+/.idea/
+/cmake-build-*/
+/test_regress/snapshot/
+xmverilog.*
+xrun.history
+
+# Normal CMake build directory
+/build
@@ -0,0 +1,8 @@
+---
+- id: verilator
+  name: verilator-lint
+  description: Runs verilator Docker image to lint (System) Verilog designs
+  args: [--lint-only]
+  language: docker_image
+  entry: verilator/verilator:latest
+  types_or: [verilog, system-verilog]
@@ -0,0 +1,4 @@
+[style]
+based_on_style = pep8
+column_limit = 99
+#split_before_arithmetic_operator=True
@@ -0,0 +1,27 @@
+# See https://citation-file-format.github.io/
+cff-version: 1.2.0
+title: Verilator
+message: >-
+  If you use this software, please cite it using the
+  metadata from this file.
+type: software
+authors:
+  - given-names: Wilson
+    family-names: Snyder
+    email: [email protected]
+    affiliation: Veripool
+  - given-names: Paul
+    family-names: Wasson
+  - given-names: Duane
+    family-names: Galbi
+  - name: 'et al'
+repository-code: 'https://github.com/verilator/verilator'
+url: 'https://verilator.org'
+abstract: >-
+  The Verilator package converts Verilog and SystemVerilog hardware
+  description language (HDL) designs into a fast C++ or SystemC model
+  that, after compiling, can be executed.  Verilator is not a
+  traditional simulator but a compiler.
+license:
+  - LGPL-3.0-only
+  - Artistic-2.0
@@ -4,7 +4,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -14,44 +14,76 @@

 cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
-project(Verilator
-    VERSION 5.003
+project(
+    Verilator
+    VERSION 5.034
    HOMEPAGE_URL https://verilator.org
    LANGUAGES CXX
 )

-option(DEBUG_AND_RELEASE_AND_COVERAGE
-    "Builds both the debug and release binaries, overriding CMAKE_BUILD_TYPE. Not supported under MSBuild.")
+# Set default build type to Release if not specified
+if(NOT CMAKE_BUILD_TYPE)
+    set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Build type" FORCE)
+endif()

-set(PYTHON3 python)
-set(CMAKE_INSTALL_DATADIR ${CMAKE_INSTALL_PREFIX})
+option(
+    DEBUG_AND_RELEASE_AND_COVERAGE
+    "Builds both the debug and release binaries, overriding CMAKE_BUILD_TYPE. Not supported under MSBuild."
+)
+
+find_package(Python3 COMPONENTS Interpreter)
+set(PYTHON3 ${Python3_EXECUTABLE})
+# See also CMake built-in; CMAKE_INSTALL_PREFIX is applied by the install command.
+set(CMAKE_INSTALL_DATADIR .)
 include(GNUInstallDirs)
 include(CMakePackageConfigHelpers)
 include(CheckStructHasMember)
 include(ExternalProject)
+include(FindThreads)

-if (NOT WIN32)
+if(NOT WIN32)
    message(WARNING "CMake support on Linux/OSX is experimental.")
 endif()

-if (MSVC)
-    if (DEFINED ENV{WIN_FLEX_BISON})
+if(WIN32)
+    if(DEFINED ENV{WIN_FLEX_BISON})
        set(WIN_FLEX_BISON "$ENV{WIN_FLEX_BISON}")
    endif()
-    if (EXISTS ${WIN_FLEX_BISON})
+    if(EXISTS ${WIN_FLEX_BISON})
        list(APPEND CMAKE_PREFIX_PATH ${WIN_FLEX_BISON})
    endif()
-    if (NOT WIN_FLEX_BISON)
-        message(FATAL_ERROR "Please install https://github.com/lexxmark/winflexbison and set WIN_FLEX_BISON environment variable. Please use install cmake target after a successful build.")
+    if(NOT WIN_FLEX_BISON)
+        message(
+            FATAL_ERROR
+            "Please install https://github.com/lexxmark/winflexbison and set WIN_FLEX_BISON environment variable. Please use install cmake target after a successful build."
+        )
    endif()
-    set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /std:c++20")
-else()
-    if (NOT DEFINED ENV{FLEX_INCLUDE})
-        message(FATAL_ERROR "Please set environment variable FLEX_INCLUDE to the directory containing FlexLexer.h")
+    set(CMAKE_CXX_STANDARD 20)
+endif()
+
+set(OBJCACHE "" CACHE STRING "Path for ccache, auto-detected if empty")
+option(OBJCACHE_ENABLED "Compile Verilator with ccache" ON)
+
+if(OBJCACHE_ENABLED)
+    if(OBJCACHE STREQUAL "")
+        find_program(OBJCACHE_PATH ccache)
+        if(OBJCACHE_PATH STREQUAL "OBJCACHE_PATH-NOTFOUND")
+            set(OBJCACHE_PATH "")
+        endif()
+    else()
+        set(OBJCACHE_PATH "${OBJCACHE}")
    endif()
-    set(WIN_FLEX_BISON "$ENV{FLEX_INCLUDE}")
-    if (WIN32 AND NOT MINGW)
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++20")
+    if(NOT OBJCACHE_PATH STREQUAL "")
+        execute_process(
+            COMMAND "${OBJCACHE_PATH}" --version
+            OUTPUT_VARIABLE objcache_version
+        )
+        string(REGEX MATCH "[^\n\r]+" objcache_version "${objcache_version}")
+        message(
+            STATUS
+            "Found ccache: ${OBJCACHE_PATH} (\"${objcache_version}\")"
+        )
+        set(CMAKE_CXX_COMPILER_LAUNCHER "${OBJCACHE_PATH}")
    endif()
 endif()

@@ -61,8 +93,8 @@ find_package(FLEX)
 # Build
 #set_property(GLOBAL PROPERTY JOB_POOLS one_job=1)

-if (DEBUG_AND_RELEASE_AND_COVERAGE)
-    if (CMAKE_GENERATOR MATCHES "^Visual Studio ")
+if(DEBUG_AND_RELEASE_AND_COVERAGE)
+    if(CMAKE_GENERATOR MATCHES "^Visual Studio ")
        error("%Error: The DEBUG_AND_RELEASE_AND_COVERAGE option is not supported in MSBuild-based builds.")
    endif()
    set(saved_build_type ${CMAKE_BUILD_TYPE})
@@ -81,43 +113,73 @@ endif()

 set(PACKAGE_NAME ${PROJECT_NAME})
 set(PACKAGE_VERSION ${PROJECT_VERSION})
+set(CXX ${CMAKE_CXX_COMPILER})
+set(AR ${CMAKE_AR})

 configure_file(include/verilated_config.h.in include/verilated_config.h @ONLY)
+configure_file(include/verilated.mk.in include/verilated.mk @ONLY)

-install(FILES ${CMAKE_CURRENT_BINARY_DIR}/include/verilated_config.h DESTINATION ${CMAKE_INSTALL_PREFIX}/include)
-
-configure_package_config_file(verilator-config.cmake.in verilator-config.cmake
-    INSTALL_DESTINATION ${CMAKE_INSTALL_PREFIX}
+install(
+    FILES ${CMAKE_CURRENT_BINARY_DIR}/include/verilated_config.h
+    DESTINATION include
+)
+install(
+    FILES ${CMAKE_CURRENT_BINARY_DIR}/include/verilated.mk
+    DESTINATION include
 )

-install(FILES ${CMAKE_CURRENT_BINARY_DIR}/verilator-config.cmake DESTINATION ${CMAKE_INSTALL_PREFIX})
-
-configure_package_config_file(verilator-config-version.cmake.in verilator-config-version.cmake
-    INSTALL_DESTINATION ${CMAKE_INSTALL_PREFIX}
+configure_package_config_file(
+    verilator-config.cmake.in
+    verilator-config.cmake
+    INSTALL_DESTINATION .
 )

-install(FILES ${CMAKE_CURRENT_BINARY_DIR}/verilator-config-version.cmake DESTINATION ${CMAKE_INSTALL_PREFIX})
+install(
+    FILES ${CMAKE_CURRENT_BINARY_DIR}/verilator-config.cmake
+    DESTINATION .
+)

-foreach (program
+configure_package_config_file(
+    verilator-config-version.cmake.in
+    verilator-config-version.cmake
+    INSTALL_DESTINATION .
+)
+
+install(
+    FILES ${CMAKE_CURRENT_BINARY_DIR}/verilator-config-version.cmake
+    DESTINATION .
+)
+
+foreach(
+    program
+    verilator
    verilator_gantt
    verilator_ccache_report
    verilator_difftree
    verilator_profcfunc
+    verilator_includer
 )
    install(PROGRAMS bin/${program} TYPE BIN)
 endforeach()

-install(DIRECTORY examples TYPE DATA FILES_MATCHING
+install(
+    DIRECTORY examples
+    TYPE DATA
+    FILES_MATCHING
    PATTERN "examples/*/*.[chv]*"
    PATTERN "examples/*/Makefile*"
    PATTERN "examples/*/CMakeLists.txt"
 )

-install(DIRECTORY include TYPE DATA FILES_MATCHING
+install(
+    DIRECTORY include
+    TYPE DATA
+    FILES_MATCHING
    PATTERN "include/verilated_config.h"
-    PATTERN "include/verilated.mk"
    PATTERN "include/*.[chv]"
    PATTERN "include/*.cpp"
+    PATTERN "include/*.vlt"
+    PATTERN "include/*.sv"
    PATTERN "include/gtkwave/*.[chv]*"
    PATTERN "include/vltstd/*.[chv]*"
 )
@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -15,13 +15,13 @@
 #
 #****************************************************************************/
 #
-# make all	to compile and build Verilator.
-# make install	to install it.
-# make TAGS	to update tags tables.
+# make all      to compile and build Verilator.
+# make install  to install it.
+# make TAGS     to update tags tables.
 #
 # make clean  or  make mostlyclean
 #      Delete all files from the current directory that are normally
-#      created by building the program.	 Don't delete the files that
+#      created by building the program.  Don't delete the files that
 #      record the configuration.  Also preserve files that could be made
 #      by building, but normally aren't because the distribution comes
 #      with them.
@@ -52,6 +52,7 @@ INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 MAKEINFO = makeinfo
 POD2TEXT = pod2text
+PYTHON3 = @PYTHON3@
 MKINSTALLDIRS = $(SHELL) $(srcdir)/src/mkinstalldirs

 # Version (for docs/guide/conf.py)
@@ -76,7 +77,7 @@ datadir = @datadir@
 # Directory in which to install documentation info files.
 infodir = @infodir@

-# Directory in which to install package specific files
+# Directory in which to install package-specific files
 # Generally ${prefix}/share/verilator
 pkgdatadir = @pkgdatadir@

@@ -91,10 +92,12 @@ datarootdir = @datarootdir@
 CFG_WITH_CCWARN = @CFG_WITH_CCWARN@
 CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
 CFG_WITH_LONGTESTS = @CFG_WITH_LONGTESTS@
+CFG_WITH_SOLVER = @CFG_WITH_SOLVER@
 PACKAGE_VERSION = @PACKAGE_VERSION@

 #### End of system configuration section. ####
 ######################################################################
+# Main build targets

 .SUFFIXES:

@@ -112,7 +115,7 @@ SUBDIRS = docs src test_regress \
 	examples/make_tracing_c \
 	examples/make_tracing_sc \
 	examples/make_protect_lib \
-	examples/xml_py \
+	examples/json_py \

 INFOS = verilator.html verilator.pdf

@@ -145,6 +148,9 @@ verilator_exe verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_covera
 	@echo "making verilator in src"
 	$(MAKE) -C src $(OBJCACHE_JOBS)

+######################################################################
+# Tests
+
 .PHONY:msg_test
 msg_test: all_nomsg
 	@echo "Build complete!"
@@ -153,9 +159,9 @@ msg_test: all_nomsg
 	@echo

 .PHONY: test
-ifeq ($(CFG_WITH_LONGTESTS),yes)	# Local... Else don't burden users
+ifeq ($(CFG_WITH_LONGTESTS),yes)  # Local... Else don't burden users
 test: smoke-test test_regress
-# examples is part of test_regress's test_regress/t/t_a2_examples.pl
+# examples is part of test_regress's test_regress/t/t_a2_examples.py
 # (because that allows it to run in parallel with other test_regress's)
 else
 test: smoke-test examples
@@ -167,19 +173,26 @@ endif
 	@echo

 smoke-test: all_nomsg
-	test_regress/t/t_a1_first_cc.pl
-	test_regress/t/t_a2_first_sc.pl
+	test_regress/t/t_a1_first_cc.py
+	test_regress/t/t_a2_first_sc.py

 test_regress: all_nomsg
 	$(MAKE) -C test_regress

+.PHONY: test-snap test-diff
+test-snap test-diff:
+	$(MAKE) -C test_regress $@
+
 examples: all_nomsg
 	for p in $(EXAMPLES) ; do \
 	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
 	done

+######################################################################
+# Docs
+
 .PHONY: docs
-docs: info
+docs: info $(VL_INST_MAN_FILES)

 info: $(INFOS)

@@ -188,7 +201,8 @@ verilator.1: ${srcdir}/bin/verilator
 verilator_coverage.1: ${srcdir}/bin/verilator_coverage
 	pod2man $< $@
 %.1: ${srcdir}/bin/%
-	help2man --no-info --no-discard-stderr --version-string=- $< -o $@
+	help2man --no-info --no-discard-stderr --version-string=- \
+		-n "$(shell $< --help | head -n 3 | tail -n 1)" $< -o $@

 .PHONY: verilator.html
 verilator.html:
@@ -199,11 +213,35 @@ verilator.html:
 verilator.pdf: Makefile
 	$(MAKE) -C docs verilator.pdf

-# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
-VL_INST_BIN_FILES = verilator verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_coverage_bin_dbg$(EXEEXT) \
-	verilator_ccache_report verilator_coverage verilator_difftree verilator_gantt verilator_includer verilator_profcfunc
-# Some scripts go into both the search path and pkgdatadir,
-# so they can be found by the user, and under $VERILATOR_ROOT.
+TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
+	${srcdir}/*.in ${srcdir}/*.pod
+
+TAGS: $(TAGFILES)
+	etags $(TAGFILES)
+
+.PHONY: doxygen
+
+doxygen:
+	$(MAKE) -C docs doxygen
+
+######################################################################
+# Install
+
+# Public executables intended to be invoked directly by the user
+# Don't put wildcards in these variables, it might cause an uninstall of other stuff
+VL_INST_PUBLIC_SCRIPT_FILES = verilator \
+                              verilator_coverage \
+                              verilator_gantt \
+                              verilator_profcfunc \
+
+VL_INST_PUBLIC_BIN_FILES = verilator_bin$(EXEEXT) \
+                           verilator_bin_dbg$(EXEEXT) \
+                           verilator_coverage_bin_dbg$(EXEEXT) \
+
+# Private executabels intended to be invoked by internals
+# Don't put wildcards in these variables, it might cause an uninstall of other stuff
+VL_INST_PRIVATE_SCRIPT_FILES = verilator_ccache_report \
+                               verilator_includer \

 VL_INST_INC_BLDDIR_FILES = \
 	include/verilated_config.h \
@@ -212,6 +250,7 @@ VL_INST_INC_BLDDIR_FILES = \
 # Files under srcdir, instead of build time
 VL_INST_INC_SRCDIR_FILES = \
 	include/*.[chv]* \
+	include/*.vlt \
 	include/*.sv \
 	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
@@ -222,19 +261,38 @@ VL_INST_DATA_SRCDIR_FILES = \
 	examples/*/Makefile* \
 	examples/*/vl_* \

-installbin:
-	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_coverage $(DESTDIR)$(bindir)/verilator_coverage )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_gantt $(DESTDIR)$(bindir)/verilator_gantt )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_bin$(EXEEXT) $(DESTDIR)$(bindir)/verilator_bin$(EXEEXT) )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_bin_dbg$(EXEEXT) $(DESTDIR)$(bindir)/verilator_bin_dbg$(EXEEXT) )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_coverage_bin_dbg$(EXEEXT) $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg$(EXEEXT) )
+mkbindirs:
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_ccache_report $(DESTDIR)$(pkgdatadir)/bin/verilator_ccache_report )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_difftree $(DESTDIR)$(pkgdatadir)/bin/verilator_difftree )
+	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
+
+installbin: | mkbindirs
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PUBLIC_SCRIPT_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/$$p; \
+	done
+	perl -p -i -e 'use File::Spec;' \
+	           -e' $$path = File::Spec->abs2rel("$(realpath $(DESTDIR)$(pkgdatadir))", "$(realpath $(DESTDIR)$(bindir))");' \
+	           -e 's/my \$$verilator_pkgdatadir_relpath = .*/my \$$verilator_pkgdatadir_relpath = "$$path";/g' \
+	           -- "$(DESTDIR)/$(bindir)/verilator"
+	cd bin; \
+	for p in $(VL_INST_PUBLIC_BIN_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(bindir)/$$p; \
+	done
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PRIVATE_SCRIPT_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(pkgdatadir)/bin/$$p; \
+	done
+
+installredirect: installbin | mkbindirs
+	cp ${srcdir}/bin/redirect ${srcdir}/bin/redirect.tmp
+	perl -p -i -e 'use File::Spec;' \
+	           -e' $$path = File::Spec->abs2rel("$(realpath $(DESTDIR)$(bindir))", "$(realpath $(DESTDIR)$(pkgdatadir)/bin)");' \
+	           -e 's/RELPATH.*/"$$path";/g' -- "${srcdir}/bin/redirect.tmp"
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PUBLIC_SCRIPT_FILES) $(VL_INST_PUBLIC_BIN_FILES) ; do \
+	  $(INSTALL_PROGRAM) redirect.tmp $(DESTDIR)$(pkgdatadir)/bin/$$p; \
+	done
+	rm ${srcdir}/bin/redirect.tmp

 # Man files can either be part of the original kit, or built in current directory
 # So important we use $^ so VPATH is searched
@@ -265,7 +323,7 @@ installdata:
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/xml_py
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/json_py
 	cd $(srcdir) \
 	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
@@ -277,8 +335,11 @@ installdata:

 # We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
 uninstall:
-	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_BIN_FILES)
-	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_BIN_FILES)
+	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_PUBLIC_SCRIPT_FILES)
+	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_PUBLIC_BIN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PUBLIC_SCRIPT_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PUBLIC_BIN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PRIVATE_SCRIPT_FILES)
 	-cd $(DESTDIR)$(mandir)/man1 && rm -f $(VL_INST_MAN_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_BLDDIR_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
@@ -301,16 +362,29 @@ uninstall:
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/xml_py
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/json_py
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
 	-rmdir $(DESTDIR)$(pkgdatadir)
 	-rmdir $(DESTDIR)$(pkgconfigdir)

 install: all_nomsg install-all
-install-all: installbin installman installdata install-msg
+install-all: installbin installredirect installman installdata install-msg

 install-here: installman info

+install-msg:
+	@echo
+	@echo "Installed binaries to $(DESTDIR)$(bindir)/verilator"
+	@echo "Installed man to $(DESTDIR)$(mandir)/man1"
+	@echo "Installed examples to $(DESTDIR)$(pkgdatadir)/examples"
+	@echo
+	@echo "For documentation see 'man verilator' or 'verilator --help'"
+	@echo "For forums and to report bugs see https://verilator.org"
+	@echo
+
+######################################################################
+# Format/Lint
+
 # Use --xml flag to see the cppcheck code to use for suppression
 CPPCHECK1_CPP = $(wildcard $(srcdir)/include/*.cpp)
 CPPCHECK2_CPP = $(wildcard $(srcdir)/examples/*/*.cpp)
@@ -336,7 +410,7 @@ CPPCHECK_FLAGS = --enable=all --inline-suppr \
 	--suppress=useStlAlgorithm
 CPPCHECK_FLAGS += --xml
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP))
-CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
+CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/include/gtkwave -I$(srcdir)/include/vltstd -I$(srcdir)/src/obj_dbg -I$(srcdir)/src

 cppcheck: cppcheck-1 cppcheck-2 cppcheck-3 cppcheck-4 cppcheck-5 cppcheck-6 cppcheck-7 cppcheck-8
 cppcheck-1:
@@ -378,25 +452,40 @@ analyzer-include:
 	-rm -rf examples/*/obj*
 	scan-build $(MAKE) -k examples

-format: clang-format yapf format-pl-exec
+format:
+	$(MAKE) -j 4 format-c format-py format-exec

 CLANGFORMAT = clang-format-14
 CLANGFORMAT_FLAGS = -i
 CLANGFORMAT_FILES = $(CHECK_CPP) $(CHECK_H) $(CHECK_YL) test_regress/t/*.c* test_regress/t/*.h

-clang-format:
+format-c clang-format:
 	@$(CLANGFORMAT) --version | egrep 14.0 > /dev/null \
 		|| echo "*** You are not using clang-format-14, indents may differ from master's ***"
 	$(CLANGFORMAT) $(CLANGFORMAT_FLAGS) $(CLANGFORMAT_FILES)

+YAMLFIX = YAMLFIX_WHITELINES=1 YAMLFIX_LINE_LENGTH=130 YAMLFIX_preserve_quotes=true yamlfix
+
+yamlfix:
+	$(YAMLFIX) .
+
+# CMake files
+CMAKE_FILES = \
+	CMakeLists.txt \
+	examples/*/CMakeLists.txt \
+	src/CMakeLists.txt \
+	test_regress/CMakeLists.txt \
+	*.cmake.in \
+
+# Python programs, subject to format and lint
 PY_PROGRAMS = \
 	bin/verilator_ccache_report \
 	bin/verilator_difftree \
 	bin/verilator_gantt \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
-	examples/xml_py/vl_file_copy \
-	examples/xml_py/vl_hier_graph \
+	examples/json_py/vl_file_copy \
+	examples/json_py/vl_hier_graph \
 	docs/guide/conf.py \
 	docs/bin/vl_sphinx_extract \
 	docs/bin/vl_sphinx_fix \
@@ -406,6 +495,8 @@ PY_PROGRAMS = \
 	src/cppcheck_filtered \
 	src/flexfix \
 	src/vlcovgen \
+	src/.gdbinit.py \
+	test_regress/*.py \
 	test_regress/t/*.pf \
 	nodist/clang_check_attributes \
 	nodist/code_coverage \
@@ -413,46 +504,60 @@ PY_PROGRAMS = \
 	nodist/fuzzer/actual_fail \
 	nodist/fuzzer/generate_dictionary \
 	nodist/install_test \
+	nodist/log_changes \

+# Python files, subject to format but not lint
 PY_FILES = \
 	$(PY_PROGRAMS) \
 	nodist/code_coverage.dat \
+	test_regress/t/*.py \
+
+# Python files, test_regress tests
+PY_TEST_FILES = \
+	test_regress/t/*.py \

 YAPF = yapf3
-YAPF_FLAGS = -i
+YAPF_FLAGS = -i --parallel

-yapf:
+format-py yapf:
 	$(YAPF) $(YAPF_FLAGS) $(PY_FILES)

-FLAKE8 = flake8
-FLAKE8_FLAGS = \
-	--extend-exclude=fastcov.py \
-	--ignore=E123,E129,E251,E402,E501,W503,W504,E701
+GERSEMI = gersemi
+GERSEMI_FLAGS = -i
+
+format-cmake:
+	$(GERSEMI) $(GERSEMI_FLAGS) $(CMAKE_FILES)

 PYLINT = pylint
-PYLINT_FLAGS = --score=n --disable=R0801
+PYLINT_FLAGS = --recursive=n --score=n --disable=R0801
+PYLINT_TEST_FLAGS = $(PYLINT_FLAGS) --disable=C0103,C0114,C0116,C0209,C0411,C0413,C0301,R0801,R0912,R0915,R0916,R1702,W0511,W0621

+RUFF = ruff
+RUFF_FLAGS = check --ignore=E402,E501,E701
+
+# "make -k" so can see all tool result errors
 lint-py:
-	-$(FLAKE8) $(FLAKE8_FLAGS) $(PY_PROGRAMS)
-	-$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)
+	$(MAKE) -k lint-py-pylint lint-py-pylint-tests lint-py-ruff

-format-pl-exec:
-	-chmod a+x test_regress/t/*.pl
+lint-py-pylint:
+	$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)

-install-msg:
-	@echo
-	@echo "Installed binaries to $(DESTDIR)$(bindir)/verilator"
-	@echo "Installed man to $(DESTDIR)$(mandir)/man1"
-	@echo "Installed examples to $(DESTDIR)$(pkgdatadir)/examples"
-	@echo
-	@echo "For documentation see 'man verilator' or 'verilator --help'"
-	@echo "For forums and to report bugs see https://verilator.org"
-	@echo
+lint-py-pylint-tests:
+	$(PYLINT) $(PYLINT_TEST_FLAGS) $(PY_TEST_FILES) | $(PYTHON3) nodist/lint_py_test_filter
+
+lint-py-ruff:
+	$(RUFF) $(RUFF_FLAGS) $(PY_PROGRAMS)
+
+format-exec:
+	-chmod a+x test_regress/t/*.py
+
+######################################################################
+# Configure

 IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in

-# autoheader might not change config_build.h.in, so touch it
-${srcdir}/config_build.h: ${srcdir}/config_build.h.in configure
+# autoheader might not change config_package.h.in, so touch it
+${srcdir}/config_package.h: ${srcdir}/config_package.h.in configure
 	cd ${srcdir} && autoheader
 	touch $@
 Makefile: Makefile.in config.status $(IN_WILD)
@@ -462,12 +567,15 @@ config.status: configure
 	./config.status --recheck

 configure: configure.ac
-ifeq ($(CFG_WITH_CCWARN),yes)	# Local... Else don't burden users
+ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
 	autoconf --warnings=all
 else
 	autoconf
 endif

+######################################################################
+# Clean
+
 maintainer-clean::
 	@echo "This command is intended for maintainers to use;"
 	@echo "rebuilding the deleted files requires autoconf."
@@ -498,17 +606,6 @@ distclean maintainer-clean::
 	rm -f bin/verilator_bin* bin/verilator_coverage_bin*
 	rm -f include/verilated.mk include/verilated_config.h

-TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
-	${srcdir}/*.in ${srcdir}/*.pod
-
-TAGS:	$(TAGFILES)
-	etags $(TAGFILES)
-
-.PHONY: doxygen
-
-doxygen:
-	$(MAKE) -C docs doxygen
-
 ######################################################################
 # Distributions

@@ -1,17 +1,21 @@
 .. Github doesn't render images unless absolute URL
 .. Do not know of a conditional tag, "only: github" nor "github display" works

-.. image:: https://img.shields.io/badge/License-LGPL%20v3-blue.svg
-    :target: https://www.gnu.org/licenses/lgpl-3.0]
-.. image:: https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg
+|badge1| |badge2| |badge3| |badge4| |badge5| |badge6| |badge7|
+
+.. |badge1| image:: https://img.shields.io/badge/Website-Verilator.org-181717.svg
+    :target: https://verilator.org
+.. |badge2| image:: https://img.shields.io/badge/License-LGPL%20v3-blue.svg
+    :target: https://www.gnu.org/licenses/lgpl-3.0
+.. |badge3| image:: https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg
    :target: https://opensource.org/licenses/Artistic-2.0
-.. image:: https://repology.org/badge/tiny-repos/verilator.svg?header=distro%20packages
+.. |badge4| image:: https://repology.org/badge/tiny-repos/verilator.svg?header=distro%20packages
    :target: https://repology.org/project/verilator/versions
-.. image:: https://api.codacy.com/project/badge/Grade/fa78caa433c84a4ab9049c43e9debc6f
+.. |badge5| image:: https://img.shields.io/docker/pulls/verilator/verilator
+    :target: https://hub.docker.com/r/verilator/verilator
+.. |badge6| image:: https://api.codacy.com/project/badge/Grade/fa78caa433c84a4ab9049c43e9debc6f
    :target: https://www.codacy.com/gh/verilator/verilator
-.. image:: https://codecov.io/gh/verilator/verilator/branch/master/graph/badge.svg
-    :target: https://codecov.io/gh/verilator/verilator
-.. image:: https://github.com/verilator/verilator/workflows/build/badge.svg
+.. |badge7| image:: https://github.com/verilator/verilator/workflows/build/badge.svg
    :target: https://github.com/verilator/verilator/actions?query=workflow%3Abuild


@@ -57,17 +61,16 @@ files, the "Verilated" code.

 These Verilated C++/SystemC files are then compiled by a C++ compiler
 (gcc/clang/MSVC++), optionally along with a user's own C++/SystemC wrapper
-file to instantiate the Verilated model. Executing the resulting executable
-performs the design simulation. Verilator also supports linking Verilated
-generated libraries, optionally encrypted, into other simulators.
+file, to instantiate the Verilated model. Executing the resulting
+executable performs the design simulation. Verilator also supports linking
+Verilated generated libraries, optionally encrypted, into other simulators.

 Verilator may not be the best choice if you are expecting a full-featured
-replacement for a closed-source Verilog simulator, needs SDF annotation,
+replacement for a closed-source Verilog simulator, need SDF annotation,
 mixed-signal simulation, or are doing a quick class project (we recommend
-`Icarus Verilog`_ for classwork.)  However, if you are looking for a path
+`Icarus Verilog`_ for classwork).  However, if you are looking for a path
 to migrate SystemVerilog to C++/SystemC, or want high-speed simulation of
-synthesizable designs containing limited verification constructs, Verilator
-is the tool for you.
+designs, Verilator is the tool for you.


 Performance
@@ -77,17 +80,16 @@ Verilator does not directly translate Verilog HDL to C++ or SystemC. Rather,
 Verilator compiles your code into a much faster optimized and optionally
 thread-partitioned model, which is in turn wrapped inside a C++/SystemC
 module. The results are a compiled Verilog model that executes even on a
-single-thread over 10x faster than standalone SystemC, and on a single
+single thread over 10x faster than standalone SystemC, and on a single
 thread is about 100 times faster than interpreted Verilog simulators such
 as `Icarus Verilog`_. Another 2-10x speedup might be gained from
 multithreading (yielding 200-1000x total over interpreted simulators).

-Verilator has typically similar or better performance versus the
-closed-source Verilog simulators (Carbon Design Systems Carbonator,
-Modelsim/Questa, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and
-Pragmatic CVer/CVC). But, Verilator is open-sourced, so you can spend on
-computes rather than licenses. Thus, Verilator gives you the best
-cycles/dollar.
+Verilator has typically similar or better performance versus closed-source
+Verilog simulators (e.g., Aldec Riviera-Pro, Cadence Incisive/NC-Verilog,
+Mentor ModelSim/Questa, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
+Verilator is open-sourced, so you can spend on computes rather than
+licenses. Thus, Verilator gives you the best simulation cycles/dollar.


 Installation & Documentation
@@ -139,7 +141,7 @@ Related Projects
 Open License
 ============

-Verilator is Copyright 2003-2023 by Wilson Snyder. (Report bugs to
+Verilator is Copyright 2003-2025 by Wilson Snyder. (Report bugs to
 `Verilator Issues <https://verilator.org/issues>`_.)

 Verilator is free software; you can redistribute it and/or modify it under
@@ -147,7 +149,7 @@ the terms of either the GNU Lesser General Public License Version 3 or the
 Perl Artistic License Version 2.0. See the documentation for more details.

 .. _CHIPS Alliance: https://chipsalliance.org
-.. _Icarus Verilog: http://iverilog.icarus.com
+.. _Icarus Verilog: https://steveicarus.github.io/iverilog
 .. _Linux Foundation: https://www.linuxfoundation.org
 .. |Logo| image:: https://www.veripool.org/img/verilator_256_200_min.png
 .. |verilator multithreaded performance| image:: https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+######################################################################
+#
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+#
+######################################################################
+
+require 5.006_001;
+use warnings;
+use FindBin qw($RealBin $RealScript);
+use strict;
+
+my $relpath = RELPATH;  # Substituted during Verilator 'make install'
+
+unshift @ARGV, $RealScript;
+
+exec { "$RealBin/$relpath/$RealScript" } @ARGV;
+die "%Error: Exec failed,";
@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -15,6 +15,7 @@ use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
 use Pod::Usage;
+use Cwd qw(realpath);

 use strict;
 use vars qw($Debug @Opt_Verilator_Sw);
@@ -32,6 +33,7 @@ my $opt_rr;
 my $opt_gdbbt;
 my $opt_quiet_exit;
 my $opt_unlimited_stack = 1;
+my $opt_valgrind;

 # No arguments can't do anything useful.  Give help
 if ($#ARGV < 0) {
@@ -56,15 +58,31 @@ if (! GetOptions(
          # Switches
          "gdb!"             => \$opt_gdb,
          "gdbbt!"           => \$opt_gdbbt,
+          "quiet!"           => \$opt_quiet_exit,  # As -quiet implies -quiet-exit
          "quiet-exit!"      => \$opt_quiet_exit,
          "rr!"              => \$opt_rr,
          "unlimited-stack!" => \$opt_unlimited_stack,
+          "valgrind!"        => \$opt_valgrind,
          # Additional parameters
          "<>"               => sub {},      # Ignored
    )) {
    pod2usage(-exitstatus => 2, -verbose => 0);
 }

+# WARNING: $verilator_pkgdatadir_relpath is substituted during Verilator 'make install'
+my $verilator_pkgdatadir_relpath = "..";
+my $verilator_root = realpath("$RealBin/$verilator_pkgdatadir_relpath");
+if (defined $ENV{VERILATOR_ROOT}) {
+    if ((!-d $ENV{VERILATOR_ROOT}) || $verilator_root ne realpath($ENV{VERILATOR_ROOT})) {
+        warn "%Error: verilator: VERILATOR_ROOT is set to inconsistent path. Suggest leaving it unset.\n";
+        warn "%Error: VERILATOR_ROOT=$ENV{VERILATOR_ROOT}\n";
+        exit 1;
+    }
+} else {
+    print "export VERILATOR_ROOT='$verilator_root'\n" if $Debug;
+    $ENV{VERILATOR_ROOT} = $verilator_root;
+}
+
 if ($opt_gdbbt && !gdb_works()) {
    warn "-Info: --gdbbt ignored: gdb doesn't seem to be working\n" if $Debug;
    $opt_gdbbt = 0;
@@ -109,6 +127,18 @@ if ($opt_gdb) {
         . " -ex \"run " . join(' ', @quoted_sw)."\""
         . " -ex 'set width 0'"
         . " -ex 'bt' -ex 'quit'");
+} elsif ($opt_valgrind) {
+    # Run under valgrind
+    my $valgrind_bin = ($ENV{VERILATOR_VALGRIND} || "valgrind --error-exitcode=1 --max-stackframe=2815880"
+        # Magic number sugested by valgrind, may need to be increased in future
+        # if you get warnings. See: https://valgrind.org/docs/manual/manual-core.html#opt.max-stackframe
+        );
+
+    run (ulimit_stack_unlimited()
+         . aslr_off()
+         . $valgrind_bin
+         . " " . verilator_bin()
+         . " " . join(' ', @quoted_sw));
 } elsif ($Debug) {
    # Debug
    run(ulimit_stack_unlimited()
@@ -137,30 +167,13 @@ sub debug {
 # Builds

 sub verilator_bin {
-    my $bin = "";
-    # Use VERILATOR_ROOT if defined, else assume verilator_bin is in the search path
    my $basename = ($ENV{VERILATOR_BIN}
                    || ($Debug ? "verilator_bin_dbg" : "verilator_bin"));
-    if (defined($ENV{VERILATOR_ROOT})) {
-        my $dir = $ENV{VERILATOR_ROOT};
-        if (-x "$dir/bin/$basename"
-            || -x "$dir/bin/$basename.exe") {  # From a "make install" into VERILATOR_ROOT
-            $bin = "$dir/bin/$basename";
-        } else {
-            $bin = "$dir/$basename";  # From pointing to kit directory
-        }
+    if (-x "$RealBin/$basename" || -x "$RealBin/$basename.exe") {
+        return "$RealBin/$basename";
    } else {
-        if (-x "$RealBin/$basename"
-            || -x "$RealBin/$basename.exe") {
-            $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
-        } else {
-            $bin = $basename;  # Find in PATH
-        }
-        # Note we don't look under bin/$basename which would be right if running
-        # in the kit dir. Running that would likely break, since
-        # VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
+        return $basename;  # Find in PATH
    }
-    return $bin;
 }

 #######################################################################
@@ -256,8 +269,7 @@ __END__

 =head1 NAME

-Verilator - Translate and simulate SystemVerilog code using C++/SystemC
-
+Verilator - Lint, compile and simulate SystemVerilog code using C++/SystemC

 =head1 SYNOPSIS

@@ -298,7 +310,9 @@ detailed descriptions of these arguments.
     +1800-2009ext+<ext>        Use SystemVerilog 2009 with file extension <ext>
     +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
     +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
+     +1800-2023ext+<ext>        Use SystemVerilog 2023 with file extension <ext>
    --assert                    Enable all assertions
+    --assert-case               Enable unique/unique0/priority case related checks
    --autoflush                 Flush streams after all $displays
    --bbox-sys                  Blackbox unknown $system calls
    --bbox-unsup                Blackbox unsupported language features
@@ -307,13 +321,15 @@ detailed descriptions of these arguments.
    --build-dep-bin <filename>  Override build dependency Verilator binary
    --build-jobs <jobs>         Parallelism for --build
    --cc                        Create C++ output
-    --cdc                       Clock domain crossing analysis
     -CFLAGS <flags>            C++ compiler arguments for makefile
    --clk <signal-name>         Mark specified signal as clock
    --no-clk <signal-name>      Prevent marking specified signal as clock
    --compiler <compiler-name>  Tune for specified C++ compiler
+    --compiler-include          Include additional header in the precompiled one
    --converge-limit <loops>    Tune convergence settle time
    --coverage                  Enable all coverage
+    --coverage-expr             Enable expression coverage
+    --coverage-expr-max <value>     Maximum permutations allowed for an expression
    --coverage-line             Enable line coverage
    --coverage-max-width <width>   Maximum array depth for coverage
    --coverage-toggle           Enable toggle coverage
@@ -325,7 +341,8 @@ detailed descriptions of these arguments.
    --no-debug-leak             Disable leaking memory in --debug mode
    --debugi <level>            Enable debugging at a specified level
    --debugi-<srcfile> <level>  Enable debugging a source file at a level
-    --no-decoration             Disable comments and symbol decorations
+    --decorations <level>       Set output comment and spacing level
+    --no-decoration             Disable comments and lower spacing level
    --default-language <lang>   Default language to parse
     +define+<var>=<value>      Set preprocessor define
    --dpi-hdr-only              Only produce the DPI header file
@@ -334,12 +351,16 @@ detailed descriptions of these arguments.
    --dump-graph                Enable dumping V3Graphs to .dot files
    --dump-tree                 Enable dumping Ast .tree files
    --dump-tree-addrids         Use short identifiers instead of addresses
+    --dump-tree-dot             Enable dumping Ast .tree.dot debug files
+    --dump-tree-json            Enable dumping Ast .tree.json files and .tree.meta.json file
    --dump-<srcfile>            Enable dumping everything in source file
    --dumpi-dfg <level>         Enable dumping DfgGraphs to .dot files at level
    --dumpi-graph <level>       Enable dumping V3Graphs to .dot files at level
    --dumpi-tree <level>        Enable dumping Ast .tree files at level
+    --dumpi-tree-json <level>   Enable dumping Ast .tree.json files at level
    --dumpi-<srcfile> <level>   Enable dumping everything in source file at level
     -E                         Preprocess, but do not compile
+    --emit-accessors            Emit getter and setter methods for model top class
    --error-limit <value>       Abort after this number of errors
    --exe                       Link to create executable
    --expand-limit <value>      Set expand optimization limit
@@ -347,31 +368,41 @@ detailed descriptions of these arguments.
     -f <file>                  Parse arguments from a file
     -FI <file>                 Force include of a file
    --flatten                   Force inlining of all modules, tasks and functions
+    --future0 <option>          Ignore an option for compatibility
+    --future1 <option>          Ignore an option with argument for compatibility
     -fno-<optimization>        Disable internal optimization stage
     -G<name>=<value>           Overwrite top-level parameter
    --gate-stmts <value>        Tune gate optimizer depth
    --gdb                       Run Verilator under GDB interactively
    --gdbbt                     Run Verilator under GDB for backtrace
    --generate-key              Create random key for --protect-key
-    --getenv <var>              Get environment variable with defaults
    --get-supported <feature>   Get if feature is supported
-    --help                      Display this help
+    --getenv <var>              Get environment variable with defaults
+    --help                      Show this help
    --hierarchical              Enable hierarchical Verilation
+    --hierarchical-params-file <name> Internal option that specifies parameters file for hier blocks
     -I<dir>                    Directory to search for includes
    --if-depth <value>          Tune IFDEPTH warning
     +incdir+<dir>              Directory to search for includes
    --inline-mult <value>       Tune module inlining
    --instr-count-dpi <value>   Assumed dynamic instruction count of DPI imports
-     -j <jobs>                  Parallelism for --build (alias to --build-jobs)
+     -j <jobs>                  Parallelism for --build-jobs/--verilate-jobs
+    --no-json-edit-nums         Don't dump editNum in .tree.json files
+    --no-json-ids               Don't use short identifiers instead of adresses/paths in .tree.json
+    --json-only                 Create JSON parser output (.tree.json and .meta.json)
+    --json-only-output          .tree.json output filename
+    --json-only-meta-output     .tree.meta.json output filename
    --l2-name <value>           Verilog scope name of the top module
    --language <lang>           Default language standard to parse
     -LDFLAGS <flags>           Linker pre-object arguments for makefile
    --lib-create <name>         Create a DPI library
     +libext+<ext>+[ext]...     Extensions for finding modules
    --lint-only                 Lint, but do not make output
+    --localize-max-size <value>  Tune localize optimization variable size
    --make <build-tool>         Generate scripts for specified build tool
     -MAKEFLAGS <flags>         Arguments to pass to make during --build
    --main                      Generate C++ main() file
+    --main-top-name             Specify top name passed to Verilated model in generated C++ main
    --max-num-width <value>     Maximum number width (default: 64K)
    --Mdir <directory>          Name of output object directory
    --MMD                       Create .d dependency files
@@ -382,19 +413,23 @@ detailed descriptions of these arguments.
     -O3                        High-performance optimizations
     -O<optimization-letter>    Selectable optimizations
     -o <executable>            Name of final executable
-    --no-order-clock-delay      Disable ordering clock enable assignments
+    --output-groups <numfiles>  Group .cpp files into larger ones
    --output-split <statements>          Split .cpp files into pieces
    --output-split-cfuncs <statements>   Split model functions
    --output-split-ctrace <statements>   Split tracing functions
     -P                         Disable line numbers and blanks with -E
    --pins-bv <bits>            Specify types for top-level ports
+    --pins-inout-enables        Specify that __en and __out signals be created for inouts
    --pins-sc-biguint           Specify types for top-level ports
    --pins-sc-uint              Specify types for top-level ports
+    --pins-sc-uint-bool         Specify types for top-level ports
    --pins-uint8                Specify types for top-level ports
    --no-pins64                 Don't use uint64_t's for 33-64 bit sigs
    --pipe-filter <command>     Filter all input through a script
    --pp-comments               Show preprocessor comments with -E
    --prefix <topname>          Name of top-level class
+    --preproc-resolve           Include all found modules in the output with -E
+    --preproc-token-limit       Maximum tokens on a line allowed by preprocessor
    --private                   Debugging; see docs
    --prof-c                    Compile C++ code with profiling
    --prof-cfuncs               Name functions for profiling
@@ -403,22 +438,32 @@ detailed descriptions of these arguments.
    --protect-ids               Hash identifier names for obscurity
    --protect-key <key>         Key for symbol protection
    --protect-lib <name>        Create a DPI protected library
-    --public                    Debugging; see docs
+    --public                    Mark signals as public; see docs
+    --public-depth <level>      Mark public to specified module depth
    --public-flat-rw            Mark all variables, etc as public_flat_rw
+    --public-ignore             Ignore all public comment markings
+    --public-params             Mark all parameters as public_flat
     -pvalue+<name>=<value>     Overwrite toplevel parameter
+    --quiet                     Minimize additional printing
    --quiet-exit                Don't print the command on failure
+    --quiet-stats               Don't print statistics
    --relative-includes         Resolve includes relative to current file
    --reloop-limit              Minimum iterations for forming loops
    --report-unoptflat          Extra diagnostics for UNOPTFLAT
    --rr                        Run Verilator and record with rr
+    --runtime-debug             Enable model runtime debugging
    --savable                   Enable model save-restore
    --sc                        Create SystemC output
    --no-skip-identical         Disable skipping identical output
    --stats                     Create statistics file
    --stats-vars                Provide statistics on variables
+    --no-std                    Prevent loading standard files
+    --no-std-package            Prevent parsing standard package
+    --no-std-waiver             Prevent parsing standard lint waivers
+    --no-stop-fail              Do not call $stop when assertion fails
    --structs-packed            Convert all unpacked structures to packed structures
     -sv                        Enable SystemVerilog parsing
-     +systemverilogext+<ext>    Synonym for +1800-2017ext+<ext>
+     +systemverilogext+<ext>    Synonym for +1800-2023ext+<ext>
    --threads <threads>         Enable multithreading
    --threads-dpi <mode>        Enable multithreaded DPI
    --threads-max-mtasks <mtasks>  Tune maximum mtask partitioning
@@ -432,11 +477,12 @@ detailed descriptions of these arguments.
    --trace-coverage            Enable tracing of coverage
    --trace-depth <levels>      Depth of tracing
    --trace-fst                 Enable FST waveform creation
-    --trace-max-array <depth>   Maximum bit width for tracing
-    --trace-max-width <width>   Maximum array depth for tracing
+    --trace-max-array <depth>   Maximum array depth for tracing
+    --trace-max-width <width>   Maximum bit width for tracing
    --trace-params              Enable tracing of parameters
    --trace-structs             Enable tracing structure names
    --trace-threads <threads>   Enable FST waveform creation on separate threads
+    --no-trace-top              Do not emit traces for signals in the top module generated by verilator
    --trace-underscore          Enable tracing of _signals
     -U<var>                    Undefine preprocessor define
    --no-unlimited-stack        Don't disable stack size limit
@@ -445,12 +491,15 @@ detailed descriptions of these arguments.
    --unused-regexp <regexp>    Tune UNUSED lint signals
     -V                         Verbose version and config
     -v <filename>              Verilog library
+    --valgrind                  Run Verilator under valgrind
+    --verilate-jobs             Job threads for Verilation stage
    --no-verilate               Skip Verilation and just compile previously Verilated code
     +verilog1995ext+<ext>      Synonym for +1364-1995ext+<ext>
     +verilog2001ext+<ext>      Synonym for +1364-2001ext+<ext>
-    --version                   Displays program version and exits
+    --version                   Show program version and exits
    --vpi                       Enable VPI compiles
-    --waiver-output <filename>  Create a waiver file based on the linter warnings
+    --waiver-multiline          Create multiline --match for waivers
+    --waiver-output <filename>  Create a waiver file based on linter warnings
     -Wall                      Enable all style warnings
     -Werror-<message>          Convert warnings to errors
     -Wfuture-<message>         Disable unknown message warnings
@@ -477,26 +526,28 @@ description of these arguments.

 =for VL_SPHINX_EXTRACT "_build/gen/args_verilated.rst"

-     +verilator+debug                  Enable debugging
-     +verilator+debugi+<value>         Enable debugging at a level
-     +verilator+error+limit+<value>    Set error limit
-     +verilator+help                   Display help
-     +verilator+noassert               Disable assert checking
+     +verilator+debug                      Enable debugging
+     +verilator+debugi+<value>             Enable debugging at a level
+     +verilator+coverage+file+<filename>   Set coverage output filename
+     +verilator+error+limit+<value>        Set error limit
+     +verilator+help                       Show help
+     +verilator+noassert                   Disable assert checking
     +verilator+prof+exec+file+<filename>  Set execution profile filename
     +verilator+prof+exec+start+<value>    Set execution profile starting point
     +verilator+prof+exec+window+<value>   Set execution profile duration
     +verilator+prof+vlt+file+<filename>   Set PGO profile filename
-     +verilator+rand+reset+<value>     Set random reset technique
-     +verilator+seed+<value>           Set random seed
-     +verilator+V                      Verbose version and config
-     +verilator+version                Show version and exit
+     +verilator+quiet                      Minimize additional printing
+     +verilator+rand+reset+<value>         Set random reset technique
+     +verilator+seed+<value>               Set random seed
+     +verilator+V                          Show verbose version and config
+     +verilator+version                    Show version and exit


 =head1 DISTRIBUTION

 The latest version is available from L<https://verilator.org>.

-Copyright 2003-2023 by Wilson Snyder. This program is free software; you can
+Copyright 2003-2025 by Wilson Snyder. This program is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of
 either the GNU Lesser General Public License Version 3 or the Perl Artistic
 License Version 2.0.
@@ -16,8 +16,7 @@ parser = argparse.ArgumentParser(

    For documentation see
    https://verilator.org/guide/latest/exe_verilator_ccache_report.html""",
-    epilog=
-    """Copyright 2002-2023 by Wilson Snyder. This program is free software; you
+    epilog="""Copyright 2002-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
@@ -67,30 +66,23 @@ else:
    wnames = max(len(_) for _ in results) + 1
    wresults = max(len(_) for _ in results.values()) + 1
    for k in sorted(results.keys()):
-        args.o.write("{:{wnames}} : {:{wresults}} : {}s\n".format(
-            k,
-            results[k],
-            elapsed[k].total_seconds(),
-            wnames=wnames,
-            wresults=wresults))
+        args.o.write("{:{wnames}} : {:{wresults}} : {}s\n".format(k,
+                                                                  results[k],
+                                                                  elapsed[k].total_seconds(),
+                                                                  wnames=wnames,
+                                                                  wresults=wresults))

    args.o.write("\nSummary:\n")
    counts = collections.Counter(_ for _ in results.values())
    total = sum(counts.values())
    for k in sorted(counts.keys()):
        c = counts[k]
-        args.o.write("{:{width}}| {} ({:.2%})\n".format(k,
-                                                        c,
-                                                        c / total,
-                                                        width=wresults))
+        args.o.write("{:{width}}| {} ({:.2%})\n".format(k, c, c / total, width=wresults))

    args.o.write("\nLongest:\n")
-    longest = sorted(list(elapsed.items()),
-                     key=lambda kv: -kv[1].total_seconds())
+    longest = sorted(list(elapsed.items()), key=lambda kv: -kv[1].total_seconds())
    for i, (k, v) in enumerate(longest):
-        args.o.write("{:{width}}| {}s\n".format(k,
-                                                v.total_seconds(),
-                                                width=wnames))
+        args.o.write("{:{width}}| {}s\n".format(k, v.total_seconds(), width=wnames))
        if i > 4:
            break

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -154,9 +154,9 @@ verilator_coverage - Verilator coverage analyzer

    verilator_coverage --annotate <obj>

-    verilator_coverage  -write merged.dat -read <datafiles>...
+    verilator_coverage  -write merged.dat <datafiles>...

-    verilator_coverage  -write-info merged.info -read <datafiles>...
+    verilator_coverage  -write-info merged.info <datafiles>...

 Verilator_coverage processes Verilated model-generated coverage reports.

@@ -169,6 +169,7 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
    --annotate <output_dir>       Directory name for source annotation.
    --annotate-all                All files should be shown.
    --annotate-min <count>        Minimum occurrence count for uncovered.
+    --annotate-points             Annotates info from each coverage point.
    --help                        Displays this message and version and exits.
    --rank                        Compute relative importance of tests.
    --unlink                      With --write, unlink all inputs
@@ -176,18 +177,18 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
    --write <filename>            Write aggregate coverage results.
    --write-info <filename.info>  Write lcov .info.

-    +libext+I<ext>+I<ext>...      Extensions for Verilog files.
-    +define+I<var>+I<value>       Defines the given variable.
-    -DI<var>=I<value>             Defines the given variable.
-    +incdir+I<dir>                Add directory for finding include files.
-    -II<dir>                      Add directory for finding include files.
-    -y I<dir>                     Specifies module search directory.
+    +libext+<ext>+<ext>...        Extensions for Verilog files.
+    +define+<var>+<value>         Defines the given variable.
+    -D<var>=<value>               Defines the given variable.
+    +incdir+<dir>                 Add directory for finding include files.
+    -I<dir>                       Add directory for finding include files.
+    -y <dir>                      Specifies module search directory.

 =head1 DISTRIBUTION

 The latest version is available from L<https://verilator.org>.

-Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.
@@ -42,13 +42,12 @@ def diff_dir(a, b):
            continue
        a = files[base]['a']
        b = files[base]['b']
-        print("=" * 70)
-        print("= %s <-> %s" % (a, b))
+        print("=" * 70, flush=True)
+        print("= %s <-> %s" % (a, b), flush=True)
        diff_file(a, b)
        anyfile = True
    if not anyfile:
-        sys.stderr.write(
-            "%Warning: No .tree files found that have similar base names\n")
+        sys.stderr.write("%Warning: No .tree files found that have similar base names\n")


 def diff_file(a, b):
@@ -109,18 +108,14 @@ parser = argparse.ArgumentParser(
 Verilator_difftree is used for debugging Verilator tree output files.
 It performs a diff between two files, or all files common between two
 directories, ignoring irrelevant pointer differences.""",
-    epilog=
-    """Copyright 2005-2023 by Wilson Snyder. This program is free software; you
+    epilog="""Copyright 2005-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")

-parser.add_argument('--debug',
-                    action='store_const',
-                    const=9,
-                    help='enable debug')
+parser.add_argument('--debug', action='store_const', const=9, help='enable debug')
 parser.add_argument('--no-lineno',
                    action='store_false',
                    help='do not show differences in line numbering')
@@ -1,52 +1,49 @@
 #!/usr/bin/env python3
-# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,eval-used
+# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,W0603,eval-used
 ######################################################################

 import argparse
+import bisect
 import collections
 import math
 import re
 import statistics
 # from pprint import pprint

-Threads = collections.defaultdict(lambda: collections.defaultdict(lambda: {}))
-Mtasks = collections.defaultdict(lambda: {})
-Evals = collections.defaultdict(lambda: {})
-EvalLoops = collections.defaultdict(lambda: {})
-Global = {
-    'args': {},
-    'cpuinfo': collections.defaultdict(lambda: {}),
-    'rdtsc_cycle_time': 0,
-    'stats': {}
-}
+Sections = []
+LongestVcdStrValueLength = 0
+Threads = collections.defaultdict(lambda: [])  # List of records per thread id
+Mtasks = collections.defaultdict(lambda: {'elapsed': 0, 'end': 0})
+Cpus = collections.defaultdict(lambda: {'mtask_time': 0})
+Global = {'args': {}, 'cpuinfo': collections.defaultdict(lambda: {}), 'stats': {}}
+ElapsedTime = None  # total elapsed time
+ExecGraphTime = 0  # total elapsed time excuting an exec graph
+ExecGraphIntervals = []  # list of (start, end) pairs

 ######################################################################


-def process(filename):
-    read_data(filename)
-    report()
-
-
 def read_data(filename):
    with open(filename, "r", encoding="utf8") as fh:
        re_thread = re.compile(r'^VLPROFTHREAD (\d+)$')
        re_record = re.compile(r'^VLPROFEXEC (\S+) (\d+)(.*)$')
-        re_payload_mtaskBegin = re.compile(
-            r'id (\d+) predictStart (\d+) cpu (\d+)')
+        re_payload_mtaskBegin = re.compile(r'id (\d+) predictStart (\d+) cpu (\d+)')
        re_payload_mtaskEnd = re.compile(r'id (\d+) predictCost (\d+)')

        re_arg1 = re.compile(r'VLPROF arg\s+(\S+)\+([0-9.]*)\s*')
        re_arg2 = re.compile(r'VLPROF arg\s+(\S+)\s+([0-9.]*)\s*$')
        re_stat = re.compile(r'VLPROF stat\s+(\S+)\s+([0-9.]+)')
-        re_time = re.compile(r'rdtsc time = (\d+) ticks')
        re_proc_cpu = re.compile(r'VLPROFPROC processor\s*:\s*(\d+)\s*$')
        re_proc_dat = re.compile(r'VLPROFPROC ([a-z_ ]+)\s*:\s*(.*)$')
        cpu = None
-        thread = None
+        thread = 0
+        execGraphStart = None

-        lastEvalBeginTick = None
-        lastEvalLoopBeginTick = None
+        global LongestVcdStrValueLength
+        global ExecGraphTime
+
+        SectionStack = []
+        mTaskThread = {}

        for line in fh:
            recordMatch = re_record.match(line)
@@ -54,47 +51,53 @@ def read_data(filename):
                kind, tick, payload = recordMatch.groups()
                tick = int(tick)
                payload = payload.strip()
-                if kind == "EVAL_BEGIN":
-                    Evals[tick]['start'] = tick
-                    lastEvalBeginTick = tick
-                elif kind == "EVAL_END":
-                    Evals[lastEvalBeginTick]['end'] = tick
-                    lastEvalBeginTick = None
-                elif kind == "EVAL_LOOP_BEGIN":
-                    EvalLoops[tick]['start'] = tick
-                    lastEvalLoopBeginTick = tick
-                elif kind == "EVAL_LOOP_END":
-                    EvalLoops[lastEvalLoopBeginTick]['end'] = tick
-                    lastEvalLoopBeginTick = None
+                if kind == "SECTION_PUSH":
+                    LongestVcdStrValueLength = max(LongestVcdStrValueLength, len(payload))
+                    SectionStack.append(payload)
+                    Sections[thread].append((tick, tuple(SectionStack)))
+                elif kind == "SECTION_POP":
+                    assert SectionStack, "SECTION_POP without SECTION_PUSH"
+                    SectionStack.pop()
+                    Sections[thread].append((tick, tuple(SectionStack)))
                elif kind == "MTASK_BEGIN":
-                    mtask, predict_start, ecpu = re_payload_mtaskBegin.match(
-                        payload).groups()
+                    mtask, predict_start, ecpu = re_payload_mtaskBegin.match(payload).groups()
                    mtask = int(mtask)
                    predict_start = int(predict_start)
                    ecpu = int(ecpu)
-                    Threads[thread][tick]['mtask'] = mtask
-                    Threads[thread][tick]['predict_start'] = predict_start
-                    Threads[thread][tick]['cpu'] = ecpu
-                    if 'elapsed' not in Mtasks[mtask]:
-                        Mtasks[mtask] = {'end': 0, 'elapsed': 0}
+                    mTaskThread[mtask] = thread
+                    records = Threads[thread]
+                    assert not records or records[-1]['start'] <= records[-1]['end'] <= tick
+                    records.append({
+                        'start': tick,
+                        'mtask': mtask,
+                        'predict_start': predict_start,
+                        'cpu': ecpu
+                    })
                    Mtasks[mtask]['begin'] = tick
                    Mtasks[mtask]['thread'] = thread
                    Mtasks[mtask]['predict_start'] = predict_start
                elif kind == "MTASK_END":
-                    mtask, predict_cost = re_payload_mtaskEnd.match(
-                        payload).groups()
+                    mtask, predict_cost = re_payload_mtaskEnd.match(payload).groups()
                    mtask = int(mtask)
                    predict_cost = int(predict_cost)
                    begin = Mtasks[mtask]['begin']
-                    Threads[thread][begin]['end'] = tick
-                    Threads[thread][begin]['predict_cost'] = predict_cost
+                    record = Threads[mTaskThread[mtask]][-1]
+                    record['end'] = tick
+                    record['predict_cost'] = predict_cost
                    Mtasks[mtask]['elapsed'] += tick - begin
                    Mtasks[mtask]['predict_cost'] = predict_cost
                    Mtasks[mtask]['end'] = max(Mtasks[mtask]['end'], tick)
+                elif kind == "EXEC_GRAPH_BEGIN":
+                    execGraphStart = tick
+                elif kind == "EXEC_GRAPH_END":
+                    ExecGraphTime += tick - execGraphStart
+                    ExecGraphIntervals.append((execGraphStart, tick))
+                    execGraphStart = None
                elif Args.debug:
                    print("-Unknown execution trace record: %s" % line)
            elif re_thread.match(line):
                thread = int(re_thread.match(line).group(1))
+                Sections.append([])
            elif re.match(r'^VLPROF(THREAD|VERSION)', line):
                pass
            elif re_arg1.match(line):
@@ -109,7 +112,7 @@ def read_data(filename):
            elif re_proc_cpu.match(line):
                match = re_proc_cpu.match(line)
                cpu = int(match.group(1))
-            elif cpu and re_proc_dat.match(line):
+            elif cpu is not None and re_proc_dat.match(line):
                match = re_proc_dat.match(line)
                term = match.group(1)
                value = match.group(2)
@@ -121,11 +124,6 @@ def read_data(filename):
                pass
            elif Args.debug:
                print("-Unk: %s" % line)
-            # TODO -- this is parsing text printed by a client.
-            # Really, verilator proper should generate this
-            # if it's useful...
-            if re_time.match(line):
-                Global['rdtsc_cycle_time'] = re_time.group(1)


 def re_match_result(regexp, line, result_to):
@@ -144,34 +142,50 @@ def report():
        plus = "+" if re.match(r'^\+', arg) else " "
        print("  %s%s%s" % (arg, plus, Global['args'][arg]))

-    nthreads = int(Global['stats']['threads'])
-    Global['cpus'] = {}
-    for thread in Threads:
-        # Make potentially multiple characters per column
-        for start in Threads[thread]:
-            if not Threads[thread][start]:
-                continue
-            cpu = Threads[thread][start]['cpu']
-            elapsed = Threads[thread][start]['end'] - start
-            if cpu not in Global['cpus']:
-                Global['cpus'][cpu] = {'cpu_time': 0}
-            Global['cpus'][cpu]['cpu_time'] += elapsed
+    for records in Threads.values():
+        for record in records:
+            cpu = record['cpu']
+            elapsed = record['end'] - record['start']
+            Cpus[cpu]['mtask_time'] += elapsed

-    measured_mt_mtask_time = 0
-    predict_mt_mtask_time = 0
-    long_mtask_time = 0
-    measured_last_end = 0
-    predict_last_end = 0
-    for mtask in Mtasks:
-        measured_mt_mtask_time += Mtasks[mtask]['elapsed']
-        predict_mt_mtask_time += Mtasks[mtask]['predict_cost']
-        measured_last_end = max(measured_last_end, Mtasks[mtask]['end'])
-        predict_last_end = max(
-            predict_last_end,
-            Mtasks[mtask]['predict_start'] + Mtasks[mtask]['predict_cost'])
-        long_mtask_time = max(long_mtask_time, Mtasks[mtask]['elapsed'])
-    Global['measured_last_end'] = measured_last_end
-    Global['predict_last_end'] = predict_last_end
+    global ElapsedTime
+    ElapsedTime = int(Global['stats']['ticks'])
+    nthreads = int(Global['stats']['threads'])
+    ncpus = max(len(Cpus), 1)
+
+    print("\nSummary:")
+    print("  Total elapsed time = {} rdtsc ticks".format(ElapsedTime))
+    print("  Parallelized code  = {:.2%} of elapsed time".format(ExecGraphTime / ElapsedTime))
+    print("  Total threads      = %d" % nthreads)
+    print("  Total CPUs used    = %d" % ncpus)
+    print("  Total mtasks       = %d" % len(Mtasks))
+    print("  Total yields       = %d" % int(Global['stats'].get('yields', 0)))
+
+    report_mtasks()
+    report_cpus()
+    report_sections()
+
+    if nthreads > ncpus:
+        print()
+        print("%%Warning: There were fewer CPUs (%d) than threads (%d)." % (ncpus, nthreads))
+        print("        : See docs on use of numactl.")
+    else:
+        if 'cpu_socket_cores_warning' in Global:
+            print()
+            print("%Warning: Multiple threads scheduled on same hyperthreaded core.")
+            print("        : See docs on use of numactl.")
+        if 'cpu_sockets_warning' in Global:
+            print()
+            print("%Warning: Threads scheduled on multiple sockets.")
+            print("        : See docs on use of numactl.")
+    print()
+
+
+def report_mtasks():
+    if not Mtasks:
+        return
+
+    nthreads = int(Global['stats']['threads'])

    # If we know cycle time in the same (rdtsc) units,
    # this will give us an actual utilization number,
@@ -181,130 +195,110 @@ def report():
    # serial mode, to estimate the overhead of data sharing,
    # which will show up in the total elapsed time. (Overhead
    # of synchronization and scheduling should not.)
-    print("\nAnalysis:")
-    print("  Total threads             = %d" % nthreads)
-    print("  Total mtasks              = %d" % len(Mtasks))
-    ncpus = max(len(Global['cpus']), 1)
-    print("  Total cpus used           = %d" % ncpus)
-    print("  Total yields              = %d" %
-          int(Global['stats'].get('yields', 0)))
-    print("  Total evals               = %d" % len(Evals))
-    print("  Total eval loops          = %d" % len(EvalLoops))
-    if Mtasks:
-        print("  Total eval time           = %d rdtsc ticks" %
-              Global['measured_last_end'])
-        print("  Longest mtask time        = %d rdtsc ticks" % long_mtask_time)
-        print("  All-thread mtask time     = %d rdtsc ticks" %
-              measured_mt_mtask_time)
-        long_efficiency = long_mtask_time / (Global.get(
-            'measured_last_end', 1) or 1)
-        print("  Longest-thread efficiency = %0.1f%%" %
-              (long_efficiency * 100.0))
-        mt_efficiency = measured_mt_mtask_time / (
-            Global.get('measured_last_end', 1) * nthreads or 1)
-        print("  All-thread efficiency     = %0.1f%%" %
-              (mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (mt_efficiency * nthreads))
-        if Global['rdtsc_cycle_time'] > 0:
-            ut = measured_mt_mtask_time / Global['rdtsc_cycle_time']
-            print("tot_mtask_cpu=" + measured_mt_mtask_time + " cyc=" +
-                  Global['rdtsc_cycle_time'] + " ut=" + ut)
+    total_mtask_time = 0
+    thread_mtask_time = collections.defaultdict(lambda: 0)
+    long_mtask_time = 0
+    long_mtask = None
+    predict_mtask_time = 0
+    predict_elapsed = 0
+    for mtaskId in Mtasks:
+        record = Mtasks[mtaskId]
+        predict_mtask_time += record['predict_cost']
+        total_mtask_time += record['elapsed']
+        thread_mtask_time[record['thread']] += record['elapsed']
+        predict_end = record['predict_start'] + record['predict_cost']
+        predict_elapsed = max(predict_elapsed, predict_end)
+        if record['elapsed'] > long_mtask_time:
+            long_mtask_time = record['elapsed']
+            long_mtask = mtaskId
+    Global['predict_last_end'] = predict_elapsed

-        predict_mt_efficiency = predict_mt_mtask_time / (
-            Global.get('predict_last_end', 1) * nthreads or 1)
-        print("\nPrediction (what Verilator used for scheduling):")
-        print("  All-thread efficiency     = %0.1f%%" %
-              (predict_mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (predict_mt_efficiency * nthreads))
+    serialTime = ElapsedTime - ExecGraphTime

-        p2e_ratios = []
-        min_p2e = 1000000
-        min_mtask = None
-        max_p2e = -1000000
-        max_mtask = None
+    def subReport(elapsed, work):
+        print("  Thread utilization = {:7.2%}".format(work / (elapsed * nthreads)))
+        print("  Speedup            = {:6.3}x".format(work / elapsed))

-        for mtask in sorted(Mtasks.keys()):
-            if Mtasks[mtask]['elapsed'] > 0:
-                if Mtasks[mtask]['predict_cost'] == 0:
-                    Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
-                p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] /
-                                     Mtasks[mtask]['elapsed'])
-                p2e_ratios.append(p2e_ratio)
+    print("\nParallelized code, measured:")
+    subReport(ExecGraphTime, total_mtask_time)

-                if p2e_ratio > max_p2e:
-                    max_p2e = p2e_ratio
-                    max_mtask = mtask
-                if p2e_ratio < min_p2e:
-                    min_p2e = p2e_ratio
-                    min_mtask = mtask
+    print("\nParallelized code, predicted during static scheduling:")
+    subReport(predict_elapsed, predict_mtask_time)

-        print("\nMTask statistics:")
-        print("  min log(p2e) = %0.3f" % min_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (min_mtask, Mtasks[min_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
-        print("  max log(p2e) = %0.3f" % max_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (max_mtask, Mtasks[max_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
+    print("\nAll code, measured:")
+    subReport(ElapsedTime, serialTime + total_mtask_time)

-        stddev = statistics.pstdev(p2e_ratios)
-        mean = statistics.mean(p2e_ratios)
-        print("  mean = %0.3f" % mean)
-        print("  stddev = %0.3f" % stddev)
-        print("  e ^ stddev = %0.3f" % math.exp(stddev))
+    print("\nAll code, measured, scaled by predicted speedup:")
+    expectedParallelSpeedup = predict_mtask_time / predict_elapsed
+    scaledElapsed = serialTime + total_mtask_time / expectedParallelSpeedup
+    subReport(scaledElapsed, serialTime + total_mtask_time)

-    report_cpus()
+    p2e_ratios = []
+    min_p2e = 1000000
+    min_mtask = None
+    max_p2e = -1000000
+    max_mtask = None

-    if nthreads > ncpus:
-        print()
-        print("%%Warning: There were fewer CPUs (%d) then threads (%d)." %
-              (ncpus, nthreads))
-        print("        : See docs on use of numactl.")
-    else:
-        if 'cpu_socket_cores_warning' in Global:
-            print()
-            print(
-                "%Warning: Multiple threads scheduled on same hyperthreaded core."
-            )
-            print("        : See docs on use of numactl.")
-        if 'cpu_sockets_warning' in Global:
-            print()
-            print("%Warning: Threads scheduled on multiple sockets.")
-            print("        : See docs on use of numactl.")
-    print()
+    for mtask in sorted(Mtasks.keys()):
+        if Mtasks[mtask]['elapsed'] > 0:
+            if Mtasks[mtask]['predict_cost'] == 0:
+                Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
+            p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] / Mtasks[mtask]['elapsed'])
+            p2e_ratios.append(p2e_ratio)
+
+            if p2e_ratio > max_p2e:
+                max_p2e = p2e_ratio
+                max_mtask = mtask
+            if p2e_ratio < min_p2e:
+                min_p2e = p2e_ratio
+                min_mtask = mtask
+
+    print("\nMTask statistics:")
+    print("  Longest mtask id = {}".format(long_mtask))
+    print("  Longest mtask time = {:.2%} of time elapsed in parallelized code".format(
+        long_mtask_time / ExecGraphTime))
+    print("  min log(p2e) = %0.3f" % min_p2e, end="")
+
+    print("  from mtask %d (predict %d," % (min_mtask, Mtasks[min_mtask]['predict_cost']), end="")
+    print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
+    print("  max log(p2e) = %0.3f" % max_p2e, end="")
+    print("  from mtask %d (predict %d," % (max_mtask, Mtasks[max_mtask]['predict_cost']), end="")
+    print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
+
+    stddev = statistics.pstdev(p2e_ratios)
+    mean = statistics.mean(p2e_ratios)
+    print("  mean = %0.3f" % mean)
+    print("  stddev = %0.3f" % stddev)
+    print("  e ^ stddev = %0.3f" % math.exp(stddev))


 def report_cpus():
-    print("\nCPUs:")
+    print("\nCPU info:")

    Global['cpu_sockets'] = collections.defaultdict(lambda: 0)
    Global['cpu_socket_cores'] = collections.defaultdict(lambda: 0)

-    for cpu in sorted(Global['cpus'].keys()):
-        print("  cpu %d: " % cpu, end='')
-        print("cpu_time=%d" % Global['cpus'][cpu]['cpu_time'], end='')
-
-        socket = None
+    print("   Id | Time spent executing MTask | Socket | Core | Model")
+    print("      | % of elapsed ticks / ticks |        |      |")
+    print("  ====|============================|========|======|======")
+    for cpu in sorted(Cpus):
+        socket = ""
+        core = ""
+        model = ""
        if cpu in Global['cpuinfo']:
            cpuinfo = Global['cpuinfo'][cpu]
            if 'physical_id' in cpuinfo and 'core_id' in cpuinfo:
-                socket = int(cpuinfo['physical_id'])
+                socket = cpuinfo['physical_id']
                Global['cpu_sockets'][socket] += 1
-                print(" socket=%d" % socket, end='')
-
-                core = int(cpuinfo['core_id'])
-                Global['cpu_socket_cores'][str(socket) + "__" + str(core)] += 1
-                print(" core=%d" % core, end='')
+                core = cpuinfo['core_id']
+                Global['cpu_socket_cores'][socket + "__" + core] += 1

            if 'model_name' in cpuinfo:
                model = cpuinfo['model_name']
-                print("  %s" % model, end='')
-        print()
+
+        print("  {:3d} | {:7.2%} / {:16d} | {:>6s} | {:>4s} | {}".format(
+            cpu, Cpus[cpu]['mtask_time'] / ElapsedTime, Cpus[cpu]['mtask_time'], socket, core,
+            model))

    if len(Global['cpu_sockets']) > 1:
        Global['cpu_sockets_warning'] = True
@@ -313,25 +307,72 @@ def report_cpus():
                Global['cpu_socket_cores_warning'] = True


+def report_sections():
+    for thread, section in enumerate(Sections):
+        if section:
+            print(f"\nSection profile for thread {thread}:")
+            report_section(section)
+
+
+def report_section(section):
+    totalTime = collections.defaultdict(lambda: 0)
+    selfTime = collections.defaultdict(lambda: 0)
+
+    sectionTree = [0, {}, 1]  # [selfTime, childTrees, numberOfTimesEntered]
+    prevTime = 0
+    prevStack = ()
+    for time, stack in section:
+        if len(stack) > len(prevStack):
+            scope = sectionTree
+            for item in stack:
+                scope = scope[1].setdefault(item, [0, {}, 0])
+            scope[2] += 1
+        dt = time - prevTime
+        assert dt >= 0
+        scope = sectionTree
+        for item in prevStack:
+            scope = scope[1].setdefault(item, [0, {}, 0])
+        scope[0] += dt
+
+        if prevStack:
+            for name in prevStack:
+                totalTime[name] += dt
+            selfTime[prevStack[-1]] += dt
+        prevTime = time
+        prevStack = stack
+
+    def treeSum(tree):
+        n = tree[0]
+        for subTree in tree[1].values():
+            n += treeSum(subTree)
+        return n
+
+    # Make sure the tree sums to the elapsed time
+    sectionTree[0] += ElapsedTime - treeSum(sectionTree)
+
+    def printTree(prefix, name, entries, tree):
+        print("  {:7.2%} | {:7.2%} | {:8} | {:10.2f} | {}".format(
+            treeSum(tree) / ElapsedTime, tree[0] / ElapsedTime, tree[2], tree[2] / entries,
+            prefix + name))
+        for k in sorted(tree[1], key=lambda _: -treeSum(tree[1][_])):
+            printTree(prefix + "  ", k, tree[2], tree[1][k])
+
+    print(" Total    | Self    | Total    | Relative   | Section")
+    print(" time     | time    | entries  | entries    |  name  ")
+    print("==========|=========|==========|============|========")
+    printTree("", "*TOTAL*", 1, sectionTree)
+
+
 ######################################################################


 def write_vcd(filename):
    print("Writing %s" % filename)
    with open(filename, "w", encoding="utf8") as fh:
-        vcd = {
-            'values':
-            collections.defaultdict(lambda: {}),  # {<time>}{<code>} = value
-            'sigs': {
-                'predicted_threads': {},
-                'measured_threads': {},
-                'cpus': {},
-                'evals': {},
-                'mtasks': {},
-                'Stats': {}
-            }  # {<module>}{<sig}} = code
-        }
-        code = 0
+        # dict of dicts of hierarchy elements/signal name  -> (code, width)
+        scopeSigs = {}
+        # map from time -> code -> value
+        values = collections.defaultdict(lambda: {})

        parallelism = {
            'measured': collections.defaultdict(lambda: 0),
@@ -340,132 +381,137 @@ def write_vcd(filename):
        parallelism['measured'][0] = 0
        parallelism['predicted'][0] = 0

-        # Measured graph
-        for thread in sorted(Threads.keys()):
-            sig = "thread%d_mtask" % thread
-            if sig not in vcd['sigs']['measured_threads']:
-                vcd['sigs']['measured_threads'][sig] = code
-                code += 1
-            mcode = vcd['sigs']['measured_threads'][sig]
+        nextFreeCode = 0

-            for start in sorted(Threads[thread]):
-                mtask = Threads[thread][start]['mtask']
-                end = Threads[thread][start]['end']
-                cpu = Threads[thread][start]['cpu']
-                vcd['values'][start][mcode] = mtask
-                vcd['values'][end][mcode] = None
+        def getCode(width, *names):
+            nonlocal nextFreeCode
+            scope = scopeSigs
+            *path, name = names
+            for item in path:
+                scope = scope.setdefault(item, {})
+            code, oldWidth = scope.setdefault(name, (nextFreeCode, width))
+            assert oldWidth == width
+            if code == nextFreeCode:
+                nextFreeCode += 1
+            return code
+
+        def addValue(code, time, val):
+            if isinstance(val, str):
+                buf = ""
+                for c in val:
+                    buf += bin(ord(c))[2:].rjust(8, "0")
+                val = buf.ljust(LongestVcdStrValueLength * 8, "0")
+            values[time][code] = val
+
+        # Measured graph
+        for thread in sorted(Threads):
+            mcode = getCode(32, 'measured', 't%d_mtask' % thread)
+            for record in Threads[thread]:
+                start = record['start']
+                mtask = record['mtask']
+                end = record['end']
+                cpu = record['cpu']
+                addValue(mcode, start, mtask)
+                addValue(mcode, end, None)
                parallelism['measured'][start] += 1
                parallelism['measured'][end] -= 1

-                sig = "cpu%d_thread" % cpu
-                if sig not in vcd['sigs']['cpus']:
-                    vcd['sigs']['cpus'][sig] = code
-                    code += 1
-                ccode = vcd['sigs']['cpus'][sig]
-                vcd['values'][start][ccode] = thread
-                vcd['values'][end][ccode] = None
+                code = getCode(32, 'measured', 'cpu%d_thread' % cpu)
+                addValue(code, start, thread)
+                addValue(code, end, None)

-                sig = "mtask%d_cpu" % mtask
-                if sig not in vcd['sigs']['mtasks']:
-                    vcd['sigs']['mtasks'][sig] = code
-                    code += 1
-                ccode = vcd['sigs']['mtasks'][sig]
-                vcd['values'][start][ccode] = cpu
-                vcd['values'][end][ccode] = None
+                code = getCode(32, 'measured', 'cpu%d_mtask' % cpu)
+                addValue(code, start, mtask)
+                addValue(code, end, None)

-        # Eval graph
-        vcd['sigs']['evals']["eval"] = code
-        elcode = code
-        code += 1
-        n = 0
-        for eval_start in Evals:
-            eval_end = Evals[eval_start]['end']
-            n += 1
-            vcd['values'][eval_start][elcode] = n
-            vcd['values'][eval_end][elcode] = None
+        tStart = sorted(_['start'] for records in Threads.values() for _ in records)
+        tEnd = sorted(_['end'] for records in Threads.values() for _ in records)

-        # Eval_loop graph
-        vcd['sigs']['evals']["eval_loop"] = code
-        elcode = code
-        code += 1
-        n = 0
-        for eval_start in EvalLoops:
-            eval_end = EvalLoops[eval_start]['end']
-            n += 1
-            vcd['values'][eval_start][elcode] = n
-            vcd['values'][eval_end][elcode] = None
+        # Predicted graph
+        for start, end in ExecGraphIntervals:
+            # Find the earliest MTask start after the start point, and the
+            # latest MTask end before the end point, so we can scale to the
+            # same range
+            start = tStart[bisect.bisect_left(tStart, start)]
+            end = tEnd[bisect.bisect_right(tEnd, end) - 1]
+            # Compute scale so predicted graph is of same width as interval
+            measured_scaling = (end - start) / Global['predict_last_end']
+            # Predict mtasks that fill the time the execution occupied
+            for mtask in Mtasks:
+                thread = Mtasks[mtask]['thread']
+                pred_scaled_start = start + int(Mtasks[mtask]['predict_start'] * measured_scaling)
+                pred_scaled_end = start + int(
+                    (Mtasks[mtask]['predict_start'] + Mtasks[mtask]['predict_cost']) *
+                    measured_scaling)
+                if pred_scaled_start == pred_scaled_end:
+                    continue

-        if Mtasks:
-            # Predicted graph
-            for eval_start in EvalLoops:
-                eval_end = EvalLoops[eval_start]['end']
-                # Compute scale so predicted graph is of same width as eval
-                measured_scaling = (eval_end -
-                                    eval_start) / Global['predict_last_end']
-                # Predict mtasks that fill the time the eval occupied
-                for mtask in Mtasks:
-                    thread = Mtasks[mtask]['thread']
-                    pred_scaled_start = eval_start + int(
-                        Mtasks[mtask]['predict_start'] * measured_scaling)
-                    pred_scaled_end = eval_start + int(
-                        (Mtasks[mtask]['predict_start'] +
-                         Mtasks[mtask]['predict_cost']) * measured_scaling)
-                    if pred_scaled_start == pred_scaled_end:
-                        continue
+                mcode = getCode(32, 'predicted', 't%d_mtask' % thread)
+                addValue(mcode, pred_scaled_start, mtask)
+                addValue(mcode, pred_scaled_end, None)

-                    sig = "predicted_thread%d_mtask" % thread
-                    if sig not in vcd['sigs']['predicted_threads']:
-                        vcd['sigs']['predicted_threads'][sig] = code
-                        code += 1
-                    mcode = vcd['sigs']['predicted_threads'][sig]
+                parallelism['predicted'][pred_scaled_start] += 1
+                parallelism['predicted'][pred_scaled_end] -= 1

-                    vcd['values'][pred_scaled_start][mcode] = mtask
-                    vcd['values'][pred_scaled_end][mcode] = None
+        # Parallelism graph
+        for measpred in ('measured', 'predicted'):
+            pcode = getCode(32, 'stats', '%s_parallelism' % measpred)
+            value = 0
+            for time in sorted(parallelism[measpred].keys()):
+                value += parallelism[measpred][time]
+                addValue(pcode, time, value)

-                    parallelism['predicted'][pred_scaled_start] += 1
-                    parallelism['predicted'][pred_scaled_end] -= 1
-
-            # Parallelism graph
-            for measpred in ('measured', 'predicted'):
-                vcd['sigs']['Stats']["%s_parallelism" % measpred] = code
-                pcode = code
-                code += 1
-                value = 0
-                for time in sorted(parallelism[measpred].keys()):
-                    value += parallelism[measpred][time]
-                    vcd['values'][time][pcode] = value
+        # Section graph
+        for thread, section in enumerate(Sections):
+            if section:
+                scode = getCode(LongestVcdStrValueLength * 8, "section", f"t{thread}_trace")
+                dcode = getCode(32, "section", f"t{thread}_depth")
+                for time, stack in section:
+                    addValue(scode, time, stack[-1] if stack else None)
+                    addValue(dcode, time, len(stack))

        # Create output file
        fh.write("$version Generated by verilator_gantt $end\n")
        fh.write("$timescale 1ns $end\n")
        fh.write("\n")

-        all_codes = {}
+        all_codes = set()
+
+        def writeScope(scope):
+            assert isinstance(scope, dict)
+            for key in sorted(scope):
+                val = scope[key]
+                if isinstance(val, dict):
+                    fh.write("  $scope module %s $end\n" % key)
+                    writeScope(val)
+                    fh.write("  $upscope $end\n")
+                else:
+                    (code, width) = val
+                    all_codes.add(code)
+                    fh.write("   $var wire %d v%x %s [%d:0] $end\n" %
+                             (width, code, key, width - 1))
+
        fh.write(" $scope module gantt $end\n")
-        for module in sorted(vcd['sigs'].keys()):
-            fh.write("  $scope module %s $end\n" % module)
-            for sig in sorted(vcd['sigs'][module].keys()):
-                code = vcd['sigs'][module][sig]
-                fh.write("   $var wire 32 v%x %s [31:0] $end\n" % (code, sig))
-                all_codes[code] = 1
-            fh.write("  $upscope $end\n")
+        writeScope(scopeSigs)
        fh.write(" $upscope $end\n")
        fh.write("$enddefinitions $end\n")
        fh.write("\n")

        first = True
-        for time in sorted(vcd['values']):
+        for time in sorted(values):
            if first:
                first = False
                # Start with Z for any signals without time zero data
-                for code in sorted(all_codes.keys()):
-                    if code not in vcd['values'][time]:
-                        vcd['values'][time][code] = None
+                for code in sorted(all_codes):
+                    if code not in values[time]:
+                        addValue(code, time, None)
            fh.write("#%d\n" % time)
-            for code in sorted(vcd['values'][time].keys()):
-                value = vcd['values'][time][code]
+            for code in sorted(values[time]):
+                value = values[time][code]
                if value is None:
                    fh.write("bz v%x\n" % code)
+                elif isinstance(value, str):
+                    fh.write("b%s v%x\n" % (value, code))
                else:
                    fh.write("b%s v%x\n" % (format(value, 'b'), code))

@@ -475,7 +521,7 @@ def write_vcd(filename):
 parser = argparse.ArgumentParser(
    allow_abbrev=False,
    formatter_class=argparse.RawDescriptionHelpFormatter,
-    description="""Create Gantt chart of multi-threaded execution.
+    description="""Create Gantt chart of Verilator multi-threaded execution

 Verilator_gantt creates a visual representation to help analyze Verilator
 #xmultithreaded simulation performance, by showing when each macro-task
@@ -483,8 +529,7 @@ Verilator_gantt creates a visual representation to help analyze Verilator

 For documentation see
 https://verilator.org/guide/latest/exe_verilator_gantt.html""",
-    epilog=
-    """Copyright 2018-2023 by Wilson Snyder. This program is free software; you
+    epilog="""Copyright 2018-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
@@ -492,19 +537,16 @@ Version 2.0.
 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")

 parser.add_argument('--debug', action='store_true', help='enable debug')
-parser.add_argument('--no-vcd',
-                    help='disable creating vcd',
-                    action='store_true')
-parser.add_argument('--vcd',
-                    help='filename for vcd outpue',
-                    default='profile_exec.vcd')
+parser.add_argument('--no-vcd', help='disable creating vcd', action='store_true')
+parser.add_argument('--vcd', help='filename for vcd outpue', default='profile_exec.vcd')
 parser.add_argument('filename',
                    help='input profile_exec.dat filename to process',
                    default='profile_exec.dat')

 Args = parser.parse_args()

-process(Args.filename)
+read_data(Args.filename)
+report()
 if not Args.no_vcd:
    write_vcd(Args.vcd)

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 # pylint: disable=C0114,C0209
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify the Verilator internals under the terms
 # of either the GNU Lesser General Public License Version 3 or the Perl
 # Artistic License Version 2.0.
@@ -34,9 +34,8 @@ def profcfunc(filename):

            # Older gprofs have no call column for single-call functions
            #                  %time      cumesec   selfsec      {stuff}   name
-            match = re.match(
-                r'^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$',
-                line)
+            match = re.match(r'^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$',
+                             line)
            if match:
                pct = float(match.group(1))
                sec = float(match.group(2))
@@ -136,19 +135,15 @@ def profcfunc(filename):

    design_width = 1
    for func, func_item in vfuncs.items():
-        if design_width < len(func_item['design']):
-            design_width = len(func_item['design'])
+        design_width = max(design_width, len(func_item['design']))

    print("Verilog code profile:")
    print("   These are split into three categories:")
    print("      C++:     Time in non-Verilated C++ code")
    print("      Prof:    Time in profile overhead")
-    print("      VBlock:  Time attributable to a block in a" +
-          " Verilog file and line")
-    print("      VCommon: Time in a Verilated module," +
-          " due to all parts of the design")
-    print("      VLib:    Time in Verilated common libraries," +
-          " called by the Verilated code")
+    print("      VBlock:  Time attributable to a block in a" + " Verilog file and line")
+    print("      VCommon: Time in a Verilated module," + " due to all parts of the design")
+    print("      VLib:    Time in Verilated common libraries," + " called by the Verilated code")
    print()

    print("  %   cumulative   self              ")
@@ -156,13 +151,11 @@ def profcfunc(filename):
           "s  type      filename and line number") % "design")

    cume = 0
-    for func in sorted(vfuncs.keys(),
-                       key=lambda f: vfuncs[f]['sec'],
-                       reverse=True):
+    for func in sorted(vfuncs.keys(), key=lambda f: vfuncs[f]['sec'], reverse=True):
        cume += vfuncs[func]['sec']
        print(("%6.2f %9.2f %8.2f %10d   %-" + str(design_width) + "s  %s") %
-              (vfuncs[func]['pct'], cume, vfuncs[func]['sec'],
-               vfuncs[func]['calls'], vfuncs[func]['design'], func))
+              (vfuncs[func]['pct'], cume, vfuncs[func]['sec'], vfuncs[func]['calls'],
+               vfuncs[func]['design'], func))


 ######################################################################
@@ -171,7 +164,7 @@ def profcfunc(filename):
 parser = argparse.ArgumentParser(
    allow_abbrev=False,
    formatter_class=argparse.RawDescriptionHelpFormatter,
-    description="""Read gprof report created with --prof-cfuncs.
+    description="""Read gprof report created with Verilator --prof-cfuncs

 Verilator_profcfunc reads a profile report created by gprof.  The names of
 the functions are then transformed, assuming the user used Verilator's
@@ -180,18 +173,14 @@ in each Verilog block.

 For documentation see
 https://verilator.org/guide/latest/exe_verilator_profcfunc.html""",
-    epilog=
-    """Copyright 2002-2023 by Wilson Snyder. This program is free software; you
+    epilog="""Copyright 2002-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")

-parser.add_argument('--debug',
-                    action='store_const',
-                    const=9,
-                    help='enable debug')
+parser.add_argument('--debug', action='store_const', const=9, help='enable debug')
 parser.add_argument('filename', help='input gprof output to process')

 Args = parser.parse_args()
@@ -26,4 +26,5 @@ if git log --format=%B -n 1 "$COMMIT" | grep -q -i '\[CI\s\+ccache\s\+clear\]';
 fi

 # Dump stats, then zero stats
+# 22.04: ccache -s -v -z
 ccache -s -z
@@ -27,12 +27,6 @@ fatal() {
  echo "ERROR: $(basename "$0"): $1" >&2; exit 1;
 }

-if [ "$CI_M32" = "0" ]; then
-  unset CI_M32
-elif [ "$CI_M32" != "1" ]; then
-  fatal "\$CI_M32 must be '0' or '1'";
-fi
-
 if [ "$CI_OS_NAME" = "linux" ]; then
  MAKE=make
 elif [ "$CI_OS_NAME" = "osx" ]; then
@@ -61,21 +55,18 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
    sudo apt-get update
    sudo apt-get install ccache help2man libfl-dev ||
    sudo apt-get install ccache help2man libfl-dev
-    if [ "$CI_RUNS_ON" != "ubuntu-22.04" ]; then
+    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ]; then
      # Some conflict of libunwind verison on 22.04, can live without it for now
      sudo apt-get install libgoogle-perftools-dev ||
      sudo apt-get install libgoogle-perftools-dev
    fi
-    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ] || [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
+    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ] || [ "$CI_RUNS_ON" = "ubuntu-22.04" ] || [ "$CI_RUNS_ON" = "ubuntu-24.04" ]; then
      sudo apt-get install libsystemc libsystemc-dev ||
      sudo apt-get install libsystemc libsystemc-dev
    fi
-    if [ "$COVERAGE" = 1 ]; then
-      yes yes | sudo cpan -fi Parallel::Forker
-    fi
-    if [ "$CI_M32" = 1 ]; then
-      sudo apt-get install gcc-multilib g++-multilib ||
-      sudo apt-get install gcc-multilib g++-multilib
+    if [ "$CI_RUNS_ON" = "ubuntu-22.04" ] || [ "$CI_RUNS_ON" = "ubuntu-24.04" ]; then
+      sudo apt-get install bear mold ||
+      sudo apt-get install bear mold
    fi
  elif [ "$CI_OS_NAME" = "osx" ]; then
    brew update
@@ -98,38 +89,31 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
    sudo apt-get update ||
    sudo apt-get update
    # libfl-dev needed for internal coverage's test runs
-    sudo apt-get install gdb gtkwave lcov libfl-dev ccache ||
-    sudo apt-get install gdb gtkwave lcov libfl-dev ccache
-    # Required for test_regress/t/t_dist_attributes.pl
-    if [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
-      sudo apt-get install libclang-dev ||
-      sudo apt-get install libclang-dev
-      pip3 install clang==14.0
+    sudo apt-get install gdb gtkwave lcov libfl-dev ccache jq z3 ||
+    sudo apt-get install gdb gtkwave lcov libfl-dev ccache jq z3
+    # Required for test_regress/t/t_dist_attributes.py
+    if [ "$CI_RUNS_ON" = "ubuntu-22.04" ] || [ "$CI_RUNS_ON" = "ubuntu-24.04" ]; then
+      sudo apt-get install python3-clang mold ||
+      sudo apt-get install python3-clang mold
    fi
-    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ] || [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
+    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ] || [ "$CI_RUNS_ON" = "ubuntu-22.04" ] || [ "$CI_RUNS_ON" = "ubuntu-24.04" ]; then
      sudo apt-get install libsystemc-dev ||
      sudo apt-get install libsystemc-dev
    fi
-    if [ "$CI_M32" = 1 ]; then
-      sudo apt-get install lib32z1-dev gcc-multilib g++-multilib ||
-      sudo apt-get install lib32z1-dev gcc-multilib g++-multilib
-    fi
  elif [ "$CI_OS_NAME" = "osx" ]; then
    brew update
    # brew cask install gtkwave # fst2vcd hangs at launch, so don't bother
-    brew install ccache perl
+    brew install ccache perl jq z3
  elif [ "$CI_OS_NAME" = "freebsd" ]; then
    # fst2vcd fails with "Could not open '<input file>', exiting."
-    sudo pkg install -y ccache gmake perl5 python3
+    sudo pkg install -y ccache gmake perl5 python3 jq z3
  else
    fatal "Unknown os: '$CI_OS_NAME'"
  fi
  # Common installs
-  if [ "$CI_RUNS_ON" != "ubuntu-14.04" ]; then
-    CI_CPAN_REPO=https://cpan.org
-  fi
-  yes yes | sudo cpan -M $CI_CPAN_REPO -fi Parallel::Forker
  install-vcddiff
+  # Workaround -fsanitize=address crash
+  sudo sysctl -w vm.mmap_rnd_bits=28
 else
  ##############################################################################
  # Unknown build stage
@@ -21,12 +21,6 @@ fatal() {
  echo "ERROR: $(basename "$0"): $1" >&2; exit 1;
 }

-if [ "$CI_M32" = "0" ]; then
-  unset CI_M32
-elif [ "$CI_M32" != "1" ]; then
-  fatal "\$CI_M32 must be '0' or '1'";
-fi
-
 if [ "$CI_OS_NAME" = "linux" ]; then
  export MAKE=make
  NPROC=$(nproc)
@@ -39,6 +33,7 @@ elif [ "$CI_OS_NAME" = "freebsd" ]; then
 else
  fatal "Unknown os: '$CI_OS_NAME'"
 fi
+NPROC=$(expr $NPROC '+' 1)

 if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
  ##############################################################################
@@ -46,9 +41,10 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then

  if [ "$COVERAGE" != 1 ]; then
    autoconf
-    ./configure --enable-longtests --enable-ccwarn ${CI_M32:+--enable-m32}
+    ./configure --enable-longtests --enable-ccwarn --prefix="$INSTALL_DIR"
    ccache -z
    "$MAKE" -j "$NPROC" -k
+    # 22.04: ccache -s -v
    ccache -s
    if [ "$CI_OS_NAME" = "osx" ]; then
      file bin/verilator_bin
@@ -66,6 +62,7 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
  # Run tests

  export VERILATOR_TEST_NO_CONTRIBUTORS=1  # Separate workflow check
+  export VERILATOR_TEST_NO_LINT_PY=1  # Separate workflow check

  if [ "$CI_OS_NAME" = "osx" ]; then
    export VERILATOR_TEST_NO_GDB=1  # Pain to get GDB to work on OS X
@@ -89,26 +86,43 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
    export VERILATOR_TEST_NO_GPROF=1 # gprof is a bit different on FreeBSD, disable
  fi

-  # Run sanitize on Ubuntu 20.04 only
-  [ "$CI_RUNS_ON" = 'ubuntu-20.04' ] && [ "$CI_M32" = "" ] && sanitize='--sanitize' || sanitize=''
+  # Run sanitize on Ubuntu 22.04 only
+  ( [ "$CI_RUNS_ON" = 'ubuntu-22.04' ] || [ "$CI_RUNS_ON" = 'ubuntu-24.04' ] ) && sanitize='--sanitize' || sanitize=''
+
+  TEST_REGRESS=test_regress
+  if [ "$CI_RELOC" == 1 ]; then
+     # Testing that the installation is relocatable.
+     "$MAKE" install
+     mkdir -p "$RELOC_DIR"
+     mv "$INSTALL_DIR" "$RELOC_DIR/relocated-install"
+     export VERILATOR_ROOT="$RELOC_DIR/relocated-install/share/verilator"
+     TEST_REGRESS="$RELOC_DIR/test_regress"
+     mv test_regress "$TEST_REGRESS"
+     # Feeling brave?
+     find . -delete
+     ls -la .
+  fi

  # Run the specified test
  ccache -z
  case $TESTS in
    dist-vlt-0)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=0/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=0/4
      ;;
    dist-vlt-1)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=1/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=1/4
      ;;
    dist-vlt-2)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=2/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=2/4
+      ;;
+    dist-vlt-3)
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=3/4
      ;;
    vltmt-0)
-      "$MAKE" -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=0/2
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=0/2
      ;;
    vltmt-1)
-      "$MAKE" -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=1/2
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=1/2
      ;;
    coverage-all)
      nodist/code_coverage --stages 1-
@@ -180,12 +194,12 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
      fatal "Unknown test: $TESTS"
      ;;
  esac
+
+  # To see load average (1 minute, 5 minute, 15 minute)
+  uptime
+  # 22.04: ccache -s -v
  ccache -s

-  # Upload coverage data
-  if [[ $TESTS == coverage-* ]]; then
-    bash <(cat ci/coverage-upload.sh) -f nodist/obj_dir/coverage/app_total.info
-  fi
 else
  ##############################################################################
  # Unknown build stage
@@ -1,15 +1,28 @@
+# DESCRIPTION: Verilator: CI Windows Power Shell - Compile Verilator
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+################################################################################
+
+Set-PSDebug -Trace 1
+
 if (-Not (Test-Path $PWD/../.ccache/win_bison.exe)) {
-	git clone --depth 1 https://github.com/lexxmark/winflexbison
-	cd winflexbison
-	mkdir build
-	cd build
-	cmake .. --install-prefix $PWD/../../../.ccache
-	cmake --build . --config Release
-	cmake --install . --prefix $PWD/../../../.ccache
-	cd ../..
+    git clone --depth 1 https://github.com/lexxmark/winflexbison
+    cd winflexbison
+    mkdir build
+    cd build
+    cmake .. --install-prefix $PWD/../../../.ccache
+    cmake --build . --config Release -j 3
+    cmake --install . --prefix $PWD/../../../.ccache
+    cd ../..
 }
+
 mkdir build
 cd build
 cmake .. --install-prefix $PWD/../install
-cmake --build . --config Release
+cmake --build . --config Release -j 3
 cmake --install . --prefix $PWD/../install
@@ -1,10 +1,26 @@
+# DESCRIPTION: Verilator: CI Windows Power Shell - Verilate a test
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+################################################################################
+
+
+Set-PSDebug -Trace 1
+
 cd install
 $Env:VERILATOR_ROOT=$PWD
 cd examples/cmake_tracing_c
 mkdir build
 cd build
 cmake ..
-cmake --build . --config Release
-Release/example.exe
+cmake --build . --config Release -j 3
+
+# TODO put this back in, see issue# 5163
+# Release/example.exe
+
 cd ..
 Remove-Item -path build -recurse
@@ -8,6 +8,16 @@

 FROM ubuntu:22.04

+# Create the user
+RUN groupadd verilator \
+    && useradd -g verilator -m verilator -s /bin/bash \
+    && apt-get update \
+    && apt-get install --no-install-recommends -y sudo \
+    && apt-get clean \
+    && rm -rf /var/lib/apt/lists/* \
+    && echo verilator ALL=\(root\) NOPASSWD:ALL > /etc/sudoers.d/verilator \
+    && chmod 0440 /etc/sudoers.d/verilator
+
 RUN apt-get update \
    && DEBIAN_FRONTEND=noninteractive \
       apt-get install --no-install-recommends -y \
@@ -33,7 +43,7 @@ RUN apt-get update \
                        perl \
                        python3 \
                        wget \
-                        zlibc \
+                        z3 \
                        zlib1g \
                        zlib1g-dev \
    && apt-get clean \
@@ -41,8 +51,6 @@ RUN apt-get update \

 WORKDIR /tmp

-RUN cpan install -fi Parallel::Forker
-
 RUN git clone https://github.com/veripool/vcddiff.git && \
    make -C vcddiff && \
    cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \
@@ -52,6 +60,8 @@ COPY build.sh /tmp/build.sh

 ENV VERILATOR_AUTHOR_SITE=1

+USER verilator
+
 WORKDIR /work

 ENTRYPOINT [ "/tmp/build.sh" ]
@@ -1,6 +1,8 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

+.. _Verilator Build Docker Container:
+
 Verilator Build Docker Container
 ================================

@@ -19,10 +19,16 @@ RUN apt-get update \
                        ccache \
                        flex \
                        git \
+                        help2man \
+                        libfl2 \
                        libfl-dev \
                        libgoogle-perftools-dev \
+                        numactl \
                        perl \
+                        perl-doc \
                        python3 \
+                        zlib1g \
+                        zlib1g-dev \
    && apt-get clean \
    && rm -rf /var/lib/apt/lists/*

@@ -39,7 +45,7 @@ RUN git clone "${REPO}" verilator && \
    git checkout "${SOURCE_COMMIT}" && \
    autoconf && \
    ./configure && \
-    make -j "$(nproc)" && \
+    make && \
    make install && \
    cd .. && \
    rm -r verilator
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 Verilator Executable Docker Container
@@ -11,10 +11,11 @@ easily as a docker image, e.g.:

   docker run -ti verilator/verilator:latest --version

-This will install the container, run the latest Verilator and print
+This will pull the container from `docker hub
+<https://hub.docker.com/r/verilator/verilator>`_, run the latest Verilator and print
 Verilator's version.

-Containers are automatically built for all released versions, so you may
+Containers are automatically built and pushed to docker hub for all released versions, so you may
 easily compare results across versions, e.g.:

 ::
@@ -1,6 +1,7 @@
+---
 # DESCRIPTION: codecov.io config
 #
-# Copyright 2020-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2020-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -8,31 +9,28 @@
 ####################
 # Validate:
 #  curl --data-binary @codecov.yml https://codecov.io/validate
-
+#
 codecov:
-  require_ci_to_pass: no
-
+  require_ci_to_pass: false
 coverage:
  precision: 2
  round: down
-  range: "50...100"
+  range: 50...100
  ignore:
-    - "ci"
-    - "docs"
-    - "examples"
-    - "include/gtkwave"
-    - "include/vltstd"
-    - "test_regress"
-
+    - "ci"  #
+    - "docs"  #
+    - "examples"  #
+    - "include/gtkwave"  #
+    - "include/vltstd"  #
+    - "test_regress"  #
 parsers:
  gcov:
    branch_detection:
-      conditional: yes
-      loop: yes
-      method: no
-      macro: no
-
+      conditional: true
+      loop: true
+      method: false
+      macro: false
 comment:
  layout: "reach,diff,flags,tree"
  behavior: default
-  require_changes: yes
+  require_changes: true
@@ -1,20 +1,20 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2023 by Wilson Snyder. Verilator is free software; you
+# Copyright 2003-2025 by Wilson Snyder. Verilator is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

-# When releasing, also update header of Changes file
+# When releasing, also update header of Changes file, and CMakeLists.txt,
 # and commit using "devel release" or "Version bump" message
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.006 2023-01-22],
+AC_INIT([Verilator],[5.034 2025-02-24],
        [https://verilator.org],
        [verilator],[https://verilator.org])

-AC_CONFIG_HEADERS(src/config_build.h)
+AC_CONFIG_HEADERS(src/config_package.h)
 AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc verilator-config.cmake verilator-config-version.cmake)

 # Version
@@ -24,6 +24,13 @@ AC_SUBST(PACKAGE_VERSION_NUMBER)
 AC_DEFINE_UNQUOTED([PACKAGE_VERSION_NUMBER_STRING],["$PACKAGE_VERSION_NUMBER"],[Package version as a number])
 VERILATOR_VERSION_INTEGER=`AS_ECHO("$PACKAGE_VERSION") | [sed 's/\([0-9]\)\.\([0-9][0-9][0-9]\) .*/\1\2000/g']`
 AC_SUBST(VERILATOR_VERSION_INTEGER)
+AC_DEFINE_UNQUOTED([PACKAGE_VERSION_STRING_CHAR],
+        [static const char* const PACKAGE_STRING_UNUSED = "$PACKAGE_STRING";],
+        [Package version as a number])
+AC_SUBST(PACKAGE_VERSION_STRING_CHAR)
+
+######################################################################
+## Arguments/flag checking

 # Ignore automake flags passed by Ubuntu builds
 AC_ARG_ENABLE([dependency-tracking],
@@ -63,20 +70,6 @@ AC_ARG_ENABLE([tcmalloc],
              [CFG_WITH_TCMALLOC=check;])
 AC_MSG_RESULT($CFG_WITH_TCMALLOC)

-# Flag to enable -m32 build
-AC_MSG_CHECKING(whether to use -m32)
-AC_ARG_ENABLE([m32],
-              [AS_HELP_STRING([--enable-m32],
-                              [Use -m32 for all compilation and link,
-                               including Verialtor and generated models.])],
-              [case "${enableval}" in
-                yes) CFG_ENABLE_M32=yes ;;
-                no)  CFG_ENABLE_M32=no ;;
-                *)   AC_MSG_ERROR([bad value '${enableval}' for --enable-m32]) ;;
-               esac],
-               CFG_ENABLE_M32=no)
-AC_MSG_RESULT($CFG_ENABLE_M32)
-
 # Flag to enable coverage build
 AC_MSG_CHECKING(whether to build for coverage collection)
 AC_ARG_ENABLE([coverage],
@@ -144,6 +137,33 @@ AC_ARG_ENABLE([longtests],
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)

+AC_CHECK_PROG(HAVE_Z3,z3,yes)
+AC_CHECK_PROG(HAVE_CVC5,cvc5,yes)
+AC_CHECK_PROG(HAVE_CVC4,cvc4,yes)
+
+# Special Substitutions - CFG_WITH_SOLVER
+AC_MSG_CHECKING(for SMT solver)
+AC_ARG_WITH([solver],
+              [AS_HELP_STRING([--with-solver='z3 --in'],
+                              [set default SMT solver for constrained randomization])],
+              [CFG_WITH_SOLVER="${withval}"],
+              [CFG_WITH_SOLVER=no
+               if test "x$HAVE_Z3" = "xyes"; then
+                CFG_WITH_SOLVER="z3 --in"
+               elif test "x$HAVE_CVC5" = "xyes"; then
+                CFG_WITH_SOLVER="cvc5 --incremental"
+               elif test "x$HAVE_CVC4" = "xyes"; then
+                CFG_WITH_SOLVER="cvc4 --lang=smt2 --incremental"
+               fi]
+              )
+AC_SUBST(CFG_WITH_SOLVER)
+AC_MSG_RESULT($CFG_WITH_SOLVER)
+
+######################################################################
+## Compiler checks
+
+AC_MSG_RESULT([compiler CXX inbound is set to... $CXX])
+
 # Compiler flags (ensure they are not empty to avoid configure defaults)
 CFLAGS="$CFLAGS "
 CPPFLAGS="$CPPFLAGS "
@@ -156,8 +176,10 @@ AC_PROG_CXX
 AC_PROG_INSTALL

 AC_LANG_PUSH(C++)
-cxx_version=$($CXX --version | head -1)
-AC_MSG_RESULT([compiler is $CXX --version = $cxx_version])
+CFG_CXX_VERSION=`$CXX --version | head -1`
+AC_MSG_RESULT([compiler $CXX --version = $CFG_CXX_VERSION])
+AC_SUBST(CFG_CXX_VERSION)
+
 AC_MSG_CHECKING([that C++ compiler can compile simple program])
 AC_RUN_IFELSE(
   [AC_LANG_SOURCE([int main() { return 0; }])],
@@ -170,24 +192,26 @@ if test "x$AR" = "x" ; then
   AC_MSG_ERROR([Cannot find "ar" in your PATH, please install it])
 fi

-AC_PATH_PROG(PERL,perl)
+AC_CHECK_PROG(PERL,perl,perl)
 if test "x$PERL" = "x" ; then
   AC_MSG_ERROR([Cannot find "perl" in your PATH, please install it])
 fi

-AC_PATH_PROG(PYTHON3,python3)
+AC_CHECK_PROG(PYTHON3,python3,python3)
 if test "x$PYTHON3" = "x" ; then
   AC_MSG_ERROR([Cannot find "python3" in your PATH, please install it])
 fi
+python3_version=$($PYTHON3 --version | head -1)
+AC_MSG_RESULT([$PYTHON3 --version = $python3_version])

-AC_PATH_PROG(LEX,flex)
+AC_CHECK_PROG(LEX,flex,flex)
 if test "x$LEX" = "x" ; then
   AC_MSG_ERROR([Cannot find "flex" in your PATH, please install it])
 fi
 flex_version=$($LEX --version | head -1)
 AC_MSG_RESULT([$LEX --version = $flex_version])

-AC_PATH_PROG(YACC,bison)
+AC_CHECK_PROG(YACC,bison,bison)
 if test "x$YACC" = "x" ; then
   AC_MSG_ERROR([Cannot find "bison" in your PATH, please install it])
 fi
@@ -276,6 +300,43 @@ AC_DEFUN([_MY_CXX_CHECK_OPT],
    _MY_CXX_CHECK_IFELSE($2, $1="$$1 $2")
   ])

+AC_DEFUN([_MY_CXX_CHECK_CORO_SET],
+   [# _MY_CXX_CHECK_CORO_SET(variable,option)
+    # Check if compiler supports coroutines with specific option. If it does,
+    # set variable to option, only if not previously set.
+    # Define HAVE_COROUTINES if supported.
+    if test "$$1" = ""; then
+      if test "$2" != ""; then
+        _my_msg_opt=" with $2"
+      else
+        _my_msg_opt=""
+      fi
+      AC_MSG_CHECKING([whether coroutines are supported by $CXX$_my_msg_opt])
+      ACO_SAVE_CXXFLAGS="$CXXFLAGS"
+      CXXFLAGS="$CXXFLAGS $2"
+      AC_LINK_IFELSE(
+         [AC_LANG_PROGRAM([
+            #if defined(__clang__) && !defined(__cpp_impl_coroutine)
+            #define __cpp_impl_coroutine 1
+            #endif
+            #include <coroutine>
+          ],[[std::coroutine_handle<> h;]])],
+         [_my_result=yes],
+         [AC_LINK_IFELSE(
+             [AC_LANG_PROGRAM(
+                [#include <experimental/coroutine>],
+                [[std::experimental::coroutine_handle<> h;]])],
+             [_my_result=yes],
+             [_my_result=no])])
+      AC_MSG_RESULT($_my_result)
+      CXXFLAGS="$ACO_SAVE_CXXFLAGS"
+      if test "$_my_result" = "yes" ; then
+        $1="$2"
+        AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])
+      fi
+    fi
+  ])
+
 AC_DEFUN([_MY_LDLIBS_CHECK_FLAG],
   [# _MY_LDLIBS_CHECK_FLAG(flag) -- Check if linker supports specific options
    # Set $_my_result appropriately
@@ -315,15 +376,7 @@ AC_DEFUN([_MY_LDLIBS_CHECK_OPT],
    _MY_LDLIBS_CHECK_IFELSE($2, $1="$$1 $2")
   ])

-# When using -m32. Check this first as later checks may fail with the -m32 flag.
-if test "$CFG_ENABLE_M32" = "yes"; then
-  _MY_CXX_CHECK_IFELSE(
-    -m32,
-    [CXX="$CXX -m32"],
-    [AC_MSG_ERROR([--enable-m32 was given but compiler does not support -m32])])
-fi
-
-# Similarly, add the coverage flags early as they influence later checks.
+# Add the coverage flags early as they influence later checks.
 if test "$CFG_ENABLE_COVERAGE" = "yes"; then
  _MY_CXX_CHECK_OPT(CXX,--coverage)
  # Otherwise inline may not show as uncovered
@@ -350,7 +403,7 @@ AC_SUBST(CFG_CXXFLAGS_PROFILE)
 # Macros work such that first option that passes is the one we take
 # Currently enable c++17/c++14 due to packaged SystemC dependency
 # c++17 is the newest that Verilator is regularly tested to support
-# c++11 is the oldest that Verilator supports
+# c++14 is the oldest that Verilator supports
 # gnu is required for Cygwin to compile verilated.h successfully
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
@@ -358,8 +411,6 @@ _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++14)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++11)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++11)
 AC_SUBST(CFG_CXXFLAGS_STD_NEWEST)

 # Flags for compiling Verilator internals including parser, and Verilated files
@@ -371,33 +422,12 @@ _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wthread-safety)
 AC_SUBST(CFG_CXXFLAGS_WEXTRA)

 # Flags for coroutine support for dynamic scheduling
-_MY_CXX_CHECK_IFELSE(
-  -fcoroutines-ts,
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines-ts"],
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines"])
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES, "")
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts)
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines)
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts -Wno-deprecated-experimental-coroutine)
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-std=gnu++20)
 AC_SUBST(CFG_CXXFLAGS_COROUTINES)
-
-# HAVE_COROUTINES
-# Check if coroutines are supported at all
-AC_MSG_CHECKING([whether coroutines are supported by $CXX])
-ACO_SAVE_CXXFLAGS="$CXXFLAGS"
-CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_COROUTINES"
-AC_LINK_IFELSE(
-    [AC_LANG_PROGRAM([
-#ifdef __clang__
-#define __cpp_impl_coroutine 1
-#endif
-#include <coroutine>
-    ],[[]])],
-    [_my_result=yes
-     AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])],
-    [AC_LINK_IFELSE(
-        [AC_LANG_PROGRAM([#include <experimental/coroutine>],[[]])],
-        [_my_result=yes
-         AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])],
-        [_my_result=no])])
-AC_MSG_RESULT($_my_result)
-CXXFLAGS="$ACO_SAVE_CXXFLAGS"
 AC_SUBST(HAVE_COROUTINES)

 # Flags for compiling Verilator internals including parser always
@@ -442,14 +472,20 @@ m4_foreach([cflag],[
        [-mno-cet],
        [-Qunused-arguments],
        [-Wno-bool-operation],
-        [-Wno-tautological-bitwise-compare],
+        [-Wno-c++11-narrowing],
+        [-Wno-constant-logical-operand],
+        [-Wno-non-pod-varargs],
        [-Wno-parentheses-equality],
+        [-Wno-shadow],
        [-Wno-sign-compare],
+        [-Wno-subobject-linkage],
+        [-Wno-tautological-bitwise-compare],
+        [-Wno-tautological-compare],
        [-Wno-uninitialized],
+        [-Wno-unused-but-set-parameter],
        [-Wno-unused-but-set-variable],
        [-Wno-unused-parameter],
-        [-Wno-unused-variable],
-        [-Wno-shadow]],[
+        [-Wno-unused-variable]],[
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
    # CMake will test what flags work itself, so pass all flags through to it
    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
@@ -470,6 +506,10 @@ m4_foreach([ldflag], [
 AC_SUBST(CFG_LDLIBS_THREADS)
 AC_SUBST(CFG_LDFLAGS_THREADS_CMAKE)

+# If 'mold' is installed, use it to link for faster buildtimes
+_MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -fuse-ld=mold)
+_MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_VERILATED, -fuse-ld=mold)
+
 # When linking partially statically
 if test "$CFG_ENABLE_PARTIAL_STATIC" = "yes"; then
  _MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -static-libgcc)
@@ -480,12 +520,14 @@ else
  LTCMALLOC=-ltcmalloc_minimal
 fi
 AC_SUBST(CFG_LDFLAGS_SRC)
+AC_SUBST(CFG_LDFLAGS_VERILATED)

 # The pthread library is required by tcmalloc, so add it if it exists. If it
 # does not, the tcmalloc check below will fail anyway, and linking against
 # pthreads is harmless otherwise.
 CFG_LIBS="$LIBS $CFG_LIBS"
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lpthread)
+_MY_LDLIBS_CHECK_OPT(CFG_LIBS, -latomic)

 # Check libraries for MingW
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lbcrypt)
@@ -497,7 +539,7 @@ _MY_LDLIBS_CHECK_IFELSE(
  [if test "$CFG_WITH_TCMALLOC" != "no"; then
    CFG_LIBS="$LTCMALLOC $CFG_LIBS";
    # If using tcmalloc, add some extra options to make the compiler not assume
-    # it is using it's own versions of the standard library functions
+    # it is using its own versions of the standard library functions
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-malloc)
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-calloc)
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-realloc)
@@ -508,14 +550,14 @@ _MY_LDLIBS_CHECK_IFELSE(
   fi])
 AC_SUBST(CFG_LIBS)

-# Need C++11 at least
-#Alternative: AX_CXX_COMPILE_STDCXX([11])
+# Need C++14 at least
+#Alternative: AX_CXX_COMPILE_STDCXX([14])
 AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
-   [# _MY_CXX_CHECK_CXX_VER(flag) -- Check if compiler runs C++11
+   [# _MY_CXX_CHECK_CXX_VER(flag) -- Check if compiler runs C++14
    # Set $_my_result
    AC_LINK_IFELSE(
     [AC_LANG_PROGRAM([#include <thread>
-#if (__cplusplus < 201103L)
+#if (__cplusplus < 201402L)
 # error "Too old"
 #endif
    ], [[ ]])],
@@ -531,13 +573,13 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
 # Add $CFG_CXXFLAGS_STD only if can't compile correctly otherwise,
 # as adding std= when not needed can cause errors with the C++ std library.
 CFG_CXXFLAGS_STD=$CFG_CXXFLAGS_STD_NEWEST
-AC_MSG_CHECKING(whether $CXX supports C++11)
+AC_MSG_CHECKING(whether $CXX supports C++14)
 _MY_CXX_CHECK_CXX_VER()
 AC_MSG_RESULT($_my_result)
 if test "$_my_result" = "no" ; then
   CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_STD"
   CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE $CFG_CXXFLAGS_STD"
-   AC_MSG_CHECKING(whether $CXX supports C++11 with $CFG_CXXFLAGS_STD)
+   AC_MSG_CHECKING(whether $CXX supports C++14 with $CFG_CXXFLAGS_STD)
   _MY_CXX_CHECK_CXX_VER()
   AC_MSG_RESULT($_my_result)
 else
@@ -547,13 +589,28 @@ else
 fi
 if test "$_my_result" = "no" ; then
   AC_MSG_NOTICE([[]])
-   AC_MSG_ERROR([[the $CXX compiler appears to not support C++11.
+   AC_MSG_ERROR([[the $CXX compiler appears to not support C++14.

-Verilator requires a C++11 or newer compiler.]])
+Verilator requires a C++14 or newer compiler.]])

 fi
 AC_SUBST(CFG_CXXFLAGS_STD)

+# Compiler precompiled header options (assumes either gcc or clang++)
+AC_MSG_CHECKING([for $CXX precompile header include option])
+if $CXX --help | grep include-pch >/dev/null 2>/dev/null ; then
+   # clang
+   CFG_CXXFLAGS_PCH_I=-include-pch
+   CFG_GCH_IF_CLANG=.gch
+else
+   # GCC
+   CFG_CXXFLAGS_PCH_I=-include
+   CFG_GCH_IF_CLANG=
+fi
+AC_MSG_RESULT($CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_GCH_IF_CLANG)
+
 # Checks for library functions.
 AC_CHECK_MEMBER([struct stat.st_mtim.tv_nsec],
    [AC_DEFINE([HAVE_STAT_NSEC],[1],[Defined if struct stat has st_mtim.tv_nsec])],
@@ -568,7 +625,7 @@ ACO_SAVE_LIBS="$LIBS"
 LIBS="$LIBS -lsystemc"
 AC_LINK_IFELSE(
    [AC_LANG_PROGRAM([[#include <systemc.h>
-                     extern "C" int sc_main(int argc, char* argv[]) {}
+                     extern "C" int sc_main(int argc, char* argv[]) { return 0; }
                     ]],[[sc_version()]])],
    [_my_result=yes
     AC_DEFINE([HAVE_SYSTEMC],[1],[Defined if have SystemC library])],
@@ -579,6 +636,9 @@ AC_SUBST(HAVE_SYSTEMC)

 # Checks for system services

+######################################################################
+## Output
+
 # Other install directories
 pkgdatadir=${datadir}/verilator
 AC_SUBST(pkgdatadir)
@@ -7,12 +7,15 @@ This contributing document contains some suggestions that may make
 contributions flow more efficiently.


-Did you find a bug?
-------------------
+Did you find a Verilator bug?
+-----------------------------

- Please **Ensure the bug was not already reported** by searching
+- Please **ensure the bug was not already reported** by searching
  `Verilator Issues <https://verilator.org/issues>`__.

+- Please **download the latest development GitHub version**, build, and see
+  if the issue has been fixed.
+
 - If you're unable to find an open issue addressing the problem, `open a
  new Verilator issue <https://verilator.org/issues/new>`__.

@@ -20,21 +23,28 @@ Did you find a bug?
    demonstrating the bug and expected behavior that is not occurring.

  - The ideal example works against other simulators, and is in the
-    test_regress/t test format, as described in `docs/internals
-    <internals.rst>`__.
+    test_regress/t test format, as described in
+    `Verilator Internals Documentation
+    <https://github.com/verilator/verilator/blob/master/docs/internals.rst>`__.


-Did you write a patch that fixes a bug?
---------------------------------------
+Did you write a patch that fixes a Verilator bug?
+-------------------------------------------------

- Please `Open a new issue <https://verilator.org/issues/new>`__.
+- Please `Open a new Verilator issue <https://verilator.org/issues/new>`__
+  if there is not one already describing the bug.

- You may attach a patch to the issue, or (preferred) may request a
-  GitHub pull request.
+- Please `Open a Verilator pull request
+  <https://github.com/verilator/verilator/pulls>`__.

-  - Verilator uses GitHub Actions to provide continuous integration.  You
-    may want to enable Actions on your GitHub branch to ensure your changes
-    keep the tests passing. See `docs/internals <internals.rst>`__.
+- See the coding conventions, and other developer information in
+  ``docs/internals.rst`` in the distribution, or as rendered at
+  `Verilator Internals Documentation
+  <https://github.com/verilator/verilator/blob/master/docs/internals.rst>`__.
+
+- Verilator uses GitHub Actions to provide continuous integration.  You
+  may want to enable Actions on your GitHub branch to ensure your changes
+  keep the tests passing.

 - Your source-code contributions must be certified as open source,
  under the `Developer Certificate of
@@ -56,17 +66,14 @@ Did you write a patch that fixes a bug?
    contribution.

 - Your test contributions are generally considered released into the
-  Creative Commons Public Domain (CC0), unless you request otherwise or
+  Creative Commons Public Domain (CC0), unless you request otherwise, or
  put a GNU/Artistic license on your file.

- Most important is we get your patch. If you'd like to clean up
-  indentation and related issues ahead of our feedback, that is
-  appreciated; please see the coding conventions in `docs/internals
-  <internals.rst>`__.
+- Most important is we get your patch.


-Do you have questions?
----------------------
+Do you have questions on Verilator?
+-----------------------------------

 - Please see FAQ section and rest of the `Verilator
  manual <https://verilator.org/verilator_doc.html>`__, or `Verilator
@@ -3,52 +3,90 @@ under the Developer Certificate of Origin (https://developercertificate.org/).

 Please see the Verilator manual for 200+ additional contributors. Thanks to all.

+Adam Bagley
+Adrian Sampson
 Adrien Le Masle
 Ahmed El-Mahmoudy
+Aidan McNay
 Aleksander Kiryk
 Alex Chadwick
+Alex Solomatnikov
 Àlex Torregrosa
 Aliaksei Chapyzhenka
 Ameya Vikram Singh
+Andrea Calabrese
 Andreas Kuster
+Andrei Kostovski
+Andrew Miloradovsky
 Andrew Nolte
+Anthony Donlon
+Anthony Moore
 Arkadiusz Kozdra
+Arthur Rosa
+Aylon Chaim Porat
+Bartłomiej Chmiel
+Cameron Kirk
+Chih-Mao Chen
+Chris Bachhuber
 Chris Randall
+Christopher Taylor
 Chuxuan Wang
+Chykon
 Conor McCullough
 Dan Petrisko
 Daniel Bates
 David Horton
+David Ledger
 David Metz
+Dave Sargeant
 David Stanford
 David Turner
+Dercury
+Diego Roux
+Don Williamson
 Drew Ranck
 Drew Taussig
 Driss Hafdi
 Edgar E. Iglesias
+Eric Müller
 Eric Rippey
+Ethan Sifferman
+Eyck Jentzsch
+Furqan Nadir
+Fabian Keßler
 Fan Shupei
+february cozzocrea
+Felix Neumärker
 Felix Yan
+Frans Skarman
+Fuad Ismail
+G-A. Kamendje
 Garrett Smith
 Geza Lore
 Gianfranco Costamagna
+Gijs Burghoorn
 Glen Gibb
 Gökçe Aydos
 Graham Rushton
+Greg Davill
 Guokai Chen
+Gus Smith
 Gustav Svensk
-G-A. Kamendje
+Han Qi
 Harald Heckmann
+Hennadii Chernyshchyk
 Howard Su
 Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
+Ícaro Lima
+Ilya Barkov
 Iru Cai
 Ivan Vnučec
-Ilya Barkov
 Iztok Jeras
 Jake Merdich
+James Bailey
 James Hanlon
 James Hutchinson
 James Pallister
@@ -56,27 +94,48 @@ James Shi
 Jamey Hicks
 Jamie Iles
 Jan Van Winkel
+Jiangjie Weng
 Jean Berniolles
 Jeremy Bennett
+Jesse Taube
 Jevin Sweval
 Jiacheng Qian
+Jiamin Zhu
+Jitesh Nayak
+Jinyan Xu
 Jiuyang Liu
 Joey Liu
 John Coiner
 John Demme
+John Wehle
 Jonathan Drolet
+Jonathan Schröter
+Jordan McConnon
+Jose Loyola
+Josep Sans
+Joseph Nwabueze
 Josh Redford
+Julian Daube
 Julie Schwartz
 Julien Margetts
+Justin Thiel
 Kaleb Barrett
 Kamil Rakoczy
 Kanad Kanhere
+Kefa Chen
 Keith Colbert
 Kevin Kiningham
+Kevin Nygaard
 Kritik Bhimani
 Krzysztof Bieganski
+Krzysztof Boronski
+Krzysztof Boroński
+Krzysztof Obłonczek
+Krzysztof Starecki
 Kuba Ober
 Larry Doolittle
+Liam Braun
+Luca Colagrande
 Ludwig Rogiers
 Lukasz Dalek
 Maarten De Braekeleer
@@ -90,61 +149,100 @@ Marshal Qiao
 Martin Schmidt
 Martin Stadler
 Matthew Ballance
+Michael Bikovitsky
 Michael Killough
 Michaël Lefebvre
+Michal Czyz
 Mike Popoloski
 Miodrag Milanović
 Mladen Slijepcevic
 Morten Borup Petersen
 Mostafa Gamal
+Moubarak Jeje
 Nandu Raj
+Natan Kreimer
+Nathan Graybeal
 Nathan Kohagen
 Nathan Myers
+Nick Brereton
+Nolan Poe
+Oleh Maksymenko
 Patrick Stewart
+Paul Bowen-Huggett
+Paul Swirhun
 Paul Wright
+Pawel Jewstafjew
 Pawel Sagan
+Pengcheng Xu
+Peter Debacker
 Peter Horvath
 Peter Monsson
+Philip Axer
 Philipp Wagner
 Pierre-Henri Horrein
 Pieter Kapsenberg
 Piotr Binkowski
 Qingyao Sun
+Quentin Corradi
 Rafal Kapuscik
+Rasfunk
 Raynard Qiao
+Ricardo Barbedo
 Richard Myers
+Risto Pejašinović
+Robert Balas
 Rupert Swarbrick
+Ryan Ziegler
 Ryszard Rozak
 Samuel Riedel
 Sean Cross
 Sebastien Van Cauwenberghe
 Sergi Granell
+Seth Pellegrino
+Srinivasan Venkataramanan
 Stefan Wallentowitz
 Stephen Henry
 Steven Hugg
+sumpster
+Szymon Gizler
 Sören Tempel
 Teng Huang
+Tom Manner
+Tim Hutt
 Tim Snyder
 Tobias Rosenkranz
 Tobias Wölfel
 Todd Strader
 Tomasz Gorochowik
 Topa Topino
+Toru Niina
+Trung Nguyen
+Tudor Timi
 Tymoteusz Blazejczyk
 Udi Finkelstein
 Unai Martinez-Corral
+Udaya Raj Subedi
+Valentin Atepalikhin
 Varun Koyyalagunta
 Vassilis Papaefstathiou
 Veripool API Bot
 Victor Besyakov
+Vito Gamberini
 William D. Jones
 Wilson Snyder
 Xi Zhang
+Yan Xu
+Yangyu Chen
+Yilou Wang
 Yinan Xu
 Yoda Lee
 Yossi Nivin
+Yu-Sheng Lin
 Yuri Victorovich
 Yutetsu TAKATSUKASA
-Yu-Sheng Lin
 Yves Mathieu
 Zhanglei Wang
+Zhou Shen
+Zixi Li
+أحمد المحمودي
+404allen404
@@ -5,7 +5,7 @@
 #
 # Code available from: https://verilator.org
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -18,12 +18,16 @@
 RST2HTML = rst2html
 PYTHON3 = python3
 DOXYGEN = doxygen
-SPHINXOPTS ?= -c guide
 SPHINXBUILD ?= sphinx-build

 SOURCEDIR = guide
 BUILDDIR = _build

+SPHINXOPTS ?= -c guide -j 4
+ifneq ($(VERILATOR_ANALYTICS_ID),)
+SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
+endif
+
 ######################################################################

 .SUFFIXES:
@@ -0,0 +1,21 @@
+Verilator Documentation
+=======================
+
+This folder contains sources for Verilator documentation.
+
+For formatted documentation see:
+
+- `Verilator README <https://github.com/verilator/verilator>`_
+
+- `Verilator installation and package directory structure
+  <https://verilator.org/install>`_
+
+- `Verilator manual (HTML) <https://verilator.org/verilator_doc.html>`_,
+  or `Verilator manual (PDF) <https://verilator.org/verilator_doc.pdf>`_
+
+- `Subscribe to Verilator announcements
+  <https://github.com/verilator/verilator-announce>`_
+
+- `Verilator forum <https://verilator.org/forum>`_
+
+- `Verilator issues <https://verilator.org/issues>`_
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0201,R0903
+# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0903
 # -*- Python -*- See copyright, etc below
 ######################################################################

@@ -23,9 +23,7 @@ class VlSphinxExtract:
                    outname = match.group(1)
                    print("Writing %s" % outname)
                    fhw = open(outname, "w", encoding="utf8")  # pylint: disable=consider-using-with
-                    fhw.write(
-                        ".. comment: generated by vl_sphinx_extract from " +
-                        filename + "\n")
+                    fhw.write(".. comment: generated by vl_sphinx_extract from " + filename + "\n")
                    fhw.write(".. code-block::\n")
                elif re.match(r'^[=a-zA-Z0-9_]', line):
                    fhw = None
@@ -39,18 +37,14 @@ parser = argparse.ArgumentParser(
    allow_abbrev=False,
    formatter_class=argparse.RawDescriptionHelpFormatter,
    description="""Read a file and extract documentation data.""",
-    epilog=
-    """ Copyright 2021-2023 by Wilson Snyder.  This package is free software;
+    epilog=""" Copyright 2021-2025 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")

-parser.add_argument('--debug',
-                    action='store_const',
-                    const=9,
-                    help='enable debug')
+parser.add_argument('--debug', action='store_const', const=9, help='enable debug')
 parser.add_argument('path', help='path to extract from')
 Args = parser.parse_args()

@@ -18,8 +18,7 @@ class VlSphinxFix:
        if os.path.isdir(path):
            for basefile in os.listdir(path):
                file = os.path.join(path, basefile)
-                if ((basefile != ".") and (basefile != "..")
-                        and basefile not in self.SkipBasenames
+                if ((basefile != ".") and (basefile != "..") and basefile not in self.SkipBasenames
                        and not os.path.islink(file)):
                    self.process(file)
        elif re.search(r'\.(html|tex)$', path):
@@ -54,18 +53,14 @@ parser = argparse.ArgumentParser(
    allow_abbrev=False,
    formatter_class=argparse.RawDescriptionHelpFormatter,
    description="""Post-process Sphinx HTML.""",
-    epilog=
-    """ Copyright 2021-2023 by Wilson Snyder.  This package is free software;
+    epilog=""" Copyright 2021-2025 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")

-parser.add_argument('--debug',
-                    action='store_const',
-                    const=9,
-                    help='enable debug')
+parser.add_argument('--debug', action='store_const', const=9, help='enable debug')
 parser.add_argument('path', help='path to edit')
 Args = parser.parse_args()

@@ -0,0 +1,11 @@
+.. comment: generated by t_lint_pinmissing_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 2
+
+   module t;
+      sub sub();  // <--- Warning
+   endmodule
+   module sub
+     (output port);
+   endmodule
@@ -0,0 +1,4 @@
+.. comment: generated by t_lint_pinmissing_bad
+.. code-block::
+
+   %Warning-PINMISSING: example.v:1:8 Cell has missing pin: 'port'
@@ -0,0 +1,11 @@
+.. comment: generated by t_lint_pkgnodecl_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 2
+
+   module t;
+      initial Pkg::hello();  //<--- Warning
+   endmodule
+   package Pkg;
+      function void hello(); endfunction
+   endpackage
@@ -0,0 +1,4 @@
+.. comment: generated by t_lint_pkgnodecl_bad
+.. code-block::
+
+   %Error-PKGNODECL: example.v:1:12 Package/class 'Pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
@@ -0,0 +1,8 @@
+.. comment: generated by t_lint_widthexpand_docs_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 3
+
+      int array[5];
+      bit [1:0] rd_addr;
+      wire int rd_value = array[rd_addr];  //<--- Warning
@@ -0,0 +1,5 @@
+.. comment: generated by t_lint_widthexpand_docs_bad
+.. code-block:: sv
+   :emphasize-lines: 1
+
+      wire int rd_value = array[{1'b0, rd_addr}];  //<--- Fixed
@@ -0,0 +1,4 @@
+.. comment: generated by t_lint_widthexpand_docs_bad
+.. code-block::
+
+   %Warning-WIDTHEXPAND: example.v:3:29 Bit extraction of array[4:0] requires 3 bit index, not 2 bits.
@@ -1,8 +0,0 @@
-.. comment: generated by t_lint_width_docs_bad
-.. code-block:: sv
-   :linenos:
-   :emphasize-lines: 3
-
-      int array[5];
-      bit [1:0] rd_addr;
-      wire int rd_value = array[rd_addr];  //<--- Warning
@@ -1,5 +0,0 @@
-.. comment: generated by t_lint_width_docs_bad
-.. code-block:: sv
-   :emphasize-lines: 1
-
-      wire int rd_value = array[{1'b0, rd_addr}];  //<--- Fixed
@@ -1,4 +0,0 @@
-.. comment: generated by t_lint_width_docs_bad
-.. code-block::
-
-   %Warning-WIDTH: example.v:3:29 Bit extraction of array[4:0] requires 3 bit index, not 2 bits.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ****************
@@ -1,7 +1,7 @@
 # pylint: disable=C0103,C0114,C0116,C0301,E0402,W0622
 #
 # Configuration file for Verilator's Sphinx documentation builder.
-# Copyright 2003-2023 by Wilson Snyder.
+# Copyright 2003-2025 by Wilson Snyder.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 # This file only contains overridden options. For a full list:
@@ -10,7 +10,6 @@
 # ----------------------------------------------------------------------
 # -- Path setup

-from datetime import datetime
 import os
 import re
 import sys
@@ -24,10 +23,17 @@ def get_vlt_version():
    filename = "../../Makefile"
    with open(filename, "r", encoding="utf8") as fh:
        for line in fh:
-            match = re.search(r"PACKAGE_VERSION_NUMBER *= *([a-z0-9.]+)", line)
+            match = re.search(r"PACKAGE_VERSION *= *([a-z0-9.]+) +([-0-9]+)", line)
            if match:
-                return match.group(1)
-    return "unknown"
+                return match.group(1), match.group(2)
+            match = re.search(r"PACKAGE_VERSION *= *([a-z0-9.]+) +devel", line)
+            if match:
+                try:
+                    data = os.popen('git log -n 1 --pretty=%cs').read()
+                except Exception:  # pylint: disable=broad-except
+                    data = ""  # fallback, and Sphinx will fill in today's date
+                return "Devel " + match.group(1), data
+    return "unknown", "unknown"


 def setup(app):
@@ -38,14 +44,14 @@ def setup(app):
 # -- Project information

 project = 'Verilator'
-copyright = '2022 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
+copyright = '2024 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
 author = 'Wilson Snyder'

 # The master toctree document.
 master_doc = "index"

-version = get_vlt_version()
-release = get_vlt_version()
+version, today_fmt = get_vlt_version()
+release = version

 rst_prolog = """
 .. role:: vlopt(option)
@@ -68,8 +74,7 @@ extensions = []
 # directories to ignore when looking for source files.
 # This pattern also affects html_static_path and html_extra_path.
 exclude_patterns = [
-    '_build', 'Thumbs.db', '.DS_Store', 'internals.rst', 'xml.rst', 'gen/ex_*',
-    'CONTRIBUTING.rst'
+    '_build', 'Thumbs.db', '.DS_Store', 'internals.rst', 'xml.rst', 'gen/ex_*', 'CONTRIBUTING.rst'
 ]

 # Warn about refs
@@ -89,9 +94,6 @@ source_suffix = [".rst"]
 # Add any paths that contain templates here, relative to this directory.
 templates_path = ['_templates']

-# Date format to ISO
-today_fmt = datetime.now().strftime("%F")
-
 # If true, `todo` and `todoList` produce output, else they produce nothing.
 todo_include_todos = True

@@ -111,7 +113,6 @@ html_theme = 'sphinx_rtd_theme'
 html_theme_path = [sphinx_rtd_theme.get_html_theme_path()]

 html_theme_options = {
-    'analytics_id': 'G-D27B0C9QEB',
    'logo_only': True,
    'style_nav_header_background': "#45acf8",  # Default is #2980B9
    # 'canonical_url':
@@ -227,4 +228,4 @@ spelling_ignore_contributor_names = True

 breathe_projects = {"verilated": "_build/doxygen/verilated/xml/"}
 breathe_default_project = "verilated"
-breathe_default_members = ('members')
+breathe_default_members = 'members'
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Connecting:
@@ -120,6 +120,52 @@ code.  This is a feature, as using the SystemC pin interconnect scheme
 everywhere would reduce performance by an order of magnitude.


+Verilated API
+=============
+
+The API to a Verilated model is the C++ headers in the include/ directory
+in the distribution.  These headers use Doxygen comments, `///` and `//<`,
+to indicate and document those functions that are part of the Verilated
+public API.
+
+Process-Level Clone APIs
+--------------------------
+
+Modern operating systems support process-level clone (a.k.a copying, forking)
+with system call interfaces in C/C++, e.g., :code:`fork()` in Linux.
+
+However, after cloning a parent process, some resources cannot be inherited
+in the child process. For example, in POSIX systems, when you fork a process,
+the child process inherits all the memory of the parent process. However,
+only the thread that called fork is replicated in the child process. Other
+threads are not.
+
+Therefore, to support the process-level clone mechanisms, Verilator supports
+:code:`prepareClone()` and :code:`atClone()` APIs to allow the user to manually
+re-construct the model in the child process. The two APIs handle all necessary
+resources required for releasing and re-initializing before and after cloning.
+
+The two APIs are supported in the verilated models. Here is an example of usage
+with Linux :code:`fork()` and :code:`pthread_atfork` APIs:
+
+.. code-block:: C++
+
+    // static function pointers to fit pthread_atfork
+    static auto prepareClone = [](){ topp->prepareClone(); };
+    static auto atClone = [](){ topp->atClone(); };
+
+    // in main function, register the handlers:
+    pthread_atfork(prepareClone, atClone, atClone);
+
+For better flexibility, you can also manually call the handlers before and
+after :code:`fork()`.
+
+With the process-level clone APIs, users can create process-level snapshots
+for the verilated models. While the Verilator save/restore option provides
+persistent and circuit-dependent snapshots, the process-level clone APIs
+enable in-memory, circuit-transparent, and highly efficient snapshots.
+
+
 Direct Programming Interface (DPI)
 ==================================

@@ -361,6 +407,16 @@ only a couple of instructions.
 For signal callbacks to work the main loop of the program must call
 :code:`VerilatedVpi::callValueCbs()`.

+Verilator also tracks when the model state has been modified via the VPI with
+an :code:`evalNeeded` flag.  This flag can be checked with :code:`VerilatedVpi::evalNeeded()`
+and it can be cleared with :code:`VerilatedVpi::clearEvalNeeded()`.  Used together
+it is possible to skip :code:`eval()` calls if no model state has been changed
+since the last :code:`eval()`.
+
+Any data written via :code:`vpi_put_value` with :code:`vpiInertialDelay` will
+be deferred for later.  These delayed values can be flushed to the model with
+:code:`VerilatedVpi::doInertialPuts()`.
+

 .. _VPI Example:

@@ -374,9 +430,11 @@ changed on the specified clock edge.
 .. code-block:: bash

     cat >our.v <<'EOF'
-       module our (input clk);
-          reg readme   /*verilator public_flat_rd*/;
-          reg writeme  /*verilator public_flat_rw @(posedge clk) */;
+       module our #(
+          parameter WIDTH /*verilator public_flat_rd*/ = 32
+       ) (input clk);
+          reg [WIDTH-1:0] readme   /*verilator public_flat_rd*/;
+          reg [WIDTH-1:0] writeme  /*verilator public_flat_rw @(posedge clk) */;
          initial $finish;
       endmodule
     EOF
@@ -398,12 +456,14 @@ accesses the above signal "readme" would be:
           vpiHandle vh1 = vpi_handle_by_name((PLI_BYTE8*)"TOP.our.readme", NULL);
           if (!vh1) vl_fatal(__FILE__, __LINE__, "sim_main", "No handle found");
           const char* name = vpi_get_str(vpiName, vh1);
-           printf("Module name: %s\n", name);  // Prints "readme"
+           const char* type = vpi_get_str(vpiType, vh1);
+           const int size = vpi_get(vpiSize, vh1);
+           printf("register name: %s, type: %s, size: %d\n", name, type, size);  // Prints "register name: readme, type: vpiReg, size: 32"

           s_vpi_value v;
           v.format = vpiIntVal;
           vpi_get_value(vh1, &v);
-           printf("Value of v: %d\n", v.value.integer);  // Prints "readme"
+           printf("Value of %s: %d\n", name, v.value.integer);  // Prints "Value of readme: 0"
       }

       int main(int argc, char** argv) {
@@ -450,7 +510,7 @@ the user should call:
     any delayed events pending,
   * :code:`designp->nextTimeSlot()`, which returns the simulation time of the
     next delayed event. This method can only be called if
-     :code:`designp->nextTimeSlot()` returned :code:`true`.
+     :code:`designp->eventsPending()` returned :code:`true`.

 Call :code:`eventsPending()` to check if you should continue with the
 simulation, and then :code:`nextTimeSlot()` to move simulation time forward.
@@ -479,11 +539,12 @@ distribution.
 Verilated and VerilatedContext
 ==============================

-Multiple Verilated models may be part of the same simulation context, that
-is share a VPI interface, sense of time, and common settings.  This common
-simulation context information is stored in a ``VerilatedContext``
+Multiple C++ Verilated models may be part of the same simulation context,
+that is share a VPI interface, sense of time, and common settings.  This
+common simulation context information is stored in a ``VerilatedContext``
 structure.  If a ``VerilatedContext`` is not created prior to creating a
-model, a default global one is created automatically.
+model, a default global one is created automatically.  SystemC requires
+using only the single, default VerilatedContext.

 The ``Verilated::`` methods, including the ``Verilated::commandArgs`` call
 shown above, call VerilatedContext methods using the default global
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *******************************
@@ -23,24 +23,24 @@ Next, try the :vlopt:`--debug` option.  This will enable additional
 internal assertions, and may help identify the problem.

 Finally, reduce your code to the smallest possible routine that exhibits
-the bug.  Even better, create a test in the :file:`test_regress/t`
-directory, as follows:
+the bug (see: :ref:`Minimizing bug-inducing code`).  Even better, create
+a test in the :file:`test_regress/t` directory, as follows:

 .. code-block:: bash

       cd test_regress
-       cp -p t/t_EXAMPLE.pl t/t_BUG.pl
+       cp -p t/t_EXAMPLE.py t/t_BUG.py
       cp -p t/t_EXAMPLE.v t/t_BUG.v

 There are many hints on how to write a good test in the
-:file:`test_regress/driver.pl` documentation which can be seen by running:
+:file:`test_regress/driver.py` documentation which can be seen by running:

 .. code-block:: bash

       cd $VERILATOR_ROOT  # Need the original distribution kit
-       test_regress/driver.pl --help
+       test_regress/driver.py --help

-Edit :file:`t/t_BUG.pl` to suit your example; you can do anything you want
+Edit :file:`t/t_BUG.py` to suit your example; you can do anything you want
 in the Verilog code there; just make sure it retains the single clk input
 and no outputs.  Now, the following should fail:

@@ -48,20 +48,38 @@ and no outputs.  Now, the following should fail:

       cd $VERILATOR_ROOT  # Need the original distribution kit
       cd test_regress
-       t/t_BUG.pl  # Run on Verilator
-       t/t_BUG.pl --debug # Run on Verilator, passing --debug to Verilator
-       t/t_BUG.pl --vcs  # Run on VCS simulator
-       t/t_BUG.pl --nc|--iv|--ghdl  # Likewise on other simulators
+       t/t_BUG.py  # Run on Verilator
+       t/t_BUG.py --debug # Run on Verilator, passing --debug to Verilator
+       t/t_BUG.py --vcs  # Run on VCS simulator
+       t/t_BUG.py --nc|--iv|--ghdl  # Likewise on other simulators

 The test driver accepts a number of options, many of which mirror the main
 Verilator options. For example the previous test could have been run with
 debugging enabled.  The full set of test options can be seen by running
-:command:`driver.pl --help` as shown above.
+:command:`driver.py --help` as shown above.

 Finally, report the bug at `Verilator Issues
 <https://verilator.org/issues>`_.  The bug will become publicly visible; if
 this is unacceptable, mail the bug report to ``[email protected]``.

+.. _Minimizing bug-inducing code:
+
+Minimizing bug-inducing code
+============================
+
+In some cases, the part of the code that causes the bug is clearly visible
+and the design can be easily manually reduced. In other cases, the bug is
+caused by a complex interaction of many parts of the design, and it is not
+clear which parts are necessary to reproduce the bug. In these cases, an
+Open Source tool called `sv-bugpoint
+<https://github.com/antmicro/sv-bugpoint>_` can be used to automatically
+reduce a SystemVerilog design to the smallest possible reproducer.
+It can be used to automatically reduce a design with hundreds of thousands of
+lines to a minimal test case while preserving the bug-inducing behavior.
+
+Please refer to the `README
+<https://github.com/antmicro/sv-bugpoint/blob/main/README.md>`_ file for more
+information on how to use `sv-bugpoint`.

 .. Contributing
 .. ============
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ************************
@@ -27,107 +27,147 @@ Alliance <https://chipsalliance.org>`_, `Antmicro Ltd
 <https://antmicro.com>`_ and `Shunyao CAD <https://shunyaocad.com>`_.

 Previous major corporate sponsors of Verilator, by providing significant
-contributions of time or funds include: Atmel Corporation, Cavium
-Inc., Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd.,
-Hicamp Systems, Intel Corporation, Mindspeed Technologies Inc., MicroTune
-Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus Networks Inc.,
-SiCortex Inc, and Shunyao CAD.
+contributions of time or funds include: Antmicro Ltd., Atmel Corporation,
+Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd., Hicamp
+Systems, Intel Corporation, Marvell Inc., Mindspeed Technologies Inc.,
+MicroTune Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus
+Networks Inc., SiCortex Inc, Shunyao CAD, and Western Digital Inc.

-The contributors of major functionality are: Krzysztof
-Bieganski, Byron Bradley, Jeremy Bennett, Lane Brooks, John Coiner, Duane
-Galbi, Geza Lore, Todd Strader, Stefan Wallentowitz, Paul Wasson, Jie Xu,
-and Wilson Snyder.  Major testers included Jeff Dutton, Jonathon Donaldson,
-Ralf Karge, David Hewson, Iztok Jeras, Wim Michiels, Alex Solomatnikov,
-Sebastien Van Cauwenberghe, Gene Weber, and Clifford Wolf.
+The contributors of major functionality are: Jeremy Bennett, Krzysztof
+Bieganski, Byron Bradley, Lane Brooks, John Coiner, Duane Galbi, Arkadiusz
+Kozdra, Geza Lore, Todd Strader, Yutetsu Takatsukasa, Stefan Wallentowitz,
+Paul Wasson, Jie Xu, and Wilson Snyder.

 Some of the people who have provided ideas, and feedback for Verilator
 include:

-David Addison, Tariq B. Ahmad, Nikana Anastasiadis, Vasu Arasanipalai, Jens
-Arm, Sharad Bagri, Matthew Ballance, Andrew Bardsley, Matthew Barr, Geoff
-Barrett, Kaleb Barrett, Julius Baxter, Jeremy Bennett, Michael Berman, Jean
-Berniolles, Victor Besyakov, Moinak Bhattacharyya, Krzysztof Bieganski,
-David Binderman, Piotr Binkowski, Johan Bjork, David Black, Tymoteusz
-Blazejczyk, Daniel Bone, Gregg Bouchard, Christopher Boumenot, Nick Bowler,
-Byron Bradley, Bryan Brady, Maarten De Braekeleer, Charlie Brej, J Briquet,
-Lane Brooks, John Brownlee, Jeff Bush, Lawrence Butcher, Tony Bybell, Iru
-Cai, Ted Campbell, Chris Candler, Lauren Carlson, Donal Casey, Alex
-Chadwick, Marcel Chang, Aliaksei Chapyzhenka, Guokai Chen, Terry Chen,
-Yi-Chung Chen, Enzo Chi, Robert A. Clark, Ryan Clarke, Allan Cochrane, John
-Coiner, Keith Colbert, Gianfranco Costamagna, Sean Cross, George Cuan, Joe
-DErrico, Lukasz Dalek, Gunter Dannoritzer, Ashutosh Das, Bernard Deadman,
-John Demme, Mike Denio, John Deroo, Philip Derrick, John Dickol, Ruben
-Diez, Danny Ding, Jacko Dirks, Ivan Djordjevic, Jonathon Donaldson, Larry
-Doolittle, Sebastian Dressler, Jonathan Drolet, Alex Duller, Jeff Dutton,
+David Addison, Tariq B. Ahmad, Nikana Anastasiadis, John David Anglin,
+Frederic Antonin, Hans Van Antwerpen, Vasu Arasanipalai, Jens Arm, Rohan
+Arshid, Valentin Atepalikhin, Philip Axer, Gökçe Aydos, Chris Bachhuber,
+Filip Badáň, Adam Bagley, Sharad Bagri, James Bailey, Robert Balas, Marco
+Balboni, Matthew Ballance, Ricardo Barbedo, Andrew Bardsley, Ilya Barkov,
+Matthew Barr, Geoff Barrett, Kaleb Barrett, Daniel Bates, Julius Baxter,
+Michael Berman, Jean Berniolles, Victor Besyakov, Narayan Bhagavatula,
+Moinak Bhattacharyya, Kritik Bhimani, David Biancolin, Krzysztof Bieganski,
+Michael Bikovitsky, David Binderman, Piotr Binkowski, Johan Björk, David
+Black, Tymoteusz Blazejczyk, Scott Bleiweiss, David van der Bokke, Daniel
+Bone, Guy Bonneau, Krzysztof Boroński, Gregg Bouchard, Christopher
+Boumenot, Paul Bowen-Huggett, Nick Bowler, Bryan Brady, Maarten De
+Braekeleer, Liam Braun, Charlie Brej, J Briquet, John Brownlee, KC
+Buckenmaier, Gijs Burghoorn, Jeff Bush, Lawrence Butcher, Tony Bybell, Iru
+Cai, Ted Campbell, Anthony Campos, Chris Candler, Lauren Carlson, Gregory
+Carver, Donal Casey, Sebastien Van Cauwenberghe, Alex Chadwick, Greg
+Chadwick, Marcel Chang, Aliaksei Chapyzhenka, Chih-Mao Chen, Guokai Chen,
+Kefa Chen, Terry Chen, Yangyu Chen, Yi-Chung Chen, Yurii Cherkasov,
+Hennadii Chernyshchyk, Enzo Chi, Bartłomiej Chmiel, Robert A. Clark, Ryan
+Clarke, Allan Cochrane, Keith Colbert, Quentin Corradi, Nassim Corteggiani,
+Gianfranco Costamagna, February Cozzocrea, Sean Cross, George Cuan, Michal
+Czyz, Joe DErrico, Jim Dai, Lukasz Dalek, Laurens van Dam, Gunter
+Dannoritzer, Ashutosh Das, Julian Daube, Greg Davill, Bernard Deadman,
+Peter Debacker, Josse Van Delm, John Demme, Mike Denio, John Deroo, Philip
+Derrick, Aadi Desai, John Dickol, Ruben Diez, Danny Ding, Jacko Dirks, Ivan
+Djordjevic, Brad Dobbie, Paul Donahue, Jonathon Donaldson, Anthony Donlon,
+Caleb Donovick, Larry Doolittle, Leendert van Doorn, Sebastian Dressler,
+Jonathan Drolet, Justin Yao Du, Maciej Dudek, Alex Duller, Jeff Dutton,
 Tomas Dzetkulic, Usuario Eda, Charles Eddleston, Chandan Egbert, Joe Eiler,
-Ahmed El-Mahmoudy, Trevor Elbourne, Mats Engstrom, Robert Farrell, Eugen
-Fekete, Fabrizio Ferrandi, Udi Finkelstein, Brian Flachs, Bill Flynn,
-Andrea Foletto, Bob Fredieu, Duane Galbi, Mostafa Gamal, Benjamin Gartner,
-Christian Gelinek, Richard E George, Peter Gerst, Glen Gibb, Michael
-Gielda, Barbara Gigerl, Shankar Giri, Dan Gisselquist, Petr Gladkikh, Sam
-Gladstone, Mariusz Glebocki, Andrew Goessling, Amir Gonnen, Chitlesh
-Goorah, Tomasz Gorochowik, Kai Gossner, Sergi Granell, Al Grant, Nathan
-Graybeal, Alexander Grobman, Graham Rushton, Xuan Guo, Driss Hafdi, Neil
-Hamilton, James Hanlon, Oyvind Harboe, Jannis Harder, Junji Hashimoto,
-Thomas Hawkins, Mitch Hayenga, Harald Heckmann, Robert Henry, Stephen
-Henry, David Hewson, Jamey Hicks, Joel Holdsworth, Andrew Holme, Hiroki
-Honda, Alex Hornung, Pierre-Henri Horrein, David Horton, Peter Horvath, Jae
-Hossell, Kuoping Hsu, Teng Huang, Steven Hugg, Alan Hunter, James
-Hutchinson, Ehab Ibrahim, Edgar E. Iglesias, Jamie Iles, Vighnesh Iyer, Ben
-Jackson, Shareef Jalloq, Marlon James, Krzysztof Jankowski, HyungKi Jeong,
-Iztok Jeras, Alexandre Joannou, James Johnson, Christophe Joly, Franck
-Jullien, James Jung, Mike Kagen, Arthur Kahlich, Kaalia Kahn, Guy-Armand
-Kamendje, Vasu Kandadi, Kanad Kanhere, Patricio Kaplan, Pieter Kapsenberg,
-Rafal Kapuscik, Ralf Karge, Per Karlsson, Dan Katz, Sol Katzman, Ian
-Kennedy, Michael Killough, Sun Kim, Jonathan Kimmitt, Olof Kindgren, Kevin
-Kiningham, Dan Kirkham, Aleksander Kiryk, Sobhan Klnv, Gernot Koch, Jack
-Koenig, Soon Koh, Nathan Kohagen, Steve Kolecki, Brett Koonce, Will
-Korteland, Wojciech Koszek, Varun Koyyalagunta, Arkadiusz Kozdra, Markus
-Krause, David Kravitz, Roland Kruse, Andreas Kuster, Sergey Kvachonok,
-Charles Eric LaForest, Ed Lander, Steve Lang, Stephane Laurent, Walter
-Lavino, Christian Leber, Larry Lee, Yoda Lee, Michaël Lefebvre, Igor Lesik,
-John Li, Eivind Liland, Yu Sheng Lin, Charlie Lind, Andrew Ling, Jiuyang
-Liu, Paul Liu, Derek Lockhart, Jake Longo, Geza Lore, Arthur Low, Stefan
-Ludwig, Dan Lussier, Fred Ma, Duraid Madina, Affe Mao, Julien Margetts,
-Mark Marshall, Alfonso Martinez, Unai Martinez-Corral, Adrien Le Masle,
-Yves Mathieu, Patrick Maupin, Conor McCullough, Jason McMullan, Elliot
-Mednick, David Metz, Wim Michiels, Miodrag Milanovic, Kevin Millis, Wai Sum
-Mong, Peter Monsson, Sean Moore, Dennis Muhlestein, John Murphy, Matt
-Myers, Nathan Myers, Richard Myers, Dimitris Nalbantis, Peter Nelson, Bob
-Newgard, Rachit Nigam, Paul Nitza, Yossi Nivin, Pete Nixon, Lisa Noack,
-Mark Nodine, Kuba Ober, Andreas Olofsson, Baltazar Ortiz, Aleksander Osman,
-Don Owen, James Pallister, Vassilis Papaefstathiou, Brad Parker, Morten
-Borup Petersen, Dan Petrisko, Maciej Piechotka, David Pierce, Cody
-Piersall, Michael Platzer, Dominic Plunkett, David Poole, Mike Popoloski,
-Roman Popov, Rich Porter, Stefan Post, Niranjan Prabhu, Damien Pretet, Usha
-Priyadharshini, Mark Jackson Pulver, Prateek Puri, Marshal Qiao, Nandu Raj,
-Kamil Rakoczy, Danilo Ramos, Drew Ranck, Chris Randall, Anton Rapp, Josh
-Redford, Odd Magne Reitan, Frederic Requin, Dustin Richmond, Samuel Riedel,
-Alberto Del Rio, Eric Rippey, Oleg Rodionov, Ludwig Rogiers, Paul Rolfe,
-Arjen Roodselaar, Tobias Rosenkranz, Ryszard Rozak, Huang Rui, Graham
-Rushton, Jan Egil Ruud, Denis Rystsov, John Sanguinetti, Martin Schmidt,
-Julie Schwartz, Galen Seitz, Joseph Shaker, Salman Sheikh, Hao Shi, Mike
-Shinkarovsky, Rafael Shirakawa, Jeffrey Short, Fan Shupei, Anderson Ignacio
-da Silva, Rodney Sinclair, Ameya Vikram Singh, Steven Slatter, Mladen
-Slijepcevic, Brian Small, Garrett Smith, Tim Snyder, Wilson Snyder, Maciej
-Sobkowski, Stan Sokorac, Alex Solomatnikov, Flavien Solt, Wei Song, Trefor
-Southwell, Martin Stadler, Art Stamness, David Stanford, John Stevenson,
-Pete Stevenson, Patrick Stewart, Rob Stoddard, Todd Strader, John Stroebel,
-Sven Stucki, Howard Su, Emerson Suguimoto, Gene Sullivan, Qingyao Sun,
-Renga Sundararajan, Gustav Svensk, Rupert Swarbrick, Yutetsu Takatsukasa,
-Thierry Tambe, Drew Taussig, Jose Tejada, Peter Tengstrand, Wesley
-Terpstra, Rui Terra, Stefan Thiede, Gary Thomas, Ian Thompson, Kevin
-Thompson, Mike Thyer, Hans Tichelaar, Viktor Tomov, Steve Tong, Topa
-Topino, Alex Torregrosa, Michael Tresidder, David Turner, Neil Turton, Mike
-Urbach, Hans Van Antwerpen, Sebastien Van Cauwenberghe, Laurens van Dam,
-Leendert van Doorn, Cong Van Nguyen, Jan Van Winkel, Srini Vemuri, Yuri
-Victorovich, Bogdan Vukobratovic, Holger Waechtler, Philipp Wagner, Stefan
-Wallentowitz, Shawn Wang, Zhanglei Wang, Paul Wasson, Greg Waters, Thomas
-Watts, Eugene Weber, David Welch, Thomas J Whatson, Martin Whitaker, Marco
-Widmer, Leon Wildman, Daniel Wilkerson, Gerald Williams, Trevor Williams,
-Jeff Winston, Joshua Wise, Clifford Wolf, Tobias Wolfel, Johan Wouters,
-Paul Wright, Junyi Xi, Ding Xiaoliang, Jie Xu, Mandy Xu, Yinan Xu, Luke
-Yang, Amir Yazdanbakhsh, Keyi Zhang, and Xi Zhang.
+Ahmed El-Mahmoudy, Trevor Elbourne, Mats Engstrom, Robert Farrell, Julien
+Faucher, Olivier Faure, Eugene Feinberg, Eugen Fekete, Fabrizio Ferrandi,
+Udi Finkelstein, Brian Flachs, Bill Flynn, Andrea Foletto, Alex Forencich,
+Aurelien Francillon, Bob Fredieu, Manuel Freiberger, Mostafa Gamal, Vito
+Gamberini, Mostafa Garnal, Benjamin Gartner, Christian Gelinek, Richard E
+George, Peter Gerst, Glen Gibb, Michael Gielda, Barbara Gigerl, Nimrod
+Gileadi, Shankar Giri, Dan Gisselquist, Szymon Gizler, Petr Gladkikh, Sam
+Gladstone, Mariusz Glebocki, Embedded Go, Andrew Goessling, Amir Gonnen,
+Chitlesh Goorah, Tomasz Gorochowik, Kai Gossner, Tarik Graba, Sergi
+Granell, Al Grant, Nathan Graybeal, Alexander Grobman, Qian Gu, Xuan Guo,
+Prabhat Gupta, Deniz Güzel, Driss Hafdi, Abdul Hameed, Neil Hamilton, James
+Hanlon, Tang Haojin, Øyvind Harboe, Jannis Harder, David Harris, Junji
+Hashimoto, Thomas Hawkins, Mitch Hayenga, Harald Heckmann, Robert Henry,
+Stephen Henry, Sebastian Hesselbarth, David Hewson, Jamey Hicks, Joel
+Holdsworth, Andrew Holme, Peter Holmes, Hiroki Honda, Alex Hornung,
+Pierre-Henri Horrein, David Horton, Peter Horvath, Jae Hossell, Kuoping
+Hsu, Shou-Li Hsu, Teng Huang, Steven Hugg, Alan Hunter, James Hutchinson,
+Tim Hutt, Ehab Ibrahim, Edgar E. Iglesias, Shahid Ikram, Jamie Iles, Fuad
+Ismail, Vighnesh Iyer, Ben Jackson, Daniel Jacques, Shareef Jalloq, Marlon
+James, Krzysztof Jankowski, Eyck Jentzsch, HyungKi Jeong, Iztok Jeras,
+Pawel Jewstafjew, Alexandre Joannou, James Johnson, Christophe Joly, Justin
+Jones, William D. Jones, Abe Jordan, Larry Darryl Lee Jr., Franck Jullien,
+James Jung, Mike Kagen, Arthur Kahlich, Kaalia Kahn, Guy-Armand Kamendje,
+Vasu Kandadi, Yoshitomo Kaneda, Kanad Kanhere, Patricio Kaplan, Pieter
+Kapsenberg, Rafal Kapuscik, Ralf Karge, Per Karlsson, Dan Katz, Sol
+Katzman, Ian Kennedy, Ami Keren, Fabian Keßler, Michael Killough, Sun Kim,
+Jonathan Kimmitt, Olof Kindgren, Kevin Kiningham, Cameron Kirk, Dan
+Kirkham, Aleksander Kiryk, Sobhan Klnv, Gernot Koch, Jack Koenig, Soon Koh,
+Nathan Kohagen, Steve Kolecki, Brett Koonce, Will Korteland, Andrei
+Kostovski, Wojciech Koszek, Varun Koyyalagunta, Arkadiusz Kozdra, Markus
+Krause, David Kravitz, Adam Krolnik, Roland Kruse, Mahesh Kumashikar,
+Andreas Kuster, Sergey Kvachonok, Charles Eric LaForest, Kevin Laeufer, Ed
+Lander, Steve Lang, Pierre Laroche, Stephane Laurent, Walter Lavino,
+Christian Leber, David Ledger, Alex Lee, Larry Lee, Yoda Lee, Michaël
+Lefebvre, Dag Lem, Igor Lesik, John Li, Kay Li, Zixi Li, Davide Libenzi,
+Nandor Licker, Eivind Liland, Ícaro Lima, Kevin Lin, Yu-Sheng Lin, Charlie
+Lind, Andrew Ling, Jiuyang Liu, Joey Liu, Paul Liu, Derek Lockhart, Jake
+Longo, Geza Lore, Arthur Low, Jose Loyola, Stefan Ludwig, Dan Lussier,
+Konstantin Lübeck, Fred Ma, Liwei Ma, Duraid Madina, Oleh Maksymenko, Affe
+Mao, Julien Margetts, Chick Markley, Alexis Marquet, Mark Marshall, Alfonso
+Martinez, Unai Martinez-Corral, Adrien Le Masle, Yves Mathieu, Vladimir
+Matveyenko, Patrick Maupin, Stan Mayer, Jordan McConnon, Conor McCullough,
+Jason McMullan, Elliot Mednick, Yuan Mei, Andy Meier, Luiza de Melo,
+Rodrigo A. Melo, Benjamin Menküc, Jake Merdich, David Metz, Wim Michiels,
+Miodrag Milanović, Darryl Miles, Kevin Millis, Andrew Miloradovsky, David
+Moberg, Wai Sum Mong, Peter Monsson, Anthony Moore, Sean Moore, Stuart
+Morris, Dennis Muhlestein, John Murphy, Matt Myers, Nathan Myers, Richard
+Myers, Alex Mykyta, Eric Müller, Dimitris Nalbantis, Peter Nelson, Felix
+Neumärker, Bob Newgard, Cong Van Nguyen, Rachit Nigam, Toru Niina, Paul
+Nitza, Yossi Nivin, Pete Nixon, Lisa Noack, Mark Nodine, Michael Nolan,
+Andrew Nolte, Joseph Nwabueze, Kevin Nygaard, Kuba Ober, Krzysztof
+Obłonczek, Andreas Olofsson, Baltazar Ortiz, Aleksander Osman, Don Owen,
+Tim Paine, Deepa Palaniappan, James Pallister, Vassilis Papaefstathiou,
+Sanggyu Park, Brad Parker, Risto Pejašinović, Seth Pellegrino, Morten Borup
+Petersen, Dan Petrisko, Wesley Piard, Maciej Piechotka, David Pierce, Cody
+Piersall, T. Platz, Michael Platzer, Dominic Plunkett, Nolan Poe, David
+Poole, Michael Popoloski, Roman Popov, Aylon Chaim Porat, Oron Port, Rich
+Porter, Rick Porter, Stefan Post, Niranjan Prabhu, Damien Pretet, Harald
+Pretl, Bill Pringlemeir, Usha Priyadharshini, Mark Jackson Pulver, Prateek
+Puri, Han Qi, Jiacheng Qian, Marshal Qiao, Raynard Qiao, Yujia Qiao, Jasen
+Qin, Frank Qiu, Nandu Raj, Kamil Rakoczy, Danilo Ramos, Drew Ranck, Chris
+Randall, Anton Rapp, Josh Redford, Odd Magne Reitan, Frédéric Requin,
+Dustin Richmond, Samuel Riedel, Alberto Del Rio, Eric Rippey, Narcis Rodas,
+Oleg Rodionov, Ludwig Rogiers, Paul Rolfe, Michail Rontionov, Arjen
+Roodselaar, Arthur Rosa, Tobias Rosenkranz, Yernagula Roshit, Ryszard
+Rozak, Huang Rui, Graham Rushton, Jan Egil Ruud, Denis Rystsov, Pawel
+Sagan, Robert Sammelson, Adrian Sampson, John Sanguinetti, Josep Sans, Luca
+Sasselli, Martin Scharrer, Martin Schmidt, Jonathan Schröter, Julie
+Schwartz, Galen Seitz, Sam Shahrestani, Joseph Shaker, Mark Shaw, Salman
+Sheikh, Zhou Shen, Hao Shi, James Shi, Michael Shinkarovsky, Rafael
+Shirakawa, Jeffrey Short, S Shuba, Fan Shupei, Ethan Sifferman, Anderson
+Ignacio da Silva, Rodney Sinclair, Ameya Vikram Singh, Sanjay Singh, Frans
+Skarman, Nate Slager, Steven Slatter, Mladen Slijepcevic, Brian Small,
+Garrett Smith, Gus Smith, Tim Snyder, Maciej Sobkowski, Stan Sokorac, Alex
+Solomatnikov, Flavien Solt, Wei Song, Trefor Southwell, Martin Stadler, Art
+Stamness, David Stanford, Krzysztof Starecki, Baruch Sterin, John
+Stevenson, Pete Stevenson, Patrick Stewart, Rob Stoddard, Tood Strader,
+John Stroebel, Ray Strouble, Sven Stucki, Howard Su, Udaya Raj Subedi,
+Emerson Suguimoto, Gene Sullivan, Qingyao Sun, Renga Sundararajan, Kuba
+Sunderland-Ober, Gustav Svensk, Rupert Swarbrick, Jevin Sweval, Paul
+Swirhun, Shinya T-Y, Thierry Tambe, Jesse Taube, Drew Taussig, Christopher
+Taylor, Greg Taylor, Jose Tejada, Sören Tempel, Peter Tengstrand, Wesley
+Terpstra, Rui Terra, Stefan Thiede, Justin Thiel, Gary Thomas, Ian
+Thompson, Kevin Thompson, Mike Thyer, Hans Tichelaar, Tudor Timi, Viktor
+Tomov, Steve Tong, Topa Topino, Àlex Torregrosa, Topa Tota, Michael
+Tresidder, Lenny Truong, David Turner, Neil Turton, Hideto Ueno, Mike
+Urbach, Joel Vandergriendt, Srini Vemuri, Srinivasan Venkataramanan, Yuri
+Victorovich, Ivan Vnučec, Bogdan Vukobratovic, Holger Waechtler, Philipp
+Wagner, Stefan Wallentowitz, Johannes Walter, CY Wang, Chuxuan Wang, Shawn
+Wang, Yilou Wang, Zhanglei Wang, Greg Waters, Thomas Watts, Eugene Weber,
+John Wehle, Tianrui Wei, David Welch, Thomas J Whatson, Martin Whitaker,
+Marco Widmer, Leon Wildman, Daniel S. Wilkerson, Daniel Wilkerson, Gerald
+Williams, Trevor Williams, Don Williamson, Jan Van Winkel, Jeff Winston,
+Joshua Wise, Clifford Wolf, Johan Wouters, Paul Wright, Tobias Wölfel,
+Junyi Xi, Ding Xiaoliang, Liu Xiaoyi, Jinyan Xu, Mandy Xu, Pengcheng Xu,
+Shanshan Xu, Yan Xu, Yinan Xu, SU YANG, Felix Yan, Jiaxun Yang, Luke Yang,
+Amir Yazdanbakhsh, Chentai (Seven) Yuan, Florian Zaruba, Mat Zeno, Keyi
+Zhang, Xi Zhang, Huanghuang Zhou, Yike Zhou, Jiamin Zhu, Ryan Ziegler.

 Thanks to them, and all those we've missed mentioning above, and to those
 whom have wished to remain anonymous.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *********
@@ -8,7 +8,7 @@ Copyright
 The latest version of Verilator is available from `https://verilator.org
 <https://verilator.org>`_.

-Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+Copyright 2003-2025 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 Deprecations
@@ -6,38 +6,17 @@ Deprecations

 The following deprecated items are scheduled for future removal:

-C++11 compiler support
+C++14 compiler support
  Verilator currently requires a C++20 or newer compiler for timing, and a
-  C++11 or newer compiler for no-timing.
-
-  Verilator will require C++14 or newer compilers for both compiling
-  Verilator and compiling Verilated models with --no-timing no sooner than
-  January 2023.
+  C++14 or newer compiler for both compiling Verilator and compiling
+  Verilated models with --no-timing.

  Verilator will require C++20 or newer compilers for both compiling
-  Verilator and compiling all Verilated models no sooner than January 2025.
+  Verilator and compiling all Verilated models no sooner than May 2025.
+  (Likely to be removed shortly after GitHub removes Ubuntu 20.04
+  continuous-integration action runners, which are used to test the older
+  C++ standard).

-Verilated_heavy.h
-  The legacy "verilated_heavy.h" include was replaced with just including
-  "verilated.h". Verilated_heavy.h is planned for removal no sooner than
-  July 2022.
-
-Option `--cdc`
-  The experimental `--cdc` option is believed to be generally unused and is
-  planned for removal no sooner than January 2023.
-
-Option `-O<letter>`
-  The debug `-O<letter>` options have been replaced with
-  `-fno-<optimization>` debug options to match GCC. The old options are
-  planned for removal no sooner than June 2023.
-
-Option `--prof-threads`
-  The `--prof-threads` option has been superseded by the `--prof-exec` and
-  `--prof-pgo` options and is planned for removal no sooner than April 2023.
-
-Verilated model options `+verilator+prof+threads+*`
-  The `+verilator+prof+threads+start`, `+verilator+prof+threads+window` and
-  `+verilator+prof+threads+file` options have been superseded by the
-  `+verilator+prof+exec+start`, `+verilator+prof+exec+window` and
-  `+verilator+prof+exec+file` options respectively and are planned for removal
-  no sooner than April 2023.
+XML output
+  Verilator currently supports XML parser output (enabled with `--xml-only`).
+  Support for `--xml-*` options will be deprecated no sooner than January 2026.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 Environment
@@ -29,7 +29,7 @@ associated programs.
 .. option:: OBJCACHE

   Optionally specifies a caching or distribution program to place in front
-   of all runs of the C++ compiler.  For example, "ccache".  If using
+   of all runs of the C++ compiler.  For example, "ccache" or "sccache".  If using
   :command:`distcc` or :command:`icecc`/:command:`icecream`, they would
   generally be run under :command:`ccache`; see the documentation for
   those programs.  If OBJCACHE is not set, and at configure time ccache
@@ -91,9 +91,83 @@ associated programs.

 .. option:: VERILATOR_ROOT

-   Specifies the directory containing the distribution kit.  This is used
-   to find the executable, Perl library, and include files.  If not
-   specified, it will come from a default optionally specified at configure
-   time (before Verilator was compiled).  It should not be specified if
-   using a pre-compiled Verilator package as the hard-coded value should be
-   correct.  See :ref:`Installation`.
+   The ``VERILATOR_ROOT`` environment variable is used in several places:
+
+   * At ``./configure`` time: If set, it is embedded into the binary, and
+     at runtime if ``VERILATOR_ROOT`` is not set, the embedded value is
+     used for the runtime default.
+
+   * When ``verilator`` is run: If ``VERILATOR_ROOT`` is set it will be
+     used to find the ``verilator_bin`` executable (this is the actual
+     Verilator binary; ``verilator`` is a Perl wrapper). If not set, the
+     ``verilator`` script uses other methods to find ``verilator_bin``
+     (looking in the same directory and falling back to ``$PATH``).
+
+   * When ``make`` is run on the Makefile generated by ``verilator``: The
+     value of ``VERILATOR_ROOT`` (falling back to the value embedded in the
+     binary if not set) is used to find the include files
+     (``include/verilated.mk``).
+
+   If you are using a pre-compiled Verilator package, you should not need
+   to set ``VERILATOR_ROOT`` - the value embedded in the binary should be
+   correct.  In fact this option *does not work* with Verilator packages
+   that have been installed with ``make install``. If a Verilator package
+   has been installed using ``./configure --prefix=/some/path && make
+   install`` and then moved to another location, you cannot use
+   ``VERILATOR_ROOT`` to point to the new version.
+
+   See :ref:`Installation` for more details.
+
+.. option:: VERILATOR_SOLVER
+
+   If set, the command to run as a constrained randomization backend, such
+   as :command:`cvc4 --lang=smt2 --incremental`.  If not specified, it will use
+   the one supplied or found during configure, or :command:`z3 --in` if empty.
+
+.. option:: VERILATOR_VALGRIND
+
+   If set, the command to run when using the :vlopt:`--valgrind` option, such as
+   "valgrind --tool=callgrind".  If not specified, it will use "valgrind".
+
+
+Make Variables
+==============
+
+This section describes the make variables used by Verilator. These may be
+set by passing them to make e.g. ``make CXX=my-gcc ...``.
+
+.. option:: AR
+
+   Optionally overrides the default :command:`ar` (archive) binary used by
+   the Verilated makefiles. If AR is not set, the version found at
+   configure time is used.
+
+.. option:: CXX
+
+   Optionally overrides the default compiler binary used by the Verilated
+   makefiles. If CXX is not set, the version found at configure time is
+   used.  Note the default flags passed to the compiler are determined at
+   configuration time, so changing the CXX compiler version using this
+   variable, as opposed to passing it at configuration time, may not give
+   desired results.
+
+.. option:: LINK
+
+   Optionally overrides the default linker binary used by the Verilated
+   makefiles. If LINK is not set, the version found at configure time is
+   used.  Note the default flags passed to the linker are determined at
+   configuration time, so changing the LINK version using this variable, as
+   opposed to passing it at configuration time, may not give desired
+   results.
+
+.. option:: PERL
+
+   Optionally overrides the default :command:`perl` binary used by the
+   Verilated makefiles. If PERL is not set, the version found at configure
+   time, and compiled into the Verilator binary, is used.
+
+.. option:: PYTHON3
+
+   Optionally overrides the default :command:`python3` binary used by the
+   Verilated makefiles. If PYTHON3 is not set, the version found at
+   configure time is used.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Example Create-Binary Execution:
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Example C++ Execution:
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 First you need Verilator installed, see :ref:`Installation`.  In brief, if
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Examples in the Distribution:
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Example SystemC Execution:
@@ -28,6 +28,7 @@ Now, let's create an example Verilog, and SystemC wrapper file:

     cat >sc_main.cpp <<'EOF'
       #include "Vour.h"
+       using namespace sc_core;
       int sc_main(int argc, char** argv) {
           Verilated::commandArgs(argc, argv);
           sc_clock clk{"clk", 10, SC_NS, 0.5, 3, SC_NS, true};
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Examples:
@@ -9,6 +9,7 @@ Examples

 This section covers the following examples:

+* :ref:`Example Create-Binary Execution`
 * :ref:`Example C++ Execution`
 * :ref:`Example SystemC Execution`
 * :ref:`Examples in the Distribution`
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Simulation Runtime Arguments:
@@ -19,11 +19,20 @@ Summary:
   .. include:: ../_build/gen/args_verilated.rst


+.. option:: +verilator+coverage+file+<filename>
+
+   When a model was Verilated using :vlopt:`--coverage`, sets the filename
+   to write coverage data into.  Defaults to :file:`coverage.dat`.
+
 .. option:: +verilator+debug

   Enable simulation runtime debugging.  Equivalent to
   :vlopt:`+verilator+debugi+4 <+verilator+debugi+\<value\>>`.

+   To be useful, the model typically must first be compiled with debug
+   capabilities by Verilating with :vlopt:`--runtime-debug` or `-CFLAGS
+   -DVL_DEBUG=1`.
+
 .. option:: +verilator+debugi+<value>

   Enable simulation runtime debugging at the provided level.
@@ -31,8 +40,8 @@ Summary:
 .. option:: +verilator+error+limit+<value>

   Set number of non-fatal errors (e.g. assertion failures) before exiting
-   simulation runtime. Also affects number of $stop calls needed before
-   exit. Defaults to 1.
+   simulation runtime. Also affects number of `$stop` calls needed before
+   exit. Does not affect `$fatal`. Defaults to 1.

 .. option:: +verilator+help

@@ -64,15 +73,18 @@ Summary:

 .. option:: +verilator+prof+threads+file+<filename>

-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+file+\<filename\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+file+\<filename\>`

 .. option:: +verilator+prof+threads+start+<value>

-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+start+\<value\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+start+\<value\>`

 .. option:: +verilator+prof+threads+window+<value>

-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+window+\<value\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+window+\<value\>`

 .. option:: +verilator+prof+vlt+file+<filename>

@@ -80,6 +92,11 @@ Summary:
   profile-guided optimization data runtime filename to dump to.  Defaults
   to :file:`profile.vlt`.

+.. option:: +verilator+quiet
+
+   Disable printing the simulation summary report, see :ref:`Simulation
+   Summary Report`.
+
 .. option:: +verilator+rand+reset+<value>

   When a model was Verilated using
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 verilator Arguments
@@ -51,6 +51,8 @@ Summary:

 .. option:: +1800-2017ext+<ext>

+.. option:: +1800-2023ext+<ext>
+
   Specifies the language standard to be used with a specific filename
   extension, <ext>.

@@ -85,7 +87,11 @@ Summary:

 .. option:: --assert

-   Enable all assertions.
+   Enable all assertions. Implies :vlopt:`--assert-case`.
+
+.. option:: --assert-case
+
+   Enable unique/unique0/priority case related checks.

 .. option:: --autoflush

@@ -125,9 +131,12 @@ Summary:

   After generating the SystemC/C++ code, Verilator will invoke the
   toolchain to build the model library (and executable when :vlopt:`--exe`
-   is also used). Verilator manages the build itself, and for this --build
+   is also used).  Verilator manages the build itself, and for this --build
   requires GNU Make to be available on the platform.

+   :vlopt:`--build` cannot be specified when using :vlopt:`-E`,
+   :vlopt:`--dpi-hdr-only`, :vlopt:`--lint-only`, or :vlopt:`--xml-only`.
+
 .. option:: --build-dep-bin <filename>

   Rarely needed.  When a dependency (.d) file is created, this filename
@@ -155,18 +164,6 @@ Summary:
   Specify C++ without SystemC output mode; see also the :vlopt:`--sc`
   option.

-.. option:: --cdc
-
-   Permanently experimental.  Perform some clock domain crossing checks and
-   issue related warnings (CDCRSTLOGIC) and then exit; if warnings other
-   than CDC warnings are needed, make a second run with
-   :vlopt:`--lint-only`.  Additional warning information is also written to
-   the file :file:`<prefix>__cdc.txt`.
-
-   Currently only checks some items that other CDC tools missed; if you are
-   interested in adding more traditional CDC checks, please contact the
-   authors.
-
 .. option:: -CFLAGS <flags>

   Add specified C compiler argument to the generated makefiles. For
@@ -204,9 +201,10 @@ Summary:

 .. option:: --compiler <compiler-name>

-   Enables workarounds for the specified C++ compiler (list below).
-   This does not change any performance tuning options, but it may
-   in the future.
+   Enables workarounds for the specified C++ compiler (list below).  This
+   does not change any performance tuning options, but it may in the
+   future.  This also does not change default compiler flags; these are
+   determined when Verilator was configured.

   clang
     Tune for clang.  This may reduce execution speed as it enables several
@@ -224,6 +222,13 @@ Summary:
     expressions into sub-expressions to avoid error C1009, and breaking
     deep blocks into functions to avoid error C1061.

+.. option:: --compiler-include <header-path>
+
+   Specifies additional headers to be included in the final PCH header.
+   It is required to add them to this header, due to compilers'
+   limitation that allow only one precompiled header per compilation.
+   Use this instead of ::vlopt:`-CFLAGS` with `-include <header-path>`.
+
 .. option:: --converge-limit <loops>

   Rarely needed.  Specifies the maximum number of runtime iterations
@@ -232,7 +237,17 @@ Summary:
 .. option:: --coverage

   Enables all forms of coverage, an alias for :vlopt:`--coverage-line`
-   :vlopt:`--coverage-toggle` :vlopt:`--coverage-user`.
+   :vlopt:`--coverage-toggle` :vlopt:`--coverage-expr` :vlopt:`--coverage-user`.
+
+.. option:: --coverage-expr
+
+   Enables expression coverage analysis. See :ref:`Expression Coverage`.
+
+.. option:: --coverage-expr-max <value>
+
+   Rarely needed.  Specifies the maximum number of permutations able to be
+   covered for a given expression.  Defaults to 32.  Increasing may slow
+   coverage simulations and make analyzing the results unwieldy.

 .. option:: --coverage-line

@@ -313,19 +328,47 @@ Summary:
   detailed messages.  See :vlopt:`--debug` for other implications of
   enabling debug.

+.. option:: --decorations none
+
+.. option:: --decorations medium
+
+.. option:: --decorations node
+
+   When creating output Verilated code, set level of comment and whitespace
+   decoration.
+
+   With "--decorations none",
+     Minimize comments, white space, symbol names, and other decorative
+     items, at the cost of reduced readability. This may assist C++ compile
+     times. This will not typically change the ultimate model's
+     performance, but may in some cases.  See also :vlopt:`--no-decoration`
+     option.
+
+   With "--decorations medium",
+     The default, put a small amount of comments and white space, for
+     typical level of readability.
+
+   With "--decorations node",
+     Include comments indicating what caused generation of the following
+     text, including what node pointer (corresponding to
+     :vlopt:`--dump-tree` .tree printed data), and the source Verilog
+     filename and line number.  If subsequent following statements etc have
+     the same filename/line number these comments are omitted.  This
+     enables easy debug when looking at the C++ code to determine what
+     Verilog source may be related.  As node pointers are not stable
+     between different Verilator runs, this may harm compile caching and
+     should only be used for debug.
+
 .. option:: --no-decoration

-   When creating output Verilated code, minimize comments, white space,
-   symbol names, and other decorative items, at the cost of reduced
-   readability. This may assist C++ compile times. This will not typically
-   change the ultimate model's performance, but may in some cases.
+   Alias for ``--decorations none``.

 .. option:: --default-language <value>

   Select the language used by default when first processing each
   Verilog file.  The language value must be "VAMS", "1364-1995",
   "1364-2001", "1364-2001-noconfig", "1364-2005", "1800-2005",
-   "1800-2009", "1800-2012", "1800-2017", or "1800+VAMS".
+   "1800-2009", "1800-2012", "1800-2017", "1800-2023", or "1800+VAMS".

   Any language associated with a particular file extension (see the
   various +<lang>*\ ext+ options) will be used in preference to the
@@ -338,7 +381,7 @@ Summary:
   ``+<lang>ext+`` options should be used.

   If no language is specified, either by this option or ``+<lang>ext+``
-   options, then the latest SystemVerilog language (IEEE 1800-2017) is
+   options, then the latest SystemVerilog language (IEEE 1800-2023) is
   used.

 .. option:: +define+<var>=<value>
@@ -387,6 +430,12 @@ Summary:
   :vlopt:`--debug --no-dump-tree <--dump-tree>` may be useful if the dump
   files are large and not desired.

+.. option:: --dump-tree-json
+
+   Rarely needed.  Enable dumping Ast .json.tree debug files with dumping level 3,
+   which dumps the standard critical stages.  For details on the format, see
+   the Verilator Internals manual.
+
 .. option:: --dump-tree-dot

   Rarely needed.  Enable dumping Ast .tree.dot debug files in Graphviz
@@ -422,6 +471,11 @@ Summary:
   Rarely needed - for developer use.  Set internal Ast dumping level
   globally to the specified value.

+.. option:: --dumpi-tree-json <level>
+
+   Rarely needed - for developer use.  Set internal Ast JSON dumping level
+   globally to the specified value.
+
 .. option:: --dumpi-<srcfile> <level>

   Rarely needed - for developer use. Set the dumping level in the
@@ -434,10 +488,16 @@ Summary:
   Preprocess the source code, but do not compile, similar to C++
   preprocessing using :command:`gcc -E`.  Output is written to standard
   out.  Beware of enabling debugging messages, as they will also go to
-   standard out.
+   standard out. See :vlopt:`--no-std`, which is implied by this.

-   See also :vlopt:`--dump-defines`, :vlopt:`-P`, and
-   :vlopt:`--pp-comments` options.
+   See also :vlopt:`--dump-defines`, :vlopt:`-P`, :vlopt:`--pp-comments`
+   and :vlopt:`--preproc-resolve` options.
+
+.. option:: --emit-accessors
+
+   Emit getter and setter methods for each top-level signal in the
+   model top class. Signals are still available as public members,
+   but with the `__Vm_sig_` prefix.

 .. option:: --error-limit <value>

@@ -539,10 +599,18 @@ Summary:

 .. option:: -fno-expand

+.. option:: -fno-func-opt
+
+.. option:: -fno-func-opt-balance-cat
+
+.. option:: -fno-func-opt-split-cat
+
 .. option:: -fno-gate

 .. option:: -fno-inline

+.. option:: -fno-inline-funcs
+
 .. option:: -fno-life

 .. option:: -fno-life-post
@@ -559,6 +627,8 @@ Summary:

 .. option:: -fno-reorder

+.. option:: -fno-slice
+
 .. option:: -fno-split

 .. option:: -fno-subst
@@ -673,6 +743,13 @@ Summary:
   :option:`/*verilator&32;hier_block*/` metacomment is ignored.  See
   :ref:`Hierarchical Verilation`.

+.. option:: --hierarchical-params-file <filename>
+
+   Internal flag inserted used during :vlopt:`--hierarchical`; specifies
+   name of hierarchical parameters file for deparametrized modules with
+   :option:`/*verilator&32;hier_block*/` metacomment. See
+   :ref:`Hierarchical Verilation`.
+
 .. option:: -I<dir>

   See :vlopt:`-y`.
@@ -684,7 +761,10 @@ Summary:

 .. option:: +incdir+<dir>

-   See :vlopt:`-y`.
+   See :vlopt:`-y`.  Unlike with :vlopt:`-y`, multiple directories may be
+   specified separated with a `+` symbol; this is for Verilog-XL
+   compatibility and is not recommended usage as this is not supported by
+   some third-party tools.

 .. option:: --inline-mult <value>

@@ -707,9 +787,42 @@ Summary:
 .. option:: -j [<value>]

   Specify the level of parallelism for :vlopt:`--build` if
-   :vlopt:`--build-jobs` isn't provided. If zero, uses the number of threads
-   in the current hardware. Otherwise, the <value> must be a positive
-   integer specifying the maximum number of parallel build jobs.
+   :vlopt:`--build-jobs` isn't provided, and the internal compilation steps
+   of Verilator if :vlopt:`--verilate-jobs` isn't provided. If zero, uses
+   the number of threads in the current hardware. Otherwise, must be a
+   positive integer specifying the maximum number of parallel build jobs.
+
+.. option:: --json-only
+
+   Create JSON output only, do not create any other output.
+
+   The JSON format is intended to be used to leverage Verilator's parser and
+   elaboration to feed to other downstream tools. For details on the format, see
+   the Verilator Internals manual. Be aware that the JSON
+   format is still evolving; there will be some changes in future versions.
+
+   This option disables some more aggressive transformations and dumps only
+   the final state of the AST. For more granular and unaltered dumps, meant
+   mainly for debugging see :vlopt:`--dump-tree-json`.
+
+.. option:: --json-only-meta-output <filename>
+
+   Specifies the filename for the metadata output file (`.tree.meta.json`) of --json-only.
+   Using this option automatically sets :vlopt:`--json-only`.
+
+.. option:: --json-only-output <filename>
+
+   Specifies the filename for the main output file (`.tree.json`) of --json-only.
+   Using this option automatically sets :vlopt:`--json-only`.
+
+.. option:: --no-json-edit-nums
+
+   Don't dump edit number in .tree.json files.  This may make the file more
+   run-to-run stable for easier comparison.
+
+.. option:: --no-json-ids
+
+   Don't use short identifiers instead of addresses/paths in .tree.json.

 .. option:: --l2-name <value>

@@ -779,6 +892,11 @@ Summary:
   If the design is not to be completely Verilated, see also the
   :vlopt:`--bbox-sys` and :vlopt:`--bbox-unsup` options.

+.. option:: --localize-max-size <value>
+
+   Rarely needed.  Set the maximum variable size in bytes for it to be
+   subject to localizing-to-stack optimization.  Defaults to 1024.
+
 .. option:: --make <build-tool>

   Generates a script for the specified build tool.
@@ -819,6 +937,13 @@ Summary:

   See also :vlopt:`--binary`.

+.. option:: --main-top-name <string>
+
+   Specify the name passed to the Verilated model being constructed, in the
+   generated C++ main() function.
+
+   If the string ``"-"`` is used, no top level scope is added.
+
 .. option:: --max-num-width <value>

   Set the maximum number literal width (e.g., in 1024'd22 this
@@ -888,6 +1013,22 @@ Summary:
   delayed assignments.  This option should only be used when suggested by
   the developers.

+.. option:: --output-groups <numfiles>
+
+   Enables concatenating the output .cpp files into the given number of
+   effective output .cpp files.  This is useful if the compiler startup
+   overhead from compiling many small files becomes unacceptable,
+   which can happen in designs making extensive use of SystemVerilog classes,
+   templates or generate blocks.
+
+   Using :vlopt:`--output-groups` can adversely impact caching and stability
+   (as in reproducibility) of compiled code.  Compilation of larger .cpp
+   files also has higher memory requirements.  Too low values might result in
+   swap thrashing with large designs, high values give no benefits.  The
+   value should range from 2 to 20 for small to medium designs.
+
+   Default is zero, which disables this feature.
+
 .. option:: --output-split <statements>

   Enables splitting the output .cpp files into multiple outputs.  When a
@@ -940,6 +1081,13 @@ Summary:
   :option:`/*verilator&32;sc_bv*/` metacomment to select specific ports to
   be sc_bv.

+.. option:: --pins-inout-enables
+
+   Specifies that the __en and __out outputs will always be created for
+   inouts in the top-level module. The __en variable has a one in a bit
+   position to indicate the corresponding bit of the __out variable has
+   a value being driven from within the Verilated model.
+
 .. option:: --pins-sc-uint

   Specifies SystemC inputs/outputs greater than 2 bits wide should use
@@ -947,6 +1095,10 @@ Summary:
   :vlopt:`--pins-sc-biguint` combination, it results in sc_uint being used
   between 2 and 64 and sc_biguint being used between 65 and 512.

+.. option:: --pins-sc-uint-bool
+
+   Specifies SystemC inputs/outputs one bit wide should use sc_uint<1>.
+
 .. option:: --pins-sc-biguint

   Specifies SystemC inputs/outputs greater than 65 bits wide should use
@@ -1000,6 +1152,20 @@ Summary:
   prepended to the name of the :vlopt:`--top` option, or V prepended to
   the first Verilog filename passed on the command line.

+.. option:: --preproc-resolve
+
+   With :vlopt:`-E`, resolve referenced instance modules, to include
+   preprocessed output of submodules.  Used to convert a multi-file design
+   into a single output file.
+
+   See :vlopt:`-E`.
+
+.. option:: --preproc-token-limit <value>
+
+   Rarely needed. Configure the limit of the number of tokens Verilator
+   can process on a single line to prevent infinite loops and other hangs.
+   Defaults to 40000 tokens.
+
 .. option:: --private

   Opposite of :vlopt:`--public`.  This is the default; this option exists for
@@ -1037,7 +1203,7 @@ Summary:

 .. option:: --prof-threads

-   Deprecated. Same as --prof-exec and --prof-pgo together.
+   Removed in 5.020. Was an alias for --prof-exec and --prof-pgo together.

 .. option:: --protect-ids

@@ -1101,6 +1267,13 @@ Summary:
   module specifically enabled it with
   :option:`/*verilator&32;inline_module*/`.

+
+.. option:: --public-depth <level>
+
+   Enables public as with :vlopt:`--public-flat-rw`, but only to the specified depth of modules.
+   It operates at the module maximum level, so if a module's cells are A.B.X and A.X, the
+   a --public-depth 3 must be used to make module X public, and both A.B.X and A.X will be public.
+
 .. option:: --public-flat-rw

   Declares all variables, ports, and wires public as if they had
@@ -1112,16 +1285,39 @@ Summary:
   marking only those signals that need public_flat_rw is typically
   significantly better performing.

+.. option:: --public-ignore
+
+   Ignore all :code:`/*verilator public* */` metacomments. This is useful
+   for speed-optimizing VPI builds where VPI is not being used.  This only
+   affects metacomments; options such as :vlopt:`--public`,
+   :vlopt:`--public-depth`, etc. work normally.
+
+.. option:: --public-params
+
+   Declares all parameters public as if they had
+   :code:`/*verilator public_flat_rd*/`
+   metacomments.
+
+
 .. option:: -pvalue+<name>=<value>

   Overwrites the given parameter(s) of the top-level module. See
   :vlopt:`-G <-G<name>>` for a detailed description.

+.. option:: --quiet
+
+   Alias for :vlopt:`--quiet-exit` :vlopt:`--quiet-stats`.
+
 .. option:: --quiet-exit

   When exiting due to an error, do not display the "Exiting due to Errors"
   nor "Command Failed" messages.

+.. option:: --quiet-stats
+
+   Disable printing the Verilation statistics report, see :ref:`Verilation
+   Summary Report`.
+
 .. option:: --relative-includes

   When a file references an include file, resolve the filename relative to
@@ -1172,6 +1368,40 @@ Summary:
   Run Verilator and record with the :command:`rr` command.  See
   `https://rr-project.org <https://rr-project.org>`_.

+.. option:: --runtime-debug
+
+   Enable including debug assertions in the generated model. This may
+   significantly decrease model performance. This option will only work
+   with gcc/clang.
+
+   This option has the same effect as the following flags:
+
+   :vlopt:`--decorations node <--decorations>`
+     Instructs Verilator to add comments to the Verilated C++ code to
+     assist determining what Verilog code was responsible for each C++
+     statement.
+
+   ``-CFLAGS -ggdb  -LDFLAGS -ggdb``
+     Instructs the compiler and linker to enable debugger symbols.
+
+   ``-CFLAGS -fsanitize=address,undefined  -LDFLAGS -fsanitize=address,undefined``
+     Instructs the compiler and linker to enable the address sanitizer, and
+     undefined behavior sanitizer.
+
+   ``-CFLAGS -D_GLIBCXX_DEBUG``
+     Instructs the compiler to enable C++ library (glibc) internal
+     assertions to find library-misuse issues.
+
+   ``-CFLAGS -DVL_DEBUG=1``
+     Instructs the compiler to enable Verilator's runtime assertions and
+     debug capabilities.  To enable debug print messages at runtime, see
+     :vlopt:`+verilator+debug`.
+
+   The :vlopt:`-CFLAGS` and/or :vlopt:`-LDFLAGS` options used here pass the
+   following argument into the generated Makefile for use as compiler or
+   linker options respectively.  If you are using your own Makefiles, adapt
+   appropriately to pass the suggested flags to the compiler and linker.
+
 .. option:: --savable

   Enable including save and restore functions in the generated model.  See
@@ -1194,6 +1424,8 @@ Summary:

   Creates a dump file with statistics on the design in
   :file:`<prefix>__stats.txt`.
+   Also dumps DFG patterns to
+   :file:`<prefix>__stats_dfg_patterns__*.txt`.

 .. option:: --stats-vars

@@ -1201,6 +1433,24 @@ Summary:
   by size (plain :vlopt:`--stats` just gives a count).  See
   :vlopt:`--stats`, which is implied by this.

+.. option:: --no-std
+
+   Prevents parsing standard input files, alias for
+   :vlopt:`--no-std-package`, :vlopt:`--no-std-waiver`.  This may be extended
+   to prevent reading other standardized files in future versions.
+
+.. option:: --no-std-package
+
+   Prevents parsing standard `std::` package file.
+
+.. option:: --no-std-waiver
+
+   Prevents parsing standard lint waivers (`verilated_std_waiver.vlt`).
+
+.. option:: --no-stop-fail
+
+   Don't call $stop when assertion fails. Simulation will continue.
+
 .. option:: --structs-packed

   Converts all unpacked structures to packed structures, and issues an
@@ -1211,12 +1461,12 @@ Summary:
 .. option:: -sv

   Specifies SystemVerilog language features should be enabled; equivalent
-   to :vlopt:`--language 1800-2017 <--language>`.  This option is selected
+   to :vlopt:`--language 1800-2023 <--language>`.  This option is selected
   by default; it exists for compatibility with other simulators.

 .. option:: +systemverilogext+<ext>

-   A synonym for :vlopt:`+1800-2017ext+\<ext\>`.
+   A synonym for :vlopt:`+1800-2023ext+\<ext\>`.

 .. option:: --threads <threads>

@@ -1302,6 +1552,7 @@ Summary:
   This is not needed with standard designs with only one top.  See also
   :option:`MULTITOP` warning.

+
 .. option:: --trace

   Adds waveform tracing code to the model using VCD format. This overrides
@@ -1347,13 +1598,13 @@ Summary:
   Enable FST waveform tracing in the model. This overrides
   :vlopt:`--trace`.  See also :vlopt:`--trace-threads` option.

-.. option:: --trace-max-array *depth*
+.. option:: --trace-max-array <depth>

   Rarely needed.  Specify the maximum array depth of a signal that may be
   traced.  Defaults to 32, as tracing large arrays may greatly slow traced
   simulations.

-.. option:: --trace-max-width *width*
+.. option:: --trace-max-width <width>

   Rarely needed.  Specify the maximum bit width of a signal that may be
   traced.  Defaults to 256, as tracing large vectors may greatly slow
@@ -1370,7 +1621,7 @@ Summary:
   format constraints, this may result in significantly slower trace times
   and larger trace files.

-.. option:: --trace-threads *threads*
+.. option:: --trace-threads <threads>

   Enable waveform tracing using separate threads. This is typically faster
   in simulation runtime but uses more total compute. This option only
@@ -1380,6 +1631,17 @@ Summary:
   This option is accepted, but has absolutely no effect with
   :vlopt:`--trace`, which respects :vlopt:`--threads` instead.

+.. option:: --no-trace-top
+
+   Disables tracing for the input and output signals in the top wrapper which
+   Verilator adds to the design. The signals are still traced in the original
+   verilog top modules.
+
+   When combined with :option:`--main-top-name` set to "-" or when the name of
+   the top module is set to "" in its constructor, the generated trace file
+   will have the verilog top module as its root, rather than another module
+   added by Verilator.
+
 .. option:: --trace-underscore

   Enable tracing of signals or modules that start with an
@@ -1397,15 +1659,19 @@ Summary:

 .. option:: --unroll-count <loops>

-   Rarely needed.  Specifies the maximum number of loop iterations that may be
-   unrolled.  See also :option:`BLKLOOPINIT` warning.
+   Rarely needed.  Specifies the maximum number of loop iterations that may
+   be unrolled.  See also :option:`BLKLOOPINIT` warning, and
+   :option:`/*verilator&32;unroll_disable*/` and
+   :option:`/*verilator&32;unroll_full*/` metacomments.

-.. option:: --unroll-stmts *statements*
+.. option:: --unroll-stmts <statements>

   Rarely needed.  Specifies the maximum number of statements in a loop for
-   that loop to be unrolled. See also :option:`BLKLOOPINIT` warning.
+   that loop to be unrolled.  See also :option:`BLKLOOPINIT` warning, and
+   :option:`/*verilator&32;unroll_disable*/` and
+   :option:`/*verilator&32;unroll_full*/` metacomments.

-.. option:: --unused-regexp *regexp*
+.. option:: --unused-regexp <regexp>

   Rarely needed.  Specifies a simple regexp with \* and ? that, if a signal
   name matches, will suppress the :option:`UNUSED` warning.  Defaults to
@@ -1417,18 +1683,32 @@ Summary:
   into Verilator.  (Similar to :command:`perl -V`.)  See also
   :vlopt:`--getenv` option.

-.. option:: -v *filename*
+.. option:: -v <filename>

   Read the filename as a Verilog library.  Any modules in the file may be
   used to resolve instances in the top-level module, otherwise, they are
   ignored.  Note "-v" is relatively standard across Verilog tools.

+.. option:: --valgrind
+
+   Run Verilator under `Valgrind <https://valgrind.org/>`_.  The command may be
+   changed with :option:`VERILATOR_VALGRIND`.
+
 .. option:: --no-verilate

   When using :vlopt:`--build`, disable the generation of C++/SystemC code, and
   execute only the build. This can be useful for rebuilding the Verilated code
   produced by a previous invocation of Verilator.

+.. option:: --verilate-jobs [<value>]
+
+   Specify the level of parallelism for the internal compilation steps of
+   Verilator. If zero, uses the number of threads in the current hardware.
+   Otherwise, must be a positive integer specifying the maximum number of
+   parallel build jobs.
+
+   See also :vlopt:`-j`.
+
 .. option:: +verilog1995ext+<ext>

   Synonym for :vlopt:`+1364-1995ext+\<ext\>`.
@@ -1445,7 +1725,16 @@ Summary:

   Enable the use of VPI and linking against the :file:`verilated_vpi.cpp` files.

-.. option:: --waiver-output *filename*
+.. option:: --waiver-multiline
+
+   When using :vlopt:`--waiver-output \<filename\> <--waiver-output>`,
+   include a match expression that includes the entire multiline error
+   message as a match regular expression, as opposed to the default of only
+   matching the first line of the error message.  This provides a starting
+   point for creating complex waivers, but such generated waivers will
+   likely require editing for brevity before being reused.
+
+.. option:: --waiver-output <filename>

   Generate a waiver file that contains all waiver statements to suppress
   the warnings emitted during this Verilator run. This, in particular, is
@@ -1453,8 +1742,11 @@ Summary:
   them systematically.

   The generated file is in the Verilator Configuration format, see
-   :ref:`Configuration Files`, and can directly be consumed by
-   Verilator. The standard file extension is ".vlt".
+   :ref:`Configuration Files`. The standard file extension is ".vlt".
+   These files can directly be consumed by Verilator, typically by placing
+   the filename as part of the Verilator command line options. Waiver files
+   need to be listed on the command line before listing the files they are
+   waiving.

 .. option:: -Wall

@@ -1499,13 +1791,15 @@ Summary:

 .. option:: -Wno-lint

-   Disable all lint-related warning messages, and all style warnings.  This is
-   equivalent to ``-Wno-ALWCOMBORDER -Wno-BSSPACE -Wno-CASEINCOMPLETE
-   -Wno-CASEOVERLAP -Wno-CASEX -Wno-CASTCONST -Wno-CASEWITHX -Wno-CMPCONST -Wno-COLONPLUS
-   -Wno-IMPLICIT -Wno-IMPLICITSTATIC -Wno-LITENDIAN -Wno-PINCONNECTEMPTY
-   -Wno-PINMISSING -Wno-SYNCASYNCNET -Wno-UNDRIVEN -Wno-UNSIGNED
-   -Wno-UNUSEDGENVAR -Wno-UNUSEDPARAM -Wno-UNUSEDSIGNAL
-   -Wno-WIDTH`` plus the list shown for Wno-style.
+   Disable all lint-related warning messages, and all style warnings.  This
+   is equivalent to ``-Wno-ALWCOMBORDER`` ``-Wno-ASCRANGE``
+   ``-Wno-BSSPACE`` ``-Wno-CASEINCOMPLETE`` ``-Wno-CASEOVERLAP``
+   ``-Wno-CASEX`` ``-Wno-CASTCONST`` ``-Wno-CASEWITHX`` ``-Wno-CMPCONST``
+   ``-Wno-COLONPLUS`` ``-Wno-IMPLICIT`` ``-Wno-IMPLICITSTATIC``
+   ``-Wno-PINCONNECTEMPTY`` ``-Wno-PINMISSING`` ``-Wno-STATICVAR``
+   ``-Wno-SYNCASYNCNET`` ``-Wno-UNDRIVEN`` ``-Wno-UNSIGNED``
+   ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
+   ``-Wno-WIDTH``, plus the list shown for :vlopt:`-Wno-style`.

   It is strongly recommended that you clean up your code rather than using this
   option; it is only intended to be used when running test-cases of code
@@ -1513,12 +1807,13 @@ Summary:

 .. option:: -Wno-style

-   Disable all code style related warning messages (note that by default, they are
-   already disabled).  This is equivalent to ``-Wno-DECLFILENAME -Wno-DEFPARAM
-   -Wno-EOFNEWLINE -Wno-IMPORTSTAR -Wno-INCABSPATH -Wno-PINCONNECTEMPTY
-   -Wno-PINNOCONNECT -Wno-SYNCASYNCNET -Wno-UNDRIVEN
-   -Wno-UNUSEDGENVAR -Wno-UNUSEDPARAM -Wno-UNUSEDSIGNAL
-   -Wno-VARHIDDEN``.
+   Disable all code style related warning messages (note that by default,
+   they are already disabled).  This is equivalent to ``-Wno-DECLFILENAME``
+   ``-Wno-DEFPARAM`` ``-Wno-EOFNEWLINE`` ``-Wno-GENUNNAMED``
+   ``-Wno-IMPORTSTAR`` ``-Wno-INCABSPATH`` ``-Wno-PINCONNECTEMPTY``
+   ``-Wno-PINNOCONNECT`` ``-Wno-SYNCASYNCNET`` ``-Wno-UNDRIVEN``
+   ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
+   ``-Wno-VARHIDDEN``.

 .. option:: -Wpedantic

@@ -1528,25 +1823,34 @@ Summary:
   :command:`gcc -Wpedantic`.  Rarely used, and intended only for strict
   compliance tests.

+   This option changes :option:`ASSIGNIN` from an error to a warning.
+
 .. option:: -Wwarn-<message>

   Enables the specified warning message.

 .. option:: -Wwarn-lint

-   Enable all lint-related warning messages (note that by default, they are already
-   enabled), but do not affect style messages.  This is equivalent to
-   ``-Wwarn-ALWCOMBORDER -Wwarn-BSSPACE -Wwarn-CASEINCOMPLETE
-   -Wwarn-CASEOVERLAP -Wwarn-CASEX -Wwarn-CASTCONST -Wwarn-CASEWITHX -Wwarn-CMPCONST
-   -Wwarn-COLONPLUS -Wwarn-IMPLICIT -Wwarn-LITENDIAN
-   -Wwarn-PINMISSING -Wwarn-REALCVT -Wwarn-UNSIGNED -Wwarn-WIDTH``.
+   Enable all lint-related warning messages (note that by default, they are
+   already enabled), but do not affect style messages.  This is equivalent
+   to ``-Wwarn-ALWCOMBORDER`` ``-Wwarn-ASCRANGE`` ``-Wwarn-BSSPACE``
+   ``-Wwarn-CASEINCOMPLETE`` ``-Wwarn-CASEOVERLAP`` ``-Wwarn-CASEWITHX``
+   ``-Wwarn-CASEX`` ``-Wwarn-CASTCONST`` ``-Wwarn-CMPCONST``
+   ``-Wwarn-COLONPLUS`` ``-Wwarn-IMPLICIT`` ``-Wwarn-IMPLICITSTATIC``
+   ``-Wwarn-LATCH`` ``-Wwarn-MISINDENT`` ``-Wwarn-NEWERSTD``
+   ``-Wwarn-PREPROCZERO`` ``-Wwarn-PINMISSING`` ``-Wwarn-REALCVT``
+   ``-Wwarn-STATICVAR`` ``-Wwarn-UNSIGNED`` ``-Wwarn-WIDTHTRUNC``
+   ``-Wwarn-WIDTHEXPAND`` ``-Wwarn-WIDTHXZEXPAND``.

 .. option:: -Wwarn-style

   Enable all code style-related warning messages.  This is equivalent to
-   ``-Wwarn ASSIGNDLY -Wwarn-DECLFILENAME -Wwarn-DEFPARAM -Wwarn-EOFNEWLINE
-   -Wwarn-INCABSPATH -Wwarn-PINNOCONNECT -Wwarn-SYNCASYNCNET -Wwarn-UNDRIVEN
-   -Wwarn-UNUSEDGENVAR -Wwarn-UNUSEDPARAM -Wwarn-UNUSEDSIGNAL -Wwarn-VARHIDDEN``.
+   ``-Wwarn-ASSIGNDLY`` ``-Wwarn-BLKSEQ`` ``-Wwarn-DECLFILENAME``
+   ``-Wwarn-DEFPARAM`` ``-Wwarn-EOFNEWLINE`` ``-Wwarn-GENUNNAMED``
+   ``-Wwarn-IMPORTSTAR`` ``-Wwarn-INCABSPATH`` ``-Wwarn-PINCONNECTEMPTY``
+   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-SYNCASYNCNET`` ``-Wwarn-UNDRIVEN``
+   ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDLOOP`` ``-Wwarn-UNUSEDPARAM``
+   ``-Wwarn-UNUSEDSIGNAL`` ``-Wwarn-VARHIDDEN``.

 .. option:: --x-assign 0

@@ -1578,9 +1882,9 @@ Summary:

   .. note::

-      This option applies only to values explicitly written as X
-      in modules (not classes) in the Verilog source code. Initial values
-      of clocks are set to 0 unless `--x-initial-edge` is
+      This option applies only to values explicitly written as X in modules
+      (not classes, nor parameters) in the Verilog source code. Initial
+      values of clocks are set to 0 unless `--x-initial-edge` is
      specified. Initial values of all other state holding variables are
      controlled with `--x-initial`.

@@ -1650,14 +1954,21 @@ Summary:
   Create XML output only, do not create any other output.

   The XML format is intended to be used to leverage Verilator's parser and
-   elaboration to feed to other downstream tools. Be aware that the XML
-   format is still evolving; there will be some changes in future versions.
+   elaboration to feed to other downstream tools.
+
+   .. note::
+
+      This feature is deprecated in favor of :vlopt:`--json-only`.

 .. option:: --xml-output <filename>

   Specifies the filename for the XML output file. Using this option
   automatically sets :vlopt:`--xml-only`.

+   .. note::
+
+      This feature is deprecated in favor of :vlopt:`--json-only`.
+
 .. option:: -y <dir>

   Add the directory to the list of directories that should be searched to find
@@ -1680,8 +1991,12 @@ Configuration Files

 In addition to the command line, warnings and other features for the
 :command:`verilator` command may be controlled with configuration files,
-typically named with the .vlt extension (what makes it a configuration file
-is the :option:`\`verilator_config` directive). An example:
+typically named with the `.vlt` extension (what makes it a configuration
+file is the :option:`\`verilator_config` directive).  These files, when
+named `.vlt`, are read before source code files; if this behavior is
+undesired, name the config file with a `.v` suffix.
+
+An example:

 .. code-block:: sv

@@ -1774,6 +2089,13 @@ The grammar of configuration commands is as follows:
   that the setting is ignored unless the :vlopt:`--hierarchical` option is
   specified.  See :ref:`Hierarchical Verilation`.

+.. option:: hier_params -module "<modulename>"
+
+   Specifies that the module contains parameters a :vlopt:`--hierarchical` block. This option
+   is used internally to specify parameters for deparametrized hier block instances.
+   This option should not be used directly.
+   See :ref:`Hierarchical Verilation`.
+
 .. option:: inline -module "<modulename>"

   Specifies the module may be inlined into any modules that use this
@@ -1811,7 +2133,7 @@ The grammar of configuration commands is as follows:

 .. option:: lint_off [-rule <message>] [-file "<filename>" [-lines <line> [ - <line>]]]

-.. option:: lint_off [-rule <message>] [-file "<filename>"] [-match "<string>"]
+.. option:: lint_off [-rule <message>] [-file "<filename>"] [-contents "<wildcard>"] [-match "<wildcard>"]

   Enable/disables the specified lint warning, in the specified filename
   (or wildcard with '\*' or '?', or all files if omitted) and range of
@@ -1820,17 +2142,28 @@ The grammar of configuration commands is as follows:
   With lint_off using "\*" will override any lint_on directives in the
   source, i.e. the warning will still not be printed.

-   If the -rule is omitted, all lint warnings (see list in
+   If the :code:`-rule` is omitted, all lint warnings (see list in
   :vlopt:`-Wno-lint`) are enabled/disabled.  This will override all later
   lint warning enables for the specified region.

-   If -match is set, the linter warnings are matched against this
-   (wildcard) string and are waived in case they match, provided with the
-   rule and file also match.
+   If :code:`-contents` is provided, the input files must contain the given
+   wildcard (with '\*' or '?'), and are waived in case they match, provided
+   the :code:`-rule`, :code:`-file`, and :code:`-contents` also match.  The
+   wildcard should be designed to match a single line; it is unspecified if
+   the wildcard is allowed to match across multiple lines. The input
+   contents does not include :vlopt:`--std <--no-std>` standard files, nor
+   configuration files (with :code:`verilator_config`). Typical use for
+   this is to match a version number present in the Verilog sources, so
+   that the waiver will only apply to that version of the sources.

-   In previous versions -rule was named -msg. The latter is deprecated, but
-   still works with a deprecation info; it may be removed in future
-   versions.
+   If :code:`-match` is provided, the linter warnings are matched against
+   the given wildcard (with '\*' or '?'), and are waived in case they
+   match, provided the :code:`-rule`, :code:`-file`, and :code:`-contents`
+   also match.  The wildcard is compared across the entire multi-line
+   message; see :vlopt:`--waiver-multiline`.
+
+   Before version 4.026, :code:`-rule` was named :code:`-msg`, and
+   :code:`-msg` remained a deprecated alias until Version 5.000.

 .. option:: public [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"

@@ -1845,6 +2178,13 @@ The grammar of configuration commands is as follows:
   :option:`/*verilator&32;public_flat*/`, etc., metacomments. See
   also :ref:`VPI Example`.

+.. option:: profile_data -hier-dpi "<function_name>" -cost <cost_value>
+
+   Internal profiling data inserted during :vlopt:`--hierarchical`; specifies
+   execution cost of a hierarchical DPI wrappers for modules with
+   :option:`/*verilator&32;hier_block*/` metacomment. See
+   :ref:`Hierarchical Verilation`.
+
 .. option:: profile_data -mtask "<mtask_hash>" -cost <cost_value>

   Feeds profile-guided optimization data into the Verilator algorithms in
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 verilator_coverage
@@ -6,10 +6,10 @@ verilator_coverage

 Verilator_coverage processes Verilated model-generated coverage reports.

-With --annotate, it reads the specified coverage data file and generates
-annotated source code with coverage metrics annotated.  If multiple
-coverage points exist on the same source code line, additional lines will
-be inserted to report the additional points.
+With `--annotate`, it reads the specified coverage data file and generates
+annotated source code with coverage metrics annotated.  With
+`--annotate-points` the coverage points corresponding to each line are also
+shown.

 Additional Verilog-XL-style standard arguments specify the search paths
 necessary to find the source code on which the coverage analysis was
@@ -35,11 +35,11 @@ verilator_coverage Example Usage
    verilator_coverage --help
    verilator_coverage --version

-    verilator_coverage --annotate <obj>
+    verilator_coverage --annotate obj_dir coverage.dat

-    verilator_coverage  -write merged.dat -read <datafiles>...
+    verilator_coverage --write merged.dat coverage.dat ...

-    verilator_coverage  -write-info merged.info -read <datafiles>...
+    verilator_coverage --write-info merged.info coverage.dat ...


 verilator_coverage Arguments
@@ -58,17 +58,69 @@ to read multiple inputs.  If no data file is specified, by default,
 Specifies the directory name to which source files with annotated coverage
 data should be written.

+Points are children of each line coverage- branches, expressions or toggle points.
+When point counts are aggregated into a line, the minimum and maximum counts
+are used to determine the status of the line (complete, partial, failing)
+The count is equal to the maximum of the points.
+
+Coverage data is annotated at the beginning of the line and is formatted
+as a special character followed by the number of coverage hits. The special
+characters " ,%,~,+,-" indicate summary of the coverage, and allow use of grep
+to filter the report.
+
+* " " (whitespace) indicates that all points on the line are above the coverage min.
+* "%" indicates that all points on the line are below the coverage min.
+* "~" indicates that some points on the line are above the coverage min and some are below.
+* "+" coverage point was at or above the min. Only used with :option:`--annotate-points`.
+* "-" coverage point was below the min.  Only used with :option:`--annotate-points`.
+
+.. code-block::
+
+   100000  input logic a;      // Begins with whitespace, because
+                               // number of hits (100000) is above the min.
+  +100000  point: comment=a    // Begins with +, because
+                               // number of hits (100000) is above the min.
+  %000000  input logic b;      // Begins with %, because
+                               // number of hits (0) is below the min.
+  -000000  point: comment=b    // Begins with -, because
+                               // number of hits (0) is below the min.
+  ~000010  if (cyc!=0) begin   // Begins with ~, because
+                               // branches are below and above the min.
+  +000010  point: comment=if   // The if branch is above the min.
+  -000000  point: comment=else // The else branch is below the min.
+
 .. option:: --annotate-all

 Specifies all files should be shown.  By default, only those source files
 with low coverage are written to the output directory.

+This option should be used together with :option:`--annotate`.
+
 .. option:: --annotate-min <count>

-Specifies if the coverage point does not include the count number of
-coverage hits, then the coverage point will be considered above the
-threshold, and the coverage report will put a "%" to indicate the coverage
-is insufficient.  Defaults to 10.
+Specifies the threshold (<count>) below which coverage point is considered
+sufficient. If the threshold is not exceeded, then the annotation will begin
+with a "%" symbol to indicate the coverage is insufficient.
+
+The <count> threshold defaults to 10.
+
+This option should be used together with :option:`--annotate`.
+
+
+.. option:: --annotate-points
+
+Specifies all coverage points should be shown after each line of text.  By
+default, only source lines are shown.
+
+.. code-block::
+
+  100000  input logic a, b, c;
+ +100000 point: comment=a // These lines are only shown
+ +200000 point: comment=b // with option --annotate-points
+ +300000 point: comment=c // enabled.
+
+
+This option should be used together with :option:`--annotate`.

 .. option:: --help

@@ -106,10 +158,7 @@ generated from random test runs) into one master coverage file.
 Specifies the aggregate coverage results, summed across all the files,
 should be written to the given filename in :command:`lcov` .info format.
 This may be used to feed into :command:`lcov` to aggregate or generate
-reports.
-
-Converting from the Verilator coverage data format to the info format is
-lossy; the info will have all forms of coverage merged line coverage, and
-if there are multiple coverage points on a single line they will merge.
-The minimum coverage across all merged points will be used to report
-coverage of the line.
+reports. This format lacks the comments for cover points that the
+verilator_coverage format has. It can be used with :command:`genhtml`
+to generate an HTML report. :command:`genhtml --branch-coverage` will
+also display the branch coverage, analogous to :option:`--annotate-points`
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 verilator_gantt
@@ -30,15 +30,13 @@ Gantt Chart VCD Signals
 In waveforms, there are the following signals. In GTKWave, use "decimal"
 data format to remove the leading zeros and make the traces easier to read.

-evals
-  Increments each time when eval_step was measured to be active.  This
-  allow visualization of how much time eval_step was active.
+trace/section
+  Shows the name of the current top of the execution section stack.
+  Set GTKWave data format to "ASCII".

-eval_loop
-  Increments each time when the evaluation loop within eval_step was
-  measured to be active.  For best performance, there is only a single
-  evaluation loop within each eval_step call; that is, the eval_loop
-  waveform looks identical to the evals waveform.
+trace/depth
+  Shows the depth of the execution section stack.
+  Set GTKWave data format to "Analog".

 measured_parallelism
  The number of mtasks active at this time, for best performance, this will
@@ -64,6 +62,17 @@ predicted_thread#_mtask
  executing.


+verilator_gantt Example Usage
+-----------------------------
+
+..
+
+    verilator_gantt --help
+    verilator_gantt --version
+
+    verilator_gantt profile_exec.dat
+
+
 verilator_gantt Arguments
 -------------------------

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 verilator_profcfunc
@@ -15,6 +15,17 @@ reported as a rounding error.

 For an overview of the use of verilator_profcfunc, see :ref:`Profiling`.

+verilator_profcfunc Example Usage
+---------------------------------
+
+..
+
+    verilator_profcfunc --help
+    verilator_profcfunc --version
+
+    verilator_profcfunc gprof.out
+
+
 verilator_profcfunc Arguments
 -----------------------------

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *********************************
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *******************
@@ -17,19 +17,26 @@ or "`ifdef`"'s may break other tools.

 .. option:: `__LINE__

-   The :option:`\`__LINE__` define expands to the current filename as a
-   string, like C++'s __LINE__.  This Verilator feature added in 2006 was
-   incorporated into IEEE 1800-2009.
+   The :option:`\`__LINE__` define expands to the current line number like
+   C++'s __LINE__.  This Verilator feature added in 2006 was incorporated
+   into IEEE 1800-2009.

 .. option:: `error [string]

-   This will report an error when encountered, like C++'s #error.
+   This will report an error when the preprocessor emits it, similar to
+   C++'s #error.
+
+.. option:: `line
+
+   As a special case `\`line \`__LINE__ "filename"` allows setting the
+   filename, without changing the line number. This is used for some
+   internal tests, so that debugging can leave the line numbers correctly
+   referring to the test file's line numbers.

 .. option:: """ [string] """

   A triple-quoted block specifies a string that may include newlines and
-   single quotes.  This extension is experimental and may be removed
-   without deprecation.
+   single quotes.  This extension was standardized in IEEE 1800-2023.

 .. option:: $c([string], ...);

@@ -446,6 +453,33 @@ or "`ifdef`"'s may break other tools.

   Same as :option:`public_flat_rw` configuration file option.

+.. option:: /*verilator&32;public_[|flat|flat_rd|flat_rw]_on [@(<edge_list>)]*/ (as scope)
+
+   Used to wrap multiple signals and parameters with the respective public attribute.
+   See attribute above for their respective behavior. Cannot be nested. e.g:
+
+      .. code-block:: sv
+
+         /*verilator public_flat_rw_on*/
+         logic clk;
+         logic rst;
+         parameter width = 8;
+         /* verilator public_off*/
+         logic data;
+
+   Is equivalent to:
+
+      .. code-block:: sv
+
+         logic clk /*verilator public_flat_rw*/;
+         logic rst /*verilator public_flat_rw*/;
+         parameter width /*verilator public_flat_rw*/ = 8;
+         logic data;
+
+.. option:: /*verilator&32;public_off*/
+
+   Terminates the previous `/*verilator public*_on*/` directive; see above.
+
 .. option:: /*verilator&32;public_module*/

   Used after a module statement to indicate the module should not be
@@ -542,6 +576,10 @@ or "`ifdef`"'s may break other tools.

 .. option:: /*verilator&32;trace_init_task*/

+   Removed.
+
+   In versions before 5.024:
+
   Attached to a DPI import to indicate that function should be called when
   initializing tracing. This attribute is indented only to be used
   internally in code that Verilator generates when :vlopt:`--lib-create`
@@ -559,6 +597,23 @@ or "`ifdef`"'s may break other tools.
   Re-enable waveform tracing for all future signals or instances that are
   declared.

+.. option:: /*verilator&32;unroll_disable*/
+
+   Used in a statement position to indicate the immediately following loop
+   at the same statement level should not be unrolled by Verilator,
+   ignoring :vlopt:`--unroll-count`.  This is similar to clang's ``#pragma
+   clang loop unroll(disable)``.
+
+   This option does not currently disable the C++ compiler's unrolling (or
+   not) of any loops that make it through to the Verilated C++ code.
+
+.. option:: /*verilator&32;unroll_full*/
+
+   Rarely needed. Used in a statement position to indicate the immediately
+   following loop at the same statement level should always be fully
+   unrolled by Verilator, ignoring :vlopt:`--unroll-count`.  This is
+   similar to clang's ``#pragma clang loop unroll(full)``.
+
 .. option:: $stacktrace

   Called as a task, print a stack trace.  Called as a function, return a
@@ -567,4 +622,4 @@ or "`ifdef`"'s may break other tools.
   symbols.  Also, the data represents the C++ stack; the SystemVerilog
   functions/tasks involved may be renamed and/or inlined before becoming
   the C++ functions that may be visible in the stack trace.  This
-   extension is experimental and may be removed without deprecation.
+   extension was standardized in IEEE 1800-2023.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ******************************
@@ -128,10 +128,13 @@ How do I generate waveforms (traces) in C++?

 See also the next question for tracing in SystemC mode.

-A. Pass the :vlopt:`--trace` option to Verilator, and in your top-level C
-   code, call ``Verilated::traceEverOn(true)``.  Then you may use
-   ``$dumpfile`` and ``$dumpvars`` to enable traces, the same as with any
-   Verilog simulator. See ``examples/make_tracing_c`` in the distribution.
+A. Pass the :vlopt:`--trace` option to Verilator.  Then you may use ``$dumpfile`` and
+   ``$dumpvars`` to enable traces, the same as with any Verilog simulator,
+   although Verilator ignores the arguments to ``$dumpvars``. See
+   ``examples/make_tracing_c`` in the distribution.
+
+   If writing the top-level C code, call ``Verilated::traceEverOn(true)``;
+   this is done for you if using :vlopt:`--binary`.

 B. Or, for finer-grained control, or C++ files with multiple Verilated
   modules, you may also create the trace purely from C++.  Create a
@@ -220,24 +223,20 @@ This is done for you if you are using the Verilator :vlopt:`--binary` or
 You can call :code:`->trace()` on multiple Verilated objects with the same
 trace file if you want all data to land in the same output file.

-When using SystemC 2.3, the SystemC library must have been built with the
-experimental simulation phase callback-based tracing disabled. This is
-disabled by default when building SystemC with its configure based build
-system, but when building SystemC with CMake, you must pass
-``-DENABLE_PHASE_CALLBACKS_TRACING=OFF`` to disable this feature.
-

 How do I generate FST waveforms (traces) in C++ or SystemC?
 """""""""""""""""""""""""""""""""""""""""""""""""""""""""""

 FST is a trace file format developed by GTKWave.  Verilator provides basic
 FST support.  To dump traces in FST format, add the :vlopt:`--trace-fst`
-option to Verilator and either A. use :code:`$dumpfile & $dumpvars` in
-Verilog as described in the VCD example above,
+option to Verilator and either:
+
+Use :code:`$dumpfile & $dumpvars` in Verilog as described in the VCD
+example above,

 Or, in C++ change the include described in the VCD example above:

-.. code-block:: C++
+  .. code-block:: C++

      #include "verilated_fst_c.h"
      VerilatedFstC* tfp = new VerilatedFstC;
@@ -245,14 +244,14 @@ Or, in C++ change the include described in the VCD example above:

 Or, in SystemC, change the include described in the VCD example above:

-.. code-block:: C++
+  .. code-block:: C++

      #include "verilated_fst_sc.h"
      VerilatedFstC* tfp = new VerilatedFstSc;


-Currently, supporting FST and VCD in a single simulation is impossible, but
-such requirement should be rare.  You can however ifdef around the trace
+Currently, supporting FST and VCD in a single simulation is not supported,
+but such usage should be unlikely.  You can however ifdef around the trace
 format in your C++ main loop, and select VCD or FST at compile time.


@@ -260,9 +259,11 @@ How do I view waveforms (aka dumps or traces)?
 """"""""""""""""""""""""""""""""""""""""""""""

 Verilator creates standard VCD (Value Change Dump) and FST files.  VCD
-files are viewable with the open-source GTKWave (recommended), or Dinotrace
-(legacy) programs, or any of the many closed-source offerings; FST is
-supported only by GTKWave.
+files are viewable with the open-source
+`GTKWave <http://gtkwave.sourceforge.net/>`_,
+`Surfer <https://surfer-project.org/>`_, Dinotrace (legacy), or any of the
+many closed-source viewer offerings; FST is supported only by GTKWave and
+Surfer.


 How do I speed up writing large waveform (trace) files?
@@ -356,8 +357,8 @@ Why do I get "undefined reference to \`VL_RAND_RESET_I' or \`Verilated::...'"?
 You need to link your compiled Verilated code against the
 :code:`verilated.cpp` file found in the include directory of the Verilator
 kit.  This is one target in the ``$(VK_GLOBAL_OBJS)`` make variable, which
-should be part of your Makefile's link rule.  If you use :vlopt:`--exe`,
-this is done for you.
+should be part of your Makefile's link rule.  If you use :vlopt:`--exe` or
+:vlopt:`--binary`, this is done for you.


 Is the PLI supported?
@@ -401,7 +402,7 @@ How do I get faster build times?
 * Use a recent compiler.  Newer compilers tend to be faster.

 * Compile in parallel on many machines and use caching; see the web for the
-  ccache, distcc, and icecream packages. ccache will skip GCC runs between
+  ccache, sccache, distcc, or icecream packages. ccache will skip GCC runs between
  identical source builds, even across different users.  If ccache was
  installed when Verilator was built, it is used, or see OBJCACHE
  environment variable to override this. Also see the
@@ -486,7 +487,7 @@ From the sc_main.cpp file, you'd then:

      #include "Vour.h"
      #include "Vour_our.h"
-      cout << "clock is " << top->our->clk << endl;
+      std::cout << "clock is " << top->our->clk << std::endl;


 In this example, clk is a bool you can read or set as any other variable.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *****
@@ -48,12 +48,6 @@ For --cc/--sc, it creates:
     - Make include file for compiling (from --make gmake)
   * - *{prefix}*\ _classes.mk
     - Make include file with class names (from --make gmake)
-   * - *{prefix}*\ _hier.mk
-     - Make file for hierarchy blocks (from --make gmake)
-   * - *{prefix}*\ _hierMkArgs.f
-     - Arguments for hierarchical Verilation (from --make gmake)
-   * - *{prefix}*\ _hierCMakeArgs.f
-     - Arguments for hierarchical Verilation (from --make cmake)
   * - *{prefix}*\ .h
     - Model header
   * - *{prefix}*\ .cpp
@@ -95,16 +89,24 @@ For --cc/--sc, it creates:
   * - *{prefix}{each_verilog_module}{__DepSet_hash__n}*\ .cpp
     - Additional lower C++ files (hashed to reduce build times)

-For --hierarchy mode, it creates:
+For --hierarchical mode, it creates:

 .. list-table::

   * - V\ *{hier_block}*\ /
-     - Directory to Verilate each hierarchy block (from --hierarchy)
+     - Directory to Verilate each hierarchical block (from --hierarchical)
   * - *{prefix}*\ __hierVer.d
-     - Make dependencies of the top module (from --hierarchy)
+     - Make dependencies of the top module (from --hierarchical)
+   * - *{prefix}*\ _hier.mk
+     - Make file for hierarchical blocks (from --make gmake)
+   * - *{prefix}*\ __hierCMakeArgs.f
+     - Arguments for hierarchical Verilation (from --make cmake)
+   * - *{prefix}*\ __hierMkArgs.f
+     - Arguments for hierarchical Verilation (from --make gmake)
+   * - *{prefix}*\ __hierParameters.v
+     - Module parameters for hierarchical blocks
   * - *{prefix}*\ __hier.dir
-     - Directory to store .dot, .vpp, .tree of top module (from --hierarchy)
+     - Directory to store .dot, .vpp, .tree of top module (from --hierarchical)

 In specific debug and other modes, it also creates:

@@ -112,6 +114,10 @@ In specific debug and other modes, it also creates:

   * - *{prefix}*\ .xml
     - XML tree information (from --xml)
+   * - *{prefix}*\ .tree.json
+     - JSON tree information (from --json-only)
+   * - *{prefix}*\ .tree.meta.json
+     - JSON tree metadata (from --json-only)
   * - *{prefix}*\ __cdc.txt
     - Clock Domain Crossing checks (from --cdc)
   * - *{prefix}*\ __stats.txt
@@ -126,8 +132,10 @@ In specific debug and other modes, it also creates:
     - Debugging graph files (from --debug)
   * - *{prefix}{misc}*\ .tree
     - Debugging files (from --debug)
-   * - {mod_prefix}_{each_verilog_base_filename}*\ .vpp
-     - Pre-processed verilog (from --debug)
+   * - *{prefix}*\ __inputs\ .vpp
+     - Pre-processed verilog for all files (from --debug)
+   * - *{prefix}*\ _ *{each_verilog_base_filename}*\ .vpp
+     - Pre-processed verilog for each file (from --debug)

 After running Make, the C++ compiler may produce the following:

@@ -143,6 +151,10 @@ After running Make, the C++ compiler may produce the following:
     - Intermediate objects
   * - *{prefix}*\
     - Final executable (from --exe)
+   * - lib\ *{prefix}*\ .a
+     - Final archive (default lib mode)
+   * - libverilated.a
+     - Runtime for verilated model (default lib mode)
   * - *{prefix}*\ __ALL.a
     - Library of all Verilated objects
   * - *{prefix}*\ __ALL.cpp
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ######################
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _CMakeInstallation:
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Installation:
@@ -19,13 +19,33 @@ started. (Note packages are unlikely to have the most recent version, so
 :ref:`Git Install` might be a better alternative.) To install as a
 package:

-::
+.. code-block:: shell

   apt-get install verilator   # On Ubuntu

 For other distributions, refer to `Repology Verilator Distro Packages
 <https://repology.org/project/verilator>`__.

+.. _pre-commit Quick Install:
+
+pre-commit Quick Install
+=============================
+
+You can use Verilator's `pre-commit <https://pre-commit.com/>`__ hook to
+lint your code before committing it.  It encapsulates the :ref:`Verilator
+Build Docker Container`, so you need docker on your system to use it.  The
+verilator image will be downloaded automatically.
+
+To use the hook, add the following entry to your :code:`.pre-commit-config.yaml`:
+
+.. code-block:: yaml
+
+   repos:
+     - repo: https://github.com/verilator/verilator
+       rev: v5.026  # or later
+       hooks:
+         - id: verilator
+
 .. _Git Install:

 Git Quick Install
@@ -36,10 +56,10 @@ options and details, see :ref:`Detailed Build Instructions` below.

 In brief, to install from git:

-::
+.. code-block:: shell

   # Prerequisites:
-   #sudo apt-get install git perl python3 make autoconf g++ flex bison ccache
+   #sudo apt-get install git help2man perl python3 make autoconf g++ flex bison ccache
   #sudo apt-get install libgoogle-perftools-dev numactl perl-doc
   #sudo apt-get install libfl2  # Ubuntu only (ignore if gives error)
   #sudo apt-get install libfl-dev  # Ubuntu only (ignore if gives error)
@@ -89,7 +109,7 @@ Install Prerequisites

 To build or run Verilator, you need these standard packages:

-::
+.. code-block:: shell

   sudo apt-get install git help2man perl python3 make
   sudo apt-get install g++  # Alternatively, clang
@@ -101,34 +121,35 @@ To build or run Verilator, you need these standard packages:
 To build or run Verilator, the following are optional but should be installed
 for good performance:

-::
+.. code-block:: shell

   sudo apt-get install ccache  # If present at build, needed for run
+   sudo apt-get install mold  # If present at build, needed for run
   sudo apt-get install libgoogle-perftools-dev numactl

 The following is optional but is recommended for nicely rendered command line
 help when running Verilator:

-::
+.. code-block:: shell

   sudo apt-get install perl-doc

 To build Verilator you will need to install these packages; these do not
 need to be present to run Verilator:

-::
+.. code-block:: shell

   sudo apt-get install git autoconf flex bison

 Those developing Verilator itself may also want these (see internals.rst):

-::
+.. code-block:: shell

-   sudo apt-get install gdb graphviz cmake clang clang-format-14 gprof lcov
-   sudo apt-get install libclang-dev yapf3
-   sudo pip3 install clang sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe
+   sudo apt-get install clang clang-format-14 cmake gdb gprof graphviz lcov
+   sudo apt-get install python3-clang yapf3 bear jq
+   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+   sudo pip3 install git+https://github.com/antmicro/astsee.git
   cpan install Pod::Perldoc
-   cpan install Parallel::Forker


 Install SystemC
@@ -150,6 +171,17 @@ To make use of Verilator FST tracing you will want `GTKwave
 required at Verilator build time.


+Install Z3
+^^^^^^^^^^
+
+In order to use constrained randomization the `Z3 Theorem Prover
+<https://github.com/z3prover/z3#readme>`__ must be installed, however this is
+not required at Verilator build time. There are other compatible SMT solvers,
+like CVC5/CVC4, but they are not guaranteed to work. Since different solvers are
+faster for different scenarios, the solver to use at run-time can be specified
+by the environment variable :option:`VERILATOR_SOLVER`.
+
+
 .. _Obtain Sources:

 Obtain Sources
@@ -158,14 +190,14 @@ Obtain Sources
 Get the sources from the git repository: (You need to do this only once,
 ever.)

-::
+.. code-block:: shell

   git clone https://github.com/verilator/verilator   # Only first time
   ## Note the URL above is not a page you can see with a browser; it's for git only

 Enter the checkout and determine what version/branch to use:

-::
+.. code-block:: shell

   cd verilator
   git pull        # Make sure we're up-to-date
@@ -180,7 +212,7 @@ Auto Configure

 Create the configuration script:

-::
+.. code-block:: shell

   autoconf        # Create ./configure script

@@ -191,8 +223,9 @@ Eventual Installation Options
 Before configuring the build, you must decide how you're going to
 eventually install Verilator onto your system. Verilator will be compiling
 the current value of the environment variables :option:`VERILATOR_ROOT`,
-:option:`SYSTEMC_INCLUDE`, and :option:`SYSTEMC_LIBDIR` as defaults into
-the executable, so they must be correct before configuring.
+:option:`VERILATOR_SOLVER`, :option:`SYSTEMC_INCLUDE`, and
+:option:`SYSTEMC_LIBDIR` as defaults into the executable, so they must be
+correct before configuring.

 These are the installation options:

@@ -201,42 +234,45 @@ These are the installation options:
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

 Our personal favorite is to always run Verilator in-place from its Git
-directory. This allows the easiest experimentation and upgrading, and
-allows many versions of Verilator to co-exist on a system.
+directory (don't run ``make install``). This allows the easiest
+experimentation and upgrading, and allows many versions of Verilator to
+co-exist on a system.

-::
+.. code-block:: shell

   export VERILATOR_ROOT=`pwd`   # if your shell is bash
   setenv VERILATOR_ROOT `pwd`   # if your shell is csh
   ./configure
   # Running will use files from $VERILATOR_ROOT, so no install needed

-Note after installing (below steps), a calling program or shell must set
-the environment variable :option:`VERILATOR_ROOT` to point to this Git
-directory, then execute ``$VERILATOR_ROOT/bin/verilator``, which will find
-the path to all needed files.
+Note after installing (see `Installation`_), a calling program or shell
+must set the environment variable :option:`VERILATOR_ROOT` to point to this
+Git directory, then execute ``$VERILATOR_ROOT/bin/verilator``, which will
+find the path to all needed files.


-2. Install into a specific location
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+2. Install into a Specific Prefix
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

-You may eventually be installing onto a project/company-wide "CAD" tools
-disk that may support multiple versions of every tool. Tell configure the
+You may be an OS package maintainer building a Verilator package, or you
+may eventually be installing onto a project/company-wide "CAD" tools disk
+that may support multiple versions of every tool. Tell configure the
 eventual destination directory name.  We recommend that the destination
 location include the Verilator version name:

-::
+.. code-block:: shell

   unset VERILATOR_ROOT      # if your shell is bash
   unsetenv VERILATOR_ROOT   # if your shell is csh
   # For the tarball, use the version number instead of git describe
   ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`

-Note after installing (below steps), if you use `modulecmd
+Note after installing (see `Installation`_), you need to add the path to
+the ``bin`` directory to your ``PATH``. Or, if you use `modulecmd
 <http://modules.sourceforge.net/>`__, you'll want a module file like the
 following:

-::
+.. code-block:: shell

   set install_root /CAD_DISK/verilator/{version-number-used-above}
   unsetenv VERILATOR_ROOT
@@ -245,36 +281,20 @@ following:
   prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig


-3. Install into a Specific Path
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-You may eventually install Verilator into a specific installation prefix,
-as most GNU tools support:
-
-::
-
-   unset VERILATOR_ROOT      # if your shell is bash
-   unsetenv VERILATOR_ROOT   # if your shell is csh
-   ./configure --prefix /opt/verilator-VERSION
-
-Then after installing (below steps), you will need to add
-``/opt/verilator-VERSION/bin`` to your ``$PATH`` environment variable.
-
-
-4. Install System Globally
+3. Install System Globally
 ^^^^^^^^^^^^^^^^^^^^^^^^^^

 The final option is to eventually install Verilator globally, using
 configure's default system paths:

-::
+.. code-block:: shell

   unset VERILATOR_ROOT      # if your shell is bash
   unsetenv VERILATOR_ROOT   # if your shell is csh
   ./configure

-Then after installing (below), the binaries should be in a location
-already in your ``$PATH`` environment variable.
+Then after installing (see `Installation`_), the binaries should be in a
+location already in your ``$PATH`` environment variable.


 Configure
@@ -284,7 +304,7 @@ The command to configure the package was described in the previous step.
 Developers should configure to have more complete developer tests.
 Additional packages may be required for these tests.

-::
+.. code-block:: shell

   export VERILATOR_AUTHOR_SITE=1    # Put in your .bashrc
   ./configure --enable-longtests  ...above options...
@@ -295,7 +315,7 @@ Compile

 Compile Verilator:

-::
+.. code-block:: shell

   make -j `nproc`  # Or if error on `nproc`, the number of CPUs in system

@@ -305,7 +325,7 @@ Test

 Check the compilation by running self-tests:

-::
+.. code-block:: shell

   make test

@@ -317,7 +337,7 @@ If you used any install option other than the `1. Run-in-Place from
 VERILATOR_ROOT <#_1_run_in_place_from_verilator_root>`__ scheme, install
 the files:

-::
+.. code-block:: shell

   make install

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ***************
@@ -62,12 +62,23 @@ Verilator supports the 2017 "for" loop constructs and several cleanups IEEE
 made in 1800-2017.


+SystemVerilog 2023 (IEEE 1800-2023) Support
+-------------------------------------------
+
+Verilator supports some of the 2023 improvements, including triple-quoted
+string blocks that may include newlines and single quotes.
+
+Verilator implements a full IEEE 1800-2023 compliant preprocessor,
+including triple-quoted strings, and \`ifdef expressions.
+
+
 Verilog AMS Support
 -------------------

 Verilator implements a very small subset of Verilog AMS (Verilog Analog and
 Mixed-Signal Extensions) with the subset corresponding to those VMS
-keywords with near-equivalents in Verilog 2005 or SystemVerilog 2017.
+keywords with near-equivalents in Verilog IEEE 1364 or SystemVerilog
+IEEE 1800.

 AMS parsing is enabled with :vlopt:`--language VAMS <--language>` or
 :vlopt:`--language 1800+VAMS <--language>`.
@@ -237,11 +248,9 @@ optimizations will be disabled around the latch.
 Structures and Unions
 ---------------------

-Presently Verilator only supports packed structs and packed unions.  Rand
-and randc tags on members are ignored.  All structures and unions are
-represented as a single vector, which means that generating one member of a
-structure from blocking, and another from non-blocking assignments is
-unsupported.
+All structures and unions are scheduled together, which means that
+generating one member of a structure from blocking, and another from
+non-blocking assignments is unsupported.


 .. _Unknown States:
@@ -320,20 +329,6 @@ there will be considered a two-state variable that is read and written
 instead of a four-state variable.


-Functions & Tasks
-----------------
-
-All functions and tasks will be inlined (will not become functions in C.)
-The only support provided is simple statements in tasks (which may
-affect global variables).
-
-Recursive functions and tasks are not supported.  All inputs and outputs
-are automatic as if they had the Verilog 2001 "automatic" keyword
-prepended.  (If you don't know what this means, Verilator will do what you
-probably expect, what C does. The default behavior of Verilog is
-different.)
-
-
 Gate Primitives
 ---------------

@@ -383,24 +378,6 @@ Verilator does not support SEREs yet.  All assertion and coverage
 statements must be simple expressions that complete in one cycle.


-Force statement
---------------
-
-Verilator supports the procedural `force` (and corresponding `release`)
-statement. However, the behavior of the `force` statement does not entirely
-comply with IEEE 1800. According to the standard,
-when a procedural statement of the form `force a = b;` is executed, the
-simulation should behave as if, from that point forwards, a continuous
-assignment `assign a = b;` has been added to override the drivers of `a`.
-More specifically: the value of `a` should be updated whenever the value of
-`b` changes, until a `release a;` statement is executed.
-Verilator instead evaluates the current value of `b` when the `force`
-statement is executed, and forces `a` to that value, without updating it
-until a new `force` or `release` statement is encountered that applies to
-`a`. This non-standard behavior is nevertheless consistent with some other
-simulators.
-
-
 Encrypted Verilog
 -----------------

@@ -461,12 +438,31 @@ chandle
  Treated as a "longint"; does not yet warn about operations specified as
  illegal on chandles.

+checker
+  Treated as a "module"; does not yet warn about many constructs illegal
+  inside a checker.
+
 disable
  Disable statements may be used only if the block being disabled is a
  block the disable statement itself is inside.  This was commonly used to
  provide loop break and continue functionality before SystemVerilog added
  the break and continue keywords.

+force, release
+  Verilator supports the procedural `force` (and corresponding `release`)
+  statement. However, the behavior of the `force` statement does not
+  entirely comply with IEEE 1800. According to the standard, when a
+  procedural statement of the form `force a = b;` is executed, the
+  simulation should behave as if, from that point forwards, a continuous
+  assignment `assign a = b;` has been added to override the drivers of `a`.
+  More specifically: the value of `a` should be updated whenever the value
+  of `b` changes, until a `release a;` statement is executed.  Verilator
+  instead evaluates the current value of `b` when the `force` statement is
+  executed, and forces `a` to that value, without updating it until a new
+  `force` or `release` statement is encountered that applies to `a`. This
+  non-standard behavior is nevertheless consistent with some other
+  simulators.
+
 inside
  Inside expressions may not include unpacked array traversal or $ as an
  upper bound.  Case inside and case matches are also unsupported.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 ********
@@ -23,12 +23,12 @@ resulting model's C++ or SystemC code is output as .cpp and .h files. This
 is referred to as "Verilating", and the process is "to Verilate"; the
 output is a "Verilated" model.

-2. For simulation, a small-user written C++ wrapper file is required, the
+2. For simulation, a small user-written C++ wrapper file is required, the
 "wrapper".  This wrapper defines the C++ standard function "main()", which
 instantiates the Verilated model as a C++/SystemC object.

 3. The user C++ wrapper, the files created by Verilator, a "runtime
-library" provided by Verilator, and, if applicable SystemC libraries are
+library" provided by Verilator, and, if applicable, SystemC libraries are
 then compiled using a C++ compiler to create a simulation executable.

 4. The resulting executable will perform the actual simulation during
@@ -44,12 +44,12 @@ The best place to get started is to try the :ref:`Examples`.
 .. [#] Verilog is defined by the `Institute of Electrical and Electronics
       Engineers (IEEE) Standard for Verilog Hardware Description
       Language`, Std. 1364, released in 1995, 2001, and 2005.  The
-       Verilator documentation uses the shorthand, e.g., "IEEE 1394-2005",
+       Verilator documentation uses the shorthand, e.g., "IEEE 1364-2005",
       to refer to the, e.g., 2005 version of this standard.

 .. [#] SystemVerilog is defined by the `Institute of Electrical and
       Electronics Engineers (IEEE) Standard for SystemVerilog - Unified
       Hardware Design, Specification, and Verification Language`, Standard
-       1800, released in 2005, 2009, 2012, and 2017.  The Verilator
-       documentation uses the shorthand e.g., "IEEE 1800-2017", to refer to
-       the, e.g., 2017 version of this standard.
+       1800, released in 2005, 2009, 2012, 2017, and 2023.  The Verilator
+       documentation uses the shorthand e.g., "IEEE 1800-2023", to refer to
+       the, e.g., 2023 version of this standard.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 .. _Simulating:
@@ -12,6 +12,62 @@ Verilated model's executable.  For the runtime arguments to a simulated
 model, see :ref:`Simulation Runtime Arguments`.


+.. _Simulation Summary Report:
+
+Simulation Summary Report
+=========================
+
+When simulation finishes, it will print a report to stdout summarizing the
+simulation. This requires the model being Verilated with :vlopt:`--main`,
+or the user's `main()` calling `VerilatedContext->statsPrintSummary()`.
+
+The report may be disabled with :vlopt:`+verilator+quiet`.
+
+For example:
+
+.. code-block::
+
+   - S i m u l a t i o n   R e p o r t: Verilator ...
+   - Verilator: End at simtime 123 ns; walltime 1234.001 s; speed 123 ns/s
+   - Verilator: cpu 22.001 s on 4 threads; alloced 123 MB
+
+The information in this report is:
+
+.. describe:: "Verilator ..."
+
+   Program version.
+
+.. describe:: "End at simtime 123 ns"
+
+   Verilog $time at which the model finished or stopped.
+
+.. describe:: "walltime 1234.001 s"
+
+   Real elapsed wall time in seconds.
+
+.. describe:: "speed 123.1 ns/s"
+
+   Simulated time (if non-zero) divided by wall time. e.g. `123 ns/s` means
+   123 simulated nanoseconds took 1 second of wall time; for a model with
+   only a 1 GHz clock that would be equivalent to 123.1 cycles per
+   second. The units are automatically selected to give a number between 1
+   and 1000.  The wall time includes initialization, initial and final
+   process blocks, so indicates a slower speed than if the model had a
+   longer runtime.
+
+.. describe:: "cpu 22 s"
+
+   CPU time used total across all CPU threads in seconds.
+
+.. describe:: "4 threads"
+
+   Number of simultaneous threads used.
+
+.. describe:: "alloced 123 MB"
+
+   Total memory used during simulation in megabytes.
+
+
 .. _Benchmarking & Optimization:

 Benchmarking & Optimization
@@ -143,7 +199,7 @@ Functional Coverage
 -------------------

 With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
-translate functional coverage points the user has inserted manually win
+translate functional coverage points the user has inserted manually in
 SystemVerilog code through into the Verilated model.

 Currently, all functional coverage points are specified using SystemVerilog
@@ -168,14 +224,6 @@ at branches).  At each such branch, a counter is incremented.  At the end
 of a test, the counters, filename, and line number corresponding to each
 counter are written into the coverage file.

-Verilator automatically disables coverage of branches with a $stop in
-them, as it is assumed that $stop branches contain an error check that should
-not occur.  A :option:`/*verilator&32;coverage_block_off*/` metacomment
-will perform a similar function on any code in that block or below, or
-:option:`/*verilator&32;coverage_off*/` and
-:option:`/*verilator&32;coverage_on*/` will disable and enable coverage
-respectively around a block of code.
-
 Verilator may over-count combinatorial (non-clocked) blocks when those
 blocks receive signals which have had the :option:`UNOPTFLAT` warning
 disabled; for the most accurate results, do not disable this warning when
@@ -222,6 +270,58 @@ A :option:`/*verilator&32;coverage_off*/`
 signals that do not need toggle analysis, such as RAMs and register files.


+.. _Expression Coverage:
+
+Expression Coverage
+-------------------
+
+With :vlopt:`--coverage` or :vlopt:`--coverage-expr`, Verilator will
+automatically add coverage analysis at each expression, indicating with a
+truth table how every Boolean truth-table possibility in the expression
+occurred.
+
+Multi-bit expressions are ignored, but sub-expressions with are entirely
+Boolean are analyzed.  Expression coverage does not fully explore the truth
+table of an expression, rather is looks at each term's contribution.  E.g.
+an AND operation will check coverage for TT, XF and FX.
+
+Some expressions may produce too many cover points.  Verilator limits the
+maximum number of cover points per expression to 32, but this may be
+controlled with :vlopt:`--coverage-expr-max`.
+
+Below is an example showing expression coverage produced from `verilator_coverage`
+as applied to the condition expression inside an if statement.  Each line
+shows the minimum number of terms and their values (e.g. `(t1==0 && t2==1)`) needed
+to reach a result for the overall expression (e.g. `=> 1`).  Each line also
+shows the number of times this combination was hit.  Note that individual lines
+are not mutually exclusive.
+
+.. code-block::
+
+   %000004         if ((~t1 && t2) || (~t3 && t4)) $write("");
+   -000002  point: comment=(t1==0 && t2==1) => 1 hier=top.t
+   -000002  point: comment=(t1==1 && t3==1) => 0 hier=top.t
+   -000004  point: comment=(t1==1 && t4==0) => 0 hier=top.t
+   -000002  point: comment=(t2==0 && t3==1) => 0 hier=top.t
+   -000003  point: comment=(t2==0 && t4==0) => 0 hier=top.t
+   -000002  point: comment=(t3==0 && t4==1) => 1 hier=top.t
+
+.. _Suppressing Coverage:
+
+Suppressing Coverage
+--------------------
+
+Using :option:`/*verilator&32;coverage_off*/` and
+:option:`/*verilator&32;coverage_on*/` around a block of code will disable
+and enable coverage respectively around that block. Or, use the
+:option:`coverage_block_off` configuration file option.
+
+Verilator automatically disables coverage of lines and branches with a
+$stop in them, as it is assumed that $stop branches contain an error check
+that should not occur.  A :option:`/*verilator&32;coverage_block_off*/`
+metacomment will perform a similar function on any code in that block or
+below.
+
 .. _Coverage Collection:

 Coverage Collection
@@ -230,14 +330,20 @@ Coverage Collection
 When any coverage flag is used to Verilate, Verilator will add appropriate
 coverage point insertions into the model and collect the coverage data.

-To get the coverage data from the model, in the user wrapper code,
-typically at the end once a test passes, call
-:code:`Verilated::threadContextp()->coveragep()->write` with an argument of the filename for
-the coverage data file to write coverage data to (typically
-"logs/coverage.dat").
+To get the coverage data from the model, write the coverage with either:
+
+1. Using :vlopt:`--binary` or :vlopt:`--main`, and Verilator will dump
+   coverage when the test completes to the filename specified with
+   :vlopt:`+verilator+coverage+file+\<filename\>`.
+
+2. In the user wrapper code, typically at the end once a test passes, call
+   :code:`Verilated::threadContextp()->coveragep()->write` with an argument
+   of the filename for the coverage data file to write coverage data to
+   (typically "logs/coverage.dat").

 Run each of your tests in different directories, potentially in parallel.
-Each test will create a :file:`logs/coverage.dat` file.
+Each test will create the file specified above,
+e.g. :file:`logs/coverage.dat`.

 After running all of the tests, execute the :command:`verilator_coverage`
 command, passing arguments pointing to the filenames of all the
@@ -273,13 +379,17 @@ profiled C++ code functions.

 To use profiling:

-#. Use Verilator's :vlopt:`--prof-cfuncs`.
+#. Make sure the Verilog code will call `$finish` at the end of simulation
+   (otherwise the C library may not correctly create the `gmon.out` file in
+   the later steps below).
+#. Run Verilator, adding the :vlopt:`--prof-cfuncs` option.
 #. Build and run the simulation model.
-#. The model will create gmon.out.
-#. Run :command:`gprof` to see where in the C++ code the time is spent.
-#. Run the gprof output through the :command:`verilator_profcfunc` program,
-   and it will tell you what Verilog line numbers on which most of the time
-   is being spent.
+#. The model will create `gmon.out`.
+#. Run :command:`gprof gmon.out > gprof.log` to see where in the C++ code
+   the time is spent.
+#. Run :command:`verilator_profcfunc gprof.log > profcfunc.log` to take the
+   gprof output and translate into output showing the Verilog line numbers
+   on which most of the time is being spent.


 .. _Execution Profiling:
@@ -498,3 +608,37 @@ Clang.  The process in GCC 10 was as follows:
 Clang and GCC also support -fauto-profile, which uses sample-based
 feedback-directed optimization.  See the appropriate compiler
 documentation.
+
+
+.. _Runtime Debugging:
+
+Runtime Debugging
+=================
+
+To debug a Verilated executable, Verilate with :vlopt:`--runtime-debug`.
+This will instruct the compiler to insert debugger, and enable various
+library assertions. These options slow down the executable, so do this
+only when debugging.
+
+If you are using your own Makefiles, adapt appropriately to pass the
+options documented under :vlopt:`--runtime-debug` to the compiler and
+linker.
+
+Once you have a debugging-enabled executable, run it using the the standard
+GNU debugger ``gdb`` or a similar tool, and create a backtrace; e.g.:
+
+   .. code-block:: bash
+
+      gdb obj_dir/Vtop
+        run {Vtop_command_arguments}
+        {Vtop prints output, perhaps a segmentation faults}
+        bt
+
+Rarely the bug may disappear with :vlopt:`--runtime-debug`; if so, try
+instead using the sub-options that :vlopt:`--runtime-debug` documents, to
+find the maximum subset that still shows the issue.  E.g. it is likely that
+using `-CFLAGS -D_GLIBCXX_DEBUG` will not hide any bug, so may be used.
+
+Using :vlopt:`--runtime-debug` or `-CFLAGS -DVL_DEBUG=1` will only print a
+message if something goes wrong.  To enable debug print messages at
+runtime, additionally use the :vlopt:`+verilator+debug` runtime option.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 **********
@@ -7,9 +7,13 @@ Verilating

 Verilator may be used in five major ways:

+* With the :vlopt:`--binary` option, Verilator will translate the design
+  into an executable, via generating C++ and compiling it.  See
+  :ref:`Binary, C++ and SystemC Generation`.
+
 * With the :vlopt:`--cc` or :vlopt:`--sc` options, Verilator will translate
-  the design into C++ or SystemC code, respectively.  See :ref:`C++ and
-  SystemC Generation`.
+  the design into C++ or SystemC code, respectively.  See :ref:`Binary, C++
+  and SystemC Generation`.

 * With the :vlopt:`--lint-only` option, Verilator will lint the design to
  check for warnings but will not typically create any output files.
@@ -24,13 +28,15 @@ Verilator may be used in five major ways:
  expanded.


-.. _C++ and SystemC Generation:
+.. _Binary, C++ and SystemC Generation:

-C++ and SystemC Generation
-==========================
+Binary, C++ and SystemC Generation
+==================================

 Verilator will translate a SystemVerilog design into C++ with the
-:vlopt:`--cc` option, or into SystemC with the :vlopt:`--sc` option.
+:vlopt:`--cc` option, or into SystemC with the :vlopt:`--sc` option.  It
+will translate into C++ and compile it into an executable binary with the
+:vlopt:`--binary` option.

 When using these options:

@@ -45,14 +51,19 @@ When using these options:
   The prefix is set with :vlopt:`--prefix`, or defaults to the name of the
   top module.

-#. If :vlopt:`--exe` is used, Verilator creates makefiles to generate a
-   simulation executable, otherwise, it creates makefiles to generate an
-   archive (.a) containing the objects.
+#. If :vlopt:`--binary` or :vlopt:`--main` is used, Verilator creates a C++
+   top wrapper to read command line arguments, create the model, and
+   execute the model.

-#. If :vlopt:`--build` option was used, it calls :ref:`GNU Make` or
-   :ref:`CMake` to build the model.
+#. If :vlopt:`--binary` or :vlopt:`--exe` is used, Verilator creates
+   makefiles to generate a simulation executable, otherwise, it creates
+   makefiles to generate an archive (.a) containing the objects.

-Once a model is built, it is then typically run, see :ref:`Simulating`.
+#. If :vlopt:`--binary` or :vlopt:`--build` is used, it calls :ref:`GNU
+   Make` or :ref:`CMake` to build the model.
+
+Once a model is built, the next step is typically for the user to run it,
+see :ref:`Simulating`.


 .. _Hierarchical Verilation:
@@ -165,7 +176,7 @@ compiled on the different target system.

 To support this, none of the files that Verilator produces will reference
 any configure-generated build-system-specific files, such as
-:file:`config.h` (which is renamed in Verilator to :file:`config_build.h`
+:file:`config.h` (which is renamed in Verilator to :file:`config_package.h`
 to reduce confusion.)  The disadvantage of this approach is that
 :file:`include/verilatedos.h` must self-detect the requirements of the
 target system, rather than using configure.
@@ -293,9 +304,9 @@ GNU Make
 ========

 Verilator defaults to creating GNU Make makefiles for the model.  Verilator
-will call make automatically when the :vlopt:'--build' option is used.
+will call make automatically when the :vlopt:`--build` option is used.

-If calling Verilator from a makefile, the :vlopt:'-MMD' option will create
+If calling Verilator from a makefile, the :vlopt:`--MMD` option will create
 a dependency file, allowing Make to only run Verilator if input Verilog
 files change.

@@ -487,3 +498,78 @@ The search paths can be configured by setting some variables:

   Sets the installation prefix of an installed SystemC library. (Same as
   SYSTEMC_ROOT).
+
+
+.. _Verilation Summary Report:
+
+Verilation Summary Report
+=========================
+
+When Verilator generates code, unless :vlopt:`--quiet-stats` is used, it
+will print a report to stdout summarizing the build. For example:
+
+.. code-block::
+
+    - V e r i l a t i o n   R e p o r t: Verilator ....
+    - Verilator: Built from 354 MB sources in 247 modules,
+        into 74 MB in 89 C++ files needing 0.192 MB
+    - Verilator: Walltime 26.580 s (elab=2.096, cvt=18.268,
+        bld=2.100); cpu 26.548 s on 1 threads; alloced 2894.672 MB
+
+The information in this report is:
+
+.. describe:: "Verilator ..."
+
+   Program version.
+
+.. describe:: "234 MB sources"
+
+   Characters of post-preprocessed text in all input
+   Verilog and Verilator Control files in megabytes.
+
+.. describe:: "247 modules"
+
+   Number of interfaces/modules/classes/packages in design before
+   elaboration.
+
+.. describe:: "into 74 MB"
+
+   Characters of output C++ code, including comments in megabytes.
+
+.. describe:: "89 C++ files"
+
+   Number of .cpp files created.
+
+.. describe:: "needing 192MB"
+
+   Verilation-time minimum-bound estimate of memory needed to run model in
+   megabytes. (Expect to need significantly more.)
+
+.. describe:: "Walltime 26.580 s"
+
+   Real elapsed wall time for Verilation and build.
+
+.. describe:: "elab=2.096"
+
+   Wall time to read in files and complete elaboration.
+
+.. describe:: "cvt=18.268"
+
+   Wall time for Verilator to process and write output.
+
+.. describe:: "bld=2.1"
+
+   Wall time to compile gcc/clang (if using :vlopt:`--build`).
+
+.. describe:: "cpu 22.548 s"
+
+   CPU time used, total across all CPU threads.
+
+.. describe:: "4 threads"
+
+   Number of simultaneous threads used.
+
+.. describe:: "alloced 123 MB"
+
+   Total memory used during build by Verilator executable (excludes
+   :vlopt:`--build` compiler's usage) in megabytes.
@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0

 *******************
@@ -12,10 +12,18 @@ Disabling Warnings

 Warnings may be disabled in multiple ways:

-#. Disable the warning in the source code.  When the warning is printed, it
-   will include a warning code.  Surround the offending line with a
-   :code:`/*verilator&32;lint_off*/` and :code:`/*verilator&32;lint_on*/`
-   metacomment pair:
+#. Disable the warning globally by invoking Verilator with the
+   :code:`-Wno-{warning-code}` option.
+
+   Global disables should be avoided, as they removes all checking across
+   the source files, and prevents other users from compiling the sources
+   without knowing the magic set of disables needed to compile those
+   sources successfully.
+
+#. Disable the warning in the design source code.  When the warning is
+   printed, it will include a warning code.  Surround the offending line
+   with a :code:`/*verilator&32;lint_off*/` and
+   :code:`/*verilator&32;lint_on*/` metacomment pair:

   .. code-block:: sv

@@ -23,6 +31,12 @@ Warnings may be disabled in multiple ways:
         if (`DEF_THAT_IS_EQ_ZERO <= 3) $stop;
         // verilator lint_on UNSIGNED

+
+   A lint_off in the design source code will propagate down to any child
+   files (files later included by the file with the lint_off), but will not
+   propagate upwards to any parent file (file that included the file with
+   the lint_off).
+
 #. Disable the warning using :ref:`Configuration Files` with a
   :option:`lint_off` command.  This is useful when a script suppresses
   warnings, and the Verilog source should not be changed.  This method also
@@ -30,13 +44,7 @@ Warnings may be disabled in multiple ways:

   .. code-block:: sv

-         lint_off -rule UNSIGNED -file "*/example.v" -line 1
-
-#. Disable the warning globally invoking Verilator with the
-   :code:`-Wno-{warning-code}` option.  This should be avoided, as it
-   removes all checking across the designs, and prevents other users from
-   compiling your code without knowing the magic set of disables needed to
-   compile your design successfully.
+         lint_off -rule UNSIGNED -file "*/example.v" -lines 1


 Error And Warning Format
@@ -74,7 +82,8 @@ List Of Warnings
 .. option:: Unsupported: ....

   This error indicates that the code uses a Verilog language construct
-   that is not yet supported in Verilator.  See the Limitations chapter.
+   that is not yet supported in Verilator.  See also :ref:`Language
+   Limitations`.


 .. option:: ALWCOMBORDER
@@ -96,6 +105,24 @@ List Of Warnings
   simulate correctly.


+.. option:: ASCRANGE
+
+   .. TODO better example
+
+   Warns that a packed vector is declared with ascending bit range
+   (i.e. [0:7]).  Descending bit range is now the overwhelming standard,
+   and ascending ranges are now thus often due to simple oversight
+   instead of intent (a notable exception is the OpenPOWER code base).
+
+   It also warns that an instance is declared with ascending range
+   (i.e. [0:7] or [7]) and is connected to an N-wide signal.
+   The bits will likely be in the reversed order from what people may expect
+   (i.e., instance [0] will connect to signal bit [N-1] not bit [0]).
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+
 .. option:: ASSIGNDLY

   .. TODO better example
@@ -134,8 +161,8 @@ List Of Warnings
 .. option:: BADSTDPRAGMA

   An error that a pragma is badly formed, for pragmas defined by IEEE
-   1800-2017.  For example, an empty pragma line, or an incorrectly used
-   'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2017 are
+   1800-2023.  For example, an empty pragma line, or an incorrectly used
+   'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2023 are
   ignored.


@@ -183,22 +210,35 @@ List Of Warnings

 .. option:: BLKLOOPINIT

-   .. TODO better example
-
-   This indicates that the initialization of an array needs to use
-   non-delayed assignments.  This is done in the interest of speed; if
-   delayed assignments were used, the simulator would have to copy large
-   arrays every cycle.  (In smaller loops, loop unrolling allows the
-   delayed assignment to work, though it's a bit slower than a non-delayed
-   assignment.)  Here's an example
+   Indicates certain constructs where non-blocking assignments to unpacked
+   arrays (memories) are not supported inside loops. These typically appear in
+   initialization/reset code:

   .. code-block:: sv

         always @(posedge clk)
            if (~reset_l)
                for (i=0; i<`ARRAY_SIZE; i++)
-                    array[i] = 0;  // Non-delayed for verilator
+                    array[i] <= 0;  // Non-blocking assignment inside loop
+            else
+                array[address] <= data;

+   While this is supported in typical synthesizeable code (including the
+   example above), some complicated cases are not supported. Namely:
+
+   1. If the above loop is inside a suspendable process or fork statement.
+
+   2. If the variable is also the target of a '<=' non-blocking assignment
+   in a suspendable process or fork statement (in addition to a synthesizable
+   loop).
+
+   3. If the element type of the array is a compound type.
+
+   4. In versions before 5.026, any delayed assignment to an array.
+
+   It might slightly improve run-time performance if you change the
+   non-blocking assignment inside the loop into a blocking assignment
+   (that is: use '=' instead of '<='), if possible.

   This message is only seen on large or complicated loops because
   Verilator generally unrolls small loops.  You may want to try increasing
@@ -256,7 +296,7 @@ List Of Warnings
   Unique case statements that select on an enumerated variable, where all
   of the enumerated values are covered by case items, are considered
   complete even if the case statement does not cover illegal
-   non-enumerated values (IEEE 1800-2017 12.5.3).  To check that illegal
+   non-enumerated values (IEEE 1800-2023 12.5.3).  To check that illegal
   values are not hit, use :vlopt:`--assert`.

   Ignoring this warning will only suppress the lint check; it will
@@ -317,9 +357,11 @@ List Of Warnings

 .. option:: CDCRSTLOGIC

-   With :vlopt:`--cdc` only, it warns that asynchronous flop reset terms come
-   from other than primary inputs or flopped outputs, creating the
-   potential for reset glitches.
+   Historical, never issued since version 5.008.
+
+   Warned with a no longer supported clock domain crossing option that
+   asynchronous flop reset terms came from other than primary inputs or
+   flopped outputs, creating the potential for reset glitches.


 .. option:: CLKDATA
@@ -375,6 +417,16 @@ List Of Warnings
   simulators.


+.. option:: CONSTRAINTIGN
+
+   Warns that Verilator does not support certain forms of
+   :code:`constraint`, :code:`constraint_mode`, or :code:`rand_mode`, and
+   the construct was are ignored.
+
+   Ignoring this warning may make Verilator randomize() simulations differ
+   from other simulators.
+
+
 .. option:: CONTASSREG

   .. TODO better example
@@ -393,6 +445,18 @@ List Of Warnings
   correctly.


+.. option:: COVERIGN
+
+   Warns that Verilator does not support certain forms of
+   :code:`covergroup`, :code:`coverpoint`, and coverage options, and the
+   construct was are ignored.
+
+   Disabling the :option:`UNSUPPORTED` error also disables this warning.
+
+   Ignoring this warning may make Verilator ignore lint checking on the
+   construct, and collect coverage data differently from other simulators.
+
+
 .. option:: DECLFILENAME

   .. TODO better example
@@ -440,7 +504,7 @@ List Of Warnings

   .. code-block::

-         %Warning-DEFPARAM: example.v:5:15: defparam is deprecated (IEEE 1800-2017 C.4.1)
+         %Warning-DEFPARAM: example.v:5:15: defparam is deprecated (IEEE 1800-2023 C.4.1)
                                          : ... Suggest use instantiation with #(.MY_PARAM(...etc...))

   To repair use :code:`#(.PARAMETER(...))` syntax. Repaired Example:
@@ -639,6 +703,52 @@ List Of Warnings
   used as a clock.


+.. option:: GENUNNAMED
+
+   Warns that a generate block was unnamed and "genblk" will be used per
+   IEEE.
+
+   The potential issue is that adding additional generate blocks will
+   renumber the assigned names, which may cause eventual problems with
+   synthesis constraints or other tools that depend on hierarchical paths
+   remaining consistent.
+
+   Blocks that are empty may not be reported with this warning, as no
+   scopes are created for empty blocks, so there is no harm in having them
+   unnamed.
+
+   Disabled by default as this is a code-style warning; it will simulate
+   correctly.
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         generate
+            if (PARAM == 1) begin  //<--- Warning
+            end
+
+   Results in:
+
+   .. code-block::
+
+         %Warning-GENUNNAMED: example.v:2:9: Unnamed generate block (IEEE 1800-2023 27.6)
+
+   To fix this assign a label (often with the naming convention prefix of
+   :code:`gen_` or :code:`g_`), for example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         generate
+            if (PARAM == 1) begin : gen_param_1  //<--- Repaired
+            end
+
+   Other tools with similar warnings: Verible's generate-label, "All
+   generate block statements must have a label."
+
+
 .. option:: HIERBLOCK

   Warns that the top module is marked as a hierarchy block by the
@@ -678,7 +788,7 @@ List Of Warnings

   .. code-block::

-         %Warning-IGNOREDRETURN: example.v:5:9: Ignoring return value of non-void function (IEEE 1800-2017 13.4.1)
+         %Warning-IGNOREDRETURN: example.v:5:9: Ignoring return value of non-void function (IEEE 1800-2023 13.4.1)

   The portable way to suppress this warning (in SystemVerilog) is to use a
   void cast, for example:
@@ -735,14 +845,17 @@ List Of Warnings

   This is a warning because the static default differs from C++, differs
   from class member function/tasks.  Static is a more dangerous default
-   then automatic as static prevents the function from being reinterant,
+   then automatic as static prevents the function from being reentrant,
   which may be a source of bugs, and/or performance issues.

-   If the function does not require static behavior, change it to "function
-   automatic".
+   If the function is in a module, and does not require static behavior,
+   change it to "function automatic".

-   If the function requires static behavior, change it to "function
-   static".
+   If the function is in a module, and requires static behavior, change it
+   to "function static".
+
+   If the function is in a package, it defaults to static, and label the
+   function's variables as static.

   Ignoring this warning will only suppress the lint check; it will
   simulate correctly.
@@ -842,23 +955,111 @@ List Of Warnings
   Ignoring this warning will only suppress the lint check; it will
   simulate correctly.

+.. option:: LIFETIME
+
+   Error when a variable is referenced in a process that can outlive the process
+   in which it was declared. This can happen when using 'fork..join_none' or
+   'fork..join_any' blocks, which spawn process that can outlive their parents.
+   This error occurs only when Verilator can't replace the reference with a
+   reference to copy of this variable, local to the forked process. For example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         task foo(int local_var);
+            fork
+               #10 local_var++;
+               #20 $display("local_var = %d", local_var);
+            join_none
+         endtask
+
+   In the example above 'local_var' exists only within scope of 'foo', once foo
+   finishes, the stack frame containing 'i' gets removed. However, the process
+   forked from foo continues, as it contains a delay. After 10 units of time
+   pass, this process attempts to modify 'local_var'. However, this variable no
+   longer exits. It can't be made local to the forked process upon spawning, because
+   it's modified and can be referenced somewhere else, for example in the other
+   forked process, that was delayed by 20 units of time in this example. Thus,
+   there's no viable stack allocation for it.
+
+   In order to fix it, if the intent is not to share the variable's state outside
+   of the process, then create a local copy of the variable.
+
+   For example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 4
+
+         task foo(int local_var);
+            fork
+               #10 begin
+                  int forked_var = local_var;
+                  forked_var++;
+               end
+               #20 begin
+                  // Note that we are going to print the original value here,
+                  // as `forked_var`is a local copy that was initialized while
+                  // `foo` was still alive.
+                  int forked_var = local_var;
+                  $display("forked_var = %d", forked_var)
+               end
+            join_none
+         endtask
+
+   If you need to share its state, another strategy is to ensure it's allocated
+   statically:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 1
+
+         int static_var;
+
+         task foo();
+            fork
+               #10 static_var++;
+               #20 $display("static_var = %d", static_var);
+            join_none
+         endtask
+
+   However, if you need to be able to instantiate at runtime, the solution would be to
+   wrap it in an object, since the forked process can hold a reference to that object
+   and ensure that the variable stays alive this way:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         class Wrapper;
+            int m_var;
+
+            // Here we implicitly hold a reference to `this`
+            task foo();
+               fork
+                  #10 m_var++;
+                  #20 $display("this.m_var = %d", m_var);
+               join_none
+            endtask
+         endclass
+
+         // Here we explicitly hold a handle to an object
+         task bar(Wrapper wrapper);
+            fork
+               #10 wrapper.m_var++;
+               #20 $display("wrapper.m_var = %d", wrapper.m_var);
+            join_none
+         endtask

 .. option:: LITENDIAN

   .. TODO better example

-   Warns that a packed vector is declared with little endian bit numbering
-   (i.e. [0:7]).  Big endian bit numbering is now the overwhelming
-   standard, and little numbering is now thus often due to simple oversight
-   instead of intent.
-
-   It also warns that an instance is declared with little endian range
-   (i.e. [0:7] or [7]) and is connected to an N-wide signal. Based on IEEE
-   the bits will likely be backward from what people may expect
-   (i.e., instance [0] will connect to signal bit [N-1] not bit [0]).
-
-   Ignoring this warning will only suppress the lint check; it will
-   simulate correctly.
+   The naming of this warning is in contradiction with the common
+   interpretation of little endian. It was therefore renamed to
+   :option:`ASCRANGE`. While :option:`LITENDIAN` remains for
+   backwards compatibility, new projects should use :option:`ASCRANGE`.


 .. option:: MINTYPMAX
@@ -871,6 +1072,51 @@ List Of Warnings
   unsupported. Verilator uses only the typical delay value.


+.. option:: MISINDENT
+
+   Warns that the indentation of a statement is misleading, suggesting the
+   statement is part of a previous :code:`if` or :code:`while` block while
+   it is not.
+
+   Verilator suppresses this check when there is an inconsistent mix of
+   spaces and tabs, as it cannot ensure the width of tabs.  Verilator also
+   ignores blocks with :code:`begin`/:code:`end`, as the :code:`end`
+   visually indicates the earlier statement's end.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+   For example
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         if (something)
+            statement_in_if;
+            statement_not_in_if;  //<--- Warning
+
+   Results in:
+
+   .. code-block::
+
+         %Warning-MISINDENT: example.v:3:9: Misleading indentation
+
+   To fix this repair the indentation to match the correct earlier
+   statement, for example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         if (something)
+            statement_in_if;
+         statement_not_in_if;  //<--- Repaired
+
+   Other tools with similar warnings: GCC -Wmisleading-indentation,
+   clang-tidy readability-misleading-indentation.
+
+
 .. option:: MODDUP

   .. TODO better example
@@ -949,6 +1195,21 @@ List Of Warnings
   (neither :vlopt:`--timing` nor :vlopt:`--no-timing` option was provided).


+.. option:: NEWERSTD
+
+   Warns that a feature requires a newer standard of Verilog or SystemVerilog
+   than the one specified by the :vlopt:`--language` option. For example, unsized
+   unbased literals (`'0`, `'1`, `'z`, `'x`) require IEEE 1800-2005 or later.
+
+   To avoid this warning, use a Verilog or SystemVerilog standard that
+   supports the feature. Alternatively, modify your code to use a different
+   syntax that is supported by the Verilog/SystemVerilog standard specified
+   by the :vlopt:`--language` option.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+
 .. option:: NOLATCH

   .. TODO better example
@@ -968,6 +1229,14 @@ List Of Warnings
   :vlopt:`--no-timing` option.


+.. option:: NONSTD
+
+   Warns when a non-standard language feature is used that has a standard
+   equivalent, which might behave differently in corner cases. For example
+   :code:`$psprintf` system function is replaced by its standard equivalent
+   :code:`$sformatf`.
+
+
 .. option:: NULLPORT

   Warns that a null port was detected in the module definition port
@@ -1007,7 +1276,7 @@ List Of Warnings

 .. option:: PINMISSING

-   .. TODO better example
+   .. TODO better example (frequent)

   Warns that a module has a pin that is not mentioned in an instance.  If
   a pin is not missing it should still be specified on the instance
@@ -1016,6 +1285,22 @@ List Of Warnings
   Ignoring this warning will only suppress the lint check; it will
   simulate correctly.

+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+
+   Repaired example:
+
+   .. code-block:: sv
+      :emphasize-lines: 2
+
+         sub sub (
+                  .port());
+
   Other tools with similar warnings: Icarus Verilog's portbind, "warning:
   Instantiating module ... with dangling input port (...)". Slang's
   unconnected-port, "port '...' has no connection".
@@ -1047,7 +1332,7 @@ List Of Warnings
         generate
            if (A==0) begin
               b b_inst1 (.x(1'b0));  //<--- error nonexistent port
-               b #(.PX(1'b0)) b_inst2 (); //<--- error nonexistent parameter
+               b #(.PX(1'b0)) b_inst2 ();  //<--- error nonexistent parameter
            end
          endgenerate
       endmodule
@@ -1089,11 +1374,47 @@ List Of Warnings

 .. option:: PKGNODECL

-   .. TODO better example
+   An error that a package/class appears to have been referenced that has
+   not yet been declared.  According to IEEE 1800-2023 26.3, all packages
+   must be declared before being used.

-   An error that a package/class appears to have been referenced that has not
-   yet been declared.  According to IEEE 1800-2017 26.3, all packages must
-   be declared before being used.
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+
+   Often the package is declared in its own header file.  In this case add
+   an include of that package header file to the referencing file.  (And
+   make sure you have header guards in the package's header file to prevent
+   multiple declarations of the package.)
+
+
+.. option:: PREPROCZERO
+
+   Warns that a preprocessor \`ifdef/\`ifndef expression (added in IEEE
+   1800-2023) evaluates a define value which has a value of :code:`0`.
+   This will evaluate in the expression as :code:`1` because the define has
+   a definition, unlike in the C preprocessor, which evaluates using the
+   define's value (of :code:`1`).
+
+   Referring to a define with an empty value does not give this warning, as
+   in C, the preprocessor will give an error on a preprocessor expression
+   of a define that is empty.
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+       `define ZERO 0
+       `ifdef (ZERO || ZERO)  //<--- warning PREPROCZERO
+        `error This_will_error_which_might_be_not_the_intent
+       `endif
+
+   The portable way to suppress this warning is to use a define value other
+   than zero, when it is to be used in a preprocessor expression.


 .. option:: PROCASSWIRE
@@ -1132,7 +1453,10 @@ List Of Warnings

 .. option:: RANDC

-   Warns that the :code:`randc` keyword is unsupported and being converted
+   Historical, never issued since version 5.018, when :code:`randc` became
+   fully supported.
+
+   Warned that the :code:`randc` keyword was unsupported and was converted
   to :code:`rand`.


@@ -1275,6 +1599,39 @@ List Of Warnings
   modeled values, or DPI calls.


+.. option:: SIDEEFFECT
+
+   Warns that an expression has a side effect that might not properly be
+   executed by Verilator.
+
+   This often represents a bug in Verilator, as opposed to a bad code
+   construct, however the Verilog code can typically be changed to avoid
+   the warning.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 1
+
+         x = y[a++];
+
+   This example warns because Verilator does not currently handle side
+   effects inside array subscripts; the a++ may be executed multiple times.
+
+   Rewrite the code to avoid expression side effects, typically by using a
+   temporary:
+
+   .. code-block:: sv
+      :linenos:
+
+         temp = a++;
+         x = y[temp];
+
+   Ignoring this warning may make Verilator simulations differ from other
+   simulators.
+
+
 .. option:: SPLITVAR

   Warns that a variable with a :option:`/*verilator&32;split_var*/`
@@ -1299,6 +1656,17 @@ List Of Warnings
   * The variable is tristate or bidirectional. (e.g., :code:`inout`).


+.. option:: STATICVAR
+
+   Warns that a static variable declared in a loop with declaration assignment
+   was converted to automatic. Often such variables were intended to
+   instead be declared "automatic".
+
+   Ignoring this warning may make Verilator differ from other simulators,
+   which will treat the variable as static. Verilator may in future versions also
+   treat the variable as static.
+
+
 .. option:: STMTDLY

   Warns that the code has a statement with a delayed time in front of it.
@@ -1336,6 +1704,9 @@ List Of Warnings
   Warning that a symbol matches a C++ reserved word, and using this as a
   symbol name would result in odd C++ compiler errors.  You may disable
   this warning, but Verilator will rename the symbol to avoid conflict.
+   If you are using `--vpi` and only mark things as public for VPI access
+   (and not C++ access) then it is advisable to disable this warning with
+   :code:`-Wno-SYMRSVDWORD`.


 .. option:: SYNCASYNCNET
@@ -1424,7 +1795,7 @@ List Of Warnings

   .. code-block::

-         %Warning-TIMESCALEMOD: example.v:1:8: Timescale missing on this module as other modules have it (IEEE 1800-2017 3.14.2.3)
+         %Warning-TIMESCALEMOD: example.v:1:8: Timescale missing on this module as other modules have it (IEEE 1800-2023 3.14.2.3)

   Recommend using :vlopt:`--timescale` argument, or in front of all
   modules use:
@@ -1568,7 +1939,8 @@ List Of Warnings

 .. option:: UNPACKED

-   Warns that unpacked structs and unions are not supported.
+   Warns that unpacked structs and unions are not supported because
+   :vlopt:`--structs-packed` was used, or by up through version 5.004.

   Ignoring this warning will make Verilator treat the structure as packed,
   which may make Verilator simulations differ from other simulators. This
@@ -1619,14 +1991,16 @@ List Of Warnings

   .. TODO better example

-   Warns that the specified genvar is never used/consumed.
+   Warns that the specified genvar is never used/consumed. See similar
+   :option:`UNUSEDSIGNAL`.


 .. option:: UNUSEDPARAM

   .. TODO better example

-   Warns that the specified parameter is never used/consumed.
+   Warns that the specified parameter is never used/consumed. See similar
+   :option:`UNUSEDSIGNAL`.


 .. option:: UNUSEDSIGNAL
@@ -1647,12 +2021,12 @@ List Of Warnings

   .. code-block:: sv

-         wire _unused_ok = &{1'b0,
+         wire _unused_ok = 1'b0 && &{1'b0,
                             sig_not_used_a,
                             sig_not_used_yet_b,  // To be fixed
                             1'b0};

-   The reduction AND and constant zeros mean the net will always be zero,
+   The AND with constant zero mean the net will always be zero,
   so won't use simulation runtime.  The redundant leading and trailing
   zeros avoid syntax errors if there are no signals between them.  The
   magic name "unused" (controlled by the :vlopt:`--unused-regexp` option)
@@ -1666,7 +2040,7 @@ List Of Warnings
 .. option:: USERERROR

   A SystemVerilog elaboration-time assertion error was executed.
-   IEEE 1800-2017 20.11 requires this error.
+   IEEE 1800-2023 20.11 requires this error.

   Faulty example:

@@ -1682,7 +2056,7 @@ List Of Warnings
 .. option:: USERFATAL

   A SystemVerilog elaboration-time assertion fatal was executed.
-   IEEE 1800-2017 20.11 requires this error.
+   IEEE 1800-2023 20.11 requires this error.

   Faulty example:

@@ -1698,7 +2072,7 @@ List Of Warnings
 .. option:: USERINFO

   A SystemVerilog elaboration-time assertion print was executed.  This is
-   not an error or warning, and IEEE 1800-2017 20.11 requires this
+   not an error or warning, and IEEE 1800-2023 20.11 requires this
   behavior.

   Example:
@@ -1713,7 +2087,7 @@ List Of Warnings
 .. option:: USERWARN

   A SystemVerilog elaboration-time assertion warning was executed.
-   IEEE 1800-2017 20.11 requires this warning.
+   IEEE 1800-2023 20.11 requires this warning.

   Faulty example:

@@ -1749,13 +2123,19 @@ List Of Warnings

 .. option:: WAITCONST

-   .. code-block:: sv
-
-         wait(0);  // Blocks forever
-
   Warns that a `wait` statement awaits a constant condition, which means it
   either blocks forever or never blocks.

+   As a special case `wait(0)` with the literal constant `0` (as opposed to
+   something that elaborates to zero), does not warn, as it is presumed the
+   code is making the intent clear.
+
+   Faulty example:
+
+   .. code-block:: sv
+
+         wait(1);  // Blocks forever
+

 .. option:: WIDTH

@@ -1790,17 +2170,32 @@ List Of Warnings

   For example, this is a missized index:

-   .. include:: ../../docs/gen/ex_WIDTH_1_faulty.rst
+   .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_faulty.rst

-   Results in:
+   Results in a :option:`WIDTHEXPAND` warning:

-   .. include:: ../../docs/gen/ex_WIDTH_1_msg.rst
+   .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_msg.rst

   One possible fix:

-   .. include:: ../../docs/gen/ex_WIDTH_1_fixed.rst
+   .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_fixed.rst


+.. option:: WIDTHTRUNC
+
+   A more granular :option:`WIDTH` warning, for when a value is
+   truncated. See :option:`WIDTH`.
+
+.. option:: WIDTHEXPAND
+
+   A more granular :option:`WIDTH` warning, for when a value is zero
+   expanded. See :option:`WIDTH`.
+
+.. option:: WIDTHXZEXPAND
+
+   A more granular :option:`WIDTH` warning, for when a value is X/Z
+   expanded. See :option:`WIDTH`.
+
 .. option:: WIDTHCONCAT

   Warns that based on the width rules of Verilog, a concatenate, or
@@ -1832,3 +2227,46 @@ List Of Warnings
   Inactive region. Such processes do get resumed in the same time slot
   somewhere in the Active region. Issued only if Verilator is run with the
   :vlopt:`--timing` option.
+
+.. option:: ZEROREPL
+
+   Warns that zero is used as the replication value in the replication
+   operator. This is specified as an error by IEEE 1800-2023 11.4.12.1.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 5
+
+         module dut
+            #(parameter int MY_PARAM = 0);
+           reg [7:0] data;
+           always @* begin
+             data = {MY_PARAM{1'b1}};  //<--- Warning
+           end
+         endmodule
+
+   Results in the following error:
+
+   .. code-block::
+
+       %Error-ZEROREPL: test.v:5:22: Replication value of 0 is only legal under a concatenation (IEEE 1800-2023 11.4.12.1)
+
+   Note that in some cases, this warning may be false, when a condition
+   upstream or downstream of the access means the zero replication will
+   never execute or be used.
+
+   Repaired example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         module dut
+            #(parameter int MY_PARAM = 1);  //<--- REPAIRED
+           reg [7:0] data;
+           always @* begin
+             data = {MY_PARAM{1'b1}};
+           end
+         endmodule
@@ -224,7 +224,7 @@ Scheduling
 ----------

 Verilator implements the Active and NBA regions of the SystemVerilog scheduling
-model as described in IEEE 1800-2017 chapter 4, and in particular sections
+model as described in IEEE 1800-2023 chapter 4, and in particular sections
 4.5 and Figure 4.1. The static (Verilation time) scheduling of SystemVerilog
 processes is performed by code in the ``V3Sched`` namespace. The single
 entry point to the scheduling algorithm is ``V3Sched::schedule``. Some
@@ -312,7 +312,7 @@ Scheduling of clocked and combinational logic
 For performance, clocked and combinational logic needs to be ordered.
 Conceptually this minimizes the iterations through the evaluation loop
 presented in the reference algorithm in the SystemVerilog standard (IEEE
-1800-2017 section 4.5), by evaluating logic constructs in data-flow order.
+1800-2023 section 4.5), by evaluating logic constructs in data-flow order.
 Without going into a lot of detail here, accept that well thought out ordering
 is crucial to good simulation performance, and also enables further
 optimizations later on.
@@ -407,7 +407,7 @@ triggered due to a combinational signal change from the previous evaluation
 pass, and a combinational loop settling due to hybrid logic, if the clocked
 logic reads the not yet settled combinationally driven signal. Such a race
 is indeed possible, but our evaluation is consistent with the SystemVerilog
-scheduling semantics (IEEE 1800-2017 chapter 4), and therefore any program
+scheduling semantics (IEEE 1800-2023 chapter 4), and therefore any program
 that exhibits such a race has non-deterministic behavior according to the
 SystemVerilog semantics, so we accept this.

@@ -628,21 +628,32 @@ coroutines ``co_await`` its ``join`` function, and forked ones call ``done``
 when they're finished. Once the required number of coroutines (set using
 ``setCounter``) finish execution, the forking coroutine is resumed.

-Awaitable Utilities
-~~~~~~~~~~~~~~~~~~~
+``VlForever``
+~~~~~~~~~~~~~

-There are also two small utility awaitable types:
-
-* ``VlNow`` is an awaitable that suspends and immediately resumes coroutines.
-  It is used for forcing a coroutine to be moved onto the heap. See the `Forks`
-  section for more detail.
-* ``VlForever`` is used for blocking a coroutine forever. See the `Timing pass`
-  section for more detail.
+A small utility awaitable type. It allows for blocking a coroutine forever. It
+is currently only used for ``wait`` statements that await a constant false
+condition. See the `Timing Pass` section for more details.

 Timing Pass
 ~~~~~~~~~~~

-The visitor in ``V3Timing.cpp`` transforms each timing control into a ``co_await``.
+There are two visitors in ``V3Timing.cpp``.
+
+The first one, ``TimingSuspendableVisitor``, does not perform any AST
+transformations. It is responsible for marking processes and C++ functions that
+contain timing controls as suspendable. Processes that call suspendable
+functions are also marked as suspendable. Functions that call, are overridden
+by, or override suspendable functions are marked as suspendable as well.
+
+The visitor keeps a dependency graph of functions and processes to handle such
+cases. A function or process is dependent on a function if it calls it. A
+virtual class method is dependent on another class method if it calls it,
+overrides it, or is overriden by it.
+
+The second visitor in ``V3Timing.cpp``, ``TimingControlVisitor``, uses the
+information provided by ``TimingSuspendableVisitor`` and transforms each timing
+control into a ``co_await``.

 * event controls are turned into ``co_await`` on a trigger scheduler's
  ``trigger`` method. The awaited trigger scheduler is the one corresponding to
@@ -674,14 +685,9 @@ Each sub-statement of a ``fork`` is put in an ``AstBegin`` node for easier
 grouping. In a later step, each of these gets transformed into a new, separate
 function. See the `Forks` section for more detail.

-Processes that use awaits are marked as suspendable. Later, during ``V3Sched``,
-they are transformed into coroutines. Functions that use awaits get the return
-type of ``VlCoroutine``. This immediately makes them coroutines. Note that if a
-process calls a function that is a coroutine, the call gets wrapped in an
-await, which means the process itself will be marked as suspendable. A virtual
-function is a coroutine if any of its overriding or overridden functions are
-coroutines. The visitor keeps a dependency graph of functions and processes to
-handle such cases.
+Suspendable functions get the return type of ``VlCoroutine``, which makes them
+coroutines. Later, during ``V3Sched``, suspendable processes are also
+transformed into coroutines.

 Scheduling with timing
 ~~~~~~~~~~~~~~~~~~~~~~
@@ -749,9 +755,7 @@ doesn't suspend the forking process.

 In forked processes, references to local variables are only allowed in
 ``fork..join``, as this is the only case that ensures the lifetime of these
-locals are at least as long as the execution of the forked processes. This is
-where ``VlNow`` is used, to ensure the locals are moved to the heap before they
-are passed by reference to the forked processes.
+locals are at least as long as the execution of the forked processes.


 Multithreaded Mode
@@ -1027,15 +1031,100 @@ the evaluation process records a bitmask of variables that might have
 changed; if clear, checking those signals for changes may be skipped.


+Constrained randomization
+-------------------------
+
+Because general constrained randomization is a co-NP-hard problem, not all
+cases are implemented in Verilator, and an external specialized SMT solver is
+used for any non-obvious ones.
+
+The ``randomize()`` method spawns an SMT solver in a sub-process. Then the
+solver gets a setup query, then the definition of variables, then all the
+constraints (SMT assertions) about the variables. Since the solver has no
+information about the class' PRNG state, if the problem is satisfiable,
+the solution space is further constrained by adding extra random constraints,
+and querying the values satisfying the problem statement.
+The constraint is currently constructed as fixing a simple xor of randomly
+chosen bits of the variables being randomized.
+
+The runtime classes used for handling the randomization are  defined in
+``verilated_random.h`` and ``verilated_random.cpp``.
+
+
+``VlSubprocess``
+~~~~~~~~~~~~~~~~
+
+Subprocess handle, responsible for keeping track of the resources like child
+PID, read and write file descriptors, and presenting them as a C++ iostream.
+
+
+``VlRandomizer``
+~~~~~~~~~~~~~~~~
+
+Randomizer class, responsible for keeping track of variables and constraints,
+and communicating with the solver subprocess.
+
+The solver gets the constraints in `SMT-LIB2
+<https://smtlib.cs.uiowa.edu/>`__ textual format in the following syntax:
+
+::
+
+    (set-info :smt-lib-version 2.0)
+    (set-option :produce-models true)
+    (set-logic QF_BV)
+
+    (declare-fun v () (_ BitVec 16))
+    (declare-fun w () (_ BitVec 64))
+    (declare-fun x () (_ BitVec 48))
+    (declare-fun z () (_ BitVec 24))
+    (declare-fun t () (_ BitVec 23))
+    (assert (or (= v #x0003) (= v #x0008)))
+    (assert (= w #x0000000000000009))
+    (assert (or (or (= x #x000000000001) (= x #x000000000002)) (or (= x #x000000000004) (= x #x000000000009))))
+    (assert (bvult ((_ zero_extend 8) z) #x00000015))
+    (assert (bvugt ((_ zero_extend 8) z) #x0000000d))
+
+    (check-sat)
+
+The solver responds with either ``sat`` or ``unsat``. Then the initial solution
+is queried with:
+
+::
+
+    (get-value (v w x z t ))
+
+The solver then responds with e.g.:
+
+::
+
+    ((v #x0008)
+     (w #x0000000000000005)
+     (x #x000000000002)
+     (z #x000010)
+     (t #b00000000000000000000000))
+
+And then a follow-up query (or a series thereof) is asked, and the solver gets
+reset, so that it can be reused by subsequent randomization attempts:
+
+::
+
+    (assert (= (bvxor (bvxor <...> (bvxor ((_ extract 21 21) z) ((_ extract 39 39) x)) ((_ extract 5 5) w)) <...> ((_ extract 10 10) w)) #b0))
+    (check-sat)
+    (get-value)
+    ...
+    (reset)
+
+
+
 Coding Conventions
 ==================


-Compiler Version and C++11
+Compiler Version and C++14
 --------------------------

-Verilator requires C11. Verilator does not require any newer versions, but
-is maintained to build successfully with C14/C17/C20.
+Verilator requires C14. Verilator does not require any newer versions, but
+is maintained to build successfully with C17/C20.


 Indentation and Naming Style
@@ -1218,9 +1307,9 @@ There are three ways data is passed between visitor functions.

 2. User attributes. Each ``AstNode`` (**Note.** The AST node, not the
   visitor) has five user attributes, which may be accessed as an
-   integer using the ``user1()`` through ``user5()`` methods, or as a
+   integer using the ``user1()`` through ``user4()`` methods, or as a
   pointer (of type ``AstNUser``) using the ``user1p()`` through
-   ``user5p()`` methods (a common technique lifted from graph traversal
+   ``user4p()`` methods (a common technique lifted from graph traversal
   packages).

   A visitor first clears the one it wants to use by calling
@@ -1383,9 +1472,6 @@ For all tests to pass, you must install the following packages:

 -  SystemC to compile the SystemC outputs, see http://systemc.org

-  Parallel::Forker from CPAN to run tests in parallel; you can install
-   this with e.g. "sudo cpan install Parallel::Forker".
-
 -  vcddiff to find differences in VCD outputs. See the readme at
   https://github.com/veripool/vcddiff

@@ -1395,8 +1481,8 @@ For all tests to pass, you must install the following packages:
 Controlling the Test Driver
 ---------------------------

-The test driver script `driver.pl` runs tests; see the `Test Driver`
-section.  The individual test drivers are written in PERL; see `Test
+The test driver script `driver.py` runs tests; see the `Test Driver`
+section.  The individual test drivers are written in Perl; see `Test
 Language`.


@@ -1408,7 +1494,7 @@ A specific regression test can be executed manually. To start the

 ::

-   test_regress/t/t_EXAMPLE.pl
+   test_regress/t/t_EXAMPLE.py


 Regression Testing for Developers
@@ -1428,13 +1514,6 @@ Developers will also want to call ./configure with two extra flags:
   disabled by default, as SystemC installation problems would otherwise
   falsely indicate a Verilator problem.

-When enabling the long tests, some additional PERL modules are needed,
-which you can install using cpan.
-
-::
-
-   cpan install Parallel::Forker
-
 There are some traps to avoid when running regression tests

 - When checking the MANIFEST, the test will fail on unexpected code in the
@@ -1458,6 +1537,19 @@ There are some traps to avoid when running regression tests
  system-dependent, but on Fedora Linux it would require editing the
  ``/etc/security/limits.conf`` file as root.

+Diffing generated code after changes
+------------------------------------
+
+When making a change in the code generation area that should not change the
+actual emitted code, it is useful to perform a diff to make sure the emitted
+code really did not change. To do this, the top level Makefile provides the
+*test-snap* and *test-diff* targets:
+
+- Run the test suite with ``make test``
+- Take a snapshot with ``make test-snap``
+- Apply your changes
+- Run the test suite again with ``make test``
+- See the changes in the output with ``make test-diff``

 Continuous Integration
 ----------------------
@@ -1509,8 +1601,19 @@ debug level 5, with the V3Width.cpp file at level 9.
 --debug
 -------

-When you run with ``--debug``, there are two primary output file types
-placed into the obj_dir, .tree and .dot files.
+When you run with ``--debug``, there are three primary output file types
+placed into the obj_dir, .vpp, .tree and .dot files.
+
+.vpp Output
+-----------
+
+Verilator creates a *{mod_prefix}*\ __inputs\ .vpp file containing all the
+files that were read, filtered by preprocessing. This file can be fed back
+into Verilator, replacing on the command line all of the previous input
+files, to enable simplification of test cases.
+
+Verilator also creates .vpp files for each individual file passed on the
+command line.


 .dot Output
@@ -1553,7 +1656,7 @@ field in the section below.
 +---------------+--------------------------------------------------------+
 | ``1:2:``      | The hierarchy of the ``VAR`` is the ``op2p``           |
 |               | pointer under the ``MODULE``, which in turn is the     |
-|               | ``op1p`` pointer under the ``NETLIST``                 |
+|               | ``op1p`` pointer under the ``NETLIST``.                |
 +---------------+--------------------------------------------------------+
 | ``VAR``       | The AstNodeType (e.g. ``AstVar``).                     |
 +---------------+--------------------------------------------------------+
@@ -1567,7 +1670,7 @@ field in the section below.
 |               | and "aa" the 27th. Then line 22 in that file, then     |
 |               | column 8 (aa=0, az=25, ba=26, ...).                    |
 +---------------+--------------------------------------------------------+
-| ``@dt=0x...`` | The address of the data type this node contains.       |
+| ``@dt=0x...`` | The address of the data type this node references.     |
 +---------------+--------------------------------------------------------+
 | ``w32``       | The data-type width() is 32 bits.                      |
 +---------------+--------------------------------------------------------+
@@ -1575,7 +1678,7 @@ field in the section below.
 |               | variable.                                              |
 +---------------+--------------------------------------------------------+
 | ``[O]``       | Flags which vary with the type of node, in this        |
-|               | case, it means the variable is an output.              |
+|               | case of a VAR, it means the variable is an output.     |
 +---------------+--------------------------------------------------------+

 In more detail, the following fields are dumped common to all nodes. They
@@ -1625,7 +1728,7 @@ Source file and line
   file is ``a``, the 26th is ``z``, the 27th is ``aa``, and so on.

 User pointers
-   Shows the value of the node's user1p...user5p, if non-NULL.
+   Shows the value of the node's user1p...user4p, if non-NULL.

 Data type
   Many nodes have an explicit data type. "@dt=0x..." indicates the
@@ -1668,6 +1771,84 @@ Similarly, the ``NETLIST`` has a list of modules referred to by its
 ``op1p()`` pointer.


+.tree.json Output
+-----------------
+
+``.tree.json``` is an alternative dump format to ``.tree`` that is meant for
+programmatic processing (e.g. with `astsee <https://github.com/antmicro/astsee>`_).
+To enable this dump format, use :vlopt:`--dump-tree-json` or :vlopt:`--json-only`.
+
+Structure:
+::
+
+  {
+    /* Attributes that are common to all types of nodes */
+    "type": "VAR",
+    "name": "cyc",
+    /* By default addresses and filenames use short/stable ids rather than real value */
+    "addr": "(H)",
+    "loc": "a,25:12,26:15", /* "fileid,firstLine:firstCol,lastLine:endCol" (endCol is right exclusive) */
+    "editNum": 602,
+    /* Fields that are specific to AstVar nodes:  */
+    "origName": "cyc",
+    "isSc": false,
+    "ioDirection": "NONE",
+    "isConst": false,
+    "isPullup": false,
+    "isPulldown": false,
+    "isUsedClock": false,
+    "isSigPublic": false,
+    "isLatched": false,
+    "isUsedLoopIdx": false,
+    "noReset": false,
+    "attrIsolateAssign": false,
+    "attrFileDescr": false,
+    "isDpiOpenArray": false,
+    "isFuncReturn": false,
+    "isFuncLocal": false,
+    "attrClocker": "UNKNOWN",
+    "lifetime": "NONE",
+    "varType": "VAR",
+    /* Lists of child nodes (which use similar structure as their parent): */
+    "childDTypep": [ /* ... */ ],
+    "delayp": [ /* ... */ ],
+    "valuep": [ /* ... */ ],
+    "attrsp": [ /* ... */ ]
+  }
+
+.tree.meta.json Output
+----------------
+.tree.meta.json contains metadata that is common across the whole AST tree
+(in case of --dump-tree-json, multiple trees share one meta file).
+
+Besides de-duplication of data shared between multiple stages, .meta.json enables offloading
+unstable data (that can vary from machine-to-machine or run-to-run) from main .tree.json.
+This offloading allows, for example, to use byte-to-byte comparisons of AST dumps in tests.
+
+::
+
+  {"files": {
+    /* Map id to filename, and other metadata */
+    "d": {"filename":"/home/ant/tmp/verilator/include/verilated_std.sv", "realpath":"/home/ant/tmp/verilator/include/verilated_std.sv", "language":"1800-2023"},
+    "a": {"filename":"<built-in>", "realpath":"<built-in>", "language":"1800-2023"},
+    "b": {"filename":"<command-line>", "realpath":"<command-line>", "language":"1800-2023"},
+    "c": {"filename":"input.vc", "realpath":"/home/ant/tmp/verilator/test_regress/input.vc", "language":"1800-2023"},
+    "e": {"filename":"t/t_EXAMPLE.v", "realpath":"/home/ant/tmp/verilator/test_regress/t/t_EXAMPLE.v", "language":"1800-2023"}
+   },"pointers": {
+    /* Map id to real address */
+    "(AG)": "0x562997289180",
+    "(YF)": "0x5629971c50b0",
+    "(WF)": "0x5629971e7ae0",
+    /* ... /*
+   },"ptrFieldNames": [
+    /* List of fields that are used for storing pointers */
+    "aboveScopep",
+    "voidp",
+    "addr",
+    /* ... */
+ ]}
+
+
 .tree.dot Output
 ----------------

@@ -1680,7 +1861,7 @@ represent the pointers (``op1p``, ``op2p``, etc) between the nodes.
 Debugging with GDB
 ------------------

-The `driver.pl` script accepts ``--debug --gdb`` to start
+The `driver.py` script accepts ``--debug --gdb`` to start
 Verilator under gdb and break when an error is hit, or the program is about
 to exit. You can also use ``--debug --gdbbt`` to just backtrace and then
 exit gdb. To debug the Verilated executable, use ``--gdbsim``.
@@ -1691,7 +1872,7 @@ can use ``--debug`` and look at the underlying invocation of

 ::

-   t/t_alw_dly.pl --debug
+   t/t_alw_dly.py --debug

 shows it invokes the command:

@@ -1740,6 +1921,20 @@ To print a node:
   pnt nodep
   # or: call dumpTreeGdb(nodep)  # aliased to "pnt" in src/.gdbinit

+``src/.gdbinit`` and ``src/.gdbinit.py`` define handy utilities for working with
+JSON AST dumps. For example:
+
+* ``jstash nodep`` - Perform a JSON AST dump and save it into GDB value history (e.g. ``$1``)
+* ``jtree nodep`` - Perform a JSON AST dump and pretty print it using ``astsee_verilator``.
+* ``jtree $1`` - Pretty print a dump that was previously saved by ``jstash``.
+* ``jtree nodep -d '.file, .timeunit'`` - Perform a JSON AST dump, filter out some fields and pretty print it.
+* ``jtree 0x55555613dca0`` - Pretty print using address literal (rather than actual pointer).
+* ``jtree $1 nodep`` - Diff ``nodep`` against an older dump.
+
+A detailed description of ``jstash`` and ``jtree`` can be displayed using ``gdb``'s ``help`` command.
+
+These commands require `astsee <https://github.com/antmicro/astsee>`_ to be installed.
+
 When GDB halts, it is useful to understand that the backtrace will commonly
 show the iterator functions between each invocation of ``visit`` in the
 backtrace. You will typically see a frame sequence something like:
@@ -1774,7 +1969,7 @@ Generally, what would you do to add a new feature?
   Follow the convention described above about the AstNode type hierarchy.
   Ordering of definitions is enforced by ``astgen``.

-5. Now you can run ``test_regress/t/t_<newtestcase>.pl --debug`` and it'll
+5. Now you can run ``test_regress/t/t_<newtestcase>.py --debug`` and it'll
   probably fail, but you'll see a
   ``test_regress/obj_dir/t_<newtestcase>/*.tree`` file which you can examine
   to see if the parsing worked. See also the sections above on debugging.
@@ -1801,23 +1996,21 @@ Verilator ideally would support all of IEEE, and has the goal to get close
 to full support. However the following IEEE sections and features are not
 anticipated to be ever implemented for the reasons indicated.

-IEEE 1800-2017 3.3 modules within modules
+IEEE 1800-2023 3.3 modules within modules
    Little/no tool support, and arguably not a good practice.
-IEEE 1800-2017 6.12 "shortreal"
+IEEE 1800-2023 6.12 "shortreal"
    Little/no tool support, and easily promoted to real.
-IEEE 1800-2017 11.11 Min, typ, max
+IEEE 1800-2023 11.11 Min, typ, max
    No SDF support, so will always use typical.
-IEEE 1800-2017 11.12 "let"
-    Little/no tool support, makes it difficult to implement parsers.
-IEEE 1800-2017 20.16 Stochastic analysis
+IEEE 1800-2023 20.16 Stochastic analysis
    Little industry use.
-IEEE 1800-2017 20.17 PLA modeling
+IEEE 1800-2023 20.17 PLA modeling
    Little industry use and outdated technology.
-IEEE 1800-2017 31 Timing checks
+IEEE 1800-2023 31 Timing checks
    No longer relevant with static timing analysis tools.
-IEEE 1800-2017 32 SDF annotation
+IEEE 1800-2023 32 SDF annotation
    No longer relevant with static timing analysis tools.
-IEEE 1800-2017 33 Config
+IEEE 1800-2023 33 Config
    Little industry use.


@@ -1825,7 +2018,7 @@ IEEE 1800-2017 33 Config
 Test Driver
 ===========

-This section documents the test driver script, `driver.pl`.  driver.pl
+This section documents the test driver script, `driver.py`.  driver.py
 invokes Verilator or another simulator on each test file.  For test file
 contents description see `Test Language`.

@@ -1837,7 +2030,7 @@ the regression tests with OBJCACHE enabled and in parallel on a machine
 with many cores.  See the -j option and OBJCACHE environment variable.


-driver.pl Non-Scenario Arguments
+driver.py Non-Scenario Arguments
 --------------------------------

 --benchmark [<cycles>]
@@ -1858,6 +2051,10 @@ driver.pl Non-Scenario Arguments
  files with dumping level 3, which dumps the standard critical stages.
  For details on the format see `.tree Output`.

+--fail-max <numtests>
+  Set the number of failing tests, after which the driver will stop running
+  additional tests.  Defaults to 20, 0 disables.
+
 --gdb
  Same as ``verilator --gdb``: Run Verilator under the debugger.

@@ -1903,13 +2100,16 @@ driver.pl Non-Scenario Arguments
  memory leaks.

 --site
-  Run site specific tests also.
+  Run site-specific tests also.

 --stop
  Stop on the first error.

 --trace
-  Set the simulator specific flags to request waveform tracing.
+  Set the simulator-specific flags to request waveform tracing.
+
+--valgrind
+  Same as ``verilator --valgrind``: Run Verilator under `Valgrind <https://valgrind.org/>`_.

 --verbose
  Compile and run the test in verbose mode. This means ``TEST_VERBOSE``
@@ -1919,7 +2119,7 @@ driver.pl Non-Scenario Arguments
  For tests using the standard C++ wrapper, enable runtime debug mode.


-driver.pl Scenario Arguments
+driver.py Scenario Arguments
 ----------------------------

 The following options control which simulator is used, and which tests are
@@ -1954,11 +2154,14 @@ simultaneously.
 --vltmt
  Run Verilator tests in multithreaded mode.

+--xrun
+  Run Cadence Xcelium simulator tests.
+
 --xsim
  Run Xilinx XSim simulator tests.


-driver.pl Environment
+driver.py Environment
 ---------------------

 HARNESS_UPDATE_GOLDEN
@@ -1997,6 +2200,10 @@ VERILATOR_ROOT
  Standard path to Verilator distribution root; see primary Verilator
  documentation.

+VERILATOR_SOLVER
+  SMT solver command for constrained randomization; see primary Verilator
+  documentation.
+
 VERILATOR_TESTS_SITE
  Used with ``--site``, a colon-separated list of directories with tests to
  be added to testlist.
@@ -2014,30 +2221,30 @@ VERILATOR_XVLOG
 Test Language
 =============

-This section describes the format of the ``test_regress/t/*.pl`` test
-language files, executed by `driver.pl`.
+This section describes the format of the ``test_regress/t/*.py`` test
+language files, executed by `driver.py`.

 Test Language Summary
 ---------------------

 For convenience, a summary of the most commonly used features is provided
 here, with a reference in a later section. All test files typically have a
-call to the ``lint`` or ``compile`` subroutine to compile the test. For
-run-time tests, this is followed by a call to the ``execute``
-subroutine. Both of these functions can optionally be provided with
-arguments specifying additional options.
+call to the ``test.lint`` or ``test.compile`` methods to compile the
+test. For run-time tests, this is followed by a call to the
+``test.execute`` method. Both of these functions can optionally be provided
+with arguments specifying additional options.

-If those complete, the script calls ``ok`` to increment the count of
-successful tests and then returns 1 as its result.
+If those complete, the script calls ``test.passes`` to increment the count
+of successful tests.

-The driver.pl script assumes by default that the source Verilog file name
+The driver.py script assumes by default that the source Verilog file name
 matches the test script name. So a test whose driver is
-``t/t_mytest.pl`` will expect a Verilog source file ``t/t_mytest.v``.
+``t/t_mytest.py`` will expect a Verilog source file ``t/t_mytest.v``.
 This can be changed using the ``top_filename`` subroutine, for example

 ::

-   top_filename("t/t_myothertest.v");
+   test.top_filename = "t/t_myothertest.v"

 By default, all tests will run with major simulators (Icarus Verilog, NC,
 VCS, ModelSim, etc.) as well as Verilator, to allow results to be
@@ -2046,26 +2253,25 @@ can use the following:

 ::

-   scenarios(vlt => 1);
+   test.scenarios('vlt')

-Of the many options that can be set through arguments to ``compiler`` and
-``execute``, the following are particularly useful:
+Of the many options that can be set through arguments to ``test.compiler``
+and ``test.execute``, the following are particularly useful:

 ``verilator_flags2``
  A list of flags to be passed to verilator when compiling.

 ``fails``
-  Set to 1 to indicate that the compilation or execution is intended to fail.
+  Set true to indicate that the compilation or execution is intended to fail.

 For example, the following would specify that compilation requires two
 defines and is expected to fail.

 ::

-   compile(
+   test.compile(
      verilator_flags2 => ["-DSMALL_CLOCK -DGATED_COMMENT"],
-      fails => 1,
-      );
+      fails = True)

 Hints On Writing Tests
 ----------------------
@@ -2078,10 +2284,10 @@ same name as the test, but with .cpp as suffix

 ::

-   compile(
-      make_top_shell   => 0,
-      make_main        => 0,
-      verilator_flags2 => ["--exe $Self->{t_dir}/$Self->{name}.cpp"], );
+   test.compile(
+      make_top_shell=False,
+      make_main=False,
+      verilator_flags2=["--exe", test.t_dir + "/" + test.name + ".cpp"])

 Tests should be self-checking, rather than producing lots of output. If a
 test succeeds it should print ``*-* All Finished *-*`` to standard output
@@ -2110,7 +2316,7 @@ Or in a hand-written C++ wrapper:
 ::

   #ifdef TEST_VERBOSE
-      cout << "Read a=" << a << endl;
+      std::cout << "Read a=" << a << std::endl;
   #endif

 A filename that should be used to check the output results is given with
@@ -2121,9 +2327,8 @@ compile time, it is the only option. For example:
 ::

   compile(
-      fails => 1,
-      expect_filename => $Self->{golden_filename},
-      );
+      fails=True,
+      expect_filename=test.golden_filename)

 Note ``expect_filename`` strips some debugging information from the logfile
 when comparing.
@@ -2132,9 +2337,9 @@ when comparing.
 Test Language Compile/Lint/Run Arguments
 ----------------------------------------

-This section describes common arguments to ``compile()``, ``lint()``, and
-``run()``.  The full list of arguments can be found by looking at the
-``driver.pl`` source code.
+This section describes common arguments to ``test.compile``, ``test.lint``,
+and ``test.run``.  The full list of arguments can be found by looking at
+the ``driver.py`` source code.

 all_run_flags
  A list of flags to be passed when running the simulator (Verilated model
@@ -2145,11 +2350,6 @@ check_finished
  string ``*-* All Finished *-*`` being printed on standard output. This is
  the normal way for successful tests to finish.

-expect
-  A quoted list of strings or regular expression to be matched in the
-  output. See `Hints On Writing Tests` for more detail on how this argument
-  should be used.
-
 fails
  True to indicate this step is expected to fail.  Tests that are expected
  to fail generally have _bad in their filename.
@@ -2211,7 +2411,7 @@ xsim_flags / xsim_flags2 / xsim_run_flags
 Distribution
 ============

-Copyright 2008-2023 by Wilson Snyder. Verilator is free software; you can
+Copyright 2008-2025 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.

@@ -1,4 +1,5 @@
 ABCp
+Aadi
 Accellera
 Affe
 Aleksander
@@ -6,57 +7,78 @@ Alexandre
 Ami
 Amir
 Anastasiadis
+Anglin
 Anikin
 Antmicro
 Antonin
 Antwerpen
 Arasanipalai
 Arjen
+Arshid
 Asciidoc
 Ashutosh
 Ast
 Atmel
 Aurelien
+Badáň
 Bagri
+Balboni
 Baltazar
 Bardsley
 Benchmarking
 Berman
 Bhagavatula
 Bhattacharyya
+Biancolin
 Binderman
+Björk
 Bleiweiss
 Bogdan
+Bonneau
 Bouchard
 Boumenot
 Brej
 Briquet
 Brownlee
 Buckenmaier
+Burghoorn
 Bybell
+CLang
 CMake
 Cai
 Cavium
 Cfuncs
 Chandan
+Chentai
+Cherkasov
+Chih
 Chitlesh
 Christophe
 Cochrane
+Conda
+Corteggiani
+Cozzocrea
 Cuan
 Cygwin
 DErrico
 DFG
 Da
+Dai
 Danilo
 Dannoritzer
 Das
+Davide
 Dcache
 Deadman
 Debacker
+Deepa
 Defparams
+Delm
 Denio
+Deniz
 Deprecations
 Deroo
+Desai
 Dickol
 Diez
 Dimitris
@@ -65,9 +87,11 @@ Djordjevic
 Dobbie
 Dockerfile
 Donal
+Donovick
 Doorn
 Doxygen
 Dressler
+Dudek
 Duraid
 Dutton
 Dzetkulic
@@ -80,22 +104,32 @@ Eiler
 Eivind
 El
 Elbourne
+Elzeftawi
 Embecosm
 Engstrom
 Enzo
 Eugen
 Fabrizio
+Faucher
+Faure
+Feinberg
 Fekete
 Ferrandi
+Filip
 Flachs
 Flavien
+Florian
 Foletto
+Forencich
 Forker
 Francillon
 Fredieu
+Freiberger
+Frédéric
 GTKWave
 Galbi
 Gantt
+Garnal
 Gartner
 Gelinek
 Geoff
@@ -103,6 +137,7 @@ Gernot
 Gerst
 Gielda
 Gigerl
+Gijs
 Gileadi
 Giri
 Gisselquist
@@ -111,18 +146,25 @@ Goessling
 Gonnen
 Goorah
 Gossner
+Graba
 Graphviz
 Graybeal
 Grobman
 Grulfen
+Gu
 Gunter
 Guo
+Güzel
+Hameed
 Hao
+Haojin
 Harboe
 Hashimoto
 Hayenga
+Hesselbarth
 Hewson
 Hicamp
+Hideto
 Hiroki
 Holdsworth
 Holme
@@ -130,8 +172,11 @@ Homebrew
 Hornung
 Hossell
 Hsu
+Huggett
+Hutt
 Hyperthreading
 Ibrahim
+Ikram
 Iles
 Inlines
 Inout
@@ -143,11 +188,14 @@ Jae
 Jalloq
 Jankowski
 Jannis
+Jasen
 Jens
 Jeras
+Jiaxun
 Jiuyang
 Joannou
 Joly
+Josse
 Jullien
 Junji
 Junyi
@@ -158,6 +206,7 @@ Kahn
 Kai
 Kamendje
 Kandadi
+Kaneda
 Kaplan
 Karge
 Karlsson
@@ -173,6 +222,7 @@ Klnv
 Koenig
 Koh
 Kolecki
+Konstantin
 Koonce
 Korteland
 Koszek
@@ -184,16 +234,24 @@ Kumashikar
 Kuoping
 Kurachi
 Laeufer
+Laroche
 Laurens
 Lavino
 Leber
 Leendert
+Lem
 Lesik
+Libenzi
+Licker
 Liland
 Liu
+Liwei
 Lockhart
 Longo
+Luca
+Luiza
 Lussier
+Lübeck
 MMD
 MODDUP
 MTasks
@@ -203,10 +261,17 @@ Mahesh
 Mahmoudy
 Makefile
 Makefiles
+Maksymenko
+Markley
+Marquet
 Matveyenko
 Maupin
 Mdir
 Mednick
+Mei
+Melo
+Menküc
+Michail
 Michiels
 Microsystems
 Milanovic
@@ -215,6 +280,8 @@ MinW
 Mindspeed
 MingW
 Miodrag
+Moberg
+Mobert
 ModelSim
 Modport
 Moinak
@@ -222,9 +289,14 @@ Mong
 Muhlestein
 Multithreaded
 Multithreading
+Mykyta
 NOUNOPTFLAT
+NaN
 Nalbantis
+Nandor
 Narayan
+Narcis
+Nassim
 Nauticus
 Newgard
 Nigam
@@ -233,15 +305,20 @@ Niranjan
 Nitza
 Noack
 Nodine
+Ober
 Oleg
 Olof
 Olofsson
+Oron
 Oyvind
 PLI
+Palaniappan
 Patricio
 Petr
+Piard
 Piechotka
 Piersall
+Platz
 Platzer
 Plunkett
 Popolon
@@ -252,10 +329,14 @@ Prateek
 Pre
 Preprocess
 Pretet
+Pretl
+Pringlemeir
 Priyadharshini
 Pullup
 Pulver
 Puri
+Qin
+Qiu
 Questa
 Rachit
 Ralf
@@ -264,28 +345,42 @@ Redhat
 Reitan
 Renga
 Requin
+Rodas
 Rodionov
+Rohan
 Rolfe
+Rontionov
 Roodselaar
+Roshit
 Runtime
 Ruud
 Rystsov
 STandarD
 Salman
+Sammelson
+Sanggyu
 Sanguinetti
 Sanjay
+Sasselli
 Scharrer
+Schless
 Seitz
+Shahid
+Shahrestani
 Shankar
 Shanshan
 Sharad
 Shareef
+Shen
 Sheng
 Shi
 Shinkarovsky
+Shinya
 Shirakawa
+Shou
 Shuba
 Shunyao
+Slager
 Slatter
 SoC
 Sobhan
@@ -294,9 +389,12 @@ Solaris
 Solomatnikov
 Solt
 Southwell
+Spack
 Srini
+Srinivasan
 Stamness
 Stephane
+Sterin
 Stoddard
 Stroebel
 Strouble
@@ -304,6 +402,7 @@ Stucki
 Su
 Suguimoto
 Sundararajan
+Sunderland
 Suse
 Syms
 Synopsys
@@ -311,6 +410,7 @@ SystemC
 SystemVerilog
 Takatsukasa
 Tambe
+Tarik
 Tariq
 Tejada
 Tengstrand
@@ -318,7 +418,9 @@ Terpstra
 Thiede
 Thierry
 Thyer
+Tianrui
 Tichelaar
+Timi
 Tomov
 Tood
 Topa
@@ -327,9 +429,11 @@ Trefor
 Tresidder
 Tri
 Tristate
+Truong
 Turton
 UNOPTFLAT
 Ubixum
+Ueno
 Uints
 Undefines
 Unsized
@@ -338,11 +442,13 @@ Uselib
 Usha
 Usuario
 VERILATOR
+Vandergriendt
 Vasu
 Vdeeptemp
 Vdly
 Vemumtab
 Vemuri
+Venkataramanan
 Veriable
 Verialted
 Verilate
@@ -353,6 +459,8 @@ Verilator
 Verilog
 Vighnesh
 Viktor
+Vilp
+Vlip
 Vm
 Vukobratovic
 Wai
@@ -363,22 +471,32 @@ Wfuture
 Whatson
 Wildman
 Wim
+Wmisleading
 Wno
 Wojciech
 Wolfel
 Wouters
 Wpedantic
+Wunused
 Wwarn
 XSim
 Xcelium
 Xiaoliang
+Xiaoyi
 Xuan
 Xuanqi
+Yao
 Yazdanbakhsh
+Yernagula
 Yi
+Yike
 Yinan
+Yoshitomo
 Yosys
 Yu
+Yujia
+Yurii
+Zaruba
 Zhang
 abirkmanis
 accessor
@@ -396,7 +514,10 @@ architected
 args
 arrarys
 assertOn
+assertcontrol
+astgen
 async
+atClone
 ato
 atoi
 autoconf
@@ -410,6 +531,7 @@ basename
 bbox
 benchmarking
 biguint
+bindir
 biops
 bisonpre
 bitOpTree
@@ -425,6 +547,7 @@ buildenv
 bv
 bvs
 callValueCbs
+callgrind
 casex
 casez
 casted
@@ -452,16 +575,19 @@ commandArgsPlusMatch
 compilable
 concat
 concats
+conf
 config
 const
 constexpr
 constpool
 coredump
 coroutine
+coroutines
 countbits
 countones
 cout
 cpp
+cppstyle
 cpu
 ctor
 ctrace
@@ -475,6 +601,7 @@ datadir
 datafiles
 david
 ddd
+de
 deassign
 debugi
 defenv
@@ -482,12 +609,15 @@ defname
 defparam
 demangling
 dep
+deparametrized
 der
 dereference
 desassign
 destructor
+desynchronization
 detections
 dev
+devcontainer
 devel
 dir
 displayb
@@ -496,6 +626,7 @@ doxygen
 dpiGetContext
 dpic
 dsvf
+dt
 dtor
 dumpall
 dumpfile
@@ -512,7 +643,9 @@ dumpportson
 dumpvars
 dut
 dx
+dynarray
 elab
+eliasphanna
 elike
 elsif
 endcase
@@ -520,6 +653,7 @@ endcelldefine
 endfunction
 endgenerate
 endian
+endianness
 endif
 endmodule
 endprotect
@@ -534,6 +668,7 @@ envvar
 eof
 errae
 erroring
+esynr
 et
 eval
 evals
@@ -541,6 +676,7 @@ exe
 executables
 expr
 extern
+ezchi
 fanin
 fasttrace
 fauto
@@ -561,9 +697,11 @@ fno
 fopen
 forceable
 foreach
+fourstate
 fprintf
 fprofile
 fread
+freloop
 frewind
 fs
 fscanf
@@ -585,6 +723,9 @@ genvar
 genvars
 getenv
 getline
+getter
+ggdb
+glibc
 gmake
 gmon
 gotFinish
@@ -596,6 +737,7 @@ hh
 hier
 hierCMakeArgs
 hierMkArgs
+hierParameters
 hierVer
 hx
 hyperthreading
@@ -629,16 +771,20 @@ ish
 isunbounded
 isunknown
 jobserver
+json
+jwoutersymatra
 killua
 lang
 lcov
 ld
 leavinel
 len
+libc
 libext
 libgoogle
 libsystemc
 libtcmalloc
+libverilated
 linkers
 linter
 linux
@@ -653,7 +799,9 @@ logicals
 longint
 lossy
 lsb
+lubc
 lvalue
+lvalues
 lxt
 macromodule
 makefile
@@ -665,6 +813,7 @@ miree
 mis
 misconnected
 misconversion
+misoptimized
 missized
 mk
 mno
@@ -678,14 +827,18 @@ mtasks
 mulithreaded
 mult
 multidim
+multidriven
 multiinterfaces
 multiline
 multipling
+multipoint
 multithread
 multithreaded
 multithreading
+musl
 mutexes
 mux
+muzafferkal
 myftptoyman
 mysignal
 namespace
@@ -714,7 +867,10 @@ ortegon
 oversubscription
 parallelized
 param
+parameterization
 parameterized
+parameterized
+parameterless
 params
 parens
 pawel
@@ -723,9 +879,11 @@ pdf
 perf
 perftools
 pgo
+phelter
 picoChip
 pinIndex
 pinout
+pkgdatadir
 plusargs
 pmos
 poping
@@ -740,9 +898,12 @@ pragma
 pragmas
 pre
 precisions
+precompiled
 predefines
+prepareClone
 prepend
 prepended
+preproc
 preprocess
 preprocessed
 preprocessing
@@ -755,17 +916,23 @@ profcfunc
 profiler
 prototyptes
 ps
+psprintf
 pthread
+pthreads
 ptr
 pulldown
 pulldowns
 pullup
 pvalue
 pwd
+py
 qrq
+qrqiuren
 radix
 randc
 randcase
+randstate
+raphmaster
 rarr
 rdtsc
 reStructuredText
@@ -775,11 +942,14 @@ readmemb
 readmemh
 realpath
 realtime
+realtobits
 recoding
 recrem
 redeclaring
 regs
 reloop
+replaceShiftOp
+reproducibility
 resetall
 respecified
 rodata
@@ -793,6 +963,7 @@ sVerilator
 sawatzke
 sc
 scalared
+sccache
 sccanf
 seg
 setuphold
@@ -807,6 +978,7 @@ specparam
 splitme
 spp
 sqrt
+srandom
 src
 srcdir
 srcfile
@@ -816,6 +988,7 @@ stdin
 stdout
 stime
 stmts
+str
 strcasecmp
 stringification
 stringified
@@ -829,15 +1002,23 @@ submakes
 submodule
 submodules
 substring
+superclass
+suspendable
+suspendables
 sv
 svBitVal
 svBitVecVal
 svGet
+svGetTime
+svGetTimePrecision
 svLogicVal
 svdpi
+svgGetTimeUnit
 swrite
+synthesizeable
 sys
 systemc
+tenghtt
 testbench
 threadsafe
 threashold
@@ -853,10 +1034,13 @@ toolchain
 topcell
 toplevel
 toupper
+traceCapable
 traceEverOn
 tran
 treei
 tri
+triand
+trior
 tristate
 tristates
 trunc
@@ -869,10 +1053,12 @@ typedefs
 typename
 uint
 un
+unbased
 undef
 undefineall
 undriven
 ungetc
+unhandled
 uniquified
 unistd
 unlink
@@ -887,13 +1073,17 @@ unsup
 untyped
 urandom
 uselib
+utimes
 uwire
 uwires
+valgrind
 vc
 vcd
 vcddiff
 vcoverage
+vdhotre
 vec
+ventana
 ver
 verFiles
 verible
@@ -909,18 +1099,24 @@ vlt
 vltstd
 vluint
 vpi
+vpiConstType
+vpiDefName
+vpiInertialDelay
+vpiInstance
 vpiLeftRange
 vpiModule
 vpiSize
 vpiSuppressVal
 vpiTimeUnit
 vpiType
+vpiUndefined
 vpm
 vpp
 warmup
 waveforms
 whitespace
 widthed
+wor
 wreal
 writeb
 writeme
@@ -938,4 +1134,5 @@ ypq
 yurivict
 zdave
 Øyvind
-
+Алексеевич
+Исаак
@@ -70,7 +70,7 @@ The XML document consists of 4 sections within the top level
 Distribution
 ============

-Copyright 2020-2023 by Wilson Snyder. Verilator is free software; you can
+Copyright 2020-2025 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.

@@ -19,18 +19,24 @@
 # cmake ..
 # cmake --build .

-cmake_minimum_required(VERSION 3.8)
+cmake_minimum_required(VERSION 3.12)
+cmake_policy(SET CMP0074 NEW)
 project(cmake_hello_c)

 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
-if (NOT verilator_FOUND)
-  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+if(NOT verilator_FOUND)
+    message(
+        FATAL_ERROR
+        "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable"
+    )
 endif()

 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_c/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)

 # Add the Verilated circuit to the target
 verilate(example
  INCLUDE_DIRS "../make_hello_c"
-  SOURCES ../make_hello_c/top.v)
+  SOURCES ../make_hello_c/top.v
+)
@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
@@ -19,12 +19,16 @@
 # cmake ..
 # cmake --build .

-cmake_minimum_required(VERSION 3.8)
+cmake_minimum_required(VERSION 3.12)
+cmake_policy(SET CMP0074 NEW)
 project(cmake_hello_sc CXX)

 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
-if (NOT verilator_FOUND)
-  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+if(NOT verilator_FOUND)
+    message(
+        FATAL_ERROR
+        "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable"
+    )
 endif()

 # SystemC dependencies
@@ -36,15 +40,14 @@ find_package(SystemCLanguage QUIET)

 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_sc/sc_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)

-set_property(
-  TARGET example
-  PROPERTY CXX_STANDARD ${SystemC_CXX_STANDARD}
-  )
+set_property(TARGET example PROPERTY CXX_STANDARD ${SystemC_CXX_STANDARD})

 # Add the Verilated circuit to the target
 verilate(example SYSTEMC
  INCLUDE_DIRS "../make_hello_sc"
-  SOURCES ../make_hello_sc/top.v)
+  SOURCES ../make_hello_sc/top.v
+)

 verilator_link_systemc(example)
@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 	TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
@@ -19,19 +19,26 @@
 # cmake ..
 # cmake --build .

-cmake_minimum_required(VERSION 3.8)
+cmake_minimum_required(VERSION 3.12)
+cmake_policy(SET CMP0074 NEW)
 project(cmake_protect_lib)

 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
-if (NOT verilator_FOUND)
-  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+if(NOT verilator_FOUND)
+    message(
+        FATAL_ERROR
+        "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable"
+    )
 endif()

 # Create the main executable target
 add_executable(example ../make_protect_lib/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)

 # Create a secret library
 add_library(verilated_secret STATIC) # or SHARED for a shared library
+target_compile_features(verilated_secret PUBLIC cxx_std_14)
+
 target_link_libraries(example PRIVATE verilated_secret)
 # To create both libraries on CMake >= 3.12 replace the above 2 lines with the following:
 # add_library(verilated_secret OBJECT)
@@ -51,9 +58,11 @@ verilate(verilated_secret
  VERILATOR_ARGS --protect-lib verilated_secret
                 --protect-key ${PROTECT_KEY}
  DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/verilated_secret
-  SOURCES ../make_protect_lib/secret_impl.v)
+  SOURCES ../make_protect_lib/secret_impl.v
+)

 # Include location of verilated_secret.sv wrapper
 verilate(example
  VERILATOR_ARGS "-I${CMAKE_CURRENT_BINARY_DIR}/verilated_secret"
-  SOURCES ../make_protect_lib/top.v)
+  SOURCES ../make_protect_lib/top.v
+)
@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
@@ -19,19 +19,25 @@
 # cmake ..
 # cmake --build .

-cmake_minimum_required(VERSION 3.8)
+cmake_minimum_required(VERSION 3.12)
+cmake_policy(SET CMP0074 NEW)
 project(cmake_tracing_c)

 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
-if (NOT verilator_FOUND)
-  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+if(NOT verilator_FOUND)
+    message(
+        FATAL_ERROR
+        "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable"
+    )
 endif()

 # Create a new executable target that will contain all your sources
 add_executable(example ../make_tracing_c/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)

 # Add the Verilated circuit to the target
 verilate(example COVERAGE TRACE
  INCLUDE_DIRS "../make_tracing_c"
  VERILATOR_ARGS -f ../make_tracing_c/input.vc -x-assign fast
-  SOURCES ../make_tracing_c/top.v)
+  SOURCES ../make_tracing_c/top.v
+)
@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
--- a/Show More
+++ b/Show More