Tests: Improve specparam verilog.y coverage

test_regress/t/t_gate_basic.v

@@ -40,12 +40,17 @@ module t (/*AUTOARG*/
    buf BARRAY [BITS-1:0] (ba, a);
 
 `ifdef verilator
+   specparam RAW_SP = 1;
+
+   specify
+   endspecify
+
    specify
       specparam CDS_LIBNAME  = "foobar";
       (nt0 *> nt0) = (0, 0);
    endspecify
 
-  specify
+   specify
     // delay parameters
     specparam
       a$A1$Y = 1.0,