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Apply 'make format'

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2023-02-03 13:48:46 +00:00
parent c8be50d40b
commit 00f0027c80
3 changed files with 4 additions and 6 deletions
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src/V3ParseGrammar.cpp
+1 -3
View File
@@ -240,9 +240,7 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
} else {
nodep->trace(allTracingOn(nodep->fileline()));
}
if (nodep->varType().isVPIAccessible()) {
nodep->addAttrsp(GRAMMARP->cloneScopedSigAttr());
}
if (nodep->varType().isVPIAccessible()) { nodep->addAttrsp(GRAMMARP->cloneScopedSigAttr()); }
// Remember the last variable created, so we can attach attributes to it in later parsing
GRAMMARP->m_varAttrp = nodep;
src/V3PreProc.cpp
+1 -1
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@@ -480,7 +480,7 @@ void V3PreProcImp::comment(const string& text) {
string arg = cmd.substr(endOfCmd);
while (isspace(arg[0])) arg = arg.substr(1);
if (arg.size() && baseCmd == "public_flat_rw_on")
baseCmd += "_sns"; // different cmd for applying sensitivity
baseCmd += "_sns"; // different cmd for applying sensitivity
if (!printed) insertUnreadback("/*verilator " + baseCmd + "*/ " + arg + " /**/");
} else {
if (!printed) insertUnreadback("/*verilator " + cmd + "*/");
src/verilog.y
+2 -2
View File
@@ -273,8 +273,8 @@ public:
}
void setScopedSigAttr(AstNode* attrsp) {
if (m_scopedSigAttr) { // clearing set attribute
VL_DO_DANGLING(m_scopedSigAttr->deleteTree(), m_scopedSigAttr);
if (m_scopedSigAttr) { // clearing set attribute
VL_DO_DANGLING(m_scopedSigAttr->deleteTree(), m_scopedSigAttr);
}
m_scopedSigAttr = attrsp;
}