Commentary
This commit is contained in:
parent
06661ab676
commit
c6a569df49
|
|
@ -1,3 +1,9 @@
|
|||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// This file ONLY is placed under the Creative Commons Public Domain, for
|
||||
// any use, without warranty, 2023 by Drew Ranck.
|
||||
// SPDX-License-Identifier: CC0-1.0
|
||||
|
||||
module t
|
||||
(/*AUTOARG*/
|
||||
// Inputs
|
||||
|
|
|
|||
Loading…
Reference in New Issue