Tests: Fix broken t_proc.pl, and misc cleanups.
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@ -17,12 +17,5 @@ compile(
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execute(
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);
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compile(
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verilator_flags2 => ["--exe --main --timing +define+WITH_DELAY"],
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);
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execute(
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);
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ok(1);
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1;
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@ -0,0 +1,23 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2019 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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top_filename("t/t_assigndly_dynamic.v");
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compile(
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verilator_flags2 => ["--exe --main --timing +define+WITH_DELAY"],
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);
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execute(
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);
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ok(1);
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1;
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@ -12,7 +12,6 @@ scenarios(simulator => 1);
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compile(
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verilator_flags2 => ['+define+VERILATOR_PUBLIC_TASKS'],
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fails => $fail,
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);
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execute(
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@ -14,7 +14,6 @@ top_filename("t/t_func_public.v");
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compile(
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verilator_flags2 => ["--trace"],
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fails => $fail,
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);
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execute(
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@ -12,11 +12,13 @@ scenarios(vlt => 1);
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top_filename("t_prof.v");
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dotest();
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ok(1);
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sub dotest {
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compile(
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verilator_flags2 => ["--stats --prof-c"],
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verilator_flags2 => ["--stats --prof-c +define+T_PROF"],
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);
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unlink $_ foreach (glob "$Self->{obj_dir}/gmon.out.*");
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