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1998 Commits

Author SHA1 Message Date
Matthias Köfferlein dcd0476efc
Implemented issue #598 (Cell#transform) (#600) 2020-07-03 23:41:09 +02:00
Matthias Köfferlein 4bd2672134
Fixed #592 (layer mapping issue) (#601) 2020-07-03 23:40:55 +02:00
Matthias Köfferlein b413cb9d74
Netlist compare: Ambiguity resolution through name matching now default (can be turned off) (#594) 
* WIP: some refactoring

* WIP: some refactoring

* Netlist compare: introducing ambiguity resolution by net names

By default now net names are used for resolving ambiguities.
If net names match, they will be used to associate nets if the
choice is ambiguous. This is usually much faster and more reliable
than trying to resolve ambiguities through topology analysis.

This feature can be disabled using "consider_net_names(false)" in
the LVS script.

* Some refactoring, Jenkinsfile modified for better test coverage
 2020-06-29 20:47:57 +02:00
Matthias Köfferlein e744eb32d1
Merge pull request #580 from KLayout/drawing-performance2 
Drawing performance2
 2020-06-28 16:14:48 +02:00
Matthias Koefferlein c517aa4ff7 Cherry-picked MacOS fixes into master 2020-06-27 01:47:35 +02:00
Matthias Koefferlein b91e2324d0 Netlist compare enhancement 
This enhancement targets towards a better resolution
of ambiguities. The enhancement is to utilize knowledge
about device and subcircuit equivalences to avoid stale
branches of the ambiguity resolution tree.

So far following these branches could lead to a
contradictions which render an ambiguitiy resolution
choice useless.

One effect of this change is enhanced reproducibility
of the matching log because some pointers are not
involved anymore.
 2020-06-26 17:01:03 +02:00
Matthias Koefferlein 3f1c3cf209 Extended NetlistCrossReference class so we can easily obtain the other_... objects. 2020-06-15 01:27:33 +02:00
Matthias Koefferlein 880b9904cf WIP Netlist probing will deliver an instantiation path now. 2020-06-14 22:04:16 +02:00
Matthias Koefferlein d141c0895d Added tests for Region's andnot. 2020-06-14 18:12:17 +02:00
Matthias Koefferlein 3637b15a74 Generalization of code for twobool local operation 2020-06-14 17:06:53 +02:00
Matthias Koefferlein 41fe04bbc8 WIP: twobool local processor 2020-06-14 17:00:54 +02:00
Matthias Koefferlein 041abe3e89 Added a testcase for two-boolean edge processor. 2020-06-14 16:50:34 +02:00
Matthias Koefferlein ad22ade9ae WIP: preparations finished, testing required. 2020-06-14 16:06:28 +02:00
Matthias Koefferlein 5aa301bcc6 WIP: more preparations 2020-06-14 15:57:23 +02:00
Matthias Koefferlein 1bdf18a51b WIP: more preparations 2020-06-14 14:53:46 +02:00
Matthias Koefferlein 688425c31d WIP: preparations for multi-output edge processor. 2020-06-14 14:16:15 +02:00
Matthias Koefferlein 4390a80dda Added test cases for multiple-outputs local processors. 2020-06-13 23:57:40 +02:00
Matthias Koefferlein 0a10635363 Fixed memory statistics for array (wasn't taking the right statistics for irregular arrays) 2020-06-13 19:55:33 +02:00
Matthias Koefferlein 96caa646f5 WIP: preparations for multi-input/multi-output local processor. 2020-06-07 18:04:30 +02:00
Matthias Koefferlein 689b3c5af9 Merge branch 'issue-374' into drc-enhancements 2020-06-05 14:07:01 +02:00
Matthias Koefferlein 5992a9b509 Merge branch 'master' into lefdef-enhancments 2020-06-05 14:05:13 +02:00
Matthias Köfferlein 852f5c438b
Implemented #560 (multiple technologies on libraries) (#576) 
* First implementation.

* PORT BACK: fixed a few flaws (fixed-width side panel ..)

1. On "save as" the filename displayed in the cell view selection box
   was not updated
2. The width of the library and cellview panel could not be reduced
   below the width of the combo boxes in the headers. So the
   panels might have become pretty wide without being able to reduce
   them.

* Implemented #560 (multiple techs on libraries)
 2020-06-05 10:58:53 +02:00
Matthias Köfferlein 2d0a9418f9
Implemented #579 (perimeter_only mode for antenna check) (#582) 
* WIP: added basic feature and tests.

* WIP: provide tests are GSI binding of new antenna check

* Fixed issue #579 (perimeter_only mode for antenna check)

* Updated DRC doc for 'perimeter_only'
 2020-06-05 10:55:07 +02:00
Matthias Koefferlein 8b0ab115ed Memory footprint optimization for quad tree 2020-06-04 15:38:53 +02:00
Matthias Koefferlein adfd653213 WIP: refactoring - include fuzzy compare in array, don't put into GSI method impl. 2020-06-04 13:01:11 +02:00
Matthias Koefferlein 999c065262 Introducing iterated arrays for instances 
Iterated instances are created for OASIS files
using irregular repetitions in viewer mode.

Reason: this way, the same drawing optimization
than for iterated shape arrays can be applied.

As this is a new API feature, some adjustments
had to be made to incorporate them into the
code.
 2020-06-04 12:17:34 +02:00
Matthias Koefferlein 9c4648a5b5 WIP: some bug fixing and enhancements. 2020-06-02 23:59:09 +02:00
Matthias Koefferlein cdf4d08fd3 WIP 
* Maybe fixed a performance issue on box-trees: the iterator wasn't
  going down to the very bottom of the tree on initialization
* Added array quad skipping in display of shape arrays
 2020-06-01 23:28:04 +02:00
Matthias Koefferlein d7af7fc5c0 Merge branch 'lefdef-enhancments' 2020-06-01 13:37:45 +02:00
Matthias Köfferlein 0c0d247c23
Merge pull request #574 from KLayout/issue-558 
Fixed #558 ("extents" wasn't deep-enabled for Edges, Texts and EdgePairs)
 2020-06-01 00:21:46 +02:00
Matthias Koefferlein a9c0616aa0 WIP: more changes 2020-05-31 10:37:30 +02:00
Matthias Koefferlein 759f07ee4d Implemented solution for #570 (deep Edges::extents) 
While doing this, it was discovered that the problem also
persists for EdgePairs and Texts.

In order to provide a more generic solution, some refactoring
was applied.
 2020-05-31 01:55:05 +02:00
Matthias Köfferlein 6601d472bf
Implemented #570 (perimeter included in antenna check) (#572) 
* First implementation of the perimeter factor for antenna check, unit tests.

* Bugfix and unit tests for GSI binding of new antenna check version.

* DRC integration of perimeter-enabled antenna check.

* Enhanced DRC doc for antenna rule
 2020-05-30 21:45:48 +02:00
Matthias Koefferlein bea3e29421 Merge branch 'master' of https://github.com/KLayout/klayout 2020-05-28 00:44:49 +02:00
Matthias Koefferlein e94b40cab9 Fixed Windows build (linker error) 2020-05-28 00:44:27 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567) 
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
 2020-05-26 23:47:59 +02:00
Matthias Koefferlein 29a5b4c519 Bugfix: wrong type cast of size_t to unsigned int 2020-05-24 09:44:25 +02:00
Matthias Koefferlein 5ba3d220e9 Made unit tests a little more consistent. 2020-05-23 22:30:54 +02:00
Matthias Koefferlein f410c91339 Updated documentation 2020-05-23 21:14:01 +02:00
Matthias Koefferlein ba9a05640c Bugfixed tiled mode with text input, DRC tests added and test data updated. 2020-05-23 19:03:42 +02:00
Matthias Koefferlein 81750ed3d8 Tiling processor enabling for text input/output, updated tests. 2020-05-23 16:23:40 +02:00
Matthias Koefferlein daf8e5f8fc Bugfix: Region::pull_interacting(edges) wasn't working properly. 2020-05-23 13:19:46 +02:00
Matthias Koefferlein b84a9df2da Persisting texts now for .l2n format 2020-05-22 00:58:46 +02:00
Matthias Koefferlein c682cc85d0 Generalized concept of region, texts etc. into 'shape collections'. Fixed LVS and DRC tests. 2020-05-21 23:59:30 +02:00
Matthias Koefferlein 854320d52d Debugging: proper assignment of net names through labels. 2020-05-20 23:27:06 +02:00
Matthias Koefferlein e9af72ee28 Tests for texts as net names, fixed Shapes test (order of texts) 2020-05-20 01:05:19 +02:00
Matthias Koefferlein cd0b86b1dc WIP: fixed tests. 2020-05-20 00:31:26 +02:00
Matthias Koefferlein 4c13bb96a0 WIP: refactoring - texts for net extractor. 2020-05-20 00:21:06 +02:00
Matthias Koefferlein 7dab87b881 Added tests, Region#pull_interacting with texts 2020-05-15 23:48:21 +02:00
Matthias Koefferlein 878a494abb AND and NOT for texts vs. region, DRC generalization. 2020-05-15 22:24:18 +02:00
Matthias Koefferlein 8a2742d436 Small doc updates 2020-05-13 22:39:25 +02:00
Matthias Koefferlein 58ca9b8730 Some bug fixes, added tests 2020-05-13 21:56:49 +02:00
Matthias Koefferlein 831acb2c40 Bugfixes, tests for flat interact between region and texts. 2020-05-13 18:25:43 +02:00
Matthias Koefferlein 16d6c75b0e Fixed build, added tests for filter in deep texts object. 2020-05-13 17:58:00 +02:00
Matthias Koefferlein 4e7d0a81b8 'interact' between regions and texts. 2020-05-13 17:29:10 +02:00
Matthias Koefferlein 08026e8b35 Bugfix: in-place filter not working for region, edges. Implemented hierarchical filter for texts. Added Ruby tests for Texts. 2020-05-12 23:01:54 +02:00
Matthias Koefferlein c1b1ce6951 Provide unit test for DeepTexts. 2020-05-12 21:43:11 +02:00
Matthias Koefferlein 4fbb6286ac Fixed unit tests. 2020-05-12 21:16:12 +02:00
Matthias Koefferlein 8b083a8330 Added unit tests for db::Texts, renamed db unit test files so debugging is possible 2020-05-12 21:09:21 +02:00
Matthias Koefferlein a9cd9ac122 First implementation of texts collection. 2020-05-12 20:44:39 +02:00
Matthias Köfferlein 3f8090b3fd
Fixed #547 (better error messages on some Shape methods, fixed doc). (#550) 2020-05-11 19:24:44 +02:00
Matthias Koefferlein dbfe904cc6 Fixed some build errors. 2020-05-03 10:06:06 +02:00
Matthias Koefferlein 476a2b3f09 WIP: preparations for an extended width/space concept 2020-05-02 15:29:19 +02:00
Matthias Koefferlein 0e68b910fa Merge branch 'master' into lefdef-enhancments 2020-05-01 16:00:58 +02:00
Matthias Köfferlein cb3833f563
Merge pull request #546 from KLayout/sonarqube-fixes 
Sonarqube fixes
 2020-04-30 22:06:38 +02:00
Matthias Köfferlein 8dae4161e1
Fixed #548 (shield issue on space) (#549) 2020-04-30 22:03:16 +02:00
Matthias Köfferlein 9b0362d03d
Fixed #544 (ignore duplicate global nets in SPICE reader) (#545) 2020-04-26 16:54:13 +02:00
Matthias Köfferlein 93a072903c
Fixed #539 (internal error on circuit flatten) (#542) 
Previously, circuits which connected two pins through
a net could not be flattened. This capability now has
been added.
 2020-04-26 16:53:50 +02:00
Matthias Koefferlein 15567d3d27 Some small fixes to make clang-analyze happy. 2020-04-26 09:33:10 +02:00
Matthias Koefferlein 73f2f23505 Adjusted unit tests for latest fix. 2020-04-26 01:05:07 +02:00
Matthias Koefferlein fffae4134c Fixed a Sonarqube issue. 2020-04-25 23:37:43 +02:00
Matthias Koefferlein 3a7d9d0b0f Fixed copyright/license topic. 2020-04-25 23:30:48 +02:00
Matthias Koefferlein 0bc965dde9 Fixed a layout diff bug (compare of paths) 2020-04-25 23:20:01 +02:00
Matthias Koefferlein 040af426dc WIP: refactoring of map file reading. 2020-04-19 16:54:41 +02:00
Matthias Koefferlein d93ef3ff97 Timing reports for stream writers too, reporting file names for reader and writer timing. 2020-04-19 10:39:27 +02:00
Matthias Koefferlein 2cdcf621d8 D25 tech component editor: line numbers shown, more syntax variants 2020-04-18 00:37:15 +02:00
Matthias Koefferlein ca2b0cd96a Added tests for tech component, syntax highlighter fixed. 2020-04-17 16:24:56 +02:00
Matthias Koefferlein b2216ec372 WIP: tech component + editor. 2020-04-17 11:15:50 +02:00
Matthias Koefferlein df11ff9b85 Merge branch 'master' of https://github.com/KLayout/klayout 2020-04-05 20:20:28 +02:00
Matthias Koefferlein 0abd5d5d96 Fixed some minor compiler warnings. 2020-04-05 18:30:08 +02:00
Matthias Köfferlein c93db59e37
Fixed #524 (failed query leaves layout in invalid state) (#528) 2020-04-05 15:11:37 +02:00
Matthias Koefferlein c640347570 MERGE: added Spice reader testcase for resistors with model names. 2020-04-01 23:19:21 +02:00
Matthias Koefferlein c021d60d41 Updated unit test 2020-03-29 09:23:13 +02:00
Matthias Koefferlein 99d3610a6a Implemented #527 (wildcard layer mapping targets) 
commit d77702cd86066f3a97d740a95923fa598c2ff07b
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 21:28:39 2020 +0100

    Wildcard expansion feature on layer mapping

    Finished feature, added doc and test.

    The solution is to use placeholder indexes for the
    layer mapping which are substituted by the real
    layers when they are encountered.

commit af60b5f18acfe3c5e2f1d4e6bc6ee752a246dc0d
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 19:11:32 2020 +0100

    Preparations for new feature: introduce relative and wildcard target layer specs
 2020-03-28 22:49:57 +01:00
Matthias Koefferlein 666cdeadc5 MERGE: documentation enhancements for LVS/DRC 2020-03-28 12:29:53 +01:00
Matthias Koefferlein a47932a79e Added one more testcase for join_symmetric_nets 2020-03-28 09:49:41 +01:00
Matthias Koefferlein b6ba51e563 Provide timing information for Spice reader/writer 2020-03-26 17:33:18 +01:00
Matthias Koefferlein c10ccccdf7 Merge branch 'app-refactoring' into doc-args 2020-03-15 21:32:39 +01:00
Matthias Koefferlein 53c81cc572 Got rid of most of the @args 2020-03-14 21:50:47 +01:00
Matthias Köfferlein b0fad430df Fixed a severe bug in join_symmetric_nets 2020-03-03 22:24:58 +01:00
Matthias Koefferlein 6721cb9c5b Merge branch 'issue-482-update' 2020-03-02 18:57:40 +01:00
Matthias Koefferlein 8d665bd456 Fixed a minor segfault (DXF reader while having log level verbose), updated Changelog 2020-03-02 18:56:29 +01:00
Matthias Koefferlein a5a4ae511d Some more tests, a (unlikely) segfault fixed 2020-02-28 23:19:27 +01:00
Matthias Köfferlein 82686b307c
Merge pull request #515 from KLayout/issue-471 
Implemented #471 (leaner way to specify compare tolerances)
 2020-02-27 18:46:15 +01:00
Matthias Köfferlein 56868eda85
Merge pull request #514 from KLayout/issue-482 
Implemented #482 (split gate option aka join_symmetric_nets)
 2020-02-27 18:46:02 +01:00
Matthias Koefferlein 02e38a2cd1 Merge branch 'issue-482' into issue-471 2020-02-27 15:49:35 +01:00
Matthias Koefferlein 8b73dffcfe Implementation done. Added tests. 2020-02-27 15:40:06 +01:00
Matthias Koefferlein 75e936bd64 Added one more test case. 2020-02-27 13:46:52 +01:00
Matthias Koefferlein 3b31109367 Added GSI binding for join_symmetric_nets, added method to get circuits by name pattern. 2020-02-27 12:17:35 +01:00
Matthias Koefferlein a46cd305c6 WIP: bug fix for symmetry detection (should consider different pins to break symmetry). Added tests. 2020-02-27 00:52:06 +01:00
Matthias Koefferlein b35429291e WIP: join_nets implemented, join_symmetric_nets: enhanced detection of symmetric nets. 2020-02-27 00:52:03 +01:00
Matthias Koefferlein 08af8d85c4 WIP: first algorithm - is capable of deriving the 'resistor cube' symmetry. 2020-02-27 00:52:00 +01:00
Matthias Koefferlein 58de38739a WIP: some refactoring, debugging output for netlist compare 
Abstraction: a central getenv() feature to wrap all the system-specific things

Netlist compare debug and options can be enabled through environment variables:

KLAYOUT_NETLIST_COMPARE_DEBUG_NETCOMPARE=1: print netlist compare debug info
KLAYOUT_NETLIST_COMPARE_DEBUG_NETGRAPH=1: print net grapg
KLAYOUT_NETLIST_COMPARE_CASE_SENSITIVE=1: make netlist compare case sensitive
 2020-02-27 00:51:55 +01:00
Matthias Koefferlein 2564b11da3 Fixed #478 (shapes method can't be used in queries) 2020-02-23 13:36:20 +01:00
Matthias Köfferlein 161068c70a
Merge pull request #492 from KLayout/issue-491 
Issue #491 fixed (maybe)
 2020-02-16 10:15:53 +01:00
Matthias Koefferlein 0f69c24e79 WIP: avoids a segfault because of missing manager 2020-02-04 20:50:46 +01:00
Matthias Koefferlein 961a36a7ad Issue #491 fixed (maybe) 2020-02-03 22:38:45 +01:00
Matthias Köfferlein aba55148db
Merge pull request #483 from KLayout/issue-481 
Fixed issue #481 (duplicate DRC markers)
 2020-01-28 23:48:33 +01:00
Matthias Koefferlein 21397283f3 Fixed #477 2020-01-23 18:38:41 +01:00
Matthias Koefferlein b1716fc8c4 Fixed issue #481 2020-01-23 17:26:12 +01:00
Matthias Köfferlein 6a996b6f5b
Merge pull request #465 from KLayout/issue-462 
Implemented #462 (Generalize MOS transistor extraction to other gate …
 2020-01-05 01:02:54 +01:00
Matthias Koefferlein b8c82c4f8b Updated copyright notice to 2020 2020-01-05 00:59:43 +01:00
Matthias Koefferlein 811560094a Updated tests. 2020-01-04 21:19:06 +01:00
Matthias Koefferlein 833edf53b2 Implemented #462 (Generalize MOS transistor extraction to other gate figures) 2020-01-02 22:20:45 +01:00
Matthias Koefferlein c4636cebdb Fixed #458 (Array instance net tracing bug) 2019-12-23 20:38:17 +01:00
Matthias Koefferlein 85c033db64 Small doc fixes 2019-12-21 18:00:02 +01:00
Matthias Koefferlein 297f37a63a Huge performance improvement for a specific array element interaction. Reason: duplicate cluster interactions spoiled performance. 2019-12-18 01:10:16 +01:00
Matthias Koefferlein fcba0018ba Enhanced progress estimation of box scanner - no progress jumping back and forth. 2019-12-17 22:38:17 +01:00
Matthias Koefferlein a9bd037b58 Some code cleanup with performance impact 2019-12-17 22:23:43 +01:00
Matthias Koefferlein fb2611632d Some performance improvement of net extractor. 2019-12-17 21:16:29 +01:00
Matthias Koefferlein d0e6efa484 Implemented #444 (double-height standard-cell support). 2019-12-17 00:12:36 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein c9d528dc88 Fixed #447 - CentOS 6 build fixed. 2019-12-15 15:46:15 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much 
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
 2019-12-15 01:29:56 +01:00
Matthias Koefferlein 87e658acf0 WIP: finalized refactoring. 2019-12-15 00:48:11 +01:00
Matthias Koefferlein da1ac3661f WIP: bugfix of refactoriung, update test data. 2019-12-15 00:16:47 +01:00
Matthias Koefferlein 1e5d02b1bc WIP: refactoring of cell instance interactions for net extraction. 2019-12-14 18:58:22 +01:00
Matthias Koefferlein 1f5ec9d3e9 Bugfix: don't mess with the hier cluster structure while determining the interactions ... 2019-12-12 00:20:15 +01:00
Matthias Koefferlein e11aaf4ac2 WIP: Continued rework. 2019-12-11 23:35:19 +01:00
Matthias Koefferlein fee5472845 WIP: further refactoring. 2019-12-11 01:28:56 +01:00
Matthias Koefferlein 406bc226bb WIP: refactoring 2019-12-11 00:39:46 +01:00
Matthias Koefferlein 75cb21bbd1 WIP: refactoring, first steps. 2019-12-10 23:55:14 +01:00
Matthias Koefferlein 4acc4b96e2 First attempt to fix the issue 
Problem was caching which did not take into account the array nature
of instances.

This fix also moves the cache one level below so it is effective also
when instance tree traversal happens. This might speed up things too.

Needs testing.
 2019-12-09 21:37:07 +01:00
Matthias Koefferlein 3b9beb0d49 Fixed #438 (error on redefinition of subcircuit in SPICE) 2019-12-07 23:39:39 +01:00
Matthias Köfferlein 2fa545d80b
Merge pull request #435 from KLayout/issue-429 
Issue 429
 2019-12-02 21:15:05 +01:00
Matthias Köfferlein e061a0a932
Merge pull request #433 from KLayout/wip 
Some enhancements
 2019-12-02 21:14:35 +01:00
Matthias Köfferlein 8f8c393309
Merge pull request #432 from KLayout/issue-425 
Issue 425
 2019-12-02 21:13:14 +01:00
Matthias Köfferlein e7ddf3b64f
Merge pull request #431 from KLayout/issue-426 
Implemented #426 (feature request: group techs)
 2019-12-02 21:12:40 +01:00
Matthias Koefferlein baffb940d1 Implemented #429: final touches to doc and tests for RBA/pya API. 2019-12-01 16:41:27 +01:00
Matthias Koefferlein 9eb09c3a5d Enhancements to implementation 
- OASIS layers are turned into pure layer name (not lxdy_name) for
  MAG output
- Boxes of instances had been incorrect
- consistent naming of cell files in presence of special chars
 2019-11-30 22:30:28 +01:00
Matthias Koefferlein c6ede46fd0 WIP: substantial changes 
- force lower-case layer names to allow CIF/MAG loop (CIF needs
  upper-case layer names, MAG doesn't)
- reverted CIF reader to standard
- new options for writer: tech, "zero timestamp".
- file name MUST be consistent with one cell name.
  Reason: it's not possible to derive the initial
  cell from the given options, so without the file name
  being consistent, we can't know what to write there.
  Basically the file name rather supplies the path.
 2019-11-30 00:09:44 +01:00
Matthias Koefferlein 3f9dd59593 WIP: MAG reader now is compliant with writer (and Magic I hope) 2019-11-29 00:25:28 +01:00
Matthias Koefferlein 0f1dc1d191 Refine pin mismatch handling so that only 'not used' nets will make a pin match against null. 2019-11-24 16:40:45 +01:00
Matthias Koefferlein afacf7c0b5 WIP: fixed a segfault in the netlist browser. 2019-11-24 01:28:07 +01:00
Matthias Koefferlein 64bb01d80d Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway. 2019-11-24 00:23:19 +01:00
Matthias Koefferlein ed00503d41 Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data. 2019-11-23 23:36:52 +01:00
Matthias Koefferlein aa28aa807a Unit tests fixed and a bugfix in the netlist compare 
One unit test was failing because the netlist compare did not
properly consider dropped pins:
* A severe bug ("g1" should be "g2")
* Incomplete detection of dropped pins upwards in the hierarchy

The general pin and net mapping scheme has been enhanced so that
net mapping to "0" is valid (this will happen in case of dropped
pins) and this condition is used to detect pins without match
requirement.
 2019-11-23 22:04:25 +01:00
Matthias Koefferlein 1309aa59cb Merge branch 'master' into issue-425 2019-11-23 01:55:28 +01:00
Matthias Koefferlein 7de90ae595 Merge branch 'issue-417' 2019-11-23 01:46:38 +01:00
Matthias Koefferlein 79f4f8bc57 Update unit test for issue-417 branch. 2019-11-23 01:45:56 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein 2757b22da6 Resolved conflicts for issue-419 merge 2019-11-22 23:34:03 +01:00
Matthias Koefferlein 4fe5a96596 Implemented #426 (feature request: group techs) 
The tech group is a new XML tag "<group>...</group>".
This tag is editable in the tech "general" page as "Group".
If non-empty, a submenu will be created in the tech selector
menu for all techs with the same group.
 2019-11-22 23:23:11 +01:00
Matthias Köfferlein a792cf4c1e
Merge pull request #424 from KLayout/issue-407 
Issue 407
 2019-11-22 23:12:44 +01:00
Matthias Köfferlein ac7e17ffcb
Merge pull request #422 from KLayout/issue-406 
Issue 406
 2019-11-22 23:12:16 +01:00
Matthias Köfferlein 9200e5037d
Merge pull request #421 from KLayout/issue-417 
Fixed #417: look up the net in the parent hierarchy of the net shape …
 2019-11-22 23:11:59 +01:00
Matthias Köfferlein c8cf8122b6
Merge pull request #414 from KLayout/issue-411 
Issue 411
 2019-11-22 23:11:24 +01:00
Matthias Köfferlein 319c73e6c0
Merge pull request #413 from KLayout/issue-408 
Fixed issue #408 (internal error after EdgePairs#polygon)
 2019-11-22 23:11:05 +01:00
Matthias Koefferlein 247bfa9ac5 Implemented #407 (variables in technology base path) 
The implementation uses extrapolation of strings in the
"Expressions" framework.

There is how:
* $(tech_name) -> substituted by the technology name
* $(tech_dir) -> substituted by the directory the technology file is stored in
* $(tech_file) -> substituted by the absolute path to the tech file
* $(appdata_path) -> substituted by KLayout's home directory (e.g. ~/.klayout)
* $(env('X')) -> substituted by the environment variable $X
 2019-11-21 21:37:00 +01:00
Matthias Koefferlein 6648b53822 Fixed issue #419 (multiple top circuits after flatten of netlist) 
The problem is solved by always producing subcircuits for cell
instances, even if there are no connections.

The netlist comparer had to be adjusted too because subcircuits
without pins were used for representing "unknown" subcircuit pairing.

In addition, this patch should lead to a better matching of
parallel subcircuit configurations where two different subcircuits
are entirely parallel.
 2019-11-20 21:56:12 +01:00
Matthias Koefferlein f28b8e60c1 Fixed #417: look up the net in the parent hierarchy of the net shape clusters to find the net for the flattened netlist. 2019-11-19 23:22:40 +01:00
Matthias Koefferlein 6c7ceb74dc Enhanced intersections algorithm so that the generated points won't overlay with finite edges from the AND part 2019-11-19 21:19:36 +01:00
Matthias Koefferlein 9af662a512 WIP: try to avoid duplicate intersection points by eliminating those. Problem persists: intersection points may be duplicates of edges arising from AND 2019-11-18 23:14:24 +01:00
Matthias Koefferlein 24759c7174 WIP: first implementation. Testing needed. 2019-11-18 19:14:06 +01:00
Matthias Koefferlein 990961e5f4 Fixed #411 (multiple device extractors for same class) 2019-11-17 23:12:50 +01:00
Matthias Koefferlein 1131532e4f First implementation, needs testing. 2019-11-17 22:45:36 +01:00
Matthias Koefferlein 68c6941318 Fixed issue #408 (internal error after EdgePairs#polygon) 2019-11-17 22:32:02 +01:00
Matthias Koefferlein 181d5b48e6 Fixed consistent typo: PCell's -> PCells 2019-11-17 21:47:11 +01:00
Matthias Koefferlein 6d8f56194b Edge enhancements 
New binding: Edge#d (distance vector), Edge#clipped and Edge#clipped_line.
"intersection_point" returns nil in case of no intersection.
Documentation error fixed (Edge#distance).
 2019-11-17 21:30:08 +01:00
Matthias Koefferlein 8dddc4000f Also write the net properties to GDS or OASIS 
"build_nets" will now write the net's properties
to the generated net shapes.
This might enable interesting applications.
 2019-11-13 23:09:09 +01:00
Matthias Koefferlein bb3aed5773 Merge branch 'master' of https://github.com/KLayout/klayout into netlist_properties 2019-11-13 00:59:29 +01:00
Matthias Koefferlein 876487edde Added persistency of the netlist object properties into L2N/LVSDB files 2019-11-13 00:06:29 +01:00
Matthias Koefferlein d060147713 Enhancements for the netlist object properties 
- more memory efficient (single pointer only)
- iterator for properties
- NetlistObject#property_keys in GSI
 2019-11-12 23:00:49 +01:00
Matthias Koefferlein 6d6ac23f50 Fixed a build issue (const iterator cannot be used in std::map::erase) 2019-11-12 20:55:28 +01:00
Matthias Koefferlein 86e041cd51 Updated test data. 2019-11-11 23:03:40 +01:00
Matthias Koefferlein 47efb9d11b WIP: fixed compiler warning 2019-11-11 07:08:37 +01:00
Matthias Koefferlein 0ce06125ca Introducing netlist object properties. 2019-11-11 07:02:02 +01:00
Matthias Koefferlein 4a212e8db6 Added tests for Region#scale_and_snap and Region#snap 2019-11-07 23:33:54 +01:00
Matthias Koefferlein 988b1e563f Added unit test for DeepRegion::snap 2019-11-07 23:11:34 +01:00
Matthias Koefferlein 318efbf7b0 Fixed 'scale_and_snap' feature 2019-11-07 22:54:16 +01:00
Matthias Koefferlein 4924d0269c Fixed #400, added tests. 2019-11-06 23:28:16 +01:00
Matthias Koefferlein 1e2a8b264d WIP: because the fixed scheme works nicely, add a new scale_and_snap function. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 895206dfa1 WIP: bugfix in case of clip variants. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 51676376e6 WIP: Variant building bug fixed. Needs testing. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
klayoutmatthias 627b248f7e Enhanced compatibility between platforms (problem was: order of execution of argument expressions) 2019-11-02 01:26:37 +01:00
Matthias Koefferlein 679aecd11f Removed debug output. 2019-10-31 00:51:54 +01:00
Matthias Koefferlein 73556d6edc Netlist compare issue fixed 
In tentative mode, node equivalence shall not be assumed
if the nodes have edges which don't appear in the other node.
 2019-10-30 23:55:08 +01:00
Matthias Koefferlein 3cc38fcfc2 Solved ambiguous bus resolution problem. 2019-10-29 23:26:17 +01:00
Matthias Koefferlein 15fa99c128 WIP: bugfix ambiguous bus-like pins and net compare. 2019-10-29 22:53:37 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein 373a3db1ec WIP: netlist comparer - increase default depth and added test 
The test is specific for symmetric circuits with manifold
symmetry axes.
 2019-10-24 23:58:30 +02:00
Matthias Koefferlein ac479c30bc Fixed unit tests. 2019-10-24 00:23:03 +02:00
Matthias Koefferlein 3a8d5d9779 Removed debug code. 2019-10-23 23:49:38 +02:00
Matthias Koefferlein 4ce37160d5 Two bug fixes in net compare (tests required): 
- name compare of net names wasn't always case insensitive
- tentative evaluation was sometimes continued even after
  a contradiction was detected because the return codes
  of different edge examinations were not combined correctly.
 2019-10-23 23:46:25 +02:00
Matthias Koefferlein 36ee1efe16 WIP: speedup LVS 'align' by flattening top-down 2019-10-21 22:14:36 +02:00
Matthias Koefferlein f0635589f7 WIP: fixed cell cluster interaction cache. 2019-10-20 23:27:15 +02:00
Matthias Koefferlein a0544e7807 WIP: caching of cell interactions in net cluster builder for speedup - test data needs update! 2019-10-19 21:44:29 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein 611f62e73f Removed debug leftover code 2019-10-17 22:47:43 +02:00
Matthias Koefferlein cd4516393b WIP: bugfix (breakout cell handling) and performance 
1.) Bugfix: breakout cells also need to be handled
    when diving down inside the hier cluster builder
2.) Performance: cache cell interactions
 2019-10-17 01:54:41 +02:00
Matthias Koefferlein 991778f718 "breakout cells": attempt to provide a solution for SRAM 
Breakout cells can be specified to shortcut hierarchy
evaluation for some cells. This allows treating SRAM cells
as isolated entities - specifically when it comes to extracting
devices.
 2019-10-16 00:49:41 +02:00
Matthias Koefferlein f8476bdf26 Fixed an issue with 'align' in LVS scripts - with multiple layout cells assigned to one schematic, align won't give the right results. 2019-10-05 09:30:38 +02:00
Matthias Koefferlein 2325e1bce4 Merge branch 'dvb' into pull_feature 2019-10-04 22:58:52 +02:00
Matthias Koefferlein ef56264f64 Fixed a regular arrays issue with begin_touching 
In case of 1d arrays with a or b == (0,0), the iterator
was always delivering all items, not just the touching ones.
 2019-10-04 22:45:23 +02:00
Matthias Koefferlein 2fa7c4b6d4 Partially enabled progress for hierarchical processor. 2019-10-04 01:48:45 +02:00
Matthias Koefferlein 212bd86aab Thread safetiness: enable multiple threads for deep region operations 2019-10-04 01:39:16 +02:00
Matthias Koefferlein 7c5ae471ab WIP: performance improvement of hier local processor 
The solution is to take intruder instances from as
far as possible in the hierarchy. This provides a
performance improvement in some cases, specifically
if this leads to compression of contexts.
 2019-10-03 22:53:38 +02:00
Matthias Koefferlein 5ed41cc345 Merge branch 'master' into pull_feature 2019-10-03 14:32:25 +02:00
Matthias Koefferlein e1d77a1476 pull_interacting for edges/edges and edges/regions, some enhancements and bug fixes 
Bug fixes:
- use dist 1 to cover touching case properly in local processor
- handling of raw mode and is_merged state

Additional tests
 2019-10-03 13:08:37 +02:00
Matthias Koefferlein 76b8bd3279 Fixed several issues with raw mode/merged semantics and many Region and Edges methods. Added edge/edge pull and edge/polygon pull. 2019-10-03 01:46:49 +02:00
Matthias Koefferlein 77c8ff50ed WIP: don't fallback to flat in case of non-deep other arguments in select_interacting and pull. 2019-10-02 00:12:04 +02:00
Matthias Koefferlein a1e87d4c14 First pull* implementation functional. 2019-10-01 23:53:05 +02:00
Matthias Koefferlein 74880a5198 First implementation of pull* methods 2019-10-01 22:06:16 +02:00
Matthias Koefferlein 0bc2321ade Some code cleanup. 2019-09-30 23:17:42 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein bdf5e3c124 WIP: fake pin debug issue with LVS 
Fake pins: pins that happen because something connects to a cell at an
unexpected position. Such a pin is difficult to find. The solution is
to keep those nets and nur purge them so these nets can be identified
in the layout.

Here: is_floating? will be true only if there are no pins. Hence
nets with pins are not removed. is_passive is introduced for nets -
passive nets are such that don't have elements, but a pin.
Circuits are purged if they only have passive nets.
 2019-09-30 21:58:13 +02:00
Matthias Koefferlein 506cfc1c6f WIP: attempt to retain nets which don't have active elements but pins. This is supposed to simplify debugging in case of fake pins. When removing those nets, the pin is very difficult to find. 2019-09-30 20:58:55 +02:00
Matthias Koefferlein d69c60a5c5 Enabled net tracing for heavily decomposed polygons 2019-09-19 00:13:14 +02:00
Matthias Koefferlein 6c52daa3a3 Follow-up on #353 (sessions paths relative to session file) 
Consistent behavior for file paths for images too.
Plus: image paths are not kept as absolute paths
inside the session.
This makes regeneration of images stable.
 2019-09-18 22:05:37 +02:00
Matthias Koefferlein 56084b6b59 Merge branch 'dvb' 2019-09-08 20:07:16 +02:00
Matthias Koefferlein e2cc0c48b1 Provide flat and hierarchical 'trace all nets' feature, added Netlist#flatten. 2019-09-06 23:13:21 +02:00
Matthias Koefferlein fa72885020 issue #317: provide undo combination for the paste+move sequence in 'interactive paste'. Same for 'interactive dup' 2019-09-04 23:47:05 +02:00
Matthias Koefferlein 5cfadad54f Updated test data. 2019-08-30 11:01:00 +02:00
Matthias Koefferlein 2a8f4c9610 Updated test data. 2019-08-30 10:52:51 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities 
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
 2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein b1acfe9587 Tried a better deal with floating pins 
1.) is_floating is now only true if there is no device
    and no subcircuit on a net. This means we only purge
    nets if they are really floating. So far we purged
    nets without pins which lead to the mismatch:

    Before purge:
      Layout:            (net) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    After purge:
      Layout:           (null) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    (null does not match any net)

2.) circuit pin matching was a bit picky. Only when
    one circuit did not have pins, matching was sloppy.

    In real cases however, circuits may have unconnected
    pins:
    - top level pins without a counterpart (no label)
    - subcircuits pins which are not used

    We catch both cases by refining the match: if a pin
    is not used, it does not need to match against
    any other pin. It's reported as "matching against null"
    though.
 2019-08-29 22:25:59 +02:00
Matthias Koefferlein 9a69d106fd Fixed some small issues in the netlist compare 2019-08-29 00:19:24 +02:00
Matthias Koefferlein 3a12714593 Fixed some doc issues, added doc for hierarchical compare. 2019-08-26 18:55:35 +02:00
Matthias Koefferlein 444e10d32f WIP: rerun LVS, partial LVS 
Rerun LVS: a button is provided which allows re-running
the LVS or netlist extraction from the netlist browser.
TODO: a generic concept for triggering the generators

"Partial LVS" is a feature where it's possible to
select a layout subcell - running LVS then will only
compare against the corresponding schematic subcell, not
the whole tree. The magic is done by "align" which will
remove the upper hierarchy part.
 2019-08-24 22:56:20 +02:00
Matthias Koefferlein a9a2cb69c8 Avoiding one assertion by not considering floating device terminals 2019-08-24 09:58:08 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein b0aa9b6540 Spice reader test compatible with Windows (three-digit exponential) 2019-08-21 23:03:24 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein b7c83eaaa6 Spice reader: subcircuits w/o pins 
This happens for subcircuits which only
connect to global nets.

Plus: ".global" now accepts more than just one net
 2019-08-19 23:00:24 +02:00
Matthias Koefferlein 1bc03c3b79 Implement "M" parameter for Spice 
This implementation is pretty simplistic and
applies "M" the following way:
* R: R(final) = R/M
* L: L(final) = L/M
* C: C(final) = C*M
* M: W(final) = W*M
* D: A(final) = A*M
* Q: AE(final) = AE*M

The other parameters (specifically the other
geometry parameters) are not scaled yet.
 2019-08-19 22:51:22 +02:00
Matthias Koefferlein 24b985f32e Better .include for Spice reader 
* .inc is allowed as synonym
* Paths can be URL's (with HTTP)
* Relative resolution of paths/URL's vs. parent of .include
 2019-08-19 21:45:40 +02:00
Matthias Koefferlein 9fecc4b674 Merge branch 'dvb' 2019-08-19 21:06:37 +02:00
Matthias Köfferlein 15f45fb09d
Merge pull request #327 from KLayout/query-performance-fix 
Fix for layout query performance improvement: needs to check for qual…
 2019-08-19 19:37:15 +02:00
Matthias Koefferlein fe4396d872 Merge branch 'issue-306' 2019-08-19 00:03:39 +02:00
Matthias Koefferlein e9eed3842b Fix for layout query performance improvement: needs to check for qualified cell name (with lib), not pure cellname 2019-08-18 19:09:07 +02:00
Matthias Köfferlein c75a1bc2eb
Merge pull request #313 from KLayout/query-performance 
Query performance
 2019-08-18 17:31:17 +02:00
Matthias Köfferlein 16ae0346b8
Merge pull request #314 from KLayout/vars-for-queries 
Vars for queries
 2019-08-18 17:31:11 +02:00
Matthias Köfferlein bf41da69da
Merge pull request #315 from KLayout/lib-browser 
Lib browser
 2019-08-18 17:31:02 +02:00
Matthias Koefferlein 8981ed434a First fix for issue-306: some polygons are not recognized as rounded, more robust radius extraction. 2019-08-17 23:55:49 +02:00
Matthias Koefferlein aa72d03526 Fixed issue #322 by skipping used layer indexes - will also help with DXF and other named-layer formats 2019-08-17 15:30:47 +02:00
Matthias Koefferlein 7c0dd07d42 WIP: lib browser - cleanup and small bug fixes. 2019-08-04 00:49:08 +02:00
Matthias Koefferlein a104352a93 WIP: library browser - cleanup of unused cells in lib browser, some bug fixed, enhancements to parameter editor on drop 2019-08-04 00:08:39 +02:00
Matthias Koefferlein fda5d86b4b Performance enhancement of netlist compare (avoid O(2) loop) 2019-08-02 01:39:07 +02:00
Matthias Koefferlein 4428ef808b WIP: library browser - PCell variants as children of PCells 2019-08-01 22:52:20 +02:00
Matthias Koefferlein 0c18171e63 WIP: library browser - basic setup. Not much functionality yet. 2019-07-31 23:46:48 +02:00
Matthias Koefferlein dfd713016b Added some unit tests for performance improvement of queries. 2019-07-29 22:36:39 +02:00
Matthias Koefferlein 0dcfeabaf4 Query performance improvement for the cell tree recursion case by introducing optimization hints ('filter state objectives') 2019-07-29 22:27:36 +02:00
Matthias Koefferlein e329f60257 WIP: attempt to improve performance by using name match shortcuts 2019-07-28 19:05:25 +02:00
Matthias Koefferlein 49c1bacb98 Introducing variables for layout queries: 
1.) The ExpressionContext class is a mapping of tl::Eval
    and allows providing a variable context for the LQ.
    Expression class is derived from ExpressionContext now.
2.) The variable lookup has been changed so that variables
    can be modified even if they come from a parent context.
3.) LayoutQuery and iterator has been given an argument to
    supply the context
 2019-07-28 01:33:30 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein 2993a6411a WIP: some enhancements to cross reference and browser 
Devices: try to pair unmatching ones similar to subcircuits
Don't sort devices by the device name but by class name
Show the device parameters for netlist devices (same as
for netlist browser)
 2019-07-27 20:21:13 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening. 
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
 2019-07-27 00:37:22 +02:00
Matthias Koefferlein 9cad9ca024 Fixed missing initialization of device_scaling in LayoutToNetlist. 2019-07-24 20:49:56 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS 
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
 2019-07-24 00:16:47 +02:00
Matthias Koefferlein aff8212f2f Provide 'align' method to auto-align circuit and cell hierarchy in LVS 2019-07-23 00:14:43 +02:00
Matthias Koefferlein 14d9689498 Added .global to Spice reader. 2019-07-22 23:02:31 +02:00
Matthias Koefferlein 9d250d6df9 Using a larger branch complexity than default for LVS full test's netlist compare 
In addition: typo fixed, added doc for complexity configuration
parameters.
 2019-07-21 22:24:07 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Köfferlein df23830a1c Fixed a runtime issue on Windows 2019-07-16 00:39:39 +02:00
Matthias Köfferlein 9820e57031 Don't write third terminal for R or C (WithBulk variants) 2019-07-15 23:19:03 +02:00
Matthias Köfferlein eb9ffb4a35 Another msvc2017 build warning fixed 2019-07-15 23:18:20 +02:00
Matthias Köfferlein 9a371b8fd2 Fixed some build warnings with msvc2017 (maybe real issues and memory leaks) 2019-07-15 23:17:24 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
Matthias Köfferlein 397e86f4b4 Merge branch 'dvb' of https://github.com/klayout/klayout into dvb 2019-07-13 23:39:16 +02:00
Matthias Köfferlein 4172b60d60 Fixed a build issue on Windows. 2019-07-13 23:38:26 +02:00
matthias 8b17a4da4f A few utility functions 
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
 2019-07-13 22:45:22 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein e8ff8156a0 fix for #264 
1. Errors in coerce_parameters are now shown as
   red label + warning icon in the parameters dialog
2. Errors during produce are always logged now

Plus: the scroll bars of the PCell parameters page
don't jump back on "Apply".
 2019-07-12 21:13:18 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein f66b094e88 Merge branch 'dvb' into dvb_test 2019-07-12 17:44:11 +02:00
Matthias Koefferlein d109a22cf5 Renaming (distro nodes->virtual nodes) 2019-07-11 23:20:42 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 2f01c7a0bd WIP: other algorithm for handling subcircuits in netlist compare 2019-07-10 23:40:16 +02:00
Matthias Koefferlein 67f786035c WIP: during refactoring 2019-07-10 00:32:53 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins 
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
 2019-07-09 19:55:48 +02:00
Matthias Koefferlein 0c6ead6f90 WIP: introduced boundary into L2N format so we have something to display for abstracts. 2019-07-09 01:18:23 +02:00
Matthias Koefferlein c9e08c4500 WIP: propagate global nets to parent hierarchy even if there is no shape inside the cell. 2019-07-08 23:11:35 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein 993ef78575 WIP: some cleanup/enhancement 
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).

The problem gets worse with abstracts.

The enhancements are
- Such cases generate only warnings in the browser
  and the message says swapping might be the case
- Floating nets are treated differently. This should
  lead to a better performance for abstracts/black boxes,
  but in case of disconnected pins (due to wire errors),
  floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
  case of two swappable pins this wouldn't be an issue, but
  for more than two this would create ambiguities and
  prevent topological matching.

Plus: Debug output option for net graph

Tests updated
 2019-07-07 18:17:14 +02:00
Matthias Koefferlein ace0788f85 WIP: Spice reader reads pin names from nets 2019-07-07 00:05:22 +02:00
Matthias Koefferlein 0e5ecdc36b Attempt to make LVS compare output a little more predictable with boundary cases 
- For unattached subcircuit pins no error should be reported
- For abstract nets, graph propagation through subcircuit pins isn't attempted.
  Abstract nets are only dummy-associated currently.
 2019-07-06 23:40:49 +02:00
Matthias Koefferlein 903b1f7505 WIP: fixed 'equivalent_pins' 2019-07-06 21:47:25 +02:00
Matthias Koefferlein 5ce8dd2684 WIP: added circuit blankout. 2019-07-06 19:50:20 +02:00
Matthias Koefferlein 71777670de Fixed unit tests. 2019-07-04 01:24:19 +02:00
Matthias Koefferlein 5e70f4fa03 Fixed an edit bug. 2019-07-04 01:18:25 +02:00
Matthias Koefferlein 07ae488652 WIP: bugfix - don't uppercase file names in SPICE .include, typos fixed. 2019-07-04 00:57:52 +02:00
Matthias Koefferlein 66a9fa41e7 WIP: added more docs, confine BJT combination to emitter parameters. 2019-07-02 21:09:32 +02:00
Matthias Koefferlein f931b6a1c1 Bugfix: avoid an assertion in the netlist browser 
Reason: when a circuit does not have pins and is top level,
but the reference has pins, the reference pins are regarded
to match against (nil). This case has to be reported properly,
otherwise the model can't be built consistently.
 2019-07-02 00:01:11 +02:00
Matthias Koefferlein ef1441e546 WIP: fixed unit tests. 2019-06-28 17:08:04 +02:00
Matthias Koefferlein 6ed3838baf WIP: fixed an edit failure 2019-06-28 14:43:52 +02:00
Matthias Koefferlein 80d86cc425 WIP: netlist browser - allow switching between L2N and LVSDB view 2019-06-28 11:27:43 +02:00
Matthias Koefferlein 910a36b83d WIP: better matching of subcircuits - attempt to map them even if not identical. This hopefully makes solving subcircuit connection problems easier. 2019-06-28 11:05:43 +02:00
Matthias Koefferlein 3310d34cf3 WIP: better tooltips and comments for LVS browser. 2019-06-27 00:14:18 +02:00
Matthias Koefferlein 955d21a656 WIP: case insensitive compare of netlists (after reading Spice, the names are caseless) 2019-06-26 20:58:42 +02:00
Matthias Koefferlein 0cbfa698f0 WIP: debugging, development 
- LVS DSL debugging, enhancements
- Allow polygons with holes in L2N
- Spice Reader: was creating too many class objects
- Device class categorizer: allow associating A->C,B-C
- ...
 2019-06-26 20:41:49 +02:00
Matthias Koefferlein 37012efba0 WIP: fixed unit tests, bug fix in DeepRegion -> and and not shall return a DeepRegion always. 2019-06-24 20:56:20 +02:00
Matthias Koefferlein 624811d55e WIP: fixed a basic issue with empty layers 
Previous: empty layers occupied a special layer in the DSS
But what when empty layers are required as outputs?
ONE layer isn't good -> would overwrite the layer and it's
no longer empty for others.
So we need to keep the layers separate.
 2019-06-23 23:44:15 +02:00
Matthias Koefferlein 464a1f35fb WIP: enhancements to DRC DSL for net extraction, some bug fixes in L2N browser etc. 2019-06-23 23:23:36 +02:00
Matthias Koefferlein 717e7ca0ab WIP: Fixed Spice reader/writer delegate, tests. 2019-06-23 00:08:49 +02:00
Matthias Koefferlein a1a0b62a10 WIP: doc fixes, added Netlist::simplify as convenience method 2019-06-22 22:18:55 +02:00
Matthias Koefferlein 621c3f74ed WIP: reader delegate - GSI binding, tests. 2019-06-22 22:03:32 +02:00
Matthias Koefferlein 343e340e22 WIP: SPICE reader delegate, unit tests + debugging 2019-06-22 19:44:33 +02:00
Matthias Koefferlein d174fb73fd WIP: preparations for SPICE reader delegate. 2019-06-22 18:37:32 +02:00
Matthias Koefferlein 46dafd50ea WIP: unit tests updated 2019-06-22 10:15:32 +02:00
Matthias Koefferlein 847f60947d WIP: BJT - don't place base and emitter terminals over each other. 2019-06-22 02:19:49 +02:00
Matthias Koefferlein 9647c94c68 WIP: added NE parameter for BJT3/4, AE and NE are primary parameters now. 2019-06-21 23:41:08 +02:00
Matthias Koefferlein 6f6b9e898b WIP: reduced number of warnings with clang 2019-06-21 23:22:42 +02:00
Matthias Koefferlein a4d2be7fbf Merge remote-tracking branch 'origin/master' into dvb 2019-06-19 23:14:27 +02:00
Matthias Köfferlein 2ef403e0ac
Merge pull request #282 from KLayout/issue-281 
Fixed #281 (proper reporting of width/space violations in the kissing…
 2019-06-18 18:44:41 +02:00
Matthias Koefferlein 03bc7e7d9a Fixed non-Qt build. 2019-06-18 01:13:41 +02:00
Matthias Koefferlein 303cda6981 Fixed #277 (min_coherence not recognized by region size) 2019-06-17 21:40:37 +02:00
Matthias Koefferlein 2389d2b391 Fixed #281 (proper reporting of width/space violations in the kissing-corner case) 2019-06-17 20:48:07 +02:00
Matthias Koefferlein 0794290fb5 WIP: added RBA basic tests for device extractors. 2019-06-15 21:48:02 +02:00
Matthias Koefferlein a91c3d3a4e WIP: fixed BJT4 class, added RBA tests for new device classes. 2019-06-15 21:11:15 +02:00
Matthias Koefferlein e939d51104 WIP: BJT4 device, more parameters for resistor (W,L), BJT devices for Spice writer, tests updated 2019-06-15 18:22:04 +02:00
Matthias Koefferlein 1b2a611d83 WIP: diode extraction test. 2019-06-15 09:34:04 +02:00
Matthias Koefferlein c717eb1efa WIP: fixed RBA unit tests. 2019-06-15 00:01:40 +02:00
Matthias Koefferlein 0b5db06ca8 WIP: tests for BJT extraction 2019-06-14 23:45:04 +02:00
Matthias Koefferlein 4212a783a5 WIP: test cases for device extractors R/C with bulk 2019-06-14 21:21:11 +02:00
Matthias Koefferlein 020b874083 WIP: more device classes - unit tests for classes 2019-06-14 20:41:38 +02:00
Matthias Koefferlein a979b669db WIP: new device classes 2019-06-14 19:08:09 +02:00
Matthias Koefferlein 3569ce391c Fixed implementation of duplicate instance removed 2019-06-13 15:52:36 +02:00
Matthias Koefferlein 0d623bc57a Avoid netlist extraction issues with duplicate instances 
So far, duplicate instances have lead to net propagation
into parent cells and floating nets. This is fixed by ignoring
duplicate instances where possible.
 2019-06-13 13:33:28 +02:00
Matthias Koefferlein 8e1dadbe59 Updated golden data of unit tests. 2019-06-13 09:02:47 +02:00
Matthias Koefferlein ebd00c186b Enhancements for net export feature 
- some refactoring
- better performance (was slow because layer iteration
  was done outside of loop and recursive cluster iterator)
- with selected nets, only the required hierarchy is
  produced. For this a new argument is added to
  LayoutToNetlist::create_cell_mapping (nets) which
  allows selecting the nets for which a cell mapping
  is requested
 2019-06-12 22:55:24 +02:00
Matthias Koefferlein a64726e5aa Performance enhancement of netlist model (issue was sorting by expanded name) 2019-06-09 10:05:45 +02:00
Matthias Koefferlein 13f4547789 More progress reporting, performance enhancements 
Main performance enhancement: don't update layouts
between make_layer in DeepRegion
 2019-06-09 09:40:45 +02:00
Matthias Koefferlein 7c220c63e1 Functional netlist hierarchy tree. 2019-06-06 01:36:07 +02:00
Matthias Koefferlein 577edea08b Added tree model for netlist hierarchy browser (LVS/L2N) 2019-06-01 22:38:27 +02:00
Matthias Koefferlein 9c898f536b Merge branch 'dvb' into dvb_enhancements 2019-05-31 23:00:40 +02:00
Matthias Koefferlein 7d6237a90a Unescaping of net names on Spice reader -> writer/reader should be self-compatible. 2019-05-31 22:55:09 +02:00
Matthias Koefferlein 985cffc099 Unique net names for Spice netlist writer 2019-05-31 22:19:51 +02:00
Matthias Koefferlein 9409cfce5c Some more fixes for gcc 4.4.7 :) 2019-05-31 00:36:14 +02:00
Matthias Koefferlein c684633dd6 Some enhancements for netlist extraction and writer 
* Spice writer can now be configure to skip the debug
  comments
* < and > are allowed chars in spice names now
* global net names have second prio over labels now
 2019-05-31 00:11:28 +02:00
Matthias Koefferlein 98207cb454 Another fix for gcc 4.4.7 2019-05-30 23:45:27 +02:00
Matthias Koefferlein e9cc9345f1 Fixed build on gcc 4.4.7 2019-05-30 22:53:27 +02:00
Matthias Koefferlein d4634f8620 Try to establish reproducability of clock tree compare test. 2019-05-30 07:12:49 +02:00
Matthias Koefferlein 9c6ed3e956 Merge remote-tracking branch 'origin/master' into dvb 2019-05-29 22:32:05 +02:00
Matthias Koefferlein 1935ee7ff9 Tried to fix unit tests for MSVC 2019-05-29 22:09:39 +02:00
Matthias Koefferlein dea2b76dc8 Added unit tests for res and cap device extractors. 2019-05-29 21:35:02 +02:00
Matthias Koefferlein 3b3791204d Fixed two more unit tests and renamed new 'define_layer' to 'define_opt_layer' for disambiguation 2019-05-29 01:22:11 +02:00
Matthias Koefferlein 10667d8e35 Bugfixed last commit, fixed unit tests. 2019-05-29 00:51:42 +02:00
Matthias Koefferlein 9d01cb5282 Some updates (res/cap device ex, flatten preserved geometry) 
- Two new device extractors for resistors and caps
  (two-terminal only)
- R and C device classes have A and P parameters now
- A generic concept to supply terminal output layers
  for device extractors (tX).
- Converted offset to transformation for devices:
  this was required to make circuit flattening preserve
  the geometry (transformation of devices)
  L2N/LVSDB formats have been extended for this.
 2019-05-29 00:10:10 +02:00
Matthias Koefferlein 759cc835d9 Added LayoutToNetlist test for pya. 2019-05-27 20:28:48 +02:00
Matthias Koefferlein 7b7e35d3d5 Fixed some compiler warnings. 2019-05-27 18:05:38 +02:00
Matthias Koefferlein 2bf3f3d5c9 Fixed unit tests, bug fixes in netlist DB model. 2019-05-26 18:28:35 +02:00
Matthias Koefferlein eb81a7e5a6 GSI binding of LVS objects. 2019-05-26 09:01:21 +02:00
Matthias Koefferlein 89cbe930ae WIP: GSI binding of LVS framework, tests and debugging 2019-05-26 01:37:45 +02:00
Matthias Koefferlein 14bc72039e WIP: integration of LVSDB into LayoutView (GSI) 2019-05-25 23:22:24 +02:00
Matthias Koefferlein 58b9cfa3c5 WIP: corrected some bugs in the GSI binding of LVS objects. 2019-05-25 22:59:52 +02:00
Matthias Koefferlein 09fe41294b WIP: GSI binding for LayoutVsSchematic and NetlistCrossReference. 2019-05-25 22:33:35 +02:00
Matthias Koefferlein 3269c4cd15 WIP: further debugging of crossref model + tests. 2019-05-23 00:06:37 +02:00
Matthias Koefferlein 57f9efa611 WIP: debugged cross-reference model 2019-05-22 23:47:38 +02:00
Matthias Koefferlein f1fc16d55f WIP: LVS DB model 2019-05-22 00:46:15 +02:00
Matthias Koefferlein 252622e3f8 Fixed unit tests, support floating pins for netlist compare 2019-05-20 23:48:07 +02:00
Matthias Koefferlein 625b173379 Reworked l2n and lvsdb format such that reading/writing gets more reproducible: maintain unnamed state of devices, subcircuits and pins 2019-05-20 22:33:23 +02:00
Matthias Koefferlein 834dcc7474 WIP: LVSDB reader/writer fixes 2019-05-19 23:42:31 +02:00
Matthias Koefferlein ea8320dcf8 WIP: LVSDB reader/writer: bugfixes, refactoring, tests. 2019-05-19 22:55:03 +02:00
Matthias Koefferlein 81e512e1cd WIP: Debugging of LVS DB writer 2019-05-19 10:13:20 +02:00
Matthias Koefferlein b2fee5da3d WIP: LVS DB writer. 2019-05-19 00:34:14 +02:00
Matthias Koefferlein bee662eea8 WIP: refactoring of LVS/L2N DB readers 2019-05-18 22:24:58 +02:00
Matthias Koefferlein c09db62cf6 Supply a base class binding for netlist compare event receivers 2019-05-18 22:24:35 +02:00
Matthias Koefferlein 3a11951175 WIP: LVS DB structure, reader 2019-05-18 21:39:54 +02:00
Matthias Koefferlein d006d0c91e WIP: some refactoring 2019-05-17 21:49:40 +02:00
Matthias Koefferlein 65ea72c569 WIP: netlist cross reference - refactoring of sorting, more robust 2019-05-16 23:26:49 +02:00
Matthias Koefferlein 95caca1dd5 WIP: netlist cross reference - tests and bugfixes 2019-05-16 22:43:28 +02:00
Matthias Koefferlein 924daa65b7 WIP: tests for netlist cross ref. 2019-05-16 00:09:06 +02:00
Matthias Koefferlein 56f6143e4f Added RBA::Technology#clear_technologies 2019-05-10 23:24:04 +02:00
Matthias Koefferlein 6f689863b6 Fixed MSVC build, fixed unit tests. 2019-05-10 21:09:19 +02:00
Matthias Koefferlein 0f0dd42b4d Refactoring and GSI binding for combined device interface. 2019-05-10 18:32:05 +02:00
Matthias Koefferlein 675a96eb9e WIP: some refactoring. 2019-05-10 00:40:49 +02:00
Matthias Koefferlein dda7ee8b60 WIP: a small refactoring. 2019-05-10 00:18:58 +02:00
Matthias Koefferlein ea28530c55 L2N: combined device persistance (complex concept - needs simplification?) 2019-05-10 00:15:51 +02:00
Matthias Koefferlein db1e813635 WIP: combined devices and geometry/L2N DB representation. Yet to do: device cell transformation beyond vector? 2019-05-09 01:07:54 +02:00
Matthias Koefferlein 9a361ee234 WIP: Support for combined devices 2019-05-08 00:14:08 +02:00
Matthias Koefferlein 1dbb25b2e8 Some refactoring (reuse cell context cache) 2019-05-06 01:54:10 +02:00
Matthias Koefferlein 30fdb0089b Integration of netlist extractor with net tracer plugin (-> "trace all nets") 2019-05-05 22:30:07 +02:00
Matthias Koefferlein c33fd40ec9 Switched l2n format to relative mode by default (relative mode is an option and maybe shorter) 2019-05-04 23:06:18 +02:00
Matthias Koefferlein bc26e32a68 WIP: netlist browser 2019-05-04 18:48:57 +02:00
Matthias Koefferlein 548f16f1df WIP: tried to provide a more consistent net building feature (here: building hierarchical nets with properties as net annotation - needs cell variants if properties are assigned to subcells too) 2019-05-04 00:37:38 +02:00
Matthias Koefferlein 2aaec56adb WIP: netlist browser - extended the net export scheme of build_net to support net annotation and flattening. 2019-05-03 23:33:37 +02:00
Matthias Koefferlein e661bac0a7 Netlist browser: fixed a segfault on 'unload all' 2019-04-28 22:57:06 +02:00
Matthias Koefferlein 7f9da5e8de Introduced concept of device class templates 
This concept allows to persist at least the standard
(built-in) device classes into L2N DB files. This way
device classes are persisted.
 2019-04-23 19:44:07 +02:00
Matthias Koefferlein 5b8a9cf49c WIP: netlist browser 2019-04-22 01:25:48 +02:00
Matthias Koefferlein ae9064021c WIP: netlist browser. 2019-04-21 10:41:20 +02:00
Matthias Koefferlein 20b984cc50 Naming of layers isn't required anymore for connect et al: names are given automatically now. 2019-04-20 20:30:12 +02:00
Matthias Koefferlein 8121f70e65 Netlist compare: Net mismatches reported if nets don't match but we still will proceed 2019-04-18 00:01:21 +02:00
Matthias Koefferlein e73c853873 Another fix for CenOS6 builds. 2019-04-17 07:24:31 +02:00
Matthias Koefferlein 42cb95188d Fixed build issue on CentOS6 2019-04-16 20:48:58 +02:00
Matthias Koefferlein 197d99ab62 Unit test fixed. 2019-04-16 07:10:34 +02:00
Matthias Koefferlein eabf558186 netlist exaction: selective net joining with labels 
Now, a glob pattern can be used to identify the labels
which implicitly join nets. Also, net joining now
only happens on top level.
 2019-04-15 23:24:27 +02:00
Matthias Koefferlein 3ebdfa83f9 Netlist compare: successfully applied the netlist compare to a bigger example. 2019-04-14 19:38:31 +02:00
Matthias Koefferlein 9f3bea92fb WIP: less strict pin matching (for top levels with/without pins). Fixed tests. 2019-04-14 19:22:07 +02:00
Matthias Koefferlein 699e94a45f WIP: added configuration options (complexity, depth) for net compare 2019-04-14 19:11:42 +02:00
Matthias Koefferlein 92524dcf57 WIP: netlist compare - bugfixed latest version and updated tests. 2019-04-13 19:56:08 +02:00
Matthias Koefferlein 4e85ae7db0 WIP: netlist compare (better backtracking) 2019-04-13 02:48:10 +02:00
Matthias Koefferlein e855d8df35 WIP: fixed unit tests. 2019-04-12 00:31:48 +02:00
Matthias Koefferlein 187baf2941 WIP: enhanced backtracking of netlist compare. 2019-04-12 00:15:36 +02:00
Matthias Koefferlein e03a524fcf WIP: netlist compare, bug fixes. 2019-04-11 00:47:36 +02:00
Matthias Koefferlein c0b1c4f775 WIP: enhanced backtracking for netlist compare 2019-04-11 00:13:19 +02:00
Matthias Koefferlein f34d161e2f WIP: new backtracking algorithm for net matching. 2019-04-09 23:13:40 +02:00
Matthias Koefferlein a3edd95f94 WIP: new backtracking algorithm for net matching. 2019-04-09 22:31:03 +02:00
Matthias Koefferlein 6b6cc5a34f WIP: network compare, debugging output. 2019-04-09 16:44:47 +02:00
Matthias Koefferlein 2e9422a753 Netlist compare: a little less freedom when picking derived net pairs ... 2019-04-08 21:32:41 +02:00
Matthias Koefferlein 7cdd40dabb Netlist compare: more detailed derivation of net assignments from known nets (pairing by deduction) 2019-04-08 21:21:34 +02:00
Matthias Koefferlein be35646c24 Spice reader/writer: more consistent with respect to allowed characters now. 2019-04-08 21:20:22 +02:00
Matthias Koefferlein c0bf5d955c Removed a debug statement. 2019-04-07 11:49:59 +02:00
Matthias Koefferlein c474fa6550 Bugfix: Spice reader needs to transform length units to micrometer 2019-04-07 11:09:08 +02:00
Matthias Koefferlein f6836b96a2 WIP: some enhancements 
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
 2019-04-07 10:15:57 +02:00
Matthias Koefferlein df2bd5e80a Netlist: flatten subcircuits, circuits 2019-04-06 23:36:08 +02:00
Matthias Koefferlein 18ee59023e Speedup of Spice format netlist reader 2019-04-06 21:14:25 +02:00
Matthias Koefferlein 8f1db684c0 Fix: account for rounding errors when doing default compare of device parameters. 2019-04-06 20:33:29 +02:00
Matthias Koefferlein aad52b77ba Netlist compare: added the ability to filter small caps and high resistance devices 2019-04-06 19:46:13 +02:00
Matthias Koefferlein da5680ef24 Netlist compare: configurable device parameter compare scheme. 2019-04-06 15:19:43 +02:00
Matthias Koefferlein 43f65e4d29 Added tests for GSI binding of dbNetlistCompare 2019-04-06 00:18:37 +02:00
Matthias Koefferlein c5a56dbc5f WIP: GSI binding for netlist comparer. 2019-04-04 23:41:46 +02:00
Matthias Koefferlein 52fb8b0f65 Merge remote-tracking branch 'remotes/origin/master' into dvb 2019-04-04 07:35:43 +02:00
Matthias Koefferlein eacd5fc19d Fixed some spelling errors (allow to, allows to) 2019-04-03 19:15:09 +02:00
Matthias Koefferlein 8e9f15669f WIP: utilizing netlist compare for DRC checks as well 
+ Some enhancements (e.g. enable pin swapping for pins
  without names and devices or subcircuits)
 2019-04-02 22:39:29 +02:00
Matthias Koefferlein 89ffd7e3da WIP: Simple SPICE reader. 2019-04-01 22:46:33 +02:00
Matthias Koefferlein 9613ad72c8 WIP: netlist compare - using it for more tests 
Issue solved: some circuit pins may not have a net - these
need to be ignored.

Requirement: all pins with a net must be mapped.

Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.

Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
 2019-03-31 23:59:43 +02:00
Matthias Koefferlein 06e326dfd9 WIP: netlist compare - some more tests by netlist compare. Needs fixing. 2019-03-31 19:00:42 +02:00
Ruben Undheim 5d26cf4c77 Spelling errors in code and comments fixed 2019-03-31 15:25:18 +00:00
Matthias Koefferlein b391b4510f WIP: can compare empty circuits now 
Empty circuits play a role as abstracts. They
are compared by using the pin names the nets
are attached to. The implementation change is:
* nodes without device terminals or subcircuit pins
  are compared through their net properties (count
  and name of pins attached)
* some enhancements of the net string serializer
  have been made to account for pin name mismatches.
 2019-03-31 09:53:51 +02:00
Matthias Koefferlein 2452c72d2d WIP: netlist compare deployed for netlist extractors 
Some enhancements were required:
* Clusters left over from joined clusters must not be
  turned into nets: this leads to dummy nets.
* null Nets can happen as targets of edges. Don't assert
  in this case but treat null nets as identical for both
  netlists.
* Don't resolve ambiguous nets if there are options to
  do this non-ambiguously.
* logger can be null
* Added compare_netlists to dbTestSupport
 2019-03-30 23:04:57 +01:00
Matthias Koefferlein f06d435b05 WIP: netlist comparer - moved into it's own files. 2019-03-29 00:37:45 +01:00
Matthias Koefferlein e8d59504dd WIP: netlist compare - forced matching of circuits. 2019-03-29 00:13:13 +01:00
Matthias Koefferlein d255617051 WIP: netlist compare - tests for device class equivalence mapping, added Netlist#device_class_by_name 2019-03-28 18:01:22 +01:00
Matthias Koefferlein cefd6e91cf WIP: some refactoring, netlist compare. Goal: support explicit device class and circuit mapping. 2019-03-27 23:17:35 +01:00
Matthias Koefferlein b44a55d901 WIP: netlist compare - pin swapping. 2019-03-26 23:38:36 +01:00
Matthias Koefferlein 46cd80d606 WIP: netlist compare - terminal swapping of devices. 2019-03-26 22:05:08 +01:00
Matthias Koefferlein e0cb3f6303 WIP: netlist compare - subcircuit matching enhanced. 2019-03-26 20:54:49 +01:00
Matthias Koefferlein 93d2341bc7 WIP: netlist compare 2019-03-26 00:10:10 +01:00
Matthias Koefferlein fec2348d97 WIP: Net compare. 2019-03-25 23:26:46 +01:00
Matthias Koefferlein 1a30a3919d WIP: Net compare with subcircuits. 2019-03-25 22:14:16 +01:00
Matthias Koefferlein 55052038ea WIP: netlist compare 2019-03-24 21:14:08 +01:00
Matthias Koefferlein bb2d3765b8 WIP: netlist compare, ambiguous net resolution, device mapping. 2019-03-24 00:45:58 +01:00
Matthias Koefferlein 25b7ab9dab WIP: netlist comparer 2019-03-23 10:31:29 +01:00
Matthias Koefferlein 7042cdb98b Ported netlist normalization for #246 merge (unit test compatibility windows/linux) 2019-03-22 21:54:45 +01:00
Matthias Köfferlein d1acd722ad
Merge pull request #246 from KLayout/issue-245 
Issue 245
 2019-03-22 21:49:39 +01:00
Matthias Koefferlein 4e63b38092 Further normalization of Spice test files (unit tests) 2019-03-22 21:47:52 +01:00
Matthias Köfferlein 85808527c6
Merge pull request #244 from KLayout/issue-241 
Fixed issue-241 (no TextGenerator.default_generator for pymod)
 2019-03-22 17:52:22 +01:00
Matthias Koefferlein 5dfc609724 Normalize netlists before compare for windows/linux compatibility. 2019-03-22 17:51:37 +01:00
Matthias Koefferlein 522156b467 Renamed generated .cc files (fonts, glyphs) so they don't need to be excluded in pymod builds. 2019-03-22 07:26:51 +01:00
Matthias Koefferlein e545d6af3f Refined solution for issue-245 by providing a better name mapping (checked with ngspice) 2019-03-22 00:05:17 +01:00
Matthias Koefferlein 9356f32026 Fixed issue-245 (support Spice netlist with names instead of numbers) 
The option is in the Spice writer (writer.use_net_names=true).
 2019-03-21 23:34:16 +01:00
Matthias Koefferlein 69282f8fef Fixed issue-241 (no TextGenerator.default_generator for pymod) 
The issue was there because the fonts got imported
through Qt Resources. But in pymod there is no Qt.
The solution is to import them though compiled-in
blobs.
 2019-03-21 23:11:52 +01:00
Matthias Koefferlein e424a88c90 WIP: netlist compare algo 
1.) Can identify transistor netlists without subcircuits
2.) Ambiguities stay unresolved

Next steps: assign ambiguous nets one by one and continue
in case of ambiguitites.
 2019-03-21 22:13:23 +01:00
Matthias Koefferlein c568838bbe WIP: netlist compare 2019-03-20 23:00:43 +01:00
Matthias Koefferlein 2d4f23abd1 Updated tests. 2019-03-19 00:08:47 +01:00
Matthias Koefferlein d7eb9162ce WIP: unified to_string/to_parsable_string of db::Netlist, step 1 2019-03-18 19:28:20 +01:00
Matthias Koefferlein e4078ca750 String serialization for netlists. 2019-03-18 02:00:33 +01:00
matthias e361a528a9 DRC layer's flatten now returns a proper DRCLayer object, enabled flat layers to become input also for deep mode L2N 2019-03-13 16:14:27 +01:00
Matthias Koefferlein 57fb764f16 Removed ambiguity for 64bit coordinate builds. 2019-03-12 00:09:52 +01:00
Matthias Koefferlein 01ff0684f2 Tried to fix a compiler issue on CentOS6 2019-03-11 21:33:33 +01:00
Matthias Koefferlein 21f8ba6f35 Tried to fix CentOS6 build fails. 2019-03-11 07:38:51 +01:00
Matthias Koefferlein 6e93942c5b Fixed build for CentOS6 2019-03-11 07:15:58 +01:00
Matthias Koefferlein 41fdd74189 Custom devices for device extractor - tests in the DRC framework 2019-03-10 22:37:32 +01:00
Matthias Koefferlein 510c675d21 Test cases for DRC-based net extraction and flat extraction 
Flat extraction requires that texts of subcells are not
considered. Otherwise they pollute the net namespace of
the top cell.
 2019-03-10 19:35:13 +01:00
Matthias Koefferlein ab8107de2d Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS 2019-03-10 01:26:52 +01:00
Matthias Koefferlein 5ea8c56db3 A minor doc fix. 2019-03-09 23:23:45 +01:00
Matthias Koefferlein 37cc84908e Updated test because of edge pair normlization 2019-03-09 20:25:45 +01:00
Matthias Koefferlein 6932977273 A few bug fixes and test updates 
- edge pairs are normalized before turning them into polygons.
  This makes flat and deep implementation more consistent.
- deep region and flat regions were not cooperating in geo
  checks
- unnamed layers are not registered in make_layer - this
  does not make sense and will just hold a fake ref
- tests now use GDS to represent texts after transformation
  (with orientation, OASIS can't do this)
- texts are more consistently handled in the tests
- test debug output is not written in the same format
  than golden data unless special normalization is
  requested.
- a non-orientable polygon was converted to orientable in
  a text because this can be represented in GDS consistently
- DRC testsuite uses "polygons" instead of "input" to achieve
  identical behavior for deep and flat mode with respect to
  texts
- dbRegionTests are updated because texts are not allowed
  for non-original layers too
 2019-03-09 19:40:38 +01:00
Matthias Koefferlein 745696507f Two bug fixes in DRC related to flatten: 
- Merge semantics wasn't transferred to flat region
- Merge semantics wasn't set at all in deep region
 2019-03-09 09:59:23 +01:00
Matthias Koefferlein b30a9278d6 WIP: updated test cases. 2019-03-06 07:41:44 +01:00
Matthias Koefferlein 8b29b30ff9 WIP: more consistent text handling 
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.

However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.

The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.

A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
 2019-03-06 00:34:56 +01:00
Matthias Koefferlein c07d7e92d4 Fixed three compiler warnings. 2019-03-04 17:58:40 +01:00
Matthias Koefferlein bacd565d05 Bugfix: Spice writer added one pin too much to MOS4 transistors. 2019-03-04 17:26:35 +01:00
Matthias Koefferlein 604a634bf1 Generalization of layout index for LayoutToNetlist 2019-03-03 18:10:52 +01:00
Matthias Koefferlein 49621aa13a Fixed some documentation issues, DRC doc updated. 2019-03-03 10:17:54 +01:00
Matthias Koefferlein 261fb027fd GSI binding of antenna check function + tests. 2019-03-02 00:38:51 +01:00
Matthias Koefferlein 8d3b94201e Antenna check: tests added, 'catchall' diode protection 2019-03-01 23:07:28 +01:00
Matthias Koefferlein 9f4f2d58d7 First version of antenna check. 2019-02-28 23:56:49 +01:00
Matthias Koefferlein f83278207c WIP: don't keep a reference to DeepLayer inside DeepShapeStore - that's against the design. 2019-02-28 22:42:40 +01:00
Matthias Koefferlein 4035c804b7 WIP: fixed bugs, added tests. 2019-02-28 22:23:20 +01:00
Matthias Koefferlein fccdee5186 WIP: provisions for DRC/network extractor integration. 2019-02-28 00:55:06 +01:00
Matthias Koefferlein 36a3540e16 Allow empty regions for device extractor. 2019-02-25 23:51:21 +01:00
Matthias Koefferlein 21ea37f747 Updated test golden data. 2019-02-25 22:52:37 +01:00
Matthias Koefferlein 9b31bd3214 Fixed crash by introducing a new scheme for storing cluster refs 
The previous implementation was based on the Instance
pointers, but these got invalidated during device cell
construction. Now an explicit copy of the instance is
kept.
 2019-02-25 22:36:24 +01:00
Matthias Koefferlein d4ed21f42a Just new tests 2019-02-25 22:34:06 +01:00
Matthias Koefferlein 3c6aafcc0c Region: hierarchical text object detection implementated. 2019-02-23 00:56:55 +01:00
Matthias Koefferlein c7b17fb65a Merged master into dvb branch 2019-02-22 23:16:44 +01:00
Matthias Koefferlein 792de1e0e9 'break' function for regions (split polygons into pieces if required) 2019-02-22 23:10:26 +01:00
Matthias Koefferlein 18f74bac1e Enabled transformations for deep regions/edges/edge pairs - important for handling layouts with different DBUs in DRC 2019-02-22 01:02:48 +01:00
Matthias Koefferlein 03d744cc5b Further Windows build fixes. 2019-02-20 23:20:40 +01:00
Matthias Koefferlein 0f86e0c8aa Further Windows build fixes. 2019-02-20 22:56:01 +01:00
Matthias Koefferlein 5d222690bd Further Windows build fixes. 2019-02-20 22:50:19 +01:00
Matthias Koefferlein e787a18be2 Attempt to fix Windows build 2019-02-20 22:03:53 +01:00
Matthias Koefferlein 91407ddaa9 Added tests for region processors. 2019-02-20 21:40:43 +01:00
Matthias Koefferlein 503707f361 Refactoring: based results of edge/polygon operations on delegates entirely 2019-02-20 10:10:54 +01:00
Matthias Koefferlein 124c4eb61c Refactoring: generalization of filter/processor for edges, region 2019-02-20 09:45:38 +01:00
Matthias Koefferlein 0f2d0605a9 Some more refactoring - generalized polygon processing in region. 2019-02-20 01:17:14 +01:00
Matthias Koefferlein dbe8c62177 Fixed a bug introduced during refactoring: hulls/holes spoiled deep regions and produced Polygons rather than PolygonRefs 2019-02-20 00:33:46 +01:00
Matthias Koefferlein 3dd1ed4c4d Refactoring of edges processor. 2019-02-19 23:10:14 +01:00
Matthias Koefferlein 496b695ef0 Refactoring of the polygon processing in Region 2019-02-19 22:11:55 +01:00
Matthias Koefferlein 90c1d212a4 Refactoring: new concept for edge/polygon filters 2019-02-19 20:19:10 +01:00
Matthias Koefferlein 7143e75310 Some refactoring: cell variant collector isn't a big template anymore 2019-02-19 19:16:55 +01:00
Matthias Koefferlein 3918172c6a Fixed a nasty issue with editable mode. 2019-02-18 23:34:46 +01:00
Matthias Koefferlein 7f71cc3a56 Some bug fixes, added tests for hier DRC (at least for what is there yet) 2019-02-18 22:24:34 +01:00
Matthias Koefferlein 9ec6b44c93 Added some tests for the previous commit. 2019-02-18 00:15:26 +01:00
Matthias Koefferlein b91edbabde Enabled deep mode for DRC 2019-02-17 23:21:23 +01:00
Matthias Koefferlein 311318c578 Ported edge/edge DRC functions to hierarchical mode. 2019-02-17 18:54:33 +01:00
Matthias Koefferlein c40f147dc7 Edge/edge and edge/polygon interaction test ported to hierarchical mode. 2019-02-17 18:36:15 +01:00
Matthias Koefferlein 7ef0451ca8 Partial segments of edges converted to hierarchical operations. 2019-02-17 17:53:21 +01:00
Matthias Koefferlein 74006b6208 Hierarchical implementation of extended method for edges 2019-02-17 17:34:31 +01:00
Matthias Koefferlein ae783a2245 Hiearchical implementation of edge filter. 2019-02-17 16:18:24 +01:00
Matthias Koefferlein 61d766bd4c Hierarchical implementation of edge to region operations. 2019-02-17 16:05:39 +01:00
Matthias Koefferlein e6ee1c064e Hierarchical implementation of edge/edge booleans. 2019-02-17 15:07:16 +01:00
Matthias Koefferlein 8e5bffcf18 Hierarchical angle check. 2019-02-17 11:42:30 +01:00
Matthias Koefferlein a7bfaac424 Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation) 2019-02-17 10:59:04 +01:00
Matthias Koefferlein 5dc833970b Hierarchical implementation DRC functions (measurements) 2019-02-16 22:34:36 +01:00
Matthias Koefferlein 5a994fef6d First steps towards hiearchical DRC - needs testing. 2019-02-16 00:35:29 +01:00
Matthias Koefferlein 6e35e80963 Hierarchical implementation of polygon vs. edge interact 2019-02-15 23:43:45 +01:00
Matthias Koefferlein 78617930dd Hierarchical implementation of self-overlap merge. 2019-02-13 22:41:12 +01:00
Matthias Koefferlein ddcfda8761 Some optimization: keep merged state in deep region. 2019-02-13 17:17:03 +01:00
Matthias Koefferlein b0fc2be96e Deep regions: some more operations implemented hierarchically 
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
 2019-02-13 01:07:32 +01:00
Matthias Koefferlein 10f9de8b66 Added test for edge-based clusters, edge connectivity modes 2019-02-12 22:14:50 +01:00
Matthias Koefferlein 98864b1eda Some refactoring (removed code copies) 2019-02-12 21:27:17 +01:00
Matthias Koefferlein 4b5736ba6a Added result type template parameter to local hier processor. 2019-02-12 20:32:07 +01:00
Matthias Koefferlein 6404ca6b1d WIP: Deep edge pairs 2019-02-12 00:08:47 +01:00
Matthias Koefferlein 2d9a3aaaa6 WIP: Hierarchical production of error db's. Needs testing. 2019-02-11 00:11:03 +01:00
Matthias Koefferlein dd4fcd9e36 WIP: templatized local hierarchical processor. 2019-02-10 18:39:32 +01:00
Matthias Koefferlein a81a8cdbc8 Modified edge transformation to maintain the orientation paradigm 
When the transformation is mirroring, edges now swap their
points to maintain the right-is-inside paradigm.
 2019-02-10 16:03:46 +01:00
Matthias Koefferlein a14ca01bac WIP: more on deep edge collections. 2019-02-10 15:33:14 +01:00
Matthias Koefferlein f22217b6c4 WIP: deep edges and edge pairs. 2019-02-10 10:22:47 +01:00
Matthias Koefferlein 4abc38a5cc Test for deep/flat collaboration 2019-02-10 08:28:48 +01:00
Matthias Koefferlein e8e45b7272 Some tests, smooth and round method of deep region 2019-02-09 23:51:35 +01:00
Matthias Koefferlein 7a86f0d878 Bugfix: size method needs to produce polygon refs so the output is usable as input for booleans too. 2019-02-09 22:55:34 +01:00
Matthias Koefferlein b6dd149f53 Changed variant suffix to to be consistent with cell name suffix generation in KLayout. 2019-02-09 19:21:14 +01:00
Matthias Koefferlein 1f3af7bbfe Hierarchical area and perimeter and sizing 
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.

Sizing is implemented hierarchically.

For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
 2019-02-09 19:13:54 +01:00
Matthias Koefferlein bbf7b2768b WIP: cell variant collecting and building. 2019-02-09 16:29:34 +01:00
Matthias Koefferlein 50c8c067d5 WIP: cell variant formation utility class. 2019-02-07 23:13:23 +01:00
Matthias Koefferlein decc5ede13 Robustification of Region 
- Tests for merge
- Locking the layout when writing back the data for
  performance improvement
 2019-02-05 23:39:31 +01:00
Matthias Koefferlein 7c043dbb99 WIP: fixed DeepRegion implementation somewhat. Needs testing. 2019-02-05 00:25:32 +01:00
Matthias Koefferlein 981d668161 WIP: introduced hierarchical merge and some other hierarchical operations. 2019-02-04 23:43:19 +01:00
Matthias Koefferlein 9c0123df20 Implemented implicit joining of nets with the same label. 2019-02-03 21:34:23 +01:00
Matthias Koefferlein 3f1cd226a5 Made net name optional in l2n format. 2019-02-03 13:33:58 +01:00
Matthias Koefferlein f9c33733b9 l2n format writer and reader: more compact output 2019-02-03 01:49:48 +01:00
Matthias Koefferlein 1ea687d7b7 More details control over verbosity of region ops 
Plus: the region op control attributes (threads,
min_coherence etc.) got lost when replacing the
delegate of a region. Now they are maintained in
most cases.
 2019-02-03 01:48:14 +01:00
Matthias Koefferlein 99f111fe01 Attempt to achieve reproducibility between MSVC and gcc 
Applies to dbHierProcessor.cc:

The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.

Using ordered sets where possible and explicit
sorting might help.
 2019-02-02 22:43:42 +01:00
Matthias Koefferlein 5daf34ed76 Merge remote-tracking branch 'origin/windows-compat' into dvb 2019-02-02 02:36:14 +01:00
klayoutmatthias 1a080cc4d7 Windows build compatibility. 2019-02-02 02:33:48 +01:00
Matthias Koefferlein c90f7e4af9 Introduced perimeter parameters for MOS3/MOS4 2019-02-02 01:29:28 +01:00
Matthias Koefferlein 11cfe36ed1 Some MSVC build issues fixed (hopefully) 2019-02-01 23:18:54 +01:00
Matthias Koefferlein f2fff5cca1 Fixed compile issue. 2019-02-01 00:00:10 +01:00
Matthias Koefferlein efe06046aa Bugfixes (dbu, global nets) 
1.) Fixed bug on build_nets when DBU's of target
    and source layout were different

2.) Global nets of subcircuits need to be considered
    also when they are already connected through other
    connections.
 2019-01-31 23:50:34 +01:00
Matthias Koefferlein 57305977a4 Spice writer delegate fix 
- Changed to const & objects in the Spice writer delegate
  to non-const & for Ruby/Python reimplementation (as const/non-const
  ambiguity is an issue for Ruby/Python we cannot efficiently
  work with const refs)
- Updated test data because the previous implementation wasn't
  using refs but rather copies of device and device class
  objects.
 2019-01-31 22:23:58 +01:00
Matthias Koefferlein 4068478887 Implemented SPICE writer + tests. 2019-01-31 00:07:10 +01:00
Matthias Koefferlein 7d06ea83c1 Bugfix: a segfault happened during net cluster formation because make_path was messing up the memory layout of the cluster collections. 2019-01-28 21:29:34 +01:00
Matthias Koefferlein 7e42ff83cd More fine-tuning of verbosity of log output for local processor. 2019-01-28 21:28:23 +01:00
Matthias Koefferlein da8b2854de Some fine-tuning of the timer output verbosity of the edge processor. 2019-01-28 21:27:41 +01:00
Matthias Koefferlein 2da7b218b4 Print errors on log when running device extractor. 2019-01-27 22:01:29 +01:00
Matthias Koefferlein 794c31329a Bugfix: internal error when running netlist extraction. 2019-01-27 22:00:30 +01:00
Matthias Koefferlein 458d00969c Fixed issue #228 
Reason for the problem: the interaction test
has to keep separate "inside" records for both
below and above the scanline, not just once.
With the single record, the step in the
left polygon erased the "inside" condition.
 2019-01-27 00:04:15 +01:00
Matthias Koefferlein fe0d3e28ba Fixed issue #228 
Reason for the problem: the interaction test
has to keep separate "inside" records for both
below and above the scanline, not just once.
With the single record, the step in the
left polygon erased the "inside" condition.
 2019-01-26 23:59:22 +01:00
Matthias Koefferlein 863c6ba8de Fixed a hierarchy traversal bug in the hier processor. 2019-01-26 21:53:44 +01:00
Matthias Koefferlein 4712ee0f29 Activated DeviceAbstract for GSI. 2019-01-25 22:40:41 +01:00
Matthias Koefferlein 29264013b0 WIP: more consistent handling of polygon splitting parameters. 2019-01-25 22:28:25 +01:00
Matthias Koefferlein 12aaa2db20 Refactoring: unified handling of splitting parameters. 2019-01-25 21:48:56 +01:00
Matthias Koefferlein 6da9bc5e85 Updated tests after switching to boolean core. 2019-01-25 21:38:45 +01:00
Matthias Koefferlein 707c761bac WIP: local hierarchical operations: take boolean core rather than shape ref core -> better hierarchical quality. Tests need to be fixed. 2019-01-25 00:21:01 +01:00
Matthias Koefferlein a635435899 Moved some code 2019-01-23 23:39:43 +01:00
Matthias Koefferlein 1cfa3251ce Better reproducibility of results in hier processor: hash function of shape ref takes object hash, not pointer hash 2019-01-23 22:19:28 +01:00
Matthias Koefferlein fba5bed2a3 Performance improvement of device extractor (taking out a O(N**2) loop) 2019-01-23 01:02:22 +01:00
Matthias Koefferlein 68fe668567 WIP: performance improvement. 2019-01-22 07:42:44 +01:00
Matthias Koefferlein 81bf47688e Renamed device model -> device abstract 2019-01-21 22:37:13 +01:00
Matthias Koefferlein d79a448eaa Some performance improvement by eliminating empty objects in the box scanner. 2019-01-21 22:37:02 +01:00
Matthias Koefferlein f83e1dae43 Refactoring, some bugfixes, GSI bindings for L2N methods. 2019-01-20 23:12:27 +01:00
Matthias Koefferlein 4c7f43d749 More l2n reader tests. 2019-01-20 17:31:58 +01:00
Matthias Koefferlein dd39168dc8 WIP: Enabled layout generation from read l2n data. 2019-01-20 02:50:23 +01:00
Matthias Koefferlein a5e2cf58c3 l2n dump format is leaner (device terminal shapes dropped from nets as they are contained in the device abstracts). Some refactoring. 2019-01-19 23:00:19 +01:00
Matthias Koefferlein 8213e71a79 WIP: l2n reader implementation, some bug fixes, refactoring. 2019-01-19 22:19:08 +01:00
Matthias Koefferlein 56bb39a273 LayoutToNetlist enhancements in the area of the dumper. 2019-01-16 22:45:58 +01:00
Matthias Koefferlein 438f50091f WIP: Refined output format for l2n 2019-01-16 00:49:51 +01:00
Matthias Koefferlein 4cb8982ca2 WIP: added concept of device model. 2019-01-15 23:03:25 +01:00
Matthias Koefferlein 5962d66940 WIP: major enhancements with respect to device handling 
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
 2019-01-15 21:33:41 +01:00
Matthias Koefferlein 1af81b74d2 WIP: refactoring - turning devices into cells for better backannotation. 2019-01-14 00:59:47 +01:00
Matthias Koefferlein 3b0f4b3d78 WIP: fixed some compiler issues on certain systems. 2019-01-12 00:27:55 +01:00
Matthias Koefferlein baf50bd0b1 WIP: refactoring - singularization of classes in separate files. 2019-01-10 23:36:52 +01:00
Matthias Köfferlein 1144899976
Merge pull request #221 from KLayout/issue-200 
Fixed #200 by introducing layout locking during iteration
 2019-01-09 01:11:49 +01:00
Matthias Koefferlein aeeb6d7c87 Fixed #200 by introducing layout locking during iteration 
The cause for the problem was that the layout got updated
while iterating causing the mess within the iterator.

This solution is to lock the layout while an iterator
is present. This happens for various Cell and Shapes
iterator, so it's a major enhancement.
 2019-01-09 01:06:11 +01:00
Matthias Koefferlein 9fa5618034 Added test for device combination. 2019-01-08 23:49:12 +01:00
Matthias Koefferlein 14cb9090ec Provide operator-- on SortedCellIndexIterator to fix #220 2019-01-08 21:53:10 +01:00
Matthias Koefferlein d4d7ea8022 Updated copyright. 2019-01-08 01:09:25 +01:00
Matthias Koefferlein b0d7f5f7f5 Updated copyright. 2019-01-08 00:58:45 +01:00
Matthias Koefferlein feb2b69aa9 Merge remote-tracking branch 'origin/master' into dvb 2019-01-08 00:49:16 +01:00
Matthias Koefferlein fb4048d317 Added RBA tests for four-terminal MOS extraction plus global nets. 2019-01-08 00:17:58 +01:00
Matthias Koefferlein 294f1701b5 Added a test for joining of layers through multiple global net assignment. 2019-01-07 23:57:52 +01:00
Matthias Koefferlein 315bcdd016 WIP: bugfixed netlist extractor with global nets. 2019-01-07 23:33:57 +01:00
Matthias Koefferlein c80e335cd6 WIP: global nets integration in cluster builder. 2019-01-07 02:08:59 +01:00
Matthias Koefferlein a4f0fd665e Provided a solution for connectivity through global nets. 2019-01-06 17:50:51 +01:00
Matthias Koefferlein 6cf7558384 WIP: preparations for global net extraction 2019-01-06 17:04:13 +01:00
Matthias Koefferlein 64c2548ab8 WIP: first steps towards global nets. 2019-01-06 15:28:40 +01:00
Matthias Koefferlein eb435d5d85 WIP: refactoring - separated pins of net into outgoing and subcircuit. 2019-01-06 12:53:22 +01:00
Matthias Koefferlein 261b14a260 WIP: GSI binding of LayoutToNetlist::build_nets 2019-01-06 02:15:04 +01:00
Matthias Koefferlein 8d51d1e4bb WIP: better optimization of hierarchical net output. 2019-01-06 01:54:36 +01:00
Matthias Koefferlein ec3a3b0f8c WIP: added ability to export nets to layouts. 2019-01-06 01:32:20 +01:00
Matthias Koefferlein bc4f9efa5d One more test for probing with a slightly more complex hierarchy. 2019-01-05 23:21:37 +01:00
Matthias Koefferlein f86f8149eb Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout) 2019-01-05 22:40:53 +01:00
Matthias Koefferlein 15b79c9ddb IMPORTANT BUGFIX: array repo handling 
The issue: when cloning an array, the
"in_repository" flag might be left set. This
makes the system think the array is kept in
a repo. In the best case this creates a
memory leak.
 2019-01-05 21:55:06 +01:00
Matthias Koefferlein 6e468b43e0 WIP: bugfix - local to instance interaction did shortcut too early. 2019-01-05 10:12:55 +01:00
Matthias Koefferlein c31c87916c WIP: bugfix - array reference were not always considered correctly. 2019-01-05 01:34:10 +01:00
Matthias Koefferlein ad6d9b5715 WIP: provide a less memory intensive way to deliver shapes from nets. 2019-01-04 17:41:09 +01:00
Matthias Koefferlein e439d50111 WIP: hier netlist processort: performance improvement in instance-to-instance checking, leaner output of net shapes. 2019-01-04 08:03:31 +01:00
Matthias Koefferlein 72f838f8ee WIP: performance improvement, maximum confinement of interactions by local search area. 2019-01-04 01:22:24 +01:00
Matthias Koefferlein 3fd99407a3 WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements. 2019-01-03 23:25:28 +01:00
Matthias Koefferlein 62d9941c4a WIP: Bugfix - hierarchy was dropping instances. 2019-01-03 22:09:19 +01:00
Matthias Koefferlein 20799026d1 WIP: bugfix in net extraction (wrong hierarchy treatment) 2019-01-03 18:26:18 +01:00
Matthias Koefferlein 76330bea3a Save some memory on net shape retrieval. 2019-01-02 23:23:04 +01:00
Matthias Koefferlein ec3198c466 Netlist extraction performance improvement by taking a shortcut for local cluster/child cell cluster interactions. 2019-01-01 22:39:22 +01:00
Matthias Koefferlein 6a710a9efb Fixed an internal error that happened if additional layers got added to the working shape set. 2019-01-01 19:19:53 +01:00
Matthias Koefferlein 7898ec37cd Bugfix: netlist extractor did loose some connections. 2019-01-01 17:23:11 +01:00
Matthias Koefferlein fed7a4bfed Some performance improvement for the net extractor. 2019-01-01 13:07:40 +01:00
Matthias Koefferlein 060abc056e Fixed a memory corruption issue from the Netlist destructor. 2018-12-31 17:33:14 +01:00
Matthias Koefferlein 37d8f0bfca Added hierarchical progress reporting for more detailed progress. 2018-12-31 16:41:32 +01:00
Matthias Koefferlein 509de593e6 Removed a compiler warning. 2018-12-31 01:42:55 +01:00
Matthias Koefferlein 0cc340cf4f Once more being nice to picky compilers ... 2018-12-31 01:09:13 +01:00
Matthias Koefferlein b75125f7c2 Please picky compilers (once more) .. 2018-12-31 00:50:43 +01:00
Matthias Koefferlein e3279b754b Please picky compilers .. 2018-12-31 00:00:15 +01:00
Matthias Koefferlein 9c607d7663 Added a first version of the layout to netlist extraction feature 
The main entry point is RBA::LayoutToNetlist which is the
GSI binding for the layout to netlist extractor. For a first
impression about the abilities of this extractor see the
Ruby tests in testdata/ruby/dbLayoutToNetlist.rb.

The framework itself consists of many classes, specifically

- RBA::Netlist for the netlist representation
- RBA::DeviceClass and superclasses (e.g. RBA::DeviceClassResistor and
  RBA::DeviceClassMOS3Transistor) for the description of devices.
- RBA::DeviceExtractor and superclasses (i.e. RBA::DeviceExtractorMOS3Transistor or
  the generic RBA::GenericDeviceExtractor) for the implementation of the
  device extraction.
- RBA::Connectivity for the description of inter- and intra-layer connections.
 2018-12-30 22:43:56 +01:00
Matthias Koefferlein f989a85642 WIP: introduced Circuit::is_external_net 2018-12-30 18:44:30 +01:00
Matthias Koefferlein 72a140957d WIP: added test for recursive net shape retrieval 2018-12-30 18:22:45 +01:00
Matthias Koefferlein 16a2b1982d WIP: added one more level of abstraction to layout-to-netlist extraction (db::LayoutToNetlist) for easier use. 2018-12-30 17:53:46 +01:00
Matthias Koefferlein b512f628bc WIP: specific device extractor and GSI binding. 2018-12-30 14:54:59 +01:00
Matthias Koefferlein ec7ab8e01d WIP: moved code. 2018-12-30 14:15:58 +01:00
Matthias Koefferlein c841b84867 WIP: some minor refactoring. 2018-12-30 13:37:52 +01:00
Matthias Koefferlein a787204e77 WIP: connect and disconnect terminal by name in GSI 2018-12-30 13:28:11 +01:00
Matthias Koefferlein 293c6f496e WIP: more query functions for netlist classes (i.e. net by name, device by name etc.), some refactoring, GSI bindings, tests. 2018-12-30 13:00:03 +01:00
Matthias Koefferlein 425acda31a WIP: GSI binding of device extractor classes. 2018-12-30 11:32:33 +01:00
Matthias Koefferlein c571535e55 WIP: standard device classes, added GSI binding plus tests. 2018-12-29 23:48:31 +01:00
Matthias Koefferlein 44b5b2742e WIP: tests for specialized device classes and device combination 2018-12-29 22:58:29 +01:00
Matthias Koefferlein 45b35f3aae WIP: to_string for netlist, tests, some bugfixes on device combination. 2018-12-29 22:18:58 +01:00
Matthias Koefferlein edbafae43e WIP: make top level pins for named nets and netlist purging. Tests. 2018-12-29 20:50:35 +01:00
Matthias Koefferlein 54adb84e27 WIP: locking of netlist for better performance. 2018-12-29 01:04:48 +01:00
Matthias Koefferlein d57ede441c WIP: netlist topology - children, parents, top-down and bottom-up iteration. 2018-12-29 00:48:28 +01:00
Matthias Koefferlein 2f48479838 WIP: a bit of simplification, renaming of methods, parents for subcircuits, devices. References for circuits pointing to subcircuits. 2018-12-28 22:51:11 +01:00
Matthias Koefferlein a5b9cbfe5b WIP: device extractor now declares it's layers, passing layers by name supported now. 2018-12-28 01:53:27 +01:00
Matthias Koefferlein c665d6aceb WIP: introduced error messaging for device extractor. 2018-12-28 01:06:17 +01:00
Thomas Ferreira de Lima fcc05d5b9d
Bugfix: gsi method db Technology.load pointing to save 2018-12-27 16:26:46 -05:00
Matthias Koefferlein 411c18cdb4 WIP: also test parameter extraction in device extraction test. 2018-12-27 21:06:35 +01:00
Matthias Koefferlein 473c90f99d WIP: some refactoring: splitting of big methods, documentation 2018-12-27 19:06:16 +01:00
Matthias Koefferlein 1c41c43b95 WIP: rename netlist extractor test. 2018-12-27 10:58:48 +01:00
Matthias Koefferlein d6473b4d84 WIP: moved netlist extractor into right place. 2018-12-27 10:57:46 +01:00
Matthias Koefferlein 8b2902c31b WIP: introduced expanded net name 2018-12-27 10:43:25 +01:00
Matthias Koefferlein 639b0026d3 WIP: some refactoring for better consistency and easier usage of the device extractor. 2018-12-27 10:33:08 +01:00
Matthias Koefferlein bfae347ffb WIP: renaming sub_circuit->subcircuit for consistency 2018-12-27 02:02:17 +01:00
Matthias Koefferlein f0f620b1cd WIP: added subcircuit IDs for easier referencing. 2018-12-27 01:58:34 +01:00
Matthias Koefferlein 795a77f7ce WIP: take care of the property name used for device terminal annotation. 2018-12-27 01:39:28 +01:00
Matthias Koefferlein 62ffcd38e6 WIP: refactoring of the netlist property thing. Now it's internal and there is only the device terminal property. The property also does not store device pointers but just IDs 2018-12-27 01:27:58 +01:00
Matthias Koefferlein f5071d3254 WIP: some more refactoring. 2018-12-27 01:03:52 +01:00
Matthias Koefferlein 2171b98bd8 WIP: introduced device IDs 2018-12-27 00:59:44 +01:00
Matthias Koefferlein 724d1bc255 WIP: some small refactoring. 2018-12-27 00:32:40 +01:00
Matthias Koefferlein 7e4868dcf8 WIP: some small refactoring. 2018-12-27 00:28:44 +01:00
Matthias Koefferlein 8f568641e0 WIP: some refactoring, added label recognition to net extraction, test enhancements. 2018-12-27 00:20:21 +01:00
Matthias Koefferlein 024907e7ef WIP: first test for device extraction. 2018-12-26 10:02:34 +01:00
Matthias Koefferlein 1db5ad016c WIP: added first tests for device extraction. 2018-12-26 00:39:46 +01:00
Matthias Koefferlein f342bdd83a WIP: added some convenience methods. 2018-12-26 00:39:34 +01:00
Matthias Koefferlein ec65d293e3 WIP: moved some GSI specific methods into the C++ classes because they are of general use. 2018-12-26 00:38:35 +01:00
Matthias Koefferlein bfc0e24d50 WIP: fixed some compiler warnings. 2018-12-26 00:36:34 +01:00
Matthias Koefferlein 5c18424c10 WIP: fixed a comment typo. 2018-12-26 00:36:19 +01:00
Matthias Koefferlein c75a41a1a4 WIP: fixed verbosity of some output. 2018-12-26 00:34:57 +01:00
Matthias Koefferlein 88c60420d0 WIP: fixed verbosity of some output. 2018-12-26 00:34:34 +01:00
Matthias Koefferlein 195324295d WIP: tests for new net predicates. 2018-12-25 20:56:08 +01:00
Matthias Koefferlein 3d9712c53a WIP: implementation of device class and GSI bindings. Added some network attributes and predicates (is_floating, is_internal, pin_count, terminal_count) 2018-12-25 20:46:06 +01:00
Matthias Koefferlein 4f8416766c WIP: renamed port -> terminal for devices. This is correct technical term. A port is a two-terminal entity. 2018-12-25 20:19:37 +01:00
Matthias Koefferlein 9c9d99da7c WIP: introduced device combination support hints. 2018-12-25 19:45:34 +01:00
Matthias Koefferlein a7a2eea905 WIP: MOS3 and MOS4 devices 2018-12-25 19:41:29 +01:00
Matthias Koefferlein 33e2fb8dc1 WIP: refinement of device extraction algorithm 2018-12-25 02:17:41 +01:00
Matthias Koefferlein 97a1abb73f WIP: implementation of basic device classes, device extractor. 2018-12-25 02:02:18 +01:00
Matthias Koefferlein 792a420e23 WIP: purge_nets and combine_devices for db::Netlist, GSI bindings. 2018-12-25 00:25:07 +01:00
Matthias Koefferlein d9b0b2f775 WIP: Ability to redefine device combination in Ruby (GenericDeviceClass) 2018-12-24 17:22:59 +01:00
Matthias Koefferlein 764667d8e8 WIP: added algorithm for combining devices - needs testing. 2018-12-24 16:55:22 +01:00
Matthias Koefferlein e3b795e334 Unique ID of device class objects, netlist reference in device class. 2018-12-24 13:52:17 +01:00
Matthias Koefferlein eb6b043c3b Parameter values of db::Device/db::DeviceClass 2018-12-24 13:39:19 +01:00
Matthias Koefferlein c5222c26e3 Added DevicePortProperty class with tests and GSI binding 2018-12-24 01:31:06 +01:00
Matthias Koefferlein aa5e885215 Added Ruby tests for GSI binding of db::Netlist classes 2018-12-24 00:08:34 +01:00
Matthias Koefferlein 3c2c72d9ed WIP: GSI binding of db::Netlist at al 2018-12-23 22:31:26 +01:00
Matthias Koefferlein 9a9482d7c7 Added netlist editing features. 2018-12-22 23:12:45 +01:00
Matthias Koefferlein e51a3a9ed9 Dual netlist representation (nets attached to pins and ports). 2018-12-22 00:29:44 +01:00
Matthias Koefferlein 654afa3ec2 Upward references for db::Net and db::Circuit. 2018-12-21 22:13:37 +01:00
Matthias Koefferlein 83a38037e5 Added cluster_id property to db::Net 2018-12-21 21:53:48 +01:00
Matthias Koefferlein 80999475f4 Added trans and name attributes to db::SubCircuit 2018-12-21 21:47:27 +01:00
Matthias Koefferlein 4dd17c3cd4 WIP: added tests for dbNetlist classes. 2018-12-20 23:29:01 +01:00
Matthias Koefferlein 18346945df WIP: some refactoring. 2018-12-20 22:11:20 +01:00
Matthias Koefferlein d78a25efe4 WIP: new classes for netlist representation. 2018-12-19 23:41:39 +01:00
Matthias Koefferlein 2c4e84fdf2 WIP: netlist property framework 
- NetlistProperty is the base class for objects that can
  be attached to shapes for annotation
- First property type implemented: net name is a way
  to annotate net names
 2018-12-18 23:56:01 +01:00
Matthias Koefferlein c10dfee984 Merge branch 'dvb' of https://github.com/klayoutmatthias/klayout into dvb 2018-12-17 20:31:34 +01:00
Matthias Koefferlein 7ceb4ed076 Fixed an issue with the deep region: the layout pointer is not a good key for the backannotation cache. So we better use the unique ID - a concept introduced herein. 2018-12-17 20:31:24 +01:00
Matthias Koefferlein 69d75e233d Enabled build without qt, Ruby and Python 2018-12-16 23:50:34 +00:00
Matthias Koefferlein ef0e0d38c2 WIP: property collection in net clusters, more tests. 2018-12-09 23:24:32 +01:00
Matthias Koefferlein eb8abaf5a5 Some refactoring of net processor 
- introduced concept of root cluster
- recursive shape iterator for clusters
 2018-12-09 00:54:08 +01:00
Matthias Koefferlein df44c364ea WIP: network processor: net backannotation into original hierarchy. 2018-12-08 01:55:02 +01:00
Matthias Koefferlein 6a2ddcda82 Net processor: Added timing, rearrangement as preparation for parallelization 2018-12-07 23:21:38 +01:00
Matthias Koefferlein e894724605 Some more debugging and more test cases. Net processor starts getting stable ... 2018-12-05 23:14:06 +01:00
Matthias Koefferlein 6849a2723d WIP: added test cases for multi-level cross-hierarchy interactions. 2018-12-04 23:33:04 +01:00
Matthias Koefferlein 10f7750a89 WIP: more tests, some debugging. 2018-12-04 23:21:19 +01:00
Matthias Koefferlein 37fad6da97 WIP: hier network processor - some debugging, more tests. 2018-12-04 22:30:18 +01:00
Matthias Koefferlein 42f153672b WIP: proceed with debugging of hier network processor 2018-12-03 23:02:01 +01:00
Matthias Koefferlein 5a48ac3974 WIP: some refactoring, joining of clusters by child clusters. Needs testing. 2018-12-03 22:05:54 +01:00
Matthias Koefferlein e8c86834cb WIP: hier network - a first testcase. 2018-12-03 00:17:04 +01:00
Matthias Koefferlein 1e4b2b414e WIP: built test bench 2018-12-02 23:58:47 +01:00
Matthias Koefferlein 7e36018356 WIP: hierarchical net clusters - some testing 2018-12-02 23:05:58 +01:00
Matthias Koefferlein 22651b83c0 WIP: hierarchical net clusters - needs testing 2018-12-02 22:39:53 +01:00
Matthias Koefferlein 0e4eab2dce WIP: hierarchical net clusters. 2018-12-02 22:26:03 +01:00
Matthias Koefferlein f7f9f4f1fc WIP: hier network processor: local cluster set 2018-12-02 12:55:54 +01:00
Matthias Koefferlein e918cc74b0 WIP: tests for cluster in hierarchical network processor. 2018-12-02 10:41:37 +01:00
Matthias Koefferlein 59d1aead59 WIP: new classes for hier network processor. 2018-12-02 01:30:56 +01:00
Matthias Koefferlein 3609bdda81 WIP: first steps for network processor. 2018-12-01 09:38:16 +01:00
Matthias Koefferlein 970f22960f WIP: enabled tests in editable mode too. 2018-11-28 00:00:06 +01:00
Matthias Koefferlein 6e52c37a1e WIP: Fixed another build issue (ambiguous overload) 2018-11-26 22:28:29 +01:00
Matthias Koefferlein 345ff27854 Fixed a small build issue (ambiguous parameters) 2018-11-26 21:29:09 +01:00
Matthias Koefferlein 5c7cd02af3 Merge remote-tracking branch 'remotes/origin/pymod' into net-extract 2018-11-25 23:16:56 +01:00
Matthias Koefferlein 0352a450b7 Refined solution for #198 2018-11-25 22:43:13 +01:00
Matthias Koefferlein f4b2a015dc Fixed #198 (DXF contour stitching renders fuzzy polygons) 2018-11-22 22:19:46 +01:00
Matthias Koefferlein 7073a74aa5 WIP: More on deep regions & hier processor 
- Splitting of shapes on output of booleans
- A bugfix: error happened when pulling intruders from second-next hier level
- Tests added
- Some TODO comments added
 2018-11-22 01:26:03 +01:00
Matthias Koefferlein 06c11d0096 WIP: Deep region XOR implemented. 2018-11-21 00:32:14 +01:00
Matthias Koefferlein 712a390f52 WIP: added ref counting for deep shape layers and layouts 2018-11-21 00:17:14 +01:00
Matthias Koefferlein fc729fc830 WIP: DeepRegion::add implemented. 2018-11-18 09:58:10 +01:00
Matthias Koefferlein cfa0e8431c WIP: implemented AND/NOT in deep region, added tests. 2018-11-17 01:33:58 +01:00
Matthias Koefferlein a438dfd6f0 WIP: deep region debugged, GSI binding, tests. 2018-11-17 00:16:13 +01:00
Matthias Koefferlein f5cc8b6018 WIP: added DeepRegion 2018-11-16 01:11:28 +01:00
Matthias Koefferlein f29fd3dfc6 WIP: moved hierarchical processor into db. 2018-11-15 23:41:44 +01:00
Matthias Koefferlein 04256a2753 WIP: fixed RecursiveShapeIterator unit tests. 2018-11-15 22:59:38 +01:00
Matthias Koefferlein 3f8825cfd1 WIP: Improved design of HierarchyBuilder, added tests. 2018-11-15 22:50:02 +01:00
Matthias Koefferlein 6f4988a764 WIP: first version hierarchy builder 2018-11-14 02:22:53 +01:00
Matthias Koefferlein 2bfccca462 WIP: enhanced recursive shape iterator's push mode. 2018-11-13 23:40:08 +01:00
Matthias Koefferlein f346e70746 RecursiveShapeIterator now features a push mode 
This will eventually enable catching a hierarchy
skeleton (with shapes) from a RecursiveShapeIterator.
 2018-11-12 23:44:26 +01:00
Matthias Koefferlein c91f54569a Provide GSI bindings for the new edge pair support 
This affects Shapes and Shape. New methods from EdgePairs are added
and minor enhancements of Region and Edges. Ruby tests added
 2018-11-10 22:41:40 +01:00
Matthias Koefferlein 255abc5534 Provided new explicit template instantiations required for DRC 2018-11-10 00:44:30 +01:00
Matthias Koefferlein 7a37da91e0 EdgePairs refactoring 
- Uses a db::Shapes container
- Aligned with db::Edges and db::Region
- With original layer delegate
 2018-11-10 00:07:53 +01:00
Matthias Koefferlein 8e19474095 Introduced edge pairs as valid shapes for db::Shapes 2018-11-09 22:59:26 +01:00
Matthias Koefferlein b9b00a08b5 Many bug fixes after refactoring. 2018-11-09 01:14:22 +01:00
Matthias Koefferlein ec638c87b4 Refactoring of Edges - compiles again. 2018-11-09 00:39:00 +01:00
Matthias Koefferlein 0a9ab32f81 WIP: fixed initialization code. 2018-11-07 23:08:52 +01:00
Matthias Koefferlein de6045fdf0 Fixed an initialization issue. 2018-11-07 22:20:57 +01:00
Matthias Koefferlein 009492a2a6 Fixed a linker issue. 2018-11-07 22:19:05 +01:00
Matthias Koefferlein 8107e1bb51 Refactoring: separated sources for db::Region 2018-11-07 22:17:51 +01:00
Matthias Koefferlein 885a440089 Further refactoring: provide adressable polygons. 2018-11-07 02:44:15 +01:00
Matthias Koefferlein 9c92a9c72e Region refactoring: many unit tests are passing again. 2018-11-07 00:45:29 +01:00
Matthias Koefferlein e595c32fe1 WIP: made first unit tests functional again. 2018-11-06 00:51:39 +01:00
Matthias Koefferlein f604d149b5 WIP: next part of region refactoring. 2018-11-05 00:32:04 +01:00
Matthias Koefferlein 7062c4acf5 WIP: next part of region refactoring. 2018-11-05 00:25:16 +01:00
Matthias Koefferlein 5a5051b0dd WIP: second part of region refactoring. 2018-11-04 23:26:08 +01:00
Matthias Koefferlein 54945105ef WIP: first part of region refactoring. 2018-11-04 22:56:08 +01:00
Matthias Koefferlein 3392c08d36 Merge branch 'pymod' into net-extract 2018-10-09 23:43:58 +02:00
Matthias Koefferlein a7846ead9f Add-on to previous commit: fixes some Python issues 
The comments for LoadLayoutOptions#layer_map, #cif_layer_map
and #dxf_layer_map have been updated to reflect the new status
of these properties (which have been methods). The tests
are updated accordingly (layer_map() -> layer_map).
 2018-10-09 00:18:45 +02:00
Matthias Koefferlein db981b0f7d A huge patch to make Windows build functional again after recent updates 
The issue was: for MacOS/clang, the virtual format-specific
option structs had to be embedded in one compile unit (for RTTI).
In Windows this will lead to link errors since the DLL is not
reachable at build time for the generic reader/writer configuration in
the buddy tools.

The solution is to use GSI methods (provided for scripting) to
set the reader/writer options in a generic way that does not
require linking against the plugin DLLs.
 2018-10-08 23:31:22 +02:00
Matthias Koefferlein 121ec46390 Attempt to introduce multithreading into hierarchical processor 
However, performance does not scale well currently.
 2018-10-08 00:10:54 +02:00
Matthias Koefferlein f7c4aa0348 (Partial) attempt to fix the plugin detection issue on MacOS 2018-10-02 17:36:30 -07:00
Matthias Koefferlein c75e67268b Merge branch 'pymod' into net-extract 2018-09-26 21:40:23 +02:00
Matthias Koefferlein 6795de1dbb Merge remote-tracking branch 'remotes/origin/master' into pymod 
Provides fixes for issue #166 and #172.
 2018-09-26 21:15:08 +02:00
Matthias Koefferlein a551300e0d WIP: Some refactoring (hier processing in extra file), unit tests, bug fixes 2018-09-22 22:32:36 +02:00
Matthias Koefferlein 3214200e17 WIP: code factory 2018-09-22 02:45:56 +02:00
Matthias Koefferlein b25401c254 Added twofold-typed box scanner. 2018-09-20 23:44:51 +02:00
Matthias Koefferlein 6efdb3a9e1 Added testcase for #166. 2018-09-17 01:51:23 +02:00
Matthias Koefferlein f72fda7bae Added test case for #166. 2018-09-17 01:48:31 +02:00
Matthias Koefferlein e9de4252fb Fixed #166 (internal error when writing GDS file) 
This fix consists of computing the intersection
points in the split procedure with higher resolution
to avoid topology changes due to snapping on the cut
line.
 2018-09-17 01:29:31 +02:00
Matthias Koefferlein c46bed0785 Some update to fix build issues (this time, Linux) 
- All platforms support native hash values for long long etc.
  with the TR1 containers
- Use non-static, function symbols to force linking.
- Debian package is picky about dates so give them some
  in Changelog.
 2018-09-10 21:56:20 +02:00
Matthias Koefferlein ad03533a7b OASIS tests made robust against hash implementation 
The text writer was made "normalizing": it will introduce
a certain element order (string sorting). This way, OASIS
files can be compared against golden data without
changes in the order due to different implementation of
hash containers.
 2018-09-10 01:16:49 +02:00
Matthias Köfferlein 28f8a1ee7d Merge branch 'pymod' into pymod-msvc 2018-09-07 22:56:22 +02:00
Matthias Köfferlein a4562bee71 Also fixed issue with hash value of LayerProperties 2018-09-07 22:39:12 +02:00
Matthias Köfferlein c53c3ae7cf Hash value issue with db::Text fixed. 2018-09-07 22:29:54 +02:00
Matthias Köfferlein 1bf4d95388 Further MSVC compatibility 
String assertions fixed, numerical issue with dbTrans fixed, iterator 
assertions fixed.
 2018-09-02 19:18:42 +02:00
Matthias Köfferlein 356a468d66 A couple of changes to make MSVC work - not done yet. 2018-09-02 00:40:35 +02:00
Matthias Koefferlein c9771f54eb Merge branch 'master' into pymod 2018-09-01 09:37:08 +02:00
Matthias Köfferlein af50c0f0c3 Many warnings fixed for MSVC 2018-08-29 01:46:18 +02:00
Matthias Köfferlein 860014e3ae MSVC builds for the first time - still a lot of patches required 
Some suspicious compiler warnings remain.
 2018-08-28 23:19:58 +02:00
Matthias Koefferlein bcd6c466fb Fixed #152 (shape count wrong) 2018-08-13 09:30:46 +02:00
Matthias Köfferlein 23d715001b First steps towards enablement of MSVC2017 for pymod. A lot of things to TODO yet ... 2018-08-04 18:02:39 +02:00
Thomas Ferreira de Lima cfbcc158bf
adding / and /= operators to Point and Vector types in db [ci skip] 2018-08-02 00:45:34 -04:00
Thomas Ferreira de Lima a3234e2645
changing dbHash macro from __APPLE__ to __EXT_HASH_DEPRECATED 2018-08-01 22:31:09 -04:00
Thomas Ferreira de Lima f6d3995d6b
changing ext/hash_(set|map) to unordered_(set|map) to avoid deprecation warning on mac. 2018-08-01 15:51:05 -04:00
Matthias Koefferlein ddfb084a8d Bugfix: also recognize plugins when the main binary is installed in a different place than the libs. 2018-07-29 14:56:19 +02:00
Matthias Koefferlein 98ecc9e47b Fixed a typo, force update of unit tests on Jenkins. 2018-07-29 14:07:02 +02:00
Matthias Koefferlein 3fb568671d A little refactoring - central place for DLL/.so path detection 2018-07-29 10:20:48 +02:00
Matthias Koefferlein 11627486d6 More verbose messages on plugin loading. 2018-07-29 02:36:25 +02:00
Matthias Koefferlein c9859b4f8f Fixed some issues with long int emulation. Using long int as substitute for __int128 2018-07-24 22:08:30 +02:00
Matthias Koefferlein 8578918764 Updated PolygonTools test with recent edge processor update. 2018-07-23 20:28:01 +02:00
Matthias Koefferlein 6b48b2bb3d Fixed Edge unit tests. 2018-07-23 19:37:36 +02:00
Matthias Koefferlein f05b3249ca Fixed fast EdgeProcessor unit tests with recent update. 2018-07-23 19:36:00 +02:00
Matthias Koefferlein 2178b72704 Refined test for 74 issue for different orientations. 2018-07-23 19:12:12 +02:00
Matthias Koefferlein 5741a120e9 More precise point/edge interaction for scanner 2018-07-22 22:52:04 +02:00
Matthias Koefferlein efd9e47c1f Attempt to fix a scanline issue. 2018-07-22 18:49:17 +02:00
Matthias Koefferlein 20d1d0500f Fixed #142 (Issue with RBA::RecursiveShapeIterator#region=) 2018-07-12 21:16:14 +02:00
klayoutmatthias 616c2942e1 WIP: made pymod functional on Windows (without Qt). Tests pass. 2018-07-10 23:34:30 +02:00
Matthias Koefferlein 772062e33e WIP: fixed path generation in db::init in non-Qt case. 2018-07-09 00:43:49 +02:00
Matthias Koefferlein 260243a6d9 WIP: Fixed PCB import for non-Qt builds, added missing file. 2018-07-08 23:44:36 +02:00
Matthias Koefferlein 3acb7b6920 Fixed documentation (XML parser error) of RBA::TextGenerator. 2018-07-06 00:58:26 +02:00
Matthias Koefferlein 2b64c4bf82 Bugfix: multithread-safety for gsi::Proxy (required for the tiling processor use case). 2018-07-06 00:56:34 +02:00
Matthias Koefferlein 803a29037a Added test for reproducing threading issue on TP 2018-07-06 00:09:22 +02:00
Matthias Koefferlein bbfcd9cf9e Made normal build work again. 2018-07-03 01:49:06 +02:00
Matthias Koefferlein a82adbbe83 Massive reduction of Qt dependencies, but also massive refactoring. 2018-07-03 00:51:36 +02:00
Matthias Koefferlein 239b7ca3ff First (major) steps towards a Qt-less basic build. 2018-07-02 18:20:20 +02:00
Matthias Koefferlein 94387529d6 Fixed #134 
The issue was caused by an internal error in the edge processor.
Effectively the weak attractor scheme was causing this problem.
As the weak attractors are making things worse rather than
better I dropped them.

In theory, the weak attractors render an edge undisturbed by
neighboring intersection points, but in cases or parallel edges
this lead to problems: omitting cut points violates the output
edge configuration warranties the the polygon stitcher fails.

In addition, to maintain the solution for bug #74, the cut point
capture condition was relaxed, so that edge crossing the exact
corner of the snapping rectangle of a point are not considered
captured.
 2018-06-26 01:04:20 +02:00
Matthias Koefferlein da65851ee2 Public declaration of path::to_string 2018-06-24 14:11:23 +02:00
Matthias Koefferlein f7843410a0 Public declaration of path template instantiation 2018-06-24 14:08:31 +02:00
Matthias Koefferlein 4c90d98750 WIP: Fixed windows build. 2018-06-17 10:27:54 +02:00
Matthias Koefferlein 7e56ce23e5 WIP: Moved net tracer into plugin, GSI is now in db module. 2018-06-16 00:56:35 +02:00
Matthias Koefferlein 9e972876fe WIP: correctly assigned db module to technology in GSI 2018-06-15 01:02:26 +02:00
Matthias Koefferlein 41cedf4b45 WIP: fixed the technology refactoring part 2018-06-15 00:59:38 +02:00
Matthias Koefferlein 10cfac3d42 WIP: fixed linker issues. 2018-06-15 00:31:46 +02:00
Matthias Koefferlein c360f6d4a7 WIP: first steps for making technology a db component. 2018-06-14 23:38:23 +02:00
Matthias Koefferlein 5421f77e61 WIP: finished refactoring to plugins for CIF, DXF & OASIS too. 2018-06-13 22:23:27 +02:00
Matthias Koefferlein 9883ea5679 WIP: added streamers plugin structure (partially) 2018-06-13 21:39:39 +02:00
Matthias Koefferlein 77f0197f8a WIP: fixed test framework. 2018-06-13 00:43:54 +02:00
Matthias Koefferlein 409392d561 WIP: started refactoring the plugin structure. Goal: standalone db module with it's own plugins like LEF/DEF, Gerber, MEBES including GSI bindings. 2018-06-13 00:33:43 +02:00
Matthias Koefferlein 3b5e84a5b2 Fixed documentation of RBA::TextGenerator. 2018-06-04 23:11:02 +02:00
Matthias Koefferlein 655e59d11a WIP: Fixed build dependencies and code dependencies for Python modules (Qt5) 2018-06-03 19:54:18 +02:00
Matthias Koefferlein 0e29c997f6 WIP: refactoring, fixed documentation and some mistakes. 2018-05-31 01:11:24 +02:00
Matthias Koefferlein c30d52c801 WIP: fixed a lot of compiler issues after last refactoring. 2018-05-30 01:00:13 +02:00
Matthias Koefferlein f74f2d3416 Fixed bug #121 (reopening of PCell's in GDS and - partially - in OASIS) 2018-05-17 22:24:32 +02:00
Matthias Koefferlein 89b4397aa4 Fixed some doc typos. 2018-04-28 00:32:23 +02:00
Matthias Koefferlein ff9be6219d Fixed some doc typos. 2018-04-28 00:31:41 +02:00
Matthias Koefferlein c94723bbce New RBA/pya methods 
More Shapes#insert flavours with Shapes and RecursiveShapeIterator,
RecursiveShapeIterator#dtrans.
 2018-04-28 00:21:36 +02:00
Matthias Koefferlein 08bcd1e418 Fixed #117 (DTrans#itype broken) 2018-04-24 21:26:21 +02:00
Matthias Koefferlein a4b396535f Fixed #116 (polygon cutting issue) 
Last step: polygon cut algorithm with fallback: merge before cut on invalid polygons.
 2018-04-24 20:58:00 +02:00
Matthias Koefferlein 9622a2e669 WIP: added testcases for extreme polygon decomposition on GDS writing. 2018-04-24 19:28:45 +02:00
Matthias Koefferlein e183323d9a WIP: new version of polygon cut algorithm which is simpler and more stable. 2018-04-24 01:09:28 +02:00
Matthias Koefferlein ca9a6db8a5 Scanline polygon generator: avoid spikes 
The implementation of the scanline polygon generator
will avoid spikes as hole cutlines. Helps
fixing #116.
 2018-04-23 22:22:32 +02:00
Matthias Koefferlein e710b28a6d FEATURE: added RBA::Polygon#split, RBA::Polygon#split, RBA::DSimplePolygon#split, RBA::DSimplePolygon#split 2018-04-20 22:26:57 +02:00
Matthias Koefferlein 34b534e8b4 Fixed memory statistics for polygons. 2018-04-19 00:13:28 +02:00
Matthias Koefferlein 067d52a269 FEATURE: DXF accuracy and "keep layer names" feature 
* "keep layer name" will not try to modify layer names into
  GDS layer/datatypes. The feature is available in the DXF
  reader options and for the buddy scripts as "--keep-layer-names"
  It applies to CIF too.
* "contour accuracy": when merging lines into contours, this
  accuracy is applied to find neighbors. By default this value
  is 0. If set to a value >0, points with distances (square
  metrics) less than this value will be connected.
  The buddy script option is --dxf-contour-accuracy=value.
 2018-04-18 23:34:59 +02:00
Matthias Koefferlein 86a90571e6 WIP: DXF keep layer names option, refactoring, added tests, UI, XML serialization. 2018-04-16 19:47:12 +02:00
Matthias Koefferlein 085a2ee2b1 WIP: keep DXF and CIF layer names, DXF contour accuracy. 2018-04-16 00:55:57 +02:00
Matthias Koefferlein 1b0317c120 Memory statistics: demangle symbol names. 2018-04-15 01:19:28 +02:00
Matthias Koefferlein e1922da3b2 Better memory statistics. 2018-04-15 00:54:30 +02:00
Matthias Koefferlein 4acc336d69 Fixed DXF display issue (see https://www.klayout.de/forum/comments.php?DiscussionID=1053) 2018-04-11 22:53:55 +02:00
Matthias Koefferlein 256de9bc84 Small DXF bugfix: persist name of subcells of cell variants. 2018-04-11 21:52:23 +02:00
Matthias Koefferlein d3227b5bda Merge branch 'master' of https://github.com/Kazzz-S/klayout 2018-04-07 16:02:39 -07:00
Matthias Koefferlein da1daae1d8 Fixed #107 (Undo not working with shapes) 2018-04-07 16:00:37 -07:00
Matthias Koefferlein 829966d9a1 Fixed #108 (Box#enlarge, Box#move on empty boxes) 2018-04-07 09:21:50 +02:00
Matthias Koefferlein 3d5780db2b Bugfix #109 (part 3): OASIS/GDS writer fixed + unit test added. 2018-04-06 23:27:29 +02:00
Matthias Koefferlein 415d52f35d Fixed some issues found by Coverity scan. 2018-03-19 18:24:09 +01:00
Matthias Koefferlein 802237141b Fixed #90 (DRC issue with 'extended' and joined = true) 2018-03-12 00:47:04 +01:00
Matthias Koefferlein 5f4e715dcf Fixed #77 (copy_tree should work in non-editable mode too) 2018-02-21 07:47:41 +01:00
Matthias Koefferlein 2f46f0d1c6 Fixed some issues found with Coverity. 2018-02-21 00:21:19 +01:00
Matthias Koefferlein 6052a04429 A few enhancements and unit tests for PCells 
This commit adds unit tests for implementation helper-based
PCells in Python and Ruby.
 2018-02-17 01:26:25 +01:00
Matthias Koefferlein f6f75cd791 A small rework of the Python PCell helpers 
The aim of this rework was to enable PCell implementations
that use the basic methods rather than the "_impl" variants.
For the latter, potential variable name clashes happen when
parameters are called "cell", "layout", "layer" or similar.

New methods enable implementation on the level of the
non-"impl" methods. For example:

  def produce(self, layout, layers, parameters, cell):
    self.init_values(parameters, layers)
    ...
    self.finish()
 2018-02-13 00:59:11 +01:00
Matthias Koefferlein 12bb664a80 Fixed the default implementation of transformation_from_shape in Python 2018-02-13 00:09:54 +01:00
Matthias Koefferlein 6d0fe85425 Fixed #75 (Python PCell issue when parameters are called 'layer') 
This commit
- Ignores exceptions when checking for PCells that accept shapes.
  Hence a single rogue one does not break the feature.
- Prevents errors when parameters named "layer" are present
  by making the implementation safe against this case.
- In addition, guiding shape parameters of type "Path", "Box" etc.
  (i.e. integer types) are supported too although they are
  not recommended for portability.
 2018-02-11 00:34:28 +01:00
Matthias Koefferlein d6adadcad4 Added file source to 'stream has unknown format' message. 2018-02-09 22:56:03 +01:00
Matthias Koefferlein 6df645a917 Fixed #74 (small-corner boolean issue). Tests need update 2018-02-08 23:12:58 +01:00
Matthias Koefferlein 363c0c9fed Fixed #73 (allow 'change layers' on PCells which support a single layer parameter) 2018-02-06 22:51:06 +01:00
Matthias Koefferlein 808159bcab Fixed #72 (Edges/Region NOT issue) 2018-02-01 22:35:47 +01:00
Matthias Koefferlein 23c2ae7306 Fixed #69 (DRC: 'inside' does not merge shapes of second input) 2018-01-30 00:40:17 +01:00
Matthias Koefferlein 04b4c21e82 Fixed #68 (OASIS reader issue with degenerated shapes) 2018-01-24 21:21:02 +01:00
Matthias Koefferlein 53328d1767 Merge branch 'macos-build' from kazzz 2018-01-14 17:29:59 +01:00
Matthias Koefferlein ed945a28d4 Fixed #63 (wrong output on DRC non_interacting with empty second input) 2018-01-10 23:20:34 +01:00
Matthias Koefferlein 2de6b691b4 64bit coordinate support enhanced 
- int128 to string support for output
- unit tests
- some compiler issues fixed
 2018-01-10 22:12:55 +01:00
Matthias Koefferlein 02f84181f5 Merge remote-tracking branch 'origin/macos-build' into macos-build 2018-01-07 11:24:54 -08:00
Matthias Koefferlein ef67790d2c Implemented #54 (more typeinfo visibility) 2018-01-02 16:24:31 -08:00
Matthias Koefferlein 8003d1bb47 Merge branch 'master' into macos-build-on-master 2018-01-02 23:37:45 +01:00
Matthias Koefferlein ffb56335fb Updated copyright note to 2018. 2018-01-01 21:08:06 +01:00
klayoutmatthias 7e0f1522ac Windows build compatibility 
The issue is with "dllexport": previously, dllexport was present on
exposed templates tool (= visibility(default) for gcc/clang). This
ensured MacOS compatibility since then the typeinfo is corretly
shared and dynamic_cast/typeid works.

For Windows, the "dllexport" equivalent requires the template
instantiations to be declared "external" which is a coding nightmare.

The solution is to provide separate macros for real (non-specialized,
not explicitly instantiated) templates (.._PUBLIC_TEMPLATE) which
is defined as empty for Windows and "visiblity(default)" for gcc/clang.
 2018-01-01 18:55:11 +01:00
Matthias Koefferlein 93572a8f0b Fixed dbEdges iterator (ported fix of dbRegion iterator for MacOS/clang to dbEdges too) 2017-12-30 17:15:24 -08:00
Matthias Koefferlein 167df7eae6 Fixed a unit test bug - the dbCell test was working by coincidence on other systems. 2017-12-30 16:46:49 -08:00
matthias 063811edc4 Solved the clang/MacOS startup failure and menu issue 
1.) Startup issue:

This is solved by making sure templates with virtual functions
are made visible in the DSO. This way, dynamic_cast is possible
across DSO's.

Scary: clang/MacOS wants the forward declarations be declared visible as well.

2.) Menu issue:

The best solution is to have only one QMenuBar. The navigator
now gets a synthetic menu bar composed of QToolButtons.
 2017-12-30 15:22:16 -08:00
Matthias Koefferlein 4855231342 Fixed #40 (Crash in Python binding) 
Plus the same effect was observed for Ruby and fixed there as well.
 2017-12-21 00:55:40 +01:00
Matthias Koefferlein 6f66e04c8e Fixed #41 (Polygon#touches? method) 2017-12-20 22:55:15 +01:00
Matthias Koefferlein 4f3c745790 Updated the wording of some documentation texts and fixed some errors there. 2017-12-20 22:11:42 +01:00
Matthias Koefferlein 0c25e8cab1 Maybe fixed a linker issue (db::GDS2Writer vtable not found) 2017-12-12 23:23:13 +01:00
klayoutmatthias b49db04fb4 Fixed MacOS build 
The LLVM STL implementation does not recognize "typedef void iterator_traits"
as dummy declaration. It will fall back to an empty traits struct.
Using the default "forward_iterator_tag" for the iterator_traits solves
this compile issue.
 2017-12-12 00:21:16 +01:00
Matthias Koefferlein be80682853 Fixed #29 (permissive mode for OASIS writer on odd-width paths) 
This commit adds "permissive" mode to OASIS writer to allow
odd-width paths (which are rounded).

This commit contains in addition:
 * The check for odd-width paths is done post-scaling, so
   reducing the DBU is a workaround
 * Unit tests for the RBA binding of SaveLayoutOptions
 * Documentation updates on some SaveLayoutOptions attributes
 * Using Ruby predicate notation for cif_blank_separator?
   (note question mark) for consistency. The old notation is
   still there but deprecated
 * --permissive option on buddies command lines where applicable
 2017-11-29 22:34:41 +01:00
Matthias Koefferlein c1e501197c #28 fixed (CIF file format detection fails) 2017-11-28 23:24:38 +01:00
Matthias Koefferlein 4dbe28e9fa MacOS build fix. 2017-11-26 22:50:35 +01:00
Matthias Koefferlein dbc5079bb4 More robustness for PCell declarations on mutable parameter declarations. 2017-11-02 07:37:05 +01:00
Matthias Koefferlein af1c5c9f66 Bugfix: avoid a segfault 
Reason: PCellDeclaration::parameter_declaration is volatile when
the PCell does not want parameter declaration caching. In this
case, begin .. end iterators must not be taken from different
calls to parameter_declaration for example.
 2017-11-01 22:12:49 +01:00
Matthias Koefferlein 52e893ae17 Two method aliases in RBA::Vector/DVector to provide Point compatibility 2017-10-29 19:11:50 +01:00
Matthias Koefferlein d90593df89 Added a convenience binding for vector+point 
This way, the vector/point sum is commutable.
vector+point == point+vector.
 2017-10-27 22:02:26 +02:00
Matthias Koefferlein 55aa35bc8f A little more backward compatibility plus macro name issue fixed 
* Some removed methods have been restored (and are deprecated).
* Macro names like "0.25.lym" don't render error messages during loading now
 2017-10-09 23:17:00 +02:00
Matthias Koefferlein c077feb3d5 Some refactoring of package manager, new features 
* Moved tlSystemPaths into lay namespace where it belongs
* Doc updates
* New command line switch -y and -yd for unattended installation
* Download URL's can be relative to salt.mine URL
* KLAYOUT_HOME environment variable to make ~/.klayout configurable
* Better error messages on XML parser on file/stream read errors
  (specifically from http/https)
 2017-10-03 14:19:01 +02:00
Matthias Koefferlein 2c023a7041 Fixed build on gcc's not supporting zero-length arrays. 2017-09-26 00:59:18 +02:00
Matthias Koefferlein 2fd33a289a Variable path widths for DXF reader 2017-09-26 00:28:47 +02:00
Matthias Koefferlein 501dfc25d0 Direct table access for RBA::CellMapping and RBA::LayerMapping. 2017-09-10 01:21:10 +02:00
Matthias Koefferlein 55c7b66160 Fixed Layout unit tests. 2017-09-09 19:02:37 +02:00
Matthias Koefferlein c541cdcbd6 Bugfix: redrawing issues when multiple layers are affected 
This is how to reproduce the bug: have a layout with two
layers. Select two shapes of different layers and delete them.
One layer is not updated and only after zooming/panning the
shape will disappear on this layer.
 2017-09-07 01:04:40 +02:00
Matthias Koefferlein 56b9c73015 GDS2 reader/writer: paths can now use the Multi-XY extension. 2017-09-03 23:24:50 +02:00
Matthias Koefferlein 196d3a60e7 Fixed the build with less dependencies. 2017-09-03 10:29:14 +02:00
Matthias Koefferlein cfe8375be0 Unit test refactoring 
Move ut framework to tl, so there are less complex
dependencies.
 2017-09-03 01:54:11 +02:00
Matthias Koefferlein b28317fb69 Some enhancements to layer and cell mapping 
* Modification of the mapping is possible now
  (#map used to ignore mappings if there was one
  already)
* Added DropCell mapping (also for RBA)
* Added unit tests for cell mapping, layer mapping
  db::merge_layouts, db::copy_shapes and db::move_shapes
 2017-08-30 01:11:38 +02:00
Matthias Koefferlein d080b55c5b Bugfix: tiling processor's _rec method wasn't delivering virtual methods. 2017-08-27 10:41:32 +02:00
Matthias Koefferlein 362aa0ea23 Marked two more tests as long runners. 2017-08-27 10:41:07 +02:00
Matthias Koefferlein 000917d2c9 Refactoring: moved unit tests to libraries for some libs (ut modularization) 2017-08-26 22:44:31 +02:00
Matthias Koefferlein c0afa4bf58 Refactoring of resources and modules. 2017-08-23 09:58:39 +02:00
Matthias Koefferlein 487545bbaa Avoid memory corruption 
The tiling processor now holds it's receivers
in tl::shared_ptr. This prevents memory corruption and
allows managing receiver lifetime externally.
 2017-08-21 23:40:18 +02:00
Matthias Koefferlein 55e797ffaf Provide proper INSTALL targets for .pro files 
Plus: reduce compiler warnings
 2017-08-21 02:33:45 +02:00
Matthias Koefferlein 394947df72 Segfault fixed in RecursiveShapeIterator 
The RSI does no longer segfault when the default one
gets reset.
 2017-08-20 23:59:06 +02:00
Matthias Koefferlein 2a6c2ee735 Tests and bug fixes for strmcmp and strmclip 
* ut framework now has a text file compare
* Added tests for strm2txt, strmclip and strmcmp
* Fixed the output of the PrintingDiffReceiver in some cases
* Cell renaming does not give a difference in smart cell mapping mode
 2017-08-19 23:28:03 +02:00
Matthias Koefferlein c7edc9e7a0 More basic bd tests (reader) and some bug fixes 2017-08-19 19:25:21 +02:00
Matthias Koefferlein a9b64d1e57 Refactoring and first bd tests 
The goal of the refactoring is to support unit tests
for the db library.

For this, a distributed unit test concept has been
introduced (later to be extended to other libs).
Unit tests are shared objects called ".ut" and are
automatically loaded by the ut runner. The bd library
now has two folders - one for sources and one for the
unit tests. The sources are separated into lib and apps.

First unit tests for the writer options have been
provided.
 2017-08-19 18:47:52 +02:00
Matthias Koefferlein b4a1143588 Some refactoring of buddy bodies and first strmcmp implementation 
* Missing: functionaliy for strmcmp
 2017-08-18 09:46:28 +02:00
Matthias Koefferlein a6723a8155 Some test updates 
* Generalized Polygon to edge interaction into db::Polygon tools
* Added tests for this
* Equipped region to edges interaction with this feature to
  reduce random test fails
* Multiple (reproducible) seeds for Region tests
* More tolerances for TilingProcessor tests
* ICplxTrans is_unity? implementation is using proper
  double tolerances now
* File watcher tests wait longer to allow for slow
  response on loaded Windows build server
 2017-08-11 22:00:07 +02:00
Matthias Koefferlein 7c59235889 Fixed a potential issue when using the db::Shape edge iterator on a non-existing hull in SimplePolygon. 2017-08-10 01:53:35 +02:00
Matthias Koefferlein 4dea5b40f2 Added buddies to build. 2017-08-09 22:37:58 +02:00
Matthias Koefferlein 919d2d56fa Ported oasis-fix to GDS2 reader too (reduction of zero-distance axes in AREF's) 2017-07-29 19:05:52 +02:00
Matthias Koefferlein 32ba5ee635 Some fixes for OASIS reader 
- Allow full 32bit for box width and height
  and some other properties (for border case
  testing - not recommended)
- Reduce arrays with step distance 0 to
  dimension 1 - avoids overlapping instances
  or shapes.
 2017-07-28 00:19:39 +02:00
klayoutmatthias c442202ca4 Enabled Windows build on Qt5. 2017-07-23 23:36:29 +02:00
Matthias Koefferlein 45b774a3af Fixed a XOR issue 
Bug: sometimes, if the files had different database units, the XOR
tool was showing differences while there are none.

This was due to a sloppy computation of the tile boxes. The solution
is to properly round the tile size to a common database unit and
to use a common effective size for both inputs.
 2017-07-18 22:33:54 +02:00
Matthias Koefferlein 703a0ee85d Added "transformed" method to several shape primitives 
The new version will transform double-coordinate types to
integer-coordinate types through a "VCplxTrans".
 2017-07-17 21:05:38 +02:00
Matthias Koefferlein db5ac31ada New import methods for Region, EdgePairs and Edges 
Region: insert of other regions, shape collections (with transformation)
Edges: insert of other edge collections, regions, shape collections (with transformation)
EdgePairs: insert of other edge pair collections
 2017-07-16 22:25:08 +02:00
Matthias Koefferlein 43359195ea DRC: corners function 
Plus: a new RBA binding for decompose_convex/trapezoids that delivers a region.
 2017-07-16 00:03:45 +02:00
Matthias Koefferlein cf6aef46e5 Some enhancements for DRC 
- modified definition of texts with the ability to produce
  point-like edge objects
- middle and extent_refs methods for center point and other
  references.
 2017-07-13 23:38:36 +02:00
Matthias Koefferlein 4ad20fa4ce Region to edge interactions 
With this fix, regions can be interaction-tested with edge collections.
Only "normal" interaction is available - select_overlapping is not. This
is still confined to region to region interactions.
 2017-07-12 22:41:11 +02:00
Matthias Koefferlein 02819c5f1e Hash functions and fuzzy compare for RBA 
RBA now provides a hash method for Box, Edge, EdgePair, Trans,
Polygon, SimplePolygon, CellInstArray, LayerInfo, Path, Text,
Point and Vector.

eql? is mapped to ==.

==, != and < act "fuzzy" for the double-typed variants.

Hence, these objects can be used as hash keys now.
 2017-07-09 22:40:56 +02:00
Matthias Koefferlein 8396463daf Added text support in DRC 
- A new constructor for RBA::Region has been provided to
  create text markers from a shape iterator
- The DRC framework has been enhanced with a "text" function
 2017-07-07 00:02:52 +02:00
Matthias Koefferlein 801f83f09c Added DRC test suite and "smoothed" function for DRC 2017-07-06 23:02:11 +02:00
Matthias Koefferlein 8910828726 More consistent definition of precision for double types 
The double types (DCoord, DPoint, DVector ...) support a
more consistent equivalence criterion now. This supports
micron-unit objects without loss of precision.

Before this fix, the precision used for 0.01 which was
basically implying a resolution of 10nm for micrometer-unit
double objects.
 2017-07-04 23:50:30 +02:00
Matthias Koefferlein 18f79dde67 First fix - adjusted accuracy for micron units 
But: floating points coordinates are used internally for
size - hence dbPolygon:20 test is failing.
 2017-07-02 23:33:23 +02:00
Matthias Koefferlein 798425c564 OASIS reader bugfix (PROPVALUE forward refs in lists) 2017-07-02 19:45:02 +02:00
Matthias Koefferlein 61ef30f9ad Enhanced layout statistics form 
The form offers a detailed shape statistics page.
 2017-06-25 22:10:12 +02:00
Matthias Koefferlein 96c150a4ee Fixed #13 (OASIS reader performance on forward-ref PROPSTRING) 2017-06-20 22:05:22 +02:00
Matthias Koefferlein 5ee781a93f Reactivated some from_xy methods for backward compatibility 2017-06-17 16:53:01 +02:00
Matthias Koefferlein 9ff1a76f94 Added some convenience methods for transformations 
* Reactivated (deprecated) from_xtrans methods for backward
  compatibility
* Added more flavours of "trans" and "*" (like transformation of
  boxes)
 2017-06-17 16:45:01 +02:00
Matthias Koefferlein c891d06ac3 Some performance enhancement (~30%) of RBA/PYA 
This was achieved by separating the methods into
constructors and callbacks, hence there are less iterations
required when lookup up the latter.
 2017-06-12 00:31:00 +02:00
Matthias Koefferlein 60cfbd9c6f Merge branch 'salt' 2017-05-07 23:55:22 +02:00
Matthias Koefferlein 9b42049abe clang compatibility 
Fixed some compile issues with clang and
some warnings.
 2017-05-07 23:52:20 +02:00
Matthias Koefferlein b3e823ca28 Fixed the timers for measuring read sorting times (out of band fix) 2017-04-25 23:41:36 +02:00
Matthias Koefferlein 1091ea6d5b Technology specific libraries 
Libraries now carry a technology association and
only libraries associated with the current technology
can be selected.

To enforce proper update, cancel() will be used upon
change of technology. This avoids side effects when
changing the technology without notifying the library
selection widgets.

The MainWindow::cancel method has been generalized to
cover the functionality of cm_cancel without the
exception handling.
 2017-04-23 19:30:55 +02:00
Matthias Koefferlein 6ba251cf2a WIP: Added font controller 
This enables font packages: packages can now provide fonts by
featuring a "fonts" directory with the font layouts.

This commit also adds the capability to dynamically add fonts.
The Glyphs system is decoupled from the application's system
path and the BASIC.TEXT PCell parameters are non-cached to
enable dynamic updates.
 2017-04-22 00:03:58 +02:00
Matthias Koefferlein 0078ee5334 Fixed a build issue on gcc 4.4.7 (improper use of typename) 2017-04-20 21:30:50 +02:00
Matthias Koefferlein dd4b873d64 Fixed some compiler warnings and some small refactoring 2017-04-01 23:18:04 +02:00
Matthias Koefferlein 47aa38421a Unique library named to avoid name conflicts 
The libraries generated are called libklayout_x now
(instead of libx). This avoid name conflicts with
"libdb.so" on some systems for example.
 2017-03-31 00:23:12 +02:00
klayoutmatthias 194a4cc4af Fixed #5 2017-02-28 23:26:47 +01:00
Matthias Koefferlein f18ca83575 WIP: fixed a typo. 2017-02-25 01:47:45 +01:00
Matthias Koefferlein ae986d3234 Implemented #2 ([Simple]Polygon#extract_rad feature for Ruby/Python) 2017-02-25 01:35:14 +01:00
Matthias Koefferlein ede58ae728 Added a convenience method to RBA::Layout for creating a temp layer 2017-02-24 22:43:31 +01:00
Matthias Koefferlein 55bac69a4a Drawing optimization: only redraw changed layers 
The effect was: when drawing a shape on a single layer, all
layers have been redrawn. This was changed such that only
the affected layer is actually redrawn.
 2017-02-23 23:33:07 +01:00
Matthias Koefferlein 320e96f6da WIP complex regions for RecursiveShapeIterator 
* Refactoring: no more "box+exclude" regions - they
  can be emulated using a NOT with the same result
* "confinement" of regions inside recursive shape
  iterators
* setters and getters for complex regions in GSI,
  confinement
* more unit tests, some bug fixes
 2017-02-15 00:53:39 +01:00
Matthias Koefferlein fb6cf92b15 WIP on complex regions for RecursiveShapeIterator 
- Added some tests
- Performance improvements for insert of
  regions into shapes
- Added LayoutLocker for that purpose
  (locks a layout against updates temporarily)
- Improved implementation on RecursiveShapeIterator
  with complex regions: will now check if a shape
  is really inside the region.
 2017-02-14 00:13:57 +01:00
Matthias Koefferlein 282c6f70e2 Unit tests are passing again (no new tests yet). 2017-02-13 00:41:37 +01:00
Matthias Koefferlein 16b5e2f99c Added GSI support for complex search regions 2017-02-13 00:13:43 +01:00
Matthias Koefferlein f71fe1ff05 Initial implementation of complex regions for RecursiveShapeIterator. 2017-02-13 00:01:21 +01:00
Matthias Koefferlein a1e8aaf6b8 Updated copyright note to 2017. 2017-02-12 15:28:14 +01:00
Matthias Koefferlein 1b98f9b0f9 Initialized repository with current sources. 2017-02-12 13:21:08 +01:00