mirror of https://github.com/KLayout/klayout.git
Avoid netlist extraction issues with duplicate instances
So far, duplicate instances have lead to net propagation into parent cells and floating nets. This is fixed by ignoring duplicate instances where possible.
This commit is contained in:
Matthias Koefferlein
parent
8e1dadbe59
commit
0d623bc57a
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@ -1270,6 +1270,11 @@ private:
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for (db::CellInstArray::iterator ii2 = i2.begin_touching (ib1.transformed (t2i), mp_layout); ! ii2.at_end (); ++ii2) {
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db::ICplxTrans tt2 = t2 * i2.complex_trans (*ii2);
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if (i1.cell_index () == i2.cell_index () && tt1 == tt2) {
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// skip interactions between identical instances (duplicate instance removal)
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continue;
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}
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box_type ib2 = bb2.transformed (tt2);
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box_type common12 = ib1 & ib2 & common;
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@ -1653,6 +1658,8 @@ hier_clusters<T>::make_path (const db::Layout &layout, const db::Cell &cell, siz
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connected_clusters<T> &child_cc = clusters_per_cell (p->inst_cell_index ());
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if (child_cc.is_root (id)) {
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std::set<ClusterInstance> seen; // to avoid duplicate connections
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const db::Cell &child_cell = layout.cell (p->inst_cell_index ());
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for (db::Cell::parent_inst_iterator pi = child_cell.begin_parent_insts (); ! pi.at_end (); ++pi) {
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@ -1662,7 +1669,7 @@ hier_clusters<T>::make_path (const db::Layout &layout, const db::Cell &cell, siz
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for (db::CellInstArray::iterator pii = child_inst.begin (); ! pii.at_end (); ++pii) {
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ClusterInstance ci2 (id, child_inst.cell_index (), child_inst.complex_trans (*pii), child_inst.prop_id ());
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if (cell.cell_index () != pi->parent_cell_index () || ci != ci2) {
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if ((cell.cell_index () != pi->parent_cell_index () || ci != ci2) && seen.find (ci2) == seen.end ()) {
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size_t id_dummy;
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@ -1676,6 +1683,7 @@ hier_clusters<T>::make_path (const db::Layout &layout, const db::Cell &cell, siz
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}
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parent_cc.add_connection (id_dummy, ci2);
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seen.insert (ci2);
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}
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@ -1709,6 +1717,8 @@ hier_clusters<T>::make_path (const db::Layout &layout, const db::Cell &cell, siz
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connected_clusters<T> &child_cc = clusters_per_cell (p->inst_cell_index ());
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if (child_cc.is_root (id)) {
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std::set<ClusterInstance> seen; // to avoid duplicate connections
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const db::Cell &child_cell = layout.cell (p->inst_cell_index ());
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for (db::Cell::parent_inst_iterator pi = child_cell.begin_parent_insts (); ! pi.at_end (); ++pi) {
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@ -1717,22 +1727,27 @@ hier_clusters<T>::make_path (const db::Layout &layout, const db::Cell &cell, siz
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connected_clusters<T> &parent_cc = clusters_per_cell (pi->parent_cell_index ());
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for (db::CellInstArray::iterator pii = child_inst.begin (); ! pii.at_end (); ++pii) {
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size_t id_dummy;
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const typename db::local_cluster<T>::global_nets &gn = child_cc.cluster_by_id (id).get_global_nets ();
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if (gn.empty ()) {
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id_dummy = parent_cc.insert_dummy ();
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} else {
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local_cluster<T> *lc = parent_cc.insert ();
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lc->set_global_nets (gn);
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id_dummy = lc->id ();
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}
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ClusterInstance ci2 (id, child_inst.cell_index (), child_inst.complex_trans (*pii), child_inst.prop_id ());
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parent_cc.add_connection (id_dummy, ci2);
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if (seen.find (ci2) == seen.end ()) {
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size_t id_dummy;
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const typename db::local_cluster<T>::global_nets &gn = child_cc.cluster_by_id (id).get_global_nets ();
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if (gn.empty ()) {
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id_dummy = parent_cc.insert_dummy ();
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} else {
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local_cluster<T> *lc = parent_cc.insert ();
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lc->set_global_nets (gn);
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id_dummy = lc->id ();
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}
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parent_cc.add_connection (id_dummy, ci2);
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seen.insert (ci2);
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if (pci == pi->parent_cell_index () && ci == ci2) {
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id_new = id_dummy;
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}
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if (pci == pi->parent_cell_index () && ci == ci2) {
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id_new = id_dummy;
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}
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}
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@ -1095,3 +1095,27 @@ TEST(BasicHierarchyVariantsNot2)
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run_test_bool (_this, "hlp14.oas", TMNot, 101);
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}
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TEST(RedundantHierarchyAnd1)
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{
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// Redundant hierarchy, NOT
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run_test_bool2 (_this, "hlp15.oas", TMAnd, 100);
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}
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TEST(RedundantHierarchyNot1)
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{
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// Redundant hierarchy, NOT
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run_test_bool2 (_this, "hlp15.oas", TMNot, 101);
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}
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TEST(RedundantHierarchyAnd2)
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{
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// Redundant hierarchy, NOT
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run_test_bool2 (_this, "hlp16.gds", TMAnd, 100);
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}
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TEST(RedundantHierarchyNot2)
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{
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// Redundant hierarchy, NOT
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run_test_bool2 (_this, "hlp16.gds", TMNot, 101);
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}
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@ -2553,3 +2553,205 @@ TEST(10_Antenna)
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db::compare_layouts (_this, ly2, au);
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}
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TEST(11_DuplicateInstances)
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{
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db::Layout ly;
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db::LayerMap lmap;
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unsigned int nwell = define_layer (ly, lmap, 1);
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unsigned int active = define_layer (ly, lmap, 2);
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unsigned int poly = define_layer (ly, lmap, 3);
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unsigned int poly_lbl = define_layer (ly, lmap, 3, 1);
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unsigned int diff_cont = define_layer (ly, lmap, 4);
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unsigned int poly_cont = define_layer (ly, lmap, 5);
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unsigned int metal1 = define_layer (ly, lmap, 6);
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unsigned int metal1_lbl = define_layer (ly, lmap, 6, 1);
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unsigned int via1 = define_layer (ly, lmap, 7);
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unsigned int metal2 = define_layer (ly, lmap, 8);
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unsigned int metal2_lbl = define_layer (ly, lmap, 8, 1);
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{
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db::LoadLayoutOptions options;
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options.get_options<db::CommonReaderOptions> ().layer_map = lmap;
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options.get_options<db::CommonReaderOptions> ().create_other_layers = false;
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std::string fn (tl::testsrc ());
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fn = tl::combine_path (fn, "testdata");
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fn = tl::combine_path (fn, "algo");
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fn = tl::combine_path (fn, "device_extract_l1_dup_inst.gds");
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tl::InputStream stream (fn);
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db::Reader reader (stream);
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reader.read (ly, options);
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}
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db::Cell &tc = ly.cell (*ly.begin_top_down ());
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db::LayoutToNetlist l2n (db::RecursiveShapeIterator (ly, tc, std::set<unsigned int> ()));
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std::auto_ptr<db::Region> rnwell (l2n.make_layer (nwell, "nwell"));
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std::auto_ptr<db::Region> ractive (l2n.make_layer (active, "active"));
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std::auto_ptr<db::Region> rpoly (l2n.make_polygon_layer (poly, "poly"));
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std::auto_ptr<db::Region> rpoly_lbl (l2n.make_text_layer (poly_lbl, "poly_lbl"));
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std::auto_ptr<db::Region> rdiff_cont (l2n.make_polygon_layer (diff_cont, "diff_cont"));
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std::auto_ptr<db::Region> rpoly_cont (l2n.make_polygon_layer (poly_cont, "poly_cont"));
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std::auto_ptr<db::Region> rmetal1 (l2n.make_polygon_layer (metal1, "metal1"));
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std::auto_ptr<db::Region> rmetal1_lbl (l2n.make_text_layer (metal1_lbl, "metal1_lbl"));
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std::auto_ptr<db::Region> rvia1 (l2n.make_polygon_layer (via1, "via1"));
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std::auto_ptr<db::Region> rmetal2 (l2n.make_polygon_layer (metal2, "metal2"));
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std::auto_ptr<db::Region> rmetal2_lbl (l2n.make_text_layer (metal2_lbl, "metal2_lbl"));
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// derived regions
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db::Region rpactive = *ractive & *rnwell;
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db::Region rpgate = rpactive & *rpoly;
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db::Region rpsd = rpactive - rpgate;
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db::Region rnactive = *ractive - *rnwell;
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db::Region rngate = rnactive & *rpoly;
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db::Region rnsd = rnactive - rngate;
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db::NetlistDeviceExtractorMOS3Transistor pmos_ex ("PMOS");
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db::NetlistDeviceExtractorMOS3Transistor nmos_ex ("NMOS");
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// device extraction
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db::NetlistDeviceExtractor::input_layers dl;
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dl["SD"] = &rpsd;
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dl["G"] = &rpgate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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l2n.extract_devices (pmos_ex, dl);
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dl["SD"] = &rnsd;
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dl["G"] = &rngate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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l2n.extract_devices (nmos_ex, dl);
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// return the computed layers into the original layout and write it for debugging purposes
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// NOTE: this will include the device layers too
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unsigned int lgate = ly.insert_layer (db::LayerProperties (10, 0)); // 10/0 -> Gate
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unsigned int lsd = ly.insert_layer (db::LayerProperties (11, 0)); // 11/0 -> Source/Drain
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unsigned int lpdiff = ly.insert_layer (db::LayerProperties (12, 0)); // 12/0 -> P Diffusion
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unsigned int lndiff = ly.insert_layer (db::LayerProperties (13, 0)); // 13/0 -> N Diffusion
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unsigned int lpoly = ly.insert_layer (db::LayerProperties (14, 0)); // 14/0 -> Poly with gate terminal
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rpgate.insert_into (&ly, tc.cell_index (), lgate);
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rngate.insert_into (&ly, tc.cell_index (), lgate);
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rpsd.insert_into (&ly, tc.cell_index (), lsd);
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rnsd.insert_into (&ly, tc.cell_index (), lsd);
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rpsd.insert_into (&ly, tc.cell_index (), lpdiff);
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rnsd.insert_into (&ly, tc.cell_index (), lndiff);
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rpoly->insert_into (&ly, tc.cell_index (), lpoly);
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// net extraction
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l2n.register_layer (rpsd, "psd");
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l2n.register_layer (rnsd, "nsd");
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// Intra-layer
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l2n.connect (rpsd);
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l2n.connect (rnsd);
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l2n.connect (*rpoly);
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l2n.connect (*rdiff_cont);
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l2n.connect (*rpoly_cont);
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l2n.connect (*rmetal1);
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l2n.connect (*rvia1);
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l2n.connect (*rmetal2);
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// Inter-layer
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l2n.connect (rpsd, *rdiff_cont);
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l2n.connect (rnsd, *rdiff_cont);
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l2n.connect (*rpoly, *rpoly_cont);
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l2n.connect (*rpoly_cont, *rmetal1);
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l2n.connect (*rdiff_cont, *rmetal1);
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l2n.connect (*rmetal1, *rvia1);
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l2n.connect (*rvia1, *rmetal2);
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l2n.connect (*rpoly, *rpoly_lbl); // attaches labels
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l2n.connect (*rmetal1, *rmetal1_lbl); // attaches labels
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l2n.connect (*rmetal2, *rmetal2_lbl); // attaches labels
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// create some mess - we have to keep references to the layers to make them not disappear
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rmetal1_lbl.reset (0);
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rmetal2_lbl.reset (0);
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rpoly_lbl.reset (0);
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l2n.extract_netlist ();
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// debug layers produced for nets
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// 202/0 -> Active
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// 203/0 -> Poly
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// 204/0 -> Diffusion contacts
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// 205/0 -> Poly contacts
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// 206/0 -> Metal1
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// 207/0 -> Via1
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// 208/0 -> Metal2
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// 210/0 -> N source/drain
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// 211/0 -> P source/drain
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std::map<const db::Region *, unsigned int> dump_map;
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dump_map [&rpsd ] = ly.insert_layer (db::LayerProperties (210, 0));
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dump_map [&rnsd ] = ly.insert_layer (db::LayerProperties (211, 0));
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dump_map [rpoly.get () ] = ly.insert_layer (db::LayerProperties (203, 0));
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dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (204, 0));
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dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (205, 0));
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dump_map [rmetal1.get () ] = ly.insert_layer (db::LayerProperties (206, 0));
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dump_map [rvia1.get () ] = ly.insert_layer (db::LayerProperties (207, 0));
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dump_map [rmetal2.get () ] = ly.insert_layer (db::LayerProperties (208, 0));
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// write nets to layout
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db::CellMapping cm = l2n.cell_mapping_into (ly, tc, true /*with device cells*/);
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dump_nets_to_layout (l2n, ly, dump_map, cm);
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dump_map.clear ();
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dump_map [&rpsd ] = ly.insert_layer (db::LayerProperties (310, 0));
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dump_map [&rnsd ] = ly.insert_layer (db::LayerProperties (311, 0));
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dump_map [rpoly.get () ] = ly.insert_layer (db::LayerProperties (303, 0));
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dump_map [rdiff_cont.get ()] = ly.insert_layer (db::LayerProperties (304, 0));
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dump_map [rpoly_cont.get ()] = ly.insert_layer (db::LayerProperties (305, 0));
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dump_map [rmetal1.get () ] = ly.insert_layer (db::LayerProperties (306, 0));
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dump_map [rvia1.get () ] = ly.insert_layer (db::LayerProperties (307, 0));
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dump_map [rmetal2.get () ] = ly.insert_layer (db::LayerProperties (308, 0));
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dump_recursive_nets_to_layout (l2n, ly, dump_map, cm);
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// compare the collected test data
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std::string au = tl::testsrc ();
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au = tl::combine_path (au, "testdata");
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au = tl::combine_path (au, "algo");
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au = tl::combine_path (au, "device_extract_au1_dup_inst_with_rec_nets.gds");
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db::compare_layouts (_this, ly, au);
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// compare netlist as string
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CHECKPOINT ();
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db::compare_netlist (_this, *l2n.netlist (),
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"circuit RINGO ();\n"
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" subcircuit INV2 $1 (IN=$I12,$2=FB,OUT=OSC,$4=VSS,$5=VDD);\n"
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" subcircuit INV2 $2 (IN=FB,$2=$I25,OUT=$I1,$4=VSS,$5=VDD);\n"
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" subcircuit INV2 $3 (IN=$I1,$2=$I26,OUT=$I2,$4=VSS,$5=VDD);\n"
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" subcircuit INV2 $4 (IN=$I2,$2=$I27,OUT=$I3,$4=VSS,$5=VDD);\n"
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" subcircuit INV2 $5 (IN=$I3,$2=$I28,OUT=$I4,$4=VSS,$5=VDD);\n"
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" subcircuit BLOCK $6 ($1=$I29,$2=VDD,$3=VSS,$4=$I11,$5=$I5,$6=$I4,$7=$I12);\n"
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" subcircuit INV2 $7 (IN=$I11,$2=$I29,OUT=$I5,$4=VSS,$5=VDD);\n"
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"end;\n"
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"circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5);\n"
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" device PMOS $1 (S=$2,G=IN,D=$5) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n"
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" device PMOS $2 (S=$5,G=$2,D=OUT) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n"
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" device NMOS $3 (S=$2,G=IN,D=$4) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n"
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" device NMOS $4 (S=$4,G=$2,D=OUT) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n"
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" subcircuit TRANS $1 ($1=$2,$2=$4,$3=IN);\n"
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" subcircuit TRANS $2 ($1=$2,$2=$5,$3=IN);\n"
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" subcircuit TRANS $3 ($1=$5,$2=OUT,$3=$2);\n"
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" subcircuit TRANS $4 ($1=$4,$2=OUT,$3=$2);\n"
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"end;\n"
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"circuit TRANS ($1=$1,$2=$2,$3=$3);\n"
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"end;\n"
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"circuit BLOCK ($1=$I21,$2=$I14,$3=$I10,$4=$I9,$5=$I6,$6=$I5,$7=$I3);\n"
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" subcircuit INV2 $1 (IN=$I6,$2=$I22,OUT=$I1,$4=$I10,$5=$I14);\n"
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" subcircuit INV2 $2 (IN=$I9,$2=$I21,OUT=$I6,$4=$I10,$5=$I14);\n"
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" subcircuit INV2 $3 (IN=$I2,$2=$I20,OUT=$I3,$4=$I10,$5=$I14);\n"
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" subcircuit INV2 $4 (IN=$I1,$2=$I19,OUT=$I2,$4=$I10,$5=$I14);\n"
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" subcircuit INV2 $5 (IN=$I5,$2=$I18,OUT=$I9,$4=$I10,$5=$I14);\n"
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"end;\n"
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);
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}
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