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Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway.

This commit is contained in:
Matthias Koefferlein 2019-11-24 00:23:19 +01:00
parent 1a92bae3a8
commit 64bb01d80d
3 changed files with 34 additions and 43 deletions
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27
src/db/db/dbNetlistSpiceReader.cc
View File

@ -282,39 +282,12 @@ void NetlistSpiceReader::read (tl::InputStream &stream, db::Netlist &netlist)
}
}
/**
* @brief Removes dummy nets which are just there to define a pin for a subcircuit
*/
static void
remove_dummy_nets (db::Circuit &circuit)
{
std::vector<db::Net *> nets_to_be_purged;
for (db::Circuit::net_iterator n = circuit.begin_nets (); n != circuit.end_nets (); ++n) {
if (n->subcircuit_pin_count () == 1 && (n->terminal_count () + n->pin_count ()) == 0) {
nets_to_be_purged.push_back (n.operator-> ());
}
}
for (std::vector<db::Net *>::const_iterator n = nets_to_be_purged.begin (); n != nets_to_be_purged.end (); ++n) {
delete *n;
}
}
void NetlistSpiceReader::finish ()
{
while (! m_streams.empty ()) {
pop_stream ();
}
if (mp_netlist) {
// purge nets with single connections (this way unconnected pins can be realized)
// NOTE: we don't use Netlist::purge_nets as this method has too many side effects
db::NetlistLocker locker (mp_netlist);
for (db::Netlist::bottom_up_circuit_iterator c = mp_netlist->begin_bottom_up (); c != mp_netlist->end_bottom_up (); ++c) {
remove_dummy_nets (*c);
}
}
mp_stream.reset (0);
mp_netlist = 0;
mp_circuit = 0;

25
testdata/algo/lvs_test2_au.lvsdb.1 vendored
View File

@ -951,8 +951,11 @@ reference(
net(4 name('4'))
net(5 name('6'))
net(6 name('5'))
net(7 name('8'))
net(8 name('7'))
net(7 name('101'))
net(8 name('8'))
net(9 name('102'))
net(10 name('7'))
net(11 name('103'))
# Outgoing pins and their connections to nets
pin(1 name('1'))
@ -983,23 +986,26 @@ reference(
pin(0 4)
pin(1 3)
pin(2 4)
pin(3 7)
pin(4 6)
pin(5 7)
pin(5 8)
pin(6 3)
)
circuit(4 INV2PAIR name($4)
pin(0 4)
pin(1 3)
pin(2 4)
pin(4 7)
pin(5 8)
pin(3 9)
pin(4 8)
pin(5 10)
pin(6 3)
)
circuit(5 INV2PAIR name($5)
pin(0 4)
pin(1 3)
pin(2 4)
pin(4 8)
pin(3 11)
pin(4 10)
pin(5 5)
pin(6 3)
)
@ -1084,8 +1090,11 @@ xref(
)
circuit(RINGO RINGO nomatch
xref(
net(() 6 mismatch)
net(() 7 mismatch)
net(() 9 mismatch)
net(() 11 mismatch)
net(() 6 mismatch)
net(() 8 mismatch)
net(5 () mismatch)
net(6 () mismatch)
net(7 () mismatch)
@ -1093,7 +1102,7 @@ xref(
net(11 () mismatch)
net(12 () mismatch)
net(10 1 mismatch)
net(8 8 mismatch)
net(8 10 mismatch)
net(1 5 mismatch)
net(2 2 match)
net(3 3 match)

25
testdata/algo/lvs_test2b_au.lvsdb.1 vendored
View File

@ -951,8 +951,11 @@ reference(
net(4 name('4'))
net(5 name('6'))
net(6 name('5'))
net(7 name('8'))
net(8 name('7'))
net(7 name('101'))
net(8 name('8'))
net(9 name('102'))
net(10 name('7'))
net(11 name('103'))
# Outgoing pins and their connections to nets
pin(1 name('1'))
@ -983,23 +986,26 @@ reference(
pin(0 4)
pin(1 3)
pin(2 4)
pin(3 7)
pin(4 6)
pin(5 7)
pin(5 8)
pin(6 3)
)
circuit(4 INV2PAIR name($4)
pin(0 4)
pin(1 3)
pin(2 4)
pin(4 7)
pin(5 8)
pin(3 9)
pin(4 8)
pin(5 10)
pin(6 3)
)
circuit(5 INV2PAIR name($5)
pin(0 4)
pin(1 3)
pin(2 4)
pin(4 8)
pin(3 11)
pin(4 10)
pin(5 5)
pin(6 3)
)
@ -1084,8 +1090,11 @@ xref(
)
circuit(RINGO RINGO nomatch
xref(
net(() 6 mismatch)
net(() 7 mismatch)
net(() 9 mismatch)
net(() 11 mismatch)
net(() 6 mismatch)
net(() 8 mismatch)
net(5 () mismatch)
net(6 () mismatch)
net(7 () mismatch)
@ -1093,7 +1102,7 @@ xref(
net(11 () mismatch)
net(12 () mismatch)
net(10 1 mismatch)
net(8 8 mismatch)
net(8 10 mismatch)
net(1 5 mismatch)
net(2 2 match)
net(3 3 match)