mirror of https://github.com/KLayout/klayout.git
WIP: netlist comparer - increase default depth and added test
The test is specific for symmetric circuits with manifold symmetry axes.
This commit is contained in:
Matthias Koefferlein
parent
ac479c30bc
commit
373a3db1ec
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@ -2166,8 +2166,8 @@ NetlistComparer::NetlistComparer (NetlistCompareLogger *logger)
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m_cap_threshold = -1.0; // not set
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m_res_threshold = -1.0; // not set
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m_max_depth = 8;
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m_max_n_branch = 100;
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m_max_depth = 50;
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m_max_n_branch = 500;
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m_dont_consider_net_names = false;
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}
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@ -2796,3 +2796,210 @@ TEST(18_ClockTree)
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EXPECT_EQ (good, true);
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}
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TEST(19_SymmetricCircuit)
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{
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// Test test requires a certain depth, name sensitivity to resolve ambiguities and
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// tests the backtracking paths.
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const char *nls1 =
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"circuit DECODE (VDD=VDD,nn1_=nn1_,nn1=nn1,q0=q0,q0_=q0_,q1_=q1_,q1=q1,nn2=nn2,nn2_=nn2_,a0=a0,a0_=a0_,g1=g1,g0=g0,gtp=gtp,VSS=VSS,WELL=$14);"
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" device PMOS4 $1 (S=VDD,G=$44,D=q1_,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $2 (S=q1_,G=$44,D=q1,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $3 (S=q1,G=$44,D=VDD,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $4 (S=VDD,G=$44,D=q0,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $5 (S=q0,G=$44,D=q0_,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $6 (S=q0_,G=$44,D=VDD,B=VDD) (L=1.2,W=7);"
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" device PMOS4 $7 (S=q0_,G=$11,D=nn2_,B=VDD) (L=1.2,W=5);"
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" device PMOS4 $8 (S=nn2_,G=$13,D=q1_,B=VDD) (L=1.2,W=5);"
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" device PMOS4 $9 (S=VDD,G=g0,D=$39,B=VDD) (L=1.2,W=3);"
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" device PMOS4 $10 (S=$39,G=g1,D=VDD,B=VDD) (L=1.2,W=3);"
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" device PMOS4 $11 (S=VDD,G=a0_,D=$11,B=VDD) (L=1.2,W=10);"
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" device PMOS4 $12 (S=$11,G=$44,D=VDD,B=VDD) (L=1.2,W=10);"
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" device PMOS4 $13 (S=q0,G=$11,D=nn2,B=VDD) (L=1.2,W=5);"
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" device PMOS4 $14 (S=nn1_,G=$13,D=$9,B=$14) (L=1.2,W=11);"
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" device PMOS4 $15 (S=$4,G=$11,D=nn1_,B=$14) (L=1.2,W=11);"
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" device PMOS4 $16 (S=VDD,G=$44,D=$13,B=VDD) (L=1.2,W=10);"
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" device PMOS4 $17 (S=$13,G=a0,D=VDD,B=VDD) (L=1.2,W=10);"
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" device PMOS4 $18 (S=$6,G=$11,D=nn1,B=$14) (L=1.2,W=11);"
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" device PMOS4 $19 (S=nn1,G=$13,D=$8,B=$14) (L=1.2,W=11);"
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" device PMOS4 $20 (S=VDD,G=$41,D=$44,B=VDD) (L=1.2,W=15);"
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" device PMOS4 $21 (S=nn2,G=$13,D=q1,B=VDD) (L=1.2,W=5);"
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" device PMOS4 $22 (S=VDD,G=$39,D=$37,B=VDD) (L=1.2,W=6);"
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" device PMOS4 $23 (S=VDD,G=$42,D=$41,B=VDD) (L=1.2,W=3);"
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" device PMOS4 $24 (S=gtp,G=$39,D=$42,B=VDD) (L=1.2,W=16);"
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" device NMOS4 $25 (S=$44,G=$41,D=VSS,B=VSS) (L=1.2,W=22);"
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" device NMOS4 $26 (S=VSS,G=$39,D=$37,B=VSS) (L=1.2,W=9);"
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" device NMOS4 $27 (S=q0_,G=$6,D=VSS,B=VSS) (L=1.2,W=1);"
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" device NMOS4 $28 (S=VSS,G=$8,D=q1_,B=VSS) (L=1.2,W=1);"
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" device NMOS4 $29 (S=$13,G=$44,D=$35,B=VSS) (L=1.2,W=19);"
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" device NMOS4 $30 (S=$35,G=a0,D=VSS,B=VSS) (L=1.2,W=19);"
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" device NMOS4 $31 (S=gtp,G=$37,D=$42,B=VSS) (L=1.2,W=16);"
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" device NMOS4 $32 (S=VSS,G=$39,D=$42,B=VSS) (L=1.2,W=20);"
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" device NMOS4 $33 (S=VSS,G=$4,D=q0,B=VSS) (L=1.2,W=1);"
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" device NMOS4 $34 (S=VSS,G=$11,D=$6,B=VSS) (L=1.2,W=18);"
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" device NMOS4 $35 (S=$9,G=$13,D=VSS,B=VSS) (L=1.2,W=18);"
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" device NMOS4 $36 (S=VSS,G=$11,D=$4,B=VSS) (L=1.2,W=18);"
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" device NMOS4 $37 (S=q1,G=$9,D=VSS,B=VSS) (L=1.2,W=1);"
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" device NMOS4 $38 (S=$8,G=$13,D=VSS,B=VSS) (L=1.2,W=18);"
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" device NMOS4 $39 (S=VSS,G=a0_,D=$34,B=VSS) (L=1.2,W=19);"
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" device NMOS4 $40 (S=$34,G=$44,D=$11,B=VSS) (L=1.2,W=19);"
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" device NMOS4 $41 (S=VSS,G=g0,D=$40,B=VSS) (L=1.2,W=17);"
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" device NMOS4 $42 (S=$40,G=g1,D=$39,B=VSS) (L=1.2,W=17);"
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" device NMOS4 $43 (S=VSS,G=$42,D=$41,B=VSS) (L=1.2,W=2);"
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"end;"
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;
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const char *nls2 =
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"circuit DECODE (A0=A0,A0_=A0_,Q0=Q0,Q0_=Q0_,Q1=Q1,Q1_=Q1_,NN2=NN2,NN2_=NN2_,NN1=NN1,NN1_=NN1_,G0=G0,G1=G1,NN3=NN3,VDD=VDD,VSS=VSS,WELL=WELL);"
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" device NMOS4 '0' (S=HNET44,G=A0,D=VSS,B=VSS) (L=1.2,W=19);"
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" device NMOS4 '1' (S=CS1,G=YI,D=HNET44,B=VSS) (L=1.2,W=19);"
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" device PMOS4 '10' (S=VDD,G=G0,D=NET194,B=VDD) (L=1.2,W=3);"
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" device PMOS4 '11' (S=VDD,G=G1,D=NET194,B=VDD) (L=1.2,W=3);"
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" device NMOS4 '12' (S=NET200,G=CS0,D=VSS,B=VSS) (L=1.2,W=18);"
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" device NMOS4 '13' (S=VSS,G=CS1,D=NET175,B=VSS) (L=1.2,W=18);"
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" device NMOS4 '14' (S=VSS,G=CS0,D=NET181,B=VSS) (L=1.2,W=18);"
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" device NMOS4 '15' (S=NET215,G=CS1,D=VSS,B=VSS) (L=1.2,W=18);"
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" device NMOS4 '16' (S=Q1,G=NET175,D=VSS,B=VSS) (L=1.2,W=1);"
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" device NMOS4 '17' (S=VSS,G=NET200,D=Q0,B=VSS) (L=1.2,W=1);"
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" device NMOS4 '18' (S=Q0_,G=NET181,D=VSS,B=VSS) (L=1.2,W=1);"
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" device NMOS4 '19' (S=VSS,G=NET215,D=Q1_,B=VSS) (L=1.2,W=1);"
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" device PMOS4 '2' (S=VDD,G=A0,D=CS1,B=VDD) (L=1.2,W=10);"
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" device NMOS4 '20' (S=NET189,G=NET193,D=NN3,B=VSS) (L=1.2,W=16);"
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" device NMOS4 '21' (S=VSS,G=NET194,D=NET189,B=VSS) (L=1.2,W=20);"
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" device PMOS4 '22' (S=VDD,G=NET194,D=NET193,B=VDD) (L=1.2,W=6);"
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" device NMOS4 '23' (S=NET193,G=NET194,D=VSS,B=VSS) (L=1.2,W=9);"
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" device PMOS4 '24' (S=VDD,G=NET189,D=WL1_EN_,B=VDD) (L=1.2,W=3);"
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" device NMOS4 '25' (S=WL1_EN_,G=NET189,D=VSS,B=VSS) (L=1.2,W=2);"
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" device PMOS4 '26' (S=VDD,G=WL1_EN_,D=YI,B=VDD) (L=1.2,W=15);"
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" device NMOS4 '27' (S=YI,G=WL1_EN_,D=VSS,B=VSS) (L=1.2,W=22);"
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" device PMOS4 '28' (S=NN1_,G=CS0,D=NET200,B=WELL) (L=1.2,W=11);"
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" device PMOS4 '29' (S=NET175,G=CS1,D=NN1_,B=WELL) (L=1.2,W=11);"
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" device PMOS4 '3' (S=VDD,G=YI,D=CS1,B=VDD) (L=1.2,W=10);"
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" device PMOS4 '30' (S=NET181,G=CS0,D=NN1,B=WELL) (L=1.2,W=11);"
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" device PMOS4 '31' (S=Q1,G=CS1,D=NN2,B=VDD) (L=1.2,W=5);"
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" device PMOS4 '32' (S=NN2,G=CS0,D=Q0,B=VDD) (L=1.2,W=5);"
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" device PMOS4 '33' (S=NN1,G=CS1,D=NET215,B=WELL) (L=1.2,W=11);"
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" device PMOS4 '34' (S=Q0_,G=CS0,D=NN2_,B=VDD) (L=1.2,W=5);"
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" device PMOS4 '35' (S=NN2_,G=CS1,D=Q1_,B=VDD) (L=1.2,W=5);"
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" device PMOS4 '36' (S=NN3,G=NET194,D=NET189,B=VDD) (L=1.2,W=16);"
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" device PMOS4 '37' (S=VDD,G=YI,D=Q1,B=VDD) (L=1.2,W=7);"
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" device PMOS4 '38' (S=VDD,G=YI,D=Q0_,B=VDD) (L=1.2,W=7);"
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" device PMOS4 '39' (S=VDD,G=YI,D=Q0,B=VDD) (L=1.2,W=7);"
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" device NMOS4 '4' (S=HNET48,G=A0_,D=VSS,B=VSS) (L=1.2,W=19);"
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" device PMOS4 '40' (S=Q0_,G=YI,D=Q0,B=VDD) (L=1.2,W=7);"
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" device PMOS4 '41' (S=Q1,G=YI,D=Q1_,B=VDD) (L=1.2,W=7);"
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" device PMOS4 '42' (S=VDD,G=YI,D=Q1_,B=VDD) (L=1.2,W=7);"
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" device NMOS4 '5' (S=CS0,G=YI,D=HNET48,B=VSS) (L=1.2,W=19);"
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" device PMOS4 '6' (S=VDD,G=A0_,D=CS0,B=VDD) (L=1.2,W=10);"
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" device PMOS4 '7' (S=VDD,G=YI,D=CS0,B=VDD) (L=1.2,W=10);"
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" device NMOS4 '8' (S=HNET52,G=G0,D=VSS,B=VSS) (L=1.2,W=17);"
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" device NMOS4 '9' (S=NET194,G=G1,D=HNET52,B=VSS) (L=1.2,W=17);"
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"end;"
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;
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db::Netlist nl1, nl2;
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prep_nl (nl1, nls1);
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prep_nl (nl2, nls2);
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NetlistCompareTestLogger logger;
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db::NetlistComparer comp (&logger);
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bool good = comp.compare (&nl1, &nl2);
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std::string txt = logger.text ();
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EXPECT_EQ (txt,
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"begin_circuit DECODE DECODE\n"
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"match_nets $41 WL1_EN_\n"
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"match_nets VDD VDD\n"
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"match_nets $39 NET194\n"
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"match_nets g0 G0\n"
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"match_nets $40 HNET52\n"
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"match_nets VSS VSS\n"
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"match_nets $42 NET189\n"
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"match_nets gtp NN3\n"
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"match_nets $37 NET193\n"
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"match_nets g1 G1\n"
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"match_nets $44 YI\n"
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"match_nets $14 WELL\n"
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"match_nets $8 NET215\n"
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"match_nets $9 NET175\n"
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"match_nets $6 NET181\n"
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"match_nets $4 NET200\n"
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"match_nets nn1 NN1\n"
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"match_nets $11 CS0\n"
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"match_nets $13 CS1\n"
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"match_nets nn2 NN2\n"
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"match_nets nn2_ NN2_\n"
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"match_nets q0 Q0\n"
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"match_nets q1 Q1\n"
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"match_nets q0_ Q0_\n"
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"match_nets q1_ Q1_\n"
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"match_nets a0_ A0_\n"
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"match_nets $34 HNET48\n"
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"match_nets nn1_ NN1_\n"
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"match_nets a0 A0\n"
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"match_nets $35 HNET44\n"
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"match_pins VDD VDD\n"
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"match_pins nn1_ NN1_\n"
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"match_pins nn1 NN1\n"
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"match_pins q0 Q0\n"
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"match_pins q0_ Q0_\n"
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"match_pins q1_ Q1_\n"
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"match_pins q1 Q1\n"
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"match_pins nn2 NN2\n"
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"match_pins nn2_ NN2_\n"
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"match_pins a0 A0\n"
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"match_pins a0_ A0_\n"
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"match_pins g1 G1\n"
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"match_pins g0 G0\n"
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"match_pins gtp NN3\n"
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"match_pins VSS VSS\n"
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"match_pins WELL WELL\n"
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"match_devices $30 0\n"
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"match_devices $29 1\n"
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"match_devices $9 10\n"
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"match_devices $10 11\n"
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"match_devices $36 12\n"
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"match_devices $35 13\n"
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"match_devices $34 14\n"
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"match_devices $38 15\n"
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"match_devices $37 16\n"
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"match_devices $33 17\n"
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"match_devices $27 18\n"
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"match_devices $28 19\n"
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"match_devices $17 2\n"
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"match_devices $31 20\n"
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"match_devices $32 21\n"
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"match_devices $22 22\n"
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"match_devices $26 23\n"
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"match_devices $23 24\n"
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"match_devices $43 25\n"
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"match_devices $20 26\n"
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"match_devices $25 27\n"
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"match_devices $15 28\n"
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"match_devices $14 29\n"
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"match_devices $16 3\n"
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"match_devices $18 30\n"
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"match_devices $21 31\n"
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"match_devices $13 32\n"
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"match_devices $19 33\n"
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"match_devices $7 34\n"
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"match_devices $8 35\n"
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"match_devices $24 36\n"
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"match_devices $3 37\n"
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"match_devices $6 38\n"
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"match_devices $4 39\n"
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"match_devices $39 4\n"
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"match_devices $5 40\n"
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"match_devices $2 41\n"
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"match_devices $1 42\n"
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"match_devices $40 5\n"
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"match_devices $11 6\n"
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"match_devices $12 7\n"
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"match_devices $41 8\n"
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"match_devices $42 9\n"
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"end_circuit DECODE DECODE MATCH"
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);
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EXPECT_EQ (good, true);
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}
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