mirror of https://github.com/KLayout/klayout.git
Just new tests
This commit is contained in:
Matthias Koefferlein
parent
adc21b43d8
commit
d4ed21f42a
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@ -1587,3 +1587,164 @@ TEST(5_DeviceExtractionWithDeviceCombination)
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// the transistor which supplies this probe target has been optimized away by "purge".
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EXPECT_EQ (qnet_name (l2n.probe_net (*rmetal1, db::DPoint (5.3, 0.0))), "(null)");
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}
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TEST(6_MoreDeviceTypes)
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{
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db::Layout ly;
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db::LayerMap lmap;
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unsigned int nwell = define_layer (ly, lmap, 1);
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unsigned int active = define_layer (ly, lmap, 2);
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unsigned int thickgox = define_layer (ly, lmap, 3);
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unsigned int pplus = define_layer (ly, lmap, 4);
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unsigned int nplus = define_layer (ly, lmap, 5);
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unsigned int poly = define_layer (ly, lmap, 6);
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unsigned int poly_lbl = define_layer (ly, lmap, 7);
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unsigned int cont = define_layer (ly, lmap, 8);
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unsigned int metal1 = define_layer (ly, lmap, 9);
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unsigned int metal1_lbl = define_layer (ly, lmap, 10);
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unsigned int via1 = define_layer (ly, lmap, 11);
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unsigned int metal2 = define_layer (ly, lmap, 12);
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unsigned int metal2_lbl = define_layer (ly, lmap, 13);
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{
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db::LoadLayoutOptions options;
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options.get_options<db::CommonReaderOptions> ().layer_map = lmap;
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options.get_options<db::CommonReaderOptions> ().create_other_layers = false;
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std::string fn (tl::testsrc ());
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fn = tl::combine_path (fn, "testdata");
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fn = tl::combine_path (fn, "algo");
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fn = tl::combine_path (fn, "device_extract_l6.gds");
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tl::InputStream stream (fn);
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db::Reader reader (stream);
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reader.read (ly, options);
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}
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db::Cell &tc = ly.cell (*ly.begin_top_down ());
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db::LayoutToNetlist l2n (db::RecursiveShapeIterator (ly, tc, std::set<unsigned int> ()));
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std::auto_ptr<db::Region> rbulk (l2n.make_layer ("bulk"));
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std::auto_ptr<db::Region> rnwell (l2n.make_layer (nwell, "nwell"));
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std::auto_ptr<db::Region> rthickgox (l2n.make_layer (thickgox, "thickgox"));
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std::auto_ptr<db::Region> ractive (l2n.make_layer (active, "active"));
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std::auto_ptr<db::Region> rpplus (l2n.make_layer (pplus, "pplus"));
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std::auto_ptr<db::Region> rnplus (l2n.make_layer (nplus, "nplus"));
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std::auto_ptr<db::Region> rpoly (l2n.make_polygon_layer (poly, "poly"));
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std::auto_ptr<db::Region> rpoly_lbl (l2n.make_text_layer (poly_lbl, "poly_lbl"));
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std::auto_ptr<db::Region> rcont (l2n.make_polygon_layer (cont, "cont"));
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std::auto_ptr<db::Region> rmetal1 (l2n.make_polygon_layer (metal1, "metal1"));
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std::auto_ptr<db::Region> rmetal1_lbl (l2n.make_text_layer (metal1_lbl, "metal1_lbl"));
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std::auto_ptr<db::Region> rvia1 (l2n.make_polygon_layer (via1, "via1"));
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std::auto_ptr<db::Region> rmetal2 (l2n.make_polygon_layer (metal2, "metal2"));
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std::auto_ptr<db::Region> rmetal2_lbl (l2n.make_text_layer (metal2_lbl, "metal2_lbl"));
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// derived regions
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db::Region ractive_in_nwell = *ractive & *rnwell;
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db::Region rpactive = ractive_in_nwell - *rnplus;
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db::Region rntie = ractive_in_nwell & *rnplus;
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db::Region rpgate = rpactive & *rpoly;
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db::Region rpsd = rpactive - rpgate;
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db::Region rhv_pgate = rpgate & *rthickgox;
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db::Region rlv_pgate = rpgate - rhv_pgate;
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db::Region rhv_psd = rpsd & *rthickgox;
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db::Region rlv_psd = rpsd - *rthickgox;
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l2n.register_layer(rntie, "ntie");
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l2n.register_layer(rpsd, "psd");
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db::Region ractive_outside_nwell = *ractive - *rnwell;
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db::Region rnactive = ractive_outside_nwell - *rpplus;
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db::Region rptie = ractive_outside_nwell & *rpplus;
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db::Region rngate = rnactive & *rpoly;
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db::Region rnsd = rnactive - rngate;
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db::Region rhv_ngate = rngate & *rthickgox;
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db::Region rlv_ngate = rngate - rhv_ngate;
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db::Region rhv_nsd = rnsd & *rthickgox;
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db::Region rlv_nsd = rnsd - *rthickgox;
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l2n.register_layer(rptie, "ptie");
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l2n.register_layer(rnsd, "nsd");
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db::NetlistDeviceExtractorMOS4Transistor hvpmos_ex ("HVPMOS");
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db::NetlistDeviceExtractorMOS4Transistor hvnmos_ex ("HVNMOS");
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db::NetlistDeviceExtractorMOS4Transistor lvpmos_ex ("LVPMOS");
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db::NetlistDeviceExtractorMOS4Transistor lvnmos_ex ("LVNMOS");
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// device extraction
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db::NetlistDeviceExtractor::input_layers dl;
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dl["SD"] = &rpsd;
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dl["G"] = &rhv_pgate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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dl["W"] = rnwell.get ();
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l2n.extract_devices (hvpmos_ex, dl);
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dl["SD"] = &rpsd;
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dl["G"] = &rlv_pgate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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dl["W"] = rnwell.get ();
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l2n.extract_devices (lvpmos_ex, dl);
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dl["SD"] = &rnsd;
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dl["G"] = &rhv_ngate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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dl["W"] = rbulk.get ();
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l2n.extract_devices (hvnmos_ex, dl);
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dl["SD"] = &rnsd;
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dl["G"] = &rlv_ngate;
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dl["P"] = rpoly.get (); // not needed for extraction but to return terminal shapes
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dl["W"] = rbulk.get ();
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l2n.extract_devices (lvnmos_ex, dl);
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// Intra-layer
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l2n.connect (rpsd);
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l2n.connect (rnsd);
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l2n.connect (*rnwell);
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l2n.connect (*rpoly);
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l2n.connect (*rcont);
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l2n.connect (*rmetal1);
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l2n.connect (*rvia1);
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l2n.connect (*rmetal2);
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l2n.connect (rptie);
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l2n.connect (rntie);
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// Inter-layer
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l2n.connect (*rcont, rntie);
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l2n.connect (*rcont, rptie);
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l2n.connect (*rnwell, rntie);
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l2n.connect (rpsd, *rcont);
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l2n.connect (rnsd, *rcont);
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l2n.connect (*rpoly, *rcont);
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l2n.connect (*rcont, *rmetal1);
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l2n.connect (*rmetal1, *rvia1);
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l2n.connect (*rvia1, *rmetal2);
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l2n.connect (*rpoly, *rpoly_lbl); // attaches labels
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l2n.connect (*rmetal1, *rmetal1_lbl); // attaches labels
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l2n.connect (*rmetal2, *rmetal2_lbl); // attaches labels
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// Global
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l2n.connect_global (rptie, "BULK");
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l2n.connect_global (*rbulk, "BULK");
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l2n.extract_netlist ();
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// compare netlist as string
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EXPECT_EQ (l2n.netlist ()->to_string (),
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"...\n"
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);
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// doesn't do anything here, but we test that this does not destroy anything:
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l2n.netlist ()->combine_devices ();
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// make pins for named nets of top-level circuits - this way they are not purged
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l2n.netlist ()->make_top_level_pins ();
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l2n.netlist ()->purge ();
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// compare netlist as string
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EXPECT_EQ (l2n.netlist ()->to_string (),
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"...\n"
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);
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}
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