mirror of https://github.com/KLayout/klayout.git
Spice reader: subcircuits w/o pins
This happens for subcircuits which only connect to global nets. Plus: ".global" now accepts more than just one net
This commit is contained in:
parent
1bc03c3b79
commit
b7c83eaaa6
|
|
@ -417,8 +417,10 @@ bool NetlistSpiceReader::read_card ()
|
|||
|
||||
} else if (ex.test_without_case ("global")) {
|
||||
|
||||
std::string n = read_name (ex);
|
||||
m_global_nets.push_back (n);
|
||||
while (! ex.at_end ()) {
|
||||
std::string n = read_name (ex);
|
||||
m_global_nets.push_back (n);
|
||||
}
|
||||
|
||||
} else if (ex.test_without_case ("subckt")) {
|
||||
|
||||
|
|
@ -812,10 +814,6 @@ bool NetlistSpiceReader::read_element (tl::Extractor &ex, const std::string &ele
|
|||
|
||||
void NetlistSpiceReader::read_subcircuit (const std::string &sc_name, const std::string &nc_name, const std::vector<db::Net *> &nets)
|
||||
{
|
||||
if (nets.empty ()) {
|
||||
error (tl::to_string (tr ("A circuit call needs at least one net")));
|
||||
}
|
||||
|
||||
db::Circuit *cc = mp_netlist->circuit_by_name (nc_name);
|
||||
if (! cc) {
|
||||
|
||||
|
|
|
|||
|
|
@ -359,3 +359,24 @@ TEST(9_DeviceMultipliers)
|
|||
);
|
||||
}
|
||||
|
||||
TEST(10_SubcircuitsNoPins)
|
||||
{
|
||||
db::Netlist nl;
|
||||
|
||||
std::string path = tl::combine_path (tl::combine_path (tl::combine_path (tl::testsrc (), "testdata"), "algo"), "nreader10.cir");
|
||||
|
||||
db::NetlistSpiceReader reader;
|
||||
tl::InputStream is (path);
|
||||
reader.read (is, nl);
|
||||
|
||||
EXPECT_EQ (nl.to_string (),
|
||||
"circuit .TOP ();\n"
|
||||
" device RES $1 (A=VDD,B=GND) (R=1000,L=0,W=0,A=0,P=0);\n"
|
||||
" subcircuit FILLER_CAP '0' (VDD=VDD,GND=GND);\n"
|
||||
"end;\n"
|
||||
"circuit FILLER_CAP (VDD=VDD,GND=GND);\n"
|
||||
" device NMOS '0' (S=GND,G=VDD,D=GND,B=GND) (L=10,W=10,AS=0,AD=0,PS=0,PD=0);\n"
|
||||
"end;\n"
|
||||
);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,10 @@
|
|||
|
||||
.global vdd gnd
|
||||
|
||||
X0 FILLER_CAP
|
||||
R$1 vdd gnd 1k
|
||||
|
||||
.subckt FILLER_CAP
|
||||
M0 gnd vdd gnd gnd NMOS W=10u L=10u
|
||||
.ends FILLER_CAP
|
||||
|
||||
Loading…
Reference in New Issue