mirror of https://github.com/KLayout/klayout.git
Dual netlist representation (nets attached to pins and ports).
This commit is contained in:
Matthias Koefferlein
parent
654afa3ec2
commit
e51a3a9ed9
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@ -43,17 +43,66 @@ Pin::Pin (const std::string &name)
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// --------------------------------------------------------------------------------
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// Device class implementation
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Device::Device ()
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{
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// .. nothing yet ..
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}
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Device::Device (DeviceClass *device_class, const std::string &name)
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: m_device_class (device_class), m_name (name)
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{
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// .. nothing yet ..
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}
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Device::Device (const Device &other)
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{
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operator= (other);
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}
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Device &Device::operator= (const Device &other)
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{
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if (this != &other) {
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m_name = other.m_name;
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m_device_class = other.m_device_class;
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m_nets_per_port.clear ();
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}
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return *this;
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}
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void Device::set_name (const std::string &n)
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{
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m_name = n;
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}
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void Device::clear_nets_per_port ()
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{
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m_nets_per_port.clear ();
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}
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void Device::reserve_nets_per_port ()
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{
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if (m_device_class.get ()) {
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m_nets_per_port.clear ();
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m_nets_per_port.resize (m_device_class->port_definitions ().size (), 0);
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}
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}
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void Device::set_net_for_port (size_t port_id, const Net *net)
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{
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if (port_id < m_nets_per_port.size ()) {
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m_nets_per_port [port_id] = net;
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}
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}
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const Net *Device::net_for_port (size_t port_id) const
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{
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if (port_id < m_nets_per_port.size ()) {
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return m_nets_per_port [port_id];
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} else {
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return 0;
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}
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}
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// --------------------------------------------------------------------------------
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// SubCircuit class implementation
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@ -68,6 +117,22 @@ SubCircuit::SubCircuit (Circuit *circuit, const std::string &name)
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// .. nothing yet ..
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}
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SubCircuit::SubCircuit (const SubCircuit &other)
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{
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operator= (other);
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}
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SubCircuit &SubCircuit::operator= (const SubCircuit &other)
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{
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if (this != &other) {
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m_name = other.m_name;
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m_circuit = other.m_circuit;
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m_trans = other.m_trans;
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m_nets_per_pin.clear ();
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}
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return *this;
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}
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void SubCircuit::set_name (const std::string &n)
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{
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m_name = n;
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@ -78,6 +143,35 @@ void SubCircuit::set_trans (const db::DCplxTrans &t)
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m_trans = t;
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}
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void SubCircuit::clear_nets_per_pin ()
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{
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m_nets_per_pin.clear ();
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}
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void SubCircuit::reserve_nets_per_pin ()
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{
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if (m_circuit.get ()) {
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m_nets_per_pin.clear ();
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m_nets_per_pin.resize (m_circuit->pin_count (), 0);
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}
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}
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void SubCircuit::set_net_for_pin (size_t pin_id, const Net *net)
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{
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if (pin_id < m_nets_per_pin.size ()) {
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m_nets_per_pin [pin_id] = net;
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}
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}
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const Net *SubCircuit::net_for_pin (size_t pin_id) const
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{
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if (pin_id < m_nets_per_pin.size ()) {
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return m_nets_per_pin [pin_id];
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} else {
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return 0;
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}
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}
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// --------------------------------------------------------------------------------
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// NetPortRef class implementation
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@ -188,11 +282,17 @@ void Net::set_cluster_id (size_t ci)
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void Net::add_pin (const NetPinRef &pin)
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{
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m_pins.push_back (pin);
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if (mp_circuit) {
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mp_circuit->invalidate_nets_per_pin ();
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}
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}
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void Net::add_port (const NetPortRef &port)
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{
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m_ports.push_back (port);
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if (mp_circuit) {
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mp_circuit->invalidate_nets_per_pin ();
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}
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}
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void Net::translate_devices (const std::map<const Device *, Device *> &map)
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@ -224,13 +324,13 @@ void Net::set_circuit (Circuit *circuit)
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// Circuit class implementation
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Circuit::Circuit ()
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: mp_netlist (0)
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: mp_netlist (0), m_nets_per_pin_valid (false)
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{
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// .. nothing yet ..
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}
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Circuit::Circuit (const Circuit &other)
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: mp_netlist (0)
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: mp_netlist (0), m_nets_per_pin_valid (false)
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{
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operator= (other);
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}
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@ -240,6 +340,9 @@ Circuit &Circuit::operator= (const Circuit &other)
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if (this != &other) {
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m_name = other.m_name;
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m_nets_per_pin_valid = false;
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m_nets_per_pin.clear ();
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invalidate_nets_per_pin ();
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for (const_pin_iterator i = other.begin_pins (); i != other.end_pins (); ++i) {
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add_pin (*i);
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@ -291,6 +394,7 @@ void Circuit::clear ()
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m_devices.clear ();
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m_nets.clear ();
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m_sub_circuits.clear ();
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invalidate_nets_per_pin ();
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}
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void Circuit::set_name (const std::string &name)
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@ -307,37 +411,44 @@ void Circuit::add_pin (const Pin &pin)
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{
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m_pins.push_back (pin);
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m_pins.back ().set_id (m_pins.size () - 1);
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invalidate_nets_per_pin ();
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}
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void Circuit::add_net (Net *net)
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{
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m_nets.push_back (net);
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net->set_circuit (this);
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invalidate_nets_per_pin ();
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}
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void Circuit::remove_net (Net *net)
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{
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m_nets.erase (net);
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invalidate_nets_per_pin ();
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}
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void Circuit::add_device (Device *device)
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{
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m_devices.push_back (device);
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invalidate_nets_per_pin ();
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}
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void Circuit::remove_device (Device *device)
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{
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m_devices.erase (device);
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invalidate_nets_per_pin ();
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}
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void Circuit::add_sub_circuit (SubCircuit *sub_circuit)
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{
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m_sub_circuits.push_back (sub_circuit);
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invalidate_nets_per_pin ();
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}
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void Circuit::remove_sub_circuit (SubCircuit *sub_circuit)
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{
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m_sub_circuits.erase (sub_circuit);
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invalidate_nets_per_pin ();
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}
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void Circuit::translate_circuits (const std::map<const Circuit *, Circuit *> &map)
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@ -358,6 +469,87 @@ void Circuit::translate_device_classes (const std::map<const DeviceClass *, Devi
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}
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}
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const Net *Circuit::net_for_pin (size_t pin_id) const
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{
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if (! m_nets_per_pin_valid) {
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const_cast<Circuit *> (this)->validate_nets_per_pin ();
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}
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if (pin_id >= m_nets_per_pin.size ()) {
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return 0;
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} else {
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return m_nets_per_pin [pin_id];
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}
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}
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const Net *Circuit::net_for_pin (const SubCircuit *sub_circuit, size_t pin_id) const
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{
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if (! m_nets_per_pin_valid) {
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const_cast<Circuit *> (this)->validate_nets_per_pin ();
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}
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return sub_circuit->net_for_pin (pin_id);
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}
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const Net *Circuit::net_for_port (const Device *device, size_t port_id) const
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{
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if (! m_nets_per_pin_valid) {
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const_cast<Circuit *> (this)->validate_nets_per_pin ();
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}
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return device->net_for_port (port_id);
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}
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void Circuit::invalidate_nets_per_pin ()
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{
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if (m_nets_per_pin_valid) {
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m_nets_per_pin_valid = false;
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m_nets_per_pin.clear ();
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for (sub_circuit_iterator i = begin_sub_circuits (); i != end_sub_circuits (); ++i) {
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i->clear_nets_per_pin ();
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}
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for (device_iterator i = begin_devices (); i != end_devices (); ++i) {
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i->clear_nets_per_port ();
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}
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}
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}
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void Circuit::validate_nets_per_pin ()
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{
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m_nets_per_pin.clear ();
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m_nets_per_pin.resize (m_pins.size (), 0);
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for (sub_circuit_iterator i = begin_sub_circuits (); i != end_sub_circuits (); ++i) {
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i->reserve_nets_per_pin ();
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}
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for (device_iterator i = begin_devices (); i != end_devices (); ++i) {
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i->reserve_nets_per_port ();
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}
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for (net_iterator n = begin_nets (); n != end_nets (); ++n) {
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for (Net::const_pin_iterator p = n->begin_pins (); p != n->end_pins (); ++p) {
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size_t id = p->pin_id ();
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if (p->subcircuit () == 0) {
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if (id < m_nets_per_pin.size ()) {
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m_nets_per_pin [id] = n.operator-> ();
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}
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} else {
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(const_cast<SubCircuit *> (p->subcircuit ()))->set_net_for_pin (id, n.operator-> ());
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}
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}
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for (Net::const_port_iterator p = n->begin_ports (); p != n->end_ports (); ++p) {
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(const_cast<Device *> (p->device ()))->set_net_for_port (p->port_id (), n.operator-> ());
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}
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}
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m_nets_per_pin_valid = true;
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}
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// --------------------------------------------------------------------------------
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// DeviceClass class implementation
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@ -42,6 +42,7 @@ class Device;
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class DeviceClass;
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class DevicePortDefinition;
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class Netlist;
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class Net;
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/**
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* @brief The definition of a pin of a circuit
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*
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@ -102,11 +103,28 @@ class DB_PUBLIC Device
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: public tl::Object
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{
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public:
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typedef tl::vector<const Net *> connected_net_list;
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/**
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* @brief Default constructor
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*/
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Device ();
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/**
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* @brief The constructor
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*/
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Device (DeviceClass *device_class, const std::string &name = std::string ());
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/**
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* @brief Copy constructor
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*/
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Device (const Device &other);
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/**
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* @brief Assignment
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*/
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Device &operator= (const Device &other);
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/**
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* @brief Gets the device class
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*/
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@ -133,6 +151,12 @@ private:
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tl::weak_ptr<DeviceClass> m_device_class;
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std::string m_name;
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mutable connected_net_list m_nets_per_port;
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void clear_nets_per_port ();
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void reserve_nets_per_port ();
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void set_net_for_port (size_t port_id, const Net *net);
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const Net *net_for_port (size_t port_id) const;
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/**
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* @brief Sets the device class
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@ -152,11 +176,23 @@ class DB_PUBLIC SubCircuit
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: public tl::Object
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{
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public:
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typedef tl::vector<const Net *> connected_net_list;
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/**
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* @brief Default constructor
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*/
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SubCircuit ();
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/**
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* @brief Copy constructor
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*/
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SubCircuit (const SubCircuit &other);
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/**
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* @brief Assignment
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*/
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SubCircuit &operator= (const SubCircuit &other);
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/**
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* @brief Creates a subcircuit reference to the given circuit
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*/
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@ -216,6 +252,12 @@ private:
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tl::weak_ptr<Circuit> m_circuit;
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std::string m_name;
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db::DCplxTrans m_trans;
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mutable connected_net_list m_nets_per_pin;
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void clear_nets_per_pin ();
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void reserve_nets_per_pin ();
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void set_net_for_pin (size_t pin_id, const Net *net);
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const Net *net_for_pin (size_t pin_id) const;
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/**
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* @brief Sets the circuit reference
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@ -524,6 +566,7 @@ public:
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typedef tl::shared_collection<SubCircuit> sub_circuit_list;
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typedef sub_circuit_list::const_iterator const_sub_circuit_iterator;
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typedef sub_circuit_list::iterator sub_circuit_iterator;
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typedef tl::vector<const Net *> connected_net_list;
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/**
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* @brief Constructor
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@ -600,11 +643,6 @@ public:
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*/
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void add_pin (const Pin &pin);
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/**
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* @brief Deletes a pin from the circuit
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*/
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void remove_pin (Pin *pin);
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/**
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* @brief Begin iterator for the pins of the circuit (non-const version)
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*/
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@ -621,6 +659,14 @@ public:
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return m_pins.end ();
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}
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/**
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* @brief Gets the pin count
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*/
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size_t pin_count () const
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{
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return m_pins.size ();
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}
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/**
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* @brief Gets the pin by ID (the ID is basically the index)
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*/
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@ -774,8 +820,52 @@ public:
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return m_sub_circuits.end ();
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}
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/**
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* @brief Gets the connected net for a pin with the given id
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*
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* Returns 0 if the pin is not connected to a net.
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*/
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const Net *net_for_pin (size_t pin_id) const;
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/**
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* @brief Gets the connected net for a pin with the given id (non-const version)
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*
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* Returns 0 if the pin is not connected to a net.
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*/
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Net *net_for_pin (size_t pin_id)
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{
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return const_cast<Net *> (((const Circuit *) this)->net_for_pin (pin_id));
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}
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/**
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* @brief Gets the net for a given pin of a subcircuit
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*/
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const Net *net_for_pin (const SubCircuit *sub_circuit, size_t pin_id) const;
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/**
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* @brief Gets the net for a given pin of a subcircuit (non-const version)
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*/
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Net *net_for_pin (SubCircuit *sub_circuit, size_t pin_id)
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{
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return const_cast<Net *> (((const Circuit *) this)->net_for_pin (sub_circuit, pin_id));
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}
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/**
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* @brief Gets the net for a given port of a device
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*/
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const Net *net_for_port (const Device *device, size_t port_id) const;
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/**
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* @brief Gets the net for a given port of a device (non-const version)
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*/
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Net *net_for_port (Device *device, size_t port_id)
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{
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return const_cast<Net *> (((const Circuit *) this)->net_for_port (device, port_id));
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}
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private:
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friend class Netlist;
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friend class Net;
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std::string m_name;
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db::cell_index_type m_cell_index;
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@ -784,10 +874,14 @@ private:
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device_list m_devices;
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sub_circuit_list m_sub_circuits;
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Netlist *mp_netlist;
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connected_net_list m_nets_per_pin;
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bool m_nets_per_pin_valid;
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void translate_circuits (const std::map<const Circuit *, Circuit *> &map);
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void translate_device_classes (const std::map<const db::DeviceClass *, db::DeviceClass *> &map);
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void translate_device_classes (const std::map<const DeviceClass *, DeviceClass *> &map);
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void set_netlist (Netlist *netlist);
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void invalidate_nets_per_pin ();
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void validate_nets_per_pin ();
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};
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/**
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@ -164,6 +164,61 @@ static std::string nets2string (const db::Circuit &c)
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return res;
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}
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|
||||
// dual form of netlist
|
||||
static std::string netlist2 (const db::Circuit &c)
|
||||
{
|
||||
std::string res;
|
||||
|
||||
std::string pins;
|
||||
for (db::Circuit::const_pin_iterator p = c.begin_pins (); p != c.end_pins (); ++p) {
|
||||
if (! pins.empty ()) {
|
||||
pins += ",";
|
||||
}
|
||||
const db::Net *net = c.net_for_pin (p->id ());
|
||||
pins += p->name ();
|
||||
pins += "=";
|
||||
pins += net ? net->name () : std::string ("(null)");
|
||||
}
|
||||
|
||||
res += c.name () + ":" + pins + "\n";
|
||||
|
||||
for (db::Circuit::const_device_iterator d = c.begin_devices (); d != c.end_devices (); ++d) {
|
||||
if (! d->device_class ()) {
|
||||
continue;
|
||||
}
|
||||
pins.clear ();
|
||||
for (size_t i = 0; i < d->device_class ()->port_definitions ().size (); ++i) {
|
||||
if (! pins.empty ()) {
|
||||
pins += ",";
|
||||
}
|
||||
const db::Net *net = c.net_for_port (d.operator-> (), i);
|
||||
pins += d->device_class ()->port_definitions () [i].name ();
|
||||
pins += "=";
|
||||
pins += net ? net->name () : std::string ("(null)");
|
||||
}
|
||||
res += " D" + d->name () + ":" + pins + "\n";
|
||||
}
|
||||
|
||||
for (db::Circuit::const_sub_circuit_iterator s = c.begin_sub_circuits (); s != c.end_sub_circuits (); ++s) {
|
||||
if (! s->circuit ()) {
|
||||
continue;
|
||||
}
|
||||
pins.clear ();
|
||||
for (size_t i = 0; i < s->circuit ()->pin_count (); ++i) {
|
||||
if (! pins.empty ()) {
|
||||
pins += ",";
|
||||
}
|
||||
pins += s->circuit ()->pin_by_id (i)->name ();
|
||||
pins += "=";
|
||||
const db::Net *net = c.net_for_pin (s.operator-> (), i);
|
||||
pins += net ? net->name () : std::string ("(null)");
|
||||
}
|
||||
res += " X" + s->name () + ":" + pins + "\n";
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
TEST(4_CircuitDevices)
|
||||
{
|
||||
db::GenericDeviceClass dc1;
|
||||
|
|
@ -178,6 +233,7 @@ TEST(4_CircuitDevices)
|
|||
dc2.add_port_definition (db::DevicePortDefinition ("B", ""));
|
||||
|
||||
std::auto_ptr<db::Circuit> c (new db::Circuit ());
|
||||
c->set_name ("c");
|
||||
db::Device *d1 = new db::Device (&dc1, "d1");
|
||||
db::Device *d2a = new db::Device (&dc2, "d2a");
|
||||
db::Device *d2b = new db::Device (&dc2, "d2b");
|
||||
|
|
@ -186,6 +242,7 @@ TEST(4_CircuitDevices)
|
|||
c->add_device (d2b);
|
||||
|
||||
db::Net *n1 = new db::Net ();
|
||||
n1->set_name ("n1");
|
||||
EXPECT_EQ (n1->circuit (), 0);
|
||||
c->add_net (n1);
|
||||
n1->add_port (db::NetPortRef (d1, 0));
|
||||
|
|
@ -193,12 +250,14 @@ TEST(4_CircuitDevices)
|
|||
EXPECT_EQ (n1->circuit (), c.get ());
|
||||
|
||||
db::Net *n2 = new db::Net ();
|
||||
n2->set_name ("n2");
|
||||
c->add_net (n2);
|
||||
n2->add_port (db::NetPortRef (d1, 1));
|
||||
n2->add_port (db::NetPortRef (d2a, 1));
|
||||
n2->add_port (db::NetPortRef (d2b, 0));
|
||||
|
||||
db::Net *n3 = new db::Net ();
|
||||
n3->set_name ("n3");
|
||||
c->add_net (n3);
|
||||
n3->add_port (db::NetPortRef (d1, 2));
|
||||
n3->add_port (db::NetPortRef (d2b, 1));
|
||||
|
|
@ -209,6 +268,13 @@ TEST(4_CircuitDevices)
|
|||
"d1:D,d2b:B\n"
|
||||
);
|
||||
|
||||
EXPECT_EQ (netlist2 (*c),
|
||||
"c:\n"
|
||||
" Dd1:S=n1,G=n2,D=n3\n"
|
||||
" Dd2a:A=n1,B=n2\n"
|
||||
" Dd2b:A=n2,B=n3\n"
|
||||
);
|
||||
|
||||
db::Circuit cc = *c;
|
||||
c.reset (0);
|
||||
EXPECT_EQ (cc.begin_nets ()->circuit (), &cc);
|
||||
|
|
@ -218,9 +284,16 @@ TEST(4_CircuitDevices)
|
|||
"d1:G,d2a:B,d2b:A\n"
|
||||
"d1:D,d2b:B\n"
|
||||
);
|
||||
|
||||
EXPECT_EQ (netlist2 (cc),
|
||||
"c:\n"
|
||||
" Dd1:S=n1,G=n2,D=n3\n"
|
||||
" Dd2a:A=n1,B=n2\n"
|
||||
" Dd2b:A=n2,B=n3\n"
|
||||
);
|
||||
}
|
||||
|
||||
static std::string netlist2string (const db::Netlist &nl)
|
||||
static std::string nl2string (const db::Netlist &nl)
|
||||
{
|
||||
std::string res;
|
||||
for (db::Netlist::const_circuit_iterator c = nl.begin_circuits (); c != nl.end_circuits (); ++c) {
|
||||
|
|
@ -230,6 +303,16 @@ static std::string netlist2string (const db::Netlist &nl)
|
|||
return res;
|
||||
}
|
||||
|
||||
// dual form of netlist
|
||||
static std::string netlist2 (const db::Netlist &nl)
|
||||
{
|
||||
std::string res;
|
||||
for (db::Netlist::const_circuit_iterator c = nl.begin_circuits (); c != nl.end_circuits (); ++c) {
|
||||
res += netlist2 (*c);
|
||||
}
|
||||
return res;
|
||||
}
|
||||
|
||||
TEST(4_NetlistSubcircuits)
|
||||
{
|
||||
std::auto_ptr<db::Netlist> nl (new db::Netlist ());
|
||||
|
|
@ -258,37 +341,44 @@ TEST(4_NetlistSubcircuits)
|
|||
c2->add_device (d);
|
||||
|
||||
db::SubCircuit *sc1 = new db::SubCircuit (c2);
|
||||
sc1->set_name ("sc1");
|
||||
c1->add_sub_circuit (sc1);
|
||||
|
||||
db::SubCircuit *sc2 = new db::SubCircuit (c2);
|
||||
sc2->set_name ("sc2");
|
||||
c1->add_sub_circuit (sc2);
|
||||
|
||||
db::Net *n2a = new db::Net ();
|
||||
n2a->set_name ("n2a");
|
||||
n2a->add_pin (db::NetPinRef (0));
|
||||
n2a->add_port (db::NetPortRef (d, 0));
|
||||
c2->add_net (n2a);
|
||||
|
||||
db::Net *n2b = new db::Net ();
|
||||
n2b->set_name ("n2b");
|
||||
n2b->add_port (db::NetPortRef (d, 1));
|
||||
n2b->add_pin (db::NetPinRef (1));
|
||||
c2->add_net (n2b);
|
||||
|
||||
db::Net *n1a = new db::Net ();
|
||||
n1a->set_name ("n1a");
|
||||
n1a->add_pin (db::NetPinRef (0));
|
||||
n1a->add_pin (db::NetPinRef (0, sc1));
|
||||
c1->add_net (n1a);
|
||||
|
||||
db::Net *n1b = new db::Net ();
|
||||
n1b->set_name ("n1b");
|
||||
n1b->add_pin (db::NetPinRef (1, sc1));
|
||||
n1b->add_pin (db::NetPinRef (0, sc2));
|
||||
c1->add_net (n1b);
|
||||
|
||||
db::Net *n1c = new db::Net ();
|
||||
n1c->set_name ("n1c");
|
||||
n1c->add_pin (db::NetPinRef (1, sc2));
|
||||
n1c->add_pin (db::NetPinRef (1));
|
||||
c1->add_net (n1c);
|
||||
|
||||
EXPECT_EQ (netlist2string (*nl),
|
||||
EXPECT_EQ (nl2string (*nl),
|
||||
"[c1]\n"
|
||||
"+c1p1,c2:c2p1\n"
|
||||
"c2:c2p2,c2:c2p1\n"
|
||||
|
|
@ -298,12 +388,20 @@ TEST(4_NetlistSubcircuits)
|
|||
"D:B,+c2p2\n"
|
||||
);
|
||||
|
||||
EXPECT_EQ (netlist2 (*nl),
|
||||
"c1:c1p1=n1a,c1p2=n1c\n"
|
||||
" Xsc1:c2p1=n1a,c2p2=n1b\n"
|
||||
" Xsc2:c2p1=n1b,c2p2=n1c\n"
|
||||
"c2:c2p1=n2a,c2p2=n2b\n"
|
||||
" DD:A=n2a,B=n2b\n"
|
||||
);
|
||||
|
||||
db::Netlist nl2 = *nl;
|
||||
nl.reset (0);
|
||||
|
||||
EXPECT_EQ (nl2.begin_circuits ()->netlist (), &nl2);
|
||||
|
||||
EXPECT_EQ (netlist2string (nl2),
|
||||
EXPECT_EQ (nl2string (nl2),
|
||||
"[c1]\n"
|
||||
"+c1p1,c2:c2p1\n"
|
||||
"c2:c2p2,c2:c2p1\n"
|
||||
|
|
@ -312,6 +410,14 @@ TEST(4_NetlistSubcircuits)
|
|||
"D:A,+c2p1\n"
|
||||
"D:B,+c2p2\n"
|
||||
);
|
||||
|
||||
EXPECT_EQ (netlist2 (nl2),
|
||||
"c1:c1p1=n1a,c1p2=n1c\n"
|
||||
" Xsc1:c2p1=n1a,c2p2=n1b\n"
|
||||
" Xsc2:c2p1=n1b,c2p2=n1c\n"
|
||||
"c2:c2p1=n2a,c2p2=n2b\n"
|
||||
" DD:A=n2a,B=n2b\n"
|
||||
);
|
||||
}
|
||||
|
||||
TEST(5_SubCircuit)
|
||||
|
|
|
|||
Loading…
Reference in New Issue