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klayout
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WIP: attempt to retain nets which don't have active elements but pins. This is supposed to simplify debugging in case of fake pins. When removing those nets, the pin is very difficult to find.

This commit is contained in:
Matthias Koefferlein 2019-09-30 20:58:55 +02:00
parent 1c16cea421
commit 506cfc1c6f
4 changed files with 12 additions and 4 deletions
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2
src/db/db/dbCircuit.cc
View File

@ -545,7 +545,7 @@ void Circuit::purge_nets ()
{
std::vector<db::Net *> nets_to_be_purged;
for (net_iterator n = begin_nets (); n != end_nets (); ++n) {
if (n->is_floating ()) {
if (n->is_floating () && n->pin_count () == 0) {
nets_to_be_purged.push_back (n.operator-> ());
}
}

10
src/db/db/dbNetlist.cc
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@ -485,8 +485,16 @@ void Netlist::purge ()
Circuit *circuit = c.operator-> ();
// purge floating, disconnected nets
circuit->purge_nets ();
if (circuit->begin_nets () == circuit->end_nets () && ! circuit->dont_purge ()) {
// if only floating net - connected to a pin - are left, consider this circuit for purging
bool purge_candidate = ! circuit->dont_purge ();
for (db::Circuit::net_iterator n = circuit->begin_nets (); n != circuit->end_nets () && purge_candidate; ++n) {
purge_candidate = n->is_floating ();
}
if (purge_candidate) {
// No nets left: delete the subcircuits that refer to us and finally delete the circuit
while (circuit->begin_refs () != circuit->end_refs ()) {

2
src/db/unit_tests/dbLayoutToNetlistTests.cc
View File

@ -1096,7 +1096,7 @@ TEST(3_GlobalNetConnections)
" subcircuit INV2 $1 ($1=$I1,IN=$I3,$3=$I7,OUT=$I4,VSS=$I5,VDD=$I6,BULK=BULK);\n"
" subcircuit INV2 $2 ($1=$I1,IN=$I4,$3=$I8,OUT=$I2,VSS=$I5,VDD=$I6,BULK=BULK);\n"
"end;\n"
"circuit INV2 ($1=(null),IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=(null));\n"
"circuit INV2 ($1=$1,IN=IN,$3=$3,OUT=OUT,VSS=VSS,VDD=VDD,BULK=BULK);\n"
" device PMOS $1 (S=$3,G=IN,D=VDD) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n"
" device PMOS $2 (S=VDD,G=$3,D=OUT) (L=0.25,W=0.95,AS=0.26125,AD=0.49875,PS=1.5,PD=2.95);\n"
" device NMOS $3 (S=$3,G=IN,D=VSS) (L=0.25,W=0.95,AS=0.49875,AD=0.26125,PS=2.95,PD=1.5);\n"

2
src/db/unit_tests/dbNetlistTests.cc
View File

@ -1380,7 +1380,7 @@ TEST(22_BlankCircuit)
nl2.purge ();
EXPECT_EQ (nl2.to_string (),
"circuit RINGO (IN=(null),OSC=OSC,VSS=VSS,VDD=VDD);\n"
"circuit RINGO (IN=IN,OSC=OSC,VSS=VSS,VDD=VDD);\n"
" subcircuit INV2 INV2_SC1 (IN=$I8,$2=FB,OUT=OSC,$4=VSS,$5=VDD);\n"
" subcircuit INV2 INV2_SC2 (IN=FB,$2=(null),OUT=$I8,$4=VSS,$5=VDD);\n"
"end;\n"