mirror of https://github.com/KLayout/klayout.git
WIP: performance improvement.
This commit is contained in:
Matthias Koefferlein
parent
81bf47688e
commit
68fe668567
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@ -433,7 +433,7 @@ DeepShapeStore::cell_mapping_to_original (size_t layout_index, db::Layout *into_
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}
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if (! skip) {
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cm->second.map (m->first.first, m->second);
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cm->second.map (m->second, m->first.first);
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}
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}
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@ -25,6 +25,9 @@
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#include "dbHierNetworkProcessor.h"
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#include "dbDeepRegion.h"
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#include "tlProgress.h"
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#include "tlTimer.h"
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namespace db
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{
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@ -156,23 +159,53 @@ void NetlistDeviceExtractor::extract_without_initialize (db::Layout &layout, db:
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}
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// collect the cells below the top cell
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std::set<db::cell_index_type> all_called_cells;
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all_called_cells.insert (cell.cell_index ());
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cell.collect_called_cells (all_called_cells);
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// ignore device cells from previous extractions
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std::set<db::cell_index_type> called_cells;
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called_cells.insert (cell.cell_index ());
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cell.collect_called_cells (called_cells);
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for (std::set<db::cell_index_type>::const_iterator ci = all_called_cells.begin (); ci != all_called_cells.end (); ++ci) {
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if (! m_netlist->device_abstract_by_cell_index (*ci)) {
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called_cells.insert (*ci);
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}
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}
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all_called_cells.clear ();
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// build the device clusters
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db::Connectivity device_conn = get_connectivity (layout, layers);
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db::hier_clusters<shape_type> device_clusters;
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device_clusters.build (layout, cell, shape_iter_flags, device_conn);
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tl::SelfTimer timer (tl::verbosity () >= 21, tl::to_string (tr ("Extracting devices")));
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// count effort and make a progress reporter
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size_t n = 0;
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for (std::set<db::cell_index_type>::const_iterator ci = called_cells.begin (); ci != called_cells.end (); ++ci) {
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db::connected_clusters<shape_type> cc = device_clusters.clusters_per_cell (*ci);
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for (db::connected_clusters<shape_type>::all_iterator c = cc.begin_all (); !c.at_end(); ++c) {
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if (cc.is_root (*c)) {
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++n;
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}
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}
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}
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tl::RelativeProgress progress (tl::to_string (tr ("Extracting devices")), n, 1);
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struct ExtractorCacheValueType {
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ExtractorCacheValueType () : circuit (0) { }
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db::Circuit *circuit;
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db::Vector disp;
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std::map<size_t, geometry_per_terminal_type> geometry;
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};
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typedef std::map<std::vector<db::Region>, ExtractorCacheValueType> extractor_cache_type;
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extractor_cache_type extractor_cache;
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// for each cell investigate the clusters
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for (std::set<db::cell_index_type>::const_iterator ci = called_cells.begin (); ci != called_cells.end (); ++ci) {
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// skip device cells from previous extractions
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if (m_netlist->device_abstract_by_cell_index (*ci)) {
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continue;
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}
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m_cell_index = *ci;
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std::map<db::cell_index_type, db::Circuit *>::const_iterator c2c = circuits_by_cell.find (*ci);
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@ -200,6 +233,8 @@ void NetlistDeviceExtractor::extract_without_initialize (db::Layout &layout, db:
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continue;
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}
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++progress;
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// build layer geometry from the cluster found
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std::vector<db::Region> layer_geometry;
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@ -210,28 +245,55 @@ void NetlistDeviceExtractor::extract_without_initialize (db::Layout &layout, db:
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for (db::recursive_cluster_shape_iterator<shape_type> si (device_clusters, *l, *ci, *c); ! si.at_end(); ++si) {
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insert_into_region (*si, si.trans (), r);
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}
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// r.merge ()???
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}
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// do the actual device extraction
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extract_devices (layer_geometry);
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db::Box box;
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for (std::vector<db::Region>::const_iterator g = layer_geometry.begin (); g != layer_geometry.end (); ++g) {
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box += g->bbox ();
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}
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// push the new devices to the layout
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push_new_devices ();
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db::Vector disp = box.p1 () - db::Point ();
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for (std::vector<db::Region>::iterator g = layer_geometry.begin (); g != layer_geometry.end (); ++g) {
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g->transform (db::Disp (-disp));
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}
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extractor_cache_type::const_iterator ec = extractor_cache.find (layer_geometry);
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if (ec == extractor_cache.end ()) {
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// do the actual device extraction
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extract_devices (layer_geometry);
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// push the new devices to the layout
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push_new_devices (disp);
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ExtractorCacheValueType &ecv = extractor_cache [layer_geometry];
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ecv.disp = disp;
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ecv.circuit = mp_circuit;
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ecv.geometry.swap (m_new_devices);
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} else {
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push_cached_devices (ec->second.circuit, ec->second.geometry, ec->second.disp, disp);
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}
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}
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}
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}
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void NetlistDeviceExtractor::push_new_devices ()
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void NetlistDeviceExtractor::push_new_devices (const db::Vector &disp_cache)
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{
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db::VCplxTrans dbu_inv = db::CplxTrans (mp_layout->dbu ()).inverted ();
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db::CplxTrans dbu = db::CplxTrans (mp_layout->dbu ());
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db::VCplxTrans dbu_inv = dbu.inverted ();
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for (std::map<size_t, geometry_per_terminal_type>::const_iterator d = m_new_devices.begin (); d != m_new_devices.end (); ++d) {
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db::Device *device = mp_circuit->device_by_id (d->first);
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db::Vector disp = dbu_inv * device->position () - db::Point ();
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device->set_position (device->position () + dbu * disp_cache);
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DeviceCellKey key;
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@ -302,12 +364,36 @@ void NetlistDeviceExtractor::push_new_devices ()
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ps.insert (std::make_pair (m_device_id_propname_id, tl::Variant (d->first)));
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db::properties_id_type pi = mp_layout->properties_repository ().properties_id (ps);
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db::CellInstArrayWithProperties inst (db::CellInstArray (db::CellInst (c->second.first), db::Trans (disp)), pi);
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db::CellInstArrayWithProperties inst (db::CellInstArray (db::CellInst (c->second.first), db::Trans (disp_cache + disp)), pi);
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mp_layout->cell (m_cell_index).insert (inst);
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}
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}
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m_new_devices.clear ();
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void NetlistDeviceExtractor::push_cached_devices (db::Circuit *circuit, const std::map<size_t, geometry_per_terminal_type> &cached_devices, const db::Vector &disp_cache, const db::Vector &new_disp)
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{
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db::CplxTrans dbu = db::CplxTrans (mp_layout->dbu ());
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db::VCplxTrans dbu_inv = dbu.inverted ();
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db::PropertiesRepository::properties_set ps;
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for (std::map<size_t, geometry_per_terminal_type>::const_iterator d = cached_devices.begin (); d != cached_devices.end (); ++d) {
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db::Device *cached_device = circuit->device_by_id (d->first);
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db::Vector disp = dbu_inv * cached_device->position () - disp_cache - db::Point ();
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db::Device *device = new db::Device (*cached_device);
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mp_circuit->add_device (device);
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device->set_position (device->position () + dbu * (new_disp - disp_cache));
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// Build a property set for the device ID
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ps.clear ();
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ps.insert (std::make_pair (m_device_id_propname_id, tl::Variant (device->id ())));
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db::properties_id_type pi = mp_layout->properties_repository ().properties_id (ps);
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db::CellInstArrayWithProperties inst (db::CellInstArray (db::CellInst (device->device_abstract ()->cell_index ()), db::Trans (new_disp + disp)), pi);
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mp_layout->cell (m_cell_index).insert (inst);
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}
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}
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void NetlistDeviceExtractor::setup ()
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@ -521,7 +521,8 @@ private:
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void initialize (db::Netlist *nl);
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void extract_without_initialize (db::Layout &layout, db::Cell &cell, hier_clusters_type &clusters, const std::vector<unsigned int> &layers);
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void push_new_devices ();
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void push_new_devices (const Vector &disp_cache);
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void push_cached_devices (db::Circuit *circuit, const std::map<size_t, geometry_per_terminal_type> &cached_devices, const db::Vector &disp_cache, const db::Vector &new_disp);
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};
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}
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@ -340,3 +340,210 @@ TEST(1_DeviceAndNetExtraction)
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db::compare_layouts (_this, ly, au);
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}
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TEST(2_DeviceAndNetExtractionFlat)
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{
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db::Layout ly (true);
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db::LayerMap lmap;
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unsigned int nwell = define_layer (ly, lmap, 1);
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unsigned int active = define_layer (ly, lmap, 2);
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unsigned int poly = define_layer (ly, lmap, 3);
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unsigned int poly_lbl = define_layer (ly, lmap, 3, 1);
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unsigned int diff_cont = define_layer (ly, lmap, 4);
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unsigned int poly_cont = define_layer (ly, lmap, 5);
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unsigned int metal1 = define_layer (ly, lmap, 6);
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unsigned int metal1_lbl = define_layer (ly, lmap, 6, 1);
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unsigned int via1 = define_layer (ly, lmap, 7);
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unsigned int metal2 = define_layer (ly, lmap, 8);
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unsigned int metal2_lbl = define_layer (ly, lmap, 8, 1);
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{
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db::LoadLayoutOptions options;
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options.get_options<db::CommonReaderOptions> ().layer_map = lmap;
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options.get_options<db::CommonReaderOptions> ().create_other_layers = false;
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std::string fn (tl::testsrc ());
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fn = tl::combine_path (fn, "testdata");
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fn = tl::combine_path (fn, "algo");
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fn = tl::combine_path (fn, "device_extract_l1.gds");
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tl::InputStream stream (fn);
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db::Reader reader (stream);
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reader.read (ly, options);
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ly.flatten (ly.cell (*ly.begin_top_down ()), -1, true);
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}
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db::Cell &tc = ly.cell (*ly.begin_top_down ());
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db::DeepShapeStore dss;
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dss.set_text_enlargement (1);
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dss.set_text_property_name (tl::Variant ("LABEL"));
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// original layers
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db::Region rnwell (db::RecursiveShapeIterator (ly, tc, nwell), dss);
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db::Region ractive (db::RecursiveShapeIterator (ly, tc, active), dss);
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db::Region rpoly (db::RecursiveShapeIterator (ly, tc, poly), dss);
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db::Region rpoly_lbl (db::RecursiveShapeIterator (ly, tc, poly_lbl), dss);
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db::Region rdiff_cont (db::RecursiveShapeIterator (ly, tc, diff_cont), dss);
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db::Region rpoly_cont (db::RecursiveShapeIterator (ly, tc, poly_cont), dss);
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db::Region rmetal1 (db::RecursiveShapeIterator (ly, tc, metal1), dss);
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db::Region rmetal1_lbl (db::RecursiveShapeIterator (ly, tc, metal1_lbl), dss);
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db::Region rvia1 (db::RecursiveShapeIterator (ly, tc, via1), dss);
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db::Region rmetal2 (db::RecursiveShapeIterator (ly, tc, metal2), dss);
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db::Region rmetal2_lbl (db::RecursiveShapeIterator (ly, tc, metal2_lbl), dss);
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// derived regions
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db::Region rpactive = ractive & rnwell;
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db::Region rpgate = rpactive & rpoly;
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db::Region rpsd = rpactive - rpgate;
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db::Region rnactive = ractive - rnwell;
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db::Region rngate = rnactive & rpoly;
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db::Region rnsd = rnactive - rngate;
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// return the computed layers into the original layout and write it for debugging purposes
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unsigned int lgate = ly.insert_layer (db::LayerProperties (10, 0)); // 10/0 -> Gate
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unsigned int lsd = ly.insert_layer (db::LayerProperties (11, 0)); // 11/0 -> Source/Drain
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unsigned int lpdiff = ly.insert_layer (db::LayerProperties (12, 0)); // 12/0 -> P Diffusion
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unsigned int lndiff = ly.insert_layer (db::LayerProperties (13, 0)); // 13/0 -> N Diffusion
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rpgate.insert_into (&ly, tc.cell_index (), lgate);
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rngate.insert_into (&ly, tc.cell_index (), lgate);
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rpsd.insert_into (&ly, tc.cell_index (), lsd);
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rnsd.insert_into (&ly, tc.cell_index (), lsd);
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rpsd.insert_into (&ly, tc.cell_index (), lpdiff);
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rnsd.insert_into (&ly, tc.cell_index (), lndiff);
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// perform the extraction
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db::Netlist nl;
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db::hier_clusters<db::PolygonRef> cl;
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db::NetlistDeviceExtractorMOS3Transistor pmos_ex ("PMOS");
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db::NetlistDeviceExtractorMOS3Transistor nmos_ex ("NMOS");
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db::NetlistDeviceExtractor::input_layers dl;
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dl["SD"] = &rpsd;
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dl["G"] = &rpgate;
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dl["P"] = &rpoly; // not needed for extraction but to return terminal shapes
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pmos_ex.extract (dss, dl, nl, cl);
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dl["SD"] = &rnsd;
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dl["G"] = &rngate;
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dl["P"] = &rpoly; // not needed for extraction but to return terminal shapes
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nmos_ex.extract (dss, dl, nl, cl);
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// perform the net extraction
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db::NetlistExtractor net_ex;
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db::Connectivity conn;
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// Intra-layer
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conn.connect (rpsd);
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conn.connect (rnsd);
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conn.connect (rpoly);
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conn.connect (rdiff_cont);
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conn.connect (rpoly_cont);
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conn.connect (rmetal1);
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conn.connect (rvia1);
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conn.connect (rmetal2);
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// Inter-layer
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conn.connect (rpsd, rdiff_cont);
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conn.connect (rnsd, rdiff_cont);
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conn.connect (rpoly, rpoly_cont);
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conn.connect (rpoly_cont, rmetal1);
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conn.connect (rdiff_cont, rmetal1);
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conn.connect (rmetal1, rvia1);
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conn.connect (rvia1, rmetal2);
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conn.connect (rpoly, rpoly_lbl); // attaches labels
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conn.connect (rmetal1, rmetal1_lbl); // attaches labels
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conn.connect (rmetal2, rmetal2_lbl); // attaches labels
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// extract the nets
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net_ex.extract_nets (dss, conn, nl, cl);
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// debug layers produced for nets
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// 202/0 -> Active
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// 203/0 -> Poly
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// 204/0 -> Diffusion contacts
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// 205/0 -> Poly contacts
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// 206/0 -> Metal1
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// 207/0 -> Via1
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// 208/0 -> Metal2
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// 210/0 -> N source/drain
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// 211/0 -> P source/drain
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std::map<unsigned int, unsigned int> dump_map;
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dump_map [layer_of (rpsd) ] = ly.insert_layer (db::LayerProperties (210, 0));
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dump_map [layer_of (rnsd) ] = ly.insert_layer (db::LayerProperties (211, 0));
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dump_map [layer_of (rpoly) ] = ly.insert_layer (db::LayerProperties (203, 0));
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dump_map [layer_of (rdiff_cont)] = ly.insert_layer (db::LayerProperties (204, 0));
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dump_map [layer_of (rpoly_cont)] = ly.insert_layer (db::LayerProperties (205, 0));
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dump_map [layer_of (rmetal1) ] = ly.insert_layer (db::LayerProperties (206, 0));
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dump_map [layer_of (rvia1) ] = ly.insert_layer (db::LayerProperties (207, 0));
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dump_map [layer_of (rmetal2) ] = ly.insert_layer (db::LayerProperties (208, 0));
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// write nets to layout
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db::CellMapping cm = dss.cell_mapping_to_original (0, &ly, tc.cell_index ());
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dump_nets_to_layout (nl, cl, ly, dump_map, cm);
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// compare netlist as string
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// NOTE: some of the nets are called IN,OUT but are different ones. They
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// happen to be the same because they share the same label.
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EXPECT_EQ (nl.to_string (),
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"Circuit RINGO ():\n"
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" DPMOS $1 (S='IN,FB',G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $2 (S=VDD,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $3 (S=$18,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $4 (S=VDD,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $5 (S=$16,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $6 (S=VDD,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $7 (S=$14,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $8 (S=VDD,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $9 (S=$12,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $10 (S=VDD,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $11 (S=$4,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $12 (S=VDD,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
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" DPMOS $13 (S=$8,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
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" DPMOS $14 (S=VDD,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DPMOS $15 (S=$6,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DPMOS $16 (S=VDD,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DPMOS $17 (S=$2,G='IN,FB',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DPMOS $18 (S=VDD,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DPMOS $19 (S=$10,G='IN,OUT',D=VDD) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DPMOS $20 (S=VDD,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $21 (S='IN,FB',G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $22 (S=VSS,G='IN,FB',D='OUT,OSC') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $23 (S=$16,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $24 (S=VSS,G=$16,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $25 (S=$14,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $26 (S=VSS,G=$14,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $27 (S=$12,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $28 (S=VSS,G=$12,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $29 (S=$4,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $30 (S=VSS,G=$4,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $31 (S=$18,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $32 (S=VSS,G=$18,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $33 (S=$2,G='IN,FB',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $34 (S=VSS,G=$2,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $35 (S=$10,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $36 (S=VSS,G=$10,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $37 (S=$6,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $38 (S=VSS,G=$6,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
" DNMOS $39 (S=$8,G='IN,OUT',D=VSS) [L=0.25,W=0.95,AS=0.49875,AD=0.26125]\n"
|
||||
" DNMOS $40 (S=VSS,G=$8,D='IN,OUT') [L=0.25,W=0.95,AS=0.26125,AD=0.49875]\n"
|
||||
);
|
||||
|
||||
// compare the collected test data
|
||||
|
||||
std::string au = tl::testsrc ();
|
||||
au = tl::combine_path (au, "testdata");
|
||||
au = tl::combine_path (au, "algo");
|
||||
au = tl::combine_path (au, "device_extract_au1_flat.gds");
|
||||
|
||||
db::compare_layouts (_this, ly, au);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue