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klayout
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WIP: unit tests updated

This commit is contained in:
Matthias Koefferlein 2019-06-22 10:15:32 +02:00
parent 847f60947d
commit 46dafd50ea
10 changed files with 68 additions and 31 deletions
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2
src/db/db/dbLayoutToNetlistWriter.cc
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@ -577,7 +577,7 @@ void std_writer_impl<Keys>::write (const db::LayoutToNetlist * /*l2n*/, const db
}
if (! device.name ().empty ()) {
*mp_stream << " " << Keys::name_key << "(" << tl::to_word_or_quoted_string (device.name ()) << ")";
*mp_stream << indent << indent2 << Keys::name_key << "(" << tl::to_word_or_quoted_string (device.name ()) << ")" << endl;
}
for (std::vector<DeviceParameterDefinition>::const_iterator i = pd.begin (); i != pd.end (); ++i) {

32
src/db/db/dbLayoutVsSchematicFormatDefs.cc
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@ -31,25 +31,25 @@ namespace lvs_std_format
DB_PUBLIC std::string ShortKeys::lvs_magic_string (lvs_magic_string_cstr);
DB_PUBLIC std::string LongKeys::lvs_magic_string (lvs_magic_string_cstr);
DB_PUBLIC std::string ShortKeys::reference_key ("reference");
DB_PUBLIC std::string ShortKeys::layout_key ("layout");
DB_PUBLIC std::string ShortKeys::xref_key ("xref");
DB_PUBLIC std::string LongKeys::reference_key ("reference");
DB_PUBLIC std::string LongKeys::layout_key ("layout");
DB_PUBLIC std::string LongKeys::xref_key ("xref");
DB_PUBLIC std::string ShortKeys::mismatch_key ("mismatch");
DB_PUBLIC std::string ShortKeys::match_key ("match");
DB_PUBLIC std::string ShortKeys::nomatch_key ("nomatch");
DB_PUBLIC std::string ShortKeys::warning_key ("warning");
DB_PUBLIC std::string ShortKeys::skipped_key ("skipped");
DB_PUBLIC std::string LongKeys::mismatch_key ("mismatch");
DB_PUBLIC std::string LongKeys::match_key ("match");
DB_PUBLIC std::string LongKeys::nomatch_key ("nomatch");
DB_PUBLIC std::string LongKeys::warning_key ("warning");
DB_PUBLIC std::string LongKeys::skipped_key ("skipped");
DB_PUBLIC std::string LongKeys::reference_key ("H");
DB_PUBLIC std::string LongKeys::layout_key ("J");
DB_PUBLIC std::string LongKeys::xref_key ("Z");
DB_PUBLIC std::string ShortKeys::reference_key ("H");
DB_PUBLIC std::string ShortKeys::layout_key ("J");
DB_PUBLIC std::string ShortKeys::xref_key ("Z");
DB_PUBLIC std::string LongKeys::mismatch_key ("0");
DB_PUBLIC std::string LongKeys::match_key ("1");
DB_PUBLIC std::string LongKeys::nomatch_key ("X");
DB_PUBLIC std::string LongKeys::warning_key ("W");
DB_PUBLIC std::string LongKeys::skipped_key ("S");
DB_PUBLIC std::string ShortKeys::mismatch_key ("0");
DB_PUBLIC std::string ShortKeys::match_key ("1");
DB_PUBLIC std::string ShortKeys::nomatch_key ("X");
DB_PUBLIC std::string ShortKeys::warning_key ("W");
DB_PUBLIC std::string ShortKeys::skipped_key ("S");
}
}

22
src/db/db/gsiDeclDbNetlist.cc
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@ -29,6 +29,7 @@
#include "tlException.h"
#include "tlInternational.h"
#include "tlStream.h"
#include "tlGlobPattern.h"
namespace gsi
{
@ -1275,6 +1276,21 @@ static void read_netlist (db::Netlist *nl, const std::string &file, db::NetlistR
reader->read (os, *nl);
}
static void flatten_circuit_by_name (db::Netlist *nl, const std::string &name_pattern)
{
std::list<db::Circuit *> circuits_to_flatten;
tl::GlobPattern pat (name_pattern);
for (db::Netlist::circuit_iterator c = nl->begin_circuits (); c != nl->end_circuits (); ++c) {
if (pat.match (c->name ())) {
circuits_to_flatten.push_back (c.operator-> ());
}
}
for (std::list<db::Circuit *>::const_iterator c = circuits_to_flatten.begin (); c != circuits_to_flatten.end (); ++c) {
nl->flatten_circuit (*c);
}
}
Class<db::Netlist> decl_dbNetlist ("db", "Netlist",
gsi::method_ext ("add", &gsi::add_circuit, gsi::arg ("circuit"),
"@brief Adds the circuit to the netlist\n"
@ -1290,6 +1306,12 @@ Class<db::Netlist> decl_dbNetlist ("db", "Netlist",
"This method will substitute all instances (subcircuits) of the given circuit by it's "
"contents. After this, the circuit is removed."
) +
gsi::method_ext ("flatten_circuit", &flatten_circuit_by_name, gsi::arg ("pattern"),
"@brief Flattens circuits matching a certain pattern\n"
"This method will substitute all instances (subcircuits) of all circuits with names matching the given name pattern. "
"The name pattern is a glob expression. For example, 'flatten_circuit(\"np*\")' will flatten all circuits witt names "
"starting with 'np'."
) +
gsi::method ("circuit_by_cell_index", (db::Circuit *(db::Netlist::*) (db::cell_index_type)) &db::Netlist::circuit_by_cell_index, gsi::arg ("cell_index"),
"@brief Gets the circuit object for a given cell index.\n"
"If the cell index is not valid or no circuit is registered with this index, nil is returned."

BIN
testdata/algo/bipolar_devices_nets.gds vendored
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Binary file not shown.

6
testdata/algo/lvs_test1_au.lvsdb vendored
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@ -799,7 +799,8 @@ reference(
# Devices and their connections
device(1 PMOS
name($1) param(L 0.25)
name($1)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)
@ -811,7 +812,8 @@ reference(
terminal(B 1)
)
device(2 NMOS
name($3) param(L 0.25)
name($3)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)

6
testdata/algo/lvs_test1b_au.lvsdb vendored
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@ -799,7 +799,8 @@ reference(
# Devices and their connections
device(1 PMOS
name($1) param(L 0.25)
name($1)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)
@ -811,7 +812,8 @@ reference(
terminal(B 1)
)
device(2 NMOS
name($3) param(L 0.25)
name($3)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)

6
testdata/algo/lvs_test2_au.lvsdb vendored
View File

@ -799,7 +799,8 @@ reference(
# Devices and their connections
device(1 PMOS
name($1) param(L 0.25)
name($1)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)
@ -811,7 +812,8 @@ reference(
terminal(B 1)
)
device(2 NMOS
name($3) param(L 0.25)
name($3)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)

6
testdata/algo/lvs_test2b_au.lvsdb vendored
View File

@ -799,7 +799,8 @@ reference(
# Devices and their connections
device(1 PMOS
name($1) param(L 0.25)
name($1)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)
@ -811,7 +812,8 @@ reference(
terminal(B 1)
)
device(2 NMOS
name($3) param(L 0.25)
name($3)
param(L 0.25)
param(W 3.5)
param(AS 1.4)
param(AD 1.4)

4
testdata/ruby/dbNetlist.rb vendored
View File

@ -829,6 +829,7 @@ circuit NTRANS ($1=$1,$2=$2,$3=$3);
end;
END
nl3 = nl2.dup
nl2.flatten_circuit(nl2.circuit_by_name("PTRANS"))
nl2.flatten_circuit(nl2.circuit_by_name("NTRANS"))
@ -841,6 +842,9 @@ circuit INV2 (IN=IN,$2=$2,OUT=OUT,$4=$4,$5=$5);
end;
END
nl3.flatten_circuit("{N,P}TRANS")
assert_equal(nl3.to_s, nl2.to_s)
end
end

15
testdata/ruby/dbNetlistDeviceClasses.rb vendored
View File

@ -484,6 +484,7 @@ END
d1.set_parameter(RBA::DeviceClassBJT3Transistor::PARAM_PE, 12.0)
d1.set_parameter(RBA::DeviceClassBJT3Transistor::PARAM_PB, 13.0)
d1.set_parameter(RBA::DeviceClassBJT3Transistor::PARAM_PC, 14.0)
d1.set_parameter(RBA::DeviceClassBJT3Transistor::PARAM_NE, 2.0)
d2 = circuit.create_device(cls, "d2")
d2.set_parameter("AE", 2.0)
d2.set_parameter("AB", 3.0)
@ -491,6 +492,7 @@ END
d2.set_parameter("PE", 13.0)
d2.set_parameter("PB", 14.0)
d2.set_parameter("PC", 15.0)
d2.set_parameter("NE", 3.0)
pin_a = circuit.create_pin ("A")
pin_b = circuit.create_pin ("B")
@ -513,8 +515,8 @@ END
assert_equal(nl.to_s, <<END)
circuit '' (A=n1,B=n2,C=n3);
device '' d1 (C=n1,B=n3,E=n2) (AE=1,PE=12,AB=2,PB=13,AC=3,PC=14);
device '' d2 (C=n1,B=n3,E=n2) (AE=2,PE=13,AB=3,PB=14,AC=4,PC=15);
device '' d1 (C=n1,B=n3,E=n2) (AE=1,PE=12,AB=2,PB=13,AC=3,PC=14,NE=2);
device '' d2 (C=n1,B=n3,E=n2) (AE=2,PE=13,AB=3,PB=14,AC=4,PC=15,NE=3);
end;
END
@ -523,7 +525,7 @@ END
assert_equal(nl.to_s, <<END)
circuit '' (A=n1,B=n2,C=n3);
device '' d1 (C=n1,B=n3,E=n2) (AE=3,PE=25,AB=5,PB=27,AC=7,PC=29);
device '' d1 (C=n1,B=n3,E=n2) (AE=3,PE=25,AB=5,PB=27,AC=7,PC=29,NE=5);
end;
END
@ -553,6 +555,7 @@ END
d2.set_parameter("PE", 13.0)
d2.set_parameter("PB", 14.0)
d2.set_parameter("PC", 15.0)
d2.set_parameter("NE", 2.0)
pin_a = circuit.create_pin ("A")
pin_b = circuit.create_pin ("B")
@ -581,8 +584,8 @@ END
assert_equal(nl.to_s, <<END)
circuit '' (A=n1,B=n2,C=n3,D=n4);
device '' d1 (C=n1,B=n3,E=n2,S=n4) (AE=1,PE=12,AB=2,PB=13,AC=3,PC=14);
device '' d2 (C=n1,B=n3,E=n2,S=n4) (AE=2,PE=13,AB=3,PB=14,AC=4,PC=15);
device '' d1 (C=n1,B=n3,E=n2,S=n4) (AE=1,PE=12,AB=2,PB=13,AC=3,PC=14,NE=1);
device '' d2 (C=n1,B=n3,E=n2,S=n4) (AE=2,PE=13,AB=3,PB=14,AC=4,PC=15,NE=2);
end;
END
@ -591,7 +594,7 @@ END
assert_equal(nl.to_s, <<END)
circuit '' (A=n1,B=n2,C=n3,D=n4);
device '' d1 (C=n1,B=n3,E=n2,S=n4) (AE=3,PE=25,AB=5,PB=27,AC=7,PC=29);
device '' d1 (C=n1,B=n3,E=n2,S=n4) (AE=3,PE=25,AB=5,PB=27,AC=7,PC=29,NE=3);
end;
END