mirror of https://github.com/KLayout/klayout.git
WIP: LVSDB reader/writer: bugfixes, refactoring, tests.
This commit is contained in:
Matthias Koefferlein
parent
81e512e1cd
commit
ea8320dcf8
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@ -60,7 +60,7 @@ typedef l2n_std_format::keys<true> skeys;
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typedef l2n_std_format::keys<false> lkeys;
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LayoutToNetlistStandardReader::LayoutToNetlistStandardReader (tl::InputStream &stream)
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: m_stream (stream), m_path (stream.absolute_path ())
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: m_stream (stream), m_path (stream.absolute_path ()), m_dbu (0.0)
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{
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skip ();
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}
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@ -147,6 +147,7 @@ static db::Region &layer_by_name (db::LayoutToNetlist *l2n, const std::string &n
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void LayoutToNetlistStandardReader::read_netlist (db::Netlist *netlist, db::LayoutToNetlist *l2n, bool nested, std::map<const db::Circuit *, std::map<unsigned int, Net *> > *id2net_per_circuit)
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{
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m_dbu = 0.001;
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int version = 0;
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std::string description;
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@ -182,11 +183,13 @@ void LayoutToNetlistStandardReader::read_netlist (db::Netlist *netlist, db::Layo
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read_word_or_quoted (description);
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br.done ();
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} else if (l2n && (test (skeys::unit_key) || test (lkeys::unit_key))) {
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} else if (test (skeys::unit_key) || test (lkeys::unit_key)) {
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Brace br (this);
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double dbu = read_double ();
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l2n->internal_layout ()->dbu (dbu);
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m_dbu = read_double ();
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if (l2n) {
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l2n->internal_layout ()->dbu (m_dbu);
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}
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br.done ();
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} else if (l2n && (test (skeys::top_key) || test (lkeys::top_key))) {
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@ -557,8 +560,7 @@ LayoutToNetlistStandardReader::read_device (db::Netlist *netlist, db::LayoutToNe
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circuit->add_device (device);
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db::Coord x = 0, y = 0;
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double dbu = l2n->internal_layout ()->dbu ();
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db::VCplxTrans dbu_inv (1.0 / dbu);
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db::VCplxTrans dbu_inv (1.0 / m_dbu);
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size_t max_tid = 0;
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@ -586,7 +588,7 @@ LayoutToNetlistStandardReader::read_device (db::Netlist *netlist, db::LayoutToNe
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db::DeviceAbstract *da = device_model_by_name (netlist, n).first;
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device->other_abstracts ().push_back (db::DeviceAbstractRef (da, db::DVector (dbu * dx, dbu * dy)));
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device->other_abstracts ().push_back (db::DeviceAbstractRef (da, db::DVector (m_dbu * dx, m_dbu * dy)));
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} else if (test (skeys::connect_key) || test (lkeys::connect_key)) {
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@ -659,7 +661,7 @@ LayoutToNetlistStandardReader::read_device (db::Netlist *netlist, db::LayoutToNe
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}
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device->set_position (db::DPoint (dbu * x, dbu * y));
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device->set_position (db::DPoint (m_dbu * x, m_dbu * y));
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br.done ();
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@ -824,8 +826,7 @@ LayoutToNetlistStandardReader::read_subcircuit (db::Netlist *netlist, db::Layout
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if (l2n) {
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double dbu = l2n->internal_layout ()->dbu ();
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subcircuit->set_trans (db::DCplxTrans (mag, angle, mirror, db::DVector (dbu * x, dbu * y)));
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subcircuit->set_trans (db::DCplxTrans (mag, angle, mirror, db::DVector (m_dbu * x, m_dbu * y)));
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db::CellInstArray inst (db::CellInst (circuit_ref->cell_index ()), db::ICplxTrans (mag, angle, mirror, db::Vector (x, y)));
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db::Cell &ccell = l2n->internal_layout ()->cell (circuit->cell_index ());
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@ -95,8 +95,16 @@ protected:
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void read_netlist (Netlist *netlist, db::LayoutToNetlist *l2n, bool nested = false, std::map<const db::Circuit *, std::map<unsigned int, Net *> > *id2net_per_circuit = 0);
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static size_t terminal_id (const db::DeviceClass *device_class, const std::string &tname);
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static std::pair<db::DeviceAbstract *, const db::DeviceClass *> device_model_by_name (db::Netlist *netlist, const std::string &dmname);
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tl::TextInputStream &stream ();
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const std::string &path () const;
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const std::string &path () const
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{
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return m_path;
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}
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tl::TextInputStream &stream ()
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{
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return m_stream;
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}
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struct Connections
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{
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@ -129,6 +137,7 @@ private:
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tl::TextInputStream m_stream;
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std::string m_path;
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std::string m_line;
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double m_dbu;
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tl::Extractor m_ex;
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db::Point m_ref;
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};
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@ -90,10 +90,6 @@ void std_writer_impl<Keys>::write (const db::Netlist *nl, const db::LayoutToNetl
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*mp_stream << "#%l2n-klayout" << endl;
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}
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if (! Keys::is_short ()) {
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*mp_stream << endl << indent << "# General section" << endl << endl;
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}
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if (version > 0) {
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*mp_stream << indent << Keys::version_key << "(" << version << ")" << endl;
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}
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@ -116,9 +112,9 @@ void std_writer_impl<Keys>::write (const db::Netlist *nl, const db::LayoutToNetl
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*mp_stream << indent << Keys::layer_key << "(" << name_for_layer (l2n, *l);
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db::LayerProperties lp = ly->get_properties (*l);
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if (! lp.is_null ()) {
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*mp_stream << indent << " " << tl::to_word_or_quoted_string (lp.to_string ());
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*mp_stream << " " << tl::to_word_or_quoted_string (lp.to_string ());
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}
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*mp_stream << indent << ")" << endl;
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*mp_stream << ")" << endl;
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}
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if (! Keys::is_short ()) {
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@ -131,9 +127,9 @@ void std_writer_impl<Keys>::write (const db::Netlist *nl, const db::LayoutToNetl
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if (cb != ce) {
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*mp_stream << indent << Keys::connect_key << "(" << name_for_layer (l2n, *l);
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for (db::Connectivity::layer_iterator c = l2n->connectivity ().begin_connected (*l); c != ce; ++c) {
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*mp_stream << indent << " " << name_for_layer (l2n, *c);
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*mp_stream << " " << name_for_layer (l2n, *c);
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}
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*mp_stream << indent << ")" << endl;
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*mp_stream << ")" << endl;
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}
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}
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@ -146,15 +142,15 @@ void std_writer_impl<Keys>::write (const db::Netlist *nl, const db::LayoutToNetl
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if (gb != ge) {
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if (! any) {
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if (! Keys::is_short ()) {
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*mp_stream << endl << "# Global nets and connectivity" << endl;
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*mp_stream << endl << indent << "# Global nets and connectivity" << endl;
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}
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any = true;
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}
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*mp_stream << indent << Keys::global_key << "(" << name_for_layer (l2n, *l);
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for (db::Connectivity::global_nets_iterator g = gb; g != ge; ++g) {
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*mp_stream << indent << " " << tl::to_word_or_quoted_string (l2n->connectivity ().global_net_name (*g));
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*mp_stream << " " << tl::to_word_or_quoted_string (l2n->connectivity ().global_net_name (*g));
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}
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*mp_stream << indent << ")" << endl;
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*mp_stream << ")" << endl;
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}
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}
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@ -209,9 +205,13 @@ void std_writer_impl<Keys>::write (const db::Netlist *netlist, const db::LayoutT
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net2id->insert (std::make_pair (n.operator-> (), ++id));
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}
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if (l2n && circuit.begin_nets () != circuit.end_nets ()) {
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if (circuit.begin_nets () != circuit.end_nets ()) {
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if (! Keys::is_short ()) {
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*mp_stream << endl << indent << indent1 << "# Nets with their geometries" << endl;
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if (l2n) {
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*mp_stream << endl << indent << indent1 << "# Nets with their geometries" << endl;
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} else {
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*mp_stream << endl << indent << indent1 << "# Nets" << endl;
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}
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}
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for (db::Circuit::const_net_iterator n = circuit.begin_nets (); n != circuit.end_nets (); ++n) {
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write (netlist, l2n, *n, (*net2id) [n.operator-> ()], indent);
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@ -340,42 +340,46 @@ void std_writer_impl<Keys>::write (const db::Netlist *netlist, const db::LayoutT
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bool any = false;
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reset_geometry_ref ();
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if (l2n) {
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for (db::Connectivity::layer_iterator l = conn.begin_layers (); l != conn.end_layers (); ++l) {
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reset_geometry_ref ();
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db::cell_index_type cci = circuit->cell_index ();
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db::cell_index_type prev_ci = cci;
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for (db::Connectivity::layer_iterator l = conn.begin_layers (); l != conn.end_layers (); ++l) {
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for (db::recursive_cluster_shape_iterator<db::PolygonRef> si (clusters, *l, cci, net.cluster_id ()); ! si.at_end (); ) {
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db::cell_index_type cci = circuit->cell_index ();
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db::cell_index_type prev_ci = cci;
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// NOTE: we don't recursive into circuits which will later be output. However, as circuits may
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// vanish in "purge" but the clusters will still be there we need to recursive into clusters from
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// unknown cells.
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db::cell_index_type ci = si.cell_index ();
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if (ci != prev_ci && ci != cci && (netlist->circuit_by_cell_index (ci) || netlist->device_abstract_by_cell_index (ci))) {
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for (db::recursive_cluster_shape_iterator<db::PolygonRef> si (clusters, *l, cci, net.cluster_id ()); ! si.at_end (); ) {
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si.skip_cell ();
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// NOTE: we don't recursive into circuits which will later be output. However, as circuits may
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// vanish in "purge" but the clusters will still be there we need to recursive into clusters from
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// unknown cells.
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db::cell_index_type ci = si.cell_index ();
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if (ci != prev_ci && ci != cci && (netlist->circuit_by_cell_index (ci) || netlist->device_abstract_by_cell_index (ci))) {
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} else {
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si.skip_cell ();
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if (! any) {
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*mp_stream << indent << indent1 << Keys::net_key << "(" << id;
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if (! net.name ().empty ()) {
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*mp_stream << " " << Keys::name_key << "(" << tl::to_word_or_quoted_string (net.name ()) << ")";
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} else {
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if (! any) {
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*mp_stream << indent << indent1 << Keys::net_key << "(" << id;
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if (! net.name ().empty ()) {
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*mp_stream << " " << Keys::name_key << "(" << tl::to_word_or_quoted_string (net.name ()) << ")";
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}
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*mp_stream << endl;
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any = true;
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}
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*mp_stream << indent << indent2;
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write (si.operator-> (), si.trans (), name_for_layer (l2n, *l), true);
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*mp_stream << endl;
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any = true;
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prev_ci = ci;
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++si;
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}
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*mp_stream << indent << indent2;
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write (si.operator-> (), si.trans (), name_for_layer (l2n, *l), true);
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*mp_stream << endl;
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prev_ci = ci;
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++si;
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}
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}
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@ -91,11 +91,7 @@ void std_writer_impl<Keys>::write (const db::LayoutVsSchematic *lvs)
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{
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const int version = 0;
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stream () << "#%lvs-klayout" << endl;
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if (! Keys::is_short ()) {
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stream () << endl << "# General section" << endl << endl;
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}
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stream () << "#%lvsdb-klayout" << endl;
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if (version > 0) {
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stream () << Keys::version_key << "(" << version << ")" << endl;
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@ -127,10 +123,6 @@ void std_writer_impl<Keys>::write (const db::LayoutVsSchematic *lvs)
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write (lvs->cross_ref ());
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stream () << ")" << endl;
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}
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if (! Keys::is_short ()) {
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stream () << endl;
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}
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}
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template <class Obj>
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@ -191,7 +183,7 @@ void std_writer_impl<Keys>::write (const db::NetlistCrossReference *xref)
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tl_assert (pcd != 0);
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stream () << indent1 << Keys::circuit_key << "(" << name_to_s (c->first) << " " << name_to_s (c->second) << status_to_s (pcd->status) << endl;
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stream () << indent2 << Keys::xref_key << endl;
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stream () << indent2 << Keys::xref_key << "(" << endl;
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for (db::NetlistCrossReference::PerCircuitData::net_pairs_const_iterator n = pcd->nets.begin (); n != pcd->nets.end (); ++n) {
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stream () << indent1 << indent2 << Keys::net_key << "(" << net_id_to_s (n->pair.first, m_net2id_per_circuit_a [c->first]) << " " << net_id_to_s (n->pair.second, m_net2id_per_circuit_b [c->second]) << status_to_s (n->status) << ")" << endl;
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@ -309,10 +309,10 @@ NetlistCrossReference::gen_end_circuit (const db::Circuit *, const db::Circuit *
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{
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mp_per_circuit_data->status = status;
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std::sort (mp_per_circuit_data->devices.begin (), mp_per_circuit_data->devices.end (), pair_data_compare<DevicePairData, by_expanded_name_value_compare<db::Device> > ());
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std::sort (mp_per_circuit_data->pins.begin (), mp_per_circuit_data->pins.end (), pair_data_compare<PinPairData, by_expanded_name_value_compare<db::Pin> > ());
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std::sort (mp_per_circuit_data->subcircuits.begin (), mp_per_circuit_data->subcircuits.end (), pair_data_compare<SubCircuitPairData, by_expanded_name_value_compare<db::SubCircuit> > ());
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std::sort (mp_per_circuit_data->nets.begin (), mp_per_circuit_data->nets.end (), pair_data_compare<NetPairData, by_expanded_name_value_compare<db::Net> > ());
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std::stable_sort (mp_per_circuit_data->devices.begin (), mp_per_circuit_data->devices.end (), pair_data_compare<DevicePairData, by_name_value_compare<db::Device> > ());
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std::stable_sort (mp_per_circuit_data->pins.begin (), mp_per_circuit_data->pins.end (), pair_data_compare<PinPairData, by_name_value_compare<db::Pin> > ());
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std::stable_sort (mp_per_circuit_data->subcircuits.begin (), mp_per_circuit_data->subcircuits.end (), pair_data_compare<SubCircuitPairData, by_name_value_compare<db::SubCircuit> > ());
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std::stable_sort (mp_per_circuit_data->nets.begin (), mp_per_circuit_data->nets.end (), pair_data_compare<NetPairData, by_name_value_compare<db::Net> > ());
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m_current_circuits = std::pair<const db::Circuit *, const db::Circuit *> (0, 0);
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mp_per_circuit_data = 0;
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@ -83,6 +83,11 @@ void NetlistSpiceReader::finish ()
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pop_stream ();
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}
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// purge nets with single connections (this way unconnected pins can be realized)
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if (mp_netlist) {
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mp_netlist->purge_nets ();
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}
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mp_stream.reset (0);
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mp_netlist = 0;
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mp_circuit = 0;
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@ -32,6 +32,7 @@ namespace db
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{
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static const char *allowed_name_chars = "_.:,!+$/&\\#[]";
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static const char *not_connect_prefix = "nc_";
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// --------------------------------------------------------------------------------
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@ -196,7 +197,7 @@ std::string NetlistSpiceWriterDelegate::format_params (const db::Device &dev) co
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// --------------------------------------------------------------------------------
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NetlistSpiceWriter::NetlistSpiceWriter (NetlistSpiceWriterDelegate *delegate)
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: mp_netlist (0), mp_stream (0), mp_delegate (delegate), m_use_net_names (false)
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: mp_netlist (0), mp_stream (0), mp_delegate (delegate), m_use_net_names (false), m_next_net_id (0)
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{
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static NetlistSpiceWriterDelegate std_delegate;
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if (! delegate) {
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@ -244,7 +245,7 @@ std::string NetlistSpiceWriter::net_to_string (const db::Net *net) const
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if (! net) {
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return "0";
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return std::string (not_connect_prefix) + tl::to_string (++m_next_net_id);
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} else {
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@ -276,8 +277,7 @@ std::string NetlistSpiceWriter::net_to_string (const db::Net *net) const
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std::map<const db::Net *, size_t>::const_iterator n = m_net_to_spice_id.find (net);
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if (! net || n == m_net_to_spice_id.end ()) {
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// TODO: this should assert or similar
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return "0";
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return tl::to_string (++m_next_net_id);
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} else {
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return tl::to_string (n->second);
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}
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@ -364,9 +364,27 @@ void NetlistSpiceWriter::do_write (const std::string &description)
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// assign internal node numbers to the nets
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m_net_to_spice_id.clear ();
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size_t nid = 0;
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for (db::Circuit::const_net_iterator n = circuit.begin_nets (); n != circuit.end_nets (); ++n) {
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m_net_to_spice_id.insert (std::make_pair (n.operator-> (), ++nid));
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m_next_net_id = 0;
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if (! m_use_net_names) {
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for (db::Circuit::const_net_iterator n = circuit.begin_nets (); n != circuit.end_nets (); ++n) {
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m_net_to_spice_id.insert (std::make_pair (n.operator-> (), ++m_next_net_id));
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}
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} else {
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// determine the next net id for non-connected nets such that there is no clash with
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// existing names
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size_t prefix_len = strlen (not_connect_prefix);
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for (db::Circuit::const_net_iterator n = circuit.begin_nets (); n != circuit.end_nets (); ++n) {
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if (n->name ().find (not_connect_prefix) == 0 && n->name ().size () > prefix_len) {
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size_t num = 0;
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||||
tl::from_string (n->name ().c_str () + prefix_len, num);
|
||||
m_next_net_id = std::max (m_next_net_id, num);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
write_circuit_header (circuit);
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@ private:
|
|||
tl::OutputStream *mp_stream;
|
||||
tl::weak_ptr<NetlistSpiceWriterDelegate> mp_delegate;
|
||||
std::map<const db::Net *, size_t> m_net_to_spice_id;
|
||||
mutable size_t m_next_net_id;
|
||||
bool m_use_net_names;
|
||||
|
||||
void do_write (const std::string &description);
|
||||
|
|
|
|||
|
|
@ -47,6 +47,21 @@ static unsigned int define_layer (db::Layout &ly, db::LayerMap &lmap, int gds_la
|
|||
return lid;
|
||||
}
|
||||
|
||||
static void compare_lvsdbs (tl::TestBase *_this, const std::string &path, const std::string &au_path)
|
||||
{
|
||||
tl::InputStream is (path);
|
||||
tl::InputStream is_au (au_path);
|
||||
|
||||
std::string netlist = is.read_all ();
|
||||
std::string netlist_au = is_au.read_all ();
|
||||
|
||||
if (netlist != netlist_au) {
|
||||
_this->raise (tl::sprintf ("Compare failed - see\n actual: %s\n golden: %s",
|
||||
tl::absolute_file_path (path),
|
||||
tl::absolute_file_path (au_path)));
|
||||
}
|
||||
}
|
||||
|
||||
TEST(1_BasicFlow)
|
||||
{
|
||||
db::Layout ly;
|
||||
|
|
@ -222,10 +237,23 @@ TEST(1_BasicFlow)
|
|||
lvs.compare_netlists (&comparer);
|
||||
}
|
||||
|
||||
// produce the output
|
||||
{
|
||||
// @@@
|
||||
lvs.save ("lvs_test_1.lvsdb", false);
|
||||
}
|
||||
// save and compare
|
||||
|
||||
std::string path = tmp_file ("tmp_lvstest1.lvsdb");
|
||||
lvs.save (path, false);
|
||||
|
||||
std::string au_path = tl::combine_path (tl::combine_path (tl::combine_path (tl::testsrc (), "testdata"), "algo"), "lvs_test1_au.lvsdb");
|
||||
|
||||
compare_lvsdbs (_this, path, au_path);
|
||||
|
||||
// load, save and compare
|
||||
|
||||
db::LayoutVsSchematic lvs2;
|
||||
|
||||
std::string path2 = tmp_file ("tmp_lvstest1b.lvsdb");
|
||||
lvs2.load (path);
|
||||
lvs2.save (path2, false);
|
||||
|
||||
compare_lvsdbs (_this, path2, au_path);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@ TEST(1_BasicReader)
|
|||
reader.read (is, nl);
|
||||
|
||||
EXPECT_EQ (nl.to_string (),
|
||||
"circuit TOP ();\n"
|
||||
"circuit TOP ($1='1',$2='2',$3='4',$4='7');\n"
|
||||
" device RES $1 (A='6',B='1') (R=7650);\n"
|
||||
" device RES $2 (A='3',B='1') (R=7650);\n"
|
||||
" device RES $3 (A='3',B='2') (R=2670);\n"
|
||||
|
|
@ -123,3 +123,32 @@ TEST(3_ReaderWithSubcircuitsAltOrder)
|
|||
"end;\n"
|
||||
);
|
||||
}
|
||||
|
||||
TEST(4_ReaderWithUnconnectedPins)
|
||||
{
|
||||
db::Netlist nl;
|
||||
|
||||
std::string path = tl::combine_path (tl::combine_path (tl::combine_path (tl::testsrc (), "testdata"), "algo"), "nreader4.cir");
|
||||
|
||||
db::NetlistSpiceReader reader;
|
||||
tl::InputStream is (path);
|
||||
reader.read (is, nl);
|
||||
|
||||
EXPECT_EQ (nl.to_string (),
|
||||
"circuit RINGO ($1='1',$2='2',$3='3',$4='4');\n"
|
||||
" subcircuit INV2PAIR $1 ($1='4',$2='3',$3='4',$4='1',$5='6',$6='2',$7='3');\n"
|
||||
" subcircuit INV2PAIR $2 ($1='4',$2='3',$3='4',$4=(null),$5='1',$6='5',$7='3');\n"
|
||||
" subcircuit INV2PAIR $3 ($1='4',$2='3',$3='4',$4=(null),$5='5',$6='8',$7='3');\n"
|
||||
" subcircuit INV2PAIR $4 ($1='4',$2='3',$3='4',$4=(null),$5='8',$6='7',$7='3');\n"
|
||||
" subcircuit INV2PAIR $5 ($1='4',$2='3',$3='4',$4=(null),$5='7',$6='6',$7='3');\n"
|
||||
"end;\n"
|
||||
"circuit INV2PAIR ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6',$7='7');\n"
|
||||
" subcircuit INV2 $1 ($1='7',$2='5',$3='4',$4='3',$5='2',$6='1');\n"
|
||||
" subcircuit INV2 $2 ($1='7',$2='4',$3='6',$4='3',$5='2',$6='1');\n"
|
||||
"end;\n"
|
||||
"circuit INV2 ($1='1',$2='2',$3='3',$4='4',$5='5',$6='6');\n"
|
||||
" device PMOS $1 (S='3',G='2',D='5',B='1') (L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85);\n"
|
||||
" device NMOS $3 (S='3',G='2',D='4',B='6') (L=0.25,W=3.5,AS=1.4,AD=1.4,PS=6.85,PD=6.85);\n"
|
||||
"end;\n"
|
||||
);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -867,6 +867,165 @@ TEST(10_WriterLongLines)
|
|||
compare_netlists (_this, path, au_path);
|
||||
}
|
||||
|
||||
TEST(11_WriterNonConnectedPins)
|
||||
{
|
||||
db::Netlist nl;
|
||||
|
||||
db::DeviceClass *rcls = new db::DeviceClassResistor ();
|
||||
db::DeviceClass *ccls = new db::DeviceClassCapacitor ();
|
||||
db::DeviceClass *lcls = new db::DeviceClassInductor ();
|
||||
db::DeviceClass *dcls = new db::DeviceClassDiode ();
|
||||
db::DeviceClass *m3cls = new db::DeviceClassMOS3Transistor ();
|
||||
db::DeviceClass *m4cls = new db::DeviceClassMOS4Transistor ();
|
||||
|
||||
rcls->set_name ("RCLS");
|
||||
lcls->set_name ("LCLS");
|
||||
ccls->set_name ("CCLS");
|
||||
dcls->set_name ("DCLS");
|
||||
m3cls->set_name ("M3CLS");
|
||||
m4cls->set_name ("M4CLS");
|
||||
|
||||
nl.add_device_class (rcls);
|
||||
nl.add_device_class (lcls);
|
||||
nl.add_device_class (ccls);
|
||||
nl.add_device_class (dcls);
|
||||
nl.add_device_class (m3cls);
|
||||
nl.add_device_class (m4cls);
|
||||
|
||||
db::Circuit *circuit1 = new db::Circuit ();
|
||||
circuit1->set_name ("C1");
|
||||
nl.add_circuit (circuit1);
|
||||
|
||||
{
|
||||
db::Net *n1, *n2, *n3, *n4, *n5;
|
||||
n1 = new db::Net ();
|
||||
n1->set_name ("n1");
|
||||
circuit1->add_net (n1);
|
||||
n2 = new db::Net ();
|
||||
n2->set_name ("n2");
|
||||
circuit1->add_net (n2);
|
||||
n3 = new db::Net ();
|
||||
n3->set_name ("n3");
|
||||
circuit1->add_net (n3);
|
||||
n4 = new db::Net ();
|
||||
n4->set_name ("n4");
|
||||
circuit1->add_net (n4);
|
||||
n5 = new db::Net ();
|
||||
n5->set_name ("n5");
|
||||
circuit1->add_net (n5);
|
||||
|
||||
db::Device *ddev1 = new db::Device (m4cls);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 0.25);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.18);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.2);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.75);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.2);
|
||||
ddev1->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.75);
|
||||
db::Device *ddev2 = new db::Device (m4cls);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_L, 1.4);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_W, 0.25);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AS, 1.3);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_AD, 0.85);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PS, 2.3);
|
||||
ddev2->set_parameter_value (db::DeviceClassMOS3Transistor::param_id_PD, 1.85);
|
||||
circuit1->add_device (ddev1);
|
||||
circuit1->add_device (ddev2);
|
||||
|
||||
size_t pid1 = circuit1->add_pin ("p1").id ();
|
||||
size_t pid2 = circuit1->add_pin ("p2").id ();
|
||||
size_t pid3 = circuit1->add_pin ("p3").id ();
|
||||
size_t pid4 = circuit1->add_pin ("p4").id ();
|
||||
|
||||
circuit1->connect_pin (pid1, n1);
|
||||
circuit1->connect_pin (pid2, n2);
|
||||
circuit1->connect_pin (pid3, n4);
|
||||
circuit1->connect_pin (pid4, n5);
|
||||
|
||||
ddev1->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("S"), n1);
|
||||
ddev1->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("G"), n4);
|
||||
ddev1->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("D"), n3);
|
||||
ddev1->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("B"), n5);
|
||||
ddev2->connect_terminal (ddev2->device_class ()->terminal_id_for_name ("S"), n3);
|
||||
ddev2->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("G"), n4);
|
||||
ddev2->connect_terminal (ddev2->device_class ()->terminal_id_for_name ("D"), n2);
|
||||
ddev2->connect_terminal (ddev1->device_class ()->terminal_id_for_name ("B"), n5);
|
||||
}
|
||||
|
||||
db::Circuit *circuit2 = new db::Circuit ();
|
||||
circuit2->set_name ("C2");
|
||||
nl.add_circuit (circuit2);
|
||||
|
||||
{
|
||||
db::Net *n1, *n2, *n3, *n4, *n5;
|
||||
n1 = new db::Net ();
|
||||
// this gives a clash with the auto-generated node names with non-connected subcircuit pins
|
||||
// and terminals - we test proper generation of such names this way
|
||||
n1->set_name ("nc_10");
|
||||
circuit2->add_net (n1);
|
||||
n2 = new db::Net ();
|
||||
n2->set_name ("n2");
|
||||
circuit2->add_net (n2);
|
||||
n3 = new db::Net ();
|
||||
n3->set_name ("n3");
|
||||
circuit2->add_net (n3);
|
||||
n4 = new db::Net ();
|
||||
n4->set_name ("n4");
|
||||
circuit2->add_net (n4);
|
||||
n5 = new db::Net ();
|
||||
n5->set_name ("n5");
|
||||
circuit2->add_net (n5);
|
||||
|
||||
db::SubCircuit *sc1 = new db::SubCircuit (circuit1, "SC1");
|
||||
circuit2->add_subcircuit (sc1);
|
||||
sc1->connect_pin (0, n1);
|
||||
sc1->connect_pin (1, n3);
|
||||
// pin 2 unconnected
|
||||
sc1->connect_pin (3, n3);
|
||||
|
||||
db::SubCircuit *sc2 = new db::SubCircuit (circuit1, "SC2");
|
||||
circuit2->add_subcircuit (sc2);
|
||||
sc2->connect_pin (0, n3);
|
||||
// pin 1 unconnected
|
||||
sc2->connect_pin (2, n4);
|
||||
sc2->connect_pin (3, n3);
|
||||
|
||||
size_t pid1 = circuit2->add_pin ("p1").id ();
|
||||
size_t pid2 = circuit2->add_pin ("p2").id ();
|
||||
size_t pid3 = circuit2->add_pin ("p3").id ();
|
||||
|
||||
circuit2->connect_pin (pid1, n1);
|
||||
circuit2->connect_pin (pid2, n2);
|
||||
circuit2->connect_pin (pid3, n4);
|
||||
}
|
||||
|
||||
// verify against the input
|
||||
|
||||
std::string path = tmp_file ("tmp_nwriter11.txt");
|
||||
{
|
||||
tl::OutputStream stream (path);
|
||||
db::NetlistSpiceWriter writer;
|
||||
writer.write (stream, nl, "written by unit test");
|
||||
}
|
||||
|
||||
std::string au_path = tl::combine_path (tl::combine_path (tl::combine_path (tl::testsrc (), "testdata"), "algo"), "nwriter11_au.txt");
|
||||
|
||||
compare_netlists (_this, path, au_path);
|
||||
|
||||
path = tmp_file ("tmp_nwriter11b.txt");
|
||||
{
|
||||
tl::OutputStream stream (path);
|
||||
db::NetlistSpiceWriter writer;
|
||||
writer.set_use_net_names (true);
|
||||
writer.write (stream, nl, "written by unit test");
|
||||
}
|
||||
|
||||
au_path = tl::combine_path (tl::combine_path (tl::combine_path (tl::testsrc (), "testdata"), "algo"), "nwriter11b_au.txt");
|
||||
|
||||
compare_netlists (_this, path, au_path);
|
||||
}
|
||||
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
class MyDelegate
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
#%l2n-klayout
|
||||
|
||||
# General section
|
||||
|
||||
top(RINGO)
|
||||
unit(0.001)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
#%l2n-klayout
|
||||
|
||||
# General section
|
||||
|
||||
top(RINGO)
|
||||
unit(0.001)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
#%l2n-klayout
|
||||
|
||||
# General section
|
||||
|
||||
top(RINGO)
|
||||
unit(0.001)
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,991 @@
|
|||
#%lvsdb-klayout
|
||||
|
||||
# Layout
|
||||
layout(
|
||||
top(RINGO)
|
||||
unit(0.001)
|
||||
|
||||
# Layer section
|
||||
# This section lists the mask layers (drawing or derived) and their connections.
|
||||
|
||||
# Mask layers
|
||||
layer(bulk '1/0')
|
||||
layer(nwell '1/0')
|
||||
layer(poly '3/0')
|
||||
layer(poly_lbl '3/1')
|
||||
layer(diff_cont '4/0')
|
||||
layer(poly_cont '5/0')
|
||||
layer(metal1 '6/0')
|
||||
layer(metal1_lbl '6/1')
|
||||
layer(via1 '7/0')
|
||||
layer(metal2 '8/0')
|
||||
layer(metal2_lbl '8/1')
|
||||
layer(ntie)
|
||||
layer(psd)
|
||||
layer(ptie)
|
||||
layer(nsd)
|
||||
|
||||
# Mask layer connectivity
|
||||
connect(nwell nwell ntie)
|
||||
connect(poly poly poly_lbl poly_cont)
|
||||
connect(poly_lbl poly)
|
||||
connect(diff_cont diff_cont metal1 ntie psd ptie nsd)
|
||||
connect(poly_cont poly poly_cont metal1)
|
||||
connect(metal1 diff_cont poly_cont metal1 metal1_lbl via1)
|
||||
connect(metal1_lbl metal1)
|
||||
connect(via1 metal1 via1 metal2)
|
||||
connect(metal2 via1 metal2 metal2_lbl)
|
||||
connect(metal2_lbl metal2)
|
||||
connect(ntie nwell diff_cont ntie)
|
||||
connect(psd diff_cont psd)
|
||||
connect(ptie diff_cont ptie)
|
||||
connect(nsd diff_cont nsd)
|
||||
|
||||
# Global nets and connectivity
|
||||
global(bulk BULK)
|
||||
global(ptie BULK)
|
||||
|
||||
# Device class section
|
||||
class(PMOS MOS4)
|
||||
class(NMOS MOS4)
|
||||
|
||||
# Device abstracts section
|
||||
# Device abstracts list the pin shapes of the devices.
|
||||
device(D$PMOS PMOS
|
||||
terminal(S
|
||||
rect(psd (-650 -875) (525 1750))
|
||||
)
|
||||
terminal(G
|
||||
rect(poly (-125 -875) (250 1750))
|
||||
)
|
||||
terminal(D
|
||||
rect(psd (125 -875) (550 1750))
|
||||
)
|
||||
terminal(B
|
||||
rect(nwell (-125 -875) (250 1750))
|
||||
)
|
||||
)
|
||||
device(D$PMOS$1 PMOS
|
||||
terminal(S
|
||||
rect(psd (-675 -875) (550 1750))
|
||||
)
|
||||
terminal(G
|
||||
rect(poly (-125 -875) (250 1750))
|
||||
)
|
||||
terminal(D
|
||||
rect(psd (125 -875) (525 1750))
|
||||
)
|
||||
terminal(B
|
||||
rect(nwell (-125 -875) (250 1750))
|
||||
)
|
||||
)
|
||||
device(D$NMOS NMOS
|
||||
terminal(S
|
||||
rect(nsd (-650 -875) (525 1750))
|
||||
)
|
||||
terminal(G
|
||||
rect(poly (-125 -875) (250 1750))
|
||||
)
|
||||
terminal(D
|
||||
rect(nsd (125 -875) (550 1750))
|
||||
)
|
||||
terminal(B
|
||||
rect(bulk (-125 -875) (250 1750))
|
||||
)
|
||||
)
|
||||
device(D$NMOS$1 NMOS
|
||||
terminal(S
|
||||
rect(nsd (-675 -875) (550 1750))
|
||||
)
|
||||
terminal(G
|
||||
rect(poly (-125 -875) (250 1750))
|
||||
)
|
||||
terminal(D
|
||||
rect(nsd (125 -875) (525 1750))
|
||||
)
|
||||
terminal(B
|
||||
rect(bulk (-125 -875) (250 1750))
|
||||
)
|
||||
)
|
||||
|
||||
# Circuit section
|
||||
# Circuits are the hierarchical building blocks of the netlist.
|
||||
circuit(INV2
|
||||
|
||||
# Nets with their geometries
|
||||
net(1
|
||||
rect(nwell (-1400 1800) (2800 3580))
|
||||
rect(diff_cont (-1510 -650) (220 220))
|
||||
rect(ntie (-510 -450) (800 680))
|
||||
)
|
||||
net(2 name(IN)
|
||||
rect(poly (-525 -250) (250 2500))
|
||||
rect(poly (-1425 -630) (2100 360))
|
||||
rect(poly (-125 -2230) (250 2500))
|
||||
rect(poly (-1050 -3850) (250 2400))
|
||||
rect(poly (550 1200) (250 2400))
|
||||
rect(poly (-250 -6000) (250 2400))
|
||||
rect(poly (-1050 1200) (250 2400))
|
||||
rect(poly_lbl (-526 -2601) (2 2))
|
||||
rect(poly_cont (-831 -111) (220 220))
|
||||
)
|
||||
net(3 name(OUT)
|
||||
rect(diff_cont (-910 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(metal1 (1310 -3710) (360 2220))
|
||||
rect(metal1 (-1900 -800) (2220 360))
|
||||
rect(metal1 (-2280 -2400) (360 2840))
|
||||
rect(metal1 (-360 -3600) (360 1560))
|
||||
rect(metal1 (1240 2040) (360 1560))
|
||||
rect(metal1 (-360 -5160) (360 1560))
|
||||
rect(metal1 (-1960 2040) (360 1560))
|
||||
rect(metal1_lbl (1419 -2181) (2 2))
|
||||
rect(psd (-276 524) (525 1750))
|
||||
rect(psd (-2100 -1750) (525 1750))
|
||||
rect(nsd (1050 -5350) (525 1750))
|
||||
rect(nsd (-2100 -1750) (525 1750))
|
||||
)
|
||||
net(4 name(VSS)
|
||||
rect(diff_cont (-110 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(metal1 (-290 -290) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(via1 (-305 -705) (250 250))
|
||||
rect(via1 (-250 150) (250 250))
|
||||
rect(via1 (-250 -1450) (250 250))
|
||||
rect(via1 (-250 150) (250 250))
|
||||
rect(metal2 (-1525 -775) (2800 1700))
|
||||
rect(metal2_lbl (-161 -541) (2 2))
|
||||
rect(nsd (-1516 -1186) (550 1750))
|
||||
)
|
||||
net(5 name(VDD)
|
||||
rect(diff_cont (-110 2490) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(metal1 (-290 -1490) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(via1 (-305 -1505) (250 250))
|
||||
rect(via1 (-250 150) (250 250))
|
||||
rect(via1 (-250 150) (250 250))
|
||||
rect(via1 (-250 150) (250 250))
|
||||
rect(metal2 (-1525 -1575) (2800 1700))
|
||||
rect(metal2_lbl (-151 -1251) (2 2))
|
||||
rect(psd (-1526 -476) (550 1750))
|
||||
)
|
||||
net(6 name(BULK)
|
||||
rect(diff_cont (-110 -2160) (220 220))
|
||||
rect(ptie (-510 -450) (800 680))
|
||||
)
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin($0 1)
|
||||
pin(IN 2)
|
||||
pin(OUT 3)
|
||||
pin(VSS 4)
|
||||
pin(VDD 5)
|
||||
pin(BULK 6)
|
||||
|
||||
# Devices and their connections
|
||||
device($1 D$PMOS
|
||||
device(D$PMOS$1 800 0)
|
||||
connect(0 S S)
|
||||
connect(0 S D)
|
||||
connect(0 G G)
|
||||
connect(0 G G)
|
||||
connect(0 D D)
|
||||
connect(0 D S)
|
||||
connect(0 B B)
|
||||
connect(0 B B)
|
||||
location(-400 3200)
|
||||
param(L 0.25)
|
||||
param(W 3.5)
|
||||
param(AS 1.4)
|
||||
param(AD 1.4)
|
||||
param(PS 6.85)
|
||||
param(PD 6.85)
|
||||
terminal(S 3)
|
||||
terminal(G 2)
|
||||
terminal(D 5)
|
||||
terminal(B 1)
|
||||
)
|
||||
device($3 D$NMOS
|
||||
device(D$NMOS$1 800 0)
|
||||
connect(0 S S)
|
||||
connect(0 S D)
|
||||
connect(0 G G)
|
||||
connect(0 G G)
|
||||
connect(0 D D)
|
||||
connect(0 D S)
|
||||
connect(0 B B)
|
||||
connect(0 B B)
|
||||
location(-400 -400)
|
||||
param(L 0.25)
|
||||
param(W 3.5)
|
||||
param(AS 1.4)
|
||||
param(AD 1.4)
|
||||
param(PS 6.85)
|
||||
param(PD 6.85)
|
||||
terminal(S 3)
|
||||
terminal(G 2)
|
||||
terminal(D 4)
|
||||
terminal(B 6)
|
||||
)
|
||||
|
||||
)
|
||||
circuit(INV2PAIR
|
||||
|
||||
# Nets with their geometries
|
||||
net(1 name(BULK))
|
||||
net(2
|
||||
rect(diff_cont (4230 3290) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(metal1 (2350 -1490) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
)
|
||||
net(3
|
||||
rect(diff_cont (4230 890) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(metal1 (2350 -290) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
)
|
||||
net(4
|
||||
rect(diff_cont (790 890) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
net(5)
|
||||
net(6
|
||||
rect(diff_cont (3430 890) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
net(7)
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin(BULK 1)
|
||||
pin($1 2)
|
||||
pin($2 3)
|
||||
pin($3 4)
|
||||
pin($4 5)
|
||||
pin($5 6)
|
||||
pin($6 7)
|
||||
|
||||
# Subcircuits and their connections
|
||||
circuit($1 INV2 location(1700 800)
|
||||
pin($0 7)
|
||||
pin(IN 5)
|
||||
pin(OUT 4)
|
||||
pin(VSS 3)
|
||||
pin(VDD 2)
|
||||
pin(BULK 1)
|
||||
)
|
||||
circuit($2 INV2 location(4340 800)
|
||||
pin($0 7)
|
||||
pin(IN 4)
|
||||
pin(OUT 6)
|
||||
pin(VSS 3)
|
||||
pin(VDD 2)
|
||||
pin(BULK 1)
|
||||
)
|
||||
|
||||
)
|
||||
circuit(RINGO
|
||||
|
||||
# Nets with their geometries
|
||||
net(1 name(FB)
|
||||
rect(diff_cont (20210 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(metal1 (-22130 -2290) (360 360))
|
||||
rect(via1 (-305 -305) (250 250))
|
||||
rect(via1 (23190 -250) (250 250))
|
||||
rect(metal2 (-23765 -325) (23840 400))
|
||||
rect(metal2_lbl (-22121 -201) (2 2))
|
||||
)
|
||||
net(2 name(OSC)
|
||||
rect(diff_cont (22850 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(via1 (1365 -2235) (250 250))
|
||||
rect(metal2 (-325 -325) (400 400))
|
||||
rect(metal2_lbl (-201 -201) (2 2))
|
||||
)
|
||||
net(3 name(VDD)
|
||||
rect(diff_cont (7810 2490) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (12980 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (7700 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (7700 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-2860 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -1420) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(metal1 (-21410 -10) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (-16200 -2600) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (12840 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (7560 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (7560 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal2_lbl (-21301 -1181) (2 2))
|
||||
)
|
||||
net(4 name('BULK,VSS')
|
||||
rect(diff_cont (7810 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (12980 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (7700 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (7700 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-2860 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 980) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(metal1 (-21410 -1330) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (2280 -1120) (360 1120))
|
||||
rect(metal1 (-16200 -80) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (12840 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (7560 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (7560 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal1 (-3000 -1560) (360 1560))
|
||||
rect(metal1 (-360 -1560) (360 1560))
|
||||
rect(metal2_lbl (-21301 -381) (2 2))
|
||||
)
|
||||
net(5
|
||||
rect(diff_cont (1730 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
net(6
|
||||
rect(diff_cont (17570 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
net(7
|
||||
rect(diff_cont (12290 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
net(8
|
||||
rect(diff_cont (7010 90) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (1380 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 -3820) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-220 -620) (220 220))
|
||||
rect(diff_cont (-1820 3380) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
rect(diff_cont (-220 180) (220 220))
|
||||
)
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin(FB 1)
|
||||
pin(OSC 2)
|
||||
pin(VDD 3)
|
||||
pin('BULK,VSS' 4)
|
||||
|
||||
# Subcircuits and their connections
|
||||
circuit($1 INV2PAIR location(19420 -800)
|
||||
pin(BULK 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($3 1)
|
||||
pin($4 6)
|
||||
pin($5 2)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($2 INV2PAIR location(-1700 -800)
|
||||
pin(BULK 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 1)
|
||||
pin($5 5)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($3 INV2PAIR location(3580 -800)
|
||||
pin(BULK 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 5)
|
||||
pin($5 8)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($4 INV2PAIR location(8860 -800)
|
||||
pin(BULK 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 8)
|
||||
pin($5 7)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($5 INV2PAIR location(14140 -800)
|
||||
pin(BULK 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 7)
|
||||
pin($5 6)
|
||||
pin($6 3)
|
||||
)
|
||||
|
||||
)
|
||||
)
|
||||
|
||||
# Reference netlist
|
||||
reference(
|
||||
|
||||
# Device class section
|
||||
class(PMOS MOS4)
|
||||
class(NMOS MOS4)
|
||||
|
||||
# Circuit section
|
||||
# Circuits are the hierarchical building blocks of the netlist.
|
||||
circuit(INV2
|
||||
|
||||
# Nets
|
||||
net(1 name('1'))
|
||||
net(2 name('2'))
|
||||
net(3 name('3'))
|
||||
net(4 name('4'))
|
||||
net(5 name('5'))
|
||||
net(6 name('6'))
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin($0 1)
|
||||
pin($1 2)
|
||||
pin($2 3)
|
||||
pin($3 4)
|
||||
pin($4 5)
|
||||
pin($5 6)
|
||||
|
||||
# Devices and their connections
|
||||
device($1 PMOS
|
||||
param(L 0.25)
|
||||
param(W 3.5)
|
||||
param(AS 1.4)
|
||||
param(AD 1.4)
|
||||
param(PS 6.85)
|
||||
param(PD 6.85)
|
||||
terminal(S 3)
|
||||
terminal(G 2)
|
||||
terminal(D 5)
|
||||
terminal(B 1)
|
||||
)
|
||||
device($3 NMOS
|
||||
param(L 0.25)
|
||||
param(W 3.5)
|
||||
param(AS 1.4)
|
||||
param(AD 1.4)
|
||||
param(PS 6.85)
|
||||
param(PD 6.85)
|
||||
terminal(S 3)
|
||||
terminal(G 2)
|
||||
terminal(D 4)
|
||||
terminal(B 6)
|
||||
)
|
||||
|
||||
)
|
||||
circuit(INV2PAIR
|
||||
|
||||
# Nets
|
||||
net(1 name('1'))
|
||||
net(2 name('2'))
|
||||
net(3 name('3'))
|
||||
net(4 name('4'))
|
||||
net(5 name('5'))
|
||||
net(6 name('6'))
|
||||
net(7 name('7'))
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin($0 1)
|
||||
pin($1 2)
|
||||
pin($2 3)
|
||||
pin($3 4)
|
||||
pin($4 5)
|
||||
pin($5 6)
|
||||
pin($6 7)
|
||||
|
||||
# Subcircuits and their connections
|
||||
circuit($1 INV2
|
||||
pin($0 7)
|
||||
pin($1 5)
|
||||
pin($2 4)
|
||||
pin($3 3)
|
||||
pin($4 2)
|
||||
pin($5 1)
|
||||
)
|
||||
circuit($2 INV2
|
||||
pin($0 7)
|
||||
pin($1 4)
|
||||
pin($2 6)
|
||||
pin($3 3)
|
||||
pin($4 2)
|
||||
pin($5 1)
|
||||
)
|
||||
|
||||
)
|
||||
circuit(RINGO
|
||||
|
||||
# Nets
|
||||
net(1 name('1'))
|
||||
net(2 name('2'))
|
||||
net(3 name('3'))
|
||||
net(4 name('4'))
|
||||
net(5 name('6'))
|
||||
net(6 name('5'))
|
||||
net(7 name('8'))
|
||||
net(8 name('7'))
|
||||
|
||||
# Outgoing pins and their connections to nets
|
||||
pin($0 1)
|
||||
pin($1 2)
|
||||
pin($2 3)
|
||||
pin($3 4)
|
||||
|
||||
# Subcircuits and their connections
|
||||
circuit($1 INV2PAIR
|
||||
pin($0 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($3 1)
|
||||
pin($4 5)
|
||||
pin($5 2)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($2 INV2PAIR
|
||||
pin($0 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 1)
|
||||
pin($5 6)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($3 INV2PAIR
|
||||
pin($0 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 6)
|
||||
pin($5 7)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($4 INV2PAIR
|
||||
pin($0 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 7)
|
||||
pin($5 8)
|
||||
pin($6 3)
|
||||
)
|
||||
circuit($5 INV2PAIR
|
||||
pin($0 4)
|
||||
pin($1 3)
|
||||
pin($2 4)
|
||||
pin($4 8)
|
||||
pin($5 5)
|
||||
pin($6 3)
|
||||
)
|
||||
|
||||
)
|
||||
)
|
||||
|
||||
# Cross reference
|
||||
xref(
|
||||
circuit(INV2 INV2 match
|
||||
xref(
|
||||
net(1 1 match)
|
||||
net(6 6 match)
|
||||
net(2 2 match)
|
||||
net(3 3 match)
|
||||
net(5 5 match)
|
||||
net(4 4 match)
|
||||
pin($0 $0 match)
|
||||
pin(BULK $5 match)
|
||||
pin(IN $1 match)
|
||||
pin(OUT $2 match)
|
||||
pin(VDD $4 match)
|
||||
pin(VSS $3 match)
|
||||
device($1 $1 match)
|
||||
device($3 $3 match)
|
||||
)
|
||||
)
|
||||
circuit(INV2PAIR INV2PAIR match
|
||||
xref(
|
||||
net(2 2 match)
|
||||
net(3 3 match)
|
||||
net(4 4 match)
|
||||
net(5 5 match)
|
||||
net(6 6 match)
|
||||
net(7 7 match)
|
||||
net(1 1 match)
|
||||
pin($1 $1 match)
|
||||
pin($2 $2 match)
|
||||
pin($3 $3 match)
|
||||
pin($4 $4 match)
|
||||
pin($5 $5 match)
|
||||
pin($6 $6 match)
|
||||
pin(BULK $0 match)
|
||||
circuit($1 $1 match)
|
||||
circuit($2 $2 match)
|
||||
)
|
||||
)
|
||||
circuit(RINGO RINGO match
|
||||
xref(
|
||||
net(5 6 match)
|
||||
net(6 5 match)
|
||||
net(7 8 match)
|
||||
net(8 7 match)
|
||||
net(4 4 match)
|
||||
net(1 1 match)
|
||||
net(2 2 match)
|
||||
net(3 3 match)
|
||||
pin('BULK,VSS' $3 match)
|
||||
pin(FB $0 match)
|
||||
pin(OSC $1 match)
|
||||
pin(VDD $2 match)
|
||||
circuit($1 $1 match)
|
||||
circuit($2 $2 match)
|
||||
circuit($3 $3 match)
|
||||
circuit($4 $4 match)
|
||||
circuit($5 $5 match)
|
||||
)
|
||||
)
|
||||
)
|
||||
Binary file not shown.
|
|
@ -0,0 +1,58 @@
|
|||
* Test netlist
|
||||
|
||||
* cell RINGO
|
||||
* pin FB
|
||||
* pin OSC
|
||||
* pin VDD
|
||||
* pin BULK,VSS
|
||||
.SUBCKT RINGO 1 2 3 4
|
||||
* net 1 FB
|
||||
* net 2 OSC
|
||||
* net 3 VDD
|
||||
* net 4 BULK,VSS
|
||||
* cell instance $1 r0 *1 19.42,-0.8
|
||||
X$1 4 3 4 1 6 2 3 INV2PAIR
|
||||
* cell instance $2 r0 *1 -1.7,-0.8
|
||||
X$2 4 3 4 100 1 5 3 INV2PAIR
|
||||
* cell instance $3 r0 *1 3.58,-0.8
|
||||
X$3 4 3 4 101 5 8 3 INV2PAIR
|
||||
* cell instance $4 r0 *1 8.86,-0.8
|
||||
X$4 4 3 4 102 8 7 3 INV2PAIR
|
||||
* cell instance $5 r0 *1 14.14,-0.8
|
||||
X$5 4 3 4 103 7 6 3 INV2PAIR
|
||||
.ENDS RINGO
|
||||
|
||||
* cell INV2PAIR
|
||||
* pin BULK
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
.SUBCKT INV2PAIR 1 2 3 4 5 6 7
|
||||
* net 1 BULK
|
||||
* cell instance $1 r0 *1 1.7,0.8
|
||||
X$1 7 5 4 3 2 1 INV2
|
||||
* cell instance $2 r0 *1 4.34,0.8
|
||||
X$2 7 4 6 3 2 1 INV2
|
||||
.ENDS INV2PAIR
|
||||
|
||||
* cell INV2
|
||||
* pin
|
||||
* pin IN
|
||||
* pin OUT
|
||||
* pin VSS
|
||||
* pin VDD
|
||||
* pin BULK
|
||||
.SUBCKT INV2 1 2 3 4 5 6
|
||||
* net 2 IN
|
||||
* net 3 OUT
|
||||
* net 4 VSS
|
||||
* net 5 VDD
|
||||
* net 6 BULK
|
||||
* device instance $1 -0.4,3.2 PMOS
|
||||
M$1 3 2 5 1 PMOS L=0.25U W=3.5U AS=1.4P AD=1.4P PS=6.85U PD=6.85U
|
||||
* device instance $3 -0.4,-0.4 NMOS
|
||||
M$3 3 2 4 6 NMOS L=0.25U W=3.5U AS=1.4P AD=1.4P PS=6.85U PD=6.85U
|
||||
.ENDS INV2
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
* VDIV netlist before simplification
|
||||
|
||||
* cell TOP
|
||||
.SUBCKT TOP
|
||||
.SUBCKT TOP 1 2 4 7
|
||||
* net 1 OUT
|
||||
* net 2 GND
|
||||
* net 4 IN
|
||||
|
|
|
|||
|
|
@ -0,0 +1,58 @@
|
|||
* Test netlist
|
||||
|
||||
* cell RINGO
|
||||
* pin FB
|
||||
* pin OSC
|
||||
* pin VDD
|
||||
* pin BULK,VSS
|
||||
.SUBCKT RINGO 1 2 3 4
|
||||
* net 1 FB
|
||||
* net 2 OSC
|
||||
* net 3 VDD
|
||||
* net 4 BULK,VSS
|
||||
* cell instance $1 r0 *1 19.42,-0.8
|
||||
X$1 4 3 4 1 6 2 3 INV2PAIR
|
||||
* cell instance $2 r0 *1 -1.7,-0.8
|
||||
X$2 4 3 4 100 1 5 3 INV2PAIR
|
||||
* cell instance $3 r0 *1 3.58,-0.8
|
||||
X$3 4 3 4 101 5 8 3 INV2PAIR
|
||||
* cell instance $4 r0 *1 8.86,-0.8
|
||||
X$4 4 3 4 102 8 7 3 INV2PAIR
|
||||
* cell instance $5 r0 *1 14.14,-0.8
|
||||
X$5 4 3 4 103 7 6 3 INV2PAIR
|
||||
.ENDS RINGO
|
||||
|
||||
* cell INV2PAIR
|
||||
* pin BULK
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
* pin
|
||||
.SUBCKT INV2PAIR 1 2 3 4 5 6 7
|
||||
* net 1 BULK
|
||||
* cell instance $1 r0 *1 1.7,0.8
|
||||
X$1 7 5 4 3 2 1 INV2
|
||||
* cell instance $2 r0 *1 4.34,0.8
|
||||
X$2 7 4 6 3 2 1 INV2
|
||||
.ENDS INV2PAIR
|
||||
|
||||
* cell INV2
|
||||
* pin
|
||||
* pin IN
|
||||
* pin OUT
|
||||
* pin VSS
|
||||
* pin VDD
|
||||
* pin BULK
|
||||
.SUBCKT INV2 1 2 3 4 5 6
|
||||
* net 2 IN
|
||||
* net 3 OUT
|
||||
* net 4 VSS
|
||||
* net 5 VDD
|
||||
* net 6 BULK
|
||||
* device instance $1 -0.4,3.2 PMOS
|
||||
M$1 3 2 5 1 PMOS L=0.25U W=3.5U AS=1.4P AD=1.4P PS=6.85U PD=6.85U
|
||||
* device instance $3 -0.4,-0.4 NMOS
|
||||
M$3 3 2 4 6 NMOS L=0.25U W=3.5U AS=1.4P AD=1.4P PS=6.85U PD=6.85U
|
||||
.ENDS INV2
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
* written by unit test
|
||||
|
||||
* cell C2
|
||||
* pin p1
|
||||
* pin p2
|
||||
* pin p3
|
||||
.SUBCKT C2 1 2 4
|
||||
* net 1 nc_10
|
||||
* net 2 n2
|
||||
* net 3 n3
|
||||
* net 4 n4
|
||||
* net 5 n5
|
||||
* cell instance SC1 r0 *1 0,0
|
||||
XSC1 1 3 6 3 C1
|
||||
* cell instance SC2 r0 *1 0,0
|
||||
XSC2 3 7 4 3 C1
|
||||
.ENDS C2
|
||||
|
||||
* cell C1
|
||||
* pin p1
|
||||
* pin p2
|
||||
* pin p3
|
||||
* pin p4
|
||||
.SUBCKT C1 1 2 4 5
|
||||
* net 1 n1
|
||||
* net 2 n2
|
||||
* net 3 n3
|
||||
* net 4 n4
|
||||
* net 5 n5
|
||||
* device instance $1 0,0 M4CLS
|
||||
M$1 1 4 3 5 M4CLS L=0.25U W=0.18U AS=1.2P AD=0.75P PS=2.2U PD=1.75U
|
||||
* device instance $2 0,0 M4CLS
|
||||
M$2 3 4 2 5 M4CLS L=1.4U W=0.25U AS=1.3P AD=0.85P PS=2.3U PD=1.85U
|
||||
.ENDS C1
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
* written by unit test
|
||||
|
||||
* cell C2
|
||||
* pin p1
|
||||
* pin p2
|
||||
* pin p3
|
||||
.SUBCKT C2 nc_10 n2 n4
|
||||
* cell instance SC1 r0 *1 0,0
|
||||
XSC1 nc_10 n3 nc_11 n3 C1
|
||||
* cell instance SC2 r0 *1 0,0
|
||||
XSC2 n3 nc_12 n4 n3 C1
|
||||
.ENDS C2
|
||||
|
||||
* cell C1
|
||||
* pin p1
|
||||
* pin p2
|
||||
* pin p3
|
||||
* pin p4
|
||||
.SUBCKT C1 n1 n2 n4 n5
|
||||
* device instance $1 0,0 M4CLS
|
||||
M$1 n1 n4 n3 n5 M4CLS L=0.25U W=0.18U AS=1.2P AD=0.75P PS=2.2U PD=1.75U
|
||||
* device instance $2 0,0 M4CLS
|
||||
M$2 n3 n4 n2 n5 M4CLS L=1.4U W=0.25U AS=1.3P AD=0.85P PS=2.3U PD=1.85U
|
||||
.ENDS C1
|
||||
Loading…
Reference in New Issue