Version bump

Fix preprocessor `` of existing base define, bug283.
Reduce debug verbosity (match Verilog-Perl)
2026-10-02 16:13:34 +02:00 · 2010-09-20 15:46:17 -04:00 · 2010-09-20 15:20:16 -04:00 · 2010-09-20 13:13:31 -04:00 · 2010-09-20 09:21:29 -04:00 · 2010-08-29 19:28:46 -04:00
1011 changed files with 52266 additions and 11571 deletions
@@ -1,3 +1,4 @@
+*~
 *.old
 *.gz
 *.gz.uu
@@ -5,16 +6,18 @@
 *.info
 *.log
 *.1
+.*.swp
 *.tmp
 *.tex
-Makefile
+/Makefile
 README
+autom4te.cache
 config.cache
 config.status
 configure
 dddrun*
 gdbrun*
-verilator.txt
+internals.txt
 verilator.pdf
+verilator.txt
 verilator_bin*
-autom4te.cache
@@ -0,0 +1,197 @@
+Artistic License 2.0
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@@ -1,285 +1,626 @@
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+                    GNU GENERAL PUBLIC LICENSE
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- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
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 Everyone is permitted to copy and distribute verbatim copies
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+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit.  Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+
+  6. Conveying Non-Source Forms.
+
+  You may convey a covered work in object code form under the terms
+of sections 4 and 5, provided that you also convey the
+machine-readable Corresponding Source under the terms of this License,
+in one of these ways:
+
+    a) Convey the object code in, or embodied in, a physical product
+    (including a physical distribution medium), accompanied by the
+    Corresponding Source fixed on a durable physical medium
+    customarily used for software interchange.
+
+    b) Convey the object code in, or embodied in, a physical product
+    (including a physical distribution medium), accompanied by a
+    written offer, valid for at least three years and valid for as
+    long as you offer spare parts or customer support for that product
+    model, to give anyone who possesses the object code either (1) a
+    copy of the Corresponding Source for all the software in the
+    product that is covered by this License, on a durable physical
+    medium customarily used for software interchange, for a price no
+    more than your reasonable cost of physically performing this
+    conveying of source, or (2) access to copy the
+    Corresponding Source from a network server at no charge.
+
+    c) Convey individual copies of the object code with a copy of the
+    written offer to provide the Corresponding Source.  This
+    alternative is allowed only occasionally and noncommercially, and
+    only if you received the object code with such an offer, in accord
+    with subsection 6b.
+
+    d) Convey the object code by offering access from a designated
+    place (gratis or for a charge), and offer equivalent access to the
+    Corresponding Source in the same way through the same place at no
+    further charge.  You need not require recipients to copy the
+    Corresponding Source along with the object code.  If the place to
+    copy the object code is a network server, the Corresponding Source
+    may be on a different server (operated by you or a third party)
+    that supports equivalent copying facilities, provided you maintain
+    clear directions next to the object code saying where to find the
+    Corresponding Source.  Regardless of what server hosts the
+    Corresponding Source, you remain obligated to ensure that it is
+    available for as long as needed to satisfy these requirements.
+
+    e) Convey the object code using peer-to-peer transmission, provided
+    you inform other peers where the object code and Corresponding
+    Source of the work are being offered to the general public at no
+    charge under subsection 6d.
+
+  A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+
+  A "User Product" is either (1) a "consumer product", which means any
+tangible personal property which is normally used for personal, family,
+or household purposes, or (2) anything designed or sold for incorporation
+into a dwelling.  In determining whether a product is a consumer product,
+doubtful cases shall be resolved in favor of coverage.  For a particular
+product received by a particular user, "normally used" refers to a
+typical or common use of that class of product, regardless of the status
+of the particular user or of the way in which the particular user
+actually uses, or expects or is expected to use, the product.  A product
+is a consumer product regardless of whether the product has substantial
+commercial, industrial or non-consumer uses, unless such uses represent
+the only significant mode of use of the product.
+
+  "Installation Information" for a User Product means any methods,
+procedures, authorization keys, or other information required to install
+and execute modified versions of a covered work in that User Product from
+a modified version of its Corresponding Source.  The information must
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+code is in no case prevented or interfered with solely because
+modification has been made.
+
+  If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information.  But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in ROM).
+
+  The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or updates
+for a work that has been modified or installed by the recipient, or for
+the User Product in which it has been modified or installed.  Access to a
+network may be denied when the modification itself materially and
+adversely affects the operation of the network or violates the rules and
+protocols for communication across the network.
+
+  Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+
+  7. Additional Terms.
+
+  "Additional permissions" are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law.  If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+
+  When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it.  (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.)  You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+
+  Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders of
+that material) supplement the terms of this License with terms:
+
+    a) Disclaiming warranty or limiting liability differently from the
+    terms of sections 15 and 16 of this License; or
+
+    b) Requiring preservation of specified reasonable legal notices or
+    author attributions in that material or in the Appropriate Legal
+    Notices displayed by works containing it; or
+
+    c) Prohibiting misrepresentation of the origin of that material, or
+    requiring that modified versions of such material be marked in
+    reasonable ways as different from the original version; or
+
+    d) Limiting the use for publicity purposes of names of licensors or
+    authors of the material; or
+
+    e) Declining to grant rights under trademark law for use of some
+    trade names, trademarks, or service marks; or
+
+    f) Requiring indemnification of licensors and authors of that
+    material by anyone who conveys the material (or modified versions of
+    it) with contractual assumptions of liability to the recipient, for
+    any liability that these contractual assumptions directly impose on
+    those licensors and authors.
+
+  All other non-permissive additional terms are considered "further
+restrictions" within the meaning of section 10.  If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term.  If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+
+  If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+
+  Additional terms, permissive or non-permissive, may be stated in the
+form of a separately written license, or stated as exceptions;
+the above requirements apply either way.
+
+  8. Termination.
+
+  You may not propagate or modify a covered work except as expressly
+provided under this License.  Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+
+  However, if you cease all violation of this License, then your
+license from a particular copyright holder is reinstated (a)
+provisionally, unless and until the copyright holder explicitly and
+finally terminates your license, and (b) permanently, if the copyright
+holder fails to notify you of the violation by some reasonable means
+prior to 60 days after the cessation.
+
+  Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+
+  Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+
+  9. Acceptance Not Required for Having Copies.
+
+  You are not required to accept this License in order to receive or
+run a copy of the Program.  Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance.  However,
+nothing other than this License grants you permission to propagate or
+modify any covered work.  These actions infringe copyright if you do
+not accept this License.  Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+
+  10. Automatic Licensing of Downstream Recipients.
+
+  Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License.  You are not responsible
+for enforcing compliance by third parties with this License.
+
+  An "entity transaction" is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations.  If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+
+  You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License.  For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+
+  11. Patents.
+
+  A "contributor" is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based.  The
+work thus licensed is called the contributor's "contributor version".
+
+  A contributor's "essential patent claims" are all patent claims
+owned or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version.  For
+purposes of this definition, "control" includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
 this License.

-  7. If, as a consequence of a court judgment or allegation of patent
-infringement or for any other reason (not limited to patent issues),
-conditions are imposed on you (whether by court order, agreement or
+  Each contributor grants you a non-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+
+  In the following three paragraphs, a "patent license" is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement).  To "grant" such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+
+  If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients.  "Knowingly relying" means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+
+  If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+
+  A patent license is "discriminatory" if it does not include within
+the scope of its coverage, prohibits the exercise of, or is
+conditioned on the non-exercise of one or more of the rights that are
+specifically granted under this License.  You may not convey a covered
+work if you are a party to an arrangement with a third party that is
+in the business of distributing software, under which you make payment
+to the third party based on the extent of your activity of conveying
+the work, and under which the third party grants, to any of the
+parties who would receive the covered work from you, a discriminatory
+patent license (a) in connection with copies of the covered work
+conveyed by you (or copies made from those copies), or (b) primarily
+for and in connection with specific products or compilations that
+contain the covered work, unless you entered into that arrangement,
+or that patent license was granted, prior to 28 March 2007.
+
+  Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+
+  12. No Surrender of Others' Freedom.
+
+  If conditions are imposed on you (whether by court order, agreement or
 otherwise) that contradict the conditions of this License, they do not
-excuse you from the conditions of this License.  If you cannot
-distribute so as to satisfy simultaneously your obligations under this
-License and any other pertinent obligations, then as a consequence you
-may not distribute the Program at all.  For example, if a patent
-license would not permit royalty-free redistribution of the Program by
-all those who receive copies directly or indirectly through you, then
-the only way you could satisfy both it and this License would be to
-refrain entirely from distribution of the Program.
+excuse you from the conditions of this License.  If you cannot convey a
+covered work so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you may
+not convey it at all.  For example, if you agree to terms that obligate you
+to collect a royalty for further conveying from those to whom you convey
+the Program, the only way you could satisfy both those terms and this
+License would be to refrain entirely from conveying the Program.

-If any portion of this section is held invalid or unenforceable under
-any particular circumstance, the balance of the section is intended to
-apply and the section as a whole is intended to apply in other
-circumstances.
+  13. Use with the GNU Affero General Public License.

-It is not the purpose of this section to induce you to infringe any
-patents or other property right claims or to contest validity of any
-such claims; this section has the sole purpose of protecting the
-integrity of the free software distribution system, which is
-implemented by public license practices.  Many people have made
-generous contributions to the wide range of software distributed
-through that system in reliance on consistent application of that
-system; it is up to the author/donor to decide if he or she is willing
-to distribute software through any other system and a licensee cannot
-impose that choice.
+  Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the GNU Affero General Public License into a single
+combined work, and to convey the resulting work.  The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the GNU Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.

-This section is intended to make thoroughly clear what is believed to
-be a consequence of the rest of this License.
-
-  8. If the distribution and/or use of the Program is restricted in
-certain countries either by patents or by copyrighted interfaces, the
-original copyright holder who places the Program under this License
-may add an explicit geographical distribution limitation excluding
-those countries, so that distribution is permitted only in or among
-countries not thus excluded.  In such case, this License incorporates
-the limitation as if written in the body of this License.
+  14. Revised Versions of this License.

-  9. The Free Software Foundation may publish revised and/or new versions
-of the General Public License from time to time.  Such new versions will
+  The Free Software Foundation may publish revised and/or new versions of
+the GNU General Public License from time to time.  Such new versions will
 be similar in spirit to the present version, but may differ in detail to
 address new problems or concerns.

-Each version is given a distinguishing version number.  If the Program
-specifies a version number of this License which applies to it and "any
-later version", you have the option of following the terms and conditions
-either of that version or of any later version published by the Free
-Software Foundation.  If the Program does not specify a version number of
-this License, you may choose any version ever published by the Free Software
-Foundation.
+  Each version is given a distinguishing version number.  If the
+Program specifies that a certain numbered version of the GNU General
+Public License "or any later version" applies to it, you have the
+option of following the terms and conditions either of that numbered
+version or of any later version published by the Free Software
+Foundation.  If the Program does not specify a version number of the
+GNU General Public License, you may choose any version ever published
+by the Free Software Foundation.

-  10. If you wish to incorporate parts of the Program into other free
-programs whose distribution conditions are different, write to the author
-to ask for permission.  For software which is copyrighted by the Free
-Software Foundation, write to the Free Software Foundation; we sometimes
-make exceptions for this.  Our decision will be guided by the two goals
-of preserving the free status of all derivatives of our free software and
-of promoting the sharing and reuse of software generally.
+  If the Program specifies that a proxy can decide which future
+versions of the GNU General Public License can be used, that proxy's
+public statement of acceptance of a version permanently authorizes you
+to choose that version for the Program.

-			    NO WARRANTY
+  Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.

-  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
-FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
-OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
-PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
-OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
-TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
-PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
-REPAIR OR CORRECTION.
+  15. Disclaimer of Warranty.

-  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
-REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
-INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
-OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
-TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
-YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
-PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGES.
+  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
+HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
+OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
+THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
+IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
+ALL NECESSARY SERVICING, REPAIR OR CORRECTION.

-		     END OF TERMS AND CONDITIONS
-
-	Appendix: How to Apply These Terms to Your New Programs
+  16. Limitation of Liability.
+
+  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
+THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
+GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
+USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
+DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
+EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGES.
+
+  17. Interpretation of Sections 15 and 16.
+
+  If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs

  If you develop a new program, and you want it to be of the greatest
 possible use to the public, the best way to achieve this is to make it
@@ -287,15 +628,15 @@ free software which everyone can redistribute and change under these terms.

  To do so, attach the following notices to the program.  It is safest
 to attach them to the start of each source file to most effectively
-convey the exclusion of warranty; and each file should have at least
+state the exclusion of warranty; and each file should have at least
 the "copyright" line and a pointer to where the full notice is found.

    <one line to give the program's name and a brief idea of what it does.>
-    Copyright (C) 19yy  <name of author>
+    Copyright (C) <year>  <name of author>

-    This program is free software; you can redistribute it and/or modify
+    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
+    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
@@ -304,36 +645,30 @@ the "copyright" line and a pointer to where the full notice is found.
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

 Also add information on how to contact you by electronic and paper mail.

-If the program is interactive, make it output a short notice like this
-when it starts in an interactive mode:
+  If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:

-    Gnomovision version 69, Copyright (C) 19yy name of author
-    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    <program>  Copyright (C) <year>  <name of author>
+    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
    This is free software, and you are welcome to redistribute it
    under certain conditions; type `show c' for details.

 The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License.  Of course, the commands you use may
-be called something other than `show w' and `show c'; they could even be
-mouse-clicks or menu items--whatever suits your program.
+parts of the General Public License.  Of course, your program's commands
+might be different; for a GUI interface, you would use an "about box".

-You should also get your employer (if you work as a programmer) or your
-school, if any, to sign a "copyright disclaimer" for the program, if
-necessary.  Here is a sample; alter the names:
+  You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
+For more information on this, and how to apply and follow the GNU GPL, see
+<http://www.gnu.org/licenses/>.

-  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Library General
-Public License instead of this License.
+  The GNU General Public License does not permit incorporating your program
+into proprietary programs.  If your program is a subroutine library, you
+may consider it more useful to permit linking proprietary applications with
+the library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.  But first, please read
+<http://www.gnu.org/philosophy/why-not-lgpl.html>.
@@ -0,0 +1,165 @@
+		   GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
@@ -3,6 +3,489 @@ Revision history for Verilator
 The contributors that suggested a given feature are shown in [].  [by ...]
 indicates the contributor was also the author of the fix; Thanks!

+* Verilator 3.804 2010/09/20
+
+***  Support tracing/coverage of underscore signals, bug280.  [by Jason McMullan]
+
+**** Fix preprocessor `` of existing base define, bug283.  [Usha Priyadharshini]
+
+**** Increase define recursions before error.  [Paul Liu]
+
+**** On core dump, print debug suggestions.
+
+* Verilator 3.803 2010/07/10
+
+***  Fix preprocessor preservation of newlines across macro substitutions.
+
+**** Fix preprocessor stringification of nested macros.
+
+**** Fix some constant parameter functions causing crash, bug253. [Nick Bowler]
+
+**** Fix do {...} while() not requiring final semicolon.
+
+* Verilator 3.802 2010/05/01
+
+***  Support runtime access to public signal names.
+
+***  Add /*verilator public_flat_rw*/ for timing-specific public access.
+
+***  Fix word size to match uint64_t on -m64 systems, bug238. [Joe Eiler]
+
+**** Improve error handling on slices of arrays, bug226. [by Byron Bradley]
+
+**** Report errors when extra underscores used in meta-comments.
+
+**** Fix bit reductions on multi-packed dimensions, bug227. [by Byron Bradley]
+
+**** Fix removing $fscanf if assigned to unused var, bug248. [Ashutosh Das]
+
+**** Fix "make install" with configure outside srcdir.  [Stefan Wallentowitz]
+
+**** Fix loop unroller out of memory; change --unroll-stmts.  [Ashutosh Das]
+
+**** Fix trace files with empty modules crashing some viewers.
+
+**** Fix parsing single files > 2GB.  [Jeffrey Short]
+
+**** Fix installing data files as non-executable, bug168. [by Ahmed El-Mahmoudy]
+
+* Verilator 3.801 2010/03/17
+
+***  Support "break", "continue", "return".
+
+***  Support "`default_nettype none|wire".  [Dominic Plunkett]
+
+**** Skip SystemC tests if not installed.  [Iztok Jeras]
+
+**** Fix clock-gates with non-AND complex logic, bug220. [Ashutosh Das]
+
+**** Fix flushing VCD buffers on $stop.  [Ashutosh Das]
+
+**** Fix Mac OS-X compile issues, bug217.  [Joshua Wise, Trevor Williams]
+
+**** Fix make uninstall, bug216.  [Iztok Jeras]
+
+**** Fix parametrized defines with empty arguments.
+
+* Verilator 3.800 2010/02/07
+
+Application visible changes:
+
+**   SystemPerl is no longer required for tracing.
+     Applications must use VerilatedVcdC class in place of SpTraceVcdC.
+
+**   SystemVerilog 1800-2009 is now the default language.
+     Thus "global" etc are now keywords.  See the --language option.
+
+New features:
+
+**   Support SystemVerilog types "byte", "chandle", "int", "longint",
+     "shortint", "time", "var" and "void" in variables and functions.
+
+**   Support "program", "package", "import" and $unit.
+
+**   Support typedef and enum.  [by Donal Casey]
+
+**   Support direct programming interface (DPI) "import" and "export".
+     Includes an extension to map user $system PLI calls to the DPI.
+
+***  Support assignments of multidimensional slices, bug170. [by Byron Bradley]
+
+***  Support multidimensional inputs/outputs, bug171. [by Byron Bradley]
+
+***  Support "reg [1:0][1:0][1:0]" and "reg x [3][2]", bug176.  [Byron Bradley]
+
+***  Support declarations in loop initializers, bug172.  [by Byron Bradley]
+
+***  Support $test$plusargs and $value$plusargs, but see the docs!
+
+***  Support $sformat and $swrite.
+
+***  Support 1800-2009 define defaults and `undefineall.
+
+***  Add -CFLAGS, -LDFLAGS, <file>.a, <file>.o, and <file>.so options.
+
+***  Speed compiles by avoiding including the STL iostream header.
+     Application programs may need to include it themselves to avoid errors.
+
+***  Add experimental clock domain crossing checks.
+
+***  Add experimental --pipe-filter to filter all Verilog input.
+
+***  Add experimental config files to filter warnings outside of the source.
+
+***  Add VARHIDDEN warning when signal name hides module name.
+
+**** Support optional cell parenthesis, bug179. [by Byron Bradley]
+
+**** Support for loop i++, ++i, i--, --i, bug175. [by Byron Bradley]
+
+**** Support 1800-2009 /*comments*/ in define values.
+
+**** Add Makefile VM_GLOBAL_FAST, listing objects needed to link executables.
+
+**** Add --bbox-unsup option to black-box unsupported UDP tables.
+
+**** Add -Wno-MODDUP option to allow duplicate modules.
+
+Bug fixes:
+
+**** Fix implicit variable issues, bug196, bug201. [Byron Bradley]
+
+**** Fix 'for' variable typing, bug205.  [by Byron Bradley]
+
+**** Fix tracing with --pins-bv 1, bug195.  [Michael S]
+
+**** Fix MSVC++ 2008 compile issues, bug209.  [Amir Gonnen]
+
+**** Fix MinGW compilation, bug184, bug214. [by Shankar Giri, Amir Gonnen]
+
+**** Fix Cygwin 1.7.x compiler error with uint32_t, bug204.  [Ivan Djordjevic]
+
+**** Fix `define argument mis-replacing system task of same name, bug191.
+
+**** Fix Verilator core dump on wide integer divides, bug178. [Byron Bradley]
+
+**** Fix lint_off/lint_on meta comments on same line as warning.
+
+* Verilator 3.720 2009/10/26
+
+**   Support little endian bit vectors ("reg [0:2] x;").
+
+**   Support division and modulus of > 64 bit vectors.  [Gary Thomas]
+
+***  Fix writing to out-of-bounds arrays writing element 0.
+
+**** Fix core dump with SystemVerilog var declarations under unnamed begins.
+
+**** Fix VCD files showing internal flattened hierarchy, broke in 3.714.
+
+**** Fix cell port connection to unsized integer causing false width warning.
+
+**** Fix erroring on strings with backslashed newlines, bug168. [Pete Nixon]
+
+* Verilator 3.714 2009/09/18
+
+**   Add --bbox-sys option to blackbox $system calls.
+
+**   Support generate for var++, var--, ++var, --var.
+
+***  Improved warning when "do" used as identifier.
+
+**** Don't require SYSTEMPERL_INCLUDE if SYSTEMPERL/src exists. [Gary Thomas]
+
+**** Fix deep defines causing flex scanner overflows. [Brad Dobbie]
+
+**** Fix preprocessing commas in deep parameterized macros. [Brad Dobbie]
+
+**** Fix tracing escaped dotted identifiers, bug107.
+
+**** Fix $display with uppercase %M.
+
+**** Fix --error-limit option being ignored.
+
+* Verilator 3.713 2009/08/04
+
+**   Support constant function calls for parameters. [many!]
+
+***  Support SystemVerilog "logic", bug101.  [by Alex Duller]
+
+***  Name SYMRSVDWORD error, and allow disabling it, bug103. [Gary Thomas]
+
+**** Fix escaped preprocessor identifiers, bug106. [Nimrod Gileadi]
+
+* Verilator 3.712 2009/07/14
+
+**   Patching SystemC is no longer required to trace sc_bvs.
+
+***  Support zero-width constants in concatenations.  [Jeff Winston]
+
+***  Add verilator --pins-uint8 option to use sc_in<uint8_t/uint16_t>.
+
+***  Add verilator -V option, to show verbose version.
+
+***  On WIDTH warnings, show variable name causing error.  [Jeff Winston]
+
+**** Add BLKLOOPINIT error code, and describe --unroll-count.  [Jeff Winston]
+
+* Verilator 3.711 2009/06/23
+
+**** Support decimal constants of arbitrary widths. [Mark Marshall]
+
+**** Fix error on case statement with all duplicate items, bug99. [Gary Thomas]
+
+**** Fix segfault on unrolling for's with bad inits, bug90. [Andreas Olofsson]
+
+**** Fix tristates causing "Assigned pin is neither...". [by Lane Brooks]
+
+**** Fix compiler errors under Fedora release candidate 11. [Chitlesh Goorah]
+
+* Verilator 3.710 2009/05/19
+
+**   Verilator is now licensed under LGPL v3 and/or Artistic v2.0.
+
+***  `__FILE__ now expands to a string, per draft SystemVerilog 2010(ish).
+
+**** The front end parser has been re-factored to enable more SV parsing.
+     Code should parse the same, but minor parsing bugs may pop up.
+
+**** Verilator_includer is no longer installed twice, bug48.  [Lane Brooks]
+
+**** Fix escaped identifiers with '.' causing conflicts, bug83.  [J Baxter]
+
+**** Fix define formal arguments that contain newlines, bug84. [David A]
+
+* Verilator 3.703 2009/05/02
+
+***  Fix $clog2 calculation error with powers-of-2, bug81. [Patricio Kaplan]
+
+**** Fix error with tasks that have output first, bug78.  [Andrea Foletto]
+
+**** Fix "cloning" error with -y/--top-module, bug76. [Dimitris Nalbantis]
+
+**** Fix segfault with error on bad --top-module, bug79. [Dimitris Nalbantis]
+
+**** Fix "redefining I" error with complex includes.  [Duraid Madina]
+
+**** Fix GCC 4.3.2 compile warnings.
+
+* Verilator 3.702 2009/03/28
+
+***  Add --pins-bv option to use sc_bv for all ports.  [Brian Small]
+
+***  Add SYSTEMPERL_INCLUDE envvar to assist RPM builds.  [Chitlesh Goorah]
+
+**** Report errors when duplicate labels are used, bug72.  [Vasu Kandadi]
+
+**** Fix the SC_MODULE name() to not include __PVT__.  [Bob Fredieu]
+
+* Verilator 3.701 2009/02/26
+
+**   Support repeat and forever statements.  [Jeremy Bennett]
+
+***  Add --debugi-<srcfile> option, for internal debugging. [Dennis Muhlestein]
+
+**** Fix compile issues with GCC 4.3, bug47.  [Lane Brooks]
+
+**** Fix VL_RANDom to better randomize bits.  [Art Stamness]
+
+**** Fix error messages to consistently go to stderr. [Jeremy Bennett]
+
+**** Fix left associativity for ?: operators.
+
+* Verilator 3.700 2009/01/08
+
+**   Add limited support for tristate inouts.  Written by Lane Brooks,
+     under support by Ubixum Inc.  This allows common pad ring and
+     tristate-mux structures to be Verilated.  See the documentation for
+     more information on supported constructs.
+
+**   Add --coverage_toggle for toggle coverage analysis.
+     Running coverage now requires SystemPerl 1.301 or newer.
+
+***  Add /*verilator coverage_on/_off */ to bracket coverage regions.
+
+***  Optimize two-level shift and and/or trees, +23% on one test.
+
+***  Support posedge of bit-selected signals, bug45. [Rodney Sinclair]
+
+***  Line coverage now aggregates by hierarchy automatically.
+     Previously this would be done inside SystemPerl, which was slower.
+
+**** Minor performance improvements of Verilator compiler runtime.
+
+**** Coverage of each parametarized module is counted separately. [Bob Fredieu]
+
+**** Fix creating parameterized modules when no parameter values are changed.
+
+**** Fix certain generate-if cells causing "clone" error. [Stephane Laurent]
+
+**** Fix line coverage of public functions.  [Soon Koh]
+
+**** Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start().
+
+**** Fix arrayed variables under function not compiling, bug44. [Ralf Karge]
+
+**** Fix --output-split-cfuncs to also split trace code. [Niranjan Prabhu]
+
+**** Fix 'bad select range' warning missing some cases, bug43. [Lane Brooks]
+
+**** Fix internal signal names containing control characters (broke in 3.680).
+
+**** Fix compile error on Ubuntu 8.10. [Christopher Boumenot]
+
+**** Fix internal error on "output x; reg x = y;".
+
+**** Fix wrong result for read of delayed FSM signal, bug46. [Rodney Sinclair]
+
+* Verilator 3.681 2008/11/12
+
+***  Add SystemVerilog unique and priority case.
+
+**** Include Verilog file's directory name in coverage reports.
+
+**** Fix 'for' under 'generate-for' causing error; bug38. [Rafael Shirakawa]
+
+**** Fix coverage hierarchy being backwards with inlining.  [Vasu Arasanipalai]
+
+**** Fix GCC 4.3 compile error; bug35.  [Lane Brooks]
+
+**** Fix MSVC compile error; bug42.  [John Stroebel]
+
+* Verilator 3.680 2008/10/08
+
+**   Support negative bit indexes. [Stephane Laurent]
+     Tracing negative indexes requires latest Verilog-Perl and SystemPerl.
+
+***  Suppress width warnings between constant strings and wider vectors.
+     [Rodney Sinclair]
+
+**** Ignore SystemVerilog timeunit and timeprecision.
+
+**** Expand environment variables in -f input files.  [Lawrence Butcher]
+
+**** Report error if port declaration is missing; bug32. [Guy-Armand Kamendje]
+
+**** Fix genvars causing link error when using --public.  [Chris Candler]
+
+* Verilator 3.671 2008/09/19
+
+**   SystemC uint64_t pins are now the default instead of sc_bv<64>.
+     Use --no-pins64 for backward compatibility.
+
+***  Support SystemVerilog "cover property" statements.
+
+***  When warnings are disabled on signals that are flattened out, disable
+     the warnings on the signal(s) that replace it.
+
+***  Add by-design and by-module subtotals to verilator_profcfunc.
+
+***  Fix extra evaluation of pure combo blocks in SystemC output.
+
+**** Add IMPERFECTSCH warning, disabled by default.
+
+**** Support coverage under SystemPerl 1.285 and newer.
+
+**** Fix stack overflow on large ? : trees. [John Sanguinetti]
+
+**** Support arbitrary characters in identifiers. [Stephane Laurent]
+
+* Verilator 3.670 2008/07/23
+
+**   Add --x-assign=fast option, and make it the default.
+     This chooses performance over reset debugging.  See the manual.
+
+**   Add --autoflush, for flushing streams after $display.  [Steve Tong]
+
+**   Add CASEWITHX lint warning and if disabled fix handling of casez with Xs.
+
+***  Add $feof, $fgetc, $fgets, $fflush, $fscanf, $sscanf. [Holger Waechtler]
+
+***  Add $stime. [Holger Waechtler]
+
+***  Add $random.
+
+***  Add --Wfuture-, for improving forward compatibility.
+
+**** Fix verilator_includer not being installed properly.  [Holger Waechtler]
+
+**** Fix IMPURE errors due to X-assignment temporary variables. [Steve Tong]
+
+**** Fix "lvalue" errors with public functions; bug25.  [CY Wang]
+
+**** Add WIDTH warning to $fopen etc file descriptors.
+
+**** Internal changes to how $displays get compiled and executed.
+
+* Verilator 3.665 2008/06/25
+
+**** Ignore "// verilator" comments alone on endif lines.  [Rodney Sinclair]
+
+**** "Make install" now installs verilator_includer and verilator_profcfunc.
+
+**** Fix tracing missing changes on undriven public wires. [Rodney Sinclair]
+
+**** Fix syntax error when "`include `defname" is ifdefed.  [John Dickol]
+
+**** Fix error when macro call has commas in concatenate. [John Dickol]
+
+**** Fix compile errors under Fedora 9, GCC 4.3.0.  [by Jeremy Bennett]
+
+**** Fix Makefile to find headers/libraries under prefix. [by Holger Waechtler]
+
+* Verilator 3.664 2008/05/08
+
+**** Fix missing file in kit.
+
+* Verilator 3.663 2008/05/07
+
+**** Add DESTDIR to Makefiles to assist RPM construction. [Gunter Dannoritzer]
+
+**** Fix compiler warnings under GCC 4.2.1.
+
+**** Fix preprocessor `else after series of `elsif.  [Mark Nodine]
+
+**** Fix parametrized defines calling define with comma.  [Joshua Wise]
+
+**** Fix comma separated list of primitives.  [by Bryan Brady]
+
+* Verilator 3.662 2008/04/25
+
+***  Add Verilog 2005 $clog2() function.
+     This is useful in calculating bus-widths from parameters.
+
+***  Support /**/ comments in -f option files. [Stefan Thiede]
+
+**** Add error message when modules have duplicate names. [Stefan Thiede]
+
+**** Support defines terminated in EOF, though against spec. [Stefan Thiede]
+
+**** Support optional argument to $finish and $stop.  [by Stefan Thiede]
+
+**** Support ranges on gate primitive instantiations. [Stefan Thiede]
+
+**** Ignore old standard(ish) Verilog-XL defines.  [by Stefan Thiede]
+
+**** Fix "always @ ((a) or (b))" syntax error. [by Niranjan Prabhu]
+
+**** Fix "output reg name=expr;" syntax error. [Martin Scharrer]
+
+**** Fix multiple .v files being read in random order. [Stefan Thiede]
+
+**** Fix internal error when params get non-constants. [Johan Wouters]
+
+**** Fix bug introduced in 3.661 with parametrized defines.
+
+* Verilator 3.661 2008/04/04
+
+***  The --enable-defenv configure option added in 3.660 is now the default.
+     This hard-codes a default for VERILATOR_ROOT etc in the executables.
+
+***  Add --language option for supporting older code. [Stefan Thiede]
+
+***  Add --top-module option to select between multiple tops. [Stefan Thiede]
+
+***  Unsized concatenates now give WIDTHCONCAT warnings. [Jonathan Kimmitt]
+     Previously they threw fatal errors, which in most cases is correct
+     according to spec, but can be incorrect in presence of parameter values.
+
+**** Support functions with "input integer".  [Johan Wouters]
+
+**** Ignore delays attached to gate UDPs.  [Stefan Thiede]
+
+**** Fix SystemVerilog parameterized defines with `` expansion,
+     and fix extra whitespace inserted on substitution.  [Vladimir Matveyenko]
+
+**** Fix no-module include files on command line.  [Stefan Thiede]
+
+**** Fix dropping of backslash quoted-quote at end of $display.
+
+**** Fix task output pin connected to non-variables. [Jonathan Kimmitt]
+
+**** Fix missing test_v in install datadir. [Holger Waechtler]
+
+**** Fix internal error after MSB < LSB error reported to user. [Stefan Thiede]
+
 * Verilator 3.660 2008/03/23

 ***  Add support for hard-coding VERILATOR_ROOT etc in the executables,
@@ -1163,14 +1646,13 @@ of input ports exists for tracing.
 **** First code written.

 ----------------------------------------------------------------------
-$Id$
----------------------------------------------------------------------

 This uses outline mode in Emacs.  See C-h m [M-x describe-mode].

-Copyright 2001-2008 by Wilson Snyder.  This program is free software;
-you can redistribute it and/or modify it under the terms of either the GNU
-General Public License or the Perl Artistic License.
+Copyright 2001-2010 by Wilson Snyder.  This program is free software; you
+can redistribute it and/or modify it under the terms of either the GNU
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.

 Local variables:
 mode: outline
@@ -0,0 +1,34 @@
+^CVS/
+/CVS/
+\.git/
+\.svn/
+\.(bak|old)/
+\.(bak|old)$
+\.tar\.
+.*\.tgz
+.*\.log
+\..*\.swp
+.*\.tmp
+.*\.tex
+.*\.key
+.*\.vcd
+/obj_dir/
+/obj_dbg/
+/obj_opt/
+/INCA_libs/
+/cov_work/
+/logs/
+^Makefile$
+src/Makefile$
+src/Makefile_obj$
+include/verilated.mk$
+config.cache$
+config.status$
+verilator_bin.*
+.vcsmx_rebuild$
+autom4te\.cache/
+nodist/
+/simv$
+/simv.daidir/
+/vc_hdrs.h$
+/csrc/
@@ -1,24 +1,24 @@
-# $Id$
 #*****************************************************************************
 # DESCRIPTION: Verilator top level: Makefile pre-configure version
-# 
-# This file is part of Verilator.  
-# 
+#
+# This file is part of Verilator.
+#
 # Author: Wilson Snyder <[email protected]>
-# 
-# Code available from: http://www.veripool.com/verilator
-# 
+#
+# Code available from: http://www.veripool.org/verilator
+#
 #*****************************************************************************
-# 
-# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
+#
+# Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
-# General Public License or the Perl Artistic License.
-# 
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
 # Verilator is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
+#
 #****************************************************************************/
 #
 # make all	to compile and build Verilator.
@@ -38,7 +38,7 @@
 #      source and built the program without creating any other files,
 #      `make distclean' should leave only the files that were in the
 #      distribution.
-# 
+#
 # make maintainer-clean
 #      Delete everything from the current directory that can be
 #      reconstructed with this Makefile.  This typically includes
@@ -58,9 +58,12 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 MAKEINFO = makeinfo
-TEXI2DVI = texi2dvi
+POD2TEXT = pod2text
 PERL = @PERL@

+# Destination prefix for RPMs
+DESTDIR =
+
 #### Don't edit: You're much better using configure switches to set these
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -81,6 +84,12 @@ infodir = @infodir@
 # Generally ${prefix}/share/verilator
 pkgdatadir = @pkgdatadir@

+# Directory in which to install data across multiple architectures
+datarootdir = @datarootdir@
+
+# Compile options
+CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
+
 #### End of system configuration section. ####
 ######################################################################

@@ -88,36 +97,46 @@ SHELL = /bin/sh

 SUBDIRS = src test_verilated test_c test_sc test_sp test_regress test_vcs

-INFOS = README verilator.txt verilator.html verilator.1 verilator.pdf
+INFOS = README internals.txt verilator.txt verilator.html verilator.1 verilator.pdf

 # Files that can be generated, but should be up to date for a distribution.
 DISTDEP = info Makefile
 # Files to distribute.
 DISTBIN = $(wildcard bin/verilator-*)

-DISTFILES_INC = $(INFOS) .cvsignore COPYING *.in *.ac \
-	Changes README TODO \
+DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
+	*.in *.ac \
+	Changes TODO \
+	MANIFEST.SKIP \
 	bin/* \
-	install-sh configure mkinstalldirs *.texi \
-	include/verilated.[chv]* \
-	include/verilatedos.[chv]* \
+	install-sh configure mkinstalldirs *.pod \
+	include/*.[chv]* \
 	include/*.in \
-	src/.cvsignore src/*.in src/*.cpp src/*.[chly] src/astgen src/flexfix \
-	src/*.pl \
-	test_*/.cvsignore test_*/Makefile* test_*/*.cpp \
-	test_*/*.pl test_*/*.v test_*/*.vc test_*/vlint \
+	include/.*ignore \
+	include/vltstd/*.[chv]* \
+	.*attributes */.*attributes  */*/.*attributes \
+	src/.*ignore src/*.in src/*.cpp src/*.[chly] src/astgen src/bisonpre src/*fix \
+	src/*.pl src/*.pod \
+	test_*/.*ignore test_*/Makefile* test_*/*.cpp \
+	test_*/*.pl test_*/*.v test_*/*.vc test_*/*.vh \
 	test_verilated/vgen*.pl \
-	test_regress/t/*.v* \
-	test_regress/t/*.pl \
+	test_regress/t/*.cpp \
+	test_regress/t/*.h \
+	test_regress/t/*.dat \
+	test_regress/t/*.mem \
 	test_regress/t/*.out \
+	test_regress/t/*.pl \
+	test_regress/t/*.pf \
+	test_regress/t/*.v* \
 	verilator.* \

 INST_PROJ_FILES = \
 	bin/verilator \
 	bin/verilator_includer \
-	include/verilated.[chv]* \
+	bin/verilator_profcfunc \
 	include/verilated.mk \
-	include/verilatedos.[chv]* \
+	include/*.[chv]* \
+	include/vltstd/*.[chv]* \

 INST_PROJ_BIN_FILES = \
 	verilator_bin \
@@ -125,14 +144,23 @@ INST_PROJ_BIN_FILES = \

 DISTFILES := $(DISTFILES_INC)

+ifeq ($(OBJCACHE_JOBS),)
+ifneq ($(OBJCACHE_HOSTS),)
+export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
+endif
+endif
+
+default: all
 all: all_nomsg msg_test
-all_nomsg: verilator_exe
+all_nomsg: verilator_exe $(VL_INST_MAN_FILES)

 .PHONY:verilator_exe
+.PHONY:verilator_bin
+.PHONY:verilator_bin_dbg
 verilator_exe verilator_bin verilator_bin_dbg:
 	@echo ------------------------------------------------------------
 	@echo "making verilator in src" ; \
-	  (cd src && $(MAKE) )
+	  (cd src && $(MAKE) $(OBJCACHE_JOBS) )

 .PHONY:msg_test
 msg_test:
@@ -178,7 +206,7 @@ verilator.1: bin/verilator
 	pod2man $< $@

 verilator.txt: bin/verilator
-	pod2text $< $@
+	$(POD2TEXT) $< $@

 verilator.html: bin/verilator
 	pod2html $< >$@
@@ -186,55 +214,108 @@ verilator.html: bin/verilator
 verilator.pdf: bin/verilator $(DISTCONFIG)
 	pod2latex --full --out verilator.tex bin/verilator
 	cat < verilator.tex \
+	   | sed 's/\\begin{document}/\\usepackage[left=1.7in,right=1.7in,top=1.3in,bottom=1.3in]{geometry}\n\\begin{document}/' \
+	   | sed 's/\\begin{document}/\\usepackage[pdftex,bookmarks=true,bookmarksnumbered=true,hypertexnames=false,breaklinks=true,linkbordercolor={0 0 1}]{hyperref}\n\\begin{document}/' \
 	   | sed 's/\\begin{document}/\\usepackage{fancyhdr} \\pagestyle{fancy}\n\\begin{document}/' \
 	   | sed 's/\\begin{document}/\\setlength{\\parindent}{0pt} \\setlength{\\parskip}{\\baselineskip}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\title{$(DISTTITLE)} \\date{${DISTDATE}} \\author{Wilson Snyder\\\\ http:\/\/www.veripool.com}\n\\begin{document}/' \
+	   | sed 's/\\begin{document}/\\title{$(DISTTITLE)} \\date{${DISTDATE}} \\author{Wilson Snyder\\\\ http:\/\/www.veripool.org}\n\\begin{document}/' \
 	   | sed 's/\\begin{document}/\\lhead[$(DISTTITLE)]{$(DISTTITLE)}\n\\begin{document}/' \
 	   | sed 's/\\tableofcontents/\\begin{titlepage} \\maketitle \\end{titlepage}\n\\tableofcontents/' \
 	   > verilator2.tex
 	mv verilator2.tex verilator.tex
 	pdflatex verilator.tex
 	pdflatex verilator.tex
-	-rm -f verilator.toc verilator.aux verilator.idx
+	-rm -f verilator.toc verilator.aux verilator.idx verilator.out

-INSTALL: install.texi
-	$(MAKEINFO) -I$(srcdir) $(srcdir)/install.texi --output=$@ \
-	--no-headers --no-validate
+README: readme.pod
+	-rm -f $@
+	$(POD2TEXT) --loose $< > $@

-README: readme.texi
-	$(MAKEINFO) -I$(srcdir) $(srcdir)/readme.texi --output=$@ \
-	--no-headers --no-validate
+internals.txt: internals.pod
+	-rm -f $@
+	$(POD2TEXT) --loose $< > $@

-# See uninstall also
-VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg
-installbin:
-	$(SHELL) ${srcdir}/mkinstalldirs $(bindir)
-	( cd bin ; $(INSTALL_PROGRAM) verilator $(bindir)/verilator )
-	( $(INSTALL_PROGRAM) verilator_bin $(bindir)/verilator_bin )
-	( $(INSTALL_PROGRAM) verilator_bin_dbg $(bindir)/verilator_bin_dbg )
+# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
+VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg \
+	verilator_includer verilator_profcfunc
+# Some scripts go into both the search path and pkgdatadir,
+# so they can be found by the user, and under $VERILATOR_ROOT.

+# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_MAN_FILES = verilator.1
-installman:
-	$(SHELL) ${srcdir}/mkinstalldirs $(mandir)
+
+VL_INST_INC_BLDDIR_FILES = \
+	include/verilated.mk \
+
+# Files under srcdir, instead of build time
+VL_INST_INC_SRCDIR_FILES = \
+	include/*.[chv]* \
+	include/vltstd/*.[chv]* \
+
+VL_INST_DATA_SRCDIR_FILES = \
+	test_v/*.[chv]* \
+	test_c/*.[chv]*   test_c/Makefile  test_c/Makefile_obj  \
+	test_sc/*.[chv]*  test_sc/Makefile test_sc/Makefile_obj \
+	test_sp/*.[chv]*  test_sp/Makefile test_sp/Makefile_obj \
+
+installbin:
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(bindir)
+	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
+	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
+	( $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
+	( $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/bin
+	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
+
+installman: $(VL_INST_MAN_FILES)
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(mandir)/man1
 	for p in $(VL_INST_MAN_FILES) ; do \
-	  $(INSTALL_PROGRAM) $$p $(mandir)/man1/$$p; \
+	  $(INSTALL_DATA) $$p $(DESTDIR)$(mandir)/man1/$$p; \
 	done

 installdata:
-	$(SHELL) ${srcdir}/mkinstalldirs $(pkgdatadir)/examples
-	cp -r include $(pkgdatadir)
-	cp -r src     $(pkgdatadir)
-	cp -r test_c  $(pkgdatadir)/examples
-	cp -r test_sc $(pkgdatadir)/examples
-	cp -r test_sp $(pkgdatadir)/examples
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/include/vltstd
+	for p in $(VL_INST_INC_BLDDIR_FILES) ; do \
+	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
+	done
+	cd $(srcdir) \
+	; for p in $(VL_INST_INC_SRCDIR_FILES) ; do \
+	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
+	done
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_c
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_sc
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_sp
+	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_v
+	cd $(srcdir) \
+	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
+	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/examples/$$p; \
+	done
+
+# We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
+uninstall:
+	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_BIN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_BIN_FILES)
+	-cd $(DESTDIR)$(mandir)/man1 && rm -f $(VL_INST_MAN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_BLDDIR_FILES)
+	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/examples && rm -f $(VL_INST_DATA_SRCDIR_FILES)
+	-rmdir $(DESTDIR)$(pkgdatadir)/bin
+	-rmdir $(DESTDIR)$(pkgdatadir)/include/vltstd
+	-rmdir $(DESTDIR)$(pkgdatadir)/include
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_sp
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_v
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples
+	-rmdir $(DESTDIR)$(pkgdatadir)

-VL_INST_DATA_FILES = verilator.1
 install: all_nomsg installbin installman installdata install-msg

 install-here: installman ftp

 ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
 DIRPROJECT := $(shell project_dir --project)
+VERILATOR_CAD_DIR = $(CAD_DIR)/verilator/$(DISTNAMEREV)/$(DIRPROJECT_ARCH)
 INST_PROJ_CVS = cp_if_cvs_diff

 install-project: dist
@@ -242,12 +323,16 @@ install-project: dist
 	strip verilator_bin*
 	$(MAKE) install-project-quick
 	for p in verilator.1 ; do \
-	  $(INSTALL_PROGRAM) -m 0666 $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
+	  $(INSTALL_DATA) $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
 	done
-	$(INST_PROJ_CVS) $(DISTNAME).tar.gz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
-	rm $(DISTNAME).tar.gz
+	$(INST_PROJ_CVS) $(DISTNAME).tgz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
+	rm $(DISTNAME).tgz

 install-project-quick:
+ifeq ($(CFG_WITH_DEFENV),yes)
+	@echo "%Error: Reconfigure with './configure --disable-defenv' to avoid hardcoded paths."
+	false
+endif
 	@echo "Install-project-quick (no strip) to $(DIRPROJECT)"
 	for p in $(INST_PROJ_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p; \
@@ -255,43 +340,54 @@ install-project-quick:
 	for p in $(INST_PROJ_BIN_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p-$(DIRPROJECT_ARCH); \
 	done
+
+install-cadtools: dist
+	@echo "Install-project to $(CAD_DIR)"
+	strip verilator_bin*
+	$(MAKE) install-cadtools-quick
+	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/man/man1
+	for p in verilator.1 ; do \
+	  $(INSTALL_DATA) $$p $(VERILATOR_CAD_DIR)/man/man1/$$p; \
+	done
+	$(INST_PROJ_CVS) $(DISTNAME).tgz $(VERILATOR_CAD_DIR)/verilator.tgz
+	rm $(DISTNAME).tgz
+
+install-cadtools-quick:
+ifeq ($(CFG_WITH_DEFENV),yes)
+	@echo "%Error: Reconfigure with './configure --disable-defenv' to avoid hardcoded paths."
+	false
+endif
+	@echo "Install-cadtools-quick (no strip) to $(VERILATOR_CAD_DIR)"
+	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/include/vltstd
+	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/bin
+	for p in $(INST_PROJ_FILES) ; do \
+	  $(INST_PROJ_CVS) $$p $(VERILATOR_CAD_DIR)/$$p; \
+	done
+	for p in $(INST_PROJ_BIN_FILES) ; do \
+	  $(INST_PROJ_CVS) $$p $(VERILATOR_CAD_DIR)/$$p; \
+	done
+
+# VERILATOR_AUTHOR_SITE
 endif

 ftp: info
-	echo "http://www.veripool.com/verilator3.html"
-	cp verilator.html verilator_man.html
-	ftp_tree --password $(VERIPOOL_PW) --user $(VERIPOOL_USER) verilator_man.html webftp.veripool.com:/web

 install-msg:
 	@echo "Installed!"
 	@echo
-	@echo "Add to your startup file (for bash or csh, as appropriate):"
-	@echo "	export VERILATOR_ROOT="`pwd`
-	@echo "	setenv VERILATOR_ROOT "`pwd` " ; export VERILATOR_ROOT "
-	@echo
-	@echo "See 'verilator.txt' for documentation."
+	@echo "Fod documentation see 'man verilator' or 'verilator --help'"
+	@echo "For forums and to report bugs see http://www.veripool.org/verilator"
 	@echo

-uninstall:
-	-cd $(mandir)/man1 && rm -f $(VL_INST_MAN_FILES)
-	-cd $(bindir) && rm -f $(VL_INST_BIN_FILES)
-	-rm -f $(pkgdatadir)
+IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in

-# autoheader might not change config_build.h.in, so touch a stamp file.
-IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in ${srcdir}/*/*/*.in \
-	*.in */*.in */*.in
-
-${srcdir}/config_build.h.in: stamp-h.in
-${srcdir}/stamp-h.in: configure.ac $(wildcard $(IN_WILD))
+# autoheader might not change config_build.h.in, so touch it
+${srcdir}/config_build.h: ${srcdir}/config_build.h.in configure
 	cd ${srcdir} && autoheader
-	echo timestamp > ${srcdir}/stamp-h.in
-config_build.h: stamp-h
-stamp-h: config_build.h.in config.status
-	./config.status
-Makefile: Makefile.in config.status
-	./config.status
-src/Makefile: src/Makefile.in config.status
+	touch $@
+Makefile: Makefile.in config.status $(IN_WILD)
 	./config.status
+src/Makefile: src/Makefile.in Makefile
 config.status: configure
 	./config.status --recheck
 configure: configure.ac
@@ -300,7 +396,7 @@ configure: configure.ac
 maintainer-clean::
 	@echo "This command is intended for maintainers to use;"
 	@echo "rebuilding the deleted files requires makeinfo."
-	rm -f *.info* $(INFOS) faq.html verilator.html configure bin/*
+	rm -f *.info* $(INFOS) configure

 clean mostlyclean distclean maintainer-clean maintainer-copy::
 	for dir in $(SUBDIRS); do \
@@ -309,7 +405,7 @@ clean mostlyclean distclean maintainer-clean maintainer-copy::
 	done

 clean mostlyclean distclean maintainer-clean::
-	rm -f $(SCRIPTS) *.tmp 
+	rm -f $(SCRIPTS) *.tmp
 	rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
 	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
 	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
@@ -320,20 +416,28 @@ distclean maintainer-clean::
 	rm -f include/verilated.mk

 TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/[a-z]*.in \
-	${srcdir}/[a-z]*.in ${srcdir}/*.texi
+	${srcdir}/[a-z]*.in ${srcdir}/*.pod

 TAGS:	$(TAGFILES)
 	etags $(TAGFILES)

+######################################################################
+# Test targets
+
+dist-file-list:
+	@echo "begin-dist-file-list:";  # Scripts look for this
+	@echo $(wildcard $(DISTFILES))
+	@echo "end-dist-file-list:";  # Scripts look for this

 ######################################################################
 # Distributions

-DISTCONFIG = src/config_build.h.in
+DISTCONFIG = ${srcdir}/src/config_build.h.in

 DISTTITLE := $(shell sed -e '/DTVERSION/!d' -e 's/[^0-9]*\([0-9.a-z]*\).*/verilator-\1/' -e 's/v/V/' -e q $(DISTCONFIG))
 DISTNAME := $(shell sed -e '/DTVERSION/!d' -e 's/[^0-9]*\([0-9.a-z]*\).*/verilator-\1/' -e q $(DISTCONFIG))
-DISTDATEPRE := $(shell sed -e '/DTVERSION/!d' -e 's/.*\([0-3]\?[0-9].[0-3]\?[0-9].[1-2][0-9][0-9][0-9]\).*/\1/' -e q $(DISTCONFIG))
+DISTDATEPRE := $(shell sed -e '/DTVERSION/!d' -e 's/.*\([1-2][0-9][0-9][0-9].[0-9]*[0-9].[0-9]*[0-9]\).*/\1/' -e q $(DISTCONFIG))
+DISTNAMEREV := $(shell sed -e '/DTVERSION/!d' -e 's/.*verilator_\([^"]*\).*/\1/' -e q src/config_rev.h)

 DISTTAGNAME := $(subst .,_,$(subst -,_,$(DISTNAME)))
 DISTDATE := $(subst /,-,$(DISTDATEPRE))
@@ -352,14 +456,14 @@ dist: $(DISTDEP) maintainer-copy
 	chmod -R a+r $(DISTNAME)
 	tar chf $(DISTNAME).tar $(DISTNAME)
 	gzip --force --best $(DISTNAME).tar
+	mv $(DISTNAME).tar.gz $(DISTNAME).tgz
 	rm -fr $(DISTNAME)

 maintainer-diff:
 	svnorcvs diff $(DISTTAGNAME)

 preexist:
-	test ! -r ~/src/kits/$(DISTNAME).tar.gz
+	svnorcvs nexists $(DISTTAGNAME)

 maintainer-dist: preexist dist tag
-	cp *.gz ~/backpack
-	cp *.gz ~/src/kits
+	svnorcvs release $(DISTNAME).tgz
@@ -1,153 +1,139 @@
-// $Id$
 // DESCRIPTION: Verilator: List of To Do issues.
 //
-// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
+// Copyright 2004-2010 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.


-Features:
- 	Finish 3.400 new ordering fixes
-	Latch optimizations {Need here}
-	Task I/Os connecting to non-simple variables.
-	Fix nested casez statements expanding into to huge C++. [JeanPaul Vanitegem]
-	Fix FileLine memory inefficiency
-	Fix ordering of each bit separately in a signal (mips)
+Language support:
+	* Fix ordering of each bit separately in a signal (mips)
 		assign b[3:0] = b[7:4];  assign b[7:4] = in;
-	Support gate primitives/ cell libraries from xilinx, etc
-	Assign dont_care value to an 1'bzzz assignment
-	Function to eval combo logic after /*verilator public*/ functions [gwaters]
-	Support generated clocks (correctness)
-	?gcov coverage
-	Selectable SystemC types based on widths (see notes below)
-	Compile time
-		Inline first level trace routines
-	Coverage
-		Points should be per-scope like everything else rather then per-module
-		Expression coverage (see notes)
-	Constant functions for widths, etc, IE   "input [log2(PARAM):0] xx;"
-	More Verilog 2001 Support
-		(* *) Attributes  (just ignore -- preprocessor?)
-		Real numbers (NEVER)
-		Recursive functions (NEVER)
-		Verilog configuration files (NEVER)
-	DPI to define C/C++ calls from Verilog
+	* Support UDP gate primitives/ cell libraries
+		(have code for combos - problem is sequential udps)
+	* Function to eval combo logic after /*verilator public*/ functions [gwaters]
+	* Support generated clocks (correctness)
+	* Real numbers
+	* Recursive functions
+	* Verilog configuration files
+	* Structs/unions (have starting point)
+	* DPI to define C/C++ calls from Verilog
+	* Expression coverage (see notes)
+	* Better tristate support

 Long-term Features
-	Assertions
-	VHDL parser  [Philips]
-	Tristate support
-	SystemPerl integration
-	Multithreaded execution
-	Front end parser integration into Verilog-Perl like Netlist
+	* Assertions
+	* Tristate support
+	* Multithreaded execution
+
+Configure/Make/Install
+	* Full MSVC++ compilation (does scons support this?) (4.000?)
+	* Distribute with flex/bison already expanded?
+	  Flex library not needed.  Probably too difficult to be worth it.
+	* Integrate SystemPerl coverage
+    	      (Note in /usr/include there are no upper cased include files.)
+		Coverage.pm		-- Need all functionality, but in C?
+		Coverage/Item.pm	-- Need all functionality, but in C?
+		Coverage/ItemKey.pm	-- Need all functionality, but in C?
+		sp_preproc		-- Some steps in here need to be moved to generated C
+		src/Sp.cpp		-- n/a
+		src/SpCommon.h		-- mostly overlaps verilatedos.h
+		src/SpCoverage.cpp/h	-- All needed
+		src/SpFunctor.cpp/h	-- No longer used
+		src/SpTraceVcd.cpp/h	-- MOVED
+		src/SpTraceVcdC.cpp/h	-- MOVED
+		src/sp_log.cpp/h	-- Not needed
+		src/systemperl.h	-- some stuff may be cut
+		vcoverage		-- Need all functionality, but in C?

 Testing:
-	Capture all inputs into global "rerun it" file
-	Code to make wrapper that sets signals, so can do comparison checks
-	New random program generator
-	Better graph viewer with search and zoom
-	Port and test against opencores.org code
+	* Move test_c/sp/v/verilated into test_regress format (4.000?)
+	* Capture all inputs into global "rerun it" file
+	* Code to make wrapper that sets signals, so can do comparison checks
+	* New random program generator
+	* Better graph viewer with search and zoom
+	* Port and test against opencores.org code

 Usability:
-	Better reporting of unopt problems, including what lines of code
-	Report more errors (all of them?) before exiting [Eugene Weber]	
+	* Detect and pre-remove most UNOPTFLATs (4.000) 
+	* Better reporting of unopt problems, including what lines of code
+	* Report more errors (all of them?) before exiting [Eugene Weber]
+	* Auto-create scons config files
+	* Print version/etc message at runtime. (4.000?)
+	  Include number of lines of code, percent comments, code complexity measurement
+	  <-80chars------------------------------------------------------------------->
+	  Verilator 3.600 - fast, free, open-sourced.  Copyright 2001-2010.
+	  Verilated #### modules, #### instances, ##### sigs,
+	  	    #### non-comment lines, ##### ops, ### KB model size
+	* Default the --l2name to remove extra "v" level of hierarchy (flag to make "top")

 Internal Code:
-	Eliminate the AstNUser* passed to all visitors; its only needed in V3Width,
-	and removing it will speed up and simplify all the other code.
+	* Eliminate the AstNUser* passed to all visitors; its only needed in V3Width,
+	  and removing it will speed up and simplify all the other code.
+	* V3Graph should be templated container type, taking in Vertex + Edge types
+	* Rename V3PreLex etc to match VerilogPerl filenames
+	* Instead of string, have an VEncodedString/VIdString which contains __DOT__ish
+	  things, to reduce bugs.  Also add _20 trailing space to \ encoded names. (4.000)
+
+Runtime:
+	* New evalulation loop   ~/src/verilator/notes/event_loop.txt (4.000?)
+	* Remove all private internal functions from top level wrapper header, move
+	  to new level (4.000?)
+	* Completely standalone simulation (4.000)
+	   main() records arguments for $test$plusvars
+	   instantiates top,
+	   does tracing  (support $dump?)
+	   calls top->simulateForever()
+	   exits

 Performance:
-	Constant propagation
+	* Latch optimizations
+	* Constant propagation
 		Extra cleaning AND:  1 & ((VARREF >> 1) | ((&VARREF >> 1) & VARREF))
 		Extra shift (perhaps due to clean): if (1 & CAST (VARREF >> #))
-	Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
+	* Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
 		Could propagate the AND into pos/negedges and let domaining optimize.
-	Negedge reset
+	* Negedge reset
 		Switch to remove negedges that don't matter
 		Can't remove async resets from control flops (like in syncronizers)
-	If all references to array have a constant index, blow up into separate signals-per-index
-	Multithreaded execution
-	Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
-	Move _last sets and all other combo logic inside master
-		if() that triggers on all possible sense items 
-	Rewrite and combine V3Life, V3Subst
+	* If all references to array have a constant index, blow up into separate signals-per-index
+	* Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
+	* Move _last sets and all other combo logic inside master
+		if() that triggers on all possible sense items
+	* Rewrite and combine V3Life, V3Subst
 		If block temp only ever set in one place to constant, propagate it
 			Used in t_mem for array delayed assignments
 		Replace variables if set later in same cfunc branch
 			See for example duplicate sets of _narrow in cycle 90/91 of t_select_plusloop
-	Same assignment on both if branches
+	* Same assignment on both if branches
 		"if (a) { ... b=2; } else { ... b=2;}" -> "b=2; if ..."
 		Careful though, as b could appear in the statement or multiple times in statement
 		(Could just require exatly two 'b's in statement)
-	Simplify XOR/XNOR/AND/OR bit selection trees
+	* Simplify XOR/XNOR/AND/OR bit selection trees
 		Foo = A[1] ^ A[2] ^ A[3] etc are better as ^ ( A & 32'b...1110 )
-	Combine variables into wider elements
+	* Combine variables into wider elements
 		Parallel statements on different bits should become single signal
 		Variables that are always consumed in "parallel" can be joined
-	Duplicate assignments in gate optimization
+	* Duplicate assignments in gate optimization
 		Common to have many separate posedge blocks, each with identical
 		reset_r <= rst_in
-	*If signal is used only once (not counting trace), always gate substitute
+	* If signal is used only once (not counting trace), always gate substitute
 		Don't merge if any combining would form circ logic (out goes back to in)
-	Multiple assignments each bit can become single assign with concat
+	* Multiple assignments each bit can become single assign with concat
 		Make sure a SEL of a CONCAT can get the single bit back.
-	Usually blocks/values
+	* Usually blocks/values
 		Enable only after certain time, so VL_TIME_I(32) > 0x1e gets eliminated out
-	Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
-	Allow Split of case statements without a $display/$stop
-	I-cache packing improvements (what/how?)
-	Data cache organization (order of vars in class)
+	* Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
+	* Allow Split of case statements without a $display/$stop
+	* I-cache packing improvements (what/how?)
+	* Data cache organization (order of vars in class)
 		First have clocks,
 		then bools instead of uint32_t's
 		then based on what sense list they come from, all outputs, then all inputs
 		finally have any signals part of a "usually" block, or constant.
-	Rather then tracking widths, have a MSB...LSB of this expression
+	* Rather then tracking widths, have a MSB...LSB of this expression
 		(or better, a bitmask of bits relevant in this expression)
-	Track recirculation and convert into clock-enables
-	Clock enables should become new clocking domains for speed
-	If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
-	Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)
-
-	All of the temp vars that get set, exp pre_ vars and never feedback
-	(not flops) don't need to be stored in the structs, but instead can
-	be per-invocation, and even better register-colored-like to reuse
-	the space.  This will greatly reduce the data footprint.
-
-
-//**********************************************************************
-//* Detailed notes on 'todo' features
-
-Selectable SystemC types based on widths (see notes below)
-	Statements:
-		verilator sc_type    uint32_t  {override specific I/O signals}
-		verilator sc_typedef width 1     bool
-		verilator sc_typedef width 2-32  uint32_t
-		verilator sc_typedef width 33-64 uint64_t
-		verilator sc_typedef width 65+   sc_bv<width>	//<< programmable width
-	Replace `systemc_clock, --pins64
-	Have accessor function with type overloading to get or set the pin value.
-	(Get rid of getdatap mess?)
-
-//**********************************************************************
-//* Eventual tristate bus Stuff allowed (old verilator)
-
- 1) Tristate assignments must be continuous assignments
-    The RHS of a tristate assignment can be the following
-       a) a node (tristate or non-tristate)
-       b) a constant (must be all or no z's)
-	    x'b0, x'bz, x{x'bz}, x{x'b0} -> are allowed
-       c) a conditional whose possible values are (a) or (b)
-
- 2) One can lose that fact that a node is a tristate node.  This happens
-    if a tristate node is assigned to a 'standard' node, or is used on 
-    RHS of a conditional. The following infer tristate signals:
-       a) inout <SIGNAL> 
-       b) tri <SIGNAL> 
-       c) assigning to 'Z' (maybe through a conditional)
-    Note: tristate-ness of an output port determined only by
-          statements in the module (not the instances it calls)
-  
- 4) Tristate variables can't be multidimensional arrays
- 5) Only check tristate contention between modules (not within!)	
- 6) Only simple compares with 'Z' are allowed (===)
-
+	* Track recirculation and convert into clock-enables
+	* Clock enables should become new clocking domains for speed
+	* If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
+	* Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)
@@ -1,19 +1,7 @@
 : # -*-Mode: perl;-*- use perl, wherever it is
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
-# $Id$
-######################################################################
-#
-# Copyright 2005-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -33,14 +21,16 @@ use vars qw ($Debug);
 $Debug = 0;
 my $Opt_A;
 my $Opt_B;
+my $Opt_Lineno = 1;
 autoflush STDOUT 1;
 autoflush STDERR 1;
 Getopt::Long::config ("no_auto_abbrev");
 if (! GetOptions (
-		  "help"	=> \&usage,
-		  "debug"	=> \&debug,
-		  "<>"		=> \&parameter,
-		  )) {
+	  "help"	=> \&usage,
+	  "debug"	=> \&debug,
+	  "<>"		=> \&parameter,
+	  "lineno!"	=> \$Opt_Lineno,
+    )) {
    die "%Error: Bad usage, try 'verilator_difftree --help'\n";
 }

@@ -72,6 +62,7 @@ sub diff_dir {
 	(my $base = $fn) =~ s!.*/!!;
 	$files{$base}{b} = $fn;
    }
+    my $any;
    foreach my $base (sort (keys %files)) {
 	my $a = $files{$base}{a};
 	my $b = $files{$base}{b};
@@ -79,7 +70,9 @@ sub diff_dir {
 	print "="x70,"\n";
 	print "= $a <-> $b\n";
 	diff_file($a,$b);
+	$any = 1;
    }
+    $any or warn "%Warning: No .tree files found\n";
 }

 sub diff_file {
@@ -91,7 +84,7 @@ sub diff_file {

    filter ($a, $tmp_a);
    filter ($b, $tmp_b);
-    system("diff $tmp_a $tmp_b");
+    system("diff -u $tmp_a $tmp_b");
    unlink $tmp_a;
    unlink $tmp_b;
 }
@@ -106,6 +99,7 @@ sub filter {
 	next if $line =~ / This=/;
 	$line =~ s/0x[a-f0-9]+/0x/g;
 	$line =~ s/<e[0-9]+\#?>/<e>/g;
+	$line =~ s/{\d+}/{}/g if !$Opt_Lineno;
 	print $f2 $line;
    }
    $f1->close;
@@ -115,7 +109,6 @@ sub filter {
 #----------------------------------------------------------------------

 sub usage {
-    print '$Id$ ', "\n";
    pod2usage(-verbose=>2, -exitval => 2);
    exit (1);
 }
@@ -130,7 +123,7 @@ sub parameter {
 	$Opt_A = $param;
    } elsif (!defined $Opt_B) {
 	$Opt_B = $param;
-    } else {	
+    } else {
 	die "%Error: Unknown parameter: $param\n";
    }
 }
@@ -174,15 +167,19 @@ directories, ignoring irrelevant pointer differences.

 Displays this message and program version and exits.

+=item --nolineno
+
+Do not show differences in line numbering.
+
 =back

 =head1 DISTRIBUTION

-The latest version is available from L<http://www.veripool.com/>.
+The latest version is available from L<http://www.veripool.org/verilator>.

-Copyright 2005-2008 by Wilson Snyder.  This package is free software; you
-can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Copyright 2005-2010 by Wilson Snyder.  This package is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

 =head1 AUTHORS

@@ -1,16 +1,16 @@
 : # -*-Mode: perl;-*- use perl, wherever it is
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
-# $Id$
 # DESCRIPTION: Print include statements for each ARGV
 #
-# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
-# redistribute it and/or modify it under the terms of either the GNU
-# General Public License or the Perl Artistic License.
+# Copyright 2003-2010 by Wilson Snyder. This package is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU Lesser
+# General Public License Version 3 or the Perl Artistic License Version 2.0.
 ######################################################################

 require 5.005;
 use warnings;
+print "// DESCR"."IPTION: Generated by verilator_includer via makefile\n";
 foreach my $param (@ARGV) {
    print "#include \"$param\"\n"
 }
@@ -1,19 +1,7 @@
 : # -*-Mode: perl;-*- use perl, wherever it is
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
-# $Id$
-######################################################################
-#
-# Copyright 2007-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -21,6 +9,7 @@ use warnings;
 use Getopt::Long;
 use IO::File;
 use Pod::Usage;
+eval { use Data::Dumper;  $Data::Dumper::Indent = 1; }; # Debug, ok if missing
 use strict;
 use vars qw ($Debug);

@@ -50,7 +39,6 @@ profcfunc($Opt_File);
 #----------------------------------------------------------------------

 sub usage {
-    print '$Id$ ', "\n";
    pod2usage(-verbose=>2, -exitval => 2);
    exit (1);
 }
@@ -63,7 +51,7 @@ sub parameter {
    my $param = shift;
    if (!defined $Opt_File) {
 	$Opt_File = $param;
-    } else {	
+    } else {
 	die "%Error: Unknown parameter: $param\n";
    }
 }
@@ -78,7 +66,8 @@ sub profcfunc {
    my %funcs;

    while (defined (my $line=$fh->getline())) {
-	if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+.*\s+(\S+)\s*$/) {
+	#                  %time      cumesec   selfsec     calls     {stuff}   name
+	if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
 	    my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
 	    $funcs{$func}{pct} += $pct;
 	    $funcs{$func}{sec} += $sec;
@@ -88,47 +77,75 @@ sub profcfunc {
    $fh->close;

    # Find modules
+    my %pointer_mods;
    my %verilated_mods;
    foreach my $func (keys %funcs) {
-	if ($func =~ /(.*)::_eval\(.*__Syms.*\)$/) {
+	if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
 	    $verilated_mods{$1} = qr/^$1/;
+	    $pointer_mods{$2} = $1;
 	}
    }
+    #print Dumper(\%pointer_mods, \%verilated_mods);

    # Resort by Verilog name
    my %vfuncs;
    my %groups;
    foreach my $func (keys %funcs) {
+	my $pct = $funcs{$func}{pct};
 	my $vfunc = $func;
 	my $design;
+
+	if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
+	    $design = $pointer_mods{$1};
+	}
+
 	foreach my $vde (keys %verilated_mods) {
+	    last if $design;
 	    if ($func =~ /$verilated_mods{$vde}/) {
 		$design=$vde;
 		last;
 	    }
 	}
-	if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__([0-9]+)\(/) {
+
+	if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
 	    $vfunc     = sprintf("VBlock    %s:%d", $1, $2);
-	    $groups{"Verilog Blocks under $design"} += $funcs{$func}{pct};
+	    $groups{type}{"Verilog Blocks under $design"} += $pct;
+	    $groups{design}{$design} += $pct;
+	    $groups{module}{$1} += $pct;
 	} else {
 	    if ($design) {
 		$vfunc = sprintf("VCommon   %s", $func);
-		$groups{"Common code under $design"} += $funcs{$func}{pct};
+		$groups{type}{"Common code under $design"} += $pct;
+		$groups{design}{$design} += $pct;
+		$groups{module}{$design." common code"} += $pct;
 	    } else {
 		$vfunc = sprintf("C++       %s", $func);
-		$groups{'C++'} += $funcs{$func}{pct};
+		$groups{type}{'C++'} += $pct;
+		$groups{design}{'C++'} += $pct;
+		$groups{module}{'C++'} += $pct;
 	    }
 	}
 	$vfuncs{$vfunc} = $funcs{$func};
    }

-    print("Overall summary:\n");
-    print("  % time\n");
-    foreach (sort (keys %groups)) {
-	printf("  %6.2f  In all %s\n", $groups{$_}, $_);
-    }
-    print("\n");

+    foreach my $type qw(type design module) {
+	my $missing = 100;
+	foreach (sort (keys %{$groups{$type}})) {
+	    $missing -= $groups{$type}{$_};
+	}
+	if ($missing) {
+	    $groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
+	}
+
+	print("Overall summary by $type:\n");
+	printf("  %-6s  %s\n","% time",$type);
+	foreach my $what (sort (keys %{$groups{$type}})) {
+	    (my $pwhat = $what) =~ s/^\377//;  # Just used to establish sort order
+	    printf("  %6.2f  %s\n", $groups{$type}{$what}, $pwhat);
+	}
+	print("\n");
+    }

    print("Verilog code profile:\n");
    print("   These are split into three categories:\n");
@@ -189,11 +206,11 @@ Displays this message and program version and exits.

 =head1 DISTRIBUTION

-The latest version is available from L<http://www.veripool.com/>.
+The latest version is available from L<http://www.veripool.org/>.

-Copyright 2007-2008 by Wilson Snyder.  This package is free software; you
-can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Copyright 2007-2010 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

 =head1 AUTHORS

@@ -1,24 +1,36 @@
-dnl $Id$
 dnl DESCRIPTION: Process this file with autoconf to produce a configure script.
-dnl Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
-dnl redistribute it and/or modify it under the terms of either the GNU
-dnl General Public License or the Perl Artistic License.
+dnl
+dnl Copyright 2003-2010 by Wilson Snyder. Verilator is free software; you can
+dnl redistribute it and/or modify it under the terms of either the GNU Lesser
+dnl General Public License Version 3 or the Perl Artistic License Version 2.0.

-AC_REVISION($Revision$)dnl
 AC_INIT(src/Verilator.cpp)
 AC_CONFIG_HEADER(src/config_build.h)

 dnl Special Substitutions
 AC_ARG_ENABLE(defenv,
-   [AS_HELP_STRING([--enable-defenv], [hardcode default environment variables])],
-   CFG_WITH_DEFENV=1,)
+   [AS_HELP_STRING([--disable-defenv], [disable hardcoded default environment variables])],
+   CFG_WITH_DEFENV=$enableval,
+   CFG_WITH_DEFENV=yes)
 AC_SUBST(CFG_WITH_DEFENV)

+dnl Compiler flags
+CFLAGS=-I${includedir}
+CPPFLAGS=-I${includedir}
+CXXFLAGS=-I${includedir}
+LDFLAGS=-L${libdir}
+
 dnl Checks for programs.
-CXX=g++
 AC_PROG_CC
 AC_PROG_CXX
 AC_PROG_INSTALL
+
+AC_LANG_PUSH(C++)
+AC_MSG_CHECKING([that C++ compiler can compile simple program])
+AC_TRY_RUN([int main() { return 0; }],
+           AC_MSG_RESULT(yes),
+           AC_MSG_RESULT(no);AC_MSG_ERROR([a working C++ compiler is required]))
+
 AC_PATH_PROG(PERL,perl)
 if test "x$PERL" = "x" ; then
   AC_MSG_ERROR([Cannot find "perl" in your PATH, please install it])
@@ -60,5 +72,5 @@ AC_SUBST(pkgdatadir)
 AC_OUTPUT(Makefile src/Makefile src/Makefile_obj include/verilated.mk)

 AC_MSG_RESULT([])
-AC_MSG_RESULT([Now type 'make'])
+AC_MSG_RESULT([Now type 'gmake'])
 AC_MSG_RESULT([])
@@ -1,15 +1,16 @@
-// $Id$ -*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 // GNU General Public License for more details.
-// 
+//
 //*************************************************************************
 ///
 /// \file
@@ -19,7 +20,7 @@
 ///	all C++ files it generates.  It contains standard macros and
 ///	classes required by the Verilated code.
 ///
-/// Code available from: http://www.veripool.com/verilator
+/// Code available from: http://www.veripool.org/verilator
 ///
 //*************************************************************************

@@ -29,28 +30,68 @@

 #include "verilatedos.h"

-#include <assert.h>
-#include <stdarg.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <iostream>
+#include <cassert>
+#include <cstdarg>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+// <iostream> avoided to reduce compile time
+// <string> avoided and instead in verilated_heavy.h to reduce compile time
 using namespace std;

+//=============================================================================
+// Switches
+
+#if VM_TRACE		// Verilator tracing requested
+# define WAVES 1	// Set backward compatibility flag as in systemperl.h
+#endif
+
 //=========================================================================
 // Basic types

-typedef vluint8_t    CData;	///< Verilated data, 1-8 bits
-typedef vluint16_t   SData;	///< Verilated data, 9-16 bits
-typedef vluint32_t   IData;	///< Verilated data, 17-32 bits
-typedef vluint64_t   QData;	///< Verilated data, 33-64 bits
-typedef vluint32_t   WData;	///< Verilated data, >64 bits, as an array
+//		     P		// Packed data of bit type (C/S/I/Q/W)
+typedef vluint8_t    CData;	///< Verilated pack data, 1-8 bits
+typedef vluint16_t   SData;	///< Verilated pack data, 9-16 bits
+typedef vluint32_t   IData;	///< Verilated pack data, 17-32 bits
+typedef vluint64_t   QData;	///< Verilated pack data, 33-64 bits
+typedef vluint32_t   WData;	///< Verilated pack data, >64 bits, as an array
+//	float	     F		// No typedef needed; Verilator uses float
+//	double	     D		// No typedef needed; Verilator uses double
+//	string	     N		// No typedef needed; Verilator uses string

 typedef const WData* WDataInP;	///< Array input to a function
 typedef       WData* WDataOutP;	///< Array output from a function

+typedef void (*VerilatedVoidCb)(void);
+
 class SpTraceVcd;
 class SpTraceVcdCFile;
+class VerilatedVar;
+class VerilatedVarNameMap;
+class VerilatedVcd;
+class VerilatedVcdC;
+
+enum VerilatedVarType {
+    VLVT_UNKNOWN=0,
+    VLVT_PTR,		// Pointer to something
+    VLVT_UINT8,		// AKA CData
+    VLVT_UINT16,	// AKA SData
+    VLVT_UINT32,	// AKA IData
+    VLVT_UINT64,	// AKA QData
+    VLVT_WDATA,		// AKA WData
+    VLVT_STRING		// C++ string
+};
+
+enum VerilatedVarFlags {
+    VLVD_IN=1,		// == vpiInput
+    VLVD_OUT=2,		// == vpiOutput
+    VLVD_INOUT=3,	// == vpiInOut
+    VLVD_NODIR=5,	// == vpiNoDirection
+    VLVF_MASK_DIR=7,	// Bit mask for above directions
+    // Flags
+    VLVF_PUB_RD=(1<<8),	// Public readable
+    VLVF_PUB_RW=(1<<9)	// Public writable
+};

 //=========================================================================
 /// Base class for all Verilated module classes
@@ -121,20 +162,79 @@ public:
 #ifndef VL_PRINTF
 # define VL_PRINTF printf	///< Print ala printf; may redefine if desired
 #endif
+#ifndef VL_VPRINTF
+# define VL_VPRINTF vprintf	///< Print ala vprintf; may redefine if desired
+#endif
+
+//===========================================================================
+/// Verilator symbol table base class
+
+class VerilatedSyms {
+    // VerilatedSyms base class exists just so symbol tables have a common pointer type
+};
+
+//===========================================================================
+/// Verilator global static information class
+
+class VerilatedScope {
+    // Fastpath:
+    VerilatedSyms*	m_symsp;	///< Symbol table
+    void**		m_callbacksp;	///< Callback table pointer (Fastpath)
+    int			m_funcnumMax;	///< Maxium function number stored (Fastpath)
+    // 4 bytes padding (on -m64), for rent.
+    VerilatedVarNameMap* m_varsp;	///< Variable map
+    const char* 	m_namep;	///< Scope name (Slowpath)
+
+public:  // But internals only - called from VerilatedModule's
+    VerilatedScope();
+    ~VerilatedScope();
+    void configure(VerilatedSyms* symsp, const char* prefixp, const char* suffixp);
+    void exportInsert(int finalize, const char* namep, void* cb);
+    void varInsert(int finalize, const char* namep, void* datap,
+		   VerilatedVarType vltype, int vlflags, int dims, ...);
+    // ACCESSORS
+    const char* name() const { return m_namep; }
+    inline VerilatedSyms* symsp() const { return m_symsp; }
+    VerilatedVar* varFind(const char* namep) const;
+    VerilatedVarNameMap* varsp() const { return m_varsp; }
+    void* exportFindError(int funcnum) const;
+    void* exportFindNullError(int funcnum) const;
+    void scopeDump() const;
+    inline void* exportFind(int funcnum) const {
+	if (VL_UNLIKELY(!this)) return exportFindNullError(funcnum);
+	if (VL_LIKELY(funcnum < m_funcnumMax)) {
+	    // m_callbacksp must be declared, as Max'es are > 0
+	    return m_callbacksp[funcnum];
+	} else {
+	    return exportFindError(funcnum);
+	}
+    }
+};

 //===========================================================================
 /// Verilator global static information class

 struct Verilated {
-    // Extern Vars
-    // Below two are used as bool, but having as uint32_t avoids conversion time
+    // MEMBERS
 private:
-    static int  	s_randReset;		///< Random reset: 0=all 0s, 1=all 1s, 2=random
+    // Slow path variables
+    static int		s_randReset;		///< Random reset: 0=all 0s, 1=all 1s, 2=random
+    static VerilatedVoidCb  s_flushCb;		///< Flush callback function
+
+    // Fast path
    static int		s_debug;		///< See accessors... only when VL_DEBUG set
    static bool		s_calcUnusedSigs;	///< Waves file on, need all signals calculated
    static bool		s_gotFinish;		///< A $finish statement executed
    static bool		s_assertOn;		///< Assertions are enabled
+
+    static VL_THREAD const VerilatedScope* t_dpiScopep;	///< DPI context scope
+    static VL_THREAD const char*	t_dpiFilename;	///< DPI context filename
+    static VL_THREAD int		t_dpiLineno;	///< DPI context line number
+
 public:
+
+    // METHODS - User called
+
    /// Select initial value of otherwise uninitialized signals.
    ////
    /// 0 = Set to zeros
@@ -150,9 +250,7 @@ public:
 #else
    static inline int  debug() { return 0; }		///< Constant 0 debug, so C++'s optimizer rips up
 #endif
-    /// Internal: Create a new module name by concatenating two strings
-    static const char* catName(const char* n1, const char* n2); // Returns new'ed data
-    /// Enable calculation of unused signals 
+    /// Enable calculation of unused signals
    static void calcUnusedSigs(bool flag) { s_calcUnusedSigs=flag; }
    static bool calcUnusedSigs() { return s_calcUnusedSigs; }	///< Return calcUnusedSigs value
    /// Did the simulation $finish?
@@ -165,7 +263,35 @@ public:
    /// Enable/disable assertions
    static void assertOn(bool flag) { s_assertOn=flag; }
    static bool assertOn() { return s_assertOn; }
-};    
+    /// Flush callback for VCD waves
+    static void flushCb(VerilatedVoidCb cb);
+    static void flushCall() { if (s_flushCb) (*s_flushCb)(); }
+
+    /// Record command line arguments, for retrieval by $test$plusargs/$value$plusargs
+    static void commandArgs(int argc, const char** argv);
+    static void commandArgs(int argc, char** argv) { commandArgs(argc,(const char**)argv); }
+
+    /// For debugging, print text list of all scope names with
+    /// dpiImport/Export context.  This function may change in future
+    /// releases - contact the authors before production use.
+    static void scopesDump();
+
+    // METHODS - INTERNAL USE ONLY
+    // Internal: Create a new module name by concatenating two strings
+    static const char* catName(const char* n1, const char* n2); // Returns new'ed data
+    // Internal: Find scope
+    static const VerilatedScope* scopeFind(const char* namep);
+    // Internal: Get and set DPI context
+    static const VerilatedScope* dpiScope() { return t_dpiScopep; }
+    static void dpiScope(const VerilatedScope* scopep) { t_dpiScopep=scopep; }
+    static void dpiContext(const VerilatedScope* scopep, const char* filenamep, int lineno) {
+	t_dpiScopep=scopep; t_dpiFilename=filenamep; t_dpiLineno=lineno; }
+    static void dpiClearContext() { t_dpiScopep = NULL; }
+    static bool dpiInContext() { return t_dpiScopep != NULL; }
+    static const char* dpiFilenamep() { return t_dpiFilename; }
+    static int dpiLineno() { return t_dpiLineno; }
+    static int exportFuncNum(const char* namep);
+};

 //=========================================================================
 // Extern functions -- User may override -- See verilated.cpp
@@ -179,21 +305,24 @@ extern void vl_fatal  (const char* filename, int linenum, const char* hier,
 		       const char* msg);

 //=========================================================================
-// Extern functions -- Init time only, so slow is fine
+// Extern functions -- Slow path

+extern IData  VL_RANDOM_I(int obits);	///< Randomize a signal
+extern QData  VL_RANDOM_Q(int obits);	///< Randomize a signal
+extern WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp);	///< Randomize a signal
+
+/// Init time only, so slow is fine
 extern IData  VL_RAND_RESET_I(int obits);	///< Random reset a signal
 extern QData  VL_RAND_RESET_Q(int obits);	///< Random reset a signal
 extern WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp);	///< Random reset a signal
 extern WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp);	///< Zero reset a signal

-/// Return string with formated Verilog value
-extern const char* VL_VALUE_FORMATTED_W(int obits, char fmt, bool drop0, WDataInP lwp);
-extern const char* VL_VALUE_FORMATTED_Q(int obits, char fmt, bool drop0, QData ld);
-inline const char* VL_VALUE_FORMATTED_I(int obits, char fmt, bool drop0, IData ld) {
-    return VL_VALUE_FORMATTED_Q(obits,fmt,drop0,ld);
-}
+/// Math
+extern WDataOutP _vl_moddiv_w(int lbits, WDataOutP owp, WDataInP lwp, WDataInP rwp, bool is_modulus);

 /// File I/O
+extern IData VL_FGETS_IXQ(int obits, void* destp, QData fpq);
+
 extern QData VL_FOPEN_WI(int fnwords, WDataInP ofilename, IData mode);
 extern QData VL_FOPEN_QI(QData ofilename, IData mode);
 inline QData VL_FOPEN_II(IData ofilename, IData mode) { return VL_FOPEN_QI(ofilename,mode); }
@@ -206,6 +335,20 @@ inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwo
 			 IData ofilename,    void* memp, IData start, IData end) {
    VL_READMEM_Q(hex, width,depth,array_lsb,fnwords, ofilename,memp,start,end); }

+extern void VL_WRITEF(const char* formatp, ...);
+extern void VL_FWRITEF(QData fpq, const char* formatp, ...);
+
+extern IData VL_FSCANF_IX(QData fpq, const char* formatp, ...);
+extern IData VL_SSCANF_IIX(int lbits, IData ld, const char* formatp, ...);
+extern IData VL_SSCANF_IQX(int lbits, QData ld, const char* formatp, ...);
+extern IData VL_SSCANF_IWX(int lbits, WDataInP lwp, const char* formatp, ...);
+
+extern void VL_SFORMAT_X(int obits, void* destp, const char* formatp, ...);
+
+extern IData VL_TESTPLUSARGS_I(const char* formatp);
+extern IData VL_VALUEPLUSARGS_IW(int rbits, const char* prefixp, char fmt, WDataOutP rwp);
+extern const char* vl_mc_scan_plusargs(const char* prefixp);  // PLIish
+
 //=========================================================================
 // Base macros

@@ -213,15 +356,23 @@ inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwo
 #define VL_BITISSET_I(data,bit) (data & (VL_UL(1)<<VL_BITBIT_I(bit)))
 #define VL_BITISSET_Q(data,bit) (data & (VL_ULL(1)<<VL_BITBIT_Q(bit)))
 #define VL_BITISSET_W(data,bit) (data[VL_BITWORD_I(bit)] & (VL_UL(1)<<VL_BITBIT_I(bit)))
+#define VL_BITISSETLIMIT_W(data,width,bit) (((bit)<(width)) && data[VL_BITWORD_I(bit)] & (VL_UL(1)<<VL_BITBIT_I(bit)))

 /// Create two 32-bit words from quadword
-#define VL_SET_WQ(decl,data)	{ decl[0]=(data); decl[1]=((data)>>VL_WORDSIZE); }
+#define VL_SET_WQ(owp,data)	{ owp[0]=(IData)(data); owp[1]=(IData)((data)>>VL_WORDSIZE); }
+#define VL_SET_WI(owp,data)	{ owp[0]=(IData)(data); owp[1]=0; }
+#define VL_SET_QW(lwp)		( ((QData)(lwp[0])) | ((QData)(lwp[1])<<((QData)(VL_WORDSIZE)) ))
+#define _VL_SET_QII(ld,rd)      ( ((QData)(ld)<<VL_ULL(32)) | (QData)(rd) )

 // Use a union to avoid cast-to-different-size warnings
 /// Return FILE* from QData
 static inline FILE*  VL_CVT_Q_FP(QData lhs) { union { FILE* fp; QData q; } u; u.q=lhs; return u.fp; }
+/// Return void* from QData
+static inline void*  VL_CVT_Q_VP(QData lhs) { union { void* fp; QData q; } u; u.q=lhs; return u.fp; }
 /// Return QData from FILE*
 static inline QData  VL_CVT_FP_Q(FILE* fp) { union { FILE* fp; QData q; } u; u.q=0; u.fp=fp; return u.q; }
+/// Return QData from void*
+static inline QData  VL_CVT_VP_Q(void* fp) { union { void* fp; QData q; } u; u.q=0; u.fp=fp; return u.q; }

 // Sign extend such that if MSB set, we get ffff_ffff, else 0s
 // (Requires clean input)
@@ -235,22 +386,22 @@ static inline IData  VL_EXTENDSIGN_I(int lbits, IData lhs) { return (-((lhs)&(VL
 static inline QData  VL_EXTENDSIGN_Q(int lbits, QData lhs) { return (-((lhs)&(VL_ULL(1)<<(lbits-1)))); }

 // Debugging prints
-static inline void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp) {
-    printf("  Data: w%d: ", lbits); 
-    for (int i=VL_WORDS_I(lbits)-1; i>=0; i--) { printf("%08x ",iwp[i]); }
-    printf("\n");
-}
+void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp);

 //=========================================================================
 // Pli macros

+#ifndef VL_TIME_MULTIPLIER
+# define VL_TIME_MULTIPLIER 1
+#endif
+
 /// Return current simulation time
 #if defined(SYSTEMC_VERSION) && (SYSTEMC_VERSION>20011000)
-# define VL_TIME_I(ign) ((IData)sc_time_stamp().to_default_time_units())
-# define VL_TIME_Q(ign) ((QData)sc_time_stamp().to_default_time_units())
+# define VL_TIME_I() ((IData)(sc_time_stamp().to_default_time_units()*VL_TIME_MULTIPLIER))
+# define VL_TIME_Q() ((QData)(sc_time_stamp().to_default_time_units()*VL_TIME_MULTIPLIER))
 #else
-# define VL_TIME_I(ign) ((IData)sc_time_stamp())
-# define VL_TIME_Q(ign) ((QData)sc_time_stamp())
+# define VL_TIME_I() ((IData)(sc_time_stamp()*VL_TIME_MULTIPLIER))
+# define VL_TIME_Q() ((QData)(sc_time_stamp()*VL_TIME_MULTIPLIER))
 extern double sc_time_stamp();
 #endif

@@ -286,6 +437,11 @@ extern double sc_time_stamp();

 // EMIT_RULE: VL_ASSIGNCLEAN:  oclean=clean; obits==lbits;
 #define VL_ASSIGNCLEAN_W(obits,owp,lwp) VL_CLEAN_WW(obits,obits,owp,lwp)
+static inline WDataOutP _VL_CLEAN_INPLACE_W(int obits, WDataOutP owp) {
+    int words = VL_WORDS_I(obits);
+    owp[words-1] &= VL_MASK_I(obits);
+    return(owp);
+}
 static inline WDataOutP VL_CLEAN_WW(int obits, int, WDataOutP owp, WDataInP lwp){
    int words = VL_WORDS_I(obits);
    for (int i=0; (i < (words-1)); i++) owp[i] = lwp[i];
@@ -321,8 +477,8 @@ static inline void VL_ASSIGNBIT_QI(int, int bit, QData& lhsr, QData rhs) {
 }
 static inline void VL_ASSIGNBIT_WI(int, int bit, WDataOutP owp, IData rhs) {
    IData orig = owp[VL_BITWORD_I(bit)];
-    owp[VL_BITWORD_I(bit)] = (orig & ~(VL_UL(1)<<VL_BITBIT_I(bit))
-			    | (rhs<<VL_BITBIT_I(bit)));
+    owp[VL_BITWORD_I(bit)] = ((orig & ~(VL_UL(1)<<VL_BITBIT_I(bit)))
+			      | (rhs<<VL_BITBIT_I(bit)));
 }
 // Alternative form that is an instruction faster when rhs is constant one.
 static inline void VL_ASSIGNBIT_IO(int, int bit, CData& lhsr, IData) {
@@ -344,35 +500,45 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) {

 //===================================================================
 // SYSTEMC OPERATORS
-// Copying verilog format to/from systemc integers and bit vectors.
-
-#define VL_ASSIGN_IS(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
-#define VL_ASSIGN_SI(obits,svar,vvar) { (svar).write(vvar); }
+// Copying verilog format to systemc integers and bit vectors.

+#define VL_ASSIGN_ISI(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
 #define VL_ASSIGN_QSQ(obits,vvar,svar) { (vvar) = VL_CLEAN_QQ((obits),(obits),(svar).read()); }
+
+#define VL_ASSIGN_ISW(obits,od,svar) { \
+    od = (svar.read().get_word(0)) & VL_MASK_I(obits); \
+}
+#define VL_ASSIGN_QSW(obits,od,svar) { \
+    od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
+	& VL_MASK_Q(obits); \
+}
+#define VL_ASSIGN_WSW(obits,owp,svar) { \
+    int words = VL_WORDS_I(obits); \
+    for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
+    owp[words-1] &= VL_MASK_I(obits); \
+}
+
+// Copying verilog format from systemc integers and bit vectors.
+
+#define VL_ASSIGN_SII(obits,svar,vvar) { (svar).write(vvar); }
 #define VL_ASSIGN_SQQ(obits,svar,vvar) { (svar).write(vvar); }

-#define VL_ASSIGN_SQ(obits,svar,rd) { \
+#define VL_ASSIGN_SWI(obits,svar,rd) { \
+    sc_bv<obits> _bvtemp; \
+    _bvtemp.set_word(0,rd); \
+    svar.write(_bvtemp); \
+}
+#define VL_ASSIGN_SWQ(obits,svar,rd) { \
    sc_bv<obits> _bvtemp; \
    _bvtemp.set_word(0,rd); \
    _bvtemp.set_word(1,rd>>VL_WORDSIZE); \
    svar.write(_bvtemp); \
 }
-#define VL_ASSIGN_QS(obits,od,svar) { \
-    od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
-	& VL_MASK_Q(obits); \
-}
-
-#define VL_ASSIGN_SW(obits,svar,rwp) { \
+#define VL_ASSIGN_SWW(obits,svar,rwp) { \
    sc_bv<obits> _bvtemp; \
    for (int i=0; i < VL_WORDS_I(obits); i++) _bvtemp.set_word(i,rwp[i]); \
    svar.write(_bvtemp); \
 }
-#define VL_ASSIGN_WS(obits,owp,svar) { \
-    int words = VL_WORDS_I(obits); \
-    for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
-    owp[words-1] &= VL_MASK_I(obits); \
-}

 //===================================================================
 // Extending sizes
@@ -416,7 +582,7 @@ static inline QData VL_EXTENDS_QQ(int, int lbits, QData lhs) {

 static inline WDataOutP VL_EXTENDS_WI(int obits, int lbits, WDataOutP owp, IData ld) {
    IData sign = VL_SIGNONES_I(lbits,ld);
-    owp[0] = ld | sign & ~VL_MASK_I(lbits);
+    owp[0] = ld | (sign & ~VL_MASK_I(lbits));
    for (int i=1; i < VL_WORDS_I(obits); i++) owp[i] = sign;
    return(owp);
 }
@@ -431,7 +597,7 @@ static inline WDataOutP VL_EXTENDS_WW(int obits, int lbits, WDataOutP owp, WData
    for (int i=0; i < VL_WORDS_I(lbits)-1; i++) owp[i] = lwp[i];
    int lmsw=VL_WORDS_I(lbits)-1;
    IData sign = VL_SIGNONES_I(lbits,lwp[lmsw]);
-    owp[lmsw] = lwp[lmsw] | sign & ~VL_MASK_I(lbits);
+    owp[lmsw] = lwp[lmsw] | (sign & ~VL_MASK_I(lbits));
    for (int i=VL_WORDS_I(lbits); i < VL_WORDS_I(obits); i++) owp[i] = sign;
    return(owp);
 }
@@ -460,43 +626,60 @@ static inline IData VL_REDOR_W(int words, WDataInP lwp) {
 }

 // EMIT_RULE: VL_REDXOR:  oclean=dirty; obits=1;
-static inline IData VL_REDXOR_W(int words, WDataInP lwp) {
-    IData r = lwp[0];
-    for (int i=1; i < words; i++) r ^= lwp[i];
-    r=(r^(r>>1));
-    r=(r^(r>>2));
-    r=(r^(r>>4));
-    r=(r^(r>>8));
-    r=(r^(r>>16));
-    return r;
-}
 static inline IData VL_REDXOR_2(IData r) {
+    // Experiments show VL_REDXOR_2 is faster than __builtin_parityl
    r=(r^(r>>1));
    return r;
 }
 static inline IData VL_REDXOR_4(IData r) {
+#if defined(__GNUC__) && (__GNUC__ >= 4) && !defined(VL_NO_BUILTINS)
+    return __builtin_parityl(r);
+#else
    r=(r^(r>>1)); r=(r^(r>>2));
    return r;
+#endif
 }
 static inline IData VL_REDXOR_8(IData r) {
+#if defined(__GNUC__) && (__GNUC__ >= 4) && !defined(VL_NO_BUILTINS)
+    return __builtin_parityl(r);
+#else
    r=(r^(r>>1)); r=(r^(r>>2)); r=(r^(r>>4));
    return r;
+#endif
 }
 static inline IData VL_REDXOR_16(IData r) {
+#if defined(__GNUC__) && (__GNUC__ >= 4) && !defined(VL_NO_BUILTINS)
+    return __builtin_parityl(r);
+#else
    r=(r^(r>>1)); r=(r^(r>>2)); r=(r^(r>>4)); r=(r^(r>>8));
    return r;
+#endif
 }
 static inline IData VL_REDXOR_32(IData r) {
+#if defined(__GNUC__) && (__GNUC__ >= 4) && !defined(VL_NO_BUILTINS)
+    return __builtin_parityl(r);
+#else
    r=(r^(r>>1)); r=(r^(r>>2)); r=(r^(r>>4)); r=(r^(r>>8)); r=(r^(r>>16));
    return r;
+#endif
 }
 static inline IData VL_REDXOR_64(QData r) {
+#if defined(__GNUC__) && (__GNUC__ >= 4) && !defined(VL_NO_BUILTINS)
+    return __builtin_parityll(r);
+#else
    r=(r^(r>>1)); r=(r^(r>>2)); r=(r^(r>>4)); r=(r^(r>>8)); r=(r^(r>>16)); r=(r^(r>>32));
-    return r;
+    return (IData)r;
+#endif
+}
+static inline IData VL_REDXOR_W(int words, WDataInP lwp) {
+    IData r = lwp[0];
+    for (int i=1; i < words; i++) r ^= lwp[i];
+    return VL_REDXOR_32(r);
 }

 // EMIT_RULE: VL_COUNTONES_II:  oclean = false; lhs clean
 static inline IData VL_COUNTONES_I(IData lhs) {
+    // This is faster than __builtin_popcountl
    IData r = lhs - ((lhs >> 1) & 033333333333) - ((lhs >> 2) & 011111111111);
    r = (r + (r>>3)) & 030707070707;
    r = (r + (r>>6));
@@ -504,7 +687,7 @@ static inline IData VL_COUNTONES_I(IData lhs) {
    return r;
 }
 static inline IData VL_COUNTONES_Q(QData lhs) {
-    return VL_COUNTONES_I(lhs) + VL_COUNTONES_I(lhs>>32);
+    return VL_COUNTONES_I((IData)lhs) + VL_COUNTONES_I((IData)(lhs>>32));
 }
 static inline IData VL_COUNTONES_W(int words, WDataInP lwp) {
    IData r = 0;
@@ -548,6 +731,51 @@ static inline IData VL_ONEHOT0_W(int words, WDataInP lwp) {
    return 1;
 }

+static inline IData VL_CLOG2_I(IData lhs) {
+    // There are faster algorithms, or fls GCC4 builtins, but rarely used
+    if (VL_UNLIKELY(!lhs)) return 0;
+    lhs--;
+    int shifts=0;
+    for (; lhs!=0; shifts++) lhs = lhs >> 1;
+    return shifts;
+}
+static inline IData VL_CLOG2_Q(QData lhs) {
+    if (VL_UNLIKELY(!lhs)) return 0;
+    lhs--;
+    int shifts=0;
+    for (; lhs!=0; shifts++) lhs = lhs >> VL_ULL(1);
+    return shifts;
+}
+static inline IData VL_CLOG2_W(int words, WDataInP lwp) {
+    IData adjust = (VL_COUNTONES_W(words,lwp)==1) ? 0 : 1;
+    for (int i=words-1; i>=0; i--) {
+	if (VL_UNLIKELY(lwp[i])) {  // Shorter worst case if predict not taken
+	    for (int bit=31; bit>=0; bit--) {
+		if (VL_UNLIKELY(VL_BITISSET_I(lwp[i],bit))) {
+		    return i*VL_WORDSIZE + bit + adjust;
+		}
+	    }
+	    // Can't get here - one bit must be set
+	}
+    }
+    return 0;
+}
+
+static inline IData VL_MOSTSETBITP1_W(int words, WDataInP lwp) {
+    // MSB set bit plus one; similar to FLS.  0=value is zero
+    for (int i=words-1; i>=0; i--) {
+	if (VL_UNLIKELY(lwp[i])) {  // Shorter worst case if predict not taken
+	    for (int bit=31; bit>=0; bit--) {
+		if (VL_UNLIKELY(VL_BITISSET_I(lwp[i],bit))) {
+		    return i*VL_WORDSIZE + bit + 1;
+		}
+	    }
+	    // Can't get here - one bit must be set
+	}
+    }
+    return 0;
+}
+
 //===================================================================
 // SIMPLE LOGICAL OPERATORS

@@ -686,10 +914,12 @@ static inline int _VL_CMPS_W(int lbits, WDataInP lwp, WDataInP rwp) {
 // EMIT_RULE: VL_MUL:    oclean=dirty; lclean==clean; rclean==clean;
 // EMIT_RULE: VL_DIV:    oclean=dirty; lclean==clean; rclean==clean;
 // EMIT_RULE: VL_MODDIV: oclean=dirty; lclean==clean; rclean==clean;
-#define VL_DIV_I(lhs,rhs)	(((rhs)==0)?0:(lhs)/(rhs))
-#define VL_DIV_Q(lhs,rhs)	(((rhs)==0)?0:(lhs)/(rhs))
-#define VL_MODDIV_I(lhs,rhs)	(((rhs)==0)?0:(lhs)%(rhs))
-#define VL_MODDIV_Q(lhs,rhs)	(((rhs)==0)?0:(lhs)%(rhs))
+#define VL_DIV_III(lbits,lhs,rhs)	(((rhs)==0)?0:(lhs)/(rhs))
+#define VL_DIV_QQQ(lbits,lhs,rhs)	(((rhs)==0)?0:(lhs)/(rhs))
+#define VL_DIV_WWW(lbits,owp,lwp,rwp)   (_vl_moddiv_w(lbits,owp,lwp,rwp,0))
+#define VL_MODDIV_III(lbits,lhs,rhs)	(((rhs)==0)?0:(lhs)%(rhs))
+#define VL_MODDIV_QQQ(lbits,lhs,rhs)	(((rhs)==0)?0:(lhs)%(rhs))
+#define VL_MODDIV_WWW(lbits,owp,lwp,rwp) (_vl_moddiv_w(lbits,owp,lwp,rwp,1))

 static inline WDataOutP VL_ADD_W(int words, WDataOutP owp,WDataInP lwp,WDataInP rwp){
    QData carry = 0;
@@ -704,7 +934,7 @@ static inline WDataOutP VL_ADD_W(int words, WDataOutP owp,WDataInP lwp,WDataInP
 static inline WDataOutP VL_SUB_W(int words, WDataOutP owp,WDataInP lwp,WDataInP rwp){
    QData carry = 0;
    for (int i=0; i<words; i++) {
-	carry = carry + (QData)(lwp[i]) + (QData)(~rwp[i]);
+	carry = carry + (QData)(lwp[i]) + (QData)(IData)(~rwp[i]);
 	if (i==0) carry++;  // Negation of temp2
 	owp[i] = (carry & VL_ULL(0xffffffff));
 	carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff);
@@ -724,7 +954,7 @@ static inline QData  VL_UNARYMIN_Q(QData data) { return -data; }
 static inline WDataOutP VL_UNARYMIN_W(int words, WDataOutP owp,WDataInP lwp){
    QData carry = 0;
    for (int i=0; i<words; i++) {
-	carry = carry + (QData)(~lwp[i]);
+	carry = carry + (QData)(IData)(~lwp[i]);
 	if (i==0) carry++;  // Negation of temp2
 	owp[i] = (carry & VL_ULL(0xffffffff));
 	carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff);
@@ -782,7 +1012,7 @@ static inline WDataOutP VL_MULS_WWW(int,int lbits,int, WDataOutP owp,WDataInP lw
    if ((lneg ^ rneg) & 1) {      // Negate output  (not using UNARYMIN, as owp==lwp)
 	QData carry = 0;
 	for (int i=0; i<words; i++) {
-	    carry = carry + (QData)(~owp[i]);
+	    carry = carry + (QData)(IData)(~owp[i]);
 	    if (i==0) carry++;  // Negation of temp2
 	    owp[i] = (carry & VL_ULL(0xffffffff));
 	    carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff);
@@ -793,33 +1023,72 @@ static inline WDataOutP VL_MULS_WWW(int,int lbits,int, WDataOutP owp,WDataInP lw
    return(owp);
 }

-static inline IData VL_DIVS_III(int,int lbits,int, IData lhs,IData rhs) {
-    if (rhs==0) return 0;
+static inline IData VL_DIVS_III(int lbits, IData lhs,IData rhs) {
+    if (VL_UNLIKELY(rhs==0)) return 0;
    vlsint32_t lhs_signed = VL_EXTENDS_II(32, lbits, lhs);
    vlsint32_t rhs_signed = VL_EXTENDS_II(32, lbits, rhs);
    return lhs_signed / rhs_signed;
 }
-static inline QData VL_DIVS_QQQ(int,int lbits,int, QData lhs,QData rhs) {
-    if (rhs==0) return 0;
+static inline QData VL_DIVS_QQQ(int lbits, QData lhs,QData rhs) {
+    if (VL_UNLIKELY(rhs==0)) return 0;
    vlsint64_t lhs_signed = VL_EXTENDS_QQ(64, lbits, lhs);
    vlsint64_t rhs_signed = VL_EXTENDS_QQ(64, lbits, rhs);
    return lhs_signed / rhs_signed;
 }
-static inline IData VL_MODDIVS_III(int,int lbits,int, IData lhs,IData rhs) {
-    if (rhs==0) return 0;
+static inline IData VL_MODDIVS_III(int lbits, IData lhs,IData rhs) {
+    if (VL_UNLIKELY(rhs==0)) return 0;
    vlsint32_t lhs_signed = VL_EXTENDS_II(32, lbits, lhs);
    vlsint32_t rhs_signed = VL_EXTENDS_II(32, lbits, rhs);
    return lhs_signed % rhs_signed;
 }
-static inline QData VL_MODDIVS_QQQ(int,int lbits,int, QData lhs,QData rhs) {
-    if (rhs==0) return 0;
+static inline QData VL_MODDIVS_QQQ(int lbits, QData lhs,QData rhs) {
+    if (VL_UNLIKELY(rhs==0)) return 0;
    vlsint64_t lhs_signed = VL_EXTENDS_QQ(64, lbits, lhs);
    vlsint64_t rhs_signed = VL_EXTENDS_QQ(64, lbits, rhs);
    return lhs_signed % rhs_signed;
 }

+static inline WDataOutP VL_DIVS_WWW(int lbits, WDataOutP owp,WDataInP lwp,WDataInP rwp) {
+    int words = VL_WORDS_I(lbits);
+    IData lsign = VL_SIGN_I(lbits,lwp[words-1]);
+    IData rsign = VL_SIGN_I(lbits,rwp[words-1]);
+    IData lwstore[VL_MULS_MAX_WORDS]; // Fixed size, as MSVC++ doesn't allow [words] here
+    IData rwstore[VL_MULS_MAX_WORDS];
+    WDataInP ltup = lwp;
+    WDataInP rtup = rwp;
+    if (lsign) { ltup = _VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), lwstore, lwp)); }
+    if (rsign) { rtup = _VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), rwstore, rwp)); }
+    if ((lsign && !rsign) || (!lsign && rsign)) {
+	IData qNoSign[VL_MULS_MAX_WORDS];
+	VL_DIV_WWW(lbits,qNoSign,ltup,rtup);
+	_VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), owp, qNoSign));
+	return owp;
+    } else {
+	return VL_DIV_WWW(lbits,owp,ltup,rtup);
+    }
+}
+static inline WDataOutP VL_MODDIVS_WWW(int lbits, WDataOutP owp,WDataInP lwp,WDataInP rwp) {
+    int words = VL_WORDS_I(lbits);
+    IData lsign = VL_SIGN_I(lbits,lwp[words-1]);
+    IData rsign = VL_SIGN_I(lbits,rwp[words-1]);
+    IData lwstore[VL_MULS_MAX_WORDS]; // Fixed size, as MSVC++ doesn't allow [words] here
+    IData rwstore[VL_MULS_MAX_WORDS];
+    WDataInP ltup = lwp;
+    WDataInP rtup = rwp;
+    if (lsign) { ltup = _VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), lwstore, lwp)); }
+    if (rsign) { rtup = _VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), rwstore, rwp)); }
+    if (lsign) {  // Only dividend sign matters for modulus
+	IData qNoSign[VL_MULS_MAX_WORDS];
+	VL_MODDIV_WWW(lbits,qNoSign,ltup,rtup);
+	_VL_CLEAN_INPLACE_W(lbits, VL_UNARYMIN_W(VL_WORDS_I(lbits), owp, qNoSign));
+	return owp;
+    } else {
+	return VL_MODDIV_WWW(lbits,owp,ltup,rtup);
+    }
+}
+
 static inline IData VL_POW_III(int, int, int rbits, IData lhs, IData rhs) {
-    if (lhs==0) return 0;
+    if (VL_UNLIKELY(lhs==0)) return 0;
    IData power = lhs;
    IData out = 1;
    for (int i=0; i<rbits; i++) {
@@ -829,10 +1098,10 @@ static inline IData VL_POW_III(int, int, int rbits, IData lhs, IData rhs) {
    return out;
 }

-#define VL_POW_QQI(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs) 
+#define VL_POW_QQI(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs)

 static inline QData VL_POW_QQQ(int, int, int rbits, QData lhs, QData rhs) {
-    if (lhs==0) return 0;
+    if (VL_UNLIKELY(lhs==0)) return 0;
    QData power = lhs;
    QData out = VL_ULL(1);
    for (int i=0; i<rbits; i++) {
@@ -847,23 +1116,23 @@ static inline QData VL_POW_QQQ(int, int, int rbits, QData lhs, QData rhs) {

 // INTERNAL: Stuff LHS bit 0++ into OUTPUT at specified offset
 // ld may be "dirty", output is clean
-static inline void _VL_INSERT_II(int, CData& lhsr, IData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_II(int, CData& lhsr, IData ld, int hbit, int lbit) {
    IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
    lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
 }
-static inline void _VL_INSERT_II(int, SData& lhsr, IData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_II(int, SData& lhsr, IData ld, int hbit, int lbit) {
    IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
    lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
 }
-static inline void _VL_INSERT_II(int, IData& lhsr, IData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_II(int, IData& lhsr, IData ld, int hbit, int lbit) {
    IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
    lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
 }
-static inline void _VL_INSERT_QQ(int, QData& lhsr, QData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_QQ(int, QData& lhsr, QData ld, int hbit, int lbit) {
    QData insmask = (VL_MASK_Q(hbit-lbit+1))<<lbit;
    lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
 }
-static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbit) {
    int hoffset = VL_BITBIT_I(hbit);
    int loffset = VL_BITBIT_I(lbit);
    if (hoffset==VL_SIZEBITS_I && loffset==0) {
@@ -888,7 +1157,7 @@ static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbi

 // INTERNAL: Stuff large LHS bit 0++ into OUTPUT at specified offset
 // lwp may be "dirty"
-static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int lbit) { 
+static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int lbit) {
    int hoffset = hbit & VL_SIZEBITS_I;
    int loffset = lbit & VL_SIZEBITS_I;
    int lword = VL_BITWORD_I(lbit);
@@ -917,16 +1186,16 @@ static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int
 	    {	// Lower word
 		int oword = lword+i;
 		IData d = lwp[i]<<loffset;
-		IData od = owp[oword] & ~linsmask | d & linsmask;
-		if (oword==hword) owp[oword] = owp[oword] & ~hinsmask | od & hinsmask;
+		IData od = (owp[oword] & ~linsmask) | (d & linsmask);
+		if (oword==hword) owp[oword] = (owp[oword] & ~hinsmask) | (od & hinsmask);
 		else owp[oword] = od;
 	    }
 	    {   // Upper word
 		int oword = lword+i+1;
 		if (oword <= hword) {
 		    IData d = lwp[i]>>nbitsonright;
-		    IData od = d & ~linsmask | owp[oword] & linsmask;
-		    if (oword==hword) owp[oword] = owp[oword] & ~hinsmask | od & hinsmask;
+		    IData od = (d & ~linsmask) | (owp[oword] & linsmask);
+		    if (oword==hword) owp[oword] = (owp[oword] & ~hinsmask) | (od & hinsmask);
 		    else owp[oword] = od;
 		}
 	    }
@@ -934,7 +1203,7 @@ static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int
    }
 }

-static inline void _VL_INSERT_WQ(int obits, WDataOutP owp, QData ld, int hbit, int lbit) { 
+static inline void _VL_INSERT_WQ(int obits, WDataOutP owp, QData ld, int hbit, int lbit) {
    WData lwp[2]; VL_SET_WQ(lwp,ld);
    _VL_INSERT_WW(obits,owp,lwp,hbit,lbit);
 }
@@ -1114,12 +1383,12 @@ static inline IData VL_SHIFTRS_III(int obits, int, int, IData lhs, IData rhs) {
    // Note the C standard does not specify the >> operator as a arithmetic shift!
    IData sign    = -(lhs >> (obits-1)); // ffff_ffff if negative
    IData signext = ~(VL_MASK_I(obits) >> rhs);   // One with bits where we've shifted "past"
-    return (lhs >> rhs) | sign & VL_CLEAN_II(obits,obits,signext);
+    return (lhs >> rhs) | (sign & VL_CLEAN_II(obits,obits,signext));
 }
 static inline QData VL_SHIFTRS_QQI(int obits, int, int, QData lhs, IData rhs) {
    QData sign    = -(lhs >> (obits-1));
    QData signext = ~(VL_MASK_Q(obits) >> rhs);
-    return (lhs >> rhs) | sign & VL_CLEAN_QQ(obits,obits,signext);
+    return (lhs >> rhs) | (sign & VL_CLEAN_QQ(obits,obits,signext));
 }
 static inline WDataOutP VL_SHIFTRS_WWI(int obits,int,int,WDataOutP owp,WDataInP lwp, IData rd) {
    int word_shift = VL_BITWORD_I(rd);
@@ -1162,7 +1431,7 @@ static inline WDataOutP VL_SHIFTRS_WWI(int obits,int,int,WDataOutP owp,WDataInP

 static inline IData VL_BITSEL_IWII(int, int lbits, int, int, WDataInP lwp, IData rd) {
    int word = VL_BITWORD_I(rd);
-    if ((int)rd>lbits) {
+    if (VL_UNLIKELY((int)rd>lbits)) {
 	return ~0; // Spec says you can go outside the range of a array.  Don't coredump if so.
 	// We return all 1's as that's more likely to find bugs (?) than 0's.
    } else {
@@ -1178,7 +1447,7 @@ static inline IData VL_BITSEL_IWII(int, int lbits, int, int, WDataInP lwp, IData

 static inline IData VL_SEL_IWII(int, int lbits, int, int, WDataInP lwp, IData lsb, IData width) {
    int msb = lsb+width-1;
-    if (msb>lbits) {
+    if (VL_UNLIKELY(msb>lbits)) {
 	return ~0; // Spec says you can go outside the range of a array.  Don't coredump if so.
    } else if (VL_BITWORD_I(msb)==VL_BITWORD_I((int)lsb)) {
 	return (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb));
@@ -1192,7 +1461,7 @@ static inline IData VL_SEL_IWII(int, int lbits, int, int, WDataInP lwp, IData ls

 static inline QData VL_SEL_QWII(int, int lbits, int, int, WDataInP lwp, IData lsb, IData width) {
    int msb = lsb+width-1;
-    if (msb>lbits) {
+    if (VL_UNLIKELY(msb>lbits)) {
 	return ~0; // Spec says you can go outside the range of a array.  Don't coredump if so.
    } else if (VL_BITWORD_I(msb)==VL_BITWORD_I((int)lsb)) {
 	return (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb));
@@ -1214,7 +1483,7 @@ static inline QData VL_SEL_QWII(int, int lbits, int, int, WDataInP lwp, IData ls
 static inline WDataOutP VL_SEL_WWII(int obits,int lbits,int,int,WDataOutP owp,WDataInP lwp, IData lsb, IData width) {
    int msb = lsb+width-1;
    int word_shift = VL_BITWORD_I(lsb);
-    if (msb>lbits) { // Outside bounds, 
+    if (VL_UNLIKELY(msb>lbits)) { // Outside bounds,
 	for (int i=0; i<VL_WORDS_I(obits)-1; i++) owp[i] = ~0;
 	owp[VL_WORDS_I(obits)-1] = VL_MASK_I(obits);
    } else if (VL_BITBIT_I(lsb)==0) {
@@ -1282,6 +1551,26 @@ static inline WDataOutP VL_COND_WIWW(int obits, int, int, int,
    return(owp);
 }

+//======================================================================
+// System Functions
+
+inline IData VL_VALUEPLUSARGS_IQ(int rbits, const char* prefixp, char fmt, QData& ldr) {
+    WData wd[2]; IData v=VL_VALUEPLUSARGS_IW(rbits,prefixp,fmt,wd); if (v) ldr=VL_SET_QW(wd);
+    return v;
+}
+inline IData VL_VALUEPLUSARGS_II(int rbits, const char* prefixp, char fmt, CData& ldr) {
+    QData qd; IData v=VL_VALUEPLUSARGS_IQ(rbits,prefixp,fmt,qd); if (v) ldr=(CData)qd;
+    return v;
+}
+inline IData VL_VALUEPLUSARGS_II(int rbits, const char* prefixp, char fmt, SData& ldr) {
+    QData qd; IData v=VL_VALUEPLUSARGS_IQ(rbits,prefixp,fmt,qd); if (v) ldr=(SData)qd;
+    return v;
+}
+inline IData VL_VALUEPLUSARGS_II(int rbits, const char* prefixp, char fmt, IData& ldr) {
+    QData qd; IData v=VL_VALUEPLUSARGS_IQ(rbits,prefixp,fmt,qd); if (v) ldr=(IData)qd;
+    return v;
+}
+
 //======================================================================
 // Constification

@@ -1290,61 +1579,59 @@ static inline WDataOutP VL_COND_WIWW(int obits, int, int, int,

 // If changing the number of functions here, also change EMITCINLINES_NUM_CONSTW

-#define I IData
 #define _END(obits,wordsSet) \
    for(int i=(wordsSet);i<VL_WORDS_I(obits);i++) o[i] = (IData)0x0; \
    return o

 #define VL_HAVE_CONST_W_1X
 static inline WDataOutP VL_CONST_W_1X(int obits, WDataOutP o,
-				      I d0) {
+				      IData d0) {
    o[0]=d0;
    _END(obits,1);  }
 #define VL_HAVE_CONST_W_2X
 static inline WDataOutP VL_CONST_W_2X(int obits, WDataOutP o,
-				      I d1,I d0) {
+				      IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;
    _END(obits,2);  }
 #define VL_HAVE_CONST_W_3X
 static inline WDataOutP VL_CONST_W_3X(int obits, WDataOutP o,
-				      I d2,I d1,I d0) {
+				      IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;
    _END(obits,3);  }
 #define VL_HAVE_CONST_W_4X
-static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o, 
-				      I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
+				      IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;
    _END(obits,4);  }
 #define VL_HAVE_CONST_W_5X
-static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o, 
-				      I d4,I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
+				      IData d4,IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;  o[4]=d4;
    _END(obits,5);  }
 #define VL_HAVE_CONST_W_6X
-static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o, 
-				      I d5,I d4,I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
+				      IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;  o[4]=d4;  o[5]=d5;
    _END(obits,6);  }
 #define VL_HAVE_CONST_W_7X
-static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o, 
-				      I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
+				      IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;  o[4]=d4;  o[5]=d5;  o[6]=d6;
    _END(obits,7);  }
 #define VL_HAVE_CONST_W_8X
-static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o, 
-				      I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
+				      IData d7,IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;  o[4]=d4;  o[5]=d5;  o[6]=d6;  o[7]=d7;
    _END(obits,8);  }
 #define VL_HAVE_CONST_W_9X
-static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o, 
-				      I d8,
-				      I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
+static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o,
+				      IData d8,
+				      IData d7,IData d6,IData d5,IData d4,IData d3,IData d2,IData d1,IData d0) {
    o[0]=d0;  o[1]=d1;  o[2]=d2;  o[3]=d3;  o[4]=d4;  o[5]=d5;  o[6]=d6;  o[7]=d7;
    o[8]=d8;
    _END(obits,9);  }

 #undef _END
-#undef I

 // Debugging

@@ -1,10 +1,10 @@
-# $Id$ -*- Makefile -*-
+# -*- Makefile -*-
 ######################################################################
 # DESCRIPTION: Makefile commands for all verilated target files
 #
-# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
-# redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License or the Perl Artistic License.
+# Copyright 2003-2010 by Wilson Snyder. Verilator is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU Lesser
+# General Public License Version 3 or the Perl Artistic License Version 2.0.
 ######################################################################

 PERL = @PERL@
@@ -26,8 +26,10 @@ SP_INCLUDER     = $(PERL) $(VERILATOR_ROOT)/bin/verilator_includer
 VK_CPPFLAGS_ALWAYS += \
 		-MMD \
 		-I$(VERILATOR_ROOT)/include \
+		-I$(VERILATOR_ROOT)/include/vltstd \
 		-DVL_PRINTF=printf \
 		-DVM_TRACE=$(VM_TRACE) \
+		-DVM_COVERAGE=$(VM_COVERAGE) \

 ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
 VK_CPPFLAGS_WALL += -Wall \
@@ -43,8 +45,9 @@ CPPFLAGS += -I. $(VK_CPPFLAGS_ALWAYS) $(VK_CPPFLAGS_WALL)

 VPATH += ..
 VPATH += $(VERILATOR_ROOT)/include
+VPATH += $(VERILATOR_ROOT)/include/vltstd

-#OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE 
+#OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE
 #OPT = -ggdb -DPRINTINITSTR
 CPPFLAGS += $(OPT)

@@ -55,15 +58,21 @@ LDFLAGS  += $(M32)
 # These aren't ever set by Verilator, so users are free to override them.
 CPPFLAGS += $(USER_CPPFLAGS)
 LDFLAGS  += $(USER_LDFLAGS)
+LDLIBS   += $(USER_LDLIBS)
+
+# Add flags from -CFLAGS and -LDFLAGS on Verilator command line
+CPPFLAGS += $(VM_USER_CFLAGS)
+LDFLAGS  += $(VM_USER_LDFLAGS)
+LDLIBS   += $(VM_USER_LDLIBS)

 # See the benchmarking section of bin/verilator.
 # Support class optimizations.  This includes the tracing and symbol table.
 # SystemC takes minutes to optimize, thus it is off by default.
-#OPT_SLOW = 
+#OPT_SLOW =
 # Fast path optimizations.  Most time is spent in these classes.
 #OPT_FAST = -O2 -fstrict-aliasing
 #OPT_FAST = -O
-#OPT_FAST = 
+#OPT_FAST =

 #######################################################################
 ##### Aggregates
@@ -88,8 +97,8 @@ endif
 ##### SystemPerl builds

 ifeq ($(VM_SP),1)
-  CPPFLAGS += -I$(SYSTEMPERL)/src -DSYSTEMPERL
-  VPATH    +=   $(SYSTEMPERL)/src
+  CPPFLAGS += -I$(SYSTEMPERL_INCLUDE) -DSYSTEMPERL
+  VPATH    +=   $(SYSTEMPERL_INCLUDE)
  LIBS   += -lm -lstdc++

  VK_CLASSES_SP = $(addsuffix .sp, $(VM_CLASSES))
@@ -108,10 +117,6 @@ endif

 ifeq ($(VM_SC),1)
  LIBS   += -lm -lstdc++
- ifeq ($(VM_TRACE),1)
-  CPPFLAGS += -I$(SYSTEMPERL)/src
-  VPATH    +=   $(SYSTEMPERL)/src
- endif
 endif

 #######################################################################
@@ -119,10 +124,6 @@ endif

 ifeq ($(VM_PCLI),1)
  LIBS   += -lm -lstdc++
- ifeq ($(VM_TRACE),1)
-  CPPFLAGS += -I$(SYSTEMPERL)/src
-  VPATH    +=   $(SYSTEMPERL)/src
- endif
 endif

 #######################################################################
@@ -135,6 +136,8 @@ VK_SUPPORT_CPP = $(addsuffix .cpp, $(VM_SUPPORT))

 VK_USER_OBJS   = $(addsuffix .o, $(VM_USER_CLASSES))

+VK_GLOBAL_OBJS = $(addsuffix .o, $(VM_GLOBAL_FAST) $(VM_GLOBAL_SLOW))
+
 ifneq ($(VM_PARALLEL_BUILDS),1)
  # Fast building, all .cpp's in one fell swoop
  # This saves about 5 sec per module, but can be slower if only a little changes
@@ -170,13 +173,15 @@ $(VM_PREFIX)__ALLcls.o: $(VM_PREFIX)__ALLcls.cpp
 ######################################################################
 ### Debugging

-debug::
+debug-make::
 	@echo
 	@echo VM_PREFIX:  $(VM_PREFIX)
 	@echo VM_CLASSES_FAST: $(VM_CLASSES_FAST)
 	@echo VM_CLASSES_SLOW: $(VM_CLASSES_SLOW)
 	@echo VM_SUPPORT_FAST: $(VM_SUPPORT_FAST)
 	@echo VM_SUPPORT_SLOW: $(VM_SUPPORT_SLOW)
+	@echo VM_GLOBAL_FAST: $(VM_GLOBAL_FAST)
+	@echo VM_GLOBAL_SLOW: $(VM_GLOBAL_SLOW)
 	@echo

 ######################################################################
@@ -1,19 +1,20 @@
-// $Id$ -*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
 //
 // This is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 // GNU General Public License for more details.
-// 
+//
 //=========================================================================
 //
 // DESCRIPTION: Verilator: Include in verilog files to hide verilator defines
@@ -25,7 +26,7 @@
 `ifdef verilator `else
  `define coverage_block_off
 `endif
- 
+
 // Hide file descriptor difference
 `ifdef verilator
  `define verilator_file_descriptor reg [63:0]
@@ -0,0 +1,305 @@
+// -*- C++ -*-
+//*************************************************************************
+//
+// Copyright 2009-2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//=========================================================================
+///
+/// \file
+/// \brief Verilator: DPI implementation code
+///
+///	This file must be compiled and linked against all objects
+///	created from Verilator or called by Verilator that use the DPI.
+///
+/// Code available from: http://www.veripool.org/verilator
+///
+//=========================================================================
+
+#define _VERILATED_DPI_CPP_
+#include "verilatedos.h"
+#include "verilated_imp.h"
+
+// On MSVC++ we need svdpi.h to declare exports, not imports
+#define DPI_PROTOTYPES
+#define XXTERN DPI_EXTERN DPI_DLLESPEC
+#define EETERN DPI_EXTERN DPI_DLLESPEC
+
+#include "vltstd/svdpi.h"
+
+//======================================================================
+// Internal macros
+
+// Not supported yet
+#define _VL_SVDPI_UNIMP() \
+    vl_fatal(__FILE__,__LINE__,"",(string("%%Error: Unsupported DPI function: ")+VL_FUNC).c_str())
+
+// Function requires a "context" in the import declaration
+#define _VL_SVDPI_CONTEXT_WARN() \
+    VL_PRINTF("%%Warning: DPI C Function called by Verilog DPI import with missing 'context' keyword.\n");
+
+//======================================================================
+//======================================================================
+//======================================================================
+// DPI ROUTINES
+
+const char* svDpiVersion() {
+    return "1800-2005";
+}
+
+//======================================================================
+// Bit-select utility functions.
+
+svBit svGetBitselBit(const svBitVecVal* s, int i) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+svLogic svGetBitselLogic(const svLogicVecVal* s, int i) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+
+void svPutBitselBit(svBitVecVal* d, int i, svBit s) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitselLogic(svLogicVecVal* d, int i, svLogic s) {
+    _VL_SVDPI_UNIMP();
+}
+
+void svGetPartselBit(svBitVecVal* d, const svBitVecVal* s, int i, int w) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetPartselLogic(svLogicVecVal* d, const svLogicVecVal* s, int i, int w) {
+    _VL_SVDPI_UNIMP();
+}
+
+void svPutPartselBit(svBitVecVal* d, const svBitVecVal s, int i, int w) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutPartselLogic(svLogicVecVal* d, const svLogicVecVal s, int i, int w) {
+    _VL_SVDPI_UNIMP();
+}
+
+//======================================================================
+// Open array querying functions
+
+int svLeft(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svRight(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svLow(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svHigh(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svIncrement(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svLength(const svOpenArrayHandle h, int d) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+int svDimensions(const svOpenArrayHandle h) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+
+void *svGetArrayPtr(const svOpenArrayHandle) {
+    _VL_SVDPI_UNIMP(); return NULL;
+}
+
+int svSizeOfArray(const svOpenArrayHandle) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+
+void *svGetArrElemPtr(const svOpenArrayHandle, int indx1, ...) {
+    _VL_SVDPI_UNIMP(); return NULL;
+}
+void *svGetArrElemPtr1(const svOpenArrayHandle, int indx1) {
+    _VL_SVDPI_UNIMP(); return NULL;
+}
+void *svGetArrElemPtr2(const svOpenArrayHandle, int indx1, int indx2) {
+    _VL_SVDPI_UNIMP(); return NULL;
+}
+void *svGetArrElemPtr3(const svOpenArrayHandle, int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP(); return NULL;
+}
+
+//======================================================================
+// s=source, d=destination
+// From user space into simulator storage
+
+void svPutBitArrElemVecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+			   int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem1VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+			    int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem2VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+			    int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem3VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+			    int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElemVecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+			     int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem1VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+			      int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem2VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+			      int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem3VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+			      int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+
+//======================================================================
+// From simulator storage into user space
+
+void svGetBitArrElemVecVal(svBitVecVal* d, const svOpenArrayHandle s,
+			   int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetBitArrElem1VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+			    int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetBitArrElem2VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+			    int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetBitArrElem3VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+			    int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetLogicArrElemVecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+			     int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetLogicArrElem1VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+			      int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetLogicArrElem2VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+			      int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svGetLogicArrElem3VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+			      int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+
+svBit svGetBitArrElem(const svOpenArrayHandle s, int indx1, ...) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+svBit svGetBitArrElem1(const svOpenArrayHandle s, int indx1) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+svBit svGetBitArrElem2(const svOpenArrayHandle s, int indx1, int indx2) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+svBit svGetBitArrElem3(const svOpenArrayHandle s, int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP(); return 0;
+}
+svLogic svGetLogicArrElem(const svOpenArrayHandle s, int indx1, ...) {
+    _VL_SVDPI_UNIMP(); return sv_x;
+}
+svLogic svGetLogicArrElem1(const svOpenArrayHandle s, int indx1) {
+    _VL_SVDPI_UNIMP(); return sv_x;
+}
+svLogic svGetLogicArrElem2(const svOpenArrayHandle s, int indx1, int indx2) {
+    _VL_SVDPI_UNIMP(); return sv_x;
+}
+svLogic svGetLogicArrElem3(const svOpenArrayHandle s, int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP(); return sv_x;
+}
+void svPutLogicArrElem(const svOpenArrayHandle d, svLogic value, int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem1(const svOpenArrayHandle d, svLogic value, int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem2(const svOpenArrayHandle d, svLogic value, int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutLogicArrElem3(const svOpenArrayHandle d, svLogic value, int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem(const svOpenArrayHandle d, svBit value, int indx1, ...) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem1(const svOpenArrayHandle d, svBit value, int indx1) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem2(const svOpenArrayHandle d, svBit value, int indx1, int indx2) {
+    _VL_SVDPI_UNIMP();
+}
+void svPutBitArrElem3(const svOpenArrayHandle d, svBit value, int indx1, int indx2, int indx3) {
+    _VL_SVDPI_UNIMP();
+}
+
+//======================================================================
+// Functions for working with DPI context
+
+svScope svGetScope() {
+    if (VL_UNLIKELY(!Verilated::dpiInContext())) { _VL_SVDPI_CONTEXT_WARN(); return NULL; }
+    return (svScope)Verilated::dpiScope();
+}
+
+svScope svSetScope(const svScope scope) {
+    const VerilatedScope* prevScopep = Verilated::dpiScope();
+    const VerilatedScope* vscopep = (const VerilatedScope*)(scope);
+    Verilated::dpiScope(vscopep);
+    return (svScope)prevScopep;
+}
+
+const char* svGetNameFromScope(const svScope scope) {
+    const VerilatedScope* vscopep = (const VerilatedScope*)(scope);
+    return vscopep->name();
+}
+
+svScope svGetScopeFromName(const char* scopeName) {
+    return (svScope)VerilatedImp::scopeFind(scopeName);
+}
+
+int svPutUserData(const svScope scope, void *userKey, void* userData) {
+    VerilatedImp::userInsert(scope,userKey,userData);
+    return 0;
+}
+
+void* svGetUserData(const svScope scope, void* userKey) {
+    return VerilatedImp::userFind(scope,userKey);
+}
+
+int svGetCallerInfo(const char** fileNamepp, int *lineNumberp) {
+    if (VL_UNLIKELY(!Verilated::dpiInContext())) { _VL_SVDPI_CONTEXT_WARN(); return false; }
+    if (VL_LIKELY(fileNamepp)) *fileNamepp = Verilated::dpiFilenamep();  // thread local
+    if (VL_LIKELY(lineNumberp)) *lineNumberp = Verilated::dpiLineno();  // thread local
+    return true;
+}
+
+//======================================================================
+// Disables
+
+int svIsDisabledState() {
+    return 0; // Disables not implemented
+}
+
+void svAckDisabledState() {
+    // Disables not implemented
+}
@@ -0,0 +1,51 @@
+// -*- C++ -*-
+//*************************************************************************
+//
+// Copyright 2010-2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+///
+/// \file
+/// \brief Verilator: String include for all Verilated C files
+///
+///	This file is included automatically by Verilator at the top of
+///	all C++ files it generates.  It is used when strings or other
+///	heavyweight types are required; these contents are not part of
+///	verilated.h to save compile time when such types aren't used.
+///
+/// Code available from: http://www.veripool.org/verilator
+///
+//*************************************************************************
+
+
+#ifndef _VERILATED_HEAVY_H_
+#define _VERILATED_HEAVY_H_ 1 ///< Header Guard
+
+#include "verilated.h"
+
+#include <string>
+
+//======================================================================
+// Conversion functions
+
+extern string VL_CVT_PACK_STR_NW(int lwords, WDataInP lwp);
+inline string VL_CVT_PACK_STR_NQ(QData lhs) {
+    IData lw[2];  VL_SET_WQ(lw, lhs);
+    return VL_CVT_PACK_STR_NW(2, lw);
+}
+inline string VL_CVT_PACK_STR_NI(IData lhs) {
+    IData lw[1];  lw[0] = lhs;
+    return VL_CVT_PACK_STR_NW(1, lw);
+}
+
+extern string VL_SFORMATF_NX(const char* formatp, ...);
+
+#endif // Guard
@@ -0,0 +1,189 @@
+// -*- C++ -*-
+//*************************************************************************
+//
+// Copyright 2009-2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//=========================================================================
+///
+/// \file
+/// \brief Verilator: Implementation Header, only for verilated.cpp internals.
+///
+/// Code available from: http://www.veripool.org/verilator
+///
+//=========================================================================
+
+
+#ifndef _VERILATED_IMP_H_
+#define _VERILATED_IMP_H_ 1 ///< Header Guard
+
+#if !defined(_VERILATED_CPP_) && !defined(_VERILATED_DPI_CPP_)
+# error "verilated_imp.h only to be included by verilated*.cpp internals"
+#endif
+
+#include "verilatedos.h"
+#include "verilated.h"
+#include "verilated_heavy.h"
+#include "verilated_syms.h"
+
+#include <map>
+#include <vector>
+#include <string>
+
+class VerilatedScope;
+
+//======================================================================
+// Types
+
+class VerilatedImp {
+    // Whole class is internal use only - Global information shared between verilated*.cpp files.
+
+    // TYPES
+    typedef vector<string> ArgVec;
+    typedef map<pair<const void*,void*>,void*> UserMap;
+    typedef map<const char*, const VerilatedScope*, VerilatedCStrCmp>  ScopeNameMap;
+    typedef map<const char*, int>  ExportNameMap;
+
+    // MEMBERS
+    static VerilatedImp	s_s;		///< Static Singleton; One and only static this
+
+    ArgVec		m_argVec;	///< Argument list
+    bool		m_argVecLoaded;	///< Ever loaded argument list
+    UserMap	 	m_userMap;	///< Map of <(scope,userkey), userData>
+    ScopeNameMap	m_nameMap;	///< Map of <scope_name, scope pointer>
+    // Slow - somewhat static:
+    ExportNameMap	m_exportMap;	///< Map of <export_func_proto, func number>
+    int			m_exportNext;	///< Next export funcnum
+
+public: // But only for verilated*.cpp
+    // CONSTRUCTORS
+    VerilatedImp() : m_argVecLoaded(false), m_exportNext(0) {}
+    ~VerilatedImp() {}
+
+    // METHODS - arguments
+    static void commandArgs(int argc, const char** argv) {
+	s_s.m_argVec.clear();
+	for (int i=0; i<argc; i++) s_s.m_argVec.push_back(argv[i]);
+	s_s.m_argVecLoaded = true; // Can't just test later for empty vector, no arguments is ok
+    }
+    static string argPlusMatch(const char* prefixp) {
+	// Note prefixp does not include the leading "+"
+	size_t len = strlen(prefixp);
+	if (VL_UNLIKELY(!s_s.m_argVecLoaded)) {
+	    s_s.m_argVecLoaded = true;  // Complain only once
+	    vl_fatal("unknown",0,"",
+		     "%Error: Verilog called $test$plusargs or $value$plusargs without"
+		     " testbench C first calling Verilated::commandArgs(argc,argv).");
+	}
+	for (ArgVec::iterator it=s_s.m_argVec.begin(); it!=s_s.m_argVec.end(); ++it) {
+	    if ((*it)[0]=='+') {
+		if (0==strncmp(prefixp, it->c_str()+1, len)) return *it;
+	    }
+	}
+	return "";
+    }
+
+    // METHODS - user scope tracking
+    // We implement this as a single large map instead of one map per scope
+    // There's often many more scopes than userdata's and thus having a ~48byte
+    // per map overhead * N scopes would take much more space and cache thrashing.
+    static inline void userInsert(const void* scopep, void* userKey, void* userData) {
+	UserMap::iterator it=s_s.m_userMap.find(make_pair(scopep,userKey));
+	if (it != s_s.m_userMap.end()) it->second = userData;
+	// When we support VL_THREADs, we need a lock around this insert, as it's runtime
+	else s_s.m_userMap.insert(it, make_pair(make_pair(scopep,userKey),userData));
+    }
+    static inline void* userFind(const void* scopep, void* userKey) {
+	UserMap::iterator it=s_s.m_userMap.find(make_pair(scopep,userKey));
+	if (VL_LIKELY(it != s_s.m_userMap.end())) return it->second;
+	else return NULL;
+    }
+private:
+    /// Symbol table destruction cleans up the entries for each scope.
+    static void userEraseScope(const VerilatedScope* scopep) {
+	// Slow ok - called once/scope on destruction, so we simply iterate.
+	for (UserMap::iterator it=s_s.m_userMap.begin(); it!=s_s.m_userMap.end(); ) {
+	    if (it->first.first == scopep) {
+		s_s.m_userMap.erase(it++);
+	    } else {
+		++it;
+	    }
+	}
+    }
+
+public: // But only for verilated*.cpp
+    // METHODS - scope name
+    static void scopeInsert(const VerilatedScope* scopep) {
+	// Slow ok - called once/scope at construction
+	ScopeNameMap::iterator it=s_s.m_nameMap.find(scopep->name());
+	if (it == s_s.m_nameMap.end()) {
+	    s_s.m_nameMap.insert(it, make_pair(scopep->name(),scopep));
+	}
+    }
+    static inline const VerilatedScope* scopeFind(const char* namep) {
+	ScopeNameMap::iterator it=s_s.m_nameMap.find(namep);
+	if (VL_LIKELY(it != s_s.m_nameMap.end())) return it->second;
+	else return NULL;
+    }
+    static void scopeErase(const VerilatedScope* scopep) {
+	// Slow ok - called once/scope at destruction
+	userEraseScope(scopep);
+	ScopeNameMap::iterator it=s_s.m_nameMap.find(scopep->name());
+	if (it != s_s.m_nameMap.end()) s_s.m_nameMap.erase(it);
+    }
+
+    static void scopesDump() {
+	VL_PRINTF("scopesDump:\n");
+	for (ScopeNameMap::iterator it=s_s.m_nameMap.begin(); it!=s_s.m_nameMap.end(); ++it) {
+	    const VerilatedScope* scopep = it->second;
+	    scopep->scopeDump();
+	}
+	VL_PRINTF("\n");
+    }
+
+public: // But only for verilated*.cpp
+    // METHODS - export names
+
+    // Each function prototype is converted to a function number which we
+    // then use to index a 2D table also indexed by scope number, because we
+    // can't know at Verilation time what scopes will exist in other modules
+    // in the design that also happen to have our same callback function.
+    // Rather than a 2D map, the integer scheme saves 500ish ns on a likely
+    // miss at the cost of a multiply, and all lookups move to slowpath.
+    static int exportInsert(const char* namep) {
+	// Slow ok - called once/function at creation
+	ExportNameMap::iterator it=s_s.m_exportMap.find(namep);
+	if (it == s_s.m_exportMap.end()) {
+	    s_s.m_exportMap.insert(it, make_pair(namep, s_s.m_exportNext++));
+	    return s_s.m_exportNext++;
+	} else {
+	    return it->second;
+	}
+    }
+    static int exportFind(const char* namep) {
+	ExportNameMap::iterator it=s_s.m_exportMap.find(namep);
+	if (VL_LIKELY(it != s_s.m_exportMap.end())) return it->second;
+	string msg = (string("%Error: Testbench C called ")+namep
+		      +" but no such DPI export function name exists in ANY model");
+	vl_fatal("unknown",0,"", msg.c_str());
+	return -1;
+    }
+    static const char* exportName(int funcnum) {
+	// Slowpath; find name for given export; errors only so no map to reverse-map it
+	for (ExportNameMap::iterator it=s_s.m_exportMap.begin(); it!=s_s.m_exportMap.end(); ++it) {
+	    if (it->second == funcnum) return it->first;
+	}
+	return "*UNKNOWN*";
+    }
+    // We don't free up m_exportMap until the end, because we can't be sure
+    // what other models are using the assigned funcnum's.
+};
+
+#endif  // Guard
@@ -0,0 +1,51 @@
+// -*- C++ -*-
+//*************************************************************************
+//
+// Copyright 2009-2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+///
+/// \file
+/// \brief Verilator: Common include for all Verilated SystemC files
+///
+///	This file is included automatically by Verilator at the top of
+///	all SystemC files it generates.
+///
+/// Code available from: http://www.veripool.org/verilator
+///
+//*************************************************************************
+
+
+#ifndef _VERILATED_SC_H_
+#define _VERILATED_SC_H_ 1 ///< Header Guard
+
+#include "verilatedos.h"
+#include "systemc.h"
+
+//=============================================================================
+// VL_SC_BV_DATAP
+// We want to get a pointer to m_data in the sc_bv_base class,
+// but it is protected.  So make an exposing class, then use
+// cast magic to get at it.  Saves patching get_datap in SystemC.
+
+#define VL_SC_BV_DATAP(bv) (VlScBvExposer::sp_datap(bv))
+class VlScBvExposer : public sc_bv_base {
+public:
+    static vluint32_t* sp_datap(const sc_bv_base& base) {
+	return static_cast<const VlScBvExposer*>(&base)->sp_datatp(); }
+    vluint32_t* sp_datatp() const { return (vluint32_t*)(m_data); }
+    // Above reads this protected element in sc_bv_base:
+    //   sc_digit* m_data; // data array
+};
+
+//=========================================================================
+
+#endif // guard
@@ -0,0 +1,100 @@
+// -*- C++ -*-
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+///
+/// \file
+/// \brief Verilator: Include to allow symbol inspection
+///
+///	This file is for inclusion by files that need to inspect
+///	the symbol table.  It is not included in verilated.h
+///	as it requires some heavyweight C++ classes.
+///
+/// Code available from: http://www.veripool.org/verilator
+///
+//*************************************************************************
+
+
+#ifndef _VERILATED_SYMS_H_
+#define _VERILATED_SYMS_H_ 1 ///< Header Guard
+
+#include "verilated_heavy.h"
+
+#include <map>
+
+//======================================================================
+// Types
+
+struct VerilatedCStrCmp {
+    /// Ordering maps keyed by const char*'s
+    bool operator() (const char *a, const char *b) const {
+	return std::strcmp(a, b) < 0;
+    }
+};
+
+//===========================================================================
+/// Verilator range
+
+class VerilatedRange { 
+    int		m_lhs;
+    int		m_rhs;
+protected:
+    friend class VerilatedVar;
+    friend class VerilatedScope;
+    VerilatedRange() : m_lhs(0), m_rhs(0) {}
+    void sets(int lhs, int rhs) { m_lhs=lhs; m_rhs=rhs; }
+public:
+    ~VerilatedRange() {}
+    int lhs() const { return m_lhs; }
+    int rhs() const { return m_rhs; }
+    int bits() const { return (VL_LIKELY(m_lhs>=m_rhs)?(m_lhs-m_rhs+1):(m_rhs-m_lhs+1)); }
+};
+
+//===========================================================================
+/// Verilator variable
+
+class VerilatedVar {
+    void*		m_datap;	// Location of data
+    VerilatedVarType	m_vltype;	// Data type
+    VerilatedVarFlags	m_vlflags;	// Direction
+    VerilatedRange	m_range;	// First range
+    VerilatedRange	m_array;	// Array
+    int			m_dims;		// Dimensions
+    const char*		m_namep;	// Name - slowpath
+protected:
+    friend class VerilatedScope;
+    VerilatedVar(const char* namep, void* datap,
+		 VerilatedVarType vltype, VerilatedVarFlags vlflags, int dims)
+	: m_datap(datap), m_vltype(vltype), m_vlflags(vlflags), m_dims(dims), m_namep(namep) {}
+public:
+    ~VerilatedVar() {}
+    void* datap() const { return m_datap; }
+    VerilatedVarType vltype() const { return m_vltype; }
+    VerilatedVarFlags vldir() const { return (VerilatedVarFlags)((int)m_vlflags & VLVF_MASK_DIR); }
+    vluint32_t entSize() const;
+    bool isPublicRW() const { return ((m_vlflags & VLVF_PUB_RW) != 0); }
+    const VerilatedRange& range() const { return m_range; }
+    const VerilatedRange& array() const { return m_array; }
+    const char* name() const { return m_namep; }
+    int dims() const { return m_dims; }
+};
+
+//======================================================================
+/// Types
+
+struct VerilatedVarNameMap : public map<const char*, VerilatedVar, VerilatedCStrCmp> {
+    VerilatedVarNameMap() {}
+    ~VerilatedVarNameMap() {}
+};
+
+#endif // Guard
@@ -0,0 +1,697 @@
+// -*- SystemC -*-
+//=============================================================================
+//
+// THIS MODULE IS PUBLICLY LICENSED
+//
+// Copyright 2001-2010 by Wilson Snyder.  This program is free software;
+// you can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
+//
+// This is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+//=============================================================================
+///
+/// \file
+/// \brief C++ Tracing in VCD Format
+///
+/// AUTHOR:  Wilson Snyder
+///
+//=============================================================================
+// SPDIFF_OFF
+
+#include "verilatedos.h"
+#include "verilated.h"
+#include "verilated_vcd_c.h"
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <cerrno>
+#include <ctime>
+#include <algorithm>
+
+#if defined(_WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
+# include <io.h>
+#else
+# include <unistd.h>
+#endif
+
+// SPDIFF_ON
+
+#ifndef O_LARGEFILE // For example on WIN32
+# define O_LARGEFILE 0
+#endif
+#ifndef O_NONBLOCK
+# define O_NONBLOCK 0
+#endif
+
+//=============================================================================
+// Global
+
+vector<VerilatedVcd*>	VerilatedVcd::s_vcdVecp;	///< List of all created traces
+
+//=============================================================================
+// VerilatedVcdCallInfo
+/// Internal callback routines for each module being traced.
+////
+/// Each SystemPerl module that wishes to be traced registers a set of
+/// callbacks stored in this class.  When the trace file is being
+/// constructed, this class provides the callback routines to be executed.
+
+class VerilatedVcdCallInfo {
+protected:
+    friend class VerilatedVcd;
+    VerilatedVcdCallback_t	m_initcb;	///< Initialization Callback function
+    VerilatedVcdCallback_t	m_fullcb;	///< Full Dumping Callback function
+    VerilatedVcdCallback_t	m_changecb;	///< Incremental Dumping Callback function
+    void*		m_userthis;	///< Fake "this" for caller
+    vluint32_t		m_code;		///< Starting code number
+    // CREATORS
+    VerilatedVcdCallInfo (VerilatedVcdCallback_t icb, VerilatedVcdCallback_t fcb,
+			  VerilatedVcdCallback_t changecb,
+			  void* ut, vluint32_t code)
+	: m_initcb(icb), m_fullcb(fcb), m_changecb(changecb), m_userthis(ut), m_code(code) {};
+};
+
+//=============================================================================
+//=============================================================================
+//=============================================================================
+// Opening/Closing
+
+void VerilatedVcd::open (const char* filename) {
+    if (isOpen()) return;
+
+    // Set member variables
+    m_filename = filename;
+    s_vcdVecp.push_back(this);
+
+    // SPDIFF_OFF
+    // Set callback so an early exit will flush us
+    Verilated::flushCb(&flush_all);
+
+    // SPDIFF_ON
+    openNext (m_rolloverMB!=0);
+    if (!isOpen()) return;
+
+    dumpHeader();
+
+    // Allocate space now we know the number of codes
+    if (!m_sigs_oldvalp) {
+	m_sigs_oldvalp = new vluint32_t [m_nextCode+10];
+    }
+
+    if (m_rolloverMB) {
+	openNext(true);
+	if (!isOpen()) return;
+    }
+}
+
+void VerilatedVcd::openNext (bool incFilename) {
+    // Open next filename in concat sequence, mangle filename if
+    // incFilename is true.
+    closePrev(); // Close existing
+    if (incFilename) {
+	// Find _0000.{ext} in filename
+	string name = m_filename;
+	size_t pos=name.rfind(".");
+	if (pos>8 && 0==strncmp("_cat",name.c_str()+pos-8,4)
+	    && isdigit(name.c_str()[pos-4])
+	    && isdigit(name.c_str()[pos-3])
+	    && isdigit(name.c_str()[pos-2])
+	    && isdigit(name.c_str()[pos-1])) {
+	    // Increment code.
+	    if ((++(name[pos-1])) > '9') {
+		name[pos-1] = '0';
+		if ((++(name[pos-2])) > '9') {
+		    name[pos-2] = '0';
+		    if ((++(name[pos-3])) > '9') {
+			name[pos-3] = '0';
+			if ((++(name[pos-4])) > '9') {
+			    name[pos-4] = '0';
+			}}}}
+	} else {
+	    // Append _cat0000
+	    name.insert(pos,"_cat0000");
+	}
+	m_filename = name;
+    }
+    if (m_filename[0]=='|') {
+	assert(0);	// Not supported yet.
+    } else {
+	m_fd = ::open (m_filename.c_str(), O_CREAT|O_WRONLY|O_TRUNC|O_LARGEFILE|O_NONBLOCK
+		       , 0666);
+	if (m_fd<0) {
+	    // User code can check isOpen()
+	    m_isOpen = false;
+	    return;
+	}
+    }
+    m_isOpen = true;
+    m_fullDump = true;	// First dump must be full
+    m_wroteBytes = 0;
+}
+
+void VerilatedVcd::makeNameMap() {
+    // Take signal information from each module and build m_namemapp
+    m_namemapp = new NameMap;
+    for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
+	VerilatedVcdCallInfo *cip = m_callbacks[ent];
+	cip->m_code = nextCode();
+	(cip->m_initcb) (this, cip->m_userthis, cip->m_code);
+    }
+
+    // Though not speced, it's illegal to generate a vcd with signals
+    // not under any module - it crashes at least two viewers.
+    // If no scope was specified, prefix everything with a "top"
+    // This comes from user instantiations with no name - IE Vtop("").
+    bool nullScope = false;
+    for (NameMap::iterator it=m_namemapp->begin(); it!=m_namemapp->end(); ++it) {
+	const char* hiername = (*it).first.c_str();
+	if (hiername[0] == '\t') nullScope=true;
+    }
+    if (nullScope) {
+	NameMap* newmapp = new NameMap;
+	for (NameMap::iterator it=m_namemapp->begin(); it!=m_namemapp->end(); ++it) {
+	    const string& hiername = it->first;
+	    const string& decl     = it->second;
+	    string newname = string("top");
+	    if (hiername[0] != '\t') newname += ' ';
+	    newname += hiername;
+	    newmapp->insert(make_pair(newname,decl));
+	}
+	delete m_namemapp; m_namemapp=NULL;
+	m_namemapp = newmapp;
+    }
+}
+
+VerilatedVcd::~VerilatedVcd() {
+    close();
+    if (m_wrBufp) { delete[] m_wrBufp; m_wrBufp=NULL; }
+    if (m_sigs_oldvalp) { delete[] m_sigs_oldvalp; m_sigs_oldvalp=NULL; }
+    // Remove from list of traces
+    vector<VerilatedVcd*>::iterator pos = find(s_vcdVecp.begin(), s_vcdVecp.end(), this);
+    if (pos != s_vcdVecp.end()) { s_vcdVecp.erase(pos); }
+}
+
+void VerilatedVcd::closePrev () {
+    if (!isOpen()) return;
+
+    bufferFlush();
+    m_isOpen = false;
+    ::close(m_fd);
+}
+
+void VerilatedVcd::closeErr () {
+    // Close due to an error.  We might abort before even getting here,
+    // depending on the definition of vl_fatal.
+    if (!isOpen()) return;
+
+    // No buffer flush, just fclose
+    m_isOpen = false;
+    ::close(m_fd);  // May get error, just ignore it
+}
+
+void VerilatedVcd::close() {
+    if (!isOpen()) return;
+    if (m_evcd) {
+	printStr("$vcdclose ");
+	printTime(m_timeLastDump);
+	printStr(" $end\n");
+    }
+    closePrev();
+}
+
+void VerilatedVcd::printStr (const char* str) {
+    // Not fast...
+    while (*str) {
+	*m_writep++ = *str++;
+	bufferCheck();
+    }
+}
+
+void VerilatedVcd::printQuad (vluint64_t n) {
+    char buf [100];
+    sprintf(buf,"%" VL_PRI64 "u", n);
+    printStr(buf);
+}
+
+void VerilatedVcd::printTime (vluint64_t timeui) {
+    // VCD file format specification does not allow non-integers for timestamps
+    // Dinotrace doesn't mind, but Cadence vvision seems to choke
+    if (VL_UNLIKELY(timeui < m_timeLastDump)) {
+	timeui = m_timeLastDump;
+	static bool backTime = false;
+	if (!backTime) {
+	    backTime = true;
+	    VL_PRINTF("VCD time is moving backwards, wave file may be incorrect.\n");
+	}
+    }
+    m_timeLastDump = timeui;
+    printQuad(timeui);
+}
+
+void VerilatedVcd::bufferFlush () {
+    // We add output data to m_writep.
+    // When it gets nearly full we dump it using this routine which calls write()
+    // This is much faster than using buffered I/O
+    if (VL_UNLIKELY(!isOpen())) return;
+    char* wp = m_wrBufp;
+    while (1) {
+	ssize_t remaining = (m_writep - wp);
+	if (remaining==0) break;
+	errno = 0;
+	ssize_t got = write (m_fd, wp, remaining);
+	if (got>0) {
+	    wp += got;
+	    m_wroteBytes += got;
+	} else if (got < 0) {
+	    if (errno != EAGAIN && errno != EINTR) {
+		// write failed, presume error (perhaps out of disk space)
+		string msg = (string)"VerilatedVcd::bufferFlush: "+strerror(errno);
+		vl_fatal("",0,"",msg.c_str());
+		closeErr();
+		break;
+	    }
+	}
+    }
+
+    // Reset buffer
+    m_writep = m_wrBufp;
+}
+
+//=============================================================================
+// Simple methods
+
+void VerilatedVcd::set_time_unit (const char* unitp) {
+    string unitstr (unitp);
+    //cout<<" set_time_unit ("<<unitp<<") == "<<timescaleToDouble(unitp)<<" == "<<doubleToTimescale(timescaleToDouble(unitp))<<endl;
+    m_timeUnit = timescaleToDouble(unitp);
+}
+
+void VerilatedVcd::set_time_resolution (const char* unitp) {
+    string unitstr (unitp);
+    //cout<<"set_time_resolution ("<<unitp<<") == "<<timescaleToDouble(unitp)<<" == "<<doubleToTimescale(timescaleToDouble(unitp))<<endl;
+    m_timeRes = timescaleToDouble(unitp);
+}
+
+double VerilatedVcd::timescaleToDouble (const char* unitp) {
+    char* endp;
+    double value = strtod(unitp, &endp);
+    if (!value) value=1;  // On error so we allow just "ns" to return 1e-9.
+    unitp=endp;
+    while (*unitp && isspace(*unitp)) unitp++;
+    switch (*unitp) {
+    case 's': value *= 1e1; break;
+    case 'm': value *= 1e-3; break;
+    case 'u': value *= 1e-6; break;
+    case 'n': value *= 1e-9; break;
+    case 'p': value *= 1e-12; break;
+    case 'f': value *= 1e-15; break;
+    case 'a': value *= 1e-18; break;
+    }
+    return value;
+}
+
+string VerilatedVcd::doubleToTimescale (double value) {
+    const char* suffixp = "s";
+    if	    (value>=1e0)   { suffixp="s"; value *= 1e0; }
+    else if (value>=1e-3 ) { suffixp="ms"; value *= 1e3; }
+    else if (value>=1e-6 ) { suffixp="us"; value *= 1e6; }
+    else if (value>=1e-9 ) { suffixp="ns"; value *= 1e9; }
+    else if (value>=1e-12) { suffixp="ps"; value *= 1e12; }
+    else if (value>=1e-15) { suffixp="fs"; value *= 1e15; }
+    else if (value>=1e-18) { suffixp="as"; value *= 1e18; }
+    char valuestr[100]; sprintf(valuestr,"%d%s",(int)(value), suffixp);
+    return valuestr;  // Gets converted to string, so no ref to stack
+}
+
+//=============================================================================
+// Definitions
+
+void VerilatedVcd::printIndent (int level_change) {
+    if (level_change<0) m_modDepth += level_change;
+    assert(m_modDepth>=0);
+    for (int i=0; i<m_modDepth; i++) printStr(" ");
+    if (level_change>0) m_modDepth += level_change;
+}
+
+void VerilatedVcd::dumpHeader () {
+    printStr("$version Generated by VerilatedVcd $end\n");
+    time_t time_str = time(NULL);
+    printStr("$date "); printStr(ctime(&time_str)); printStr(" $end\n");
+
+    printStr("$timescale ");
+    printStr(doubleToTimescale(m_timeRes).c_str());
+    printStr(" $end\n");
+
+    makeNameMap();
+
+    // Signal header
+    assert (m_modDepth==0);
+    printIndent(1);
+    printStr("\n");
+
+    // We detect the spaces in module names to determine hierarchy.  This
+    // allows signals to be declared without fixed ordering, which is
+    // required as Verilog signals might be separately declared from
+    // "SP_TRACE" signals.
+
+    // Print the signal names
+    const char* lastName = "";
+    for (NameMap::iterator it=m_namemapp->begin(); it!=m_namemapp->end(); ++it) {
+	const char* hiername = (*it).first.c_str();
+	const char* decl     = (*it).second.c_str();
+
+	// Determine difference between the old and new names
+	const char* lp = lastName;
+	const char* np = hiername;
+	lastName = hiername;
+
+	// Skip common prefix, it must break at a space or tab
+	for (; *np && (*np == *lp); np++, lp++) {}
+	while (np!=hiername && *np && *np!=' ' && *np!='\t') { np--; lp--; }
+	//printf("hier %s\n  lp=%s\n  np=%s\n",hiername,lp,np);
+
+	// Any extra spaces in last name are scope ups we need to do
+	bool first = true;
+	for (; *lp; lp++) {
+	    if (*lp==' ' || (first && *lp!='\t')) {
+		printIndent(-1);
+		printStr("$upscope $end\n");
+	    }
+	    first = false;
+	}
+
+	// Any new spaces are scope downs we need to do
+	while (*np) {
+	    if (*np==' ') np++;
+	    if (*np=='\t') break; // tab means signal name starts
+	    printIndent(1);
+	    printStr("$scope module ");
+	    for (; *np && *np!=' ' && *np!='\t'; np++) {
+		if (*np=='[') printStr("(");
+		else if (*np==']') printStr(")");
+		else *m_writep++=*np;
+	    }
+	    printStr(" $end\n");
+	}
+
+	printIndent(0);
+	printStr(decl);
+    }
+
+    while (m_modDepth>1) {
+	printIndent(-1);
+	printStr("$upscope $end\n");
+    }
+
+    printIndent(-1);
+    printStr("$enddefinitions $end\n\n\n");
+    assert (m_modDepth==0);
+
+    // Reclaim storage
+    delete m_namemapp;
+}
+
+void VerilatedVcd::module (string name) {
+    m_modName = name;
+}
+
+void VerilatedVcd::declare (vluint32_t code, const char* name, const char* wirep,
+			    int arraynum, bool tri, bool bussed, int msb, int lsb) {
+    if (!code) { vl_fatal(__FILE__,__LINE__,"","Internal: internal trace problem, code 0 is illegal"); }
+
+    int bits = ((msb>lsb)?(msb-lsb):(lsb-msb))+1;
+    int codesNeeded = 1+int(bits/32);
+    if (tri) codesNeeded *= 2;   // Space in change array for __en signals
+
+    // Make sure array is large enough
+    m_nextCode = max(nextCode(), code+codesNeeded);
+    if (m_sigs.capacity() <= m_nextCode) {
+	m_sigs.reserve(m_nextCode*2);	// Power-of-2 allocation speeds things up
+    }
+
+    // Save declaration info
+    VerilatedVcdSig sig = VerilatedVcdSig(code, bits);
+    m_sigs.push_back(sig);
+
+    // Split name into basename
+    // Spaces and tabs aren't legal in VCD signal names, so:
+    // Space separates each level of scope
+    // Tab separates final scope from signal name
+    // Tab sorts before spaces, so signals nicely will print before scopes
+    // Note the hiername may be nothing, if so we'll add "\t{name}"
+    string nameasstr = name;
+    if (m_modName!="") { nameasstr = m_modName+m_scopeEscape+nameasstr; }  // Optional ->module prefix
+    string hiername;
+    string basename;
+    for (const char* cp=nameasstr.c_str(); *cp; cp++) {
+	if (isScopeEscape(*cp)) {
+	    // Ahh, we've just read a scope, not a basename
+	    if (hiername!="") hiername += " ";
+	    hiername += basename;
+	    basename = "";
+	} else {
+	    basename += *cp;
+	}
+    }
+    hiername += "\t"+basename;
+
+    // Print reference
+    string decl = "$var ";
+    if (m_evcd) decl += "port"; else decl += wirep;  // usually "wire"
+    char buf [1000];
+    sprintf(buf, " %2d ", bits);
+    decl += buf;
+    if (m_evcd) {
+	sprintf(buf, "<%d", code);
+	decl += buf;
+    } else {
+	decl += stringCode(code);
+    }
+    decl += " ";
+    decl += basename;
+    if (arraynum>=0) {
+	sprintf(buf, "(%d)", arraynum);
+	decl += buf;
+	hiername += buf;
+    }
+    if (bussed) {
+	sprintf(buf, " [%d:%d]", msb, lsb);
+	decl += buf;
+    }
+    decl += " $end\n";
+    m_namemapp->insert(make_pair(hiername,decl));
+}
+
+void VerilatedVcd::declBit      (vluint32_t code, const char* name, int arraynum)
+{  declare (code, name, "wire", arraynum, false, false, 0, 0); }
+void VerilatedVcd::declBus      (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, false, true, msb, lsb); }
+void VerilatedVcd::declQuad     (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, false, true, msb, lsb); }
+void VerilatedVcd::declArray    (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, false, true, msb, lsb); }
+void VerilatedVcd::declTriBit   (vluint32_t code, const char* name, int arraynum)
+{  declare (code, name, "wire", arraynum, true, false, 0, 0); }
+void VerilatedVcd::declTriBus   (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, true, true, msb, lsb); }
+void VerilatedVcd::declTriQuad  (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, true, true, msb, lsb); }
+void VerilatedVcd::declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
+{  declare (code, name, "wire", arraynum, true, true, msb, lsb); }
+void VerilatedVcd::declFloat    (vluint32_t code, const char* name, int arraynum)
+{  declare (code, name, "real", arraynum, false, false, 31, 0); }
+void VerilatedVcd::declDouble   (vluint32_t code, const char* name, int arraynum)
+{  declare (code, name, "real", arraynum, false, false, 63, 0); }
+
+//=============================================================================
+
+void VerilatedVcd::fullDouble (vluint32_t code, const double newval) {
+    (*((double*)&m_sigs_oldvalp[code])) = newval;
+    // Buffer can't overflow; we have at least bufferInsertSize() bytes (>>>16 bytes)
+    sprintf(m_writep, "r%.16g", newval);
+    m_writep += strlen(m_writep);
+    *m_writep++=' '; printCode(code); *m_writep++='\n';
+    bufferCheck();
+}
+void VerilatedVcd::fullFloat (vluint32_t code, const float newval) {
+    (*((float*)&m_sigs_oldvalp[code])) = newval;
+    // Buffer can't overflow; we have at least bufferInsertSize() bytes (>>>16 bytes)
+    sprintf(m_writep, "r%.16g", (double)newval);
+    m_writep += strlen(m_writep);
+    *m_writep++=' '; printCode(code); *m_writep++='\n';
+    bufferCheck();
+}
+
+//=============================================================================
+// Callbacks
+
+void VerilatedVcd::addCallback (
+    VerilatedVcdCallback_t initcb, VerilatedVcdCallback_t fullcb, VerilatedVcdCallback_t changecb,
+    void* userthis)
+{
+    if (VL_UNLIKELY(isOpen())) {
+	string msg = (string)"Internal: "+__FILE__+"::"+__FUNCTION__+" called with already open file";
+	vl_fatal(__FILE__,__LINE__,"",msg.c_str());
+    }
+    VerilatedVcdCallInfo* vci = new VerilatedVcdCallInfo(initcb, fullcb, changecb, userthis, nextCode());
+    m_callbacks.push_back(vci);
+}
+
+//=============================================================================
+// Dumping
+
+void VerilatedVcd::dumpFull (vluint64_t timeui) {
+    dumpPrep (timeui);
+    for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
+	VerilatedVcdCallInfo *cip = m_callbacks[ent];
+	(cip->m_fullcb) (this, cip->m_userthis, cip->m_code);
+    }
+    dumpDone ();
+}
+
+void VerilatedVcd::dump (vluint64_t timeui) {
+    if (!isOpen()) return;
+    if (VL_UNLIKELY(m_fullDump)) {
+	m_fullDump = false;	// No need for more full dumps
+	dumpFull(timeui);
+	return;
+    }
+    if (VL_UNLIKELY(m_rolloverMB && m_wroteBytes > this->m_rolloverMB)) {
+	openNext(true);
+	if (!isOpen()) return;
+    }
+    dumpPrep (timeui);
+    for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
+	VerilatedVcdCallInfo *cip = m_callbacks[ent];
+	(cip->m_changecb) (this, cip->m_userthis, cip->m_code);
+    }
+    dumpDone();
+}
+
+void VerilatedVcd::dumpPrep (vluint64_t timeui) {
+    printStr("#");
+    printTime(timeui);
+    printStr("\n");
+}
+
+void VerilatedVcd::dumpDone () {
+}
+
+//======================================================================
+// Static members
+
+void VerilatedVcd::flush_all() {
+    for (vluint32_t ent = 0; ent< s_vcdVecp.size(); ent++) {
+	VerilatedVcd* vcdp = s_vcdVecp[ent];
+	vcdp->flush();
+    }
+}
+
+//======================================================================
+//======================================================================
+//======================================================================
+
+#ifdef VERILATED_VCD_TEST
+vluint32_t v1, v2, s1, s2[3];
+vluint32_t tri96[3];
+vluint32_t tri96__tri[3];
+vluint8_t ch;
+vluint64_t timestamp = 1;
+double doub = 0;
+
+void vcdInit (VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
+    vcdp->scopeEscape('.');
+    vcdp->module ("top");
+     vcdp->declBus (0x2, "v1",-1,5,1);
+     vcdp->declBus (0x3, "v2",-1,6,0);
+     vcdp->module ("top.sub1");
+      vcdp->declBit (0x4, "s1",-1);
+      vcdp->declBit (0x5, "ch",-1);
+     vcdp->module ("top.sub2");
+      vcdp->declArray (0x6, "s2",-1, 40,3);
+    // Note need to add 3 for next code.
+    vcdp->module ("top2");
+     vcdp->declBus (0x2, "t2v1",-1,4,1);
+     vcdp->declTriBit   (0x10, "io1", -1);
+     vcdp->declTriBus   (0x12, "io5", -1,4,0);
+     vcdp->declTriArray (0x16, "io96",-1,95,0);
+    // Note need to add 6 for next code.
+     vcdp->declDouble   (0x1c, "doub",-1);
+    // Note need to add 2 for next code.
+}
+
+void vcdFull (VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
+    vcdp->fullBus  (0x2, v1,5);
+    vcdp->fullBus  (0x3, v2,7);
+    vcdp->fullBit  (0x4, s1);
+    vcdp->fullBus  (0x5, ch,2);
+    vcdp->fullArray(0x6, &s2[0], 38);
+    vcdp->fullTriBit   (0x10, tri96[0]&1,    tri96__tri[0]&1);
+    vcdp->fullTriBus   (0x12, tri96[0]&0x1f, tri96__tri[0]&0x1f,  5);
+    vcdp->fullTriArray (0x16, tri96,         tri96__tri,          96);
+    vcdp->fullDouble(0x1c, doub);
+}
+
+void vcdChange (VerilatedVcd* vcdp, void* userthis, vluint32_t code) {
+    vcdp->chgBus  (0x2, v1,5);
+    vcdp->chgBus  (0x3, v2,7);
+    vcdp->chgBit  (0x4, s1);
+    vcdp->chgBus  (0x5, ch,2);
+    vcdp->chgArray(0x6, &s2[0], 38);
+    vcdp->chgTriBit   (0x10, tri96[0]&1,   tri96__tri[0]&1);
+    vcdp->chgTriBus   (0x12, tri96[0]&0x1f, tri96__tri[0]&0x1f, 5);
+    vcdp->chgTriArray (0x16, tri96,         tri96__tri,         96);
+    vcdp->chgDouble   (0x1c, doub);
+}
+
+main() {
+    cout<<"test: O_LARGEFILE="<<O_LARGEFILE<<endl;
+
+    v1 = v2 = s1 = 0;
+    s2[0] = s2[1] = s2[2] = 0;
+    tri96[2] = tri96[1] = tri96[0] = 0;
+    tri96__tri[2] = tri96__tri[1] = tri96__tri[0] = ~0;
+    ch = 0;
+    doub = 0;
+    {
+	VerilatedVcdC* vcdp = new VerilatedVcdC;
+	vcdp->spTrace()->addCallback (&vcdInit, &vcdFull, &vcdChange, 0);
+	vcdp->open ("test.vcd");
+	// Dumping
+	vcdp->dump(timestamp++);
+	v1 = 0xfff;
+	tri96[2] = 4; tri96[1] = 2; tri96[0] = 1;
+	tri96__tri[2] = tri96__tri[1] = tri96__tri[0] = ~0;  // Still tri
+	doub = 1.5;
+	vcdp->dump(timestamp++);
+	v2 = 0x1;
+	s2[1] = 2;
+	tri96__tri[2] = tri96__tri[1] = tri96__tri[0] = 0; // enable w/o data change
+	doub = -1.66e13;
+	vcdp->dump(timestamp++);
+	ch = 2;
+	tri96[2] = ~4; tri96[1] = ~2; tri96[0] = ~1;
+	doub = -3.33e-13;
+	vcdp->dump(timestamp++);
+	vcdp->dump(timestamp++);
+# ifdef VERILATED_VCD_TEST_64BIT
+	vluint64_t bytesPerDump = 15ULL;
+	for (vluint64_t i=0; i<((1ULL<<32) / bytesPerDump); i++) {
+	    v1 = i;
+	    vcdp->dump(timestamp++);
+	}
+# endif
+	vcdp->close();
+    }
+}
+#endif
+
+//********************************************************************
+// Local Variables:
+// compile-command: "mkdir -p ../test_dir && cd ../test_dir && g++ -DVERILATED_VCD_TEST ../src/verilated_vcd_c.cpp -o verilated_vcd_c && ./verilated_vcd_c && cat test.vcd"
+// End:
@@ -0,0 +1,420 @@
+// -*- SystemC -*-
+//=============================================================================
+//
+// THIS MODULE IS PUBLICLY LICENSED
+//
+// Copyright 2001-2010 by Wilson Snyder.  This program is free software;
+// you can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
+//
+// This is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+//=============================================================================
+///
+/// \file
+/// \brief C++ Tracing in VCD Format
+///
+/// AUTHOR:  Wilson Snyder
+///
+//=============================================================================
+// SPDIFF_OFF
+
+#ifndef _VERILATED_VCD_C_H_
+#define _VERILATED_VCD_C_H_ 1
+
+#include "verilatedos.h"
+
+#include <string>
+#include <vector>
+#include <map>
+using namespace std;
+
+class VerilatedVcd;
+class VerilatedVcdCallInfo;
+
+// SPDIFF_ON
+//=============================================================================
+// VerilatedVcdSig
+/// Internal data on one signal being traced.
+
+class VerilatedVcdSig {
+protected:
+    friend class VerilatedVcd;
+    vluint32_t		m_code;		///< VCD file code number
+    int			m_bits;		///< Size of value in bits
+    VerilatedVcdSig (vluint32_t code, int bits)
+	: m_code(code), m_bits(bits) {}
+public:
+    ~VerilatedVcdSig() {}
+};
+
+//=============================================================================
+
+typedef void (*VerilatedVcdCallback_t)(VerilatedVcd* vcdp, void* userthis, vluint32_t code);
+
+//=============================================================================
+// VerilatedVcd
+/// Create a SystemPerl VCD dump
+
+class VerilatedVcd {
+private:
+    bool 		m_isOpen;	///< True indicates open file
+    bool		m_evcd;		///< True for evcd format
+    int			m_fd;		///< File descriptor we're writing to
+    string		m_filename;	///< Filename we're writing to (if open)
+    vluint64_t		m_rolloverMB;	///< MB of file size to rollover at
+    char		m_scopeEscape;	///< Character to separate scope components
+    int			m_modDepth;	///< Depth of module hierarchy
+    bool		m_fullDump;	///< True indicates dump ignoring if changed
+    vluint32_t		m_nextCode;	///< Next code number to assign
+    string		m_modName;	///< Module name being traced now
+    double		m_timeRes;	///< Time resolution (ns/ms etc)
+    double		m_timeUnit;	///< Time units (ns/ms etc)
+    vluint64_t		m_timeLastDump;	///< Last time we did a dump
+
+    char*		m_wrBufp;	///< Output buffer
+    char*		m_writep;	///< Write pointer into output buffer
+    vluint64_t		m_wroteBytes;	///< Number of bytes written to this file
+
+    vluint32_t*			m_sigs_oldvalp;	///< Pointer to old signal values
+    vector<VerilatedVcdSig>	m_sigs;		///< Pointer to signal information
+    vector<VerilatedVcdCallInfo*>	m_callbacks;	///< Routines to perform dumping
+    typedef map<string,string>	NameMap;
+    NameMap*			m_namemapp;	///< List of names for the header
+    static vector<VerilatedVcd*>	s_vcdVecp;	///< List of all created traces
+
+    inline size_t bufferSize() { return 256*1024; }  // See below for slack calculation
+    inline size_t bufferInsertSize() { return 16*1024; }
+    void bufferFlush();
+    void bufferCheck() {
+	// Flush the write buffer if there's not enough space left for new information
+	// We only call this once per vector, so we need enough slop for a very wide "b###" line
+	if (VL_UNLIKELY(m_writep > (m_wrBufp+(bufferSize()-bufferInsertSize())))) {
+	    bufferFlush();
+	}
+    }
+    void closePrev();
+    void closeErr();
+    void openNext();
+    void makeNameMap();
+    void printIndent (int levelchange);
+    void printStr (const char* str);
+    void printQuad (vluint64_t n);
+    void printTime (vluint64_t timeui);
+    void declare (vluint32_t code, const char* name, const char* wirep,
+		  int arraynum, bool tri, bool bussed, int msb, int lsb);
+
+    void dumpHeader();
+    void dumpPrep (vluint64_t timeui);
+    void dumpFull (vluint64_t timeui);
+    void dumpDone ();
+    inline void printCode (vluint32_t code) {
+	if (code>=(94*94*94)) *m_writep++ = ((char)((code/94/94/94)%94+33));
+	if (code>=(94*94))    *m_writep++ = ((char)((code/94/94)%94+33));
+	if (code>=(94))       *m_writep++ = ((char)((code/94)%94+33));
+	*m_writep++ = ((char)((code)%94+33));
+    }
+    string stringCode (vluint32_t code) {
+	string out;
+	if (code>=(94*94*94)) out += ((char)((code/94/94/94)%94+33));
+	if (code>=(94*94))    out += ((char)((code/94/94)%94+33));
+	if (code>=(94))       out += ((char)((code/94)%94+33));
+	return out + ((char)((code)%94+33));
+    }
+
+protected:
+    // METHODS
+    void evcd(bool flag) { m_evcd = flag; }
+
+public:
+    // CREATORS
+    VerilatedVcd () : m_isOpen(false), m_rolloverMB(0), m_modDepth(0), m_nextCode(1) {
+	m_wrBufp = new char [bufferSize()];
+	m_writep = m_wrBufp;
+	m_namemapp = NULL;
+	m_timeRes = m_timeUnit = 1e-9;
+	m_timeLastDump = 0;
+	m_sigs_oldvalp = NULL;
+	m_evcd = false;
+	m_scopeEscape = '.';  // Backward compatibility
+	m_wroteBytes = 0;
+    }
+    ~VerilatedVcd();
+
+    // ACCESSORS
+    /// Inside dumping routines, return next VCD signal code
+    vluint32_t nextCode() const {return m_nextCode;}
+    /// Set size in megabytes after which new file should be created
+    void rolloverMB(vluint64_t rolloverMB) { m_rolloverMB=rolloverMB; };
+    /// Is file open?
+    bool isOpen() const { return m_isOpen; }
+    /// Change character that splits scopes.  Note whitespace are ALWAYS escapes.
+    void scopeEscape(char flag) { m_scopeEscape = flag; }
+    /// Is this an escape?
+    inline bool isScopeEscape(char c) { return isspace(c) || c==m_scopeEscape; }
+
+    // METHODS
+    void open (const char* filename);	///< Open the file; call isOpen() to see if errors
+    void openNext (bool incFilename);	///< Open next data-only file
+    void flush() { bufferFlush(); }	///< Flush any remaining data
+    static void flush_all();		///< Flush any remaining data from all files
+    void close ();			///< Close the file
+
+    void set_time_unit (const char* unit); ///< Set time units (s/ms, defaults to ns)
+    void set_time_unit (const string& unit) { set_time_unit(unit.c_str()); }
+
+    void set_time_resolution (const char* unit); ///< Set time resolution (s/ms, defaults to ns)
+    void set_time_resolution (const string& unit) { set_time_resolution(unit.c_str()); }
+
+    double timescaleToDouble (const char* unitp);
+    string doubleToTimescale (double value);
+
+    /// Inside dumping routines, called each cycle to make the dump
+    void dump     (vluint64_t timeui);
+    /// Call dump with a absolute unscaled time in seconds
+    void dumpSeconds (double secs) { dump((vluint64_t)(secs * m_timeRes)); }
+
+    /// Inside dumping routines, declare callbacks for tracings
+    void addCallback (VerilatedVcdCallback_t init, VerilatedVcdCallback_t full,
+		      VerilatedVcdCallback_t change,
+		      void* userthis);
+
+    /// Inside dumping routines, declare a module
+    void module (const string name);
+    /// Inside dumping routines, declare a signal
+    void declBit      (vluint32_t code, const char* name, int arraynum);
+    void declBus      (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declQuad     (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declArray    (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declTriBit   (vluint32_t code, const char* name, int arraynum);
+    void declTriBus   (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declTriQuad  (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
+    void declDouble   (vluint32_t code, const char* name, int arraynum);
+    void declFloat    (vluint32_t code, const char* name, int arraynum);
+    //	... other module_start for submodules (based on cell name)
+
+    /// Inside dumping routines, dump one signal
+    void fullBit (vluint32_t code, const vluint32_t newval) {
+	// Note the &1, so we don't require clean input -- makes more common no change case faster
+	m_sigs_oldvalp[code] = newval;
+	*m_writep++=('0'+(char)(newval&1)); printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullBus (vluint32_t code, const vluint32_t newval, int bits) {
+	m_sigs_oldvalp[code] = newval;
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++=((newval&(1L<<bit))?'1':'0');
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullQuad (vluint32_t code, const vluint64_t newval, int bits) {
+	(*((vluint64_t*)&m_sigs_oldvalp[code])) = newval;
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++=((newval&(1ULL<<bit))?'1':'0');
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullArray (vluint32_t code, const vluint32_t* newval, int bits) {
+	for (int word=0; word<(((bits-1)/32)+1); ++word) {
+	    m_sigs_oldvalp[code+word] = newval[word];
+	}
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++=((newval[(bit/32)]&(1L<<(bit&0x1f)))?'1':'0');
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullTriBit (vluint32_t code, const vluint32_t newval, const vluint32_t newtri) {
+	m_sigs_oldvalp[code]   = newval;
+	m_sigs_oldvalp[code+1] = newtri;
+	*m_writep++ = "01zz"[m_sigs_oldvalp[code]
+			     | (m_sigs_oldvalp[code+1]<<1)];
+	printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullTriBus (vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits) {
+	m_sigs_oldvalp[code] = newval;
+	m_sigs_oldvalp[code+1] = newtri;
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++ = "01zz"[((newval >> bit)&1)
+				 | (((newtri >> bit)&1)<<1)];
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullTriQuad (vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits) {
+	(*((vluint64_t*)&m_sigs_oldvalp[code])) = newval;
+	(*((vluint64_t*)&m_sigs_oldvalp[code+1])) = newtri;
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++ = "01zz"[((newval >> bit)&1ULL)
+				 | (((newtri >> bit)&1ULL)<<1ULL)];
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullTriArray (vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits) {
+	for (int word=0; word<(((bits-1)/32)+1); ++word) {
+	    m_sigs_oldvalp[code+word*2]   = newvalp[word];
+	    m_sigs_oldvalp[code+word*2+1] = newtrip[word];
+	}
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    vluint32_t valbit = (newvalp[(bit/32)]>>(bit&0x1f)) & 1;
+	    vluint32_t tribit = (newtrip[(bit/32)]>>(bit&0x1f)) & 1;
+	    *m_writep++ = "01zz"[valbit | (tribit<<1)];
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    void fullDouble (vluint32_t code, const double newval);
+    void fullFloat (vluint32_t code, const float newval);
+
+    /// Inside dumping routines, dump one signal as unknowns
+    /// Presently this code doesn't change the oldval vector.
+    /// Thus this is for special standalone applications that after calling
+    /// fullBitX, must when then value goes non-X call fullBit.
+    inline void fullBitX (vluint32_t code) {
+	*m_writep++='x'; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    inline void fullBusX (vluint32_t code, int bits) {
+	*m_writep++='b';
+	for (int bit=bits-1; bit>=0; --bit) {
+	    *m_writep++='x';
+	}
+	*m_writep++=' '; printCode(code); *m_writep++='\n';
+	bufferCheck();
+    }
+    inline void fullQuadX (vluint32_t code, int bits) { fullBusX (code, bits); }
+    inline void fullArrayX (vluint32_t code, int bits) { fullBusX (code, bits); }
+
+    /// Inside dumping routines, dump one signal if it has changed
+    inline void chgBit (vluint32_t code, const vluint32_t newval) {
+	vluint32_t diff = m_sigs_oldvalp[code] ^ newval;
+	if (VL_UNLIKELY(diff)) {
+	    // Verilator 3.510 and newer provide clean input, so the below is only for back compatibility
+	    if (VL_UNLIKELY(diff & 1)) {   // Change after clean?
+		fullBit (code, newval);
+	    }
+	}
+    }
+    inline void chgBus (vluint32_t code, const vluint32_t newval, int bits) {
+	vluint32_t diff = m_sigs_oldvalp[code] ^ newval;
+	if (VL_UNLIKELY(diff)) {
+	    if (VL_UNLIKELY(bits==32 || (diff & ((1U<<bits)-1) ))) {
+		fullBus (code, newval, bits);
+	    }
+	}
+    }
+    inline void chgQuad (vluint32_t code, const vluint64_t newval, int bits) {
+	vluint64_t diff = (*((vluint64_t*)&m_sigs_oldvalp[code])) ^ newval;
+	if (VL_UNLIKELY(diff)) {
+	    if (VL_UNLIKELY(bits==64 || (diff & ((1ULL<<bits)-1) ))) {
+		fullQuad(code, newval, bits);
+	    }
+	}
+    }
+    inline void chgArray (vluint32_t code, const vluint32_t* newval, int bits) {
+	for (int word=0; word<(((bits-1)/32)+1); ++word) {
+	    if (VL_UNLIKELY(m_sigs_oldvalp[code+word] ^ newval[word])) {
+		fullArray (code,newval,bits);
+		return;
+	    }
+	}
+    }
+    inline void chgTriBit (vluint32_t code, const vluint32_t newval, const vluint32_t newtri) {
+	vluint32_t diff = ((m_sigs_oldvalp[code] ^ newval)
+			 | (m_sigs_oldvalp[code+1] ^ newtri));
+	if (VL_UNLIKELY(diff)) {
+	    // Verilator 3.510 and newer provide clean input, so the below is only for back compatibility
+	    if (VL_UNLIKELY(diff & 1)) {   // Change after clean?
+		fullTriBit (code, newval, newtri);
+	    }
+	}
+    }
+    inline void chgTriBus (vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits) {
+	vluint32_t diff = ((m_sigs_oldvalp[code] ^ newval)
+			 | (m_sigs_oldvalp[code+1] ^ newtri));
+	if (VL_UNLIKELY(diff)) {
+	    if (VL_UNLIKELY(bits==32 || (diff & ((1U<<bits)-1) ))) {
+		fullTriBus (code, newval, newtri, bits);
+	    }
+	}
+    }
+    inline void chgTriQuad (vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits) {
+	vluint64_t diff = ( ((*((vluint64_t*)&m_sigs_oldvalp[code])) ^ newval)
+			  | ((*((vluint64_t*)&m_sigs_oldvalp[code+1])) ^ newtri));
+	if (VL_UNLIKELY(diff)) {
+	    if (VL_UNLIKELY(bits==64 || (diff & ((1ULL<<bits)-1) ))) {
+		fullTriQuad(code, newval, newtri, bits);
+	    }
+	}
+    }
+    inline void chgTriArray (vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits) {
+	for (int word=0; word<(((bits-1)/32)+1); ++word) {
+	    if (VL_UNLIKELY((m_sigs_oldvalp[code+word*2] ^ newvalp[word])
+			    | (m_sigs_oldvalp[code+word*2+1] ^ newtrip[word]))) {
+		fullTriArray (code,newvalp,newtrip,bits);
+		return;
+	    }
+	}
+    }
+    inline void chgDouble (vluint32_t code, const double newval) {
+	if (VL_UNLIKELY((*((double*)&m_sigs_oldvalp[code])) != newval)) {
+	    fullDouble (code, newval);
+	}
+    }
+    inline void chgFloat (vluint32_t code, const float newval) {
+	if (VL_UNLIKELY((*((float*)&m_sigs_oldvalp[code])) != newval)) {
+	    fullFloat (code, newval);
+	}
+    }
+};
+
+//=============================================================================
+// VerilatedVcdC
+/// Create a VCD dump file in C standalone (no SystemC) simulations.
+
+class VerilatedVcdC {
+    VerilatedVcd		m_sptrace;	///< SystemPerl trace file being created
+public:
+    // CONSTRUCTORS
+    VerilatedVcdC() {}
+    ~VerilatedVcdC() {}
+    // ACCESSORS
+    /// Is file open?
+    bool isOpen() const { return m_sptrace.isOpen(); }
+    // METHODS
+    /// Open a new VCD file
+    void open (const char* filename) { m_sptrace.open(filename); }
+    /// Continue a VCD dump by rotating to a new file name
+    void openNext (bool incFilename=true) { m_sptrace.openNext(incFilename); }
+    /// Set size in megabytes after which new file should be created
+    void rolloverMB(size_t rolloverMB) { m_sptrace.rolloverMB(rolloverMB); };
+    /// Close dump
+    void close() { m_sptrace.close(); }
+    /// Flush dump
+    void flush() { m_sptrace.flush(); }
+    /// Write one cycle of dump data
+    void dump (vluint64_t timeui) { m_sptrace.dump(timeui); }
+    /// Write one cycle of dump data - backward compatible and to reduce
+    /// conversion warnings.  It's better to use a vluint64_t time instead.
+    void dump (double timestamp) { dump((vluint64_t)timestamp); }
+    void dump (vluint32_t timestamp) { dump((vluint64_t)timestamp); }
+    void dump (int timestamp) { dump((vluint64_t)timestamp); }
+    /// Internal class access
+    inline VerilatedVcd* spTrace () { return &m_sptrace; };
+};
+
+#endif // guard
@@ -0,0 +1,159 @@
+// -*- SystemC -*-
+//=============================================================================
+//
+// THIS MODULE IS PUBLICLY LICENSED
+//
+// Copyright 2001-2010 by Wilson Snyder.  This program is free software;
+// you can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
+//
+// This is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+//=============================================================================
+///
+/// \file
+/// \brief SystemPerl Tracing in VCD Format
+///
+/// AUTHOR:  Wilson Snyder
+///
+//=============================================================================
+// SPDIFF_OFF
+
+#include "verilatedos.h"
+#include "verilated_vcd_sc.h"
+
+// SPDIFF_ON
+//======================================================================
+//======================================================================
+
+//--------------------------------------------------
+#if (SYSTEMC_VERSION>=20050714)
+    // SystemC 2.1.v1
+void VerilatedVcdSc::write_comment (const std::string &) {}
+void VerilatedVcdSc::trace (const unsigned int &, const std::string &, const char **) {}
+
+# define DECL_TRACE_METHOD_A(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const std::string& name ) {}
+# define DECL_TRACE_METHOD_B(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const std::string& name, int width ) {}
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_A( sc_dt::sc_bit )
+    DECL_TRACE_METHOD_A( sc_dt::sc_logic )
+
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( unsigned short )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( unsigned long )
+#ifdef SYSTEMC_64BIT_PATCHES
+    DECL_TRACE_METHOD_B( unsigned long long)
+#endif
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long )
+    DECL_TRACE_METHOD_B( sc_dt::int64 )
+    DECL_TRACE_METHOD_B( sc_dt::uint64 )
+
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_dt::sc_int_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_signed )
+    DECL_TRACE_METHOD_A( sc_dt::sc_unsigned )
+
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxval )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxval_fast )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxnum )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxnum_fast )
+
+    DECL_TRACE_METHOD_A( sc_dt::sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_lv_base )
+
+//--------------------------------------------------
+#elif (SYSTEMC_VERSION>20011000)
+    // SystemC 2.0.1
+void VerilatedVcdSc::write_comment (const sc_string &) {}
+void VerilatedVcdSc::trace (const unsigned int &, const sc_string &, const char **) {}
+
+#define DECL_TRACE_METHOD_A(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const sc_string& name ) {}
+#define DECL_TRACE_METHOD_B(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const sc_string& name, int width ) {}
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_A( sc_bit )
+    DECL_TRACE_METHOD_A( sc_logic )
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( unsigned short )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( unsigned long )
+#ifdef SYSTEMC_64BIT_PATCHES
+    DECL_TRACE_METHOD_B( unsigned long long)
+#endif
+#if (SYSTEMC_VERSION>20041000)
+    DECL_TRACE_METHOD_B( unsigned long long)
+    DECL_TRACE_METHOD_B( long long)
+#endif
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long )
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_int_base )
+    DECL_TRACE_METHOD_A( sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_signed )
+    DECL_TRACE_METHOD_A( sc_unsigned )
+    DECL_TRACE_METHOD_A( sc_fxval )
+    DECL_TRACE_METHOD_A( sc_fxval_fast )
+    DECL_TRACE_METHOD_A( sc_fxnum )
+    DECL_TRACE_METHOD_A( sc_fxnum_fast )
+    DECL_TRACE_METHOD_A( sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_lv_base )
+
+//--------------------------------------------------
+#else
+    // SystemC 1.2.1beta
+void VerilatedVcdSc::write_comment (const sc_string &) {}
+void VerilatedVcdSc::trace (const unsigned int &, const sc_string &, const char **) {}
+
+#define DECL_TRACE_METHOD_A(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const sc_string& name ) {}
+#define DECL_TRACE_METHOD_B(tp) \
+    void VerilatedVcdSc::trace( const tp& object, const sc_string& name, int width ) {}
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( short unsigned int )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( long unsigned int )
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short int )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long int )
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_bit )
+    DECL_TRACE_METHOD_A( sc_logic )
+    DECL_TRACE_METHOD_A( sc_bool_vector )
+    DECL_TRACE_METHOD_A( sc_logic_vector )
+    DECL_TRACE_METHOD_A( sc_signal_bool_vector )
+    DECL_TRACE_METHOD_A( sc_signal_logic_vector )
+    DECL_TRACE_METHOD_A( sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_int_base )
+    DECL_TRACE_METHOD_A( sc_unsigned )
+    DECL_TRACE_METHOD_A( sc_signed )
+    DECL_TRACE_METHOD_A( sc_signal_resolved )
+    DECL_TRACE_METHOD_A( sc_signal_resolved_vector )
+    DECL_TRACE_METHOD_A( sc_bv_ns::sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_bv_ns::sc_lv_base )
+#endif
+
+#undef DECL_TRACE_METHOD_A
+#undef DECL_TRACE_METHOD_B
+
+//********************************************************************
@@ -0,0 +1,213 @@
+// -*- SystemC -*-
+//=============================================================================
+//
+// THIS MODULE IS PUBLICLY LICENSED
+//
+// Copyright 2001-2010 by Wilson Snyder.  This program is free software;
+// you can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
+//
+// This is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+//=============================================================================
+///
+/// \file
+/// \brief SystemPerl tracing in VCD format
+///
+/// AUTHOR:  Wilson Snyder
+///
+//=============================================================================
+// SPDIFF_OFF
+
+#ifndef _VERILATED_VCD_SC_H_
+#define _VERILATED_VCD_SC_H_ 1
+
+#include "verilated_sc.h"
+#include "verilated_vcd_c.h"
+
+// SPDIFF_ON
+//=============================================================================
+// VerilatedVcdSc
+///
+/// This class is passed to the SystemC simulation kernel, just like a
+/// documented SystemC trace format.
+
+class VerilatedVcdSc
+    : sc_trace_file
+    , public VerilatedVcdC
+{
+public:
+    VerilatedVcdSc() {
+	sc_get_curr_simcontext()->add_trace_file(this);
+# if (SYSTEMC_VERSION>=20060505)
+	// We want to avoid a depreciated warning, but still be back compatible.
+	// Turning off the message just for this still results in an annoying "to turn off" message.
+	sc_time t1sec(1,SC_SEC);
+	if (t1sec.to_default_time_units()!=0) {
+	    sc_time tunits(1.0/t1sec.to_default_time_units(),SC_SEC);
+	    spTrace()->set_time_unit(tunits.to_string());
+	}
+	spTrace()->set_time_resolution(sc_get_time_resolution().to_string());
+# elif (SYSTEMC_VERSION>20011000)
+	// To confuse matters 2.1.beta returns a char* here, while 2.1.v1 returns a std::string
+	// we allow both flavors with overloaded set_time_* functions.
+	spTrace()->set_time_unit(sc_get_default_time_unit().to_string());
+	spTrace()->set_time_resolution(sc_get_time_resolution().to_string());
+# endif
+    }
+
+    virtual ~VerilatedVcdSc() {}
+    /// Called by SystemC simulate()
+    virtual void cycle (bool delta_cycle) {
+# if (SYSTEMC_VERSION>20011000)
+	if (!delta_cycle) { this->dump(sc_time_stamp().to_double()); }
+# else
+	// VCD files must have integer timestamps, so we write all times in increments of time_resolution
+	if (!delta_cycle) { this->dump(sc_time_stamp().to_double()); }
+# endif
+    }
+
+private:
+    /// Fake outs for linker
+
+#ifdef NC_SYSTEMC
+    // Cadence Incisive has these as abstract functions so we must create them
+    virtual void set_time_unit( int exponent10_seconds ) {} // deprecated
+    virtual void set_time_unit( double v, sc_time_unit tu ) {}
+#endif
+
+
+//--------------------------------------------------
+# if (SYSTEMC_VERSION>=20050714)
+    // SystemC 2.1.v1
+# define DECL_TRACE_METHOD_A(tp) \
+    virtual void trace( const tp& object, const std::string& name );
+# define DECL_TRACE_METHOD_B(tp) \
+    virtual void trace( const tp& object, const std::string& name, int width );
+
+    virtual void write_comment (const std::string &);
+    virtual void trace (const unsigned int &, const std::string &, const char **);
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_A( sc_dt::sc_bit )
+    DECL_TRACE_METHOD_A( sc_dt::sc_logic )
+
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( unsigned short )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( unsigned long )
+#ifdef SYSTEMC_64BIT_PATCHES
+    DECL_TRACE_METHOD_B( unsigned long long)
+#endif
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long )
+    DECL_TRACE_METHOD_B( sc_dt::int64 )
+    DECL_TRACE_METHOD_B( sc_dt::uint64 )
+
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_dt::sc_int_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_signed )
+    DECL_TRACE_METHOD_A( sc_dt::sc_unsigned )
+
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxval )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxval_fast )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxnum )
+    DECL_TRACE_METHOD_A( sc_dt::sc_fxnum_fast )
+
+    DECL_TRACE_METHOD_A( sc_dt::sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_dt::sc_lv_base )
+
+//--------------------------------------------------
+# elif (SYSTEMC_VERSION>20011000)
+    // SystemC 2.0.1
+# define DECL_TRACE_METHOD_A(tp) \
+    virtual void trace( const tp& object, const sc_string& name );
+# define DECL_TRACE_METHOD_B(tp) \
+    virtual void trace( const tp& object, const sc_string& name, int width );
+
+    virtual void write_comment (const sc_string &);
+    virtual void trace (const unsigned int &, const sc_string &, const char **);
+    virtual void delta_cycles (bool) {}
+    virtual void space( int n ) {}
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_A( sc_bit )
+    DECL_TRACE_METHOD_A( sc_logic )
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( unsigned short )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( unsigned long )
+#ifdef SYSTEMC_64BIT_PATCHES
+    DECL_TRACE_METHOD_B( unsigned long long)
+#endif
+#if (SYSTEMC_VERSION>20041000)
+    DECL_TRACE_METHOD_B( unsigned long long)
+    DECL_TRACE_METHOD_B( long long)
+#endif
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long )
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_int_base )
+    DECL_TRACE_METHOD_A( sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_signed )
+    DECL_TRACE_METHOD_A( sc_unsigned )
+    DECL_TRACE_METHOD_A( sc_fxval )
+    DECL_TRACE_METHOD_A( sc_fxval_fast )
+    DECL_TRACE_METHOD_A( sc_fxnum )
+    DECL_TRACE_METHOD_A( sc_fxnum_fast )
+    DECL_TRACE_METHOD_A( sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_lv_base )
+
+//--------------------------------------------------
+# else
+    // SystemC 1.2.1beta
+# define DECL_TRACE_METHOD_A(tp) \
+    virtual void trace( const tp& object, const sc_string& name );
+# define DECL_TRACE_METHOD_B(tp) \
+    virtual void trace( const tp& object, const sc_string& name, int width );
+
+    virtual void write_comment (const sc_string &);
+    virtual void trace (const unsigned int &, const sc_string &, const char **);
+
+    DECL_TRACE_METHOD_A( bool )
+    DECL_TRACE_METHOD_B( unsigned char )
+    DECL_TRACE_METHOD_B( short unsigned int )
+    DECL_TRACE_METHOD_B( unsigned int )
+    DECL_TRACE_METHOD_B( long unsigned int )
+    DECL_TRACE_METHOD_B( char )
+    DECL_TRACE_METHOD_B( short int )
+    DECL_TRACE_METHOD_B( int )
+    DECL_TRACE_METHOD_B( long int )
+    DECL_TRACE_METHOD_A( float )
+    DECL_TRACE_METHOD_A( double )
+    DECL_TRACE_METHOD_A( sc_bit )
+    DECL_TRACE_METHOD_A( sc_logic )
+    DECL_TRACE_METHOD_A( sc_bool_vector )
+    DECL_TRACE_METHOD_A( sc_logic_vector )
+    DECL_TRACE_METHOD_A( sc_signal_bool_vector )
+    DECL_TRACE_METHOD_A( sc_signal_logic_vector )
+    DECL_TRACE_METHOD_A( sc_uint_base )
+    DECL_TRACE_METHOD_A( sc_int_base )
+    DECL_TRACE_METHOD_A( sc_unsigned )
+    DECL_TRACE_METHOD_A( sc_signed )
+    DECL_TRACE_METHOD_A( sc_signal_resolved )
+    DECL_TRACE_METHOD_A( sc_signal_resolved_vector )
+    DECL_TRACE_METHOD_A( sc_bv_ns::sc_bv_base )
+    DECL_TRACE_METHOD_A( sc_bv_ns::sc_lv_base )
+# endif
+
+# undef DECL_TRACE_METHOD_A
+# undef DECL_TRACE_METHOD_B
+};
+
+#endif // guard
@@ -1,15 +1,16 @@
-// $Id$ -*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License.
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 // GNU General Public License for more details.
-// 
+//
 //*************************************************************************
 ///
 /// \file
@@ -21,7 +22,7 @@
 ///	config_build.h.in, code needed by Verilated code only goes into
 ///	verilated.h, and code needed by both goes here (verilatedos.h).
 ///
-/// Code available from: http://www.veripool.com/verilator
+/// Code available from: http://www.veripool.org/verilator
 ///
 //*************************************************************************

@@ -33,19 +34,38 @@
 // Compiler pragma abstraction

 #ifdef __GNUC__
-# define VL_ATTR_PRINTF(fmtArgNum) __attribute__ ((format (printf, fmtArgNum, fmtArgNum+1)))
 # define VL_ATTR_ALIGNED(alignment) __attribute__ ((aligned (alignment)))
+# define VL_ATTR_ALWINLINE __attribute__ ((always_inline))
 # define VL_ATTR_NORETURN __attribute__ ((noreturn))
+# ifdef _WIN32
+#  define VL_ATTR_PRINTF(fmtArgNum)  // GCC with MS runtime will fool the print arg checker
+# else
+#  define VL_ATTR_PRINTF(fmtArgNum) __attribute__ ((format (printf, fmtArgNum, fmtArgNum+1)))
+# endif
 # define VL_ATTR_UNUSED __attribute__ ((unused))
+# define VL_FUNC  __func__
 # define VL_LIKELY(x)	__builtin_expect(!!(x), 1)
 # define VL_UNLIKELY(x)	__builtin_expect(!!(x), 0)
 # define VL_PREFETCH_RD(p) __builtin_prefetch((p),0)
 # define VL_PREFETCH_RW(p) __builtin_prefetch((p),1)
+#elif defined(_MSC_VER)
+# define VL_ATTR_ALIGNED(alignment)
+# define VL_ATTR_ALWINLINE
+# define VL_ATTR_NORETURN
+# define VL_ATTR_PRINTF(fmtArgNum)
+# define VL_ATTR_UNUSED
+# define VL_FUNC  __FUNCTION__
+# define VL_LIKELY(x)	(!!(x))
+# define VL_UNLIKELY(x)	(!!(x))
+# define VL_PREFETCH_RD(p)
+# define VL_PREFETCH_RW(p)
 #else
-# define VL_ATTR_PRINTF(fmtArgNum)	///< Function with printf format checking
 # define VL_ATTR_ALIGNED(alignment)	///< Align structure to specified byte alignment
+# define VL_ATTR_ALWINLINE		///< Inline, even when not optimizing
 # define VL_ATTR_NORETURN		///< Function does not ever return
+# define VL_ATTR_PRINTF(fmtArgNum)	///< Function with printf format checking
 # define VL_ATTR_UNUSED			///< Function that may be never used
+# define VL_FUNC "__func__"		///< Name of current function for error macros
 # define VL_LIKELY(x)	(!!(x))		///< Boolean expression more often true than false
 # define VL_UNLIKELY(x)	(!!(x))		///< Boolean expression more often false than true
 # define VL_PREFETCH_RD(p)		///< Prefetch data with read intent
@@ -71,49 +91,111 @@
 // This is not necessarily the same as #UL, depending on what the IData typedef is.
 #define VL_UL(c) ((IData)(c##UL))	///< Add appropriate suffix to 32-bit constant

+//=========================================================================
+// Warning disabled
+
+#ifndef VL_WARNINGS
+# ifdef _MSC_VER
+#  pragma warning(disable:4099)	// C4099: type name first seen using 'class' now seen using 'struct' (V3AstNode)
+#  pragma warning(disable:4100)	// C4100: unreferenced formal parameter (L4)
+#  pragma warning(disable:4127)	// C4127: conditional expression is constant (L4)
+#  pragma warning(disable:4146)	// C4146: unary minus operator applied to unsigned type, result still unsigned
+#  pragma warning(disable:4189)	// C4189: local variable is initialized but not referenced (L4)
+#  pragma warning(disable:4244)	// C4244: conversion from 'uint64_t' to 'uint_32_t', possible loss of data
+#  pragma warning(disable:4245)	// C4245: conversion from 'int' to 'unsigned', signed/unsigned mismatch
+#  pragma warning(disable:4996)	// C4996: sscanf/fopen/etc may be unsafe
+# endif
+#endif
+
 //=========================================================================
 // Basic integer types

 #ifdef VL_UINTS_DEFINED
 #elif defined(__CYGWIN__)
+
 # include <stdint.h>
 typedef unsigned char           uint8_t;	///< 8-bit unsigned type (backward compatibility)
 typedef unsigned short int      uint16_t;	///< 16-bit unsigned type (backward compatibility)
-typedef unsigned long           uint32_t;	///< 32-bit unsigned type (backward compatibility)
 typedef unsigned char           vluint8_t;	///< 8-bit unsigned type
 typedef unsigned short int      vluint16_t;	///< 16-bit unsigned type
-typedef long  			vlsint32_t;	///< 32-bit signed type
-typedef unsigned long           vluint32_t;	///< 32-bit unsigned type
-typedef long long      		vlsint64_t;	///< 64-bit signed type
-typedef unsigned long long      vluint64_t;	///< 64-bit unsigned type
-#elif defined(_WIN32) && !defined(__MINGW32__)
-typedef unsigned char           uint8_t;	///< 8-bit unsigned type (backward compatibility)
-typedef unsigned short int      uint16_t;	///< 16-bit unsigned type (backward compatibility)
-typedef unsigned long           uint32_t;	///< 32-bit unsigned type (backward compatibility)
-typedef unsigned char           vluint8_t;	///< 8-bit unsigned type
-typedef unsigned short int      vluint16_t;	///< 16-bit unsigned type
-typedef int  			vlsint32_t;	///< 32-bit signed type
-typedef unsigned int            vluint32_t;	///< 32-bit unsigned type
-typedef __int64      		vlsint64_t;	///< 64-bit signed type
-typedef unsigned __int64        vluint64_t;	///< 64-bit unsigned type
+# ifdef __uint32_t_defined      		// Newer Cygwin uint32_t in stdint.h as an unsigned int
+typedef int32_t			vlsint32_t;	///< 32-bit signed type
+typedef uint32_t		vluint32_t;	///< 32-bit unsigned type
+# else				 		// Older Cygwin has long==uint32_t
+typedef unsigned long		uint32_t;	///< 32-bit unsigned type (backward compatibility)
+typedef long			vlsint32_t;	///< 32-bit signed type
+typedef unsigned long		vluint32_t;	///< 32-bit unsigned type
+# endif
+# if defined(__WORDSIZE) && (__WORDSIZE == 64)
+typedef long			vlsint64_t;	///< 64-bit signed type
+typedef unsigned long		vluint64_t;	///< 64-bit unsigned type
+# else
+typedef long long		vlsint64_t;	///< 64-bit signed type
+typedef unsigned long long	vluint64_t;	///< 64-bit unsigned type
+# endif
+
+#elif defined(_WIN32) && defined(_MSC_VER)
+
+typedef unsigned __int8		uint8_t;	///< 8-bit unsigned type (backward compatibility)
+typedef unsigned __int16	uint16_t;	///< 16-bit unsigned type (backward compatibility)
+typedef unsigned __int32	uint32_t;	///< 32-bit unsigned type (backward compatibility)
+typedef unsigned __int8		vluint8_t;	///< 8-bit unsigned type
+typedef unsigned __int16	vluint16_t;	///< 16-bit unsigned type
+typedef signed   __int32	vlsint32_t;	///< 32-bit signed type
+typedef unsigned __int32	vluint32_t;	///< 32-bit unsigned type
+typedef signed   __int64	vlsint64_t;	///< 64-bit signed type
+typedef unsigned __int64	vluint64_t;	///< 64-bit unsigned type
+
+# ifndef _SSIZE_T_DEFINED
+#  ifdef  _WIN64
+typedef signed   __int64        ssize_t;        ///< signed size_t; returned from read()
+#  else
+typedef signed   __int32        ssize_t;        ///< signed size_t; returned from read()
+#  endif
+# endif
+
 #else // Linux or compliant Unix flavors, -m64
+
 # include <stdint.h>	// Linux and most flavors
 # include <inttypes.h>	// Solaris
 typedef uint8_t			vluint8_t;	///< 32-bit unsigned type
 typedef uint16_t		vluint16_t;	///< 32-bit unsigned type
-typedef int  			vlsint32_t;	///< 32-bit signed type
+typedef int			vlsint32_t;	///< 32-bit signed type
 typedef uint32_t		vluint32_t;	///< 32-bit signed type
-typedef long long      		vlsint64_t;	///< 64-bit signed type
+# if defined(__WORDSIZE) && (__WORDSIZE == 64)
+typedef long			vlsint64_t;	///< 64-bit signed type
+typedef unsigned long		vluint64_t;	///< 64-bit unsigned type
+# else
+typedef long long		vlsint64_t;	///< 64-bit signed type
 typedef unsigned long long	vluint64_t;	///< 64-bit unsigned type
+# endif
+#endif
+
+//=========================================================================
+// Printing printf/scanf formats
+// Alas cinttypes isn't that standard yet
+
+#ifdef _WIN32
+# define VL_PRI64 "I64"
+#else // Linux or compliant Unix flavors
+# if defined(__WORDSIZE) && (__WORDSIZE == 64)
+#  define VL_PRI64 "l"
+# else
+#  define VL_PRI64 "ll"
+# endif
 #endif

 //=========================================================================
 // Integer size macros

+#define VL_BYTESIZE 8			///< Bits in a byte
+#define VL_SHORTSIZE 16			///< Bits in a short
 #define VL_WORDSIZE 32			///< Bits in a word
 #define VL_QUADSIZE 64			///< Bits in a quadword
 #define VL_WORDSIZE_LOG2 5		///< log2(VL_WORDSIZE)

+/// Bytes this number of bits needs (1 bit=1 byte)
+#define VL_BYTES_I(nbits) (((nbits)+(VL_BYTESIZE-1))/VL_BYTESIZE)
 /// Words this number of bits needs (1 bit=1 word)
 #define VL_WORDS_I(nbits) (((nbits)+(VL_WORDSIZE-1))/VL_WORDSIZE)

@@ -0,0 +1,489 @@
+/* -*- C -*-
+ *
+ * svdpi.h
+ *
+ * SystemVerilog Direct Programming Interface (DPI).
+ *
+ * This file contains the constant definitions, structure definitions,
+ * and routine declarations used by SystemVerilog DPI.
+ *
+ * This file is from the SystemVerilog IEEE 1800-2009 Annex I.
+ */
+
+#ifndef INCLUDED_SVDPI
+#define INCLUDED_SVDPI
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Define size-critical types on all OS platforms. */
+#if defined (_MSC_VER)
+typedef unsigned __int64 uint64_t;
+typedef unsigned __int32 uint32_t;
+typedef unsigned __int8 uint8_t;
+typedef signed __int64 int64_t;
+typedef signed __int32 int32_t;
+typedef signed __int8 int8_t;
+#elif defined(__MINGW32__)
+#include <stdint.h>
+#elif defined(__linux)
+#include <inttypes.h>
+#else
+#include <sys/types.h>
+#endif
+
+/* Use to export a symbol from application */
+#if defined (_MSC_VER)
+#define DPI_DLLISPEC __declspec(dllimport)
+#else
+#define DPI_DLLISPEC
+#endif
+
+/* Use to import a symbol into application */
+#if defined (_MSC_VER)
+#define DPI_DLLESPEC __declspec(dllexport)
+#else
+#define DPI_DLLESPEC
+#endif
+
+/* Use to mark a function as external */
+#ifndef DPI_EXTERN
+#define DPI_EXTERN
+#endif
+
+#ifndef DPI_PROTOTYPES
+#define DPI_PROTOTYPES
+/* object is defined imported by the application */
+#define XXTERN DPI_EXTERN DPI_DLLISPEC
+/* object is exported by the application */
+#define EETERN DPI_EXTERN DPI_DLLESPEC
+#endif
+
+/* canonical    representation */
+#define sv_0    0
+#define sv_1    1
+#define sv_z    2
+#define sv_x    3
+
+/* common type for 'bit' and 'logic' scalars. */
+typedef uint8_t svScalar;
+typedef svScalar svBit; /* scalar */
+typedef svScalar svLogic; /* scalar */
+
+/*
+ * DPI representation of packed arrays.
+ * 2-state and 4-state vectors, exactly the same as PLI's avalue/bvalue.
+ */
+#ifndef VPI_VECVAL
+#define VPI_VECVAL
+typedef struct t_vpi_vecval {
+    uint32_t aval;
+    uint32_t bval;
+} s_vpi_vecval, *p_vpi_vecval;
+#endif
+
+/* (a chunk of) packed logic array */
+typedef s_vpi_vecval svLogicVecVal;
+
+/* (a chunk of) packed bit array */
+typedef uint32_t svBitVecVal;
+
+/* Number of chunks required to represent the given width packed array */
+#define SV_PACKED_DATA_NELEMS(WIDTH) (((WIDTH) + 31) >> 5)
+
+/*
+ * Because the contents of the unused bits is undetermined,
+ * the following macros can be handy.
+ */
+#define SV_MASK(N) (~(-1 << (N)))
+
+#define SV_GET_UNSIGNED_BITS(VALUE, N) \
+    ((N) == 32 ? (VALUE) : ((VALUE) & SV_MASK(N)))
+
+#define SV_GET_SIGNED_BITS(VALUE, N) \
+    ((N) == 32 ? (VALUE) : \
+    (((VALUE) & (1 << (N))) ? ((VALUE) | ~SV_MASK(N)) : ((VALUE) & SV_MASK(N))))
+
+/*
+ * Implementation-dependent representation.
+ */
+/*
+ * Return implementation version information string ("1800-2005" or "SV3.1a").
+ */
+XXTERN const char* svDpiVersion();
+
+/* a handle to a scope (an instance of a module or interface) */
+XXTERN typedef void* svScope;
+
+/* a handle to a generic object (actually, unsized array) */
+XXTERN typedef void* svOpenArrayHandle;
+
+/*
+ * Bit-select utility functions.
+ *
+ * Packed arrays are assumed to be indexed n-1:0,
+ * where 0 is the index of LSB
+ */
+
+/* s=source, i=bit-index */
+XXTERN svBit svGetBitselBit(const svBitVecVal* s, int i);
+XXTERN svLogic svGetBitselLogic(const svLogicVecVal* s, int i);
+
+/* d=destination, i=bit-index, s=scalar */
+XXTERN void svPutBitselBit(svBitVecVal* d, int i, svBit s);
+XXTERN void svPutBitselLogic(svLogicVecVal* d, int i, svLogic s);
+
+/*
+ * Part-select utility functions.
+ *
+ * A narrow (<=32 bits) part-select is extracted from the
+ * source representation and written into the destination word.
+ *
+ * Normalized ranges and indexing [n-1:0] are used for both arrays.
+ *
+ * s=source, d=destination, i=starting bit index, w=width
+ * like for variable part-selects; limitations: w <= 32
+ */
+XXTERN void svGetPartselBit(svBitVecVal* d, const svBitVecVal* s, int i, int w);
+XXTERN void svGetPartselLogic(svLogicVecVal* d, const svLogicVecVal* s, int i, int w);
+
+XXTERN void svPutPartselBit(svBitVecVal* d, const svBitVecVal s, int i, int w);
+XXTERN void svPutPartselLogic(svLogicVecVal* d, const svLogicVecVal s, int i, int w);
+
+/*
+ * Open array querying functions
+ * These functions are modeled upon the SystemVerilog array
+ * querying functions and use the same semantics.
+ *
+ * If the dimension is 0, then the query refers to the
+ * packed part of an array (which is one-dimensional).
+ * Dimensions > 0 refer to the unpacked part of an array.
+ */
+/* h= handle to open array, d=dimension */
+XXTERN int svLeft(const svOpenArrayHandle h, int d);
+XXTERN int svRight(const svOpenArrayHandle h, int d);
+XXTERN int svLow(const svOpenArrayHandle h, int d);
+XXTERN int svHigh(const svOpenArrayHandle h, int d);
+XXTERN int svIncrement(const svOpenArrayHandle h, int d);
+XXTERN int svSize(const svOpenArrayHandle h, int d);
+XXTERN int svDimensions(const svOpenArrayHandle h);
+
+/*
+ * Pointer to the actual representation of the whole array of any type
+ * NULL if not in C layout
+ */
+XXTERN void *svGetArrayPtr(const svOpenArrayHandle);
+
+/* total size in bytes or 0 if not in C layout */
+XXTERN int svSizeOfArray(const svOpenArrayHandle);
+
+/*
+ * Return a pointer to an element of the array
+ * or NULL if index outside the range or null pointer
+ */
+XXTERN void *svGetArrElemPtr(const svOpenArrayHandle, int indx1, ...);
+
+/* specialized versions for 1-, 2- and 3-dimensional arrays: */
+XXTERN void *svGetArrElemPtr1(const svOpenArrayHandle, int indx1);
+XXTERN void *svGetArrElemPtr2(const svOpenArrayHandle, int indx1, int indx2);
+XXTERN void *svGetArrElemPtr3(const svOpenArrayHandle, int indx1, int indx2,
+        int indx3);
+
+/*
+ * Functions for copying between simulator storage and user space.
+ * These functions copy the whole packed array in either direction.
+ * The user is responsible for allocating an array to hold the
+ * canonical representation.
+ */
+
+/* s=source, d=destination */
+/* From user space into simulator storage */
+XXTERN void svPutBitArrElemVecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+        int indx1, ...);
+XXTERN void svPutBitArrElem1VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+        int indx1);
+XXTERN void svPutBitArrElem2VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+        int indx1, int indx2);
+XXTERN void svPutBitArrElem3VecVal(const svOpenArrayHandle d, const svBitVecVal* s,
+        int indx1, int indx2, int indx3);
+
+XXTERN void svPutLogicArrElemVecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+        int indx1, ...);
+XXTERN void svPutLogicArrElem1VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+        int indx1);
+XXTERN void svPutLogicArrElem2VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+        int indx1, int indx2);
+XXTERN void svPutLogicArrElem3VecVal(const svOpenArrayHandle d, const svLogicVecVal* s,
+        int indx1, int indx2, int indx3);
+
+/* From simulator storage into user space */
+XXTERN void svGetBitArrElemVecVal(svBitVecVal* d, const svOpenArrayHandle s,
+        int indx1, ...);
+XXTERN void svGetBitArrElem1VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+        int indx1);
+XXTERN void svGetBitArrElem2VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+        int indx1, int indx2);
+XXTERN void svGetBitArrElem3VecVal(svBitVecVal* d, const svOpenArrayHandle s,
+        int indx1, int indx2, int indx3);
+XXTERN void svGetLogicArrElemVecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+        int indx1, ...);
+XXTERN void svGetLogicArrElem1VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+        int indx1);
+XXTERN void svGetLogicArrElem2VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+        int indx1, int indx2);
+XXTERN void svGetLogicArrElem3VecVal(svLogicVecVal* d, const svOpenArrayHandle s,
+        int indx1, int indx2, int indx3);
+
+XXTERN   svBit svGetBitArrElem(const svOpenArrayHandle s, int indx1, ...);
+XXTERN   svBit svGetBitArrElem1(const svOpenArrayHandle s, int indx1);
+XXTERN   svBit svGetBitArrElem2(const svOpenArrayHandle s, int indx1, int indx2);
+XXTERN   svBit svGetBitArrElem3(const svOpenArrayHandle s, int indx1, int indx2,
+          int indx3);
+XXTERN   svLogic svGetLogicArrElem(const svOpenArrayHandle s, int indx1, ...);
+XXTERN   svLogic svGetLogicArrElem1(const svOpenArrayHandle s, int indx1);
+XXTERN   svLogic svGetLogicArrElem2(const svOpenArrayHandle s, int indx1, int indx2);
+XXTERN   svLogic svGetLogicArrElem3(const svOpenArrayHandle s, int indx1, int indx2,
+          int indx3);
+XXTERN   void svPutLogicArrElem(const svOpenArrayHandle d, svLogic value, int indx1,
+          ...);
+XXTERN   void svPutLogicArrElem1(const svOpenArrayHandle d, svLogic value, int indx1);
+XXTERN   void svPutLogicArrElem2(const svOpenArrayHandle d, svLogic value, int indx1,
+          int indx2);
+XXTERN   void svPutLogicArrElem3(const svOpenArrayHandle d, svLogic value, int indx1,
+          int indx2, int indx3);
+XXTERN   void svPutBitArrElem(const svOpenArrayHandle d, svBit value, int indx1, ...);
+XXTERN   void svPutBitArrElem1(const svOpenArrayHandle d, svBit value, int indx1);
+XXTERN   void svPutBitArrElem2(const svOpenArrayHandle d, svBit value, int indx1,
+          int indx2);
+XXTERN   void svPutBitArrElem3(const svOpenArrayHandle d, svBit value, int indx1,
+          int indx2, int indx3);
+
+/* Functions for working with DPI context */
+
+/*
+ * Retrieve the active instance scope currently associated with the executing
+ * imported function. Unless a prior call to svSetScope has occurred, this
+ * is the scope of the function's declaration site, not call site.
+ * Returns NULL if called from C code that is *not* an imported function.
+ */
+XXTERN svScope svGetScope();
+
+/*
+ * Set context for subsequent export function execution.
+ * This function must be called before calling an export function, unless
+ * the export function is called while executing an import function. In that
+ * case the export function shall inherit the scope of the surrounding import
+ * function. This is known as the "default scope".
+ * The return is the previous active scope (per svGetScope)
+ */
+XXTERN svScope svSetScope(const svScope scope);
+
+/* Gets the fully qualified name of a scope handle */
+XXTERN const char* svGetNameFromScope(const svScope);
+
+/*
+ * Retrieve svScope to instance scope of an arbitrary function declaration.
+ * (can be either module, program, interface, or generate scope)
+ * The return value shall be NULL for unrecognized scope names.
+ */
+XXTERN svScope svGetScopeFromName(const char* scopeName);
+
+/*
+ * Store an arbitrary user data pointer for later retrieval by svGetUserData()
+ * The userKey is generated by the user. It must be guaranteed by the user to
+ * be unique from all other userKey's for all unique data storage requirements
+ * It is recommended that the address of static functions or variables in the
+ * user's C code be used as the userKey.
+ * It is illegal to pass in NULL values for either the scope or userData
+ * arguments. It is also an error to call svPutUserData() with an invalid
+ * svScope. This function returns -1 for all error cases, 0 upon success. It is
+ * suggested that userData values of 0 (NULL) not be used as otherwise it can
+ * be impossible to discern error status returns when calling svGetUserData()
+ */
+XXTERN int svPutUserData(const svScope scope, void *userKey, void* userData);
+
+/*
+ * Retrieve an arbitrary user data pointer that was previously
+ * stored by a call to svPutUserData(). See the comment above
+ * svPutUserData() for an explanation of userKey, as well as
+ * restrictions on NULL and illegal svScope and userKey values.
+ * This function returns NULL for all error cases, 0 upon success.
+ * This function also returns NULL in the event that a prior call
+ * to svPutUserData() was never made.
+ */
+XXTERN void* svGetUserData(const svScope scope, void* userKey);
+
+/*
+ * Returns the file and line number in the SV code from which the import call
+ * was made. If this information available, returns TRUE and updates fileName
+ * and lineNumber to the appropriate values. Behavior is unpredictable if
+ * fileName or lineNumber are not appropriate pointers. If this information is
+ * not available return FALSE and contents of fileName and lineNumber not
+ * modified. Whether this information is available or not is implementation-
+ * specific. Note that the string provided (if any) is owned by the SV
+ * implementation and is valid only until the next call to any SV function.
+ * Applications must not modify this string or free it
+ */
+XXTERN int svGetCallerInfo(const char** fileName, int *lineNumber);
+
+/*
+ * Returns 1 if the current execution thread is in the disabled state.
+ * Disable protocol must be adhered to if in the disabled state.
+ */
+XXTERN int svIsDisabledState();
+
+/*
+ * Imported functions call this API function during disable processing to
+ * acknowledge that they are correctly participating in the DPI disable protocol.
+ * This function must be called before returning from an imported function that is
+ * in the disabled state.
+ */
+XXTERN void svAckDisabledState();
+
+/*
+ **********************************************************
+ * DEPRECATED PORTION OF FILE STARTS FROM HERE.
+ * IEEE-1800-compliant tools may not provide
+ * support for the following functionality.
+ **********************************************************
+ */
+
+/*
+ * Canonical representation of packed arrays
+ * 2-state and 4-state vectors, modeled upon PLI's avalue/bvalue
+ */
+#define SV_CANONICAL_SIZE(WIDTH) (((WIDTH)+31)>>5)
+typedef unsigned int svBitVec32;/* (a chunk of) packed bit array */
+typedef struct { unsigned int c; unsigned int d;}
+svLogicVec32; /* (a chunk of) packed logic array */
+
+/* reference to a standalone packed array */
+typedef void* svBitPackedArrRef;
+typedef void* svLogicPackedArrRef;
+
+/*
+ * total size in bytes of the simulator's representation of a packed array
+ * width in bits
+ */
+XXTERN int svSizeOfBitPackedArr(int width);
+XXTERN int svSizeOfLogicPackedArr(int width);
+
+/* Translation between the actual representation and the canonical representation */
+
+/* s=source, d=destination, w=width */
+/* actual <-- canonical */
+XXTERN void svPutBitVec32(svBitPackedArrRef d, const svBitVec32* s, int w);
+XXTERN void svPutLogicVec32(svLogicPackedArrRef d, const svLogicVec32* s, int w);
+
+/* canonical <-- actual */
+XXTERN void svGetBitVec32(svBitVec32* d, const svBitPackedArrRef s, int w);
+XXTERN void svGetLogicVec32(svLogicVec32* d, const svLogicPackedArrRef s, int w);
+
+/*
+ * Bit-select functions
+ * Packed arrays are assumed to be indexed n-1:0,
+ * where 0 is the index of LSB
+ */
+
+/* s=source, i=bit-index */
+XXTERN svBit svGetSelectBit(const svBitPackedArrRef s, int i);
+XXTERN svLogic svGetSelectLogic(const svLogicPackedArrRef s, int i);
+
+/* d=destination, i=bit-index, s=scalar */
+XXTERN void svPutSelectBit(svBitPackedArrRef d, int i, svBit s);
+XXTERN void svPutSelectLogic(svLogicPackedArrRef d, int i, svLogic s);
+
+/*
+ * functions for part-select
+ *
+ * a narrow (<=32 bits) part-select is copied between
+ * the implementation representation and a single chunk of
+ * canonical representation
+ * Normalized ranges and indexing [n-1:0] are used for both arrays:
+ * the array in the implementation representation and the canonical array.
+ *
+ * s=source, d=destination, i=starting bit index, w=width
+ * like for variable part-selects; limitations: w <= 32
+ */
+
+/* canonical <-- actual */
+XXTERN void svGetPartSelectBit(svBitVec32* d, const svBitPackedArrRef s,
+        int i, int w);
+XXTERN svBitVec32 svGetBits(const svBitPackedArrRef s, int i, int w);
+XXTERN svBitVec32 svGet32Bits(const svBitPackedArrRef s, int i); /* 32-bits */
+
+XXTERN uint64_t svGet64Bits(const svBitPackedArrRef s, int i);
+
+/* 64-bits */
+XXTERN void svGetPartSelectLogic(svLogicVec32* d, const svLogicPackedArrRef s,
+        int i, int w);
+/* actual <-- canonical */
+XXTERN void svPutPartSelectBit(svBitPackedArrRef d, const svBitVec32 s,
+        int i, int w);
+XXTERN void svPutPartSelectLogic(svLogicPackedArrRef d, const svLogicVec32 s,
+        int i, int w);
+
+/*
+ * Functions for open array translation between simulator and canonical
+ * representations. These functions copy the whole packed array in either
+ * direction. The user is responsible for allocating an array in the
+ * canonical representation.
+ */
+
+/* s=source, d=destination */
+/* actual <-- canonical */
+XXTERN void svPutBitArrElemVec32(const svOpenArrayHandle d, const svBitVec32* s,
+        int indx1, ...);
+XXTERN void svPutBitArrElem1Vec32(const svOpenArrayHandle d, const svBitVec32* s,
+        int indx1);
+XXTERN void svPutBitArrElem2Vec32(const svOpenArrayHandle d, const svBitVec32* s,
+        int indx1, int indx2);
+XXTERN void svPutBitArrElem3Vec32(const svOpenArrayHandle d, const svBitVec32* s,
+        int indx1, int indx2, int indx3);
+XXTERN void svPutLogicArrElemVec32(const svOpenArrayHandle d, const svLogicVec32* s,
+        int indx1, ...);
+XXTERN void svPutLogicArrElem1Vec32(const svOpenArrayHandle d, const svLogicVec32* s,
+        int indx1);
+XXTERN void svPutLogicArrElem2Vec32(const svOpenArrayHandle d, const svLogicVec32* s,
+        int indx1, int indx2);
+XXTERN void svPutLogicArrElem3Vec32(const svOpenArrayHandle d, const svLogicVec32* s,
+        int indx1, int indx2, int indx3);
+
+/* canonical <-- actual */
+XXTERN void svGetBitArrElemVec32(svBitVec32* d, const svOpenArrayHandle s,
+        int indx1, ...);
+XXTERN void svGetBitArrElem1Vec32(svBitVec32* d, const svOpenArrayHandle s,
+        int indx1);
+XXTERN void svGetBitArrElem2Vec32(svBitVec32* d, const svOpenArrayHandle s,
+        int indx1, int indx2);
+XXTERN void svGetBitArrElem3Vec32(svBitVec32* d, const svOpenArrayHandle s,
+        int indx1, int indx2, int indx3);
+XXTERN void svGetLogicArrElemVec32(svLogicVec32* d, const svOpenArrayHandle s,
+        int indx1, ...);
+XXTERN void svGetLogicArrElem1Vec32(svLogicVec32* d, const svOpenArrayHandle s,
+        int indx1);
+XXTERN void svGetLogicArrElem2Vec32(svLogicVec32* d, const svOpenArrayHandle s,
+        int indx1, int indx2);
+XXTERN void svGetLogicArrElem3Vec32(svLogicVec32* d, const svOpenArrayHandle s,
+        int indx1, int indx2, int indx3);
+
+/*
+ **********************************************************
+ * DEPRECATED PORTION OF FILE ENDS HERE.
+ **********************************************************
+ */
+
+#undef DPI_EXTERN
+
+#ifdef DPI_PROTOTYPES
+#undef DPI_PROTOTYPES
+#undef XXTERN
+#undef EETERN
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -115,7 +115,7 @@ fi
 if [ x"$dir_arg" != x ]; then
 	dst=$src
 	src=""
-	
+
 	if [ -d $dst ]; then
 		instcmd=:
 	else
@@ -0,0 +1,259 @@
+# DESCRIPTION: DOCUMENT source run through perl to produce internals.txt file
+# Use 'make internals.txt' to produce the output file
+
+=pod
+
+=head1 NAME
+
+Verilator Internals
+
+=head1 INTRODUCTION
+
+This file discusses internal and programming details for Verilator.  It's
+the first for reference for developers and debugging problems.
+
+See also the Verilator internals presentation at http://www.veripool.org.
+
+=head1 ADDING A NEW FEATURE
+
+Generally what would you do to add a new feature?
+
+=over 4
+
+File a bug (if there isn't already) so others know what you're working on.
+
+Make a testcase in the test_regress/t/t_EXAMPLE format, see TESTING Below.
+
+If grammar changes are needed, look at the git version of VerilogPerl's
+src/VParseGrammar.y, as this grammar supports the full SystemVerilog
+language and has a lot of back-and-forth with Verilator's grammar.  Copy
+the appropriate rules to src/verilog.y and modify the productions.
+
+If a new Ast type is needed, add it to V3AstNodes.h.
+
+Now you can run "test_regress/t/t_{new testcase}.pl --debug" and it'll
+probably fail but you'll see a test_regress/obj_dir/t_{newtestcase}/*.tree
+file which you can examine to see if the parsing worked. See also the
+sections below on debugging.
+
+Modify the later visitor functions to process the new feature as needed.
+
+=back
+
+=head1 CODE FLOWS
+
+=head2 Verilator Flow
+
+The main flow of Verilator can be followed by reading the Verilator.cpp
+process() function:
+
+First, the files specified on the command line are read.  Reading involves
+preprocessing, then lexical analysis with Flex and parsing with Bison.
+This produces an abstract syntax tree (AST) representation of the design,
+which is what is visible in the .tree files described below.
+
+Cells are then linked, which will read and parse additional files as above.
+
+Functions, variable and other references are linked to their definitions.
+
+Parameters are resolved and the design is elaborated.
+
+Verilator then performs many additional edits and optimizations on the
+hierarchical design.  This includes coverage, assertions, X elimination,
+inlining, constant propagation, and dead code elimination.
+
+References in the design are then psudo-flattened.  Each module's variables
+and functions get "Scope" references.  A scope reference is an occurrence of
+that un-flattened variable in the flattened hierarchy.  A module that occurs
+only once in the hierarchy will have a single scope and single VarScope for
+each variable.  A module that occurs twice will have a scope for each
+occurrence, and two VarScopes for each variable.  This allows optimizations
+to proceed across the flattened design, while still preserving the
+hierarchy.
+
+Additional edits and optimizations proceed on the psudo-flat design.  These
+include module references, function inlining, loop unrolling, variable
+lifetime analysis, lookup table creation, always splitting, and logic gate
+simplifications (pushing inverters, etc).
+
+Verilator orders the code.  Best case, this results in a single "eval"
+function which has all always statements flowing from top to bottom with no
+loops.
+
+Verilator mostly removes the flattening, so that code may be shared between
+multiple invocations of the same module.  It localizes variables, combines
+identical functions, expands macros to C primitives, adds branch prediction
+hints, and performs additional constant propagation.
+
+Verilator finally writes the C++ modules.
+
+=head2 Verilated Flow
+
+The evaluation loop outputted by Verilator is designed to allow a single
+function to perform evaluation under most situations.
+
+On the first evaluation, the Verilated code calls initial blocks, and then
+"settles" the modules, by evaluating functions (from always statements)
+until all signals are stable.
+
+On other evaluations, the Verilated code detects what input signals have
+changes.  If any are clocks, it calls the appropriate sequential functions
+(from always @ posedge statements).  Interspersed with sequential functions
+it calls combo functions (from always @*).  After this is complete, it
+detects any changes due to combo loops or internally generated clocks, and
+if one is found must reevaluate the model again.
+
+For SystemC code, the eval() function is wrapped in a SystemC SC_METHOD,
+sensitive to all inputs.  (Ideally it would only be sensitive to clocks and
+combo inputs, but tracing requires all signals to cause evaluation, and the
+performance difference is small.)
+
+If tracing is enabled, a callback examines all variables in the design for
+changes, and writes the trace for each change.  To accelerate this process
+the evaluation process records a bitmask of variables that might have
+changed; if clear, checking those signals for changes may be skipped.
+
+=head1 CODING CONVENTIONS
+
+=head2 Indentation style
+
+To match the indentation of Verilator C++ sources, use 4 spaces per level,
+and leave tabs at 8 columns, so every other indent level is a tab stop.
+
+In Emacs, use in your ~/.emacs
+
+  (add-hook 'c-mode-common-hook '(lambda ()
+				   (c-set-style "cc-mode"))))
+
+This sets indentation to the cc-mode defaults.  (Verilator predates a
+CC-mode change of several years ago which overrides the defaults with GNU
+style indentation; the c-set-style undoes that.)
+
+=head2 Visitor Functions
+
+There's three ways data is passed between visitor functions.
+
+1. A visitor-class member variable.  This is generally for passing "parent"
+information down to children.  m_modp is a common example.  It's set to
+NULL in the constructor, where that node (AstModule visitor) sets it, then
+the children are iterated, then it's cleared.  Children under an AstModule
+will see it set, while nodes elsewhere will see it clear.  If there can be
+nested items (for example an AstFor under an AstFor) the variable needs to
+be save-set-restored in the AstFor visitor, otherwise exiting the lower for
+will loose the upper for's setting.
+
+2. User() attributes.  Each node has 5 ->user() number or ->userp() pointer
+utility values (a common technique lifted from graph traversal packages).
+A visitor first clears the one it wants to use by calling
+AstNode::user#ClearTree(), then it can mark any node's user() with whatever
+data it wants.  Readers just call nodep->user(), but may need to cast
+appropriately, so you'll often see nodep->userp()->castSOMETYPE().  At the
+top of each visitor are comments describing how the user() stuff applies to
+that visitor class.  For example:
+
+    // NODE STATE
+    // Cleared entire netlist
+    //   AstModule::user1p()     // bool. True to inline this module
+
+This says that at the AstNetlist user1ClearTree() is called.  Each
+AstModule's is user1() is used to indicate if we're going to inline it.
+
+These comments are important to make sure a user#() on a given AstNode type
+is never being used for two different purposes.
+
+Note that calling user#ClearTree is fast, it doesn't walk the tree, so it's
+ok to call fairly often.  For example, it's commonly called on every
+module.
+
+3. Parameters can be passed between the visitors in close to the "normal"
+function caller to callee way.  This is the second "vup" parameter that is
+ignored on most of the visitor functions.  V3Width does this, but it proved
+more messy than the above and is deprecated.  (V3Width was nearly the first
+module written.  Someday this scheme may be removed, as it slows the
+program down to have to pass vup everywhere.)
+
+=head1 TESTING
+
+To write a test see notes in the forum and in the verilator.txt manual.
+
+Note you can run the regression tests in parallel; see the
+test_regress/driver.pl script -j flag.
+
+=head1 DEBUGGING
+
+=head2 --debug
+
+When you run with --debug there are two primary output file types placed into
+the obj_dir, .tree and .dot files.
+
+=head2 .dot output
+
+Dot files are dumps of internal graphs in Graphviz
+L<http://www.graphviz.org/> dot format.  When a dot file is dumped,
+Verilator will also print a line on stdout that can be used to format the
+output, for example:
+
+    dot -Tps -o ~/a.ps obj_dir/Vtop_foo.dot
+
+You can then print a.ps.  You may prefer gif format, which doesn't get
+scaled so can be more useful with large graphs.
+
+For dynamic graph viewing consider ZGRViewer
+L<http://zvtm.sourceforge.net/zgrviewer.html>.  If you know of better
+viewers let us know; ZGRViewer isn't great for large graphs.
+
+=head2 .tree output
+
+Tree files are dumps of the AST Tree and are produced between every major
+algorithmic stage.  An example:
+
+     NETLIST 0x90fb00 <e1> {0} w0
+    1: MODULE 0x912b20 <e8822> {8} w0  top  L2 [P]
+   *1:2: VAR 0x91a780 <e74#> {22} w70  out_wide [O] WIRE
+    1:2:1: BASICDTYPE 0x91a3c0 <e73> {22} w70  [logic]
+
+=over 4
+
+"1:2:" indicates the hierarchy the VAR is op2p under the MODULE.
+
+"VAR" is the AstNodeType.
+
+"0x91a780" is the address of this node.
+
+"<e74>" means the 74th edit to the netlist was the last modification to
+this node.  A trailing # indicates this node changed since the last tree
+dump was made.  You can gdb break on this edit; see below.
+
+"{22}" indicates this node is related to line 22 in the source.
+
+"w70" indicates the width is 70 bits.  sw70 would be signed 70 bits.
+
+"out_wide" is the name of the node, in this case the name of the variable.
+
+"[O]" are flags which vary with the type of node, in this case it means the
+variable is an output.
+
+=back
+
+=head2 Debugging with GDB
+
+The test_regress/driver.pl script accepts --debug --gdb to start Verilator
+under gdb.  You can also use --debug --gdbbt to just backtrace and then
+exit gdb.
+
+To break at a specific edit number which changed a node (presumably to find
+what made a <e####> line in the tree dumps):
+
+   watch AstNode::s_editCntGbl==####
+
+=head1 DISTRIBUTION
+
+The latest version is available from L<http://www.veripool.org/>.
+
+Copyright 2008-2010 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.
+
+=cut
+
+######################################################################
@@ -4,8 +4,6 @@
 # Created: 1993-05-16
 # Public domain

-# $Id:$
-
 errstatus=0

 for file
@@ -0,0 +1,85 @@
+#!/usr/bin/perl -w
+######################################################################
+#
+# Copyright 2007-2010 by Wilson Snyder.  This package is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+######################################################################
+
+# DESCRIPTION: Diff bison files
+
+use Getopt::Long;
+use IO::File;
+use strict;
+
+our $Debug;
+our $Opt_Unsup;
+
+if (! GetOptions (
+	  #"help"	=> \&usage,
+	  "debug"	=> sub { $Debug = 1; },
+	  "unsup!"	=> \$Opt_Unsup,		# Ignore unsupported
+    )) {
+    die "usage();"
+}
+
+diff($ARGV[0],$ARGV[1]);
+
+sub diff {
+    my $a=shift;
+    my $b=shift;
+
+    my $ta = "/tmp/bisondiff.$$.a";
+    my $tb = "/tmp/bisondiff.$$.b";
+
+    prep($a,$ta);
+    prep($b,$tb);
+
+    system("diff -u -w $ta $tb");
+}
+
+sub prep {
+    my $filename = shift;
+    my $wfilename = shift;
+
+    my $fh = IO::File->new("<$filename") or die "%Error: $! $filename";
+    my $fho = IO::File->new(">$wfilename") or die "%Error: $! writing $wfilename";
+
+    my %declared;
+    my %used;
+
+    my $body = 0;
+    my $rule = "";
+    my $skip = 1;
+    while (defined(my $line = $fh->getline)) {
+	if ($skip == 1) {
+	    next if $line !~ /%token/;
+	    $skip = 2;
+	}
+
+	if ($Opt_Unsup) {
+	    $line =~ s!//UNSUP!|!g;
+	    $line =~ s!(\s+)\|(\s+)!$1$2!g;  # As "UNSUP" often replaces "|"
+	}
+
+	# %type<foo>
+	$line =~ s/^(%\S+)<(\S+)>/$1/;
+	# rule<foo>
+	$line =~ s/^([a-zA-Z0-9_]+)<\S+>:/$1:/;
+	# Productions
+	$line =~ s/[ \t]{[^}]*?}/\t{}/g;
+
+	$fho->print($line);
+    }
+}
+
+# Local Variables:
+# compile-command: "./bisondiff --unsup $VP/Parser/VParseBison.y ../src/verilog.y"
+# End:
@@ -1,22 +1,16 @@
 #!/usr/bin/perl -w
-#$Id$
 ######################################################################
 #
-# Copyright 2007-2008 by Wilson Snyder.
+# Copyright 2007-2010 by Wilson Snyder.  This package is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
 #
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of either the GNU General Public License or the
-# Perl Artistic License.
-# 
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
-# 
-# You should have received a copy of the Perl Artistic License
-# along with this module; see the file COPYING.  If not, see
-# www.cpan.org
-#                                                                           
+#
 ######################################################################

 # DESCRIPTION: Debugging of bison output
@@ -43,8 +37,8 @@ foreach my $line (<STDIN>) {
 	$rule .= $line;
 	if ($line =~ m!^\s*;\s*$!) {
 	    #print "Rule: $rule\n";
-	    ($rule =~ /^([a-zA-Z0-9_]+):(.*)$/) or die "%Error: No rule name: $1\n";
-	    my $rulename = $1; my $preaction = $2;
+	    ($rule =~ /^([a-zA-Z0-9_]+)(<\S+>)?:(.*)$/) or die "%Error: No rule name: $1\n";
+	    my $rulename = $1; my $preaction = $3;
 	    $declared{$rulename} = $lineno;
 	    $preaction =~ s/\{[^\}]*\}/ /g;
 	    #print "RULEN $rulename PA $preaction\n" if $Debug;
@@ -63,5 +57,5 @@ foreach my $line (<STDIN>) {
 }

 # Local Variables:
-# compile-command: "./bisonreader < verilog.y"
+# compile-command: "./bisonreader < ../src/verilog.y"
 # End:
@@ -1,17 +1,5 @@
 #!/usr/bin/perl -w
-# $Id$
-######################################################################
-#
-# Copyright 2005-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -50,7 +38,6 @@ cwrite ("graph_export.cpp");
 #----------------------------------------------------------------------

 sub usage {
-    print '$Id$ ', "\n";
    pod2usage(-verbose=>2, -exitval => 2);
    exit (1);
 }
@@ -120,7 +107,7 @@ sub cwrite {
    foreach my $edge (@Edges) {
 	$fh->printf("    new V3GraphEdge(gp, %s, %s, %s, %s);\n",
 		    $edge->{from}, $edge->{to},
-		    $edge->{weight}, $edge->{cutable}?"true":"false");	       
+		    $edge->{weight}, $edge->{cutable}?"true":"false");
    }
    $fh->print("}\n");
 }
@@ -156,9 +143,9 @@ Displays this message and program version and exits.

 =head1 DISTRIBUTION

-Copyright 2005-2008 by Wilson Snyder.  This package is free software; you
-can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Copyright 2005-2010 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

 =head1 AUTHORS

@@ -1,17 +1,5 @@
 #!/usr/bin/perl -w
-# $Id$
-######################################################################
-#
-# Copyright 2005-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -55,7 +43,6 @@ dotwrite();
 #----------------------------------------------------------------------

 sub usage {
-    print '$Id$ ', "\n";
    pod2usage(-verbose=>2, -exitval => 2);
    exit (1);
 }
@@ -175,7 +162,7 @@ __END__

 =head1 NAME

-dot_pruner - 
+dot_pruner -

 =head1 SYNOPSIS

@@ -197,9 +184,9 @@ Displays this message and program version and exits.

 =head1 DISTRIBUTION

-Copyright 2005-2008 by Wilson Snyder.  This package is free software; you
-can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Copyright 2005-2010 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

 =head1 AUTHORS

@@ -0,0 +1,64 @@
+#!/usr/bin/perl -w
+######################################################################
+#
+# Copyright 2007-2010 by Wilson Snyder.  This package is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+######################################################################
+
+# DESCRIPTION: Diff flex files
+
+use IO::File;
+use strict;
+
+my $Debug;
+
+diff($ARGV[0],$ARGV[1]);
+
+sub diff {
+    my $a=shift;
+    my $b=shift;
+
+    my $ta = "/tmp/flexdiff.$$.a";
+    my $tb = "/tmp/flexdiff.$$.b";
+
+    prep($a,$ta);
+    prep($b,$tb);
+
+    system("diff -u -w $ta $tb");
+}
+
+sub prep {
+    my $filename = shift;
+    my $wfilename = shift;
+
+    my $fh = IO::File->new("<$filename") or die "%Error: $! $filename";
+    my $fho = IO::File->new(">$wfilename") or die "%Error: $! writing $wfilename";
+
+    my %declared;
+    my %used;
+    my @lines;
+
+    while (defined(my $line = $fh->getline)) {
+	# Productions
+	#$line =~ s/[ \t]{[^}]*?}/\t{}/g;
+	$line =~ s/StashPrefix;//g;
+	$line =~ s/VALTEXT;//g;
+	$line =~ s/CALLBACK\([^)]*\);//g;
+	push @lines, $line;
+    }
+
+    #@lines = sort @lines;
+    $fho->print(@lines);
+}
+
+# Local Variables:
+# compile-command: "./flexdiff $VP/Parser/VParseLex.l ../src/verilog.l"
+# End:
@@ -0,0 +1,136 @@
+#!/usr/bin/perl -w
+# See copyright, etc in below POD section.
+######################################################################
+
+use Getopt::Long;
+use Cwd;
+use IO::File;
+use Pod::Usage;
+use strict;
+use vars qw ($Debug);
+
+#======================================================================
+# main
+
+autoflush STDOUT 1;
+autoflush STDERR 1;
+Getopt::Long::config ("no_auto_abbrev");
+if (! GetOptions (
+	  "debug"	=> sub { $Debug = 1; },
+	  "<>"		=> sub { die "%Error: Unknown parameter: $_[0]\n"; },
+    )) {
+    die "%Error: Bad usage, try 'install_test --help'\n";
+}
+
+test();
+
+#######################################################################
+
+sub test {
+    -r "nodist/install_test" or die "%Error: Run from the top of the verilator kit,";
+
+    cleanenv();
+    $ENV{VERILATOR_NO_OPT_BUILD} = 1;   # Don't build optimized executables; just slows this down
+    run("make distclean") if -r "Makefile";
+
+    # Try building from a scratch area
+    my $srcdir = getcwd();
+    my $blddir  = $srcdir."/test_regress/obj_dir/install_test_bld";
+    my $prefix  = $srcdir."/test_regress/obj_dir/install_test_prefix";
+    my $testdir = $srcdir."/test_regress/obj_dir/install_test_test";
+    if (1) {
+	run("/bin/rm -rf $blddir");
+	run("/bin/mkdir -p $blddir");
+	run("cd $blddir && $srcdir/configure --prefix $prefix");
+	run("cd $blddir && make -j");
+    }
+
+    # Install it under the prefix
+    if (1) {
+	run("/bin/rm -rf $prefix");
+	run("/bin/mkdir -p $prefix");
+	run("cd $blddir && make install");
+    }
+
+    # Run a test using just the path
+    if (1) {
+	run("/bin/rm -rf   $testdir");
+	run("/bin/mkdir -p $testdir");
+	my $bin1 = $prefix."/bin";
+	my $bin2 = $prefix."/share/bin";
+	IO::File->new(">$testdir/foo.v")->print('module t; initial begin $display("HELLO WORLD"); end endmodule'."\n");
+	run("cd $testdir && PATH=$bin1:$bin2:\$PATH verilator --cc foo.v");
+	run("cd $testdir/obj_dir && PATH=$bin1:$bin2:\$PATH make -f Vfoo.mk");
+	#Need .c file, and --exe for this to work
+	#run("cd $testdir && PATH=$bin1:$bin2:\$PATH obj_dir/Vfoo");
+    }
+}
+
+sub cleanenv {
+    foreach my $var (keys %ENV) {
+	if ($var eq "VERILATOR_ROOT") {
+	    print "unset $var # Was '$ENV{$var}'\n";
+	    delete $ENV{$var}
+	}
+    }
+}
+
+#######################################################################
+
+sub run {
+    # Run a system command, check errors
+    my $command = shift;
+    print "\t$command\n";
+    system "$command";
+    my $status = $?;
+    ($status == 0) or die "%Error: Command Failed $command, $status, stopped";
+}
+
+#######################################################################
+__END__
+
+=pod
+
+=head1 NAME
+
+install_test - Build and install Verilator several ways
+
+=head1 SYNOPSIS
+
+  install_test
+
+=head1 DESCRIPTION
+
+install_test performs several make-and-install iterations to verify the
+kit.  It isn't part of the normal "make test" due to the number of builds
+required.
+
+=head1 ARGUMENTS
+
+=over 4
+
+=item --help
+
+Displays this message and program version and exits.
+
+=back
+
+=head1 DISTRIBUTION
+
+Copyright 2009-2010 by Wilson Snyder.  This package is free software; you
+can redistribute it and/or modify it under the terms of either the GNU
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.
+
+=head1 AUTHORS
+
+Wilson Snyder <[email protected]>
+
+=head1 SEE ALSO
+
+=cut
+
+######################################################################
+### Local Variables:
+### compile-command: "cd .. ; nodist/install_test "
+### End:
@@ -0,0 +1,59 @@
+#!/usr/bin/perl -w
+# See copyright, etc in below POD section.
+######################################################################
+
+require 5.006_001;
+use strict;
+
+#======================================================================
+# main
+
+delete $ENV{MODULE_VERSION};
+_setup_modules();
+module('add','axiom-athdl');
+exec('atsim',@ARGV);
+
+#######################################################################
+# Modules package
+
+sub _setup_modules {
+    # Load the 'module' command into the environment
+    my $init = "$ENV{MODULESHOME}/init/perl";
+    (-f $init) or die "%Error: Script not found: $init,";
+    require $init;
+}
+
+#######################################################################
+__END__
+
+=pod
+
+=head1 NAME
+
+invoke_atsim - Invoke tool under "modules" command
+
+=head1 SYNOPSIS
+
+  invoke_atsim  {ncv arguments}
+
+=head1 DESCRIPTION
+
+=head1 DISTRIBUTION
+
+Copyright 2005-2010 by Wilson Snyder.  This package is free software; you
+can redistribute it and/or modify it under the terms of either the GNU
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.
+
+=head1 AUTHORS
+
+Wilson Snyder <[email protected]>
+
+=head1 SEE ALSO
+
+=cut
+
+######################################################################
+### Local Variables:
+### compile-command: "./invoke_atsim -help"
+### End:
@@ -0,0 +1,59 @@
+#!/usr/bin/perl -w
+# See copyright, etc in below POD section.
+######################################################################
+
+require 5.006_001;
+use strict;
+
+#======================================================================
+# main
+
+delete $ENV{MODULE_VERSION};
+_setup_modules();
+module('add','cadence-ius');
+exec('iccr',@ARGV);
+
+#######################################################################
+# Modules package
+
+sub _setup_modules {
+    # Load the 'module' command into the environment
+    my $init = "$ENV{MODULESHOME}/init/perl";
+    (-f $init) or die "%Error: Script not found: $init,";
+    require $init;
+}
+
+#######################################################################
+__END__
+
+=pod
+
+=head1 NAME
+
+invoke_iccr - Invoke tool under "modules" command
+
+=head1 SYNOPSIS
+
+  invoke_iccr  {ncv arguments}
+
+=head1 DESCRIPTION
+
+=head1 DISTRIBUTION
+
+Copyright 2007-2010 by Wilson Snyder.  This package is free software; you
+can redistribute it and/or modify it under the terms of either the GNU
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.
+
+=head1 AUTHORS
+
+Wilson Snyder <[email protected]>
+
+=head1 SEE ALSO
+
+=cut
+
+######################################################################
+### Local Variables:
+### compile-command: "./invoke_iccr -help"
+### End:
@@ -1,17 +1,5 @@
 #!/usr/bin/perl -w
-# $Id$
-######################################################################
-#
-# Copyright 2007-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -22,7 +10,7 @@ use strict;

 delete $ENV{MODULE_VERSION};
 _setup_modules();
-module('add','cadence_verif');
+module('add','cadence-ius');
 exec('ncverilog',@ARGV);

 #######################################################################
@@ -30,7 +18,7 @@ exec('ncverilog',@ARGV);

 sub _setup_modules {
    # Load the 'module' command into the environment
-    my $init = "/sicortex/$ENV{DIRPROJECT_ARCH}/lib/Modules/default/init/perl";
+    my $init = "$ENV{MODULESHOME}/init/perl";
    (-f $init) or die "%Error: Script not found: $init,";
    require $init;
 }
@@ -52,9 +40,10 @@ invoke_ncverilog - Invoke tool under "modules" command

 =head1 DISTRIBUTION

-Copyright 2007-2008 by Wilson Snyder.  This package is free software; you
+Copyright 2005-2010 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.

 =head1 AUTHORS

@@ -0,0 +1,59 @@
+#!/usr/bin/perl -w
+# See copyright, etc in below POD section.
+######################################################################
+
+require 5.006_001;
+use strict;
+
+#======================================================================
+# main
+
+delete $ENV{MODULE_VERSION};
+_setup_modules();
+module('add','synopsys-vcs');
+exec('vcs',@ARGV);
+
+#######################################################################
+# Modules package
+
+sub _setup_modules {
+    # Load the 'module' command into the environment
+    my $init = "$ENV{MODULESHOME}/init/perl";
+    (-f $init) or die "%Error: Script not found: $init,";
+    require $init;
+}
+
+#######################################################################
+__END__
+
+=pod
+
+=head1 NAME
+
+invoke_vcs - Invoke tool under "modules" command
+
+=head1 SYNOPSIS
+
+  invoke_vcs  {ncv arguments}
+
+=head1 DESCRIPTION
+
+=head1 DISTRIBUTION
+
+Copyright 2005-2010 by Wilson Snyder.  This package is free software; you
+can redistribute it and/or modify it under the terms of either the GNU
+Lesser General Public License Version 3 or the Perl Artistic License
+Version 2.0.
+
+=head1 AUTHORS
+
+Wilson Snyder <[email protected]>
+
+=head1 SEE ALSO
+
+=cut
+
+######################################################################
+### Local Variables:
+### compile-command: "./invoke_vcs -help"
+### End:
@@ -0,0 +1,4 @@
+export GLIBCPP_FORCE_NEW=1
+compile with -DVL_LEAK_CHECKS
+valgrind --tool=memcheck --leak-check=yes $VERILATOR_ROOT/verilator_bin_dbg -MMD --bin $VERILATOR_ROOT/verilator_bin_dbg --cc -f $VERILATOR_ROOT/test_c/../test_v/input.vc top.v --no-skip-identical 2>&1 | tee ~/d/aa
+valgrind --tool=memcheck --leak-check=yes $VERILATOR_ROOT/verilator_bin_dbg -MMD --bin $VERILATOR_ROOT/verilator_bin_dbg --cc $VERILATOR_ROOT/test_regress/t/t_case_huge.v --no-skip-identical -I$VERILATOR_ROOT/test_regress/t 2>&1 | tee ~/d/aa
@@ -0,0 +1,140 @@
+#!/usr/bin/perl -w
+######################################################################
+#
+# Copyright 2010-2010 by Wilson Snyder.  This package is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+######################################################################
+
+# DESCRIPTION: Diff Verilator includes against SystemPerl include files
+
+use Getopt::Long;
+use IO::File;
+use strict;
+
+our $Debug;
+our $Bad;
+
+if (! GetOptions (
+	  #"help"	=> \&usage,
+	  "debug"	=> sub { $Debug = 1; },
+    )) {
+    die "usage();"
+}
+
+diff("$ARGV[0]/include/verilated_vcd_c.h",	"$ARGV[1]/src/SpTraceVcdC.h");
+diff("$ARGV[0]/include/verilated_vcd_sc.h",	"$ARGV[1]/src/SpTraceVcd.h");
+diff("$ARGV[0]/include/verilated_vcd_c.cpp",	"$ARGV[1]/src/SpTraceVcdC.cpp");
+diff("$ARGV[0]/include/verilated_vcd_sc.cpp",	"$ARGV[1]/src/SpTraceVcd.cpp");
+
+exit(10) if $Bad;
+
+sub diff {
+    my $a=shift;
+    my $b=shift;
+
+    my $ta = "/tmp/spdiff.$$.a";
+    my $tb = "/tmp/spdiff.$$.b";
+
+    prep($a,$ta);
+    prep($b,$tb);
+
+    system("diff -u -w $ta $tb");
+}
+
+sub prep {
+    my $filename = shift;
+    my $wfilename = shift;
+
+    my $sp;
+    if ($filename =~ m!src/Sp!) {
+	$sp = "Sp";
+    } elsif ($filename =~ m!include/verilated!) {
+    } else {
+	die "%Error: Not sure if Sp/Verilated: $filename,\n";
+    }
+
+    my $fh = IO::File->new("<$filename") or die "%Error: $! $filename";
+    my $fho = IO::File->new(">$wfilename") or die "%Error: $! writing $wfilename";
+
+    my @wf;
+    my $off;
+    while (defined(my $line = $fh->getline)) {
+	if ($line =~ m!// *SPDIFF_OFF!) {
+	    $off = 1;
+	    next;
+	} elsif ($line =~ m!// *SPDIFF_ON!) {
+	    $off = 0;
+	    next;
+	}
+	next if $off;
+
+	next if $line =~ /compile-command:/;
+	$line =~ s/SP_ABORT.*// if $sp;
+	$line =~ s/SP_NOTICE.*// if $sp;
+	$line =~ s/vl_fatal.*// if !$sp;
+	$line =~ s/VL_PRINT.*// if !$sp;
+
+	push @wf, $line;
+
+	my $check = $line;
+	$check =~ s/\bspace//i;
+	$check =~ s/\bsplit//i;
+	$check =~ s/"SP_TRACE"//;
+
+	if ($sp && $check =~ /Verilat/i
+	    && $check !~ /and newer/) {
+	    warn "%Warning: $filename:$.: Verilator text in Sp version: $line";
+	    $Bad = 1;
+	} elsif (!$sp && $check =~ /\b(Sp|SP)/
+		 ) {
+	    warn "%Warning: $filename:$.: Sp text in Verilator version: $line";
+	    $Bad = 1;
+	} elsif (!$sp && $check =~ /\<uint[0-9]+_t/) {
+	    warn "%Warning: $filename:$.: uint in Verilator version: $line";
+	    $Bad = 1;
+	}
+    }
+    !$off or die "%Error: $filename: SPDIFF_OFF block never terminated\n";
+
+    my $wholefile = join('',@wf);
+
+    if ($sp) {
+	$wholefile =~ s/SPTRACEVCDC_VERSION/VERILATED_VCD_VERSION/g;
+	$wholefile =~ s/SPTRACEVCDC_/VERILATED_VCD_C_/g;
+	$wholefile =~ s/SPTRACEVCD_TEST/VERILATED_VCD_TEST/g;
+	$wholefile =~ s/SPTRACEVCD_/VERILATED_VCD_SC_/g;
+
+	#
+	$wholefile =~ s/\bSpTraceFile\b/VerilatedVcdSc/g;
+	$wholefile =~ s/\bSpTraceFileC\b/VerilatedVcdC/g;
+	$wholefile =~ s/\bSpTraceVcd\b/VerilatedVcd/g;
+	$wholefile =~ s/\bSpTraceVcdCFile\b/VerilatedVcdC/g;
+	#
+	$wholefile =~ s/\bSpTraceCallInfo\b/VerilatedVcdCallInfo/g;
+	$wholefile =~ s/\bSpTraceCallback_t/VerilatedVcdCallback_t/g;
+	$wholefile =~ s/\bSpTraceVcd_/VerilatedVcd_/g;
+	$wholefile =~ s/\bSpTraceVcdSig\b/VerilatedVcdSig/g;
+	$wholefile =~ s/\bSpScBvExposer/VlScBvExposer/g;
+	#
+	$wholefile =~ s/\b(uint[0-9]+_t)/vl$1/g;
+	$wholefile =~ s/%ll/%" VL_PRI64 "/g;
+	$wholefile =~ s/\(long long unsigned\)n/ n/g;  # printQuad
+	#
+	$wholefile =~ s/\bSP_SC_BV/VL_SC_BV/g;
+	$wholefile =~ s/\bSP_UNLIKELY/VL_UNLIKELY/g;
+    }
+
+    $fho->print($wholefile);
+}
+
+# Local Variables:
+# compile-command: "./spdiff $SYP $V4"
+# End:
@@ -1,17 +1,5 @@
 #!/usr/bin/perl -w
-# $Id$
-######################################################################
-#
-# Copyright 2005-2008 by Wilson Snyder <[email protected]>.  This
-# program is free software; you can redistribute it and/or modify it under
-# the terms of either the GNU Lesser General Public License or the Perl
-# Artistic License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
+# See copyright, etc in below POD section.
 ######################################################################

 require 5.006_001;
@@ -52,7 +40,6 @@ print '(query-replace-regexp "(\\([0-9a-z_]+\\))" "\\1" nil nil nil)',"\n";
 #----------------------------------------------------------------------

 sub usage {
-    print '$Id$ ', "\n";
    pod2usage(-verbose=>2, -exitval => 2);
    exit (1);
 }
@@ -292,7 +279,7 @@ sub p_var {
    }
    p "\t";
    {
-	local $Avoid_Hex=1; 
+	local $Avoid_Hex=1;
 	t1;
    }
    p "\t";
@@ -322,7 +309,7 @@ __END__

 =head1 NAME

-vtree_importer - 
+vtree_importer -

 =head1 SYNOPSIS

@@ -344,9 +331,9 @@ Displays this message and program version and exits.

 =head1 DISTRIBUTION

-Copyright 2005-2008 by Wilson Snyder.  This package is free software; you
-can redistribute it and/or modify it under the terms of either the GNU
-Lesser General Public License or the Perl Artistic License.
+Copyright 2005-2010 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

 =head1 AUTHORS

@@ -0,0 +1,186 @@
+# DESCRIPTION: DOCUMENT source run through perl to produce README file
+# Use 'make README' to produce the output file
+
+=pod
+
+=head1 NAME
+
+This is the Verilator Package README file.
+
+=head1 DISTRIBUTION
+
+This package is Copyright 2003-2010 by Wilson Snyder.  (Report bugs to
+L<http://www.veripool.org/>.)
+
+Verilator is free software; you can redistribute it and/or modify it under
+the terms of either the GNU Lesser General Public License Version 3 or the
+Perl Artistic License Version 2.0.  (See the documentation for more
+details.)
+
+This program is distributed in the hope that it will be useful, but WITHOUT
+ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+more details.
+
+=head1 DESCRIPTION
+
+Verilator converts synthesizable (not behavioral) Verilog code into C++ or
+SystemC code.  It is not a complete simulator, just a translator.
+
+Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
+reads the specified Verilog code, lints it, and optionally adds coverage
+code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
+it outputs .sp files for the SystemPerl preprocessor available at
+http://www.veripool.org.
+
+The resulting files are then compiled with C++.  The user writes a little
+C++ wrapper file, which instantiates the top level module.  This is
+compiled in C++, and linked with the Verilated files.
+
+The resulting executable will perform the actual simulation.
+
+=head1 SUPPORTED SYSTEMS
+
+Verilator is developed and has primary testing on:
+
+    SuSE 11.1 AMD64 i686-linux-2.6.27, GCC 4.3.2
+
+Versions have also built on Redhat Linux, Macs OS-X, HPUX and Solaris.  It
+should run with minor porting on any Linix-ish platform.  Verilator also
+works on Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).
+Verilated output (not Verilator itself) compiles under MSVC++ 2008.
+
+=head1 INSTALLATION
+
+For more details see 
+L<http://www.veripool.org/projects/verilator/wiki/Installing>.
+
+If you will be modifying Verilator, you should use the "git" method as it
+will let you track changes.
+
+=over 4
+
+=item
+
+The latest version is available at L<http://www.veripool.org/verilator>.
+
+Download the latest package from that site, and decompress.
+
+    tar xvzf verilator_version.tgz
+
+=item
+
+If you will be using SystemC (vs straight C++ output), download SystemC
+2.0.1 from L<http://www.systemc.org>.  Follow their installation
+instructions.  As described in the System-Perl README, you will need to set
+SYSTEMC and/or SYSTEMC_KIT to point to this download.  Also, set
+SYSTEMC_ARCH to the architecture name you used with SystemC, generally
+'linux' or 'cygwin'.
+
+=item
+
+If you will be using SystemPerl or coverage, download and install
+Verilog-Perl, L<http://www.veripool.org/verilog-perl>.
+
+=item
+
+If you will be using SystemPerl or coverage, download and install
+System-Perl, L<http://www.veripool.org/systemperl>.  Note you'll need to
+set a C<SYSTEMPERL> environment variable to point to the downloaded kit.
+Optionally also set C<SYSTEMPERL_INCLUDE> to point to the installed
+headers.
+
+=item
+
+C<cd> to the Verilator directory containing this README.
+
+=item
+
+You now have to decide how you're going to eventually install the kit.
+
+Our personal favorite is to always run Verilator from the kit directory.
+This allows the easiest experimentation and upgrading.  It's also how most
+EDA tools operate; you just point to the tarball.
+
+    export VERILATOR_ROOT=`pwd`   # if your shell is bash
+    setenv VERILATOR_ROOT `pwd`   # if your shell is csh
+    ./configure
+
+The next option is to install it globally, using the normal system paths:
+
+    unset VERILATOR_ROOT      # if your shell is bash
+    unsetenv VERILATOR_ROOT   # if your shell is csh
+    ./configure
+
+Alternatively you can configure a prefix that install will populate, as
+most GNU tools support:
+
+    unset VERILATOR_ROOT      # if your shell is bash
+    unsetenv VERILATOR_ROOT   # if your shell is csh
+    ./configure --prefix /opt/verilator-VERSION
+
+Finally, if you are configuring Verilator to be part of a RPM or other
+distribution package system, you may want to tune the various install
+directories and use the --enable-defenv configure flag.  This will take the
+current value of VERILATOR_ROOT, SYSTEMC, SYSTEMC_ARCH, SYSTEMPERL, and
+SYSTEMPERL_INCLUDE and build them as defaults into the executable.
+
+=item
+
+Type C<make> to compile Verilator.
+
+Type C<make test_c> to check the compilation.
+
+Type C<make test> for a more complete test.  You may get a error about the
+Bit::Vector Perl package.  You will need to install it and SystemPerl if
+you want all tests to pass.
+
+You may get a error about a typedef conflict for uint32_t.  Edit
+verilated.h to change the typedef to work, probably to @samp{typedef
+unsigned long uint32_t;}.
+
+=item
+
+If you used the VERILATOR_ROOT sheme you're done.  Programs should set the
+environment variable VERILATOR_ROOT to point to this distribution, then
+execute $VERILATOR_ROOT/bin/verilator, which will find the path to all
+needed files.
+
+If you used the prefix scheme, now do a C<make install>.
+
+Verilator assumes you did a make in the SystemC kit directory.  If not, you
+will need to populate C<$SYSTEMC/include> and C<$SYSTEMC/lib-linux>
+appropriately.
+
+=back
+
+=head1 USAGE DOCUMENTATION
+
+Detailed documentation and the man page can be seen by running:
+
+    bin/verilator --help
+
+or reading verilator.txt in the same directory as this README.
+
+=head1 DIRECTORY STRUCTURE
+
+The directories in the kit after de-taring are as follows:
+
+    bin/verilator               => Compiler Wrapper invoked to Verilate code
+    include/                    => Files that should be in your -I compiler path
+    include/verilated*.cpp      => Global routines to link into your simulator
+    include/verilated.h         => Global headers
+    include/verilated.v         => Stub defines for linting
+    include/verilated.mk        => Common makefile
+    src/                        => Translator source code
+    test_v                      => Example Verilog code for other test dirs
+    test_c                      => Example Verilog->C++ conversion
+    test_sc                     => Example Verilog->SystemC conversion
+    test_sp                     => Example Verilog->SystemPerl conversion
+    test_vcs                    => Example Verilog->VCS conversion (test the test)
+    test_verilated              => Internal tests
+    test_regress                => Internal tests
+
+=head1 LIMITATIONS
+
+See verilator.txt (or execute C<bin/verilator --help>) for limitations.
@@ -1,6 +1,5 @@
 \input texinfo @c -*-texinfo-*-
@c %**start of header
-$c $Id$
@setfilename readme.info
@settitle Verilator Installation
@c %**end of header
@@ -15,25 +14,29 @@ $c $Id$
 This is the Verilator Package.

@menu
-* Copyright::                   
-* Description::                 
-* Obtaining Distribution::      
-* Directory Structure::         
-* Supported Systems::           
-* Installation::                
-* Limitations::                 
+* Copyright::
+* Description::
+* Obtaining Distribution::
+* Directory Structure::
+* Supported Systems::
+* Installation::
+* Limitations::
@end menu

@node Copyright, Description, Top, Top
@section Copyright

-This package is Copyright 2003-2008 by Wilson Snyder @email{wsnyder@@wsnyder.org}.
+This package is Copyright 2003-2010 by Wilson Snyder @email{wsnyder@@wsnyder.org}.

-You may distribute under the terms of either the GNU General Public License
-or the Artistic License, as specified in the Perl README file.
+Verilator is free software; you can redistribute it and/or modify it
+under the terms of either the GNU Lesser General Public License
+Version 3 or the Perl Artistic License Version 2.0.  (See the
+documentation for more details.)

-This code is provided with no warranty of any kind, and is used entirely at
-your own risk.
+This program is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.

@node Description, Obtaining Distribution, Copyright, Top
@section Description
@@ -45,7 +48,7 @@ Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
 reads the specified Verilog code, lints it, and optionally adds coverage
 code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
 it outputs .sp files for the SystemPerl preprocessor available at
-http://veripool.com.
+http://www.veripool.org.

 The resulting files are then compiled with C++.  The user writes a little
 C++ wrapper file, which instantiates the top level module.  This is
@@ -56,11 +59,11 @@ The resulting executable will perform the actual simulation.
@node Obtaining Distribution, Directory Structure, Description, Top
@section Obtaining Distribution

-The latest version is available at 
-@uref{http://veripool.com/verilator.htm}
+The latest version is available at
+@uref{http://www.veripool.org/verilator}

 Download the latest package from that site, and decompress.
-@samp{gunzip verilator_version.tar.gz ; tar xvf verilator_version.tar}
+@samp{tar xvzf verilator_version.tgz}

@node Directory Structure, Supported Systems, Obtaining Distribution, Top
@section Directory Structure
@@ -117,8 +120,8 @@ If you will be using SystemC, download and install Verilog-Perl,
 If you will be using SystemC, download and install System-Perl,
@url{http://search.cpan.org/search?module=SystemC::Netlist}.  Note
 you'll need to set a @samp{SYSTEMPERL} environment variable to point
-to the downloaded kit (not the installed files.)  Also, make sure to
-do a @code{make sc_patch}.
+to the downloaded kit.  Optionally also set @samp{SYSTEMPERL_INCLUDE}
+to point to the installed headers.

@item
@code{cd} to the Verilator directory containing this README.
@@ -129,8 +132,8 @@ Type @samp{./configure} to configure Verilator for your system.
 If you are configuring Verilator to be part of a RPM or other
 distribution package system, you may want to use the --enable-defenv
 configure flag.  This will take the current value of VERILATOR_ROOT,
-SYSTEMC, SYSTEMC_ARCH, and SYSTEMPERL and build them as defaults into
-the executable.
+SYSTEMC, SYSTEMC_ARCH, SYSTEMPERL, and SYSTEMPERL_INCLUDE and build
+them as defaults into the executable.

@item
 Type @samp{make} to compile Verilator.
@@ -1,3 +1,4 @@
+*~
 *.old
 config_build.h
 Makefile
@@ -1,15 +1,16 @@
-# $Id$ */
+# -*- Makefile -*-
 #*****************************************************************************
 #
 # DESCRIPTION: Verilator: Makefile for verilog source
 #
-# Code available from: http://www.veripool.com/verilator
+# Code available from: http://www.veripool.org/verilator
 #
 #*****************************************************************************
 #
-# Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+# Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
-# General Public License or the Perl Artistic License.
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
 #
 # Verilator is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -39,12 +40,15 @@ export OBJCACHE_HOSTS := $(shell rschedule --no-allow-reserved --similar hostnam
 endif
 endif

-ifeq ($(OBJCACHE_HOSTS),)
-export OBJCACHE := 
-else
+ifeq ($(OBJCACHE_JOBS),)
+ifneq ($(OBJCACHE_HOSTS),)
 export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
-export OBJCACHE := @objcache --read --write
 endif
+endif
+
+UNDER_GIT = $(wildcard ../.git/logs/HEAD)
+
+#*********************************************************************

 obj_opt:
 	mkdir $@
@@ -56,25 +60,26 @@ obj_dbg:
 opt: ../verilator_bin
 ifeq ($(VERILATOR_NO_OPT_BUILD),1)	# Faster laptop development... One build
 ../verilator_bin: ../verilator_bin_dbg
-	cp -p $< $@
-	@-cp -p $<.exe $@.exe
+	-rm -rf $@ $@.exe
+	-cp -p $< $@
+	-cp -p $<.exe $@.exe
 else
 ../verilator_bin: obj_opt prefiles
-	cd obj_opt && $(MAKE)                  TGT=../$@ -f ../Makefile_obj serial
+	cd obj_opt && $(MAKE) -j 1             TGT=../$@ -f ../Makefile_obj serial
 	cd obj_opt && $(MAKE) $(OBJCACHE_JOBS) TGT=../$@ -f ../Makefile_obj
 endif

 dbg: ../verilator_bin_dbg
 ../verilator_bin_dbg: obj_dbg prefiles
-	cd obj_dbg && $(MAKE)                  TGT=../$@ VL_DEBUG=1 -f ../Makefile_obj serial
+	cd obj_dbg && $(MAKE) -j 1             TGT=../$@ VL_DEBUG=1 -f ../Makefile_obj serial
 	cd obj_dbg && $(MAKE) $(OBJCACHE_JOBS) TGT=../$@ VL_DEBUG=1 -f ../Makefile_obj

 prefiles::

-ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
+ifneq ($(UNDER_GIT),)	# If local git tree... Else don't burden users
 prefiles:: config_rev.h
 # This output goes into srcdir, as we need to distribute it as part of the kit.
-config_rev.h:	config_rev.pl .svn/entries
+config_rev.h:	config_rev.pl ../.git/logs/HEAD
 	$(PERL) config_rev.pl . >$@
 endif

@@ -83,7 +88,6 @@ clean mostlyclean distclean maintainer-clean::
 	-rm -rf obj_* *.log *.dmp *.vpd core
 	-rm -f *.o *.d perlxsi.c *_gen_*
 	-rm -f *__gen*
-	-rm -f *.yy.* y.output y.tab.[cho] *_test
 	-rm -f .objcache*

 distclean maintainer-clean::
@@ -1,15 +1,16 @@
-# $Id$ -*- Makefile -*-
+# -*- Makefile -*-
 #*****************************************************************************
 #
 # DESCRIPTION: Verilator: Makefile for verilog source
 #
-# Code available from: http://www.veripool.com/verilator
+# Code available from: http://www.veripool.org/verilator
 #
 #*****************************************************************************
 #
-# Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+# Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
-# General Public License or the Perl Artistic License.
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
 #
 # Verilator is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -20,27 +21,49 @@

 #### Start of system configuration section. ####

-srcdir = ..
-incdir = ../../include
+# Unfortunately configure uses relative paths, and this makefile is called
+# from a level lower, so we need to move up if it's relative, not if absolute.
+config_srcdir = @srcdir@
+ifeq ($(config_srcdir),.)
+ srcdir = ..
+else  # Run an experiment
+ ifeq ($(shell -e $(config_srcdir)/../Makefile_obj.in),)
+   srcdir = $(config_srcdir)
+ else
+   srcdir = $(config_srcdir)/..
+ endif
+endif

-PERL = @PERL@
+incdir = $(srcdir)/../include
+# Bldsrc may differ from srcdir if configure wan't run from the kit top
+bldsrc = ..
+
+# Programs
 CC = @CC@
 CXX = @CXX@
 LINK = @CXX@
-
-LDFLAGS += @LDFLAGS@
-
-CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
+LEX = @LEX@
+LFLAGS = -d
+PERL = @PERL@
+YACC = @YACC@

 prefix = @prefix@

+# Directory in which to install data across multiple architectures
+datarootdir = @datarootdir@
+
 # Directory in which to install package specific files
 # Generally ${prefix}/share/verilator
 pkgdatadir = @pkgdatadir@

+# Compile options
+CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
+CPPFLAGSNOWALL += @CPPFLAGS@
+LDFLAGS += @LDFLAGS@
+
 #### End of system configuration section. ####

-VPATH += . $(srcdir)
+VPATH += . $(bldsrc) $(srcdir)
 TGT = ../../verilator_bin

 #################
@@ -56,18 +79,14 @@ COPT = -ggdb -DVL_DEBUG
 endif
 #################

-LEX = @LEX@
-LFLAGS = -d
-YACC = @YACC@
-YFLAGS = -y -d -v
-
 #LIBS += -ldl
 #CCMALLOC = /usr/local/lib/ccmalloc-gcc.o -lccmalloc -ldl

-LIBS = -lm -lfl
+# -lfl not needed as Flex invoked with %nowrap option
+LIBS = -lm

-CPPFLAGSNOWALL = -MMD
-CPPFLAGSNOWALL += -I. -I$(srcdir) -I$(incdir)
+CPPFLAGSNOWALL += -MMD
+CPPFLAGSNOWALL += -I. -I$(bldsrc) -I$(srcdir) -I$(incdir)
 CPPFLAGSNOWALL += -DYYDEBUG 	# Required to get nice error messages
 #CPPFLAGSNOWALL += -DVL_LEAK_CHECKS 	# If running valgrind or other hunting tool
 CPPFLAGSNOWALL += $(COPT)
@@ -78,12 +97,19 @@ CPPFLAGS += -W -Wall -Wno-unused-parameter -Wno-char-subscripts -Werror
 #CPPFLAGS += -pedantic-errors
 endif

+ifneq ($(SYSTEMPERL),)	# Intuit SYSTEMPERL_INCLUDE as it's new
+ SYSTEMPERL_INCLUDE ?= $(SYSTEMPERL)/src
+#else if set, leave as-is.
+#else if SYSTEMPERL="" don't set _INCLUDE so source will figure it out
+endif
+
 # Allow RPM builds to specify hardcoded data directories
 # To do this:
-ifneq ($(CFG_WITH_DEFENV),)
+ifeq ($(CFG_WITH_DEFENV),yes)
 CPPFLAGS += -DDEFENV_SYSTEMC=\"$(SYSTEMC)\"
 CPPFLAGS += -DDEFENV_SYSTEMC_ARCH=\"$(SYSTEMC_ARCH)\"
 CPPFLAGS += -DDEFENV_SYSTEMPERL=\"$(SYSTEMPERL)\"
+ CPPFLAGS += -DDEFENV_SYSTEMPERL_INCLUDE=\"$(SYSTEMPERL_INCLUDE)\"
 ifeq ($(VERILATOR_ROOT),)	# Use what we're given, or intuit
  CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(pkgdatadir)\"
 else
@@ -94,6 +120,8 @@ endif
 HEADERS = $(wildcard V*.h v*.h)

 ASTGEN = $(srcdir)/astgen
+BISONPRE = $(srcdir)/bisonpre
+FLEXFIX = $(srcdir)/flexfix

 ######################################################################
 #### Top level
@@ -106,7 +134,6 @@ make_info:
 clean mostlyclean distclean maintainer-clean::
 	-rm -f *.o *.d perlxsi.c *_gen_*
 	-rm -f *__gen*
-	-rm -f *.yy.* y.output y.tab.[cho] *_test
 	-rm -f obj_* .objcache*

 distclean maintainer-clean:: clean
@@ -130,12 +157,16 @@ RAW_OBJS = \
 	V3Broken.o \
 	V3Case.o \
 	V3Cast.o \
+	V3Cdc.o \
 	V3Changed.o \
 	V3Clean.o \
+	V3ClkGater.o \
 	V3Clock.o \
 	V3Combine.o \
+	V3Config.o \
 	V3Const__gen.o \
 	V3Coverage.o \
+	V3CoverageJoin.o \
 	V3Dead.o \
 	V3Delayed.o \
 	V3Depth.o \
@@ -164,8 +195,9 @@ RAW_OBJS = \
 	V3Link.o \
 	V3LinkCells.o \
 	V3LinkDot.o \
-	V3LinkLevel.o \
+	V3LinkJump.o \
 	V3LinkLValue.o \
+	V3LinkLevel.o \
 	V3LinkParse.o \
 	V3LinkResolve.o \
 	V3Localize.o \
@@ -178,6 +210,7 @@ RAW_OBJS = \
 	V3Premit.o \
 	V3Scope.o \
 	V3Signed.o \
+	V3Slice.o \
 	V3Split.o \
 	V3SplitAs.o \
 	V3Stats.o \
@@ -187,15 +220,18 @@ RAW_OBJS = \
 	V3Task.o \
 	V3Trace.o \
 	V3TraceDecl.o \
+	V3Tristate.o \
 	V3Unknown.o \
 	V3Unroll.o \
 	V3Width.o \
+	V3WidthSel.o \

 # Non-concatable
 OBJS += \
-	V3Parse.o \
+	V3ParseImp.o \
+	V3ParseGrammar.o \
+	V3ParseLex.o \
 	V3PreProc.o \
-	V3Read.o \

 #### Linking

@@ -214,15 +250,15 @@ $(TGT): V3Ast__gen_classes.h $(OBJS)
 	@echo "      Linking $@..."
 	-rm -rf $@ [email protected]
 	${LINK} ${LDFLAGS} -o $@ $(OBJS) $(CCMALLOC) ${LIBS}
-	@-cp [email protected] $@
-# ok if cp failes on linux, it's there to insure make works on NT
+	@-(cp [email protected] $@ || true)
+# ok if cp failes on linux, it's there to insure executable works on NT

 V3Number_test: V3Number_test.o
 	${LINK} ${LDFLAGS} -o $@ $^ ${LIBS}

 #### Modules

-%__gen.cpp:	%.cpp $(ASTGEN)
+%__gen.cpp:	%.cpp $(ASTGEN) V3Ast.h V3AstNodes.h
 	$(PERL) $(ASTGEN) -I$(srcdir) $*.cpp

 %.o:	%.cpp
@@ -230,10 +266,13 @@ V3Number_test: V3Number_test.o
 %.o:	%.c
 	$(OBJCACHE) ${CC}  ${CPPFLAGS} -c $<

-V3Read.o:	V3Read.cpp V3Lexer.yy.cpp
+V3ParseLex.o:	V3ParseLex.cpp V3Lexer.yy.cpp V3ParseBison.c
 	$(OBJCACHE) ${CXX} ${CPPFLAGSNOWALL} -c $<

-V3Parse.o:	V3Parse.cpp y.tab.c
+V3ParseGrammar.o:	V3ParseGrammar.cpp V3ParseBison.c
+	$(OBJCACHE) ${CXX} ${CPPFLAGSNOWALL} -c $<
+
+V3ParseImp.o:	V3ParseImp.cpp V3ParseBison.c
 	$(OBJCACHE) ${CXX} ${CPPFLAGSNOWALL} -c $<

 V3PreProc.o:	V3PreProc.cpp V3PreLex.yy.cpp
@@ -242,26 +281,31 @@ V3PreProc.o:	V3PreProc.cpp V3PreLex.yy.cpp
 #### Generated files

 # Target rule called before parallel build to make generated files
-serial:: V3Ast__gen_classes.h
+serial:: V3Ast__gen_classes.h V3ParseBison.c

 V3Ast__gen_classes.h : $(ASTGEN) V3Ast.h V3AstNodes.h
 	$(PERL) $(ASTGEN) -I$(srcdir)  --classes

-y.tab.c y.tab.h:	verilog.y $(HEADERS)
-	@echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer."
-	${YACC} ${YFLAGS} $<
+V3ParseBison.h: V3ParseBison.c

-V3Lexer_pregen.yy.cpp:	verilog.l y.tab.h $(HEADERS)
+# Have only one output file in this rule to prevent parallel make issues
+V3ParseBison.c: verilog.y $(BISONPRE)
+	@echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer."
+	$(PERL) $(BISONPRE) --yacc ${YACC} -d -v -o V3ParseBison.c $<
+
+V3Lexer_pregen.yy.cpp:	verilog.l V3ParseBison.h $(HEADERS)
+	${LEX} --version
 	${LEX} ${LFLAGS} -o$@ $<

-V3Lexer.yy.cpp:	V3Lexer_pregen.yy.cpp
-	$(PERL) $(srcdir)/flexfix <$< >$@
+V3Lexer.yy.cpp:	V3Lexer_pregen.yy.cpp $(FLEXFIX)
+	$(PERL) $(FLEXFIX) V3Lexer <$< >$@

 V3PreLex_pregen.yy.cpp:	V3PreLex.l $(HEADERS)
+	${LEX} --version
 	${LEX} ${LFLAGS} -o$@ $<

-V3PreLex.yy.cpp:	V3PreLex_pregen.yy.cpp
-	$(PERL) $(srcdir)/flexfix <$< >$@
+V3PreLex.yy.cpp: V3PreLex_pregen.yy.cpp $(FLEXFIX)
+	$(PERL) $(FLEXFIX) V3PreLex <$< >$@

 ######################################################################
 ######################################################################
@@ -270,4 +314,3 @@ DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
 include $(DEPS)
 endif
-
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity active domains
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Active's Transformations:
-//		
+//
 // Note this can be called multiple times.
 //   Create a IACTIVE(initial), SACTIVE(combo)
 //	ALWAYS: Remove any-edges from sense list
@@ -33,8 +33,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <map>
 #include <algorithm>
@@ -44,6 +44,7 @@
 #include "V3Active.h"
 #include "V3Ast.h"
 #include "V3EmitCBase.h"
+#include "V3Const.h"

 //***** See below for main transformation engine

@@ -52,7 +53,11 @@

 class ActiveBaseVisitor : public AstNVisitor {
 protected:
-    //int debug() { return 9; }
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
 };

 class ActiveNamer : public ActiveBaseVisitor {
@@ -78,8 +83,8 @@ private:
 	// Don't clear scopep, the namer persists beyond this visit
    }
    virtual void visit(AstSenTree* nodep, AstNUser*) {
-	// Sort sensitivity list
-	nodep->sortSenses();
+	// Simplify sensitivity list
+	V3Const::constifyExpensiveEdit(nodep); nodep=NULL;
    }
    // Empty visitors, speed things up
    virtual void visit(AstNodeStmt* nodep, AstNUser*) { }
@@ -130,7 +135,7 @@ public:
      found:
 	// Not found, form a new one
 	if (!activep) {
-	    AstSenTree* newsenp = sensesp->cloneTree(false)->castSenTree();
+	    AstSenTree* newsenp = sensesp->cloneTree(false);
 	    activep = new AstActive(fl, "sequent", newsenp);
 	    activep->sensesStorep(activep->sensesp());
 	    UINFO(8,"    New ACTIVE "<<activep<<endl);
@@ -186,10 +191,14 @@ public:
 class ActiveVisitor : public ActiveBaseVisitor {
 private:
    // NODE STATE
+    //  Each call to V3Const::constify
+    //   AstNode::user4()		Used by V3Const::constify, called below

    // STATE
    ActiveNamer	m_namer;	// Tracking of active names
    AstCFunc*   m_scopeFinalp;	// Final function for this scope
+    bool	m_itemCombo;	// Found a SenItem combo
+    bool	m_itemSequent;	// Found a SenItem sequential

    // VISITORS
    virtual void visit(AstScope* nodep, AstNUser*) {
@@ -224,6 +233,13 @@ private:
 	nodep->unlinkFrBack();
 	wantactivep->addStmtsp(nodep);
    }
+    virtual void visit(AstCoverToggle* nodep, AstNUser*) {
+	// Relink to CACTIVE, unless already under it
+	UINFO(4,"    COVERTOGGLE "<<nodep<<endl);
+	AstActive* wantactivep = m_namer.getCActive(nodep->fileline());
+	nodep->unlinkFrBack();
+	wantactivep->addStmtsp(nodep);
+    }
    virtual void visit(AstFinal* nodep, AstNUser*) {
 	// Relink to CFUNC for the final
 	UINFO(4,"    FINAL "<<nodep<<endl);
@@ -234,7 +250,7 @@ private:
 	if (!m_scopeFinalp) {
 	    m_scopeFinalp = new AstCFunc(nodep->fileline(), "_final", m_namer.scopep());
 	    m_scopeFinalp->argTypes(EmitCBaseVisitor::symClassVar());
-	    m_scopeFinalp->addInitsp(new AstCStmt(nodep->fileline(),"    "+EmitCBaseVisitor::symTopAssign()+"\n"));
+	    m_scopeFinalp->addInitsp(new AstCStmt(nodep->fileline(), EmitCBaseVisitor::symTopAssign()+"\n"));
 	    m_scopeFinalp->dontCombine(true);
 	    m_scopeFinalp->formCallTree(true);
 	    m_scopeFinalp->slow(true);
@@ -246,42 +262,26 @@ private:
 	nodep->deleteTree(); nodep = NULL;
    }

-    virtual void visit(AstAlways* nodep, AstNUser*) {
+    // METHODS
+    void visitAlways(AstNode* nodep, AstSenTree* oldsensesp) {
 	// Move always to appropriate ACTIVE based on its sense list
-	UINFO(4,"    ALW   "<<nodep<<endl);
-	//if (debug()>=9) nodep->dumpTree(cout,"  Alw: ");
-
-	if (!nodep->bodysp()) {
-	    // Empty always.  Kill it.
-	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
-	    return;
-	}
-	if (nodep->sensesp() && nodep->sensesp()->sensesp() && nodep->sensesp()->sensesp()->isNever()) {
+	if (oldsensesp
+	    && oldsensesp->sensesp()
+	    && oldsensesp->sensesp()->castSenItem()
+	    && oldsensesp->sensesp()->castSenItem()->isNever()) {
 	    // Never executing.  Kill it.
-	    if (nodep->sensesp()->sensesp()->nextp()) nodep->v3fatalSrc("Never senitem should be alone, else the never should be eliminated.");
+	    if (oldsensesp->sensesp()->nextp()) nodep->v3fatalSrc("Never senitem should be alone, else the never should be eliminated.");
 	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
 	    return;
 	}

 	// Read sensitivitues
-	bool combo = false;
-	bool sequent = false;
-	if (nodep->sensesp()) {
-	    for (AstSenItem* nextp, *senp = nodep->sensesp()->sensesp(); senp; senp=nextp) {
-		nextp = senp->nextp()->castSenItem();
-		if (senp->edgeType() == AstEdgeType::ANYEDGE) {
-		    combo = true;
-		    // Delete the sensitivity
-		    // We'll add it as a generic COMBO SenItem in a moment.
-		    senp->unlinkFrBack()->deleteTree(); senp=NULL;
-		} else if (senp->varrefp()) {
-		    if (senp->varrefp()->width()>1) senp->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
-								  <<senp->varrefp()->prettyName());
-		    sequent = true;
-		    senp->varrefp()->varp()->usedClock(true);
-		}
-	    }
-	}
+	m_itemCombo = false;
+	m_itemSequent = false;
+	oldsensesp->iterateAndNext(*this);
+	bool combo = m_itemCombo;
+	bool sequent = m_itemSequent;
+
 	if (!combo && !sequent) combo=true;	// If no list, Verilog 2000: always @ (*)
 #ifndef NEW_ORDERING
 	if (combo && sequent) {
@@ -300,15 +300,15 @@ private:
 	    // always (posedge RESET) { if (RESET).... }  we know RESET is true.
 	    // Summarize a long list of combo inputs as just "combo"
 #ifndef __COVERITY__ // Else dead code on next line.
-	    if (combo) nodep->sensesp()->addSensesp
+	    if (combo) oldsensesp->addSensesp
 			   (new AstSenItem(nodep->fileline(),AstSenItem::Combo()));
 #endif
-	    wantactivep = m_namer.getActive(nodep->fileline(), nodep->sensesp());
+	    wantactivep = m_namer.getActive(nodep->fileline(), oldsensesp);
 	}

 	// Delete sensitivity list
-	if (AstNode* oldsense = nodep->sensesp()) {
-	    oldsense->unlinkFrBackWithNext()->deleteTree(); oldsense=NULL;
+	if (oldsensesp) {
+	    oldsensesp->unlinkFrBackWithNext()->deleteTree(); oldsensesp=NULL;
 	}

 	// Move node to new active
@@ -320,6 +320,47 @@ private:
 	    ActiveDlyVisitor dlyvisitor (nodep);
 	}
    }
+    virtual void visit(AstAlways* nodep, AstNUser*) {
+	// Move always to appropriate ACTIVE based on its sense list
+	UINFO(4,"    ALW   "<<nodep<<endl);
+	//if (debug()>=9) nodep->dumpTree(cout,"  Alw: ");
+
+	if (!nodep->bodysp()) {
+	    // Empty always.  Kill it.
+	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
+	    return;
+	}
+	visitAlways(nodep, nodep->sensesp());
+    }
+    virtual void visit(AstAlwaysPublic* nodep, AstNUser*) {
+	// Move always to appropriate ACTIVE based on its sense list
+	UINFO(4,"    ALWPub   "<<nodep<<endl);
+	//if (debug()>=9) nodep->dumpTree(cout,"  Alw: ");
+	visitAlways(nodep, nodep->sensesp());
+    }
+    virtual void visit(AstSenGate* nodep, AstNUser*) {
+	AstSenItem* subitemp = nodep->sensesp();
+	if (subitemp->edgeType() != AstEdgeType::ET_ANYEDGE
+	    && subitemp->edgeType() != AstEdgeType::ET_POSEDGE
+	    && subitemp->edgeType() != AstEdgeType::ET_NEGEDGE) {
+	    nodep->v3fatalSrc("Strange activity type under SenGate");
+	}
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstSenItem* nodep, AstNUser*) {
+	if (nodep->edgeType() == AstEdgeType::ET_ANYEDGE) {
+	    m_itemCombo = true;
+	    // Delete the sensitivity
+	    // We'll add it as a generic COMBO SenItem in a moment.
+	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
+	} else if (nodep->varrefp()) {
+	    // V3LinkResolve should have cleaned most of these up
+	    if (nodep->varrefp()->width()>1) nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
+							    <<nodep->varrefp()->prettyName());
+	    m_itemSequent = true;
+	    nodep->varrefp()->varp()->usedClock(true);
+	}
+    }

    // Empty visitors, speed things up
    virtual void visit(AstNodeMath* nodep, AstNUser*) {}
@@ -330,8 +371,10 @@ private:
    }
 public:
    // CONSTUCTORS
-    ActiveVisitor(AstNode* nodep) {
+    ActiveVisitor(AstNetlist* nodep) {
 	m_scopeFinalp = NULL;
+	m_itemCombo = false;
+	m_itemSequent = false;
 	nodep->accept(*this);
    }
    virtual ~ActiveVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity block domains
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity active domains
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Active's Transformations:
-//		
+//
 // Note this can be called multiple times.
 //   Across all ACTIVES
 //	SenTrees are now under each ACTIVE statement, we want them global:
@@ -30,8 +30,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <vector>
@@ -40,6 +40,7 @@
 #include "V3ActiveTop.h"
 #include "V3Ast.h"
 #include "V3SenTree.h"
+#include "V3Const.h"

 //######################################################################
 // Active class functions
@@ -49,10 +50,20 @@ private:
    // NODE STATE
    //  Entire netlist
    //   AstNode::user()		bool. True if processed
+    //  Each call to V3Const::constify
+    //   AstNode::user4()		Used by V3Const::constify, called below
+    AstUser1InUse	m_inuser1;
+
    // STATE
    AstTopScope*	m_topscopep;	// Top scope for adding sentrees under
    SenTreeFinder	m_finder;	// Find global sentree's and add them
-    //int debug() { return 9; }
+
+    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }

    // VISITORS
    virtual void visit(AstTopScope* nodep, AstNUser*) {
@@ -61,7 +72,7 @@ private:
 	nodep->iterateChildren(*this);
 	m_topscopep = NULL;
    }
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	// Create required actives and add to module
 	// We can start ordering at a module, or a scope
 	UINFO(4," MOD   "<<nodep<<endl);
@@ -69,10 +80,12 @@ private:
    }
    virtual void visit(AstActive* nodep, AstNUser*) {
 	UINFO(4,"   ACTIVE "<<nodep<<endl);
+	V3Const::constifyExpensiveEdit(nodep); // Remove duplicate clocks and such; sensesp() may change!
 	AstSenTree* sensesp = nodep->sensesp();
 	if (!sensesp) nodep->v3fatalSrc("NULL");
-	sensesp->sortSenses();	// Remove duplicate clocks and such
-	if (sensesp->sensesp() && sensesp->sensesp()->isNever()) {
+	if (sensesp->sensesp()
+	    && sensesp->sensesp()->castSenItem()
+	    && sensesp->sensesp()->castSenItem()->isNever()) {
 	    // Never executing.  Kill it.
 	    if (sensesp->sensesp()->nextp()) nodep->v3fatalSrc("Never senitem should be alone, else the never should be eliminated.");
 	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
@@ -120,6 +133,9 @@ private:
    virtual void visit(AstAlways* nodep, AstNUser*) {
 	nodep->v3fatalSrc("Node should have been under ACTIVE");
    }
+    virtual void visit(AstAlwaysPublic* nodep, AstNUser*) {
+	nodep->v3fatalSrc("Node should have been under ACTIVE");
+    }
    virtual void visit(AstFinal* nodep, AstNUser*) {
 	nodep->v3fatalSrc("Node should have been deleted");
    }
@@ -134,7 +150,6 @@ public:
    // CONSTUCTORS
    ActiveTopVisitor(AstNetlist* nodep) {
 	m_topscopep = NULL;
-	AstNode::userClearTree();
 	nodep->accept(*this);
    }
    virtual ~ActiveTopVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity block domains
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Collect and print statistics
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2005-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -21,8 +21,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <map>
 #include <iomanip>
@@ -41,9 +41,11 @@ private:
    // NODE STATE/TYPES
    // Cleared on netlist
    //  AstNode::user()		-> bool.  True if processed
+    AstUser1InUse	m_inuser1;

    // STATE
-    AstModule*	m_modp;		// Last module
+    AstNodeModule*	m_modp;		// Last module
+    AstBegin*	m_beginp;	// Last begin
    V3Double0	m_statAsCover;	// Statistic tracking
    V3Double0	m_statAsPsl;	// Statistic tracking
    V3Double0	m_statAsFull;	// Statistic tracking
@@ -58,13 +60,13 @@ private:
 		+"\\n");
    }
    void replaceDisplay(AstDisplay* nodep, const string& prefix) {
-	nodep->displayType(AstDisplayType::WRITE);
-	nodep->text(assertDisplayMessage(nodep, prefix, nodep->text()));
-	AstNode* timesp = nodep->exprsp(); if (timesp) timesp->unlinkFrBack();
+	nodep->displayType(AstDisplayType::DT_WRITE);
+	nodep->fmtp()->text(assertDisplayMessage(nodep, prefix, nodep->fmtp()->text()));
+	AstNode* timesp = nodep->fmtp()->exprsp(); if (timesp) timesp->unlinkFrBack();
 	timesp = timesp->addNext(new AstTime(nodep->fileline()));
-	nodep->exprsp(timesp);
-	if (!nodep->scopeNamep() && nodep->name().find("%m") != string::npos) {
-	    nodep->scopeNamep(new AstScopeName(nodep->fileline()));
+	nodep->fmtp()->exprsp(timesp);
+	if (!nodep->fmtp()->scopeNamep() && nodep->fmtp()->formatScopeTracking()) {
+	    nodep->fmtp()->scopeNamep(new AstScopeName(nodep->fileline()));
 	}
    }

@@ -76,7 +78,7 @@ private:
 			  // This allows syntax errors and such to be detected normally.
 			  (v3Global.opt.assertOn()
 			   ? (AstNode*)(new AstCMath(nodep->fileline(), "Verilated::assertOn()", 1))
-			   : (AstNode*)(new AstConst(nodep->fileline(), V3Number(nodep->fileline(), 1, 0)))),
+			   : (AstNode*)(new AstConst(nodep->fileline(), AstConst::LogicFalse()))),
 			  nodep, NULL);
    }

@@ -87,13 +89,13 @@ private:
 			  // If assertions are off, have constant propagation rip them out later
 			  // This allows syntax errors and such to be detected normally.
 			  (v3Global.opt.coverage()
-			   ? (AstNode*)(new AstConst(nodep->fileline(), V3Number(nodep->fileline(), 1, 1)))
-			   : (AstNode*)(new AstConst(nodep->fileline(), V3Number(nodep->fileline(), 1, 0)))),
+			   ? (AstNode*)(new AstConst(nodep->fileline(), AstConst::LogicTrue()))
+			   : (AstNode*)(new AstConst(nodep->fileline(), AstConst::LogicFalse()))),
 			  nodep, NULL);
    }

    AstNode* newFireAssert(AstNode* nodep, const string& message) {
-	AstDisplay* dispp = new AstDisplay (nodep->fileline(), AstDisplayType::ERROR, message, NULL, NULL);
+	AstDisplay* dispp = new AstDisplay (nodep->fileline(), AstDisplayType::DT_ERROR, message, NULL, NULL);
 	AstNode* bodysp = dispp;
 	replaceDisplay(dispp, "%%Error");   // Convert to standard DISPLAY format
 	bodysp->addNext(new AstStop (nodep->fileline()));
@@ -101,19 +103,21 @@ private:
 	return bodysp;
    }

-    void newPslAssertion(AstNode* nodep, AstNode* propp, AstSenTree* sentreep, const string& message) {
+    void newPslAssertion(AstNode* nodep, AstNode* propp, AstSenTree* sentreep,
+			 AstNode* stmtsp, const string& message) {
 	propp->unlinkFrBack();
 	sentreep->unlinkFrBack();
+	if (stmtsp) stmtsp->unlinkFrBack();
 	//
 	AstNode* bodysp = NULL;
-	bool selfDestruct = false;	
+	bool selfDestruct = false;
 	if (AstPslCover* snodep = nodep->castPslCover()) {
 	    if (!v3Global.opt.coverageUser()) {
 		selfDestruct = true;
 	    } else {
 		// V3Coverage assigned us a bucket to increment.
 		AstCoverInc* covincp = snodep->coverincp()->castCoverInc();
-		if (!covincp) snodep->v3fatalSrc("Missing coverage in PSL");
+		if (!covincp) snodep->v3fatalSrc("Missing AstCoverInc under assertion");
 		covincp->unlinkFrBack();
 		if (message!="") covincp->declp()->comment(message);
 		bodysp = covincp;
@@ -127,9 +131,10 @@ private:
 	} else {
 	    nodep->v3fatalSrc("Unknown node type");
 	}
+	if (stmtsp) bodysp = bodysp->addNext(stmtsp);
 	AstIf* ifp = new AstIf (nodep->fileline(), propp, bodysp, NULL);
 	bodysp = ifp;
-	if (nodep->castPslAssert()) ifp->branchPred(AstBranchPred::UNLIKELY);
+	if (nodep->castPslAssert()) ifp->branchPred(AstBranchPred::BP_UNLIKELY);
 	//
 	AstNode* newp = new AstAlways (nodep->fileline(),
 				       sentreep,
@@ -161,7 +166,7 @@ private:

 	AstIf* ifp = new AstIf (nodep->fileline(), propp, passsp, failsp);
 	AstNode* newp = ifp;
-	if (nodep->castVAssert()) ifp->branchPred(AstBranchPred::UNLIKELY);
+	if (nodep->castVAssert()) ifp->branchPred(AstBranchPred::BP_UNLIKELY);
 	//
 	// Install it
 	nodep->replaceWith(newp);
@@ -172,8 +177,7 @@ private:
    // VISITORS  //========== Case assertions
    virtual void visit(AstCase* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	if (!nodep->user()) {
-	    nodep->user(true);
+	if (!nodep->user1Inc()) {
 	    bool has_default=false;
 	    for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
 		if (itemp->isDefault()) has_default=true;
@@ -210,7 +214,7 @@ private:
 					    new AstLogNot (nodep->fileline(), ohot),
 					    newFireAssert(nodep, "synthesis parallel_case, but multiple matches found"),
 					    NULL);
-		    ifp->branchPred(AstBranchPred::UNLIKELY);
+		    ifp->branchPred(AstBranchPred::BP_UNLIKELY);
 		    nodep->addNotParallelp(ifp);
 		}
 	    }
@@ -221,24 +225,27 @@ private:
    virtual void visit(AstDisplay* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	// Replace the special types with standard text
-	if (nodep->displayType()==AstDisplayType::INFO) {
+	if (nodep->displayType()==AstDisplayType::DT_INFO) {
 	    replaceDisplay(nodep, "-Info");
-	} else if (nodep->displayType()==AstDisplayType::WARNING) {
+	} else if (nodep->displayType()==AstDisplayType::DT_WARNING) {
 	    replaceDisplay(nodep, "%%Warning");
-	} else if (nodep->displayType()==AstDisplayType::ERROR
-		   || nodep->displayType()==AstDisplayType::FATAL) {
+	} else if (nodep->displayType()==AstDisplayType::DT_ERROR
+		   || nodep->displayType()==AstDisplayType::DT_FATAL) {
 	    replaceDisplay(nodep, "%%Error");
 	}
    }

    virtual void visit(AstPslCover* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	newPslAssertion(nodep, nodep->propp(), nodep->sentreep(), nodep->name()); nodep=NULL;
+	if (m_beginp && nodep->name() == "") nodep->name(m_beginp->name());
+	newPslAssertion(nodep, nodep->propp(), nodep->sentreep(),
+			nodep->stmtsp(), nodep->name()); nodep=NULL;
 	m_statAsCover++;
    }
    virtual void visit(AstPslAssert* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	newPslAssertion(nodep, nodep->propp(), nodep->sentreep(), nodep->name()); nodep=NULL;
+	newPslAssertion(nodep, nodep->propp(), nodep->sentreep(),
+			NULL, nodep->name()); nodep=NULL;
 	m_statAsPsl++;
    }
    virtual void visit(AstVAssert* nodep, AstNUser*) {
@@ -247,13 +254,23 @@ private:
 	m_statAsSV++;
    }

-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	m_modp = nodep;
 	//
 	nodep->iterateChildren(*this);
 	// Reset defaults
 	m_modp = NULL;
    }
+    virtual void visit(AstBegin* nodep, AstNUser*) {
+	// This code is needed rather than a visitor in V3Begin,
+	// because V3Assert is called before V3Begin
+	AstBegin* lastp = m_beginp;
+	{
+	    m_beginp = nodep;
+	    nodep->iterateChildren(*this);
+	}
+	m_beginp = lastp;
+    }

    // VISITORS  //========== Temporal Layer

@@ -269,9 +286,9 @@ private:
 public:
    // CONSTRUCTORS
    AssertVisitor(AstNetlist* nodep) {
+	m_beginp = NULL;
 	m_modp = NULL;
 	// Process
-	AstNode::userClearTree();	// userp() used on entire tree
 	nodep->accept(*this);
    }
    virtual ~AssertVisitor() {
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Assertion expansion
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2005-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Collect and print statistics
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2005-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -24,8 +24,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <map>
 #include <iomanip>
@@ -45,22 +45,33 @@ private:
    // NODE STATE/TYPES
    // STATE
    // Reset each module:
-    AstSenItem*	m_seniDefaultp;	// Default sensitivity (from AstDefClock)
+    AstNodeSenItem*	m_seniDefaultp;	// Default sensitivity (from AstDefClock)
    // Reset each assertion:
-    AstSenItem*	m_senip;	// Last sensitivity
-
-    int debug() { return 0; }
+    AstNodeSenItem*	m_senip;	// Last sensitivity

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    AstSenTree* newSenTree(AstNode* nodep) {
 	// Create sentree based on clocked or default clock
 	// Return NULL for always
 	AstSenTree* newp = NULL;
-	AstSenItem* senip = m_senip ? m_senip : m_seniDefaultp;
-	if (senip) newp = new AstSenTree(nodep->fileline(), senip->cloneTree(true));
-	if (!senip) nodep->v3error("Unsupported: Unclocked assertion");
+	AstNodeSenItem* senip = m_senip ? m_senip : m_seniDefaultp;
+	if (!senip) {
+	    nodep->v3error("Unsupported: Unclocked assertion");
+	    newp = new AstSenTree(nodep->fileline(), NULL);
+	} else {
+	    newp = new AstSenTree(nodep->fileline(), senip->cloneTree(true));
+	}
 	return newp;
    }
+    void clearAssertInfo() {
+	m_senip = NULL;
+    }

    // VISITORS  //========== Statements
    virtual void visit(AstPslDefClock* nodep, AstNUser*) {
@@ -71,33 +82,52 @@ private:
 	nodep->unlinkFrBack();
 	pushDeletep(nodep); nodep=NULL;
    }
+    virtual void visit(AstClocking* nodep, AstNUser*) {
+	UINFO(8,"   CLOCKING"<<nodep<<endl);
+	// Store the new default clock, reset on new module
+	m_seniDefaultp = nodep->sensesp();
+	// Trash it, keeping children
+	if (nodep->bodysp()) {
+	    nodep->replaceWith(nodep->bodysp()->unlinkFrBack());
+	} else {
+	    nodep->unlinkFrBack();
+	}
+	pushDeletep(nodep); nodep=NULL;
+    }

    virtual void visit(AstPslCover* nodep, AstNUser*) {
-	// Prep
-	m_senip = NULL;
+	if (nodep->sentreep()) return;  // Already processed
+	clearAssertInfo();
 	nodep->iterateChildren(*this);
 	nodep->sentreep(newSenTree(nodep));
-	m_senip = NULL;
+	clearAssertInfo();
    }
    virtual void visit(AstPslAssert* nodep, AstNUser*) {
-	// Prep
-	m_senip = NULL;
+	if (nodep->sentreep()) return;  // Already processed
+	clearAssertInfo();
 	nodep->iterateChildren(*this);
 	nodep->sentreep(newSenTree(nodep));
-	m_senip = NULL;
+	clearAssertInfo();
    }
    virtual void visit(AstPslClocked* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	if (m_senip) {
-	    nodep->v3error("Unsupported: Only one PSL clock allowed per assertion\n");
+	    nodep->v3error("Unsupported: Only one PSL clock allowed per assertion");
+	}
+	// Block is the new expression to evaluate
+	AstNode* blockp = nodep->propp()->unlinkFrBack();
+	if (nodep->disablep()) {
+	    blockp = new AstAnd(nodep->disablep()->fileline(),
+				new AstNot(nodep->disablep()->fileline(),
+					   nodep->disablep()->unlinkFrBack()),
+				blockp);
 	}
 	// Unlink and just keep a pointer to it, convert to sentree as needed
-	AstNode* blockp = nodep->propp()->unlinkFrBack();
 	m_senip = nodep->sensesp();
 	nodep->replaceWith(blockp);
 	pushDeletep(nodep); nodep=NULL;
    }
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	// Reset defaults
 	m_seniDefaultp = NULL;
@@ -109,8 +139,8 @@ private:
 public:
    // CONSTRUCTORS
    AssertPreVisitor(AstNetlist* nodep) {
-	m_senip = NULL;
 	m_seniDefaultp = NULL;
+	clearAssertInfo();
 	// Process
 	nodep->accept(*this);
    }
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Assertion pre-expansion
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2005-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Ast node structures
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,8 +19,8 @@
 //
 //*************************************************************************

-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <fstream>
 #include <iomanip>
 #include <memory>
@@ -33,18 +33,24 @@
 //======================================================================
 // Statics

-vluint64_t AstNode::s_editCntGbl=0;
 vluint64_t AstNode::s_editCntLast=0;
+vluint64_t AstNode::s_editCntGbl=0;	// Hot cache line

 // To allow for fast clearing of all user pointers, we keep a "timestamp"
 // along with each userp, and thus by bumping this count we can make it look
 // as if we iterated across the entire tree to set all the userp's to null.
 int AstNode::s_cloneCntGbl=0;
-int AstNode::s_userCntGbl=0;
-int AstNode::s_user2CntGbl=0;
-int AstNode::s_user3CntGbl=0;
-int AstNode::s_user4CntGbl=0;
-int AstNode::s_user5CntGbl=0;
+uint32_t AstUser1InUse::s_userCntGbl=0;	// Hot cache line, leave adjacent
+uint32_t AstUser2InUse::s_userCntGbl=0;	// Hot cache line, leave adjacent
+uint32_t AstUser3InUse::s_userCntGbl=0;	// Hot cache line, leave adjacent
+uint32_t AstUser4InUse::s_userCntGbl=0;	// Hot cache line, leave adjacent
+uint32_t AstUser5InUse::s_userCntGbl=0;	// Hot cache line, leave adjacent
+
+bool AstUser1InUse::s_userBusy=false;
+bool AstUser2InUse::s_userBusy=false;
+bool AstUser3InUse::s_userBusy=false;
+bool AstUser4InUse::s_userBusy=false;
+bool AstUser5InUse::s_userBusy=false;

 //######################################################################
 // V3AstType
@@ -71,8 +77,8 @@ void AstNode::init() {
    m_signed = false;
    m_width = 0;
    m_widthMin = 0;
-    m_userp = NULL;
-    m_userCnt = 0;
+    m_user1p = NULL;
+    m_user1Cnt = 0;
    m_user2p = NULL;
    m_user2Cnt = 0;
    m_user3p = NULL;
@@ -84,19 +90,40 @@ void AstNode::init() {
 }

 string AstNode::encodeName(const string& namein) {
-    string name2 = namein;
+    // Encode signal name raw from parser, then not called again on same signal
+    const char* start = namein.c_str();
    string out;
-    for (string::iterator pos = name2.begin(); pos != name2.end(); pos++) {
-	if (pos[0]=='_' && pos[1]=='_') {
-	    out += "__ULUL_";
-	    pos++;
-	} else {
+    for (const char* pos = start; *pos; pos++) {
+	if ((pos==start) ? isalpha(pos[0])  // digits can't lead identifiers
+	    : isalnum(pos[0])) {
 	    out += pos[0];
+	} else if (pos[0]=='_') {
+	    if (pos[1]=='_') {
+		out += "_"; out += "__05F";  // hex(_) = 0x5F
+		pos++;
+	    } else {
+		out += pos[0];
+	    }
+	} else {
+	    // Need the leading 0 so this will never collide with
+	    // a user identifier nor a temp we create in Verilator.
+	    // We also do *NOT* use __DOT__ etc, as we search for those
+	    // in some replacements, and don't want to mangle the user's names.
+	    char hex[10]; sprintf(hex,"__0%02X",pos[0]);
+	    out += hex;
 	}
    }
    return out;
 }

+string AstNode::encodeNumber(vlsint64_t num) {
+    if (num < 0) {
+	return "__02D"+cvtToStr(-num);  // 2D=-
+    } else {
+	return cvtToStr(num);
+    }
+}
+
 string AstNode::shortName() const {
    string pretty = name();
    string::size_type pos;
@@ -116,22 +143,86 @@ string AstNode::dedotName(const string& namein) {
    return pretty;
 }

-string AstNode::prettyName(const string& namein) {
+string AstNode::vcdName(const string& namein) {
+    // VCD tracing expects space to separate hierarchy
+    // Dots are reserved for dots the user put in the name
    string pretty = namein;
    string::size_type pos;
-    while ((pos=pretty.find("__BRA__")) != string::npos) {
-	pretty.replace(pos, 7, "[");
+    while ((pos=pretty.find("__DOT__")) != string::npos) {
+	pretty.replace(pos, 7, " ");
    }
-    while ((pos=pretty.find("__KET__")) != string::npos) {
-	pretty.replace(pos, 7, "]");
+    while ((pos=pretty.find(".")) != string::npos) {
+	pretty.replace(pos, 1, " ");
    }
-    while ((pos=pretty.find("__PVT__")) != string::npos) {
-	pretty.replace(pos, 7, "");
+    // Now convert escaped special characters, etc
+    return prettyName(pretty);
+}
+
+string AstNode::prettyName(const string& namein) {
+    string pretty;
+    pretty = "";
+    for (const char* pos = namein.c_str(); *pos; ) {
+	if (0==strncmp(pos,"__BRA__",7)) {
+	    pretty += "[";
+	    pos += 7;
+	}
+	else if (0==strncmp(pos,"__KET__",7)) {
+	    pretty += "]";
+	    pos += 7;
+	}
+	else if (0==strncmp(pos,"__DOT__",7)) {
+	    pretty += ".";
+	    pos += 7;
+	}
+	else if (0==strncmp(pos,"__PVT__",7)) {
+	    pretty += "";
+	    pos += 7;
+	}
+	else if (pos[0]=='_' && pos[1]=='_' && pos[2]=='0'
+		 && isxdigit(pos[3]) && isxdigit(pos[4])) {
+	    char value = 0;
+	    value += 16*(isdigit(pos[3]) ? (pos[3]-'0') : (tolower(pos[3])-'a'+10));
+	    value +=    (isdigit(pos[4]) ? (pos[4]-'0') : (tolower(pos[4])-'a'+10));
+	    pretty += value;
+	    pos += 5;
+	}
+	else {
+	    pretty += pos[0];
+	    pos++;
+	}
    }
-    while ((pos=pretty.find("__ULUL_")) != string::npos) {
-	pretty.replace(pos, 7, "");
+    if (pretty.substr(0,4) == "TOP.") pretty.replace(0,4,"");
+    return pretty;
+}
+
+string AstNode::prettyTypeName() const {
+    if (name()=="") return typeName();
+    return string(typeName())+" '"+prettyName()+"'";
+}
+
+string AstNode::quoteName(const string& namein) {
+    // Encode control chars into C style escapes
+    // Reverse is V3Parse::deQuote
+    const char* start = namein.c_str();
+    string out;
+    for (const char* pos = start; *pos; pos++) {
+	if (pos[0]=='\\' || pos[0]=='"') {
+	    out += string("\\")+pos[0];
+	} else if (pos[0]=='\n') {
+	    out += "\\n";
+	} else if (pos[0]=='\r') {
+	    out += "\\r";
+	} else if (pos[0]=='\t') {
+	    out += "\\t";
+	} else if (isprint(pos[0])) {
+	    out += pos[0];
+	} else {
+	    // This will also cover \a etc
+	    char octal[10]; sprintf(octal,"\\%03o",pos[0]);
+	    out += octal;
+	}
    }
-    return AstNode::dedotName(pretty);
+    return out;
 }

 int AstNode::widthPow2() const {
@@ -255,8 +346,8 @@ void AstNode::addNextHere(AstNode* newp) {
 void AstNode::setOp1p(AstNode* newp) {
    UASSERT(newp,"Null item passed to setOp1p\n");
    UDEBUGONLY(if (m_op1p) this->v3fatalSrc("Adding to non-empty, non-list op1"););
-    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node");); 
-    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op1");); 
+    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
+    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op1"););
    this->debugTreeChange("-setOp1pThs: ", __LINE__, false);
    newp->debugTreeChange("-setOp1pNew: ", __LINE__, true);
    m_op1p = newp;
@@ -268,8 +359,8 @@ void AstNode::setOp1p(AstNode* newp) {
 void AstNode::setOp2p(AstNode* newp) {
    UASSERT(newp,"Null item passed to setOp2p\n");
    UDEBUGONLY(if (m_op2p) this->v3fatalSrc("Adding to non-empty, non-list op2"););
-    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node");); 
-    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op2");); 
+    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
+    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op2"););
    this->debugTreeChange("-setOp2pThs: ", __LINE__, false);
    newp->debugTreeChange("-setOp2pNew: ", __LINE__, true);
    m_op2p = newp;
@@ -281,8 +372,8 @@ void AstNode::setOp2p(AstNode* newp) {
 void AstNode::setOp3p(AstNode* newp) {
    UASSERT(newp,"Null item passed to setOp3p\n");
    UDEBUGONLY(if (m_op3p) this->v3fatalSrc("Adding to non-empty, non-list op3"););
-    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node");); 
-    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op3");); 
+    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
+    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op3"););
    this->debugTreeChange("-setOp3pThs: ", __LINE__, false);
    newp->debugTreeChange("-setOp3pNew: ", __LINE__, true);
    m_op3p = newp;
@@ -294,8 +385,8 @@ void AstNode::setOp3p(AstNode* newp) {
 void AstNode::setOp4p(AstNode* newp) {
    UASSERT(newp,"Null item passed to setOp4p\n");
    UDEBUGONLY(if (m_op4p) this->v3fatalSrc("Adding to non-empty, non-list op4"););
-    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node");); 
-    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op4");); 
+    UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
+    UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op4"););
    this->debugTreeChange("-setOp4pThs: ", __LINE__, false);
    newp->debugTreeChange("-setOp4pNew: ", __LINE__, true);
    m_op4p = newp;
@@ -512,6 +603,23 @@ void AstNode::relinkOneLink(AstNode*& pointpr,  // Ref to pointer that gets set
    pointpr = newp;
 }

+void AstNode::addHereThisAsNext (AstNode* newp) {
+    // {old}->this->{next} becomes {old}->new->this->{next}
+    AstNRelinker handle;
+    this->unlinkFrBackWithNext(&handle);
+    newp->addNext(this);
+    handle.relink(newp);
+}
+
+void AstNode::swapWith (AstNode* bp) {
+    AstNRelinker aHandle;
+    AstNRelinker bHandle;
+    this->unlinkFrBack(&aHandle);
+    bp->unlinkFrBack(&bHandle);
+    aHandle.relink(bp);
+    bHandle.relink(this);
+}
+
 //======================================================================
 // Clone

@@ -589,14 +697,17 @@ AstNode::~AstNode() {

 void AstNode::deleteTreeIter() {
    if (!this) return;
-    // MUST be depth first!
-    this->m_op1p->deleteTreeIter();
-    this->m_op2p->deleteTreeIter();
-    this->m_op3p->deleteTreeIter();
-    this->m_op4p->deleteTreeIter();
-    this->m_nextp->deleteTreeIter();
-    this->m_backp = NULL;
-    deleteNode();
+    for (AstNode* nodep=this, *nnextp; nodep; nodep=nnextp) {
+	nnextp = nodep->m_nextp;
+	// MUST be depth first!
+	nodep->m_op1p->deleteTreeIter();
+	nodep->m_op2p->deleteTreeIter();
+	nodep->m_op3p->deleteTreeIter();
+	nodep->m_op4p->deleteTreeIter();
+	nodep->m_nextp = NULL;
+	nodep->m_backp = NULL;
+	nodep->deleteNode();
+    }
 }

 void AstNode::deleteTree() {
@@ -631,11 +742,42 @@ void AstNode::operator delete(void* objp, size_t size) {
 // Iterators

 void AstNode::iterateChildren(AstNVisitor& v, AstNUser* vup) {
+    // This is a very hot function
    if (!this) return;
-    m_op1p->iterateAndNext(v, vup);
-    m_op2p->iterateAndNext(v, vup);
-    m_op3p->iterateAndNext(v, vup);
-    m_op4p->iterateAndNext(v, vup);
+    ASTNODE_PREFETCH(m_op1p);
+    ASTNODE_PREFETCH(m_op2p);
+    ASTNODE_PREFETCH(m_op3p);
+    ASTNODE_PREFETCH(m_op4p);
+    // if () not needed since iterateAndNext accepts null this, but faster with it.
+    if (m_op1p) m_op1p->iterateAndNext(v, vup);
+    if (m_op2p) m_op2p->iterateAndNext(v, vup);
+    if (m_op3p) m_op3p->iterateAndNext(v, vup);
+    if (m_op4p) m_op4p->iterateAndNext(v, vup);
+}
+
+void AstNode::iterateAndNext(AstNVisitor& v, AstNUser* vup) {
+    // This is a very hot function
+    // IMPORTANT: If you replace a node that's the target of this iterator,
+    // then the NEW node will be iterated on next, it isn't skipped!
+    // if (!this) return;  // Part of for()
+    // Future versions of this function may require the node to have a back to be iterated;
+    // there's no lower level reason yet though the back must exist.
+    AstNode* nodep=this;
+    if (VL_UNLIKELY(nodep && !nodep->m_backp)) nodep->v3fatalSrc("iterateAndNext node has no back");
+    while (nodep) {
+	AstNode* niterp = nodep;
+	ASTNODE_PREFETCH(nodep->m_nextp);
+	niterp->m_iterpp = &niterp;
+	niterp->accept(v, vup);
+	// accept may do a replaceNode and change niterp on us...
+	if (!niterp) return;
+	niterp->m_iterpp = NULL;
+	if (VL_UNLIKELY(niterp!=nodep)) { // Edited it
+	    nodep = niterp;
+	} else {  // Same node, just loop
+	    nodep = niterp->m_nextp;
+	}
+    }
 }

 void AstNode::iterateListBackwards(AstNVisitor& v, AstNUser* vup) {
@@ -644,7 +786,7 @@ void AstNode::iterateListBackwards(AstNVisitor& v, AstNUser* vup) {
    while (nodep->m_nextp) nodep=nodep->m_nextp;
    while (nodep) {
 	// Edits not supported: nodep->m_iterpp = &nodep;
-  	nodep->accept(v, vup);
+	nodep->accept(v, vup);
 	if (nodep->backp()->m_nextp == nodep) nodep=nodep->backp();
 	else nodep = NULL;  // else: backp points up the tree.
    }
@@ -658,45 +800,63 @@ void AstNode::iterateChildrenBackwards(AstNVisitor& v, AstNUser* vup) {
    this->op4p()->iterateListBackwards(v,vup);
 }

-void AstNode::iterateAndNext(AstNVisitor& v, AstNUser* vup) {
-    // IMPORTANT: If you replace a node that's the target of this iterator,
-    // then the NEW node will be iterated on next, it isn't skipped!
-    // if (!this) return;  // Part of for()
-    for (AstNode* nodep=this; nodep;) {
-	AstNode* niterp = nodep;
-	niterp->m_iterpp = &niterp;
-  	niterp->accept(v, vup);
-	// accept may do a replaceNode and change niterp on us...
-	if (!niterp) return;
-	niterp->m_iterpp = NULL;
-	if (niterp!=nodep) { // Edited it
-	    nodep = niterp;
-	} else {  // Same node, just loop
-	    nodep = niterp->m_nextp;
-	}
-    }
-}
-
 void AstNode::iterateAndNextIgnoreEdit(AstNVisitor& v, AstNUser* vup) {
    // Keep following the current list even if edits change it
    if (!this) return;
    for (AstNode* nodep=this; nodep; ) {
 	AstNode* nnextp = nodep->m_nextp;
-  	nodep->accept(v, vup);
+	nodep->accept(v, vup);
 	nodep = nnextp;
    }
 }

+AstNode* AstNode::acceptSubtreeReturnEdits(AstNVisitor& v, AstNUser* vup) {
+    // Some visitors perform tree edits (such as V3Const), and may even
+    // replace/delete the exact nodep that the visitor is called with.  If
+    // this happens, the parent will loose the handle to the node that was
+    // processed.
+    // To solve this, this function returns the pointer to the replacement node,
+    // which in many cases is just the same node that was passed in.
+    AstNode* nodep = this;  // Note "this" may point to bogus point later in this function
+    if (nodep->castNetlist()) {
+	// Calling on top level; we know the netlist won't get replaced
+	nodep->accept(v, vup);
+    } else if (!nodep->backp()) {
+	// Calling on standalone tree; insert a shim node so we can keep track, then delete it on completion
+	AstBegin* tempp = new AstBegin(nodep->fileline(),"[EditWrapper]",nodep);
+	{
+	    tempp->stmtsp()->accept(v, vup);  nodep=NULL; // nodep to null as may be replaced
+	}
+	nodep = tempp->stmtsp()->unlinkFrBackWithNext();
+	tempp->deleteTree(); tempp=NULL;
+    } else {
+	// Use back to determine who's pointing at us (IE assume new node grafts into same place as old one)
+	AstNode** nextnodepp = NULL;
+	if (this->m_backp->m_op1p == this) nextnodepp = &(this->m_backp->m_op1p);
+	else if (this->m_backp->m_op2p == this) nextnodepp = &(this->m_backp->m_op2p);
+	else if (this->m_backp->m_op3p == this) nextnodepp = &(this->m_backp->m_op3p);
+	else if (this->m_backp->m_op4p == this) nextnodepp = &(this->m_backp->m_op4p);
+	else if (this->m_backp->m_nextp == this) nextnodepp = &(this->m_backp->m_nextp);
+	if (!nextnodepp) this->v3fatalSrc("Node's back doesn't point to forward to node itself");
+	{
+	    nodep->accept(v, vup); nodep=NULL; // nodep to null as may be replaced
+	}
+	nodep = *nextnodepp;  // Grab new node from point where old was connected
+    }
+    return nodep;
+}
+
 //======================================================================

 void AstNode::cloneRelinkTree() {
    if (!this) return;
-    this->cloneRelink();
-    m_op1p->cloneRelinkTree();
-    m_op2p->cloneRelinkTree();
-    m_op3p->cloneRelinkTree();
-    m_op4p->cloneRelinkTree();
-    m_nextp->cloneRelinkTree();  // Tail recursion
+    for (AstNode* nodep=this; nodep; nodep=nodep->m_nextp) {
+	nodep->cloneRelink();
+	nodep->m_op1p->cloneRelinkTree();
+	nodep->m_op2p->cloneRelinkTree();
+	nodep->m_op3p->cloneRelinkTree();
+	nodep->m_op4p->cloneRelinkTree();
+    }
 }

 //======================================================================
@@ -747,6 +907,11 @@ void AstNode::checkTreeIter(AstNode* backp) {
    if (backp != this->backp()) {
 	this->v3fatalSrc("Back node inconsistent");
    }
+    if (castNodeTermop() || castNodeVarRef()) {
+	// Termops have a short-circuited iterateChildren, so check usage
+	if (op1p()||op2p()||op3p()||op4p())
+	    this->v3fatalSrc("Terminal operation with non-terminals");
+    }
    if (op1p()) op1p()->checkTreeIterList(this);
    if (op2p()) op2p()->checkTreeIterList(this);
    if (op3p()) op3p()->checkTreeIterList(this);
@@ -789,7 +954,11 @@ void AstNode::dumpPtrs(ostream& os) {
    if (op2p()) os<<" op2p="<<(void*)op2p();
    if (op3p()) os<<" op3p="<<(void*)op3p();
    if (op4p()) os<<" op4p="<<(void*)op4p();
-    if (userp()) os<<" user="<<(void*)userp();
+    if (user1p()) os<<" user1p="<<(void*)user1p();
+    if (user2p()) os<<" user2p="<<(void*)user2p();
+    if (user3p()) os<<" user3p="<<(void*)user3p();
+    if (user4p()) os<<" user4p="<<(void*)user4p();
+    if (user5p()) os<<" user5p="<<(void*)user5p();
    if (m_iterpp) {
 	os<<" iterpp="<<(void*)m_iterpp;
 	os<<"*="<<(void*)*m_iterpp;
@@ -825,7 +994,7 @@ void AstNode::dumpTreeFile(const string& filename, bool append) {
 	    if (logsp->fail()) v3fatalSrc("Can't write "<<filename);
 	    *logsp<<"Tree Dump from <e"<<dec<<editCountLast()<<">";
 	    *logsp<<" to <e"<<dec<<editCountGbl()<<">"<<endl;
-	    if (editCountGbl()==editCountLast() && 1) {  // Off, as messes up tree diffing
+	    if (editCountGbl()==editCountLast()) {
 		*logsp<<endl;
 		*logsp<<"No changes since last dump!\n";
 	    } else {
@@ -844,7 +1013,7 @@ void AstNode::dumpTreeFile(const string& filename, bool append) {
    editCountSetLast();
 }

-void AstNode::v3errorEnd(ostringstream& str) {
+void AstNode::v3errorEnd(ostringstream& str) const {
    if (this && m_fileline) {
 	ostringstream nsstr;
 	nsstr<<str.str();
@@ -859,6 +1028,7 @@ void AstNode::v3errorEnd(ostringstream& str) {
 }

 //######################################################################
+// AstNVisitor

 void AstNVisitor::doDeletes() {
    for (vector<AstNode*>::iterator it = m_deleteps.begin(); it != m_deleteps.end(); ++it) {
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Ast node structures
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -21,8 +21,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <fstream>
 #include <iomanip>
 #include <vector>
@@ -44,19 +44,33 @@ void AstNodeVarRef::cloneRelink() {
 }

 int AstNodeSel::bitConst() const {
-    AstConst* constp=bitp()->castConst(); return (constp?constp->asInt():0);
+    AstConst* constp=bitp()->castConst(); return (constp?constp->toSInt():0);
+}
+
+int AstBasicDType::widthAlignBytes() const {
+    if (width()<=8) return 1;
+    else if (width()<=16) return 2;
+    else if (isQuad()) return 8;
+    else return 4;
+}
+
+int AstBasicDType::widthTotalBytes() const {
+    if (width()<=8) return 1;
+    else if (width()<=16) return 2;
+    else if (isQuad()) return 8;
+    else return widthWords()*(VL_WORDSIZE/8);
 }

 bool AstVar::isSigPublic() const {
-    return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp()));
+    return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp() && !isGenVar()));
 }

 bool AstVar::isScQuad() const {
-    return (isSc()&&isQuad()&&v3Global.opt.pins64());
+    return (isSc() && isQuad() && !isScBv());
 }

-bool AstVar::isScWide() const {
-    return (isWide() || isSc()&&isQuad()&&!v3Global.opt.pins64());
+bool AstVar::isScBv() const {
+    return (isSc() && width() >= v3Global.opt.pinsBv());
 }

 void AstVar::combineType(AstVarType type) {
@@ -72,20 +86,6 @@ void AstVar::combineType(AstVarType type) {
 	m_tristate = true;
 }

-int AstVar::widthAlignBytes() const {
-    if (width()<=8) return 1;
-    else if (width()<=16) return 2;
-    else if (isSc() ? isScQuad() : isQuad()) return 8;
-    else return 4;
-}
-
-int AstVar::widthTotalBytes() const {
-    if (width()<=8) return 1;
-    else if (width()<=16) return 2;
-    else if (isSc() ? isScQuad() : isQuad()) return 8;
-    else return widthWords()*(VL_WORDSIZE/8);
-}
-
 string AstVar::verilogKwd() const {
    if (isInout()) {
 	return "inout";
@@ -93,56 +93,261 @@ string AstVar::verilogKwd() const {
 	return "input";
    } else if (isOutput()) {
 	return "output";
-    } else if (isInteger()) {
-	return "integer";
    } else if (isTristate()) {
 	return "tri";
    } else if (varType()==AstVarType::WIRE) {
 	return "wire";
    } else {
-	return "reg";
+	return dtypep()->name();
    }
 }

-string AstVar::cType() const {
-    if (widthMin() == 1) {
-	return "bool";
+string AstVar::vlArgType(bool named, bool forReturn) const {
+    if (forReturn) named=false;
+    if (forReturn) v3fatalSrc("verilator internal data is never passed as return, but as first argument");
+    string arg;
+    if (isWide() && isInOnly()) arg += "const ";
+    AstBasicDType* bdtypep = basicp();
+    bool strtype = bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::STRING;
+    if (bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::CHARPTR) {
+	arg += "const char*";
+    } else if (bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::SCOPEPTR) {
+	arg += "const VerilatedScope*";
+    } else if (strtype) {
+	if (isInOnly()) arg += "const ";
+	arg += "string";
+    } else if (widthMin() <= 8) {
+	arg += "CData";
+    } else if (widthMin() <= 16) {
+	arg += "SData";
    } else if (widthMin() <= VL_WORDSIZE) {
-	return "uint32_t";
-    } else if (isScWide()) {
-	return "uint32_t";  // []'s added later
-    } else {
-	return "uint64_t";
+	arg += "IData";
+    } else if (isQuad()) {
+	arg += "QData";
+    } else if (isWide()) {
+	arg += "WData";  // []'s added later
    }
+    if (isWide() && !strtype) {
+	arg += " (& "+name();
+	arg += ")["+cvtToStr(widthWords())+"]";
+    } else {
+	if (isOutput() || (strtype && isInput())) arg += "&";
+	if (named) arg += " "+name();
+    }
+    return arg;
+}
+
+string AstVar::vlEnumType() const {
+    string arg;
+    AstBasicDType* bdtypep = basicp();
+    bool strtype = bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::STRING;
+    if (bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::CHARPTR) {
+	return "VLVT_PTR";
+    } else if (bdtypep && bdtypep->keyword()==AstBasicDTypeKwd::SCOPEPTR) {
+	return "VLVT_PTR";
+    } else if (strtype) {
+	arg += "VLVT_STRING";
+    } else if (widthMin() <= 8) {
+	arg += "VLVT_UINT8";
+    } else if (widthMin() <= 16) {
+	arg += "VLVT_UINT16";
+    } else if (widthMin() <= VL_WORDSIZE) {
+	arg += "VLVT_UINT32";
+    } else if (isQuad()) {
+	arg += "VLVT_UINT64";
+    } else if (isWide()) {
+	arg += "VLVT_WDATA";
+    }
+    // else return "VLVT_UNKNOWN"
+    return arg;
+}
+
+string AstVar::vlEnumDir() const {
+    if (isInout()) {
+	return "VLVD_INOUT";
+    } else if (isInOnly()) {
+	return "VLVD_IN";
+    } else if (isOutOnly()) {
+	return "VLVD_OUT";
+    } else {
+	return "VLVD_NODIR";
+    }
+}
+
+string AstVar::cPubArgType(bool named, bool forReturn) const {
+    if (forReturn) named=false;
+    string arg;
+    if (isWide() && isInOnly()) arg += "const ";
+    if (widthMin() == 1) {
+	arg += "bool";
+    } else if (widthMin() <= VL_WORDSIZE) {
+	arg += "uint32_t";
+    } else if (isWide()) {
+	arg += "uint32_t";  // []'s added later
+    } else {
+	arg += "uint64_t";
+    }
+    if (isWide()) {
+	if (forReturn) v3error("Unsupported: Public functions with >64 bit outputs; make an output of a public task instead");
+	arg += " (& "+name();
+	arg += ")["+cvtToStr(widthWords())+"]";
+    } else {
+	if (isOutput() && !forReturn) arg += "&";
+	if (named) arg += " "+name();
+    }
+    return arg;
+}
+
+string AstVar::dpiArgType(bool named, bool forReturn) const {
+    if (forReturn) named=false;
+    string arg;
+    if (!basicp()) arg = "UNKNOWN";
+    if (isWide()) v3error("Unsupported: DPI functions with vectored outputs > 32-bits");
+    if (basicp()->isBitLogic()) {
+	if (widthMin() == 1) {
+	    arg = "unsigned char";
+	    if (!forReturn && isOutput()) arg += "*";
+	} else {
+	    if (forReturn) {
+		arg = "svBitVecVal";
+	    } else if (isInOnly()) {
+		arg = "const svBitVecVal*";
+	    } else {
+		arg = "svBitVecVal*";
+	    }
+	}
+    } else {
+	arg = basicp()->keyword().dpiType();
+	if (!forReturn && isOutput()) arg += "*";
+    }
+    if (named) arg += " "+name();
+    return arg;
 }

 string AstVar::scType() const {
-    if (widthMin() == 1) {
+    if (isScBv()) {
+	return (string("sc_bv<")+cvtToStr(widthMin())+"> ");  // Keep the space so don't get >>
+    } else if (widthMin() == 1) {
 	return "bool";
    } else if (widthMin() <= VL_WORDSIZE) {
-	return "uint32_t";
-    } else if (isScWide()) {
-	return (string("sc_bv<")+cvtToStr(widthMin())+"> ");  // Keep the space so don't get >>
+	if (widthMin() <= 8 && v3Global.opt.pinsUint8()) {
+	    return "uint8_t";
+	} else if (widthMin() <= 16 && v3Global.opt.pinsUint8()) {
+	    return "uint16_t";
+	} else {
+	    return "uint32_t";
+	}
    } else {
 	return "uint64_t";
    }
 }

-AstRange* AstVar::arrayp(int dimension) const {
-    for (AstRange* arrayp=this->arraysp(); arrayp; arrayp = arrayp->nextp()->castRange()) {
-	if ((dimension--)==0) return arrayp;
+AstNodeDType* AstVar::dtypeDimensionp(int dimension) const {
+    // dimension passed from AstArraySel::dimension
+    // Dimension 0 means the VAR itself, 1 is the closest SEL to the AstVar,
+    // which is the lowest in the dtype list.
+    //     ref order:   a[1][2][3][4]
+    //     Created as:  reg [4] a [1][2][3];
+    //        *or*      reg a [1][2][3][4];
+    //     		// The bit select is optional; used only if "leftover" []'s
+    //	   SEL:	        SEL4(SEL3(SEL2(SEL1(VARREF0 a))))
+    //	   DECL:	VAR a (ARRAYSEL0 (ARRAYSEL1 (ARRAYSEL2 (DT RANGE3))))
+    //	      *or*	VAR a (ARRAYSEL0 (ARRAYSEL1 (ARRAYSEL2 (ARRAYSEL3 (DT))))
+    //	   SEL1 needs to select from entire variable which is a pointer to ARRAYSEL0
+    int dim = 0;
+    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
+	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
+	    if ((dim++)==dimension) {
+		return dtypep;
+	    }
+	    dtypep = adtypep->dtypep();
+	    continue;
+	}
+	else if (AstBasicDType* adtypep = dtypep->castBasicDType()) {
+	    // AstBasicDType - nothing below, return null
+	    if (adtypep->rangep()) {
+		if ((dim++) == dimension) {
+		    return adtypep;
+		}
+	    }
+	    return NULL;
+	}
+	// Node no ->next in loop; use continue where necessary
+	break;
    }
    return NULL;
 }

 uint32_t AstVar::arrayElements() const {
    uint32_t entries=1;
-    for (AstRange* arrayp=this->arraysp(); arrayp; arrayp = arrayp->nextp()->castRange()) {
-	entries *= arrayp->elementsConst();
+    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
+	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
+	    entries *= adtypep->elementsConst();
+	    dtypep = adtypep->dtypep();
+	}
+	else {
+	    // AstBasicDType - nothing below, 1
+	    break;
+	}
    }
    return entries;
 }

+pair<uint32_t,uint32_t> AstVar::dimensions() const {
+    // How many array dimensions (packed,unpacked) does this Var have?
+    uint32_t packed = 0;
+    uint32_t unpacked = 0;
+    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
+	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
+	    if (adtypep->isPacked()) packed += 1;
+	    else unpacked += 1;
+	    dtypep = adtypep->dtypep();
+	}
+	else {
+	    // AstBasicDType - nothing below, 1
+	    break;
+	}
+    }
+    return make_pair(packed, unpacked);
+}
+
+// Special operators
+int AstArraySel::dimension(AstNode* nodep) {
+    // How many dimensions is this reference from the base variable?
+    // nodep is typically the fromp() of a select; thus the first select
+    // is selecting from the entire variable type - effectively dimension 0.
+    // Dimension passed to AstVar::dtypeDimensionp; see comments there
+    int dim = 0;
+    while (nodep) {
+	if (nodep->castNodeSel()) { dim++; nodep=nodep->castNodeSel()->fromp(); continue; }
+	if (nodep->castNodePreSel()) { dim++; nodep=nodep->castNodePreSel()->fromp(); continue; }
+	break;
+    }
+    return dim;
+}
+AstNode* AstArraySel::baseFromp(AstNode* nodep) {	///< What is the base variable (or const) this dereferences?
+    // Else AstArraySel etc; search for the base
+    while (nodep) {
+	if (nodep->castArraySel()) { nodep=nodep->castArraySel()->fromp(); continue; }
+	else if (nodep->castSel()) { nodep=nodep->castSel()->fromp(); continue; }
+	// AstNodeSelPre stashes the associated variable under a ATTROF so it isn't constified
+	else if (nodep->castAttrOf()) { nodep=nodep->castAttrOf()->fromp(); continue; }
+	else if (nodep->castNodePreSel()) {
+	    if (nodep->castNodePreSel()->attrp()) {
+		nodep=nodep->castNodePreSel()->attrp();
+	    } else {
+		nodep=nodep->castNodePreSel()->lhsp();
+	    }
+	    continue;
+	}
+	else break;
+    }
+    return nodep;
+}
+
 bool AstScope::broken() const {
    return ((m_aboveScopep && !m_aboveScopep->brokeExists())
 	    || (m_aboveCellp && !m_aboveCellp->brokeExists())
@@ -152,130 +357,139 @@ bool AstScope::broken() const {
 void AstScope::cloneRelink() {
    if (m_aboveScopep && m_aboveScopep->clonep()) m_aboveScopep->clonep()->castScope();
    if (m_aboveCellp && m_aboveCellp->clonep()) m_aboveCellp->clonep()->castCell();
-    if (m_modp && ((AstNode*)m_modp)->clonep()) ((AstNode*)m_modp)->clonep()->castModule();
+    if (m_modp && ((AstNode*)m_modp)->clonep()) ((AstNode*)m_modp)->clonep()->castNodeModule();
 }

 string AstScope::nameDotless() const {
-    string dotless = shortName();
+    string out = shortName();
    string::size_type pos;
-    while ((pos=dotless.find(".")) != string::npos) {
-	dotless.replace(pos, 1, "__");
+    while ((pos=out.find(".")) != string::npos) {
+	out.replace(pos, 1, "__");
    }
-    return dotless;
+    return out;
 }

-struct AstSenItemCmp {
-    inline bool operator () (const AstSenItem* lhsp, const AstSenItem* rhsp) const {
-	// Looks visually better if we keep sorted by name
-	if (lhsp->edgeType() < rhsp->edgeType()) return true;
-	if (lhsp->edgeType() > rhsp->edgeType()) return false;
-	if (!lhsp->varrefp() &&  rhsp->varrefp()) return true;
-	if ( lhsp->varrefp() && !rhsp->varrefp()) return false;
-	if (lhsp->varrefp() && rhsp->varrefp()) {
-	    if (lhsp->varrefp()->name() < rhsp->varrefp()->name()) return true;
-	    if (lhsp->varrefp()->name() > rhsp->varrefp()->name()) return false;
-	    // But might be same name with different scopes
-	    if (lhsp->varrefp()->varScopep() < rhsp->varrefp()->varScopep()) return true;
-	    if (lhsp->varrefp()->varScopep() > rhsp->varrefp()->varScopep()) return false;
-	}
-	return false;
+string AstScopeName::scopePrettyName() const {
+    string out;
+    for (AstText* textp=scopeAttrp(); textp; textp=textp->nextp()->castText()) {
+	out += textp->text();
    }
-};
+    // TOP will be replaced by top->name()
+    if (out.substr(0,10) == "__DOT__TOP") out.replace(0,10,"");
+    if (out.substr(0,7) == "__DOT__") out.replace(0,7,"");
+    if (out.substr(0,1) == ".") out.replace(0,1,"");
+    return AstNode::prettyName(out);
+}

-void AstSenTree::sortSenses() {
-    // Sort the sensitivity names so "posedge a or b" and "posedge b or a" end up together.
-    // Also, remove duplicate assignments, and fold POS&NEGs into ANYEDGEs
-    //cout<<endl; this->dumpTree(cout,"ssin: ");
-    AstSenItem* nextp;
-    // Make things a little faster; check first if we need a sort
-    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
-	nextp=senp->nextp()->castSenItem();
-	AstSenItemCmp cmp;
-	if (nextp && !cmp(senp, nextp)) {
-	    // Something's out of order, sort it
-	    senp = NULL;
-	    vector<AstSenItem*> vec;
-	    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
-		vec.push_back(senp);
-	    }
-	    sort(vec.begin(), vec.end(), AstSenItemCmp());
-	    for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
-		(*it)->unlinkFrBack();
-	    }
-	    for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
-		this->addSensesp(*it);
-	    }
-	    break;
-	}
+string AstScopeName::scopeSymName() const {
+    string out;
+    for (AstText* textp=scopeAttrp(); textp; textp=textp->nextp()->castText()) {
+	out += textp->text();
    }
-
-    // Pass2, remove dup edges
-    for (AstSenItem* senp = sensesp(); senp; senp=nextp) {
-	nextp=senp->nextp()->castSenItem();
-	AstSenItem* cmpp = nextp;
-	if (cmpp
-	    && ((senp->varrefp() && cmpp->varrefp() && senp->varrefp()->sameTree(cmpp->varrefp()))
-		|| (!senp->varrefp() && !cmpp->varrefp()))) {
-	    // We've sorted in the order ANY, BOTH, POS, NEG, so we don't need to try opposite orders
-	    if ((   senp->edgeType()==AstEdgeType::ANYEDGE)    // ANY  or {BOTH|POS|NEG} -> ANY
-		|| (senp->edgeType()==AstEdgeType::BOTHEDGE)   // BOTH or {POS|NEG} -> BOTH
-		|| (senp->edgeType()==AstEdgeType::POSEDGE     // POS  or NEG -> BOTH
-		    && cmpp->edgeType()==AstEdgeType::NEGEDGE)
-		|| (senp->edgeType()==cmpp->edgeType())		// Identical edges
-		) {
-		// Fix edge of old node
-		if (senp->edgeType()==AstEdgeType::POSEDGE
-		    && cmpp->edgeType()==AstEdgeType::NEGEDGE)
-		    senp->edgeType(AstEdgeType::BOTHEDGE);
-		// Remove redundant node
-		cmpp->unlinkFrBack()->deleteTree(); cmpp=NULL;
-		// Try to collapse again
-		nextp=senp;
-	    }
-	}
+    if (out.substr(0,10) == "__DOT__TOP") out.replace(0,10,"");
+    if (out.substr(0,7) == "__DOT__") out.replace(0,7,"");
+    if (out.substr(0,1) == ".") out.replace(0,1,"");
+    string::size_type pos;
+    while ((pos=out.find(".")) != string::npos) {
+	out.replace(pos, 1, "__");
    }
-
-    // Pass3, remove nevers
-    if (sensesp()->nextp()) {   // Else only one never, can't remove it
-	for (AstSenItem* senp = sensesp(); senp; senp=nextp) {
-	    nextp=senp->nextp()->castSenItem();
-	    if (senp->isNever()) {
-		senp->unlinkFrBack()->deleteTree(); senp=NULL;
-	    }
-	}
+    while ((pos=out.find("__DOT__")) != string::npos) {
+	out.replace(pos, 7, "__");
    }
-    //this->dumpTree(cout,"ssou: ");
+    return out;
 }

 bool AstSenTree::hasClocked() {
    if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
-    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
+    for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
 	if (senp->isClocked()) return true;
    }
    return false;
 }
 bool AstSenTree::hasSettle() {
    if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
-    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
+    for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
 	if (senp->isSettle()) return true;
    }
    return false;
 }
 bool AstSenTree::hasInitial() {
    if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
-    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
+    for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
 	if (senp->isInitial()) return true;
    }
    return false;
 }
 bool AstSenTree::hasCombo() {
    if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
-    for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
+    for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
 	if (senp->isCombo()) return true;
    }
    return false;
 }

+//======================================================================
+// Special walking tree inserters
+
+void AstNode::addBeforeStmt(AstNode* newp, AstNode*) {
+    if (!backp()) newp->v3fatalSrc("Can't find current statement to addBeforeStmt");
+    // Look up; virtual call will find where to put it
+    this->backp()->addBeforeStmt(newp, this);
+}
+void AstNode::addNextStmt(AstNode* newp, AstNode*) {
+    if (!backp()) newp->v3fatalSrc("Can't find current statement to addBeforeStmt");
+    // Look up; virtual call will find where to put it
+    this->backp()->addNextStmt(newp, this);
+}
+
+void AstNodeStmt::addBeforeStmt(AstNode* newp, AstNode*) {
+    // Insert newp before current node
+    this->addHereThisAsNext(newp);
+}
+void AstNodeStmt::addNextStmt(AstNode* newp, AstNode*) {
+    // Insert newp after current node
+    this->addNextHere(newp);
+}
+
+void AstWhile::addBeforeStmt(AstNode* newp, AstNode* belowp) {
+    // Special, as statements need to be put in different places
+    // Belowp is how we came to recurse up to this point
+    // Preconditions insert first just before themselves (the normal rule for other statement types)
+    if (belowp == precondsp()) {
+	// Must have been first statement in precondsp list, so newp is new first statement
+	belowp->addHereThisAsNext(newp);
+    } else if (belowp == condp()) {
+	// Goes before condition, IE in preconditions
+	addPrecondsp(newp);
+    } else if (belowp == bodysp()) {
+	// Was first statement in body, so new front
+	belowp->addHereThisAsNext(newp);
+    } else {
+	belowp->v3fatalSrc("Doesn't look like this was really under the while");
+    }
+}
+void AstWhile::addNextStmt(AstNode* newp, AstNode* belowp) {
+    // Special, as statements need to be put in different places
+    // Belowp is how we came to recurse up to this point
+    // Preconditions insert first just before themselves (the normal rule for other statement types)
+    if (belowp == precondsp()) {
+	// Next in precond list
+	belowp->addNextHere(newp);
+    } else if (belowp == condp()) {
+	// Becomes first statement in body, body may have been empty
+	if (bodysp()) {
+	    bodysp()->addHereThisAsNext(newp);
+	} else {
+	    addBodysp(newp);
+	}
+    } else if (belowp == bodysp()) {
+	// Next statement in body
+	belowp->addNextHere(newp);
+    } else {
+	belowp->v3fatalSrc("Doesn't look like this was really under the while");
+    }
+}
+
 //======================================================================
 // Per-type Debugging

@@ -288,7 +502,25 @@ void AstNode::dump(ostream& os) {
      <<" "<<(isSigned()?"s":"")
      <<"w"<<(widthSized()?"":"u")<<width();
    if (!widthSized()) os<<"/"<<widthMin();
-    if (name()!="") os<<"  "<<name();
+    if (name()!="") os<<"  "<<AstNode::quoteName(name());
+}
+
+void AstArrayDType::dump(ostream& str) {
+    this->AstNode::dump(str);
+    if (isPacked()) str<<" [PACKED]";
+}
+void AstArraySel::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" [start:"<<start()<<"] [length:"<<length()<<"]";
+}
+void AstAttrOf::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" ["<<attrType().ascii()<<"]";
+}
+void AstBasicDType::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" ["<<keyword().ascii()<<"]";
+    if (implicit()) str<<" [IMPLICIT]";
 }
 void AstCast::dump(ostream& str) {
    this->AstNode::dump(str);
@@ -298,18 +530,42 @@ void AstCell::dump(ostream& str) {
    this->AstNode::dump(str);
    if (modp()) { str<<" -> "; modp()->dump(str); }
    else { str<<" ->UNLINKED:"<<modName(); }
-    if (pinStar()) str<<" [.*]";
 }
 void AstCellInline::dump(ostream& str) {
    this->AstNode::dump(str);
    str<<" -> "<<origModName();
 }
+void AstDisplay::dump(ostream& str) {
+    this->AstNode::dump(str);
+    //str<<" "<<displayType().ascii();
+}
+void AstJumpGo::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" -> ";
+    if (labelp()) { labelp()->dump(str); }
+    else { str<<"%Error:UNLINKED"; }
+}
+void AstEnumItemRef::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" -> ";
+    if (itemp()) { itemp()->dump(str); }
+    else { str<<"UNLINKED"; }
+}
 void AstPin::dump(ostream& str) {
    this->AstNode::dump(str);
    if (modVarp()) { str<<" -> "; modVarp()->dump(str); }
    else { str<<" ->UNLINKED"; }
    if (svImplicit()) str<<" [.SV]";
 }
+void AstRange::dump(ostream& str) {
+    this->AstNode::dump(str);
+    if (littleEndian()) str<<" [LITTLE]";
+}
+void AstRefDType::dump(ostream& str) {
+    this->AstNode::dump(str);
+    if (defp()) { str<<" -> "; defp()->dump(str); }
+    else { str<<" -> UNLINKED"; }
+}
 void AstVarXRef::dump(ostream& str) {
    this->AstNode::dump(str);
    if (lvalue()) str<<" [LV] => ";
@@ -320,12 +576,16 @@ void AstVarXRef::dump(ostream& str) {
    else if (varp()) { varp()->dump(str); }
    else { str<<"UNLINKED"; }
 }
-void AstModule::dump(ostream& str) {
+void AstNodeModule::dump(ostream& str) {
    this->AstNode::dump(str);
    str<<"  L"<<level();
    if (modPublic()) str<<" [P]";
    if (inLibrary()) str<<" [LIB]";
 }
+void AstPackageImport::dump(ostream& str) {
+    this->AstNode::dump(str);
+    str<<" -> "<<packagep();
+}
 void AstVarScope::dump(ostream& str) {
    this->AstNode::dump(str);
    if (isCircular()) str<<" [CIRC]";
@@ -386,9 +646,23 @@ void AstNodeFTaskRef::dump(ostream& str) {
 void AstNodeFTask::dump(ostream& str) {
    this->AstNode::dump(str);
    if (taskPublic()) str<<" [PUBLIC]";
+    if (prototype()) str<<" [PROTOTYPE]";
+    if (dpiImport()) str<<" [DPII]";
+    if (dpiExport()) str<<" [DPIX]";
+    if ((dpiImport() || dpiExport()) && cname()!=name()) str<<" [c="<<cname()<<"]";
+}
+void AstBegin::dump(ostream& str) {
+    this->AstNode::dump(str);
+    if (unnamed()) str<<" [UNNAMED]";
 }
 void AstCoverDecl::dump(ostream& str) {
    this->AstNode::dump(str);
+    if (this->dataDeclNullp()) {
+	str<<" -> ";
+	this->dataDeclNullp()->dump(str);
+    } else {
+	if (binNum()) { str<<" bin"<<dec<<binNum(); }
+    }
 }
 void AstCoverInc::dump(ostream& str) {
    this->AstNode::dump(str);
@@ -402,6 +676,17 @@ void AstTraceInc::dump(ostream& str) {
    if (declp()) { declp()->dump(str); }
    else { str<<"%Error:UNLINKED"; }
 }
+void AstNodeText::dump(ostream& str) {
+    this->AstNode::dump(str);
+    string out = text();
+    string::size_type pos;
+    if ((pos = out.find("\n")) != string::npos) {
+	out.erase(pos,out.length()-pos);
+	out += "...";
+    }
+    str<<" \""<<out<<"\"";
+}
+
 void AstCFile::dump(ostream& str) {
    this->AstNode::dump(str);
    if (source()) str<<" [SRC]";
@@ -414,3 +699,11 @@ void AstCCall::dump(ostream& str) {
 	funcp()->dump(str);
    }
 }
+void AstCFunc::dump(ostream& str) {
+    this->AstNode::dump(str);
+    if (slow()) str<<" [SLOW]";
+    if (pure()) str<<" [PURE]";
+    if (dpiImport()) str<<" [DPII]";
+    if (dpiExport()) str<<" [DPIX]";
+    if (dpiExportWrapper()) str<<" [DPIXWR]";
+}
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Removal of named begin blocks
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,18 +19,21 @@
 //
 //*************************************************************************
 // V3Begin's Transformations:
-//		
+//
 // Each module:
 //	Look for BEGINs
 //	    BEGIN(VAR...) -> VAR ... {renamed}
 //	FOR -> WHILEs
 //
+// There are two scopes; named BEGINs change %m and variable scopes.
+// Unnamed BEGINs change only variable, not $display("%m") scope.
+//
 //*************************************************************************

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <vector>
@@ -45,14 +48,23 @@
 class BeginVisitor : public AstNVisitor {
 private:
    // STATE
-    AstModule*		m_modp;		// Current module
+    AstNodeModule*	m_modp;		// Current module
    AstNodeFTask* 	m_ftaskp;	// Current function/task
-    string		m_beginScope;	// Name of begin blocks above us
-    //int debug() { return 9; }
+    string		m_namedScope;	// Name of begin blocks above us
+    string		m_unnamedScope;	// Name of begin blocks, including unnamed blocks
+    int			m_repeatNum;	// Repeat counter
+
+    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }

    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	m_modp = nodep;
+	m_repeatNum = 0;
 	nodep->iterateChildren(*this);
 	m_modp = NULL;
    }
@@ -64,24 +76,31 @@ private:
    virtual void visit(AstBegin* nodep, AstNUser*) {
 	// Begin blocks were only useful in variable creation, change names and delete
 	UINFO(8,"  "<<nodep<<endl);
-	string oldScope = m_beginScope;
+	string oldScope = m_namedScope;
+	string oldUnnamed = m_unnamedScope;
 	{
-	    //UINFO(8,"nname "<<m_beginScope<<endl);
-	    // Create data for dotted variable resolution
-	    string dottedname = nodep->name() + "__DOT__";  // So always found
-	    string::size_type pos;
-	    while ((pos=dottedname.find("__DOT__")) != string::npos) {
-		string ident = dottedname.substr(0,pos);
-		dottedname = dottedname.substr(pos+strlen("__DOT__"));
-		if (m_beginScope=="") m_beginScope = ident;
-		else m_beginScope = m_beginScope + "__DOT__"+ident;
-		// Create CellInline for dotted resolution
-		AstCellInline* inlinep = new AstCellInline(nodep->fileline(),
-							   m_beginScope, "__BEGIN__");
-		m_modp->addInlinesp(inlinep);  // Must be parsed before any AstCells
+	    //UINFO(8,"nname "<<m_namedScope<<endl);
+	    if (nodep->name() != "") {  // Else unneeded unnamed block
+		// Create data for dotted variable resolution
+		string dottedname = nodep->name() + "__DOT__";  // So always found
+		string::size_type pos;
+		while ((pos=dottedname.find("__DOT__")) != string::npos) {
+		    string ident = dottedname.substr(0,pos);
+		    dottedname = dottedname.substr(pos+strlen("__DOT__"));
+		    if (!nodep->unnamed()) {
+			if (m_namedScope=="") m_namedScope = ident;
+			else m_namedScope = m_namedScope + "__DOT__"+ident;
+		    }
+		    if (m_unnamedScope=="") m_unnamedScope = ident;
+		    else m_unnamedScope = m_unnamedScope + "__DOT__"+ident;
+		    // Create CellInline for dotted var resolution
+		    AstCellInline* inlinep = new AstCellInline(nodep->fileline(),
+							       m_unnamedScope, "__BEGIN__");
+		    m_modp->addInlinesp(inlinep);  // Must be parsed before any AstCells
+		}
 	    }

-	    // Remap var names
+	    // Remap var names and replace lower Begins
 	    nodep->iterateChildren(*this);

 	    if (AstNode* stmtsp = nodep->stmtsp()) {
@@ -92,12 +111,13 @@ private:
 	    }
 	    pushDeletep(nodep); nodep=NULL;
 	}
-	m_beginScope = oldScope;
+	m_namedScope = oldScope;
+	m_unnamedScope = oldUnnamed;
    }
    virtual void visit(AstVar* nodep, AstNUser*) {
-	if (m_beginScope != "") {
+	if (m_unnamedScope != "") {
 	    // Rename it
-	    nodep->name(m_beginScope+"__DOT__"+nodep->name());
+	    nodep->name(m_unnamedScope+"__DOT__"+nodep->name());
 	    // Move to module
 	    nodep->unlinkFrBack();
 	    if (m_ftaskp) m_ftaskp->addStmtsp(nodep);   // Begins under funcs just move into the func
@@ -106,43 +126,32 @@ private:
    }
    virtual void visit(AstCell* nodep, AstNUser*) {
 	UINFO(8,"   CELL "<<nodep<<endl);
-	if (m_beginScope != "") {
+	if (m_namedScope != "") {
 	    // Rename it
-	    nodep->name(m_beginScope+"__DOT__"+nodep->name());
+	    nodep->name(m_namedScope+"__DOT__"+nodep->name());
 	    UINFO(8,"     rename to "<<nodep->name()<<endl);
 	    // Move to module
 	    nodep->unlinkFrBack();
 	    m_modp->addStmtp(nodep);
 	}
    }
-    virtual void visit(AstFor* nodep, AstNUser*) {
-	// So later optimizations don't need to deal with them,
-	//    FOR(init,cond,assign,body) -> init,WHILE(cond) { body, assign }
-	AstNode* initsp = nodep->initsp(); if (initsp) initsp->unlinkFrBackWithNext();
-	AstNode* condp = nodep->condp(); if (condp) condp->unlinkFrBackWithNext();
-	AstNode* incsp = nodep->incsp(); if (incsp) incsp->unlinkFrBackWithNext();
-	AstNode* bodysp = nodep->bodysp(); if (bodysp) bodysp->unlinkFrBackWithNext();
-	bodysp = bodysp->addNext(incsp);
-	AstNode* newp = new AstWhile(nodep->fileline(),
-				     condp,
-				     bodysp);
-	initsp = initsp->addNext(newp);
-	newp = initsp;
-	nodep->replaceWith(newp);
-	nodep->deleteTree(); nodep=NULL;
-    }
    virtual void visit(AstScopeName* nodep, AstNUser*) {
 	// If there's a %m in the display text, we add a special node that will contain the name()
 	// Similar code in V3Inline
-	if (m_beginScope != "") {
+	if (m_namedScope != "") {
 	    // To keep correct visual order, must add before other Text's
 	    AstNode* afterp = nodep->scopeAttrp();
 	    if (afterp) afterp->unlinkFrBackWithNext();
-	    nodep->scopeAttrp(new AstText(nodep->fileline(), (string)"."+AstNode::prettyName(m_beginScope)));
+	    nodep->scopeAttrp(new AstText(nodep->fileline(), (string)"__DOT__"+m_namedScope));
 	    if (afterp) nodep->scopeAttrp(afterp);
 	}
 	nodep->iterateChildren(*this);
    }
+    virtual void visit(AstCoverDecl* nodep, AstNUser*) {
+	// Don't need to fix path in coverage statements, they're not under
+	// any BEGINs, but V3Coverage adds them all under the module itself.
+	nodep->iterateChildren(*this);
+    }
    virtual void visit(AstNode* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
    }
@@ -151,6 +160,7 @@ public:
    BeginVisitor(AstNetlist* nodep) {
 	m_modp = NULL;
 	m_ftaskp = NULL;
+	m_repeatNum = 0;
 	nodep->accept(*this);
    }
    virtual ~BeginVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Removal of named begin blocks
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Branch prediction
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -27,8 +27,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <map>

@@ -44,9 +44,14 @@ private:
    // STATE
    int		m_likely;	// Excuses for branch likely taken
    int		m_unlikely;	// Excuses for branch likely not taken
-    //int debug() { return 9; }

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    void reset() {
 	m_likely = false;
 	m_unlikely = false;
@@ -71,9 +76,9 @@ private:
 	    // Compute
 	    int likeness = ifLikely - ifUnlikely - (elseLikely - elseUnlikely);
 	    if (likeness>0) {
-		nodep->branchPred(AstBranchPred::LIKELY);
+		nodep->branchPred(AstBranchPred::BP_LIKELY);
 	    } else if (likeness<0) {
-		nodep->branchPred(AstBranchPred::UNLIKELY);
+		nodep->branchPred(AstBranchPred::BP_UNLIKELY);
 	    } // else leave unknown
 	}
 	m_likely = lastLikely;
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Branch prediction
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Find broken links in tree
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Broken's Transformations:
-//		
+//
 // Entire netlist
 //	Mark all nodes
 //	Check all links point to marked nodes
@@ -28,8 +28,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <map>
@@ -52,6 +52,7 @@ private:
    static const int FLAG_IN_TREE	= 0x02;		// Is in netlist tree
    static const int FLAG_LINKABLE	= 0x04;		// Is in netlist tree, can be linked to
    static const int FLAG_LEAKED	= 0x08;		// Known to have been leaked
+    static const int FLAG_UNDER_NOW	= 0x10;		// Is in tree as parent of current node
 public:
    // METHODS
    static void deleted(const AstNode* nodep) {
@@ -74,6 +75,15 @@ public:
 	    s_nodes.insert(make_pair(nodep,FLAG_ALLOCATED));
 	}
    }
+    static void setUnder(const AstNode* nodep, bool flag) {
+	// Called by BrokenCheckVisitor when each node entered/exited
+	if (!okIfLinkedTo(nodep)) return;
+	NodeMap::iterator iter = s_nodes.find(nodep);
+	if (iter!=s_nodes.end()) {
+	    iter->second &= ~FLAG_UNDER_NOW;
+	    if (flag) iter->second |=  FLAG_UNDER_NOW;
+	}
+    }
    static void addInTree(AstNode* nodep, bool linkable) {
 #ifndef VL_LEAK_CHECKS
 	if (!linkable) return;  // save some time, else the map will get huge!
@@ -111,6 +121,14 @@ public:
 	if (!(iter->second & FLAG_LINKABLE)) return false;
 	return true;
    }
+    static bool okIfBelow(const AstNode* nodep) {
+	// Must be linked to and below current node
+	if (!okIfLinkedTo(nodep)) return false;
+	NodeMap::iterator iter = s_nodes.find(nodep);
+	if (iter == s_nodes.end()) return false;
+	if (!(iter->second & FLAG_UNDER_NOW)) return false;
+	return true;
+    }
    static void prepForTree() {
 #ifndef VL_LEAK_CHECKS
 	s_nodes.clear();
@@ -130,9 +148,9 @@ public:
 		    // Use only AstNode::dump instead of the virtual one, as there
 		    // may be varp() and other cross links that are bad.
 		    if (debug()) {
-			cout<<"%Error: LeakedNode"<<(it->first->backp()?"Back: ":": ");
-			((AstNode*)(it->first))->AstNode::dump(cout);
-			cout<<endl;
+			cerr<<"%Error: LeakedNode"<<(it->first->backp()?"Back: ":": ");
+			((AstNode*)(it->first))->AstNode::dump(cerr);
+			cerr<<endl;
 			V3Error::incErrors();
 		    }
 		    it->second |= FLAG_LEAKED;
@@ -152,6 +170,10 @@ bool AstNode::brokeExists() const {
    // Called by node->broken() routines to do table lookup
    return BrokenTable::okIfLinkedTo(this);
 }
+bool AstNode::brokeExistsAbove() const {
+    // Called by node->broken() routines to do table lookup
+    return BrokenTable::okIfBelow(this);
+}

 //######################################################################

@@ -180,6 +202,7 @@ public:
 class BrokenCheckVisitor : public AstNVisitor {
 private:
    virtual void visit(AstNode* nodep, AstNUser*) {
+	BrokenTable::setUnder(nodep,true);
 	if (nodep->broken()) {
 	    nodep->v3fatalSrc("Broken link in node (or something without maybePointedTo)\n");
 	}
@@ -192,6 +215,7 @@ private:
 	    }
 	}
 	nodep->iterateChildren(*this);
+	BrokenTable::setUnder(nodep,false);
    }
 public:
    // CONSTUCTORS
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Find broken links in tree
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Case's Transformations:
-//		
+//
 // Each module:
 //	TBD: Eliminate tristates by adding __in, __inen, __en wires in parallel
 //	    Need __en in changed list if a signal is on the LHS of a assign
@@ -40,8 +40,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -59,9 +59,17 @@
 class CaseLintVisitor : public AstNVisitor {
 private:
    AstNodeCase* m_caseExprp;	// Under a CASE value node, if so the relevant case statement
-    //int debug() { return 9; }
+
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }

    virtual void visit(AstNodeCase* nodep, AstNUser*) {
+	if (nodep->castCase() && nodep->castCase()->casex()) {
+	    nodep->v3warn(CASEX,"Suggest casez (with ?'s) in place of casex (with X's)");
+	}
 	// Detect multiple defaults
 	bool hitDefault = false;
 	for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
@@ -74,7 +82,7 @@ private:
 	}

 	// Check for X/Z in non-casex statements
-	if (!nodep->castCase() || !nodep->castCase()->casex()) {
+	{
 	    m_caseExprp = nodep;
 	    nodep->exprp()->accept(*this);
 	    for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
@@ -84,11 +92,18 @@ private:
 	}
    }
    virtual void visit(AstConst* nodep, AstNUser*) {
+	// See also neverItem
 	if (m_caseExprp && nodep->num().isFourState()) {
 	    if (m_caseExprp->castGenCase()) {
 		nodep->v3error("Use of x/? constant in generate case statement, (no such thing as 'generate casez')");
+	    } else if (m_caseExprp->castCase() && m_caseExprp->castCase()->casex()) {
+		// Don't sweat it, we already complained about casex in general
+	    } else if (m_caseExprp->castCase() && m_caseExprp->castCase()->casez()) {
+		if (nodep->num().isUnknown()) {
+		    nodep->v3warn(CASEWITHX, "Use of x constant in casez statement, (perhaps intended ?/z in constant)");
+		}
 	    } else {
-		nodep->v3error("Use of x/? constant in case statement, (perhaps intended casex/casez)");
+		nodep->v3warn(CASEWITHX, "Use of x/? constant in case statement, (perhaps intended casex/casez)");
 	    }
 	}
    }
@@ -112,6 +127,7 @@ private:
    // NODE STATE
    // Cleared each Case
    //  AstIf::user3()		-> bool.  Set true to indicate clone not needed
+    AstUser3InUse	m_inuser3;

    // STATE
    V3Double0	m_statCaseFast;	// Statistic tracking
@@ -120,12 +136,16 @@ private:
    // Per-CASE
    int		m_caseWidth;	// Width of valueItems
    int		m_caseItems;	// Number of caseItem unique values
-    int		m_caseNoOverlapsAllCovered;	// Proven to be synopsys parallel_case compliant
+    bool	m_caseNoOverlapsAllCovered;	// Proven to be synopsys parallel_case compliant
    AstNode*	m_valueItem[1<<CASE_OVERLAP_WIDTH];  // For each possible value, the case branch we need

-    //int debug() { return 9; }
-
    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    bool isCaseTreeFast(AstCase* nodep) {
 	int width = 0;
 	m_caseItems = 0;
@@ -153,20 +173,24 @@ private:
 		//if (debug()>=9) icondp->dumpTree(cout," caseitem: ");
 		AstConst* iconstp = icondp->castConst();
 		if (!iconstp) nodep->v3fatalSrc("above 'can't parse' should have caught this\n");
-		V3Number nummask (itemp->fileline(), iconstp->width());
-		nummask.opBitsNonX(iconstp->num());
-		uint32_t mask = nummask.asInt();
-		V3Number numval  (itemp->fileline(), iconstp->width());
-		numval.opBitsOne(iconstp->num());
-		uint32_t val  = numval.asInt();
-		for (uint32_t i=0; i<(1UL<<m_caseWidth); i++) {
-		    if ((i & mask) == val) {
-			if (!m_valueItem[i]) {
-			    m_valueItem[i] = itemp;
-			} else if (!itemp->ignoreOverlap() && !bitched) {
-			    itemp->v3warn(CASEOVERLAP,"Case values overlap (example pattern 0x"<<hex<<i<<")");
-			    bitched = true;
-			    m_caseNoOverlapsAllCovered = false;
+		if (neverItem(nodep, iconstp)) {
+		    // X in casez can't ever be executed
+		} else {
+		    V3Number nummask (itemp->fileline(), iconstp->width());
+		    nummask.opBitsNonX(iconstp->num());
+		    uint32_t mask = nummask.toUInt();
+		    V3Number numval  (itemp->fileline(), iconstp->width());
+		    numval.opBitsOne(iconstp->num());
+		    uint32_t val  = numval.toUInt();
+		    for (uint32_t i=0; i<(1UL<<m_caseWidth); i++) {
+			if ((i & mask) == val) {
+			    if (!m_valueItem[i]) {
+				m_valueItem[i] = itemp;
+			    } else if (!itemp->ignoreOverlap() && !bitched) {
+				itemp->v3warn(CASEOVERLAP,"Case values overlap (example pattern 0x"<<hex<<i<<")");
+				bitched = true;
+				m_caseNoOverlapsAllCovered = false;
+			    }
 			}
 		    }
 		}
@@ -198,6 +222,7 @@ private:
 	if (msb<0) {
 	    // There's no space for a IF.  We know upperValue is thus down to a specific
 	    // exact value, so just return the tree value
+	    // Note can't clone here, as we're going to check for equivelence above
 	    return m_valueItem[upperValue];
 	}
 	else {
@@ -235,7 +260,7 @@ private:
 	    //                            new AstConst(cexprp->fileline(), nummask));
 	    AstNode* and1p = new AstSel(cexprp->fileline(), cexprp->cloneTree(false),
 					msb, 1);
-	    AstNode* eqp = new AstNeq(cexprp->fileline(), 
+	    AstNode* eqp = new AstNeq(cexprp->fileline(),
 				      new AstConst(cexprp->fileline(), 0),
 				      and1p);
 	    AstIf* ifp = new AstIf(cexprp->fileline(), eqp, tree1p, tree0p);
@@ -263,6 +288,8 @@ private:

 	AstNode::user3ClearTree();
 	AstNode* ifrootp = replaceCaseFastRecurse(cexprp, m_caseWidth-1, 0UL);
+	// Case expressions can't be linked twice, so clone them
+	if (ifrootp && !ifrootp->user3()) ifrootp = ifrootp->cloneTree(true);

 	if (ifrootp) nodep->replaceWith(ifrootp);
 	else nodep->unlinkFrBack();
@@ -284,7 +311,7 @@ private:
 	for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
 	    if (!itemp->condsp()) {
 		// Default clause.  Just make true, we'll optimize it away later
-		itemp->condsp(new AstConst(itemp->fileline(), V3Number(itemp->fileline(), 1,1)));
+		itemp->condsp(new AstConst(itemp->fileline(), AstConst::LogicTrue()));
 		hadDefault = true;
 	    } else {
 		// Expressioned clause
@@ -293,19 +320,26 @@ private:
 		for (AstNode* icondp = itemp->condsp(); icondp!=NULL; icondp=icondNextp) {
 		    icondNextp = icondp->nextp();
 		    icondp->unlinkFrBack();
-		    
+
 		    AstNode* and1p;
 		    AstNode* and2p;
 		    AstConst* iconstp = icondp->castConst();
-		    if (iconstp && iconstp->num().isFourState()
-			&& nodep->casex()) {
+		    if (iconstp && neverItem(nodep, iconstp)) {
+			// X in casez can't ever be executed
+			icondp->deleteTree(); icondp=NULL; iconstp=NULL;
+			// For simplicity, make expression that is not equal, and let later
+			// optimizations remove it
+			and1p = new AstConst(itemp->fileline(), AstConst::LogicFalse());
+			and2p = new AstConst(itemp->fileline(), AstConst::LogicTrue());
+		    } else if (iconstp && iconstp->num().isFourState()
+			       && (nodep->casex() || nodep->casez())) {
 			V3Number nummask (itemp->fileline(), iconstp->width());
 			nummask.opBitsNonX(iconstp->num());
 			V3Number numval  (itemp->fileline(), iconstp->width());
 			numval.opBitsOne(iconstp->num());
 			and1p = new AstAnd(itemp->fileline(), cexprp->cloneTree(false),
 					   new AstConst(itemp->fileline(), nummask));
-			and2p = new AstAnd(itemp->fileline(), 
+			and2p = new AstAnd(itemp->fileline(),
 					   new AstConst(itemp->fileline(), numval),
 					   new AstConst(itemp->fileline(), nummask));
 			icondp->deleteTree(); icondp=NULL; iconstp=NULL;
@@ -330,7 +364,7 @@ private:
 	    // If there was no default, add a empty one, this greatly simplifies below code
 	    // and constant propagation will just eliminate it for us later.
 	    nodep->addItemsp(new AstCaseItem(nodep->fileline(),
-					     new AstConst(nodep->fileline(), V3Number(nodep->fileline(),1,1)),
+					     new AstConst(nodep->fileline(), AstConst::LogicTrue()),
 					     NULL));
 	}
 	if (debug()>=9) nodep->dumpTree(cout,"    _comp_COND: ");
@@ -367,7 +401,7 @@ private:
 		AstNode* itemexprp = ifexprp;  ifexprp=NULL;
 		if (depth == (CASE_ENCODER_GROUP_DEPTH)) { // End of group - can skip the condition
 		    itemexprp->deleteTree(); itemexprp=NULL;
-		    itemexprp = new AstConst(itemp->fileline(), V3Number(itemp->fileline(),1,1));
+		    itemexprp = new AstConst(itemp->fileline(), AstConst::LogicTrue());
 		}
 		AstIf* newp = new AstIf(itemp->fileline(), itemexprp, istmtsp, NULL);
 		if (itemnextp) itemnextp->addElsesp(newp);
@@ -395,6 +429,17 @@ private:
 	}
    }

+    bool neverItem(AstCase* casep, AstConst* itemp) {
+	// Xs in case or casez are impossible due to two state simulations
+	if (casep->casex()) {
+	} else if (casep->casez()) {
+	    if (itemp->num().isUnknown()) return true;
+	} else {
+	    if (itemp->num().isFourState()) return true;
+	}
+	return false;
+    }
+
    // VISITORS
    virtual void visit(AstCase* nodep, AstNUser*) {
 	V3Case::caseLint(nodep);
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Add C++ casts across expression size changes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2004-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2004-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Cast's Transformations:
-//		
+//
 // Each module:
 //	For each math operator, if above operator requires 32 bits,
 //	and this isn't, cast to 32 bits.
@@ -44,8 +44,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -61,11 +61,17 @@ private:
    // NODE STATE
    // Entire netlist:
    //   AstNode::user()		// bool.  Indicates node is of known size
+    AstUser1InUse	m_inuser1;

    // STATE
-    //int debug() { return 9; }

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    void insertCast(AstNode* nodep, int needsize) {  // We'll insert ABOVE passed node
 	UINFO(4,"  NeedCast "<<nodep<<endl);
 	AstNRelinker relinkHandle;
@@ -77,7 +83,7 @@ private:
 	//if (debug()>8) castp->dumpTree(cout,"-castins: ");
 	//
 	insureLower32Cast(castp);
-	nodep->user(1);  // Now must be of known size
+	nodep->user1(1);  // Now must be of known size
    }
    int castSize (AstNode* nodep) {
 	if (nodep->isQuad()) return VL_QUADSIZE;
@@ -87,7 +93,7 @@ private:
    }
    void insureCast(AstNode* nodep) {
 	if (castSize(nodep->backp()) != castSize(nodep)
-	    || !nodep->user()) {
+	    || !nodep->user1()) {
 	    insertCast(nodep, castSize(nodep->backp()));
 	}
    }
@@ -105,21 +111,21 @@ private:
    // VISITORS
    virtual void visit(AstNodeUniop* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->user(nodep->lhsp()->user());
+	nodep->user1(nodep->lhsp()->user1());
 	if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
    }
    virtual void visit(AstNodeBiop* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->user(nodep->lhsp()->user()
-		    | nodep->rhsp()->user());
+	nodep->user1(nodep->lhsp()->user1()
+		    | nodep->rhsp()->user1());
 	if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
 	if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp());
    }
    virtual void visit(AstNodeTriop* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->user(nodep->lhsp()->user()
-		    | nodep->rhsp()->user()
-		    | nodep->thsp()->user());
+	nodep->user1(nodep->lhsp()->user1()
+		    | nodep->rhsp()->user1()
+		    | nodep->thsp()->user1());
 	if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
 	if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp());
 	if (nodep->sizeMattersThs()) insureCast(nodep->thsp());
@@ -127,11 +133,11 @@ private:
    virtual void visit(AstCast* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	insureLower32Cast(nodep);
-	nodep->user(1);
+	nodep->user1(1);
    }
    virtual void visit(AstUnaryMin* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->user(nodep->lhsp()->user());
+	nodep->user1(nodep->lhsp()->user1());
 	if (nodep->lhsp()->widthMin()==1) {
 	    // We want to avoid a GCC "converting of negative value" warning
 	    // from our expansion of
@@ -148,16 +154,16 @@ private:
 	    && nodep->backp()->width()
 	    && castSize(nodep) != castSize(nodep->varp())) {
 	    // Cast vars to IData first, else below has upper bits wrongly set
-	    //  CData x=3;  out = (QData)(x<<30); 
+	    //  CData x=3;  out = (QData)(x<<30);
 	    insertCast (nodep, castSize(nodep));
 	}
-	nodep->user(1);
+	nodep->user1(1);
    }
    virtual void visit(AstConst* nodep, AstNUser*) {
 	// Constants are of unknown size if smaller than 33 bits, becase
 	// we're too lazy to wrap every constant in the universe in
 	// ((IData)#).
-	nodep->user(nodep->isQuad() || nodep->isWide());
+	nodep->user1(nodep->isQuad() || nodep->isWide());
    }

    // NOPs
@@ -172,7 +178,6 @@ private:
 public:
    // CONSTUCTORS
    CastVisitor(AstNetlist* nodep) {
-	AstNode::userClearTree();
 	nodep->accept(*this);
    }
    virtual ~CastVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add C++ casts across expression size changes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2004-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2004-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -0,0 +1,738 @@
+//*************************************************************************
+// DESCRIPTION: Verilator: Clock Domain Crossing Lint
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+// V3Cdc's Transformations:
+//
+// Create V3Graph-ish graph
+// Find all negedge reset flops
+// Trace back to previous flop
+//
+//*************************************************************************
+
+#include "config_build.h"
+#include "verilatedos.h"
+#include <cstdio>
+#include <cstdarg>
+#include <unistd.h>
+#include <algorithm>
+#include <iomanip>
+#include <vector>
+#include <deque>
+#include <list>
+#include <memory>
+
+#include "V3Global.h"
+#include "V3Cdc.h"
+#include "V3Ast.h"
+#include "V3Graph.h"
+#include "V3Const.h"
+#include "V3EmitV.h"
+#include "V3File.h"
+
+//######################################################################
+
+class CdcBaseVisitor : public AstNVisitor {
+public:
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+};
+
+//######################################################################
+// Graph support classes
+
+class CdcEitherVertex : public V3GraphVertex {
+    AstScope*	m_scopep;
+    AstNode*	m_nodep;
+    AstSenTree*	m_srcDomainp;
+    AstSenTree*	m_dstDomainp;
+    bool	m_srcDomainSet;
+    bool	m_dstDomainSet;
+    bool	m_asyncPath;
+public:
+    CdcEitherVertex(V3Graph* graphp, AstScope* scopep, AstNode* nodep)
+	: V3GraphVertex(graphp), m_scopep(scopep), m_nodep(nodep)
+	, m_srcDomainp(NULL), m_dstDomainp(NULL)
+	, m_srcDomainSet(false), m_dstDomainSet(false)
+	, m_asyncPath(false) {}
+    virtual ~CdcEitherVertex() {}
+    // Accessors
+    AstScope* scopep() const { return m_scopep; }
+    AstNode* nodep() const { return m_nodep; }
+    AstSenTree* srcDomainp() const { return m_srcDomainp; }
+    void srcDomainp(AstSenTree* nodep) { m_srcDomainp = nodep; }
+    bool srcDomainSet() const { return m_srcDomainSet; }
+    void srcDomainSet(bool flag) { m_srcDomainSet = flag; }
+    AstSenTree* dstDomainp() const { return m_dstDomainp; }
+    void dstDomainp(AstSenTree* nodep) { m_dstDomainp = nodep; }
+    bool dstDomainSet() const { return m_dstDomainSet; }
+    void dstDomainSet(bool flag) { m_dstDomainSet = flag; }
+    bool asyncPath() const { return m_asyncPath; }
+    void asyncPath(bool flag) { m_asyncPath = flag; }
+};
+
+class CdcVarVertex : public CdcEitherVertex {
+    AstVarScope* m_varScp;
+    int		m_cntAsyncRst;
+    bool	m_fromFlop;
+public:
+    CdcVarVertex(V3Graph* graphp, AstScope* scopep, AstVarScope* varScp)
+	: CdcEitherVertex(graphp, scopep, varScp), m_varScp(varScp), m_cntAsyncRst(0), m_fromFlop(false) {}
+    virtual ~CdcVarVertex() {}
+    // Accessors
+    AstVarScope* varScp() const { return m_varScp; }
+    virtual string name() const { return (cvtToStr((void*)m_varScp)+" "+varScp()->name()); }
+    virtual string dotColor() const { return fromFlop() ? "green" : cntAsyncRst() ? "red" : "blue"; }
+    int cntAsyncRst() const { return m_cntAsyncRst; }
+    void cntAsyncRst(int flag) { m_cntAsyncRst=flag; }
+    bool fromFlop() const { return m_fromFlop; }
+    void fromFlop(bool flag) { m_fromFlop = flag; }
+};
+
+class CdcLogicVertex : public CdcEitherVertex {
+    bool	m_hazard;
+    bool	m_isFlop;
+public:
+    CdcLogicVertex(V3Graph* graphp, AstScope* scopep, AstNode* nodep, AstSenTree* sensenodep)
+	: CdcEitherVertex(graphp,scopep,nodep), m_hazard(false), m_isFlop(false)
+	{ srcDomainp(sensenodep); dstDomainp(sensenodep); }
+    virtual ~CdcLogicVertex() {}
+    // Accessors
+    virtual string name() const { return (cvtToStr((void*)nodep())+"@"+scopep()->prettyName()); }
+    virtual string dotColor() const { return hazard() ? "black" : "yellow"; }
+    bool hazard() const { return m_hazard; }
+    void setHazard(AstNode* nodep) { m_hazard = true; nodep->user3(true); }
+    void clearHazard() { m_hazard = false; }
+    bool isFlop() const { return m_isFlop; }
+    void isFlop(bool flag) { m_isFlop = flag; }
+};
+
+//######################################################################
+
+class CdcDumpVisitor : public CdcBaseVisitor {
+private:
+    // NODE STATE
+    //Entire netlist:
+    // {statement}Node::user3p	-> bool, indicating not hazard
+    ofstream*		m_ofp;		// Output file
+    string		m_prefix;
+
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	*m_ofp<<m_prefix;
+	if (nodep->user3()) *m_ofp<<" %%";
+	else *m_ofp<<"  ";
+	*m_ofp<<nodep->prettyTypeName()<<" "<<endl;
+	string lastPrefix = m_prefix;
+	m_prefix = lastPrefix + "1:";
+	nodep->op1p()->iterateAndNext(*this);
+	m_prefix = lastPrefix + "2:";
+	nodep->op2p()->iterateAndNext(*this);
+	m_prefix = lastPrefix + "3:";
+	nodep->op3p()->iterateAndNext(*this);
+	m_prefix = lastPrefix + "4:";
+	nodep->op4p()->iterateAndNext(*this);
+	m_prefix = lastPrefix;
+    }
+
+public:
+    // CONSTUCTORS
+    CdcDumpVisitor(AstNode* nodep, ofstream* ofp, const string& prefix) {
+	m_ofp = ofp;
+	m_prefix = prefix;
+	nodep->accept(*this);
+    }
+    virtual ~CdcDumpVisitor() {}
+};
+
+//######################################################################
+
+class CdcWidthVisitor : public CdcBaseVisitor {
+private:
+    int		m_maxLineno;
+    size_t	m_maxFilenameLen;
+
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+	// Keeping line+filename lengths separate is much faster than calling ascii().length()
+	if (nodep->fileline()->lineno() >= m_maxLineno) {
+	    m_maxLineno = nodep->fileline()->lineno()+1;
+	}
+	if (nodep->fileline()->filename().length() >= m_maxFilenameLen) {
+	    m_maxFilenameLen = nodep->fileline()->filename().length()+1;
+	}
+    }
+public:
+    // CONSTUCTORS
+    CdcWidthVisitor(AstNode* nodep) {
+	m_maxLineno = 0;
+	m_maxFilenameLen = 0;
+	nodep->accept(*this);
+    }
+    virtual ~CdcWidthVisitor() {}
+    // ACCESSORS
+    int maxWidth() {
+	size_t width=1;
+	width += m_maxFilenameLen;
+	width += 1;  // The :
+	width += cvtToStr(m_maxLineno).length();
+	width += 1;  // Final :
+	return (int)width;
+    }
+};
+
+//######################################################################
+// Cdc class functions
+
+class CdcVisitor : public CdcBaseVisitor {
+private:
+    // NODE STATE
+    //Entire netlist:
+    // AstVarScope::user1p	-> CdcVarVertex* for usage var, 0=not set yet
+    // AstVarScope::user2	-> bool  Used in sensitivity list
+    // {statement}Node::user1p	-> CdcLogicVertex* for this statement
+    // AstNode::user3		-> bool  True indicates to print %% (via V3EmitV)
+    AstUser1InUse	m_inuser1;
+    AstUser2InUse	m_inuser2;
+    AstUser3InUse	m_inuser3;
+
+    // STATE
+    V3Graph		m_graph;	// Scoreboard of var usages/dependencies
+    CdcLogicVertex*	m_logicVertexp;	// Current statement being tracked, NULL=ignored
+    AstScope*		m_scopep;	// Current scope being processed
+    AstNodeModule*	m_modp;		// Current module
+    AstSenTree*		m_domainp;	// Current sentree
+    bool		m_inDly;	// In delayed assign
+    int			m_inSenItem;	// Number of senitems
+    string		m_ofFilename;	// Output filename
+    ofstream*		m_ofp;		// Output file
+    uint32_t		m_userGeneration; // Generation count to avoid slow userClearVertices
+    int			m_filelineWidth;  // Characters in longest fileline
+
+    // METHODS
+    void iterateNewStmt(AstNode* nodep) {
+	if (m_scopep) {
+	    UINFO(4,"   STMT "<<nodep<<endl);
+	    m_logicVertexp = new CdcLogicVertex(&m_graph, m_scopep, nodep, m_domainp);
+	    if (m_domainp && m_domainp->hasClocked()) {  // To/from a flop
+		m_logicVertexp->isFlop(true);
+		m_logicVertexp->srcDomainp(m_domainp);
+		m_logicVertexp->srcDomainSet(true);
+		m_logicVertexp->dstDomainp(m_domainp);
+		m_logicVertexp->dstDomainSet(true);
+	    }
+	    nodep->iterateChildren(*this);
+	    m_logicVertexp = NULL;
+
+	    if (0 && debug()>=9) {
+		UINFO(9, "Trace Logic:\n");
+		nodep->dumpTree(cout, "-log1: ");
+	    }
+	}
+    }
+
+    CdcVarVertex* makeVarVertex(AstVarScope* varscp) {
+	CdcVarVertex* vertexp = (CdcVarVertex*)(varscp->user1p());
+	if (!vertexp) {
+	    UINFO(6,"New vertex "<<varscp<<endl);
+	    vertexp = new CdcVarVertex(&m_graph, m_scopep, varscp);
+	    varscp->user1p(vertexp);
+	    if (varscp->varp()->isUsedClock()) {}
+	    if (varscp->varp()->isPrimaryIO()) {
+		// Create IO vertex - note it's relative to the pointed to var, not where we are now
+		// This allows reporting to easily print the input statement
+		CdcLogicVertex* ioVertexp = new CdcLogicVertex(&m_graph, varscp->scopep(), varscp->varp(), NULL);
+		if (varscp->varp()->isInput()) {
+		    new V3GraphEdge(&m_graph, ioVertexp, vertexp, 1);
+		} else {
+		    new V3GraphEdge(&m_graph, vertexp, ioVertexp, 1);
+		}
+	    }
+	}
+	if (m_inSenItem) {
+	    varscp->user2(true);  // It's like a clock...
+	    // TODO: In the future we could mark it here and do normal clock tree glitch checks also
+	} else if (varscp->user2()) {  // It was detected in a sensitivity list earlier
+	    // And now it's used as logic.  So must be a reset.
+	    vertexp->cntAsyncRst(vertexp->cntAsyncRst()+1);
+	}
+	return vertexp;
+    }
+
+    void warnAndFile(AstNode* nodep, V3ErrorCode code, const string& msg) {
+	static bool told_file = false;
+	nodep->v3warnCode(code,msg);
+	if (!told_file) {
+	    told_file = 1;
+	    cerr<<V3Error::msgPrefix()<<"     See details in "<<m_ofFilename<<endl;
+	}
+	*m_ofp<<"%Warning-"<<code.ascii()<<": "<<nodep->fileline()<<" "<<msg<<endl;
+    }
+
+    void setNodeHazard(AstNode* nodep) {
+	// Need to not clear if warnings are off (rather than when report it)
+	// as bypassing this warning may turn up another path that isn't warning off'ed.
+	if (!m_domainp || m_domainp->hasCombo()) { // Source flop logic in a posedge block is OK for reset (not async though)
+	    if (m_logicVertexp && !nodep->fileline()->warnIsOff(V3ErrorCode::CDCRSTLOGIC)) {
+		UINFO(9,"Set hazard "<<nodep<<endl);
+		m_logicVertexp->setHazard(nodep);
+	    }
+	}
+    }
+
+    string spaces(int level) { string out; while (level--) out+=" "; return out; }
+
+    string pad(unsigned column, const string& in) {
+	string out = in;
+	while (out.length()<column) out += ' ';
+	return out;
+    }
+
+    void analyze() {
+	UINFO(3,__FUNCTION__<<": "<<endl);
+	//if (debug()>6) m_graph.dump();
+	if (debug()>6) m_graph.dumpDotFilePrefixed("cdc_pre");
+	m_graph.removeRedundantEdgesSum(&V3GraphEdge::followAlwaysTrue);
+	m_graph.dumpDotFilePrefixed("cdc_simp");
+	//
+	analyzeReset();
+    }
+
+    int filelineWidth() {
+	if (!m_filelineWidth) {
+	    CdcWidthVisitor visitor (v3Global.rootp());
+	    m_filelineWidth = visitor.maxWidth();
+	}
+	return m_filelineWidth;
+    }
+
+    //----------------------------------------
+    // RESET REPORT
+
+    void analyzeReset() {
+	// Find all async reset wires, and trace backwards
+	// userClearVertices is very slow, so we use a generation count instead
+	m_graph.userClearVertices();  // user1: uint32_t - was analyzed generation
+	for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp=itp->verticesNextp()) {
+	    if (CdcVarVertex* vvertexp = dynamic_cast<CdcVarVertex*>(itp)) {
+		if (vvertexp->cntAsyncRst()) {
+		    m_userGeneration++;  // Effectively a userClearVertices()
+		    UINFO(9, "   Trace One async: "<<vvertexp<<endl);
+		    // Twice, as we need to detect, then propagate
+		    CdcEitherVertex* markp = traceAsyncRecurse(vvertexp, false);
+		    if (markp) { // Mark is non-NULL if something bad on this path
+			UINFO(9, "   Trace One bad! "<<vvertexp<<endl);
+			m_userGeneration++;  // Effectively a userClearVertices()
+			traceAsyncRecurse(vvertexp, true);
+			m_userGeneration++;  // Effectively a userClearVertices()
+			dumpAsync(vvertexp, markp);
+		    }
+		}
+	    }
+	}
+    }
+
+    CdcEitherVertex* traceAsyncRecurse(CdcEitherVertex* vertexp, bool mark) {
+	// Return vertex of any hazardous stuff attached, or NULL if OK
+	if (vertexp->user()>=m_userGeneration) return false;   // Processed - prevent loop
+	vertexp->user(m_userGeneration);
+
+	CdcEitherVertex* mark_outp = NULL;
+	UINFO(9,"      Trace: "<<vertexp<<endl);
+
+	// Clear out in prep for marking next path
+	if (!mark) vertexp->asyncPath(false);
+
+	if (CdcLogicVertex* vvertexp = dynamic_cast<CdcLogicVertex*>(vertexp)) {
+	    // Any logic considered bad, at the moment, anyhow
+	    if (vvertexp->hazard() && !mark_outp) mark_outp = vvertexp;
+	    // And keep tracing back so the user can understand what's up
+	}
+	else if (CdcVarVertex* vvertexp = dynamic_cast<CdcVarVertex*>(vertexp)) {
+	    if (mark) vvertexp->asyncPath(true);
+	    // If primary I/O, it's ok here back
+	    if (vvertexp->varScp()->varp()->isPrimaryIn()) {
+		// Show the source "input" statement if it exists
+		for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+		    CdcEitherVertex* eFromVertexp = (CdcEitherVertex*)edgep->fromp();
+		    eFromVertexp->asyncPath(true);
+		}
+		return false;
+	    }
+	    // Also ok if from flop, but partially trace the flop so more obvious to users
+	    if (vvertexp->fromFlop()) {
+		for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+		    CdcEitherVertex* eFromVertexp = (CdcEitherVertex*)edgep->fromp();
+		    eFromVertexp->asyncPath(true);
+		}
+		return false;
+	    }
+	}
+
+	for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+	    CdcEitherVertex* eFromVertexp = (CdcEitherVertex*)edgep->fromp();
+	    CdcEitherVertex* submarkp = traceAsyncRecurse(eFromVertexp, mark);
+	    if (submarkp && !mark_outp) mark_outp = submarkp;
+	}
+
+	if (mark) vertexp->asyncPath(true);
+	return mark_outp;
+    }
+
+    void dumpAsync(CdcVarVertex* vertexp, CdcEitherVertex* markp) {
+	AstNode* nodep = vertexp->varScp();
+	*m_ofp<<"\n";
+	*m_ofp<<"\n";
+	CdcEitherVertex* targetp = vertexp;  // One example destination flop (of possibly many)
+	for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
+	    CdcEitherVertex* eToVertexp = (CdcEitherVertex*)edgep->top();
+	    if (!eToVertexp) targetp = eToVertexp;
+	    if (CdcLogicVertex* vvertexp = dynamic_cast<CdcLogicVertex*>(eToVertexp)) {
+		if (vvertexp->isFlop()) {
+		    targetp = eToVertexp;
+		    break;
+		}
+	    }  // else it might be random logic that's not relevant
+	}
+	warnAndFile(markp->nodep(),V3ErrorCode::CDCRSTLOGIC,"Logic in path that feeds async reset, via signal: "+nodep->prettyName());
+	dumpAsyncRecurse(targetp, "", "   ",0);
+    }
+    bool dumpAsyncRecurse(CdcEitherVertex* vertexp, const string& prefix, const string& sep, int level) {
+	// level=0 is special, indicates to dump destination flop
+	// Return true if printed anything
+	// If mark, also mark the output even if nothing hazardous below
+	if (vertexp->user()>=m_userGeneration) return false;   // Processed - prevent loop
+	vertexp->user(m_userGeneration);
+	if (!vertexp->asyncPath() && level!=0) return false;  // Not part of path
+
+	// Other logic in the path
+	string cont = prefix+sep;
+	string nextsep = "   ";
+	for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+	    CdcEitherVertex* eFromVertexp = (CdcEitherVertex*)edgep->fromp();
+	    if (dumpAsyncRecurse(eFromVertexp, cont, nextsep, level+1)) {
+		nextsep = " | ";
+	    }
+	}
+
+	// Dump single variable/logic block
+	// See also OrderGraph::loopsVertexCb(V3GraphVertex* vertexp)
+	AstNode* nodep = vertexp->nodep();
+	string front = pad(filelineWidth(),nodep->fileline()->ascii()+":")+" "+prefix+" +- ";
+	if (nodep->castVarScope()) {
+	    *m_ofp<<front<<"Variable: "<<nodep->prettyName()<<endl;
+	}
+	else {
+	    V3EmitV::verilogPrefixedTree(nodep, *m_ofp, prefix+" +- ", filelineWidth(),
+					 vertexp->srcDomainp(), true);
+	    if (debug()) {
+		CdcDumpVisitor visitor (nodep, m_ofp, front+"DBG: ");
+	    }
+	}
+
+	nextsep = " | ";
+	if (level) *m_ofp<<V3OutFile::indentSpaces(filelineWidth())<<" "<<prefix<<nextsep<<"\n";
+
+	if (CdcLogicVertex* vvertexp = dynamic_cast<CdcLogicVertex*>(vertexp)) {
+	    // Now that we've printed a path with this hazard, don't bother to print any more
+	    // Otherwise, we'd get a path for almost every destination flop
+	    vvertexp->clearHazard();
+	}
+	return true;
+    }
+
+    //----------------------------------------
+    // EDGE REPORTS
+
+    void edgeReport() {
+	// Make report of all signal names and what clock edges they have
+	UINFO(3,__FUNCTION__<<": "<<endl);
+
+	// Trace all sources and sinks
+	for (int traceDests=0; traceDests<2; ++traceDests) {
+	    UINFO(9, " Trace Direction "<<(traceDests?"dst":"src")<<endl);
+	    m_graph.userClearVertices();  // user1: bool - was analyzed
+	    for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp=itp->verticesNextp()) {
+		if (CdcVarVertex* vvertexp = dynamic_cast<CdcVarVertex*>(itp)) {
+		    UINFO(9, "   Trace One edge: "<<vvertexp<<endl);
+		    edgeDomainRecurse(vvertexp, traceDests, 0);
+		}
+	    }
+	}
+
+	string filename = v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__cdc_edges.txt";
+	const auto_ptr<ofstream> ofp (V3File::new_ofstream(filename));
+	if (ofp->fail()) v3fatalSrc("Can't write "<<filename);
+	*ofp<<"Edge Report for "<<v3Global.opt.prefix()<<endl;
+
+	deque<string> report;  // Sort output by name
+	for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp=itp->verticesNextp()) {
+	    if (CdcVarVertex* vvertexp = dynamic_cast<CdcVarVertex*>(itp)) {
+		AstVar* varp = vvertexp->varScp()->varp();
+		if (1) {  // varp->isPrimaryIO()
+		    const char* whatp = "wire";
+		    if (varp->isPrimaryIO()) whatp = (varp->isInout()?"inout":varp->isInput()?"input":"output");
+
+		    ostringstream os;
+		    os.setf(ios::left);
+		    os<<"  "<<setw(8)<<whatp;
+		    os<<"  "<<setw(40)<<vvertexp->varScp()->prettyName();
+		    os<<"  SRC=";
+		    if (vvertexp->srcDomainp()) V3EmitV::verilogForTree(vvertexp->srcDomainp(), os);
+		    os<<"  DST=";
+		    if (vvertexp->dstDomainp()) V3EmitV::verilogForTree(vvertexp->dstDomainp(), os);
+		    os<<setw(0);
+		    os<<endl;
+		    report.push_back(os.str());
+		}
+	    }
+	}
+	sort(report.begin(), report.end());
+	for (deque<string>::iterator it = report.begin(); it!=report.end(); ++it) {
+	    *ofp << *it;
+	}
+    }
+
+    void edgeDomainRecurse(CdcEitherVertex* vertexp, bool traceDests, int level) {
+	// Scan back to inputs/outputs, flops, and compute clock domain information
+	UINFO(8,spaces(level)<<"     Tracein  "<<vertexp<<endl);
+	if (vertexp->user()>=m_userGeneration) return;   // Mid-Processed - prevent loop
+	vertexp->user(m_userGeneration);
+
+	// Variables from flops already are domained
+	if (traceDests ? vertexp->dstDomainSet() : vertexp->srcDomainSet()) return;  // Fully computed
+
+	typedef set<AstSenTree*> SenSet;
+	SenSet 	    senouts;   // List of all sensitivities for new signal
+	if (CdcLogicVertex* vvertexp = dynamic_cast<CdcLogicVertex*>(vertexp)) {
+	    if (vvertexp) {}  // Unused
+	}
+	else if (CdcVarVertex* vvertexp = dynamic_cast<CdcVarVertex*>(vertexp)) {
+	    // If primary I/O, give it domain of the input
+	    AstVar* varp = vvertexp->varScp()->varp();
+	    if (varp->isPrimaryIO() && varp->isInput() && !traceDests) {
+		senouts.insert(new AstSenTree(varp->fileline(), new AstSenItem(varp->fileline(), AstSenItem::Combo())));
+	    }
+	}
+
+	// Now combine domains of sources/dests
+	if (traceDests) {
+	    for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
+		CdcEitherVertex* eToVertexp = (CdcEitherVertex*)edgep->top();
+		edgeDomainRecurse(eToVertexp, traceDests, level+1);
+		if (eToVertexp->dstDomainp()) senouts.insert(eToVertexp->dstDomainp());
+	    }
+	} else {
+	    for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+		CdcEitherVertex* eFromVertexp = (CdcEitherVertex*)edgep->fromp();
+		edgeDomainRecurse(eFromVertexp, traceDests, level+1);
+		if (eFromVertexp->srcDomainp()) senouts.insert(eFromVertexp->srcDomainp());
+	    }
+	}
+
+	// Convert list of senses into one sense node
+	AstSenTree* senoutp = NULL;
+	bool	    senedited = false;
+	for (SenSet::iterator it=senouts.begin(); it!=senouts.end(); ++it) {
+	    if (!senoutp) senoutp = *it;
+	    else {
+		if (!senedited) {
+		    senedited = true;
+		    senoutp = senoutp->cloneTree(true);
+		}
+		senoutp->addSensesp((*it)->sensesp()->cloneTree(true));
+	    }
+	}
+	// If multiple domains need to do complicated optimizations
+	if (senedited) {
+	    senoutp = V3Const::constifyExpensiveEdit(senoutp)->castSenTree();
+	}
+	if (traceDests) {
+	    vertexp->dstDomainSet(true);  // Note it's set - domainp may be null, so can't use that
+	    vertexp->dstDomainp(senoutp);
+	    if (debug()>=9) {
+		UINFO(9,spaces(level)+"     Tracedst "<<vertexp);
+		if (senoutp) V3EmitV::verilogForTree(senoutp, cout); cout<<endl;
+	    }
+	} else {
+	    vertexp->srcDomainSet(true);  // Note it's set - domainp may be null, so can't use that
+	    vertexp->srcDomainp(senoutp);
+	    if (debug()>=9) {
+		UINFO(9,spaces(level)+"     Tracesrc "<<vertexp);
+		if (senoutp) V3EmitV::verilogForTree(senoutp, cout); cout<<endl;
+	    }
+	}
+    }
+
+    // VISITORS
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
+	m_modp = nodep;
+	nodep->iterateChildren(*this);
+	m_modp = NULL;
+    }
+    virtual void visit(AstScope* nodep, AstNUser*) {
+	UINFO(4," SCOPE "<<nodep<<endl);
+	m_scopep = nodep;
+	m_logicVertexp = NULL;
+	nodep->iterateChildren(*this);
+	m_scopep = NULL;
+    }
+    virtual void visit(AstActive* nodep, AstNUser*) {
+	// Create required blocks and add to module
+	UINFO(4,"  BLOCK  "<<nodep<<endl);
+	AstNode::user2ClearTree();
+	m_domainp = nodep->sensesp();
+	if (!m_domainp || m_domainp->hasCombo() || m_domainp->hasClocked()) {  // IE not hasSettle/hasInitial
+	    iterateNewStmt(nodep);
+	}
+	m_domainp = NULL;
+	AstNode::user2ClearTree();
+    }
+    virtual void visit(AstNodeVarRef* nodep, AstNUser*) {
+	if (m_scopep) {
+	    if (!m_logicVertexp) nodep->v3fatalSrc("Var ref not under a logic block\n");
+	    AstVarScope* varscp = nodep->varScopep();
+	    if (!varscp) nodep->v3fatalSrc("Var didn't get varscoped in V3Scope.cpp\n");
+	    CdcVarVertex* varvertexp = makeVarVertex(varscp);
+	    UINFO(5," VARREF to "<<varscp<<endl);
+	    // We use weight of one; if we ref the var more than once, when we simplify,
+	    // the weight will increase
+	    if (nodep->lvalue()) {
+		new V3GraphEdge(&m_graph, m_logicVertexp, varvertexp, 1);
+		if (m_inDly) {
+		    varvertexp->fromFlop(true);
+		    varvertexp->srcDomainp(m_domainp);
+		    varvertexp->srcDomainSet(true);
+		}
+	    } else {
+		new V3GraphEdge(&m_graph, varvertexp, m_logicVertexp, 1);
+	    }
+	}
+    }
+    virtual void visit(AstAssignDly* nodep, AstNUser*) {
+	m_inDly = true;
+	nodep->iterateChildren(*this);
+	m_inDly = false;
+    }
+    virtual void visit(AstSenItem* nodep, AstNUser*) {
+	// Note we look at only AstSenItems, not AstSenGate's
+	// The gating term of a AstSenGate is normal logic
+	m_inSenItem = true;
+	nodep->iterateChildren(*this);
+	m_inSenItem = false;
+    }
+    virtual void visit(AstAlways* nodep, AstNUser*) {
+	iterateNewStmt(nodep);
+    }
+    virtual void visit(AstAlwaysPublic* nodep, AstNUser*) {
+	// CDC doesn't care about public variables
+    }
+    virtual void visit(AstCFunc* nodep, AstNUser*) {
+	iterateNewStmt(nodep);
+    }
+    virtual void visit(AstSenGate* nodep, AstNUser*) {
+	// First handle the clock part will be handled in a minute by visit AstSenItem
+	// The logic gating term is delt with as logic
+	iterateNewStmt(nodep);
+    }
+    virtual void visit(AstAssignAlias* nodep, AstNUser*) {
+	iterateNewStmt(nodep);
+    }
+    virtual void visit(AstAssignW* nodep, AstNUser*) {
+	iterateNewStmt(nodep);
+    }
+
+    // Math that shouldn't cause us to clear hazard
+    virtual void visit(AstConst* nodep, AstNUser*) { }
+    virtual void visit(AstReplicate* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstConcat* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstNot* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstSel* nodep, AstNUser*) {
+	if (!nodep->lsbp()->castConst()) setNodeHazard(nodep);
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstNodeSel* nodep, AstNUser*) {
+	if (!nodep->bitp()->castConst()) setNodeHazard(nodep);
+	nodep->iterateChildren(*this);
+    }
+
+    // Ignores
+    virtual void visit(AstInitial* nodep, AstNUser*) { }
+    virtual void visit(AstTraceInc* nodep, AstNUser*) { }
+    virtual void visit(AstCoverToggle* nodep, AstNUser*) { }
+
+    //--------------------
+    // Default
+    virtual void visit(AstNodeMath* nodep, AstNUser*) {
+	setNodeHazard(nodep);
+	nodep->iterateChildren(*this);
+    }
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+
+public:
+    // CONSTUCTORS
+    CdcVisitor(AstNode* nodep) {
+	m_logicVertexp = NULL;
+	m_scopep = NULL;
+	m_modp = NULL;
+	m_domainp = NULL;
+	m_inDly = false;
+	m_inSenItem = 0;
+	m_userGeneration = 0;
+	m_filelineWidth = 0;
+
+	// Make report of all signal names and what clock edges they have
+	string filename = v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__cdc.txt";
+	m_ofp = V3File::new_ofstream(filename);
+	if (m_ofp->fail()) v3fatalSrc("Can't write "<<filename);
+	m_ofFilename = filename;
+	*m_ofp<<"CDC Report for "<<v3Global.opt.prefix()<<endl;
+	*m_ofp<<"Each dump below traces logic from inputs/source flops to destination flop(s).\n";
+	*m_ofp<<"First source logic is listed, then a variable that logic generates,\n";
+	*m_ofp<<"repeating recursively forwards to the destination flop(s).\n";
+	*m_ofp<<"%% Indicates the operator considered potentially hazardous.\n";
+
+	nodep->accept(*this);
+	analyze();
+	//edgeReport();  // Not useful at the moment
+
+	if (0) { *m_ofp<<"\nDBG-test-dumper\n"; V3EmitV::verilogPrefixedTree(nodep, *m_ofp, "DBG ",40,NULL,true); *m_ofp<<endl; }
+    }
+    virtual ~CdcVisitor() {
+	if (m_ofp) { delete m_ofp; m_ofp = NULL; }
+    }
+};
+
+//######################################################################
+// Cdc class functions
+
+void V3Cdc::cdcAll(AstNetlist* nodep) {
+    UINFO(2,__FUNCTION__<<": "<<endl);
+    CdcVisitor visitor (nodep);
+}
@@ -0,0 +1,37 @@
+// -*- C++ -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Break always into sensitivity block domains
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+
+#ifndef _V3CDC_H_
+#define _V3CDC_H_ 1
+#include "config_build.h"
+#include "verilatedos.h"
+#include "V3Error.h"
+#include "V3Ast.h"
+
+//============================================================================
+
+class V3Cdc {
+public:
+    static void cdcAll(AstNetlist* nodep);
+};
+
+#endif // Guard
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for changed nodes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Changed's Transformations:
-//		
+//
 // Each module:
 //	Each combo block
 //	    For each variable that comes from combo block and is generated AFTER a usage
@@ -33,8 +33,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <set>
@@ -51,20 +51,28 @@ class ChangedVisitor : public AstNVisitor {
 private:
    // NODE STATE
    // Entire netlist:
-    //  AstVarScope::user()		-> bool.  True indicates processed
+    //  AstVarScope::user1()		-> bool.  True indicates processed
+    AstUser1InUse	m_inuser1;
+
    // STATE
-    AstModule*		m_topModp;	// Top module
+    AstNodeModule*	m_topModp;	// Top module
    AstScope*		m_scopetopp;	// Scope under TOPSCOPE
    AstCFunc*		m_chgFuncp;	// Change function we're building
-    //int debug() { return 9; }

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    void genChangeDet(AstVarScope* vscp) {
 #ifdef NEW_ORDERING
 	vscp->v3fatalSrc("Not applicable\n");
 #endif
 	AstVar* varp = vscp->varp();
-	if (varp->arraysp()) {
+	vscp->v3warn(IMPERFECTSCH,"Imperfect scheduling of variable: "<<vscp);
+	if (!varp->dtypeSkipRefp()->castBasicDType()) {
 	    vscp->v3error("Unsupported: Can't detect changes on arrayed variable (probably with UNOPTFLAT warning suppressed): "<<varp->prettyName());
 	} else {
 	    string newvarname = "__Vchglast__"+vscp->scopep()->nameDotless()+"__"+varp->shortName();
@@ -91,7 +99,7 @@ private:
    }

    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	UINFO(4," MOD   "<<nodep<<endl);
 	if (nodep->isTop()) {
 	    m_topModp = nodep;
@@ -101,13 +109,13 @@ private:
    virtual void visit(AstTopScope* nodep, AstNUser*) {
 	UINFO(4," TS "<<nodep<<endl);
 	// Clearing
-	AstNode::userClearTree();
+	AstNode::user1ClearTree();
 	// Create the change detection function
 	AstScope* scopep = nodep->scopep();
 	if (!scopep) nodep->v3fatalSrc("No scope found on top level, perhaps you have no statements?\n");
 	m_scopetopp = scopep;
 	// Create change detection function
-	m_chgFuncp = new AstCFunc(nodep->fileline(), "_change_request", scopep, "bool");
+	m_chgFuncp = new AstCFunc(nodep->fileline(), "_change_request", scopep, "IData");
 	m_chgFuncp->argTypes(EmitCBaseVisitor::symClassVar());
 	m_chgFuncp->symProlog(true);
 	m_chgFuncp->declPrivate(true);
@@ -120,8 +128,7 @@ private:
    virtual void visit(AstVarScope* nodep, AstNUser*) {
 	if (nodep->isCircular()) {
 	    UINFO(8,"  CIRC "<<nodep<<endl);
-	    if (!nodep->user()) {
-		nodep->user(true);
+	    if (!nodep->user1Inc()) {
 		genChangeDet(nodep);
 	    }
 	}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for clean nodes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Clean's Transformations:
-//		
+//
 // Each module:
 //	For each math operator, if it requires a clean operand,
 //	and the operand is dirty, insert a CLEAN node.
@@ -30,8 +30,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -48,15 +48,22 @@ private:
    // Entire netlist:
    //  AstNode::user()		-> CleanState.  For this node, 0==UNKNOWN
    //  AstNode::user2()	-> bool.  True indicates minWidth has been propagated
+    AstUser1InUse	m_inuser1;
+    AstUser2InUse	m_inuser2;
+
+    // TYPES
+    enum CleanState { CS_UNKNOWN, CS_CLEAN, CS_DIRTY };

    // STATE
-    AstModule* m_modp;
-    //int debug() { return 9; }
+    AstNodeModule* m_modp;

-    // ENUMS
-    enum CleanState { UNKNOWN, CLEAN, DIRTY };
-    
    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    // Width resetting
    int  cppWidth(AstNode* nodep) {
 	if (nodep->width()<=VL_WORDSIZE) return VL_WORDSIZE;
@@ -69,7 +76,7 @@ private:
    }
    void computeCppWidth (AstNode* nodep) {
 	if (!nodep->user2()) {
-	    if (nodep->castVar()) {  // Don't want to change variable widths!
+	    if (nodep->castVar() || nodep->castNodeDType()) {  // Don't want to change variable widths!
 		setCppWidth(nodep, nodep->width(), nodep->width());  // set widthMin anyways so can see it later
 	    } else {
 		setCppWidth(nodep, cppWidth(nodep), nodep->widthMin());
@@ -79,22 +86,22 @@ private:

    // Store the clean state in the userp on each node
    void setCleanState(AstNode* nodep, CleanState clean) {
-	nodep->user(clean);
+	nodep->user1(clean);
    }
    CleanState getCleanState(AstNode* nodep) {
-	return ((CleanState)nodep->user());
+	return ((CleanState)nodep->user1());
    }
    bool isClean(AstNode* nodep) {
 	CleanState clstate = getCleanState(nodep);
-	if (clstate==CLEAN) return true;
-	if (clstate==DIRTY) return false;
-	nodep->v3fatalSrc("Unknown clean state on node.");
+	if (clstate==CS_CLEAN) return true;
+	if (clstate==CS_DIRTY) return false;
+	nodep->v3fatalSrc("Unknown clean state on node: "+nodep->prettyTypeName());
 	return false;
    }
    void setClean(AstNode* nodep, bool isClean) {
 	computeCppWidth (nodep);  // Just to be sure it's in widthMin
 	bool wholeUint = ((nodep->widthMin() % VL_WORDSIZE) == 0);  //32,64,...
-	setCleanState(nodep, ((isClean||wholeUint) ? CLEAN:DIRTY));
+	setCleanState(nodep, ((isClean||wholeUint) ? CS_CLEAN:CS_DIRTY));
    }

    // Operate on nodes
@@ -153,9 +160,10 @@ private:
    }

    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	m_modp = nodep;
 	nodep->iterateChildren(*this);
+	m_modp = NULL;
    }
    virtual void visit(AstNodeUniop* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
@@ -232,9 +240,10 @@ private:
 	nodep->iterateChildren(*this);
 	insureClean(nodep->condp());
    }
-    virtual void visit(AstNodePli* nodep, AstNUser*) {
+    virtual void visit(AstSFormatF* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	insureCleanAndNext (nodep->exprsp());
+	setClean(nodep, true);  // generates a string, so not relevant
    }
    virtual void visit(AstUCStmt* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
@@ -254,13 +263,10 @@ private:

 public:
    // CONSTUCTORS
-    CleanVisitor() {}
-    virtual ~CleanVisitor() {}
-    void main(AstNetlist* nodep) {
-	AstNode::userClearTree();	// userp() used on entire tree
-	AstNode::user2ClearTree();	// userp() used on entire tree
+    CleanVisitor(AstNetlist* nodep) {
 	nodep->accept(*this);
    }
+    virtual ~CleanVisitor() {}
 };

 //######################################################################
@@ -268,6 +274,5 @@ public:

 void V3Clean::cleanAll(AstNetlist* nodep) {
    UINFO(2,__FUNCTION__<<": "<<endl);
-    CleanVisitor visitor;
-    visitor.main(nodep);
+    CleanVisitor visitor (nodep);
 }
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -0,0 +1,917 @@
+// -*- C++ -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Break always into sensitivity active domains
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2008-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+// V3ClkGater's Transformations:
+//
+//   Look for clock gaters
+//   Note there's overlap between this process and V3Split's
+//	ALWAYS: Build graph
+// 	    IF: Form vertex pointing to any IFs or ALWAYS above
+//	    VARREF: Form vertex pointing to IFs it is under
+//	    ASSIGN: If under normal assignment, disable optimization
+//          FUTURE OPTIMIZE: If signal is set to itself, consider that OK for gating.
+// 	    !splitable: Mark all VARREFs in this statement as comming from it
+//	Optimize graph so if signal is referenced under multiple IF branches it moves up
+//	Make ALWAYS for each new gating term, and move statements there
+//*************************************************************************
+
+#include "config_build.h"
+#include "verilatedos.h"
+#include <cstdio>
+#include <cstdarg>
+#include <unistd.h>
+#include <map>
+#include <algorithm>
+#include <vector>
+
+#include "V3Global.h"
+#include "V3Ast.h"
+#include "V3Stats.h"
+#include "V3Graph.h"
+#include "V3ClkGater.h"
+
+//######################################################################
+// Base for debug
+
+class GaterBaseVisitor : public AstNVisitor {
+protected:
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+};
+
+//######################################################################
+// Support classes
+
+class GaterVarVertex;
+
+class GaterVertex : public V3GraphVertex {
+    static uint32_t s_rankNum;
+public:
+    GaterVertex(V3Graph* graphp)
+	: V3GraphVertex(graphp) {
+	s_rankNum++; rank(s_rankNum);
+    }
+    virtual ~GaterVertex() {}
+    virtual int typeNum() const = 0;
+    static void clearRank() { s_rankNum=0; }
+    virtual int sortCmp(const V3GraphVertex* rhsp) const;
+};
+uint32_t GaterVertex::s_rankNum = 0;
+
+class GaterHeadVertex : public GaterVertex {
+public:
+    GaterHeadVertex(V3Graph* graphp)
+	: GaterVertex(graphp) {}
+    virtual ~GaterHeadVertex() {}
+    virtual int typeNum() const { return __LINE__; }  // C++ typeof() equivelent
+    virtual string name() const { return "*HEAD*"; }
+    virtual string dotColor() const { return "green"; }
+};
+
+class GaterPliVertex : public GaterVertex {
+public:
+    GaterPliVertex(V3Graph* graphp)
+	: GaterVertex(graphp) {}
+    virtual ~GaterPliVertex() {}
+    virtual int typeNum() const { return __LINE__; }  // C++ typeof() equivelent
+    virtual string name() const { return "*PLI*"; }
+    virtual string dotColor() const { return "red"; }
+};
+
+class GaterIfVertex : public GaterVertex {
+    AstNodeIf*	m_nodep;
+public:
+    AstNodeIf* nodep() const { return m_nodep; }
+    GaterIfVertex(V3Graph* graphp, AstNodeIf* nodep)
+	: GaterVertex(graphp), m_nodep(nodep) { }
+    virtual ~GaterIfVertex() {}
+    virtual int typeNum() const { return __LINE__; }  // C++ typeof() equivelent
+    virtual string name() const { return cvtToStr((void*)m_nodep)+" {"+cvtToStr(m_nodep->fileline()->lineno())+"}"; }
+};
+
+class GaterVarVertex : public GaterVertex {
+    AstVarScope*	m_nodep;
+public:
+    AstVarScope* nodep() const { return m_nodep; }
+    GaterVarVertex(V3Graph* graphp, AstVarScope* nodep)
+	: GaterVertex(graphp), m_nodep(nodep) { }
+    virtual ~GaterVarVertex() {}
+    virtual int typeNum() const { return __LINE__; }  // C++ typeof() equivelent
+    virtual string name() const { return nodep()->name(); }
+    virtual string dotColor() const { return "skyblue"; }
+};
+
+//######################################################################
+// Edge types
+
+class GaterEdge : public V3GraphEdge {
+    uint32_t	m_ifelse;	// True branch of if
+public:
+    // These are used as shift amounts into node's user()
+#define VU_DEFINE  enum VarUsage { VU_NONE=0, VU_IF=1, VU_ELSE=2, VU_PLI=4, VU_MADE=8}
+    VU_DEFINE;
+
+    uint32_t ifelse() const { return m_ifelse; }
+    bool ifelseTrue()  const { return m_ifelse & VU_IF; }
+    bool ifelseFalse() const { return m_ifelse & VU_ELSE; }
+    bool ifelseBoth() const { return ifelseTrue() && ifelseFalse(); }
+    GaterEdge(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top, uint32_t ifelse)
+	: V3GraphEdge(graphp, fromp, top, 10, false), m_ifelse(ifelse) {}
+    virtual ~GaterEdge() {}
+    virtual string dotColor() const { return ((ifelse() & VU_PLI) ? "red"
+					      : (ifelseBoth() ? "blue"
+						 : (ifelseTrue() ? "green"
+						    : "darkgreen"))); }
+    virtual int sortCmp(const V3GraphEdge* rEdgep) const {
+	// Our master sort sorts by edges first, so we don't want to
+	// consider the upstream vertex::sortCmp when sorting by edges.
+	// We do want to order by something though; rank works
+	if (fromp()->rank() < rEdgep->fromp()->rank()) return -1;
+	if (fromp()->rank() > rEdgep->fromp()->rank()) return 1;
+	// If same, resolve by ifelse
+	const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
+	if (m_ifelse < crEdgep->m_ifelse) return -1;
+	if (m_ifelse > crEdgep->m_ifelse) return 1;
+	return 0;
+    }
+};
+
+int GaterVertex::sortCmp(const V3GraphVertex* rhsp) const {
+    const GaterVertex* crhsp = static_cast<const GaterVertex*>(rhsp);
+    // We really only care about ordering Var's together, but...
+    // First put same type together
+    if (typeNum() < crhsp->typeNum()) return -1;
+    if (typeNum() > crhsp->typeNum()) return 1;
+    // If variable, group by same input fanin
+    // (know they're the same type based on above compare)
+    if (dynamic_cast<const GaterVarVertex*>(this)) {
+	// We've already sorted by edges, so just see if same tree
+	// If this gets too slow, we could compute a hash up front
+	V3GraphEdge* lEdgep = this->inBeginp();
+	V3GraphEdge* rEdgep = rhsp->inBeginp();
+	while (lEdgep && rEdgep) {
+	    const GaterEdge* clEdgep = static_cast<const GaterEdge*>(lEdgep);
+	    const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
+	    if (lEdgep->fromp()->rank() < rEdgep->fromp()->rank()) return -1;
+	    if (lEdgep->fromp()->rank() > rEdgep->fromp()->rank()) return 1;
+	    if (clEdgep->ifelse() < crEdgep->ifelse()) return -1;
+	    if (clEdgep->ifelse() > crEdgep->ifelse()) return 1;
+	    lEdgep = lEdgep->inNextp();
+	    rEdgep = rEdgep->inNextp();
+	}
+	if (!lEdgep && !rEdgep) return 0;
+	return lEdgep ? -1 : 1;
+    }
+    // Finally by rank of this vertex
+    if (rank() < rhsp->rank()) return -1;
+    if (rank() > rhsp->rank()) return 1;
+    return 0;
+}
+
+//######################################################################
+// Check for non-simple gating equations
+
+class GaterCondVisitor : public GaterBaseVisitor {
+private:
+    // RETURN STATE
+    bool		m_isSimple;	// Set false when we know it isn't simple
+    // METHODS
+    inline void okIterate(AstNode* nodep) {
+	if (m_isSimple) nodep->iterateChildren(*this);
+    }
+    // VISITORS
+    virtual void visit(AstOr* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstAnd* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstNot* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstLogOr* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstLogAnd* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstLogNot* nodep, AstNUser*) {	okIterate(nodep); }
+    virtual void visit(AstVarRef* nodep, AstNUser*) {	okIterate(nodep); }
+
+    // Other possibilities are equals, etc
+    // But, we don't want to get too complicated or it will take too much
+    // effort to calculate the gater
+
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	m_isSimple = false;
+	//nodep->iterateChildren(*this);
+    }
+public:
+    // CONSTUCTORS
+    GaterCondVisitor(AstNode* nodep) {
+	m_isSimple = true;
+	nodep->accept(*this);
+    }
+    virtual ~GaterCondVisitor() {}
+    // PUBLIC METHODS
+    bool isSimple() const { return m_isSimple; }
+};
+
+//######################################################################
+// Check for non-simple gating equations
+
+class GaterBodyVisitor : public GaterBaseVisitor {
+    // NODE STATE
+    // Input state
+    //  AstVarScope::user2p()	-> AstAlways* moving this variable to
+
+    enum State {
+	// This is used as a bitmask
+	STATE_UNKNOWN=0,
+	STATE_KEEP=1,	// Seen a variable we need, keep this statement
+	STATE_DELETE=2	// Seen a variable we need, delete this statement
+	// 3=keep & delete
+    };
+
+    bool	m_original;	// Deleting original statements, vs deleting new var statements
+    AstNode*	m_exprp;	// New gater expression we are building
+    bool	m_cloning;	// Clone this object 0=not sure yet, 1=do
+    uint32_t	m_state;	// Parsing state
+
+    // VISITORS
+    virtual void visit(AstVarRef* nodep, AstNUser*) {
+	if (nodep->lvalue()) {
+	    AstVarScope* vscp = nodep->varScopep();
+	    if (vscp->user2p()->castNode() == m_exprp) {
+		// This variable's block needs to move to the new always
+		if (m_original) {
+		    UINFO(9,"  VARREF delete in old: "<<nodep<<endl);
+		    m_state |= STATE_DELETE;
+		} else {
+		    UINFO(9,"  VARREF stays in new:  "<<nodep<<endl);
+		    m_state |= STATE_KEEP;
+		}
+	    } else {
+		if (m_original) {
+		    UINFO(9,"  VARREF other stays in old\n");
+		    m_state |= STATE_KEEP;
+		} else {
+		    UINFO(9,"  VARREF other delete in new\n");
+		    m_state |= STATE_DELETE;
+		}
+	    }
+	}
+    }
+
+    //virtual void visit(AstNodeIf* nodep, AstNUser*) { ... }
+    // Not needed, it's the same handling as any other statement.  Cool, huh?
+    // (We may get empty IFs but the constant propagater will rip them up for us)
+
+    virtual void visit(AstNodeStmt* nodep, AstNUser*) {
+	uint32_t oldstate = m_state;
+	// Find if children want to delete this or not.
+	// Note children may bicker, and want to both keep and delete (branches on a if)
+	uint32_t childstate;
+	{
+	    m_state = STATE_UNKNOWN;
+	    nodep->iterateChildren(*this);
+	    childstate = m_state;
+	}
+	m_state = oldstate;
+	UINFO(9,"    Did state="<<childstate<<"  "<<nodep<<endl);
+
+	// Indeterminate (statement with no lvalue), so keep only in original
+	if (childstate == STATE_UNKNOWN) {
+	    if (m_original) childstate |= STATE_KEEP;
+	    else childstate |= STATE_DELETE;
+	}
+
+	if ((childstate & STATE_DELETE) && !(childstate & STATE_KEEP)) {
+	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
+	    // Pass upwards we did delete
+	    m_state |= STATE_DELETE;
+	} else {
+	    // Pass upwards we must keep
+	    m_state |= STATE_KEEP;
+	}
+    }
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+public:
+    // CONSTUCTORS
+    GaterBodyVisitor(AstAlways* nodep, AstNode* exprp, bool original) {
+	m_exprp = exprp;
+	m_original = original;
+	m_state = STATE_UNKNOWN;
+	if (debug()>=9) nodep->dumpTree(cout,"  GateBodyIn:  ");
+	nodep->bodysp()->iterateAndNext(*this);
+	if (debug()>=9) nodep->dumpTree(cout,"  GateBodyOut: ");
+	// If there's no statements we shouldn't have had a resulting graph
+	// vertex asking for this creation
+    }
+    virtual ~GaterBodyVisitor() {}
+};
+
+//######################################################################
+// Create clock gaters
+
+class GaterVisitor : public GaterBaseVisitor {
+    // NODE STATE
+    // Cleared on Always
+    //  AstVarScope::user1p()	-> GaterVarVertex*
+    //  AstAlways::user4()	-> bool.  True indicates processed
+    // Cleared on each new Always
+    //  AstVarScope::user2p()	-> AstAlways* moving this variable to
+    AstUser1InUse	m_inuser1;
+    AstUser2InUse	m_inuser2;
+    AstUser4InUse	m_inuser4;
+
+    // GRAPH STATE
+    // Cleared on simplify
+    //  Vertex::user()		-> VarUsage: Mark of which if/else edges are hit
+
+    // TYPES
+    VU_DEFINE;
+
+    enum MiscConsts {
+	IF_DEPTH_MAX = 4,	// IFs deep we bother to analyze
+	DOMAINS_MAX = 32	// Clock domains before avoiding O(N^2) blowup
+    };
+
+    // MEMBERS
+    string	m_nonopt;		// Reason block is not optimizable
+    V3Double0	m_statGaters;		// Statistic tracking
+    V3Double0	m_statBits;		// Statistic tracking
+    bool	m_directlyUnderAlw;	// Immediately under Always or If
+    int		m_ifDepth;		// Depth of IF statements
+    int		m_numIfs;		// Number of IF statements
+    V3Graph	m_graph;		// Scoreboard of var usages/dependencies
+    GaterPliVertex*	m_pliVertexp;	// Element specifying PLI ordering
+    GaterHeadVertex*	m_headVertexp;	// Top vertex
+    V3GraphVertex*	m_aboveVertexp;	// Vertex above this point in tree
+    uint32_t		m_aboveTrue;	// Vertex above this point is true branch
+    AstVarScope*	m_stmtVscp;	// Current statement had variable assigned
+    bool		m_stmtInPli;	// Current statement has PLI
+
+    // METHODS
+    void nonOptimizable(AstNode* nodep, const char* reasonp) {
+	if (m_nonopt=="") {
+	    UINFO(9,"    Nonopt: "<<reasonp<<": "<<nodep<<endl);
+	    m_nonopt = reasonp;
+	}
+    }
+    void scoreboardPli(AstNode* nodep) {
+	// Order all PLI statements with other PLI statements
+	// This insures $display's and such remain in proper order
+	// We don't prevent splitting out other non-pli statements, however,
+	// because it is common to have $uasserts sprinkled about.
+	if (!m_pliVertexp) {
+	    m_pliVertexp = new GaterPliVertex(&m_graph);
+	}
+	if (m_stmtVscp) {  // Already saw a variable, be sure to mark it!
+	    GaterVarVertex* varVtxp = (GaterVarVertex*)(m_stmtVscp->user1p());
+	    new GaterEdge(&m_graph, m_pliVertexp, varVtxp, VU_PLI);
+	}
+	m_stmtInPli = true;  // Mark all followon variables too
+    }
+
+    // METHODS -- GRAPH stuff
+    void simplifyGraph() {
+	if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_init", false);
+
+	// We now have all PLI variables with edges FROM the pli vertex
+	simplifyPli();
+	if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_pli", false);
+
+	// Any vertex that points along both true & false path to variable
+	// can be simplfied so parent points to that vertex.  Any vertex
+	// that points to a (great...) grandparent of a variable can just
+	// point to the edge.
+	m_graph.userClearVertices();	// user() will contain VarUsage
+	simplifyIfElseRecurse(m_headVertexp);
+	if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_ifelse", false);
+
+	m_graph.userClearVertices();	// user() will contain VarUsage
+	simplifyGrandRecurse(m_headVertexp, 1);
+	if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_grand", false);
+
+	simplifyRemoveUngated(m_headVertexp);
+
+	// Give all signals with same gating term same color
+	graphColorSameFeeder();
+
+	if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_done", false);
+    }
+
+    void simplifyPli() {
+	// For now, we'll not gate any logic with PLI lvariables in it.  In
+	// the future we may move PLI statements.  One way to do so is to
+	// all below pli VARs to go IfVertex -> PliVertex -> VarVertex then
+	// they all must get colored the same. There may be a lot of
+	// duplicated edges to the PLI; they'll need cleanup.  All of the
+	// later optimizations need to deal, and the GaterBodyVisitor needs
+	// to know how to move them.
+	if (m_pliVertexp) {
+	    // Follow PLI out edges to find all relevant variables
+	    for (V3GraphEdge* nextp,* edgep = m_pliVertexp->outBeginp(); edgep; edgep = nextp) {
+		nextp = edgep->outNextp();  // We may edit the list
+		if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
+		    vVxp->unlinkDelete(&m_graph); vVxp=NULL; edgep=NULL;
+		} else {
+		    m_graph.dump();
+		    v3fatalSrc("PLI vertex points to non-signal");
+		}
+	    }
+	    m_pliVertexp->unlinkDelete(&m_graph); m_pliVertexp = NULL;
+	}
+    }
+
+    void simplifyIfElseRecurse(V3GraphVertex* vertexp) {
+	// From bottom-up, propagate duplicate IF/ELSE branches to grandparent
+	for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
+	    simplifyIfElseRecurse(edgep->top());
+	}
+	//UINFO(9,"IERecurse "<<vertexp<<endl);
+	if (dynamic_cast<GaterIfVertex*>(vertexp)) {
+	    // Clear indications
+	    for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
+		edgep->top()->user(VU_NONE);
+	    }
+	    // Mark nodes on to/from side
+	    for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
+		V3GraphVertex* toVxp = edgep->top();
+		GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
+		// We may mark this twice in one pass - if so it's duplicated; no worries
+		if (cedgep->ifelseTrue()) toVxp->user(toVxp->user() | VU_IF);
+		if (cedgep->ifelseFalse()) toVxp->user(toVxp->user() | VU_ELSE);
+		//UINFO(9,"  mark "<<edgep<<" "<<toVxp<<endl);
+	    }
+	    // Any with both IF & ELSE mark get removal mark, and new parent edge
+	    for (V3GraphEdge* nextp,* edgep = vertexp->outBeginp(); edgep; edgep = nextp) {
+		nextp = edgep->outNextp();  // We may edit the list
+		V3GraphVertex* toVxp = edgep->top();
+		//UINFO(9," to "<<toVxp->user()<<" "<<toVxp<<endl);
+		if ((toVxp->user() & VU_IF) && (toVxp->user() & VU_ELSE)) {
+		    edgep->unlinkDelete(); edgep = NULL;
+		    if (!(toVxp->user() & VU_MADE)) {   // Make an edge only once
+			toVxp->user(toVxp->user() | VU_MADE);
+			GaterEdge* inedgep = static_cast<GaterEdge*>(vertexp->inBeginp());
+			V3GraphVertex* grandparent = inedgep->fromp();
+			new GaterEdge(&m_graph, grandparent, toVxp, inedgep->ifelse());
+		    }
+		}
+	    }
+	}
+    }
+
+    void simplifyGrandRecurse(V3GraphVertex* vertexp, uint32_t depth) {
+	// From top-down delete any vars that grandparents source
+	// IE    A -> B -> C -> VAR
+	//         \----------^
+	//UINFO(9,"GRecurse "<<depth<<" "<<vertexp<<endl);
+	// Mark all variables to be swept
+	for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
+	    nextp = edgep->outNextp();  // We may edit the list
+	    if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
+		if (toVxp->user() && toVxp->user() < depth) {
+		    // A recursion "above" us marked it,
+		    // Remove this edge, it's redundant with the upper edge
+		    edgep->unlinkDelete(); edgep=NULL;
+		} else {
+		    GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
+		    if (cedgep->ifelseBoth()) {
+			toVxp->user(depth);
+		    }
+		}
+	    }
+	}
+	// Recurse
+	for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
+	    simplifyGrandRecurse(edgep->top(), depth+1);
+	}
+	// Clean our marks
+	for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
+	    V3GraphVertex* toVxp = edgep->top();
+	    if (toVxp->user() && toVxp->user() < depth) {  // A recursion "above" us marked it; don't mess with it
+	    } else {
+		toVxp->user(0);  // We marked it originally, so unmark now
+	    }
+	}
+	// Delete any If nodes with no children
+	// Last, as want bottom-up cleanup
+	for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
+	    nextp = edgep->outNextp();  // We may edit the list
+	    if (GaterIfVertex* toVxp = dynamic_cast<GaterIfVertex*>(edgep->top())) {
+		if (!toVxp->outBeginp()) {
+		    if (!nextp || nextp->top() != edgep->top()) {  // Else next would disappear; we'll do it next loop
+			toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
+		    }
+		}
+	    }
+	}
+    }
+
+    void simplifyRemoveUngated(V3GraphVertex* vertexp) {
+	// Remove variables that are ungated
+	// At this point, any variable under the head is ungated
+	for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
+	    nextp = edgep->outNextp();  // We may edit the list
+	    if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
+		if (!nextp || nextp->top() != edgep->top()) {  // Else next would disappear; we'll do it next loop
+		    toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
+		}
+	    }
+	}
+    }
+
+    void graphColorSameFeeder() {
+	// Assign same color to all destination vertices that have same
+	// subgraph feeding into them
+	// (I.E. all "from" nodes are common within each color)
+	// We could hash, but instead it's faster to sort edges, so we know
+	// the same edge list is always adjacent.  The result is a
+	// O(vertices*edges) loop, but we'd need that to hash too.
+	if (debug()>9) { cout<<"PreColor:\n"; m_graph.dump(); }
+
+	m_graph.sortEdges();
+
+	// Now sort vertices, so same inbound edge set ends up adjacent
+	m_graph.sortVertices();
+
+	// Now walk and assign colors; same color is adjacent
+	m_graph.clearColors();
+	m_graph.userClearEdges(); // Used by newExprFromGraph
+	uint32_t color = 1;
+	GaterVarVertex* lastVxp	= NULL;
+	for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
+	    if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
+		if (!vVxp->inBeginp()) {
+		    // At this point, any variable not linked is an error
+		    // (It should have at least landed under the Head node)
+		    vVxp->nodep()->v3fatalSrc("Variable became stranded in clk gate detection\n");
+		}
+		if (!lastVxp || vVxp->sortCmp(lastVxp)) {
+		    // Different sources for this new node
+		    color++;
+		}
+		vVxp->color(color);
+		lastVxp = vVxp;
+	    }
+	}
+
+	if (debug()>9) { cout<<"PostColor:\n"; m_graph.dump(); }
+    }
+
+    AstNode* newExprFromGraph(GaterVarVertex* vertexp) {
+	// Recurse backwards, then form equation on return path
+	// We could use user()!=0, but zeroing it is slow, so instead we'll mark with a generation
+	// We get equations like "a | (!a & b)" which obviously could be reduced here,
+	// instead out of generality, there's a V3Const::matchOrAndNot that'll clean it up
+	static uint32_t s_generation = 0;
+	++s_generation;
+	nafgMarkRecurse(vertexp, s_generation);
+	AstNode* nodep = nafgCreateRecurse(m_headVertexp, s_generation);
+	if (debug()>=9) nodep->dumpTree(cout,"  GateExpr: ");
+	return nodep;
+    }
+    void nafgMarkRecurse(V3GraphVertex* vertexp, uint32_t generation) {
+	// Backwards mark user() on the path we recurse
+	//UINFO(9," nafgMark: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
+	for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
+	    //UINFO(9," nafgMark: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
+	    edgep->user(generation);
+	    nafgMarkRecurse(edgep->fromp(), generation);
+	}
+    }
+    AstNode* nafgCreateRecurse(V3GraphVertex* vertexp, uint32_t generation) {
+	// Forewards follow user() marked previously and build tree
+	AstNode* nodep = NULL;
+	// OR across all edges found at this level
+	//UINFO(9," nafgEnter: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
+	for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
+	    if (edgep->user() == generation) {
+		GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
+		AstNode* eqnp = NULL;
+		//UINFO(9," nafgFollow: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
+		if (dynamic_cast<GaterHeadVertex*>(edgep->fromp())) {
+		    // Just OR in all lower terms
+		    eqnp = nafgCreateRecurse(edgep->top(), generation);
+		} else if (GaterIfVertex* cVxp = dynamic_cast<GaterIfVertex*>(edgep->fromp())) {
+		    // Edges from IFs represent a real IF branch in the equation tree
+		    //UINFO(9,"  ifver "<<(void*)(edgep)<<" cc"<<edgep->dotColor()<<endl);
+		    eqnp = cVxp->nodep()->condp()->cloneTree(true);
+		    if (eqnp && cedgep->ifelseFalse()) {
+			eqnp = new AstNot(eqnp->fileline(),eqnp);
+		    }
+		    // We need to AND this term onto whatever was found below it
+		    AstNode* belowp = nafgCreateRecurse(edgep->top(), generation);
+		    if (belowp) eqnp = new AstAnd(eqnp->fileline(),eqnp,belowp);
+		}
+		// Top level we could choose to make multiple gaters, or ORs under the gater
+		// Right now we'll put OR lower down and let other optimizations deal
+		if (nodep) nodep = new AstOr(eqnp->fileline(),nodep,eqnp);
+		else nodep = eqnp;
+		//if (debug()>=9) nodep->dumpTree(cout,"      followExpr: ");
+	    }
+	}
+	//UINFO(9," nafgExit:  "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
+	return nodep;
+    }
+
+    void newAlwaysTrees(AstAlways* nodep) {
+	// Across all variables we're moving
+	uint32_t lastColor = 0;
+	AstNode* lastExprp = NULL;
+	for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
+	    if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
+		if (!lastExprp || lastColor != vVxp->color()) {
+		    lastColor = vVxp->color();
+		    // Create the block we've just finished
+		    if (lastExprp) newAlwaysTree(nodep, lastExprp); // Duplicate below
+		    // New expression for this color
+		    lastExprp = newExprFromGraph(vVxp);
+		}
+		// Mark variable to move
+		if (vVxp->nodep()->user2p()) vVxp->nodep()->v3fatalSrc("One variable got marked under two gaters");
+		vVxp->nodep()->user2p(lastExprp);
+		m_statBits += vVxp->nodep()->width();  // Moving a wide bus counts more!
+		// There shouldn't be two possibilities we want to
+		// move to, IE {A,B} <= Z because we marked such
+		// things as unoptimizable
+	    }
+	}
+	// Create the final block we've just finished
+	if (lastExprp) newAlwaysTree(nodep, lastExprp);   // Duplicate above
+    }
+
+    void newAlwaysTree(AstAlways* nodep, AstNode* exprp) {
+	// Create new always with specified gating expression
+	// Relevant vars are already marked with user2p
+
+	// Should we put the gater under the always itself,
+	// or make a new signal?
+	//   New signal: May cause replicated logic until we can combine
+	//		Need way to toggle signal on complicated pos/negedge
+	//   Under Always: More complicated, may not propagate logic with gateer
+	//	Untill we get better gate optimization, we'll go this route.
+//#define GATER_NOP
+#ifdef GATER_NOP
+	// For testing only, don't clock gate but still make new always
+	AstSenTree* sensesp = nodep->sensesp()->cloneTree(true);
+#else
+	// Make a SenGate
+	AstSenItem* oldsenitemsp = nodep->sensesp()->sensesp()->castSenItem();
+	if (!oldsenitemsp) nodep->v3fatalSrc("SenTree doesn't have any SenItem under it");
+
+	AstSenTree* sensesp = new AstSenTree(nodep->fileline(),
+					     new AstSenGate(nodep->fileline(),
+							    oldsenitemsp->cloneTree(true),
+							    exprp));
+#endif
+
+	// Make new body; note clone will preserve user2p() indicating moving vars
+	AstNode* bodyp = nodep->bodysp()->cloneTree(true);
+
+	AstAlways* alwp = new AstAlways(nodep->fileline(),
+					sensesp,
+					bodyp);
+
+	alwp->user4(1);  // No need to process the new always again!
+	nodep->addNextHere(alwp);
+
+	// Blow moved statements from old body
+	GaterBodyVisitor(nodep,exprp,true);
+	// Blow old statements from new body
+	GaterBodyVisitor(alwp,exprp,false);
+
+	m_statGaters++;
+	if (debug()>=9) alwp->dumpTree(cout,"  new: ");
+    }
+
+    // VISITORS
+    virtual void visit(AstAlways* nodep, AstNUser*) {
+	if (debug()>=9) cout<<endl<<endl<<endl;
+	UINFO(5, "Gater: ALWAYS: "<<nodep<<endl);
+	if (nodep->user4Inc()) return;
+
+	clear();
+
+	if (debug()>=9) nodep->dumpTree(cout,"  Alwin:  ");
+
+	// Look for constructs we can't optimize
+	// Form graph with Vertices at each IF, and each Variable
+	m_aboveTrue = VU_IF | VU_ELSE;
+	iterateChildrenAlw(nodep, true);
+
+	// Other reasons to not optimize
+	if (!m_numIfs) nonOptimizable(nodep, "No if statements");
+
+	// Something to optimize, oh my!
+	if (m_nonopt!="") {
+	    UINFO(5, "  Gater non-opt: "<<m_nonopt<<endl);
+	} else {
+	    // Process it
+	    simplifyGraph();
+
+	    // See how much moves
+	    uint32_t lastColor = 0;
+	    for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
+		if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
+		    if (lastColor < vVxp->color()) {
+			lastColor = vVxp->color();
+		    }
+		}
+	    }
+	    if (lastColor == 0) { // Nothing we moved!
+		nonOptimizable(nodep, "Nothing moved");
+	    }
+	    else if (lastColor > DOMAINS_MAX) {
+		// Our move algorithm is fairly slow and if we're splitting
+		// up too much it'll get really nasty.  It's probably a bad
+		// move for performance to split too much, anyhow, as the
+		// number of gaters will result in calling many small c functions.
+		nonOptimizable(nodep, "Too much moved");
+	    }
+	    if (m_nonopt=="") {
+		newAlwaysTrees(nodep);
+		if (debug()>=9) nodep->dumpTree(cout,"  Gaterout: ");
+	    }
+	}
+	UINFO(5, "  Gater done"<<endl);
+    }
+    virtual void visit(AstVarRef* nodep, AstNUser*) {
+	if (nodep->lvalue()) {
+	    AstVarScope* vscp = nodep->varScopep();
+	    if (nodep->varp()->isSigPublic()) {
+		// Public signals shouldn't be changed, pli code might be messing with them
+		scoreboardPli(nodep);
+	    }
+	    // If another lvalue in this node, give up optimizing.
+	    // We could just not optimize this variable, but we've already marked the
+	    // other variable as optimizable, so we can instead pretend it's a PLI node.
+	    if (m_stmtVscp) {
+		UINFO(5, "   Multiple lvalues in one statement: "<<nodep<<endl);
+		scoreboardPli(nodep);  // This will set m_stmtInPli
+	    }
+	    m_stmtVscp = vscp;
+	    // Find, or make new Vertex
+	    GaterVarVertex* vertexp = (GaterVarVertex*)(vscp->user1p());
+	    if (!vertexp) {
+		vertexp = new GaterVarVertex(&m_graph, vscp);
+		vscp->user1p(vertexp);
+	    }
+	    new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
+	    if (m_stmtInPli) {
+		new GaterEdge(&m_graph, m_pliVertexp, vertexp, VU_PLI);
+	    }
+	}
+    }
+    virtual void visit(AstNodeIf* nodep, AstNUser*) {
+	m_ifDepth++;
+	bool allowGater = m_directlyUnderAlw && m_ifDepth <= IF_DEPTH_MAX;
+	if (allowGater) {
+	    GaterCondVisitor condVisitor(nodep->condp());
+	    if (!condVisitor.isSimple()) {
+		// Don't clear optimization, simply drop this IF as part of the gating
+		UINFO(5,"   IFnon-simple-condition: "<<nodep<<endl);
+		allowGater = false;
+	    }
+	}
+	if (!allowGater) {
+	    // IF burried under something complicated
+	    iterateChildrenAlw(nodep, true);
+	} else {
+	    UINFO(5, "  IF: "<<nodep<<endl);
+	    m_numIfs++;
+	    // Recurse to next level of if.
+	    V3GraphVertex*	lastabovep = m_aboveVertexp;
+	    uint32_t		lasttrue = m_aboveTrue;
+	    GaterIfVertex* vertexp = new GaterIfVertex(&m_graph, nodep);
+	    new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
+	    {
+		nodep->condp()->iterateAndNext(*this);  // directlyUnder stays as-is
+	    }
+	    {
+		m_aboveVertexp = vertexp;  // Vars will point at this edge
+		m_aboveTrue = VU_IF;
+		nodep->ifsp()->iterateAndNext(*this);  // directlyUnder stays as-is (true)
+	    }
+	    {
+		m_aboveVertexp = vertexp;  // Vars will point at this edge
+		m_aboveTrue = VU_ELSE;
+		nodep->elsesp()->iterateAndNext(*this);  // directlyUnder stays as-is (true)
+	    }
+	    m_aboveVertexp = lastabovep;
+	    m_aboveTrue = lasttrue;
+	}
+	m_ifDepth--;
+    }
+
+    virtual void visit(AstAssignDly* nodep, AstNUser*) {
+	// iterateChildrenAlw will detect this is a statement for us
+	iterateChildrenAlw(nodep, false);
+    }
+
+    virtual void visit(AstNodeAssign* nodep, AstNUser*) {
+	// Note NOT AssignDly; handled above, We'll just mark this block as
+	// not optimizable.
+	//
+	// A future alternative is to look for any lvalues that are also
+	// variables in the sensitivity list, or rvalues in this block.  If
+	// any hit, disable optimization.  Unlikely to be useful (For loops
+	// being an exception, but they're already unrolled.)
+	nonOptimizable(nodep, "Non-delayed assignment");
+	// No reason to iterate.
+    }
+
+    virtual void visit(AstSenItem* nodep, AstNUser*) {
+	if (!nodep->isClocked()) {
+	    nonOptimizable(nodep, "Non-clocked sensitivity");
+	}
+	iterateChildrenAlw(nodep, false);
+    }
+
+    //--------------------
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	if (m_nonopt=="") {  // Else accelerate
+	    iterateChildrenAlw(nodep, false);
+	}
+    }
+    inline void iterateChildrenAlw(AstNode* nodep, bool under) {
+	// **** USE THIS INSTEAD OF iterateChildren!
+	// Note If visitor doesn't call here; does it its own way
+	bool lastdua = m_directlyUnderAlw;
+	AstVarScope* lastvscp = m_stmtVscp;
+	bool lastpli = m_stmtInPli;
+	m_directlyUnderAlw = under;
+	if (nodep->castNodeStmt()) {  // Restored below
+	    UINFO(9,"       Stmt: "<<nodep<<endl);
+	    m_stmtVscp = NULL;
+	    m_stmtInPli = false;
+	}
+	if (!nodep->isSplittable()) {
+	    // May also be a new statement (above if); if so we mark it immediately
+	    UINFO(9,"         NotSplittable "<<nodep<<endl);
+	    scoreboardPli(nodep);
+	}
+	{
+	    nodep->iterateChildren(*this);
+	}
+	m_directlyUnderAlw = lastdua;
+	if (nodep->castNodeStmt()) {  // Reset what set above; else propagate up to above statement
+	    m_stmtVscp = lastvscp;
+	    m_stmtInPli = lastpli;
+	}
+    }
+
+public:
+    // CONSTUCTORS
+    GaterVisitor(AstNode* nodep) {
+	// AstAlways visitor does the real work, so most zeroing needs to be in clear()
+	clear();
+	nodep->accept(*this);
+    }
+    void clear() {
+	m_nonopt = "";
+	m_directlyUnderAlw = false;
+	m_ifDepth = 0;
+	m_numIfs = 0;
+	AstNode::user1ClearTree();
+	AstNode::user2ClearTree();
+	// Prepare graph
+	m_graph.clear();
+	GaterVertex::clearRank();
+	m_pliVertexp = NULL;
+	m_headVertexp = new GaterHeadVertex(&m_graph);
+	m_aboveVertexp = m_headVertexp;
+	m_aboveTrue = false;
+	m_stmtVscp = NULL;
+	m_stmtInPli = false;
+    }
+    virtual ~GaterVisitor() {
+	V3Stats::addStat("Optimizations, Gaters inserted", m_statGaters);
+	V3Stats::addStat("Optimizations, Gaters impacted bits", m_statBits);
+    }
+};
+
+//######################################################################
+// Active class functions
+
+void V3ClkGater::clkGaterAll(AstNetlist* nodep) {
+    UINFO(2,__FUNCTION__<<": "<<endl);
+    // While the gater does well at some modules, it seems to slow down many others
+    UINFO(5,"ClkGater is disabled due to performance issues\n");
+    //GaterVisitor visitor (nodep);
+}
@@ -0,0 +1,37 @@
+// -*- C++ -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Break always into clock gated blocks
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+
+#ifndef _V3CLKGATER_H_
+#define _V3CLKGATER_H_ 1
+#include "config_build.h"
+#include "verilatedos.h"
+#include "V3Error.h"
+#include "V3Ast.h"
+
+//============================================================================
+
+class V3ClkGater {
+public:
+    static void clkGaterAll(AstNetlist* nodep);
+};
+
+#endif // Guard
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Clock's Transformations:
-//		
+//
 // Top Scope:
 //   Check created ACTIVEs
 //      Compress adjacent ACTIVEs with same sensitivity list
@@ -34,8 +34,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -51,14 +51,16 @@ class ClockVisitor : public AstNVisitor {
 private:
    // NODE STATE
    // Cleared each Module:
-    //  AstVarScope::userp()	-> AstVarScope*.  Temporary signal that was created.
+    //  AstVarScope::user1p()	-> AstVarScope*.  Temporary signal that was created.
    //  AstVarScope::user2p()	-> AstVarScope*.  Temporary signal for change detects
+    AstUser1InUse	m_inuser1;
+    AstUser2InUse	m_inuser2;

    // TYPES
    enum {  DOUBLE_OR_RATE = 10 };	// How many | per ||, Determined experimentally as best

    // STATE
-    AstModule*		m_modp;		// Current module
+    AstNodeModule*	m_modp;		// Current module
    AstTopScope*	m_topScopep;	// Current top scope
    AstScope*		m_scopep;	// Current scope
    AstActive*		m_activep;	// Current block
@@ -70,20 +72,24 @@ private:
    AstSenTree*		m_lastSenp;	// Last sensitivity match, so we can detect duplicates.
    AstIf*		m_lastIfp;	// Last sensitivity if active to add more under
    int			m_stableNum;	// Number of each untilstable
-    //int debug() { return 9; }

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    AstVarScope* getCreateLastClk(AstVarScope* vscp) {
-	if (vscp->userp()) return ((AstVarScope*)vscp->userp());
+	if (vscp->user1p()) return ((AstVarScope*)vscp->user1p());
 	AstVar* varp = vscp->varp();
 	if (varp->width()!=1) varp->v3error("Unsupported: Clock edge on non-single bit signal: "<<varp->prettyName());
 	string newvarname = ((string)"__Vclklast__"+vscp->scopep()->nameDotless()+"__"+varp->shortName());
-	AstVar* newvarp
-	    = new AstVar (vscp->fileline(), AstVarType::MODULETEMP, newvarname); // No range; 1 bit.
+	AstVar* newvarp = new AstVar (vscp->fileline(), AstVarType::MODULETEMP, newvarname, AstLogicPacked(), 1);
 	newvarp->width(1,1);
 	m_modp->addStmtp(newvarp);
 	AstVarScope* newvscp = new AstVarScope(vscp->fileline(), m_scopep, newvarp);
-	vscp->userp(newvscp);
+	vscp->user1p(newvscp);
 	m_scopep->addVarp(newvscp);
 	// At bottom, assign them
 	AstAssign* finalp
@@ -98,7 +104,7 @@ private:
    AstVarScope* getCreateLocalVar(FileLine* fl, const string& name, AstVar* examplep, int width) {
 	AstVar* newvarp;
 	if (width) {
-	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, new AstRange(fl, width-1, 0));
+	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, AstLogicPacked(), width);
 	} else {
 	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, examplep); // No range; 1 bit.
 	}
@@ -107,48 +113,66 @@ private:
 	m_scopep->addVarp(newvscp);
 	return newvscp;
    }
-    AstNode* createSenseEquation(AstSenTree* nodep) {
+    AstNode* createSenItemEquation(AstSenItem* nodep) {
+	// We know the var is clean, and one bit, so we use binary ops
+	// for speed instead of logical ops.
+	// POSEDGE:  var & ~var_last
+	// NEGEDGE:  ~var & var_last
+	// BOTHEDGE:  var ^ var_last
+	// HIGHEDGE:  var
+	// LOWEDGE:  ~var
+	AstNode* newp = NULL;
+	AstVarScope* clkvscp = nodep->varrefp()->varScopep();
+	if (nodep->edgeType()==AstEdgeType::ET_POSEDGE) {
+	    AstVarScope* lastVscp = getCreateLastClk(clkvscp);
+	    newp = new AstAnd(nodep->fileline(),
+			      new AstVarRef(nodep->fileline(),
+					    nodep->varrefp()->varScopep(), false),
+			      new AstNot(nodep->fileline(),
+					 new AstVarRef(nodep->fileline(),
+						       lastVscp, false)));
+	} else if (nodep->edgeType()==AstEdgeType::ET_NEGEDGE) {
+	    AstVarScope* lastVscp = getCreateLastClk(clkvscp);
+	    newp = new AstAnd(nodep->fileline(),
+			      new AstNot(nodep->fileline(),
+					 new AstVarRef(nodep->fileline(),
+						       nodep->varrefp()->varScopep(), false)),
+			      new AstVarRef(nodep->fileline(), lastVscp, false));
+	} else if (nodep->edgeType()==AstEdgeType::ET_BOTHEDGE) {
+	    AstVarScope* lastVscp = getCreateLastClk(clkvscp);
+	    newp = new AstXor(nodep->fileline(),
+			      new AstVarRef(nodep->fileline(),
+					    nodep->varrefp()->varScopep(), false),
+			      new AstVarRef(nodep->fileline(), lastVscp, false));
+	} else if (nodep->edgeType()==AstEdgeType::ET_HIGHEDGE) {
+	    newp = new AstVarRef(nodep->fileline(),
+				 clkvscp, false);
+	} else if (nodep->edgeType()==AstEdgeType::ET_LOWEDGE) {
+	    newp = new AstNot(nodep->fileline(),
+			      new AstVarRef(nodep->fileline(),
+					    clkvscp, false));
+	} else {
+	    nodep->v3fatalSrc("Bad edge type");
+	}
+	return newp;
+    }
+    AstNode* createSenGateEquation(AstSenGate* nodep) {
+	AstNode* newp = new AstAnd(nodep->fileline(),
+				   createSenseEquation(nodep->sensesp()),
+				   nodep->rhsp()->cloneTree(true));
+	return newp;
+    }
+    AstNode* createSenseEquation(AstNodeSenItem* nodesp) {
+	// Nodep may be a list of elements; we need to walk it
 	AstNode* senEqnp = NULL;
-	for (AstSenItem* senp = nodep->sensesp(); senp; senp=senp->nextp()->castSenItem()) {
-	    // We know the var is clean, and one bit, so we use binary ops
-	    // for speed instead of logical ops.
-	    // POSEDGE:  var & ~var_last
-	    // NEGEDGE:  ~var & var_last
-	    // BOTHEDGE:  var ^ var_last
-	    // HIGHEDGE:  var
-	    // LOWEDGE:  ~var
-	    AstVarScope* lastVscp = senp->varrefp()->varScopep()->userp()->castNode()->castVarScope();
+	for (AstNodeSenItem* senp = nodesp; senp; senp=senp->nextp()->castNodeSenItem()) {
 	    AstNode* senOnep = NULL;
-	    if (senp->edgeType()==AstEdgeType::POSEDGE) {
-		if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
-		senOnep = new AstAnd(senp->fileline(),
-				     new AstVarRef(senp->fileline(),
-						   senp->varrefp()->varScopep(), false),
-				     new AstNot(senp->fileline(),
-						new AstVarRef(senp->fileline(),
-							      lastVscp, false)));
-	    } else if (senp->edgeType()==AstEdgeType::NEGEDGE) {
-		if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
-		senOnep = new AstAnd(senp->fileline(),
-				     new AstNot(senp->fileline(),
-						new AstVarRef(senp->fileline(),
-							      senp->varrefp()->varScopep(), false)),
-				     new AstVarRef(senp->fileline(), lastVscp, false));
-	    } else if (senp->edgeType()==AstEdgeType::BOTHEDGE) {
-		if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
-		senOnep = new AstXor(senp->fileline(),
-				     new AstVarRef(senp->fileline(),
-						   senp->varrefp()->varScopep(), false),
-				     new AstVarRef(senp->fileline(), lastVscp, false));
-	    } else if (senp->edgeType()==AstEdgeType::HIGHEDGE) {
-		senOnep = new AstVarRef(senp->fileline(),
-					senp->varrefp()->varScopep(), false);
-	    } else if (senp->edgeType()==AstEdgeType::LOWEDGE) {
-		senOnep = new AstNot(senp->fileline(),
-				     new AstVarRef(senp->fileline(),
-						   senp->varrefp()->varScopep(), false));
+	    if (AstSenItem* itemp = senp->castSenItem()) {
+		senOnep = createSenItemEquation(itemp);
+	    } else if (AstSenGate* itemp = senp->castSenGate()) {
+		senOnep = createSenGateEquation(itemp);
 	    } else {
-		senp->v3fatalSrc("Bad edge type");
+		senp->v3fatalSrc("Strange node under sentree");
 	    }
 	    if (senEqnp) {
 		// Add new OR to the sensitivity list equation
@@ -160,14 +184,7 @@ private:
 	return senEqnp;
    }
    AstIf* makeActiveIf(AstSenTree* sensesp) {
-	for (AstSenItem* senp = sensesp->sensesp(); senp; senp=senp->nextp()->castSenItem()) {
-	    if (senp->edgeType() != AstEdgeType::HIGHEDGE
-		&& senp->varrefp()) {
-		AstVarScope* oldvscp = senp->varrefp()->varScopep();
-		getCreateLastClk(oldvscp);
-	    }
-	}
-	AstNode* senEqnp = createSenseEquation(sensesp);
+	AstNode* senEqnp = createSenseEquation(sensesp->sensesp());
 	if (!senEqnp) sensesp->v3fatalSrc("No sense equation, shouldn't be in sequent activation.");
 	AstIf* newifp = new AstIf (sensesp->fileline(),
 				   senEqnp, NULL, NULL);
@@ -184,8 +201,8 @@ private:
 	m_topScopep=nodep;
 	m_scopep = nodep->scopep();
 	if (!m_scopep) nodep->v3fatalSrc("No scope found on top level, perhaps you have no statements?\n");
-	//VV*****  We reset all userp()
-	AstNode::userClearTree();
+	//VV*****  We reset all user1p()
+	AstNode::user1ClearTree();
 	// Make top functions
 	{
 	    AstCFunc* funcp = new AstCFunc(nodep->fileline(), "_eval", m_scopep);
@@ -215,10 +232,9 @@ private:
 	    funcp->slow(true);
 	    funcp->isStatic(false);
 	    funcp->entryPoint(true);
-	    funcp->addInitsp(
-		new AstCStmt(nodep->fileline(),
-			     "    "+EmitCBaseVisitor::symClassVar()+" = this->__VlSymsp;\n"));
-	    funcp->addInitsp(new AstCStmt(nodep->fileline(),"    "+EmitCBaseVisitor::symTopAssign()+"\n"));
+	    funcp->addInitsp(new AstCStmt(nodep->fileline(),
+					  EmitCBaseVisitor::symClassVar()+" = this->__VlSymsp;\n"));
+	    funcp->addInitsp(new AstCStmt(nodep->fileline(), EmitCBaseVisitor::symTopAssign()+"\n"));
 	    m_scopep->addActivep(funcp);
 	    m_finalFuncp = funcp;
 	}
@@ -241,16 +257,17 @@ private:
 	m_topScopep=NULL;
 	m_scopep = NULL;
    }
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	//UINFO(4," MOD   "<<nodep<<endl);
 	m_modp = nodep;
 	m_stableNum = 0;
-  	nodep->iterateChildren(*this);
+	nodep->iterateChildren(*this);
+	m_modp= NULL;
    }
    virtual void visit(AstScope* nodep, AstNUser*) {
 	//UINFO(4," SCOPE   "<<nodep<<endl);
 	m_scopep = nodep;
-  	nodep->iterateChildren(*this);
+	nodep->iterateChildren(*this);
 	if (AstNode* movep = nodep->finalClksp()) {
 	    if (!m_topScopep) nodep->v3fatalSrc("Final clocks under non-top scope");
 	    movep->unlinkFrBackWithNext();
@@ -261,8 +278,7 @@ private:
    virtual void visit(AstAlways* nodep, AstNUser*) {
 	AstNode* cmtp = new AstComment(nodep->fileline(), nodep->typeName());
 	nodep->replaceWith(cmtp);
-	AstNode* stmtsp = nodep->bodysp();
-	if (stmtsp) {
+	if (AstNode* stmtsp = nodep->bodysp()) {
 	    stmtsp->unlinkFrBackWithNext();
 	    cmtp->addNextHere(stmtsp);
 	}
@@ -271,18 +287,36 @@ private:
    virtual void visit(AstAlwaysPost* nodep, AstNUser*) {
 	AstNode* cmtp = new AstComment(nodep->fileline(), nodep->typeName());
 	nodep->replaceWith(cmtp);
-	AstNode* stmtsp = nodep->bodysp();
-	if (stmtsp) {
+	if (AstNode* stmtsp = nodep->bodysp()) {
 	    stmtsp->unlinkFrBackWithNext();
 	    cmtp->addNextHere(stmtsp);
 	}
 	nodep->deleteTree(); nodep = NULL;
    }
+    virtual void visit(AstCoverToggle* nodep, AstNUser*) {
+	//nodep->dumpTree(cout,"ct:");
+	//COVERTOGGLE(INC, ORIG, CHANGE) ->
+	//   IF(ORIG ^ CHANGE) { INC; CHANGE = ORIG; }
+	AstNode* incp = nodep->incp()->unlinkFrBack();
+	AstNode* origp = nodep->origp()->unlinkFrBack();
+	AstNode* changep = nodep->changep()->unlinkFrBack();
+	AstIf* newp = new AstIf(nodep->fileline(),
+				new AstXor(nodep->fileline(),
+					   origp,
+					   changep),
+				incp, NULL);
+	// We could add another IF to detect posedges, and only increment if so.
+	// It's another whole branch though verus a potential memory miss.
+	// We'll go with the miss.
+	newp->addIfsp(new AstAssign(nodep->fileline(),
+				    changep->cloneTree(false),
+				    origp->cloneTree(false)));
+	nodep->replaceWith(newp); nodep->deleteTree(); nodep=NULL;
+    }
    virtual void visit(AstInitial* nodep, AstNUser*) {
 	AstNode* cmtp = new AstComment(nodep->fileline(), nodep->typeName());
 	nodep->replaceWith(cmtp);
-	AstNode* stmtsp = nodep->bodysp();
-	if (stmtsp) {
+	if (AstNode* stmtsp = nodep->bodysp()) {
 	    stmtsp->unlinkFrBackWithNext();
 	    cmtp->addNextHere(stmtsp);
 	}
@@ -416,7 +450,7 @@ private:
 					 new AstConst(fl, 1)));
        preUntilp->addNext(new AstAssign(fl, new AstVarRef(fl, countVarp, true),
 					 new AstConst(fl, 0)));
-	
+
 	// Add stable variables & preinits
 	AstNode* setChglastp = NULL;
 	for (AstVarRef* varrefp = nodep->stablesp(); varrefp; varrefp=varrefp->nextp()->castVarRef()) {
@@ -472,7 +506,7 @@ private:
 	ifstmtp->addNext(new AstIf(fl,
 				   new AstLt (fl, new AstConst(fl, 100),
 					      new AstVarRef(fl, countVarp, false)),
-				   (new AstDisplay (fl, AstDisplayType::DISPLAY,
+				   (new AstDisplay (fl, AstDisplayType::DT_DISPLAY,
 						    "%%Error: Verilated model didn't converge", NULL, NULL))
 				   ->addNext(new AstStop (fl)),
 				   NULL));
@@ -495,7 +529,7 @@ private:

 public:
    // CONSTUCTORS
-    ClockVisitor(AstNode* nodep) {
+    ClockVisitor(AstNetlist* nodep) {
 	m_modp=NULL; m_activep=NULL;
 	m_evalFuncp = NULL;
 	m_topScopep=NULL;
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Combine common code into functions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Combine's Transformations:
-//		
+//
 //	For every function that we spit out
 //	Examine code to find largest common blocks
 //	    Hash each node depth first
@@ -32,13 +32,13 @@
 //		Make new function
 //		Move common block to function
 //		Replace each common block ref with funccall
-//		
+//
 //*************************************************************************

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <vector>
@@ -59,13 +59,23 @@
 class CombBaseVisitor : public AstNVisitor {
 protected:
    // STATE
-    //int debug() { return 9; }
+
    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    virtual ~CombBaseVisitor() {}

    //***** optimization levels
    bool emptyFunctionDeletion() { return true; }
    bool duplicateFunctionCombine() { return true; }
+    // Note this is disabled, it still needed work
+    // Also repair it for DPI functions; when make __common need to insure proper
+    // flags get inherited from the old to new AstCFunc, and that AstText doesn't
+    // get split between functions causing the text to have a danginling reference.
    bool statementCombine() { return false && duplicateFunctionCombine(); }
 };

@@ -95,7 +105,7 @@ public:
 		if (callp->funcp() != oldfuncp) callp->v3fatalSrc("Call list broken, points to call w/different func");
 		if (newfuncp) {
 		    AstCCall* newp = new AstCCall(callp, newfuncp);
-		    newp->argTypes(callp->argTypes());
+		    // Special new AstCCall form above transfers children of callp to newfuncp
 		    callp->replaceWith(newp);
 		    addCall(newp); // Fix the table
 		} else { // Just deleting empty function
@@ -175,19 +185,22 @@ private:
    //  AstCFunc::user3p()	-> AstCFunc*, If set, replace ccalls to this func with new func
    //  AstNodeStmt::user3()	-> AstNode*.  True if to ignore this cell
    //  AstNodeStmt::user4()	-> V3Hashed::V3Hash.  Hash value of this node (hash of 0 is illegal)
+    AstUser1InUse	m_inuser1;
+    AstUser3InUse	m_inuser3;
+    //AstUser4InUse	part of V3Hashed

    // STATE
    typedef enum {STATE_IDLE, STATE_HASH, STATE_DUP} CombineState;
    V3Double0		m_statCombs;	// Statistic tracking
    CombineState	m_state;	// Major state
-    AstModule*		m_modp;		// Current module
+    AstNodeModule*	m_modp;		// Current module
    AstCFunc*		m_funcp;	// Current function
    V3Hash		m_lowerHash;	// Hash of the statement we're building
    CombCallVisitor	m_call;		// Tracking of function call users
    int			m_modNFuncs;	// Number of functions made
    AstNode*		m_walkLast1p;	// Final node that is the same in duplicate list
    AstNode*		m_walkLast2p;	// Final node that is the same in duplicate list
-    V3Hashed		m_hashed;	// Hash for every node
+    V3Hashed		m_hashed;	// Hash for every node in module

    // METHODS
    void hashStatement(AstNode* nodep) {
@@ -280,7 +293,7 @@ private:
 	    if (node1p==node2p) continue;
 	    //
 	    // We need to mark iteration to prevent matching code inside code (abab matching in ababab)
-	    AstNode::userClearTree();	// userp() used on entire tree
+	    AstNode::user1ClearTree();	// user1p() used on entire tree
 	    m_walkLast1p = NULL;
 	    m_walkLast2p = NULL;
 	    int depth = walkDupCodeNext(node1p, node2p, 1);
@@ -306,7 +319,7 @@ private:

    int walkDupCodeNext(AstNode* node1p, AstNode* node2p, int level) {
 	// Find number of common statements between the two node1p_nextp's...
-	if (node1p->userp() || node2p->userp()) return 0;   // Already iterated
+	if (node1p->user1p() || node2p->user1p()) return 0;   // Already iterated
 	if (node1p->user3p() || node2p->user3p()) return 0;   // Already merged
 	if (!m_hashed.sameNodes(node1p,node2p)) return 0; // walk of tree has same comparison
 	V3Hash hashval(node1p->user4p());
@@ -314,8 +327,8 @@ private:
 	//UINFO(9,"        wdup2 "<<level<<" "<<V3Hash(node2p->user4p())<<" "<<node2p<<endl);
 	m_walkLast1p = node1p;
 	m_walkLast2p = node2p;
-	node1p->user(true);
-	node2p->user(true);
+	node1p->user1(true);
+	node2p->user1(true);
 	if (node1p->nextp() && node2p->nextp()) {
 	    return hashval.depth()+walkDupCodeNext(node1p->nextp(), node2p->nextp(), level+1);
 	}
@@ -379,21 +392,23 @@ private:
 	// Track all callers of each function
 	m_call.main(nodep);
 	//
-	AstNode::user3ClearTree();	// userp() used on entire tree
-	//In V3Hashed AstNode::user4ClearTree();	// userp() used on entire tree
+	//In V3Hashed AstNode::user4ClearTree();	// user4p() used on entire tree
 	// Iterate modules backwards, in bottom-up order.
 	// Required so that a module instantiating another can benefit from collapsing.
 	nodep->iterateChildrenBackwards(*this);
    }
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	UINFO(4," MOD   "<<nodep<<endl);
 	m_modp = nodep;
 	m_modNFuncs = 0;
 	m_hashed.clear();
 	// Compute hash of all statement trees in the function
 	m_state = STATE_HASH;
-  	nodep->iterateChildren(*this);
+	nodep->iterateChildren(*this);
 	m_state = STATE_IDLE;
+	if (debug()>=9) {
+	    m_hashed.dumpFilePrefixed("combine");
+	}
 	// Walk the hashes removing empty functions
 	if (emptyFunctionDeletion()) {
 	    walkEmptyFuncs();
@@ -408,6 +423,7 @@ private:
 	    nodep->iterateChildren(*this);
 	    m_state = STATE_IDLE;
 	}
+	m_modp = NULL;
    }
    virtual void visit(AstCFunc* nodep, AstNUser*) {
 	m_funcp = nodep;
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Combine common code into functions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -0,0 +1,145 @@
+//*************************************************************************
+// DESCRIPTION: Verilator: Configuration Files
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2010-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+
+#include "config_build.h"
+#include "verilatedos.h"
+#include <string>
+#include <map>
+#include <set>
+
+#include "V3Global.h"
+#include "V3Config.h"
+
+//######################################################################
+
+class V3ConfigLine {
+public:
+    int		m_lineno;	// Line number to make change at
+    V3ErrorCode	m_code;		// Error code
+    bool	m_on;		// True to enaable message
+    V3ConfigLine(V3ErrorCode code, int lineno, bool on)
+	: m_lineno(lineno), m_code(code), m_on(on) {}
+    ~V3ConfigLine() {}
+    inline bool operator< (const V3ConfigLine& rh) const {
+	if (m_lineno<rh.m_lineno) return true;
+	if (m_lineno>rh.m_lineno) return false;
+	if (m_code<rh.m_code) return true;
+	if (m_code>rh.m_code) return false;
+	// Always turn "on" before "off" so that overlapping lines will end up finally with the error "off"
+	return (m_on>rh.m_on);
+    }
+};
+ostream& operator<<(ostream& os, V3ConfigLine rhs) { return os<<rhs.m_lineno<<", "<<rhs.m_code<<", "<<rhs.m_on; }
+
+class V3ConfigIgnores {
+    typedef multiset<V3ConfigLine> IgnLines;	// list of {line,code,on}
+    typedef map<string,IgnLines> IgnFiles;	// {filename} => list of {line,code,on}
+
+    // MEMBERS
+    string		m_lastFilename;	// Last filename looked up
+    int			m_lastLineno;	// Last linenumber looked up
+
+    IgnLines::const_iterator m_lastIt;	// Point with next linenumber > current line number
+    IgnLines::const_iterator m_lastEnd;	// Point with end()
+
+    IgnFiles		m_ignFiles;	// Ignores for each filename
+    
+    static V3ConfigIgnores s_singleton;	// Singleton (not via local static, as that's slow)
+
+    V3ConfigIgnores() { m_lastLineno = -1; }
+    ~V3ConfigIgnores() {}
+
+    // METHODS
+    inline IgnLines* findLines(const string& filename) {
+	IgnFiles::iterator it = m_ignFiles.find(filename);
+	if (it != m_ignFiles.end()) {
+	    return &(it->second);
+	} else {
+	    m_ignFiles.insert(make_pair(filename, IgnLines()));
+	    it = m_ignFiles.find(filename);
+	    return &(it->second);
+	}
+    }
+    inline void absBuild(const string& filename) {
+	// Given a filename, find all wildcard matches against it and build
+	// hash with the specific filename.  This avoids having to wildmatch
+	// more than once against any filename.
+	IgnLines* linesp = findLines(filename);
+	m_lastIt = linesp->begin();
+	m_lastEnd = linesp->end();
+    }
+
+public:
+    inline static V3ConfigIgnores& singleton() { return s_singleton; }
+
+    void addIgnore(V3ErrorCode code, string filename, int lineno, bool on) {
+	// Insert
+	IgnLines* linesp = findLines(filename);
+	UINFO(9,"config addIgnore "<<filename<<":"<<lineno<<", "<<code<<", "<<on<<endl); 
+	linesp->insert(V3ConfigLine(code, lineno, on));
+	if (m_lastFilename == filename) {
+	    // Flush the match cache, due to a change in the rules.
+	    m_lastFilename = " ";
+	}
+    }
+    inline void applyIgnores(FileLine* filelinep) {
+	// HOT routine, called each parsed token line
+	if (m_lastLineno != filelinep->lineno()
+	    || m_lastFilename != filelinep->filename()) {
+	    //UINFO(9,"   ApplyIgnores for "<<filelinep->ascii()<<endl);
+	    if (VL_UNLIKELY(m_lastFilename != filelinep->filename())) {
+		absBuild(filelinep->filename());
+		m_lastFilename = filelinep->filename();
+	    }
+	    // Process all on/offs for lines up to and including the current line
+	    int curlineno = filelinep->lineno();
+	    for (; m_lastIt != m_lastEnd; ++m_lastIt) {
+		if (m_lastIt->m_lineno > curlineno) break;
+		//UINFO(9,"     Hit "<<*m_lastIt<<endl);
+		filelinep->warnOn(m_lastIt->m_code, m_lastIt->m_on);
+	    }
+	    if (0 && debug() >= 9) {
+		for (IgnLines::const_iterator it=m_lastIt; it != m_lastEnd; ++it) {
+		    UINFO(9,"     NXT "<<*it<<endl);
+		}
+	    }
+	    m_lastLineno = filelinep->lineno();
+	}
+    }
+};
+
+V3ConfigIgnores V3ConfigIgnores::s_singleton;
+
+//######################################################################
+// V3Config
+
+void V3Config::addIgnore(V3ErrorCode code, string filename, int min, int max) {
+    if (filename=="*") {
+	FileLine::globalWarnOff(code,true);
+    } else {
+	V3ConfigIgnores::singleton().addIgnore(code, filename, min, false);
+	if (max) V3ConfigIgnores::singleton().addIgnore(code, filename, max, true);
+    }
+}
+
+void V3Config::applyIgnores(FileLine* filelinep) {
+    V3ConfigIgnores::singleton().applyIgnores(filelinep);
+}
@@ -0,0 +1,38 @@
+// -*- C++ -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Configuration Files
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2010-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+
+#ifndef _V3CONFIG_H_
+#define _V3CONFIG_H_ 1
+#include "config_build.h"
+#include "verilatedos.h"
+#include <string>
+#include "V3Error.h"
+
+//######################################################################
+
+class V3Config {
+public:
+    static void addIgnore(V3ErrorCode code, string filename, int min, int max);
+    static void applyIgnores(FileLine* filelinep);
+};
+
+#endif // Guard
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Propagate constants across AST
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -31,7 +32,8 @@
 class V3Const {
 public:
    // Force this cell node's parameter list to become a constant
-    static void constifyParam(AstNode* nodep);
+    // Return new node that may have replaced nodep
+    static AstNode* constifyParamsEdit(AstNode* nodep);
    // Everything that's possible
    static void constifyAll(AstNetlist* nodep);
    // Also, warn
@@ -39,7 +41,11 @@ public:
    // C++ datatypes
    static void constifyCpp(AstNetlist* nodep);
    // Only the current node and lower
-    static void constifyTree(AstNode* nodep);
+    // Return new node that may have replaced nodep
+    static AstNode* constifyEdit(AstNode* nodep);
+    // Only the current node and lower, with special SenTree optimization
+    // Return new node that may have replaced nodep
+    static AstNode* constifyExpensiveEdit(AstNode* nodep);
 };

 #endif // Guard
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Netlist (top level) functions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -31,15 +31,14 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <map>

 #include "V3Global.h"
 #include "V3Coverage.h"
 #include "V3Ast.h"
-#include "V3Const.h"

 //######################################################################
 // Coverage state, as a visitor of each AstNode
@@ -47,59 +46,211 @@
 class CoverageVisitor : public AstNVisitor {
 private:
    // TYPES
-    typedef map<FileLine*,int>	FileMap;
+    typedef map<string,int>	FileMap;
+
+    struct ToggleEnt {
+	string		m_comment;	// Comment for coverage dump
+	AstNode*	m_varRefp;	// How to get to this element
+	AstNode*	m_chgRefp;	// How to get to this element
+	ToggleEnt(const string& comment, AstNode* vp, AstNode* cp)
+	    : m_comment(comment), m_varRefp(vp), m_chgRefp(cp) {}
+	~ToggleEnt() {}
+	void cleanup() {
+	    m_varRefp->deleteTree(); m_varRefp=NULL;
+	    m_chgRefp->deleteTree(); m_chgRefp=NULL;
+	}
+    };

    // STATE
    bool	m_checkBlock;	// Should this block get covered?
-    AstModule*	m_modp;		// Current module to add statement to
+    AstNodeModule*	m_modp;	// Current module to add statement to
+    bool	m_inToggleOff;	// In function/task etc
    FileMap	m_fileps;	// Column counts for each fileline
-   
-    //int debug() { return 9; }
+    string	m_beginHier;	// AstBegin hier name for user coverage points

    // METHODS
-    AstCoverInc* newCoverInc(FileLine* fl, const string& type, const string& comment) {
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
+    const char* varIgnoreToggle(AstVar* nodep) {
+	// Return true if this shouldn't be traced
+	// See also similar rule in V3TraceDecl::varIgnoreTrace
+	string prettyName = nodep->prettyName();
+	if (!nodep->isToggleCoverable())
+	    return "Not relevant signal type";
+	if (!v3Global.opt.coverageUnderscore()) {
+	    if (prettyName.c_str()[0] == '_')
+	        return "Leading underscore";
+	    if (prettyName.find("._") != string::npos)
+	        return "Inlined leading underscore";
+	}
+	if ((nodep->width()*nodep->arrayElements()) > 256) return "Wide bus/array > 256 bits";
+	// We allow this, though tracing doesn't
+	// if (nodep->arrayp(1)) return "Unsupported: Multi-dimensional array";
+	return NULL;
+    }
+
+    AstCoverInc* newCoverInc(FileLine* fl, const string& hier,
+			     const string& page_prefix, const string& comment) {
+	// For line coverage, we may have multiple if's on one line, so disambiguate if
+	// everything is otherwise identical
+	// (Don't set column otherwise as it may result in making bins not match up with
+	// different types of coverage enabled.)
+	string key = fl->filename()+"\001"+cvtToStr(fl->lineno())+"\001"+hier+"\001"+page_prefix+"\001"+comment;
 	int column = 0;
-	FileMap::iterator it = m_fileps.find(fl);
+	FileMap::iterator it = m_fileps.find(key);
 	if (it == m_fileps.end()) {
-	    m_fileps.insert(make_pair(fl,column+1));
+	    m_fileps.insert(make_pair(key,column+1));
 	} else {
 	    column = (it->second)++;
 	}

-	AstCoverDecl* declp = new AstCoverDecl(fl, column, type, comment); 
+	// We could use the basename of the filename to the page, but seems better for code
+	// from an include file to be listed under the module using it rather than the include file.
+	// Note the module name could have parameters appended, we'll consider this
+	// a feature as it allows for each parameterized block to be counted separately.
+	// Someday the user might be allowed to specify a different page suffix
+	string page = page_prefix + "/" + m_modp->prettyName();
+
+	AstCoverDecl* declp = new AstCoverDecl(fl, column, page, comment);
+	declp->hier(hier);
 	m_modp->addStmtp(declp);

 	return new AstCoverInc(fl, declp);
    }

-    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    // VISITORS - BOTH
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	m_modp = nodep;
 	m_fileps.clear();
 	nodep->iterateChildren(*this);
 	m_modp = NULL;
    }
-    virtual void visit(AstIf* nodep, AstNUser*) {
+
+    // VISITORS - TOGGLE COVERAGE
+    virtual void visit(AstNodeFTask* nodep, AstNUser*) {
+	bool oldtog = m_inToggleOff;
+	{
+	    m_inToggleOff = true;
+	    nodep->iterateChildren(*this);
+	}
+	m_inToggleOff = oldtog;
+    }
+    virtual void visit(AstVar* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+	if (m_modp && !m_inToggleOff
+	    && nodep->fileline()->coverageOn() && v3Global.opt.coverageToggle()) {
+	    const char* disablep = varIgnoreToggle(nodep);
+	    if (disablep) {
+		UINFO(4, "    Disable Toggle: "<<disablep<<" "<<nodep<<endl);
+	    } else {
+		UINFO(4, "    Toggle: "<<nodep<<endl);
+		// There's several overall ways to approach this
+		//    Treat like tracing, where a end-of-timestamp action sees all changes
+		//	Works ok, but would be quite slow as need to reform vectors before the calls
+		//    Convert to "always @ (posedge signal[#]) coverinc"
+		//	Would mark many signals as clocks, precluding many later optimizations
+		//    Convert to "if (x & !lastx) CoverInc"
+		//	OK, but we couldn't later detect them to schedule where the IFs get called
+		//    Convert to "AstCoverInc(CoverInc...)"
+		//	We'll do this, and make the if(...) coverinc later.
+
+		// Add signal to hold the old value
+		string newvarname = (string)"__Vtogcov__"+nodep->shortName();
+		AstVar* chgVarp = new AstVar (nodep->fileline(), AstVarType::MODULETEMP, newvarname, nodep);
+		m_modp->addStmtp(chgVarp);
+
+		// Create bucket for each dimension * bit.
+		// This is necessarily an O(n^2) expansion, which is why
+		// we limit coverage to signals with < 256 bits.
+
+		ToggleEnt newvec (string(""),
+				  new AstVarRef(nodep->fileline(), nodep, false),
+				  new AstVarRef(nodep->fileline(), chgVarp, true));
+		toggleVarRecurse(nodep->dtypeSkipRefp(), 0, newvec,
+				 nodep, chgVarp);
+		newvec.cleanup();
+	    }
+	}
+    }
+
+    void toggleVarBottom(AstNodeDType* dtypep, int depth, // per-iteration
+		     const ToggleEnt& above,
+		     AstVar* varp, AstVar* chgVarp) { // Constant
+	AstCoverToggle* newp
+	    = new AstCoverToggle (varp->fileline(),
+				  newCoverInc(varp->fileline(), "", "v_toggle",
+					      varp->name()+above.m_comment),
+				  above.m_varRefp->cloneTree(true),
+				  above.m_chgRefp->cloneTree(true));
+	m_modp->addStmtp(newp);
+    }
+
+    void toggleVarRecurse(AstNodeDType* dtypep, int depth, // per-iteration
+		     const ToggleEnt& above,
+		     AstVar* varp, AstVar* chgVarp) { // Constant
+	if (AstBasicDType* bdtypep = dtypep->castBasicDType()) {
+	    if (bdtypep->rangep()) {
+		for (int index_docs=bdtypep->lsb(); index_docs<bdtypep->msb()+1; index_docs++) {
+		    int index_code = index_docs - bdtypep->lsb();
+		    ToggleEnt newent (above.m_comment+string("[")+cvtToStr(index_docs)+"]",
+				      new AstSel(varp->fileline(), above.m_varRefp->cloneTree(true), index_code, 1),
+				      new AstSel(varp->fileline(), above.m_chgRefp->cloneTree(true), index_code, 1));
+		    toggleVarBottom(dtypep, depth+1,
+				    newent,
+				    varp, chgVarp);
+		    newent.cleanup();
+		}
+	    } else {
+		toggleVarBottom(dtypep, depth+1,
+				above,
+				varp, chgVarp);
+	    }
+	}
+	else if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
+	    for (int index_docs=adtypep->lsb(); index_docs<=adtypep->msb()+1; ++index_docs) {
+		int index_code = index_docs - adtypep->lsb();
+		ToggleEnt newent (above.m_comment+string("[")+cvtToStr(index_docs)+"]",
+				  new AstArraySel(varp->fileline(), above.m_varRefp->cloneTree(true), index_code),
+				  new AstArraySel(varp->fileline(), above.m_chgRefp->cloneTree(true), index_code));
+		toggleVarRecurse(adtypep->dtypeSkipRefp(), depth+1,
+				 newent,
+				 varp, chgVarp);
+		newent.cleanup();
+	    }
+	}
+	else {
+	    dtypep->v3fatalSrc("Unexpected node data type in toggle coverage generation: "<<dtypep->prettyTypeName());
+	}
+    }
+
+    // VISITORS - LINE COVERAGE
+    virtual void visit(AstIf* nodep, AstNUser*) { // Note not AstNodeIf; other types don't get covered
 	UINFO(4," IF: "<<nodep<<endl);
 	if (m_checkBlock) {
 	    nodep->ifsp()->iterateAndNext(*this);
-	    if (m_checkBlock && v3Global.opt.coverageLine()) {	// if a "if" branch didn't disable it
+	    if (m_checkBlock
+		&& nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) {	// if a "if" branch didn't disable it
 		if (!nodep->backp()->castIf()
 		    || nodep->backp()->castIf()->elsesp()!=nodep) {  // Ignore if else; did earlier
 		    UINFO(4,"   COVER: "<<nodep<<endl);
-		    nodep->addIfsp(newCoverInc(nodep->fileline(), "block", "if"));
+		    nodep->addIfsp(newCoverInc(nodep->fileline(), "", "v_line", "if"));
 		}
 	    }
 	    // Don't do empty else's, only empty if/case's
 	    if (nodep->elsesp()) {
 		m_checkBlock = true;
 		nodep->elsesp()->iterateAndNext(*this);
-		if (m_checkBlock && v3Global.opt.coverageLine()) {	// if a "else" branch didn't disable it
+		if (m_checkBlock
+		    && nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) {	// if a "else" branch didn't disable it
 		    UINFO(4,"   COVER: "<<nodep<<endl);
 		    if (nodep->elsesp()->castIf()) {
-			nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "block", "elsif"));
+			nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "", "v_line", "elsif"));
 		    } else {
-			nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "block", "else"));
+			nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "", "v_line", "else"));
 		    }
 		}
 	    }
@@ -108,22 +259,25 @@ private:
    }
    virtual void visit(AstCaseItem* nodep, AstNUser*) {
 	UINFO(4," CASEI: "<<nodep<<endl);
-	if (m_checkBlock && v3Global.opt.coverageLine()) {
+	if (m_checkBlock
+	    && nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) {
 	    nodep->bodysp()->iterateAndNext(*this);
 	    if (m_checkBlock) {	// if the case body didn't disable it
 		UINFO(4,"   COVER: "<<nodep<<endl);
-		nodep->addBodysp(newCoverInc(nodep->fileline(), "block", "case"));
+		nodep->addBodysp(newCoverInc(nodep->fileline(), "", "v_line", "case"));
 	    }
 	    m_checkBlock = true;  // Reset as a child may have cleared it
 	}
    }
    virtual void visit(AstPslCover* nodep, AstNUser*) {
 	UINFO(4," PSLCOVER: "<<nodep<<endl);
+	m_checkBlock = true;  // Always do cover blocks, even if there's a $stop
 	nodep->iterateChildren(*this);
 	if (!nodep->coverincp()) {
 	    // Note the name may be overridden by V3Assert processing
-	    nodep->coverincp(newCoverInc(nodep->fileline(), "psl_cover", "cover"));
+	    nodep->coverincp(newCoverInc(nodep->fileline(), m_beginHier, "v_user", "cover"));
 	}
+	m_checkBlock = true;  // Reset as a child may have cleared it
    }
    virtual void visit(AstStop* nodep, AstNUser*) {
 	UINFO(4,"  STOP: "<<nodep<<endl);
@@ -135,9 +289,30 @@ private:
 	    UINFO(4,"  OFF: "<<nodep<<endl);
 	    m_checkBlock = false;
 	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
+	} else {
+	    if (m_checkBlock) nodep->iterateChildren(*this);
 	}
-	if (m_checkBlock) nodep->iterateChildren(*this);
    }
+    virtual void visit(AstBegin* nodep, AstNUser*) {
+	// Record the hierarchy of any named begins, so we can apply to user
+	// coverage points.  This is because there may be cov points inside
+	// generate blocks; each point should get separate consideration.
+	// (Currently ignored for line coverage, since any generate iteration
+	// covers the code in that line.)
+	string oldHier = m_beginHier;
+	bool oldtog = m_inToggleOff;
+	{
+	    m_inToggleOff = true;
+	    if (nodep->name()!="") {
+		m_beginHier = m_beginHier + (m_beginHier!=""?".":"") + nodep->name();
+	    }
+	    nodep->iterateChildren(*this);
+	}
+	m_beginHier = oldHier;
+	m_inToggleOff = oldtog;
+    }
+
+    // VISITORS - BOTH
    virtual void visit(AstNode* nodep, AstNUser*) {
 	// Default: Just iterate
 	if (m_checkBlock) {
@@ -151,6 +326,8 @@ public:
    CoverageVisitor(AstNetlist* rootp) {
 	// Operate on all modules
 	m_checkBlock = true;
+	m_beginHier = "";
+	m_inToggleOff = false;
 	rootp->iterateChildren(*this);
    }
    virtual ~CoverageVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Coverage modules/signals together
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -0,0 +1,139 @@
+//*************************************************************************
+// DESCRIPTION: Verilator: Netlist (top level) functions
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+// COVERAGEJOIN TRANSFORMATIONS:
+//	If two COVERTOGGLEs have same VARSCOPE, combine them
+//*************************************************************************
+
+
+#include "config_build.h"
+#include "verilatedos.h"
+#include <cstdio>
+#include <cstdarg>
+#include <unistd.h>
+#include <vector>
+
+#include "V3Global.h"
+#include "V3CoverageJoin.h"
+#include "V3Hashed.h"
+#include "V3Stats.h"
+
+//######################################################################
+// CoverageJoin state, as a visitor of each AstNode
+
+class CoverageJoinVisitor : public AstNVisitor {
+private:
+    // NODE STATE
+    // V3Hashed
+    //  AstCoverToggle->VarRef::user4()	// V3Hashed calculation
+
+    //AstUser4InUse	In V3Hashed
+
+    // TYPES
+    typedef vector<AstCoverToggle*> ToggleList;
+
+    // STATE
+    ToggleList		m_toggleps;	// List of of all AstCoverToggle's
+
+    V3Double0		m_statToggleJoins;	// Statistic tracking
+
+    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
+    void detectDuplicates() {
+	UINFO(9,"Finding duplicates\n");
+	// Note uses user4
+	V3Hashed  hashed;	// Duplicate code detection
+	// Hash all of the original signals we toggle cover
+	for (ToggleList::iterator it = m_toggleps.begin(); it != m_toggleps.end(); ++it) {
+	    AstCoverToggle* nodep = *it;
+	    hashed.hashAndInsert(nodep->origp());
+	}
+	// Find if there are any duplicates
+	for (ToggleList::iterator it = m_toggleps.begin(); it != m_toggleps.end(); ++it) {
+	    AstCoverToggle* nodep = *it;
+	    if (nodep->backp()) {   // nodep->backp() is null if we already detected it's a duplicate and unlinked it
+		// Want to choose a base node, and keep finding duplicates that are identical
+		// This prevents making chains where a->b, then c->d, then b->c, as we'll find a->b, a->c, a->d directly.
+		while (1) {
+		    V3Hashed::iterator dupit = hashed.findDuplicate(nodep->origp());
+		    if (dupit == hashed.end()) break;
+		    //
+		    AstNode* duporigp = hashed.iteratorNodep(dupit);
+		    // Note hashed will point to the original variable (what's duplicated), not the covertoggle,
+		    // but we need to get back to the covertoggle which is immediately above, so:
+		    AstCoverToggle* removep = duporigp->backp()->castCoverToggle();
+		    if (!removep) nodep->v3fatalSrc("CoverageJoin duplicate of wrong type");
+		    UINFO(8,"  Orig "<<nodep<<" -->> "<<nodep->incp()->declp()<<endl);
+		    UINFO(8,"   dup "<<removep<<" -->> "<<removep->incp()->declp()<<endl);
+		    // The CoverDecl the duplicate pointed to now needs to point to the original's data
+		    // IE the duplicate will get the coverage number from the non-duplicate
+		    AstCoverDecl* datadeclp = nodep->incp()->declp()->dataDeclThisp();
+		    removep->incp()->declp()->dataDeclp (datadeclp);
+		    UINFO(8,"   new "<<removep->incp()->declp()<<endl);
+		    // Mark the found node as a duplicate of the first node
+		    // (Not vice-versa as we have the iterator for the found node)
+		    removep->unlinkFrBack();  pushDeletep(removep); removep=NULL;
+		    // Remove node from comparison so don't hit it again
+		    hashed.erase(dupit);
+		    m_statToggleJoins++;
+		}
+	    }
+	}
+    }
+
+    // VISITORS
+    virtual void visit(AstNetlist* nodep, AstNUser*) {
+	// Find all Coverage's
+	nodep->iterateChildren(*this);
+	// Simplify
+	detectDuplicates();
+    }
+    virtual void visit(AstCoverToggle* nodep, AstNUser*) {
+	m_toggleps.push_back(nodep);
+	nodep->iterateChildren(*this);
+    }
+    //--------------------
+    virtual void visit(AstNodeMath* nodep, AstNUser*) {}  // Accelerate
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+
+public:
+    // CONSTUCTORS
+    CoverageJoinVisitor(AstNetlist* nodep) {
+	nodep->accept(*this);
+    }
+    virtual ~CoverageJoinVisitor() {
+	V3Stats::addStat("Coverage, Toggle points joined", m_statToggleJoins);
+    }
+};
+
+//######################################################################
+// Coverage class functions
+
+void V3CoverageJoin::coverageJoin(AstNetlist* rootp) {
+    UINFO(2,__FUNCTION__<<": "<<endl);
+    CoverageJoinVisitor visitor (rootp);
+}
@@ -0,0 +1,38 @@
+// -*- C++ -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Coverage modules/signals together
+//
+// Code available from: http://www.veripool.org/verilator
+//
+// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
+//
+//*************************************************************************
+//
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//
+// Verilator is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+//*************************************************************************
+
+#ifndef _V3COVERAGEJOIN_H_
+#define _V3COVERAGEJOIN_H_ 1
+#include "config_build.h"
+#include "verilatedos.h"
+#include "V3Error.h"
+#include "V3Ast.h"
+
+//============================================================================
+
+class V3CoverageJoin {
+public:
+    // CREATORS
+    static void coverageJoin(AstNetlist* rootp);
+};
+
+#endif // Guard
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Dead code elimination
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -21,13 +21,15 @@
 // DEAD TRANSFORMATIONS:
 //	Remove any unreferenced modules
 //	Remove any unreferenced variables
-//	    
+//
+// NOTE: If redo this, consider using maybePointedTo()/broken() ish scheme
+// instead of needing as many visitors.
 //*************************************************************************

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <vector>
 #include <map>
@@ -46,7 +48,7 @@ private:
    // VISITORS
    virtual void visit(AstCell* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->modp()->user(nodep->modp()->user() - 1);
+	nodep->modp()->user1(nodep->modp()->user1() - 1);
    }
    //-----
    virtual void visit(AstNodeMath* nodep, AstNUser*) {}  // Accelerate
@@ -55,7 +57,7 @@ private:
    }
 public:
    // CONSTRUCTORS
-    DeadModVisitor(AstModule* nodep) {
+    DeadModVisitor(AstNodeModule* nodep) {
 	nodep->accept(*this);
    }
    virtual ~DeadModVisitor() {}
@@ -68,9 +70,10 @@ class DeadVisitor : public AstNVisitor {
 private:
    // NODE STATE
    // Entire Netlist:
-    //  AstModule::user()	-> int. Count of number of cells referencing this module.
+    //  AstNodeModule::user()	-> int. Count of number of cells referencing this module.
    //  AstVar::user()		-> int. Count of number of references
    //  AstVarScope::user()	-> int. Count of number of references
+    AstUser1InUse	m_inuser1;

    // TYPES
    typedef multimap<AstVarScope*,AstNodeAssign*>	AssignMap;
@@ -81,23 +84,42 @@ private:
    AssignMap			m_assignMap;	// List of all simple assignments for each variable
    bool			m_elimUserVars;	// Allow removal of user's vars
    bool			m_sideEffect;	// Side effects discovered in assign RHS
-    //int debug() { return 9; }

    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }

    // VISITORS
    virtual void visit(AstCell* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	nodep->modp()->user(nodep->modp()->user() + 1);
+	nodep->modp()->user1Inc();
    }
    virtual void visit(AstNodeVarRef* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
 	if (nodep->varScopep()) {
-	    nodep->varScopep()->user(nodep->varScopep()->user() + 1);
-	    nodep->varScopep()->varp()->user(nodep->varScopep()->varp()->user() + 1);
+	    nodep->varScopep()->user1Inc();
+	    nodep->varScopep()->varp()->user1Inc();
 	}
 	if (nodep->varp()) {
-	    nodep->varp()->user(nodep->varp()->user() + 1);
+	    nodep->varp()->user1Inc();
+	}
+	if (nodep->packagep()) {
+	    nodep->packagep()->user1Inc();
+	}
+    }
+    virtual void visit(AstNodeFTaskRef* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+	if (nodep->packagep()) {
+	    nodep->packagep()->user1Inc();
+	}
+    }
+    virtual void visit(AstRefDType* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+	if (nodep->packagep()) {
+	    nodep->packagep()->user1Inc();
 	}
    }
    virtual void visit(AstVarScope* nodep, AstNUser*) {
@@ -123,13 +145,10 @@ private:
 	    nodep->lhsp()->iterateAndNext(*this);
 	}
    }
-    virtual void visit(AstUCFunc* nodep, AstNUser*) {
-	m_sideEffect = true;  // If appears on assign RHS, don't ever delete the assignment
-	nodep->iterateChildren(*this);
-    }

    //-----
    virtual void visit(AstNode* nodep, AstNUser*) {
+	if (nodep->isOutputter()) m_sideEffect=true;
 	nodep->iterateChildren(*this);
    }

@@ -140,10 +159,10 @@ private:
 	// after we've done all the generate blocks
 	for (bool retry=true; retry; ) {
 	    retry=false;
-	    AstModule* nextmodp;
-	    for (AstModule* modp = v3Global.rootp()->modulesp(); modp; modp=nextmodp) {
-		nextmodp = modp->nextp()->castModule();
-		if (modp->level()>2	&& modp->user()==0) {
+	    AstNodeModule* nextmodp;
+	    for (AstNodeModule* modp = v3Global.rootp()->modulesp(); modp; modp=nextmodp) {
+		nextmodp = modp->nextp()->castNodeModule();
+		if (modp->level()>2	&& modp->user1()==0) {
 		    // > 2 because L1 is the wrapper, L2 is the top user module
 		    UINFO(4,"  Dead module "<<modp<<endl);
 		    // And its children may now be killable too; correct counts
@@ -164,7 +183,7 @@ private:
 	// Delete any unused varscopes
 	for (vector<AstVarScope*>::iterator it = m_vscsp.begin(); it!=m_vscsp.end(); ++it) {
 	    AstVarScope* vscp = *it;
-	    if (vscp->user() == 0 && canElim(vscp->varp())) {
+	    if (vscp->user1() == 0 && canElim(vscp->varp())) {
 		UINFO(4,"  Dead "<<vscp<<endl);
 		pair <AssignMap::iterator,AssignMap::iterator> eqrange = m_assignMap.equal_range(vscp);
 		for (AssignMap::iterator it = eqrange.first; it != eqrange.second; ++it) {
@@ -176,7 +195,7 @@ private:
 	    }
 	}
 	for (vector<AstVar*>::iterator it = m_varsp.begin(); it!=m_varsp.end(); ++it) {
-	    if ((*it)->user() == 0 && canElim((*it))) {
+	    if ((*it)->user1() == 0 && canElim((*it))) {
 		UINFO(4,"  Dead "<<(*it)<<endl);
 		(*it)->unlinkFrBack()->deleteTree(); (*it)=NULL;
 	    }
@@ -189,7 +208,6 @@ public:
 	m_elimUserVars = elimUserVars;
 	m_sideEffect = false;
 	// Operate on whole netlist
-	AstNode::userClearTree();	// userp() used on entire tree
 	nodep->accept(*this);
 	deadCheckVar();
 	// Modules after vars, because might be vars we delete inside a mod we delete
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Dead branch elimination
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for delayed nodes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,9 +19,9 @@
 //
 //*************************************************************************
 // V3Delayed's Transformations:
-//		
+//
 // Each module:
-//	Replace ASSIGNDLY var, exp 
+//	Replace ASSIGNDLY var, exp
 //	    With   ASSIGNDLY newvar, exp
 //	    At top of block:  VAR  newvar
 //	    At bottom of block: ASSIGNW var newvar
@@ -54,8 +54,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>
 #include <map>
@@ -73,17 +73,22 @@ class DelayedVisitor : public AstNVisitor {
 private:
    // NODE STATE
    // Cleared each module:
-    //  AstVarScope::userp()	-> AstVarScope*.  Points to temp var created.
+    //  AstVarScope::user1p()	-> AstVarScope*.  Points to temp var created.
    //  AstVarScope::user2p()	-> AstActive*.  Points to activity block of signal
    //  AstVarScope::user4p()	-> AstAlwaysPost*.  Post block for this variable
+    //  AstVarScope::user5()	-> VarUsage. Tracks delayed vs non-delayed usage
    //  AstVar::user2()		-> bool.  Set true if already made warning
-    //  AstVar::user3()		-> VarUsage. Tracks delayed vs non-delayed usage
    //  AstVar::user4()		-> int.   Vector number, for assignment creation
    //  AstVarRef::user2()	-> bool.  Set true if already processed
    //  AstAlwaysPost::user4()	-> AstIf*.  Last IF (__Vdlyvset__) created under this AlwaysPost
    // Cleared each scope:
-    //  AstAssignDly::user5()	-> AstVarScope*.  __Vdlyvset__ created for this assign
-    //  AstAlwaysPost::user5()	-> AstVarScope*.  __Vdlyvset__ last referenced in IF
+    //  AstAssignDly::user3()	-> AstVarScope*.  __Vdlyvset__ created for this assign
+    //  AstAlwaysPost::user3()	-> AstVarScope*.  __Vdlyvset__ last referenced in IF
+    AstUser1InUse	m_inuser1;
+    AstUser2InUse	m_inuser2;
+    AstUser3InUse	m_inuser3;
+    AstUser4InUse	m_inuser4;
+    AstUser5InUse	m_inuser5;

    enum VarUsage { VU_NONE=0, VU_DLY=1, VU_NONDLY=2 };

@@ -94,44 +99,42 @@ private:
    bool		m_inDly;	// True in delayed assignments
    bool		m_inLoop;	// True in for loops
    bool		m_inInitial;	// True in intial blocks
-    typedef std::map<pair<AstModule*,string>,AstVar*> VarMap;
+    typedef std::map<pair<AstNodeModule*,string>,AstVar*> VarMap;
    VarMap		m_modVarMap;	// Table of new var names created under module
    V3Double0		m_statSharedSet;// Statistic tracking

-    //static int debug() { return 9; }

    // METHODS
-    void markVarUsage(AstVar* nodep, uint32_t flags) {
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
+    void markVarUsage(AstVarScope* nodep, uint32_t flags) {
 	//UINFO(4," MVU "<<flags<<" "<<nodep<<endl);
-	nodep->user3( nodep->user3() | flags );
-	if ((nodep->user3() & VU_DLY) && (nodep->user3() & VU_NONDLY)) {
-	    nodep->v3warn(BLKANDNBLK,"Unsupported: Blocked and non-blocking assignments to same variable: "<<nodep->prettyName());
+	nodep->user5( nodep->user5() | flags );
+	if ((nodep->user5() & VU_DLY) && (nodep->user5() & VU_NONDLY)) {
+	    nodep->v3warn(BLKANDNBLK,"Unsupported: Blocked and non-blocking assignments to same variable: "<<nodep->varp()->prettyName());
 	}
    }
    AstVarScope* createVarSc(AstVarScope* oldvarscp, string name, int width/*0==fromoldvar*/) {
 	// Because we've already scoped it, we may need to add both the AstVar and the AstVarScope
 	if (!oldvarscp->scopep()) oldvarscp->v3fatalSrc("Var unscoped");
 	AstVar* varp;
-	AstModule* addmodp = oldvarscp->scopep()->modp();
+	AstNodeModule* addmodp = oldvarscp->scopep()->modp();
 	// We need a new AstVar, but only one for all scopes, to match the new AstVarScope
 	VarMap::iterator iter = m_modVarMap.find(make_pair(addmodp,name));
 	if (iter != m_modVarMap.end()) {
 	    // Created module's AstVar earlier under some other scope
 	    varp = iter->second;
 	} else {
-	    AstRange* rangep = NULL;
 	    if (width==0) {
-		rangep = new AstRange(oldvarscp->fileline(),
-				      oldvarscp->varp()->msb(),
-				      oldvarscp->varp()->lsb());
-	    } else if (width==1) {
-		rangep = NULL;
+		varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, oldvarscp->varp());
+		varp->widthSignedFrom(oldvarscp);
 	    } else {
-		rangep = new AstRange(oldvarscp->fileline(),
-				      width-1, 0);
+		varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, AstLogicPacked(), width);
 	    }
-	    varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, rangep);
-	    if (width==0) varp->widthSignedFrom(oldvarscp);
 	    addmodp->addStmtp(varp);
 	    m_modVarMap.insert(make_pair(make_pair(addmodp, name), varp));
 	}
@@ -156,6 +159,7 @@ private:
 	    arrayselp = lhsp->castArraySel();
 	}
 	if (!arrayselp) nodep->v3fatalSrc("No arraysel under bitsel?");
+	if (arrayselp->length()!=1) nodep->v3fatalSrc("ArraySel with length!=1 should have been removed in V3Slice");

 	UINFO(4,"AssignDlyArray: "<<nodep<<endl);
 	//
@@ -180,7 +184,7 @@ private:
 		dimreadps.push_front(dimp);
 	    } else {
 		string bitvarname = (string("__Vdlyvdim")+cvtToStr(dimension)
-				     +"__"+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
+				     +"__"+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
 		AstVarScope* bitvscp = createVarSc(varrefp->varScopep(), bitvarname, dimp->width());
 		AstAssign* bitassignp
 		    = new AstAssign (nodep->fileline(),
@@ -198,7 +202,7 @@ private:
 	    if (bitselp->fromp()->castConst()) {// vlsb = constant, can just push constant into where we use it
 		bitreadp = lsbvaluep;
 	    } else {
-		string bitvarname = (string("__Vdlyvlsb__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
+		string bitvarname = (string("__Vdlyvlsb__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
 		AstVarScope* bitvscp = createVarSc(varrefp->varScopep(), bitvarname, lsbvaluep->width());
 		AstAssign* bitassignp = new AstAssign (nodep->fileline(),
 						       new AstVarRef(nodep->fileline(), bitvscp, true),
@@ -213,7 +217,7 @@ private:
 	if (nodep->rhsp()->castConst()) {	// vval = constant, can just push constant into where we use it
 	    valreadp = nodep->rhsp()->unlinkFrBack();
 	} else {
-	    string valvarname = (string("__Vdlyvval__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
+	    string valvarname = (string("__Vdlyvval__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
 	    AstVarScope* valvscp = createVarSc(varrefp->varScopep(), valvarname, nodep->rhsp()->width());
 	    newlhsp = new AstVarRef(nodep->fileline(), valvscp, true);
 	    valreadp = new AstVarRef(nodep->fileline(), valvscp, false);
@@ -223,16 +227,16 @@ private:
 	bool sharedVset = false;
 	AstVarScope* setvscp;

-	if (nodep->user5p()) {
+	if (nodep->user3p()) {
 	    // Simplistic optimization.  If the previous statement in same scope was also a =>,
-	    // then we told this nodep->user5 we can use its Vdlyvset rather than making a new one.
+	    // then we told this nodep->user3 we can use its Vdlyvset rather than making a new one.
 	    // This is good for code like:
 	    //    for (i=0; i<5; i++)  vector[i] <= something;
 	    sharedVset = true;
-	    setvscp = nodep->user5p()->castNode()->castVarScope();
+	    setvscp = nodep->user3p()->castNode()->castVarScope();
 	    m_statSharedSet++;
 	} else {  // Create new one
-	    string setvarname = (string("__Vdlyvset__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
+	    string setvarname = (string("__Vdlyvset__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
 	    setvscp = createVarSc(varrefp->varScopep(), setvarname, 1);
 	    AstAssignPre* setinitp
 		= new AstAssignPre (nodep->fileline(),
@@ -247,7 +251,7 @@ private:
 	    nodep->addNextHere(setassignp);
 	}
 	if (m_nextDlyp) {  // Tell next assigndly it can share the variable
-	    m_nextDlyp->user5p(setvscp);
+	    m_nextDlyp->user3p(setvscp);
 	}
 	//
 	// Create ALWAYSPOST for delayed variable
@@ -269,12 +273,12 @@ private:
 	AstAlwaysPost* finalp = varrefp->varScopep()->user4p()->castNode()->castAlwaysPost();
 	if (!finalp) {
 	    finalp = new AstAlwaysPost(nodep->fileline(), NULL/*sens*/, NULL/*body*/);
-	    UINFO(9,"     Created "<<finalp<<endl); 
+	    UINFO(9,"     Created "<<finalp<<endl);
 	    m_activep->addStmtsp(finalp);
 	    varrefp->varScopep()->user4p(finalp);
 	}
 	AstIf* postLogicp;
-	if (finalp->user5p()->castNode() == setvscp) {
+	if (finalp->user3p()->castNode() == setvscp) {
 	    // Optimize as above; if sharing Vdlyvset *ON SAME VARIABLE*,
 	    // we can share the IF statement too
 	    postLogicp = finalp->user4p()->castNode()->castIf();
@@ -284,9 +288,9 @@ private:
 				    new AstVarRef(nodep->fileline(), setvscp, false),
 				    NULL,
 				    NULL);
-	    UINFO(9,"     Created "<<postLogicp<<endl); 
+	    UINFO(9,"     Created "<<postLogicp<<endl);
 	    finalp->addBodysp(postLogicp);
-	    finalp->user5p(setvscp);	// Remember IF's vset variable
+	    finalp->user3p(setvscp);	// Remember IF's vset variable
 	    finalp->user4p(postLogicp);	// and the associated IF, as we may be able to reuse it
 	}
 	postLogicp->addIfsp(new AstAssign(nodep->fileline(), selectsp, valreadp));
@@ -298,15 +302,11 @@ private:
    virtual void visit(AstNetlist* nodep, AstNUser*) {
 	//VV*****  We reset all userp() on the netlist
 	m_modVarMap.clear();
-	AstNode::userClearTree();
-	AstNode::user2ClearTree();
-	AstNode::user3ClearTree();
-	AstNode::user4ClearTree();
 	nodep->iterateChildren(*this);
    }
    virtual void visit(AstScope* nodep, AstNUser*) {
 	UINFO(4," MOD   "<<nodep<<endl);
-	AstNode::user5ClearTree();
+	AstNode::user3ClearTree();
 	nodep->iterateChildren(*this);
    }
    virtual void visit(AstCFunc* nodep, AstNUser*) {
@@ -330,7 +330,7 @@ private:
 		&& nodep->lhsp()->castSel()->fromp()->castArraySel())) {
 	    AstNode* lhsp = nodep->lhsp()->unlinkFrBack();
 	    AstNode* newlhsp = createDlyArray(nodep, lhsp);
-	    if (m_inLoop) nodep->v3error("Unsupported: Delayed assignment to array inside for loops (non-delayed is ok - see docs)");
+	    if (m_inLoop) nodep->v3warn(E_BLKLOOPINIT,"Unsupported: Delayed assignment to array inside for loops (non-delayed is ok - see docs)");
 	    if (newlhsp) {
 		nodep->lhsp(newlhsp);
 	    } else {
@@ -347,15 +347,15 @@ private:
    virtual void visit(AstVarRef* nodep, AstNUser*) {
 	if (!nodep->user2()) {  // Not done yet
 	    nodep->user2(true);
-	    
+
 	    if (m_inDly && nodep->lvalue()) {
 		UINFO(4,"AssignDlyVar: "<<nodep<<endl);
-		markVarUsage(nodep->varp(), VU_DLY);
+		markVarUsage(nodep->varScopep(), VU_DLY);
 		if (!m_activep) nodep->v3fatalSrc("<= not under sensitivity block");
 		if (!m_activep->hasClocked()) nodep->v3error("Internal: Blocking <= assignment in non-clocked block, should have converted in V3Active");
 		AstVarScope* oldvscp = nodep->varScopep();
 		if (!oldvscp) nodep->v3fatalSrc("Var didn't get varscoped in V3Scope.cpp\n");
-		AstVarScope* dlyvscp = oldvscp->userp()->castNode()->castVarScope();
+		AstVarScope* dlyvscp = oldvscp->user1p()->castNode()->castVarScope();
 		if (dlyvscp) {  // Multiple use of delayed variable
 		    AstActive* oldactivep = dlyvscp->user2p()->castNode()->castActive();
 		    if (!oldactivep) nodep->v3fatalSrc("<= old dly assignment not put under sensitivity block");
@@ -371,8 +371,8 @@ private:
 			UINFO(4,"  Act: "<<m_activep<<endl);
 			UINFO(4,"  Act: "<<oldactivep<<endl);
 			// Make a new sensitivity list, which is the combination of both blocks
-			AstSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true)->castSenItem();
-			AstSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true)->castSenItem();
+			AstNodeSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true);
+			AstNodeSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true);
 			AstSenTree* treep = new AstSenTree(m_activep->fileline(), sena);
 			if (senb) treep->addSensesp(senb);
 			if (AstSenTree* storep = oldactivep->sensesStorep()) {
@@ -395,13 +395,13 @@ private:
 					     new AstVarRef(nodep->fileline(), oldvscp, true),
 					     new AstVarRef(nodep->fileline(), dlyvscp, false));
 		    postp->lhsp()->user2(true);	// Don't detect this assignment
-		    oldvscp->userp(dlyvscp);  // So we can find it later
+		    oldvscp->user1p(dlyvscp);  // So we can find it later
 		    // Make new ACTIVE with identical sensitivity tree
 		    AstActive* newactp = new AstActive (nodep->fileline(), "sequentdly",
 							m_activep->sensesp());
 		    newactp->addStmtsp(prep);	// Add to FRONT of statements
 		    newactp->addStmtsp(postp);
-		    m_activep->addNext(newactp);					
+		    m_activep->addNext(newactp);
 		    dlyvscp->user2p(newactp);
 		}
 		AstVarRef* newrefp = new AstVarRef(nodep->fileline(), dlyvscp, true);
@@ -411,14 +411,15 @@ private:
 	    else if (!m_inDly && nodep->lvalue()) {
 		//UINFO(9,"NBA "<<nodep<<endl);
 		if (!m_inInitial) {
-		    markVarUsage(nodep->varp(), VU_NONDLY);
+		    UINFO(4,"AssignNDlyVar: "<<nodep<<endl);
+		    markVarUsage(nodep->varScopep(), VU_NONDLY);
 		}
 	    }
 	}
    }

    virtual void visit(AstNodeFor* nodep, AstNUser*) {
-	nodep->v3fatalSrc("For statements should have been converted to while statements in V3Unroll\n");
+	nodep->v3fatalSrc("For statements should have been converted to while statements in V3Begin\n");
    }
    virtual void visit(AstWhile* nodep, AstNUser*) {
 	bool oldloop = m_inLoop;
@@ -435,7 +436,7 @@ private:

 public:
    // CONSTUCTORS
-    DelayedVisitor(AstNode* nodep) {
+    DelayedVisitor(AstNetlist* nodep) {
 	m_inDly = false;
 	m_activep=NULL;
 	m_cfuncp=NULL;
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3Depth's Transformations:
-//		
+//
 // Each module:
 //	For each wide OP, assign a temporary variable.
 //	For each deep expression, assign expression to temporary.
@@ -30,8 +30,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -46,25 +46,29 @@ private:
    // NODE STATE

    // STATE
-    AstModule*		m_modp;		// Current module
+    AstNodeModule*	m_modp;		// Current module
    AstCFunc*		m_funcp;	// Current block
    AstNode*		m_stmtp;	// Current statement
    int			m_depth;	// How deep in an expression
    int			m_maxdepth;	// Maximum depth in an expression

-    //int debug() { return 9; }
-
    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    void createDeepTemp(AstNode* nodep) {
 	UINFO(6,"  Deep  "<<nodep<<endl);
 	//if (debug()>=9) nodep->dumpTree(cout,"deep:");

-	string newvarname = ((string)"__Vdeeptemp__"+cvtToStr(m_modp->varNumGetInc()));
+	string newvarname = ((string)"__Vdeeptemp"+cvtToStr(m_modp->varNumGetInc()));
 	AstVar* varp = new AstVar (nodep->fileline(), AstVarType::STMTTEMP, newvarname,
 				   // Width, not widthMin, as we may be in middle of BITSEL expression which
 				   // though it's one bit wide, needs the mask in the upper bits.
 				   // (Someday we'll have a valid bitmask instead of widths....)
-				   new AstRange(nodep->fileline(), nodep->width()-1, 0));
+				   AstLogicPacked(), nodep->width());
 	if (!m_funcp) nodep->v3fatalSrc("Deep expression not under a function");
 	m_funcp->addInitsp(varp);
 	// Replace node tree with reference to var
@@ -81,11 +85,12 @@ private:
    }

    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	UINFO(4," MOD   "<<nodep<<endl);
 	m_modp = nodep;
 	m_funcp = NULL;
 	nodep->iterateChildren(*this);
+	m_modp = NULL;
    }
    virtual void visit(AstCFunc* nodep, AstNUser*) {
 	m_funcp = nodep;
@@ -111,7 +116,7 @@ private:
 	// We have some operator defines that use 2 parens, so += 2.
 	m_depth += 2;
 	if (m_depth>m_maxdepth) m_maxdepth=m_depth;
-	nodep->iterateChildren(*this); 
+	nodep->iterateChildren(*this);
 	m_depth -= 2;

 	if (m_stmtp
@@ -126,6 +131,7 @@ private:

    //--------------------
    // Marking of non-static functions (because they might need "this")
+    // (Here just to avoid another iteration)
    void needNonStaticFunc(AstNode* nodep) {
 	if (!m_funcp) nodep->v3fatalSrc("Non-static accessor not under a function");
 	if (m_funcp->isStatic()) {
@@ -133,11 +139,6 @@ private:
 	    m_funcp->isStatic(false);
 	}
    }
-    virtual void visit(AstCoverInc* nodep, AstNUser*) {
-	// OPTIMIZE: For now this needs this->__Vcoverage, but could be globalized
-	needNonStaticFunc(nodep);
-	visitStmt(nodep);
-    }
    virtual void visit(AstUCFunc* nodep, AstNUser*) {
 	needNonStaticFunc(nodep);
 	nodep->iterateChildren(*this);
@@ -156,14 +157,13 @@ private:

 public:
    // CONSTUCTORS
-    DepthVisitor(AstNode* nodep) {
+    DepthVisitor(AstNetlist* nodep) {
 	m_modp=NULL;
 	m_funcp=NULL;
 	m_stmtp=NULL;
 	m_depth=0;
 	m_maxdepth=0;
 	//
-	AstNode::userClearTree();	// userp() used on entire tree
 	nodep->accept(*this);
    }
    virtual ~DepthVisitor() {}
@@ -1,16 +1,17 @@
-// $Id$ //-*- C++ -*-
+// -*- C++ -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -1,16 +1,16 @@
-// $Id$
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
-// Code available from: http://www.veripool.com/verilator
+// Code available from: http://www.veripool.org/verilator
 //
 // AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
 //
 //*************************************************************************
 //
-// Copyright 2003-2008 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2010 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
-// General Public License or the Perl Artistic License.
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
 //
 // Verilator is distributed in the hope that it will be useful,
 // but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -19,7 +19,7 @@
 //
 //*************************************************************************
 // V3DepthBlock's Transformations:
-//		
+//
 // Each module:
 //	For each deep block, create cfunc including that block.
 //
@@ -27,8 +27,8 @@

 #include "config_build.h"
 #include "verilatedos.h"
-#include <stdio.h>
-#include <stdarg.h>
+#include <cstdio>
+#include <cstdarg>
 #include <unistd.h>
 #include <algorithm>

@@ -44,14 +44,18 @@ private:
    // NODE STATE

    // STATE
-    AstModule*		m_modp;		// Current module
+    AstNodeModule*	m_modp;		// Current module
    AstCFunc*		m_funcp;	// Current function
    int			m_depth;	// How deep in an expression
    int			m_deepNum;	// How many functions made

-    //int debug() { return 9; }
-
    // METHODS
+    static int debug() {
+	static int level = -1;
+	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
+	return level;
+    }
+
    AstCFunc* createDeepFunc(AstNode* nodep) {
 	AstNRelinker relinkHandle;
 	nodep->unlinkFrBack(&relinkHandle);
@@ -73,11 +77,12 @@ private:
    }

    // VISITORS
-    virtual void visit(AstModule* nodep, AstNUser*) {
+    virtual void visit(AstNodeModule* nodep, AstNUser*) {
 	UINFO(4," MOD   "<<nodep<<endl);
 	m_modp = nodep;
 	m_deepNum = 0;
 	nodep->iterateChildren(*this);
+	m_modp = NULL;
    }
    virtual void visit(AstCFunc* nodep, AstNUser*) {
 	// We recurse into this.
@@ -121,7 +126,7 @@ private:

 public:
    // CONSTUCTORS
-    DepthBlockVisitor(AstNode* nodep) {
+    DepthBlockVisitor(AstNetlist* nodep) {
 	m_modp=NULL;
 	m_depth=0;
 	//
--- a/Show More
+++ b/Show More