Fix error with tasks that have output first, bug78.

Changes

@@ -5,6 +5,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 * Verilator 3.7***
 
+**** Fix error with tasks that have output first, bug78.  [Andrea Foletto]
+
 **** Fix "cloning" error with -y/--top-module, bug76. [Dimitris Nalbantis]
 
 * Verilator 3.702 2009/03/28

src/V3Delayed.cpp

@@ -415,6 +415,7 @@ private:
 	    else if (!m_inDly && nodep->lvalue()) {
 		//UINFO(9,"NBA "<<nodep<<endl);
 		if (!m_inInitial) {
+		    UINFO(4,"AssignNDlyVar: "<<nodep<<endl);
 		    markVarUsage(nodep->varp(), VU_NONDLY);
 		}
 	    }

src/V3LinkLValue.cpp

@@ -211,10 +211,10 @@ private:
 	    if (AstVar* portp = stmtp->castVar()) {
 		if (portp->isIO()) {
 		    if (portp->isInput()) {
-			pinp->iterateAndNext(*this);
+			pinp->iterate(*this);
 		    } else {  // Output or Inout
 			m_setRefLvalue = true;
-			pinp->iterateAndNext(*this);
+			pinp->iterate(*this);
 			m_setRefLvalue = false;
 		    }
 		    // Advance pin