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Clock gating optimization, currently disabled. Merge from branch

This commit is contained in:
Wilson Snyder 2009-01-07 09:37:59 -05:00
parent 12bd12e112
commit 59159b4811
19 changed files with 1451 additions and 132 deletions
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1
src/Makefile_obj.in
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@ -136,6 +136,7 @@ RAW_OBJS = \
V3Cast.o \
V3Changed.o \
V3Clean.o \
V3ClkGater.o \
V3Clock.o \
V3Combine.o \
V3Const__gen.o \

68
src/V3Active.cpp
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@ -43,6 +43,7 @@
#include "V3Active.h"
#include "V3Ast.h"
#include "V3EmitCBase.h"
#include "V3Const.h"
//***** See below for main transformation engine
@ -77,8 +78,8 @@ private:
// Don't clear scopep, the namer persists beyond this visit
}
virtual void visit(AstSenTree* nodep, AstNUser*) {
// Sort sensitivity list
nodep->sortSenses();
// Simplify sensitivity list
V3Const::constifyTreeExpensive(nodep);
}
// Empty visitors, speed things up
virtual void visit(AstNodeStmt* nodep, AstNUser*) { }
@ -185,10 +186,15 @@ public:
class ActiveVisitor : public ActiveBaseVisitor {
private:
// NODE STATE
// Each call to V3Const::constify
// AstNode::user4() Used by V3Const::constify, called below
// STATE
ActiveNamer m_namer; // Tracking of active names
AstCFunc* m_scopeFinalp; // Final function for this scope
AstAlways* m_alwaysp; // Under always
bool m_itemCombo; // Found a SenItem combo
bool m_itemSequent; // Found a SenItem sequential
// VISITORS
virtual void visit(AstScope* nodep, AstNUser*) {
@ -252,6 +258,7 @@ private:
nodep->deleteTree(); nodep = NULL;
}
// METHODS
virtual void visit(AstAlways* nodep, AstNUser*) {
// Move always to appropriate ACTIVE based on its sense list
UINFO(4," ALW "<<nodep<<endl);
@ -273,29 +280,14 @@ private:
}
// Read sensitivitues
bool combo = false;
bool sequent = false;
if (nodep->sensesp()) {
for (AstNodeSenItem* nextp, *senp = nodep->sensesp()->sensesp(); senp; senp=nextp) {
nextp = senp->nextp()->castNodeSenItem();
if (AstSenItem* itemp = senp->castSenItem()) {
if (itemp->edgeType() == AstEdgeType::ANYEDGE) {
combo = true;
// Delete the sensitivity
// We'll add it as a generic COMBO SenItem in a moment.
itemp->unlinkFrBack()->deleteTree(); itemp=NULL; senp=NULL;
} else if (itemp->varrefp()) {
// V3LinkResolve should have cleaned most of these up
if (itemp->varrefp()->width()>1) itemp->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
<<itemp->varrefp()->prettyName());
sequent = true;
itemp->varrefp()->varp()->usedClock(true);
}
} else {
senp->v3fatalSrc("Strange node under sentree");
}
}
}
m_alwaysp = nodep;
m_itemCombo = false;
m_itemSequent = false;
nodep->sensesp()->iterateAndNext(*this);
m_alwaysp = NULL;
bool combo = m_itemCombo;
bool sequent = m_itemSequent;
if (!combo && !sequent) combo=true; // If no list, Verilog 2000: always @ (*)
#ifndef NEW_ORDERING
if (combo && sequent) {
@ -334,6 +326,29 @@ private:
ActiveDlyVisitor dlyvisitor (nodep);
}
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
AstSenItem* subitemp = nodep->sensesp();
if (subitemp->edgeType() != AstEdgeType::ANYEDGE
&& subitemp->edgeType() != AstEdgeType::POSEDGE
&& subitemp->edgeType() != AstEdgeType::NEGEDGE) {
nodep->v3fatalSrc("Strange activity type under SenGate");
}
nodep->iterateChildren(*this);
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
if (nodep->edgeType() == AstEdgeType::ANYEDGE) {
m_itemCombo = true;
// Delete the sensitivity
// We'll add it as a generic COMBO SenItem in a moment.
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
} else if (nodep->varrefp()) {
// V3LinkResolve should have cleaned most of these up
if (nodep->varrefp()->width()>1) nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
<<nodep->varrefp()->prettyName());
m_itemSequent = true;
nodep->varrefp()->varp()->usedClock(true);
}
}
// Empty visitors, speed things up
virtual void visit(AstNodeMath* nodep, AstNUser*) {}
@ -346,6 +361,9 @@ public:
// CONSTUCTORS
ActiveVisitor(AstNode* nodep) {
m_scopeFinalp = NULL;
m_alwaysp = NULL;
m_itemCombo = false;
m_itemSequent = false;
nodep->accept(*this);
}
virtual ~ActiveVisitor() {}

5
src/V3ActiveTop.cpp
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@ -39,6 +39,7 @@
#include "V3ActiveTop.h"
#include "V3Ast.h"
#include "V3SenTree.h"
#include "V3Const.h"
//######################################################################
// Active class functions
@ -48,6 +49,8 @@ private:
// NODE STATE
// Entire netlist
// AstNode::user() bool. True if processed
// Each call to V3Const::constify
// AstNode::user4() Used by V3Const::constify, called below
AstUser1InUse m_inuser1;
// STATE
@ -72,7 +75,7 @@ private:
UINFO(4," ACTIVE "<<nodep<<endl);
AstSenTree* sensesp = nodep->sensesp();
if (!sensesp) nodep->v3fatalSrc("NULL");
sensesp->sortSenses(); // Remove duplicate clocks and such
V3Const::constifyTreeExpensive(nodep); // Remove duplicate clocks and such
if (sensesp->sensesp()
&& sensesp->sensesp()->castSenItem()
&& sensesp->sensesp()->castSenItem()->isNever()) {

2
src/V3Ast.h
View File

@ -105,7 +105,7 @@ class AstEdgeType {
public:
// REMEMBER to edit the strings below too
enum en {
// These must be in general -> most specific order, as we sort by it in AstSenTree::sortSenses()
// These must be in general -> most specific order, as we sort by it in V3Const::visit AstSenTre
ILLEGAL,
// Involving a variable
ANYEDGE, // Default for sensitivities; rip them out

84
src/V3AstNodes.cpp
View File

@ -163,90 +163,6 @@ string AstScope::nameDotless() const {
return dotless;
}
struct AstSenItemCmp {
inline bool operator () (const AstSenItem* lhsp, const AstSenItem* rhsp) const {
// Looks visually better if we keep sorted by name
if (lhsp->edgeType() < rhsp->edgeType()) return true;
if (lhsp->edgeType() > rhsp->edgeType()) return false;
if (!lhsp->varrefp() && rhsp->varrefp()) return true;
if ( lhsp->varrefp() && !rhsp->varrefp()) return false;
if (lhsp->varrefp() && rhsp->varrefp()) {
if (lhsp->varrefp()->name() < rhsp->varrefp()->name()) return true;
if (lhsp->varrefp()->name() > rhsp->varrefp()->name()) return false;
// But might be same name with different scopes
if (lhsp->varrefp()->varScopep() < rhsp->varrefp()->varScopep()) return true;
if (lhsp->varrefp()->varScopep() > rhsp->varrefp()->varScopep()) return false;
}
return false;
}
};
void AstSenTree::sortSenses() {
// Sort the sensitivity names so "posedge a or b" and "posedge b or a" end up together.
// Also, remove duplicate assignments, and fold POS&NEGs into ANYEDGEs
//cout<<endl; this->dumpTree(cout,"ssin: ");
AstSenItem* nextp;
if (sensesp() && !sensesp()->castSenItem()) v3fatalSrc("Unsupported node type under sentree");
// Make things a little faster; check first if we need a sort
for (AstSenItem* senp = sensesp()->castSenItem(); senp; senp=senp->nextp()->castSenItem()) {
nextp=senp->nextp()->castSenItem();
AstSenItemCmp cmp;
if (nextp && !cmp(senp, nextp)) {
// Something's out of order, sort it
senp = NULL;
vector<AstSenItem*> vec;
for (AstSenItem* senp = sensesp()->castSenItem(); senp; senp=senp->nextp()->castSenItem()) {
vec.push_back(senp);
}
sort(vec.begin(), vec.end(), AstSenItemCmp());
for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
(*it)->unlinkFrBack();
}
for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
this->addSensesp(*it);
}
break;
}
}
// Pass2, remove dup edges
for (AstSenItem* senp = sensesp()->castSenItem(); senp; senp=nextp) {
nextp=senp->nextp()->castSenItem();
AstSenItem* cmpp = nextp;
if (cmpp
&& ((senp->varrefp() && cmpp->varrefp() && senp->varrefp()->sameTree(cmpp->varrefp()))
|| (!senp->varrefp() && !cmpp->varrefp()))) {
// We've sorted in the order ANY, BOTH, POS, NEG, so we don't need to try opposite orders
if (( senp->edgeType()==AstEdgeType::ANYEDGE) // ANY or {BOTH|POS|NEG} -> ANY
|| (senp->edgeType()==AstEdgeType::BOTHEDGE) // BOTH or {POS|NEG} -> BOTH
|| (senp->edgeType()==AstEdgeType::POSEDGE // POS or NEG -> BOTH
&& cmpp->edgeType()==AstEdgeType::NEGEDGE)
|| (senp->edgeType()==cmpp->edgeType()) // Identical edges
) {
// Fix edge of old node
if (senp->edgeType()==AstEdgeType::POSEDGE
&& cmpp->edgeType()==AstEdgeType::NEGEDGE)
senp->edgeType(AstEdgeType::BOTHEDGE);
// Remove redundant node
cmpp->unlinkFrBack()->deleteTree(); cmpp=NULL;
// Try to collapse again
nextp=senp;
}
}
}
// Pass3, remove nevers
if (sensesp()->nextp()) { // Else only one never, can't remove it
for (AstSenItem* senp = sensesp()->castSenItem(); senp; senp=nextp) {
nextp=senp->nextp()->castSenItem();
if (senp->isNever()) {
senp->unlinkFrBack()->deleteTree(); senp=NULL;
}
}
}
//this->dumpTree(cout,"ssou: ");
}
bool AstSenTree::hasClocked() {
if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {

25
src/V3AstNodes.h
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@ -811,7 +811,7 @@ struct AstFuncRef : public AstNodeFTaskRef {
struct AstSenItem : public AstNodeSenItem {
// Parents: SENTREE
// Children: (optional) VARREF
// Children: (optional) VARREF SENGATE
private:
AstEdgeType m_edgeType; // Edge type
public:
@ -861,6 +861,28 @@ public:
bool hasVar() const { return !(isCombo()||isInitial()||isSettle()||isNever()); }
};
struct AstSenGate : public AstNodeSenItem {
// Parents: SENTREE
// Children: SENITEM expr
// AND as applied to a sensitivity list and a gating expression
// Performing this gating is optional; it may be removed by later optimizations
AstSenGate(FileLine* fl, AstSenItem* sensesp, AstNode* rhsp) : AstNodeSenItem(fl) {
width(1,1); addOp1p(sensesp); setOp2p(rhsp);
}
ASTNODE_NODE_FUNCS(SenGate, SENGATE)
virtual string emitVerilog() { return "(%l) && (%r)"; }
AstSenItem* sensesp() const { return op1p()->castSenItem(); }
AstNode* rhsp() const { return op2p()->castNode(); }
void sensesp(AstSenItem* nodep) { addOp1p(nodep); }
void rhsp(AstNode* nodep) { setOp2p(nodep); }
//
virtual bool isClocked() const { return true; }
virtual bool isCombo() const { return false; }
virtual bool isInitial() const { return false; }
virtual bool isSettle() const { return false; }
virtual bool isNever() const { return false; }
};
struct AstSenTree : public AstNode {
// A list of senitems
// Parents: MODULE | SBLOCK
@ -880,7 +902,6 @@ public:
void addSensesp(AstNodeSenItem* nodep) { addOp1p(nodep); }
void multi(bool flag) { m_multi = true; }
// METHODS
void sortSenses(); // Sort senitems in standard way
bool hasClocked(); // Includes a clocked statement
bool hasSettle(); // Includes a SETTLE SenItem
bool hasInitial(); // Includes a INITIAL SenItem

913
src/V3ClkGater.cpp Normal file
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@ -0,0 +1,913 @@
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity active domains
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2008-2008 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
// V3ClkGater's Transformations:
//
// Look for clock gaters
// Note there's overlap between this process and V3Split's
// ALWAYS: Build graph
// IF: Form vertex pointing to any IFs or ALWAYS above
// VARREF: Form vertex pointing to IFs it is under
// ASSIGN: If under normal assignment, disable optimization
// FUTURE OPTIMIZE: If signal is set to itself, consider that OK for gating.
// !splitable: Mark all VARREFs in this statement as comming from it
// Optimize graph so if signal is referenced under multiple IF branches it moves up
// Make ALWAYS for each new gating term, and move statements there
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <algorithm>
#include <vector>
#include "V3Global.h"
#include "V3Ast.h"
#include "V3Stats.h"
#include "V3Graph.h"
#include "V3ClkGater.h"
//######################################################################
// Base for debug
class GaterBaseVisitor : public AstNVisitor {
protected:
//int debug() { return 9; }
};
//######################################################################
// Support classes
class GaterVarVertex;
class GaterVertex : public V3GraphVertex {
static uint32_t s_rankNum;
public:
GaterVertex(V3Graph* graphp)
: V3GraphVertex(graphp) {
s_rankNum++; rank(s_rankNum);
}
virtual ~GaterVertex() {}
virtual int typeNum() const = 0;
static void clearRank() { s_rankNum=0; }
virtual int sortCmp(const V3GraphVertex* rhsp) const;
};
uint32_t GaterVertex::s_rankNum = 0;
class GaterHeadVertex : public GaterVertex {
public:
GaterHeadVertex(V3Graph* graphp)
: GaterVertex(graphp) {}
virtual ~GaterHeadVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return "*HEAD*"; }
virtual string dotColor() const { return "green"; }
};
class GaterPliVertex : public GaterVertex {
public:
GaterPliVertex(V3Graph* graphp)
: GaterVertex(graphp) {}
virtual ~GaterPliVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return "*PLI*"; }
virtual string dotColor() const { return "red"; }
};
class GaterIfVertex : public GaterVertex {
AstNodeIf* m_nodep;
public:
AstNodeIf* nodep() const { return m_nodep; }
GaterIfVertex(V3Graph* graphp, AstNodeIf* nodep)
: GaterVertex(graphp), m_nodep(nodep) { }
virtual ~GaterIfVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return cvtToStr((void*)m_nodep)+" {"+cvtToStr(m_nodep->fileline()->lineno())+"}"; }
};
class GaterVarVertex : public GaterVertex {
AstVarScope* m_nodep;
public:
AstVarScope* nodep() const { return m_nodep; }
GaterVarVertex(V3Graph* graphp, AstVarScope* nodep)
: GaterVertex(graphp), m_nodep(nodep) { }
virtual ~GaterVarVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return nodep()->name(); }
virtual string dotColor() const { return "skyblue"; }
};
//######################################################################
// Edge types
class GaterEdge : public V3GraphEdge {
uint32_t m_ifelse; // True branch of if
public:
// These are used as shift amounts into node's user()
#define VU_DEFINE enum VarUsage { VU_NONE=0, VU_IF=1, VU_ELSE=2, VU_PLI=4, VU_MADE=8}
VU_DEFINE;
uint32_t ifelse() const { return m_ifelse; }
bool ifelseTrue() const { return m_ifelse & VU_IF; }
bool ifelseFalse() const { return m_ifelse & VU_ELSE; }
bool ifelseBoth() const { return ifelseTrue() && ifelseFalse(); }
GaterEdge(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top, uint32_t ifelse)
: V3GraphEdge(graphp, fromp, top, 10, false), m_ifelse(ifelse) {}
virtual ~GaterEdge() {}
virtual string dotColor() const { return ((ifelse() & VU_PLI) ? "red"
: (ifelseBoth() ? "blue"
: (ifelseTrue() ? "green"
: "darkgreen"))); }
virtual int sortCmp(const V3GraphEdge* rEdgep) const {
// Our master sort sorts by edges first, so we don't want to
// consider the upstream vertex::sortCmp when sorting by edges.
// We do want to order by something though; rank works
if (fromp()->rank() < rEdgep->fromp()->rank()) return -1;
if (fromp()->rank() > rEdgep->fromp()->rank()) return 1;
// If same, resolve by ifelse
const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
if (m_ifelse < crEdgep->m_ifelse) return -1;
if (m_ifelse > crEdgep->m_ifelse) return 1;
return 0;
}
};
int GaterVertex::sortCmp(const V3GraphVertex* rhsp) const {
const GaterVertex* crhsp = static_cast<const GaterVertex*>(rhsp);
// We really only care about ordering Var's together, but...
// First put same type together
if (typeNum() < crhsp->typeNum()) return -1;
if (typeNum() > crhsp->typeNum()) return 1;
// If variable, group by same input fanin
// (know they're the same type based on above compare)
if (dynamic_cast<const GaterVarVertex*>(this)) {
// We've already sorted by edges, so just see if same tree
// If this gets too slow, we could compute a hash up front
V3GraphEdge* lEdgep = this->inBeginp();
V3GraphEdge* rEdgep = rhsp->inBeginp();
while (lEdgep && rEdgep) {
const GaterEdge* clEdgep = static_cast<const GaterEdge*>(lEdgep);
const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
if (lEdgep->fromp()->rank() < rEdgep->fromp()->rank()) return -1;
if (lEdgep->fromp()->rank() > rEdgep->fromp()->rank()) return 1;
if (clEdgep->ifelse() < crEdgep->ifelse()) return -1;
if (clEdgep->ifelse() > crEdgep->ifelse()) return 1;
lEdgep = lEdgep->inNextp();
rEdgep = rEdgep->inNextp();
}
if (!lEdgep && !rEdgep) return 0;
return lEdgep ? -1 : 1;
}
// Finally by rank of this vertex
if (rank() < rhsp->rank()) return -1;
if (rank() > rhsp->rank()) return 1;
return 0;
}
//######################################################################
// Check for non-simple gating equations
class GaterCondVisitor : public GaterBaseVisitor {
private:
// RETURN STATE
bool m_isSimple; // Set false when we know it isn't simple
// METHODS
inline void okIterate(AstNode* nodep) {
if (m_isSimple) nodep->iterateChildren(*this);
}
// VISITORS
virtual void visit(AstOr* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstAnd* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstNot* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogOr* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogAnd* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogNot* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstVarRef* nodep, AstNUser*) { okIterate(nodep); }
// Other possibilities are equals, etc
// But, we don't want to get too complicated or it will take too much
// effort to calculate the gater
virtual void visit(AstNode* nodep, AstNUser*) {
m_isSimple = false;
//nodep->iterateChildren(*this);
}
public:
// CONSTUCTORS
GaterCondVisitor(AstNode* nodep) {
m_isSimple = true;
nodep->accept(*this);
}
virtual ~GaterCondVisitor() {}
// PUBLIC METHODS
bool isSimple() const { return m_isSimple; }
};
//######################################################################
// Check for non-simple gating equations
class GaterBodyVisitor : public GaterBaseVisitor {
// NODE STATE
// Input state
// AstVarScope::user2p() -> AstAlways* moving this variable to
enum State {
// This is used as a bitmask
STATE_UNKNOWN=0,
STATE_KEEP=1, // Seen a variable we need, keep this statement
STATE_DELETE=2 // Seen a variable we need, delete this statement
// 3=keep & delete
};
bool m_original; // Deleting original statements, vs deleting new var statements
AstNode* m_exprp; // New gater expression we are building
bool m_cloning; // Clone this object 0=not sure yet, 1=do
uint32_t m_state; // Parsing state
// VISITORS
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->lvalue()) {
AstVarScope* vscp = nodep->varScopep();
if (vscp->user2p()->castNode() == m_exprp) {
// This variable's block needs to move to the new always
if (m_original) {
UINFO(9," VARREF delete in old: "<<nodep<<endl);
m_state |= STATE_DELETE;
} else {
UINFO(9," VARREF stays in new: "<<nodep<<endl);
m_state |= STATE_KEEP;
}
} else {
if (m_original) {
UINFO(9," VARREF other stays in old\n");
m_state |= STATE_KEEP;
} else {
UINFO(9," VARREF other delete in new\n");
m_state |= STATE_DELETE;
}
}
}
}
//virtual void visit(AstNodeIf* nodep, AstNUser*) { ... }
// Not needed, it's the same handling as any other statement. Cool, huh?
// (We may get empty IFs but the constant propagater will rip them up for us)
virtual void visit(AstNodeStmt* nodep, AstNUser*) {
uint32_t oldstate = m_state;
// Find if children want to delete this or not.
// Note children may bicker, and want to both keep and delete (branches on a if)
uint32_t childstate;
{
m_state = STATE_UNKNOWN;
nodep->iterateChildren(*this);
childstate = m_state;
}
m_state = oldstate;
UINFO(9," Did state="<<childstate<<" "<<nodep<<endl);
// Indeterminate (statement with no lvalue), so keep only in original
if (childstate == STATE_UNKNOWN) {
if (m_original) childstate |= STATE_KEEP;
else childstate |= STATE_DELETE;
}
if ((childstate & STATE_DELETE) && !(childstate & STATE_KEEP)) {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
// Pass upwards we did delete
m_state |= STATE_DELETE;
} else {
// Pass upwards we must keep
m_state |= STATE_KEEP;
}
}
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
public:
// CONSTUCTORS
GaterBodyVisitor(AstAlways* nodep, AstNode* exprp, bool original) {
m_exprp = exprp;
m_original = original;
m_state = STATE_UNKNOWN;
if (debug()>=9) nodep->dumpTree(cout," GateBodyIn: ");
nodep->bodysp()->iterateAndNext(*this);
if (debug()>=9) nodep->dumpTree(cout," GateBodyOut: ");
// If there's no statements we shouldn't have had a resulting graph
// vertex asking for this creation
}
virtual ~GaterBodyVisitor() {}
};
//######################################################################
// Create clock gaters
class GaterVisitor : public GaterBaseVisitor {
// NODE STATE
// Cleared on Always
// AstVarScope::user1p() -> GaterVarVertex*
// AstAlways::user4() -> bool. True indicates processed
// Cleared on each new Always
// AstVarScope::user2p() -> AstAlways* moving this variable to
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
AstUser4InUse m_inuser4;
// GRAPH STATE
// Cleared on simplify
// Vertex::user() -> VarUsage: Mark of which if/else edges are hit
// TYPES
VU_DEFINE;
enum MiscConsts {
IF_DEPTH_MAX = 4, // IFs deep we bother to analyze
DOMAINS_MAX = 32 // Clock domains before avoiding O(N^2) blowup
};
// MEMBERS
string m_nonopt; // Reason block is not optimizable
V3Double0 m_statGaters; // Statistic tracking
V3Double0 m_statBits; // Statistic tracking
bool m_directlyUnderAlw; // Immediately under Always or If
int m_ifDepth; // Depth of IF statements
int m_numIfs; // Number of IF statements
V3Graph m_graph; // Scoreboard of var usages/dependencies
GaterPliVertex* m_pliVertexp; // Element specifying PLI ordering
GaterHeadVertex* m_headVertexp; // Top vertex
V3GraphVertex* m_aboveVertexp; // Vertex above this point in tree
uint32_t m_aboveTrue; // Vertex above this point is true branch
AstVarScope* m_stmtVscp; // Current statement had variable assigned
bool m_stmtInPli; // Current statement has PLI
// METHODS
void nonOptimizable(AstNode* nodep, const char* reasonp) {
if (m_nonopt=="") {
UINFO(9," Nonopt: "<<reasonp<<": "<<nodep<<endl);
m_nonopt = reasonp;
}
}
void scoreboardPli(AstNode* nodep) {
// Order all PLI statements with other PLI statements
// This insures $display's and such remain in proper order
// We don't prevent splitting out other non-pli statements, however,
// because it is common to have $uasserts sprinkled about.
if (!m_pliVertexp) {
m_pliVertexp = new GaterPliVertex(&m_graph);
}
if (m_stmtVscp) { // Already saw a variable, be sure to mark it!
GaterVarVertex* varVtxp = (GaterVarVertex*)(m_stmtVscp->user1p());
new GaterEdge(&m_graph, m_pliVertexp, varVtxp, VU_PLI);
}
m_stmtInPli = true; // Mark all followon variables too
}
// METHODS -- GRAPH stuff
void simplifyGraph() {
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_init", false);
// We now have all PLI variables with edges FROM the pli vertex
simplifyPli();
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_pli", false);
// Any vertex that points along both true & false path to variable
// can be simplfied so parent points to that vertex. Any vertex
// that points to a (great...) grandparent of a variable can just
// point to the edge.
m_graph.userClearVertices(); // user() will contain VarUsage
simplifyIfElseRecurse(m_headVertexp);
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_ifelse", false);
m_graph.userClearVertices(); // user() will contain VarUsage
simplifyGrandRecurse(m_headVertexp, 1);
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_grand", false);
simplifyRemoveUngated(m_headVertexp);
// Give all signals with same gating term same color
graphColorSameFeeder();
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_done", false);
}
void simplifyPli() {
// For now, we'll not gate any logic with PLI lvariables in it. In
// the future we may move PLI statements. One way to do so is to
// all below pli VARs to go IfVertex -> PliVertex -> VarVertex then
// they all must get colored the same. There may be a lot of
// duplicated edges to the PLI; they'll need cleanup. All of the
// later optimizations need to deal, and the GaterBodyVisitor needs
// to know how to move them.
if (m_pliVertexp) {
// Follow PLI out edges to find all relevant variables
for (V3GraphEdge* nextp,* edgep = m_pliVertexp->outBeginp(); edgep; edgep = nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
vVxp->unlinkDelete(&m_graph); vVxp=NULL; edgep=NULL;
} else {
m_graph.dump();
v3fatalSrc("PLI vertex points to non-signal");
}
}
m_pliVertexp->unlinkDelete(&m_graph); m_pliVertexp = NULL;
}
}
void simplifyIfElseRecurse(V3GraphVertex* vertexp) {
// From bottom-up, propagate duplicate IF/ELSE branches to grandparent
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
simplifyIfElseRecurse(edgep->top());
}
//UINFO(9,"IERecurse "<<vertexp<<endl);
if (dynamic_cast<GaterIfVertex*>(vertexp)) {
// Clear indications
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
edgep->top()->user(VU_NONE);
}
// Mark nodes on to/from side
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
V3GraphVertex* toVxp = edgep->top();
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
// We may mark this twice in one pass - if so it's duplicated; no worries
if (cedgep->ifelseTrue()) toVxp->user(toVxp->user() | VU_IF);
if (cedgep->ifelseFalse()) toVxp->user(toVxp->user() | VU_ELSE);
//UINFO(9," mark "<<edgep<<" "<<toVxp<<endl);
}
// Any with both IF & ELSE mark get removal mark, and new parent edge
for (V3GraphEdge* nextp,* edgep = vertexp->outBeginp(); edgep; edgep = nextp) {
nextp = edgep->outNextp(); // We may edit the list
V3GraphVertex* toVxp = edgep->top();
//UINFO(9," to "<<toVxp->user()<<" "<<toVxp<<endl);
if ((toVxp->user() & VU_IF) && (toVxp->user() & VU_ELSE)) {
edgep->unlinkDelete(); edgep = NULL;
if (!(toVxp->user() & VU_MADE)) { // Make an edge only once
toVxp->user(toVxp->user() | VU_MADE);
GaterEdge* inedgep = static_cast<GaterEdge*>(vertexp->inBeginp());
V3GraphVertex* grandparent = inedgep->fromp();
new GaterEdge(&m_graph, grandparent, toVxp, inedgep->ifelse());
}
}
}
}
}
void simplifyGrandRecurse(V3GraphVertex* vertexp, uint32_t depth) {
// From top-down delete any vars that grandparents source
// IE A -> B -> C -> VAR
// \----------^
//UINFO(9,"GRecurse "<<depth<<" "<<vertexp<<endl);
// Mark all variables to be swept
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
if (toVxp->user() && toVxp->user() < depth) {
// A recursion "above" us marked it,
// Remove this edge, it's redundant with the upper edge
edgep->unlinkDelete(); edgep=NULL;
} else {
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
if (cedgep->ifelseBoth()) {
toVxp->user(depth);
}
}
}
}
// Recurse
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
simplifyGrandRecurse(edgep->top(), depth+1);
}
// Clean our marks
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
V3GraphVertex* toVxp = edgep->top();
if (toVxp->user() && toVxp->user() < depth) { // A recursion "above" us marked it; don't mess with it
} else {
toVxp->user(0); // We marked it originally, so unmark now
}
}
// Delete any If nodes with no children
// Last, as want bottom-up cleanup
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterIfVertex* toVxp = dynamic_cast<GaterIfVertex*>(edgep->top())) {
if (!toVxp->outBeginp()) {
if (!nextp || nextp->top() != edgep->top()) { // Else next would disappear; we'll do it next loop
toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
}
}
}
}
}
void simplifyRemoveUngated(V3GraphVertex* vertexp) {
// Remove variables that are ungated
// At this point, any variable under the head is ungated
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
if (!nextp || nextp->top() != edgep->top()) { // Else next would disappear; we'll do it next loop
toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
}
}
}
}
void graphColorSameFeeder() {
// Assign same color to all destination vertices that have same
// subgraph feeding into them
// (I.E. all "from" nodes are common within each color)
// We could hash, but instead it's faster to sort edges, so we know
// the same edge list is always adjacent. The result is a
// O(vertices*edges) loop, but we'd need that to hash too.
if (debug()>9) { cout<<"PreColor:\n"; m_graph.dump(); }
m_graph.sortEdges();
// Now sort vertices, so same inbound edge set ends up adjacent
m_graph.sortVertices();
// Now walk and assign colors; same color is adjacent
m_graph.clearColors();
m_graph.userClearEdges(); // Used by newExprFromGraph
uint32_t color = 1;
GaterVarVertex* lastVxp = NULL;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (!vVxp->inBeginp()) {
// At this point, any variable not linked is an error
// (It should have at least landed under the Head node)
vVxp->nodep()->v3fatalSrc("Variable became stranded in clk gate detection\n");
}
if (!lastVxp || vVxp->sortCmp(lastVxp)) {
// Different sources for this new node
color++;
}
vVxp->color(color);
lastVxp = vVxp;
}
}
if (debug()>9) { cout<<"PostColor:\n"; m_graph.dump(); }
}
AstNode* newExprFromGraph(GaterVarVertex* vertexp) {
// Recurse backwards, then form equation on return path
// We could use user()!=0, but zeroing it is slow, so instead we'll mark with a generation
// We get equations like "a | (!a & b)" which obviously could be reduced here,
// instead out of generality, there's a V3Const::matchOrAndNot that'll clean it up
static uint32_t s_generation = 0;
++s_generation;
nafgMarkRecurse(vertexp, s_generation);
AstNode* nodep = nafgCreateRecurse(m_headVertexp, s_generation);
if (debug()>=9) nodep->dumpTree(cout," GateExpr: ");
return nodep;
}
void nafgMarkRecurse(V3GraphVertex* vertexp, uint32_t generation) {
// Backwards mark user() on the path we recurse
//UINFO(9," nafgMark: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
//UINFO(9," nafgMark: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
edgep->user(generation);
nafgMarkRecurse(edgep->fromp(), generation);
}
}
AstNode* nafgCreateRecurse(V3GraphVertex* vertexp, uint32_t generation) {
// Forewards follow user() marked previously and build tree
AstNode* nodep = NULL;
// OR across all edges found at this level
//UINFO(9," nafgEnter: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
if (edgep->user() == generation) {
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
AstNode* eqnp = NULL;
//UINFO(9," nafgFollow: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
if (dynamic_cast<GaterHeadVertex*>(edgep->fromp())) {
// Just OR in all lower terms
eqnp = nafgCreateRecurse(edgep->top(), generation);
} else if (GaterIfVertex* cVxp = dynamic_cast<GaterIfVertex*>(edgep->fromp())) {
// Edges from IFs represent a real IF branch in the equation tree
//UINFO(9," ifver "<<(void*)(edgep)<<" cc"<<edgep->dotColor()<<endl);
eqnp = cVxp->nodep()->condp()->cloneTree(true);
if (eqnp && cedgep->ifelseFalse()) {
eqnp = new AstNot(eqnp->fileline(),eqnp);
}
// We need to AND this term onto whatever was found below it
AstNode* belowp = nafgCreateRecurse(edgep->top(), generation);
if (belowp) eqnp = new AstAnd(eqnp->fileline(),eqnp,belowp);
}
// Top level we could choose to make multiple gaters, or ORs under the gater
// Right now we'll put OR lower down and let other optimizations deal
if (nodep) nodep = new AstOr(eqnp->fileline(),nodep,eqnp);
else nodep = eqnp;
//if (debug()>=9) nodep->dumpTree(cout," followExpr: ");
}
}
//UINFO(9," nafgExit: "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
return nodep;
}
void newAlwaysTrees(AstAlways* nodep) {
// Across all variables we're moving
uint32_t lastColor = 0;
AstNode* lastExprp = NULL;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (!lastExprp || lastColor != vVxp->color()) {
lastColor = vVxp->color();
// Create the block we've just finished
if (lastExprp) newAlwaysTree(nodep, lastExprp); // Duplicate below
// New expression for this color
lastExprp = newExprFromGraph(vVxp);
}
// Mark variable to move
if (vVxp->nodep()->user2p()) vVxp->nodep()->v3fatalSrc("One variable got marked under two gaters");
vVxp->nodep()->user2p(lastExprp);
m_statBits += vVxp->nodep()->width(); // Moving a wide bus counts more!
// There shouldn't be two possibilities we want to
// move to, IE {A,B} <= Z because we marked such
// things as unoptimizable
}
}
// Create the final block we've just finished
if (lastExprp) newAlwaysTree(nodep, lastExprp); // Duplicate above
}
void newAlwaysTree(AstAlways* nodep, AstNode* exprp) {
// Create new always with specified gating expression
// Relevant vars are already marked with user2p
// Should we put the gater under the always itself,
// or make a new signal?
// New signal: May cause replicated logic until we can combine
// Need way to toggle signal on complicated pos/negedge
// Under Always: More complicated, may not propagate logic with gateer
// Untill we get better gate optimization, we'll go this route.
//#define GATER_NOP
#ifdef GATER_NOP
// For testing only, don't clock gate but still make new always
AstSenTree* sensesp = nodep->sensesp()->cloneTree(true);
#else
// Make a SenGate
AstSenItem* oldsenitemsp = nodep->sensesp()->sensesp()->castSenItem();
if (!oldsenitemsp) nodep->v3fatalSrc("SenTree doesn't have any SenItem under it");
AstSenTree* sensesp = new AstSenTree(nodep->fileline(),
new AstSenGate(nodep->fileline(),
oldsenitemsp->cloneTree(true),
exprp));
#endif
// Make new body; note clone will preserve user2p() indicating moving vars
AstNode* bodyp = nodep->bodysp()->cloneTree(true);
AstAlways* alwp = new AstAlways(nodep->fileline(),
sensesp,
bodyp);
alwp->user4(1); // No need to process the new always again!
nodep->addNextHere(alwp);
// Blow moved statements from old body
GaterBodyVisitor(nodep,exprp,true);
// Blow old statements from new body
GaterBodyVisitor(alwp,exprp,false);
m_statGaters++;
if (debug()>=9) alwp->dumpTree(cout," new: ");
}
// VISITORS
virtual void visit(AstAlways* nodep, AstNUser*) {
if (debug()>=9) cout<<endl<<endl<<endl;
UINFO(5, "Gater: ALWAYS: "<<nodep<<endl);
if (nodep->user4()) return;
nodep->user4(1);
clear();
if (debug()>=9) nodep->dumpTree(cout," Alwin: ");
// Look for constructs we can't optimize
// Form graph with Vertices at each IF, and each Variable
m_aboveTrue = VU_IF | VU_ELSE;
iterateChildrenAlw(nodep, true);
// Other reasons to not optimize
if (!m_numIfs) nonOptimizable(nodep, "No if statements");
// Something to optimize, oh my!
if (m_nonopt!="") {
UINFO(5, " Gater non-opt: "<<m_nonopt<<endl);
} else {
// Process it
simplifyGraph();
// See how much moves
uint32_t lastColor = 0;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (lastColor < vVxp->color()) {
lastColor = vVxp->color();
}
}
}
if (lastColor == 0) { // Nothing we moved!
nonOptimizable(nodep, "Nothing moved");
}
else if (lastColor > DOMAINS_MAX) {
// Our move algorithm is fairly slow and if we're splitting
// up too much it'll get really nasty. It's probably a bad
// move for performance to split too much, anyhow, as the
// number of gaters will result in calling many small c functions.
nonOptimizable(nodep, "Too much moved");
}
if (m_nonopt=="") {
newAlwaysTrees(nodep);
if (debug()>=9) nodep->dumpTree(cout," Gaterout: ");
}
}
UINFO(5, " Gater done"<<endl);
}
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->lvalue()) {
AstVarScope* vscp = nodep->varScopep();
if (nodep->varp()->isSigPublic()) {
// Public signals shouldn't be changed, pli code might be messing with them
scoreboardPli(nodep);
}
// If another lvalue in this node, give up optimizing.
// We could just not optimize this variable, but we've already marked the
// other variable as optimizable, so we can instead pretend it's a PLI node.
if (m_stmtVscp) {
UINFO(5, " Multiple lvalues in one statement: "<<nodep<<endl);
scoreboardPli(nodep); // This will set m_stmtInPli
}
m_stmtVscp = vscp;
// Find, or make new Vertex
GaterVarVertex* vertexp = (GaterVarVertex*)(vscp->user1p());
if (!vertexp) {
vertexp = new GaterVarVertex(&m_graph, vscp);
vscp->user1p(vertexp);
}
new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
if (m_stmtInPli) {
new GaterEdge(&m_graph, m_pliVertexp, vertexp, VU_PLI);
}
}
}
virtual void visit(AstNodeIf* nodep, AstNUser*) {
m_ifDepth++;
bool allowGater = m_directlyUnderAlw && m_ifDepth <= IF_DEPTH_MAX;
if (allowGater) {
GaterCondVisitor condVisitor(nodep->condp());
if (!condVisitor.isSimple()) {
// Don't clear optimization, simply drop this IF as part of the gating
UINFO(5," IFnon-simple-condition: "<<nodep<<endl);
allowGater = false;
}
}
if (!allowGater) {
// IF burried under something complicated
iterateChildrenAlw(nodep, true);
} else {
UINFO(5, " IF: "<<nodep<<endl);
m_numIfs++;
// Recurse to next level of if.
V3GraphVertex* lastabovep = m_aboveVertexp;
uint32_t lasttrue = m_aboveTrue;
GaterIfVertex* vertexp = new GaterIfVertex(&m_graph, nodep);
new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
{
nodep->condp()->iterateAndNext(*this); // directlyUnder stays as-is
}
{
m_aboveVertexp = vertexp; // Vars will point at this edge
m_aboveTrue = VU_IF;
nodep->ifsp()->iterateAndNext(*this); // directlyUnder stays as-is (true)
}
{
m_aboveVertexp = vertexp; // Vars will point at this edge
m_aboveTrue = VU_ELSE;
nodep->elsesp()->iterateAndNext(*this); // directlyUnder stays as-is (true)
}
m_aboveVertexp = lastabovep;
m_aboveTrue = lasttrue;
}
m_ifDepth--;
}
virtual void visit(AstAssignDly* nodep, AstNUser*) {
// iterateChildrenAlw will detect this is a statement for us
iterateChildrenAlw(nodep, false);
}
virtual void visit(AstNodeAssign* nodep, AstNUser*) {
// Note NOT AssignDly; handled above, We'll just mark this block as
// not optimizable.
//
// A future alternative is to look for any lvalues that are also
// variables in the sensitivity list, or rvalues in this block. If
// any hit, disable optimization. Unlikely to be useful (For loops
// being an exception, but they're already unrolled.)
nonOptimizable(nodep, "Non-delayed assignment");
// No reason to iterate.
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
if (!nodep->isClocked()) {
nonOptimizable(nodep, "Non-clocked sensitivity");
}
iterateChildrenAlw(nodep, false);
}
//--------------------
virtual void visit(AstNode* nodep, AstNUser*) {
if (m_nonopt=="") { // Else accelerate
iterateChildrenAlw(nodep, false);
}
}
inline void iterateChildrenAlw(AstNode* nodep, bool under) {
// **** USE THIS INSTEAD OF iterateChildren!
// Note If visitor doesn't call here; does it its own way
bool lastdua = m_directlyUnderAlw;
AstVarScope* lastvscp = m_stmtVscp;
bool lastpli = m_stmtInPli;
m_directlyUnderAlw = under;
if (nodep->castNodeStmt()) { // Restored below
UINFO(9," Stmt: "<<nodep<<endl);
m_stmtVscp = NULL;
m_stmtInPli = false;
}
if (!nodep->isSplittable()) {
// May also be a new statement (above if); if so we mark it immediately
UINFO(9," NotSplittable "<<nodep<<endl);
scoreboardPli(nodep);
}
{
nodep->iterateChildren(*this);
}
m_directlyUnderAlw = lastdua;
if (nodep->castNodeStmt()) { // Reset what set above; else propagate up to above statement
m_stmtVscp = lastvscp;
m_stmtInPli = lastpli;
}
}
public:
// CONSTUCTORS
GaterVisitor(AstNode* nodep) {
// AstAlways visitor does the real work, so most zeroing needs to be in clear()
clear();
nodep->accept(*this);
}
void clear() {
m_nonopt = "";
m_directlyUnderAlw = false;
m_ifDepth = 0;
m_numIfs = 0;
AstNode::user1ClearTree();
AstNode::user2ClearTree();
// Prepare graph
m_graph.clear();
GaterVertex::clearRank();
m_pliVertexp = NULL;
m_headVertexp = new GaterHeadVertex(&m_graph);
m_aboveVertexp = m_headVertexp;
m_aboveTrue = false;
m_stmtVscp = NULL;
m_stmtInPli = false;
}
virtual ~GaterVisitor() {
V3Stats::addStat("Optimizations, Gaters inserted", m_statGaters);
V3Stats::addStat("Optimizations, Gaters impacted bits", m_statBits);
}
};
//######################################################################
// Active class functions
void V3ClkGater::clkGaterAll(AstNetlist* nodep) {
UINFO(2,__FUNCTION__<<": "<<endl);
// While the gater does well at some modules, it seems to slow down many others
UINFO(5,"ClkGater is disabled due to performance issues\n");
//GaterVisitor visitor (nodep);
}

36
src/V3ClkGater.h Normal file
View File

@ -0,0 +1,36 @@
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into clock gated blocks
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
#ifndef _V3CLKGATER_H_
#define _V3CLKGATER_H_ 1
#include "config_build.h"
#include "verilatedos.h"
#include "V3Error.h"
#include "V3Ast.h"
//============================================================================
class V3ClkGater {
public:
static void clkGaterAll(AstNetlist* nodep);
};
#endif // Guard

15
src/V3Clock.cpp
View File

@ -151,12 +151,21 @@ private:
}
return newp;
}
AstNode* createSenseEquation(AstSenTree* nodep) {
AstNode* createSenGateEquation(AstSenGate* nodep) {
AstNode* newp = new AstAnd(nodep->fileline(),
createSenseEquation(nodep->sensesp()),
nodep->rhsp()->cloneTree(true));
return newp;
}
AstNode* createSenseEquation(AstNodeSenItem* nodesp) {
// Nodep may be a list of elements; we need to walk it
AstNode* senEqnp = NULL;
for (AstNodeSenItem* senp = nodep->sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
for (AstNodeSenItem* senp = nodesp; senp; senp=senp->nextp()->castNodeSenItem()) {
AstNode* senOnep = NULL;
if (AstSenItem* itemp = senp->castSenItem()) {
senOnep = createSenItemEquation(itemp);
} else if (AstSenGate* itemp = senp->castSenGate()) {
senOnep = createSenGateEquation(itemp);
} else {
senp->v3fatalSrc("Strange node under sentree");
}
@ -170,7 +179,7 @@ private:
return senEqnp;
}
AstIf* makeActiveIf(AstSenTree* sensesp) {
AstNode* senEqnp = createSenseEquation(sensesp);
AstNode* senEqnp = createSenseEquation(sensesp->sensesp());
if (!senEqnp) sensesp->v3fatalSrc("No sense equation, shouldn't be in sequent activation.");
AstIf* newifp = new AstIf (sensesp->fileline(),
senEqnp, NULL, NULL);

206
src/V3Const.cpp
View File

@ -91,7 +91,7 @@ public:
class ConstVisitor : public AstNVisitor {
private:
// NODE STATE
// ** only when m_warn is set. If state is needed other times,
// ** only when m_warn/m_expensive is set. If state is needed other times,
// ** must track down everywhere V3Const is called and make sure no overlaps.
// AstVar::user4p -> Used by ConstVarMarkVisitor/ConstVarFindVisitor
@ -101,6 +101,7 @@ private:
bool m_wremove; // Inside scope, no assignw removal
bool m_warn; // Output warnings
bool m_cpp; // C++ conversions only
bool m_expensive; // Enable computationally expensive optimizations
AstModule* m_modp; // Current module
AstNode* m_scopep; // Current scope
//int debug() { return 9; }
@ -170,6 +171,31 @@ private:
&& lp->type()==rp->type()
&& operandsSame(lp->lhsp(),rp->lhsp()));
}
static bool matchOrAndNot(AstNodeBiop* nodep) {
// AstOr{$a, AstAnd{AstNot{$b}, $c}} if $a.width1, $a==$b => AstOr{$a,$c}
// Someday we'll sort the biops completely and this can be simplified
// This often results from our simplified clock generation:
// if (rst) ... else if (enable)... -> OR(rst,AND(!rst,enable))
AstNode* ap;
AstNodeBiop* andp;
if (nodep->lhsp()->castAnd()) { andp=nodep->lhsp()->castAnd(); ap=nodep->rhsp(); }
else if (nodep->rhsp()->castAnd()) { andp=nodep->rhsp()->castAnd(); ap=nodep->lhsp(); }
else return false;
AstNodeUniop* notp;
AstNode* cp;
if (andp->lhsp()->castNot()) { notp=andp->lhsp()->castNot(); cp=andp->rhsp(); }
else if (andp->rhsp()->castNot()) { notp=andp->rhsp()->castNot(); cp=andp->lhsp(); }
else return false;
AstNode* bp = notp->lhsp();
if (!operandsSame(ap, bp)) return false;
// Do it
cp->unlinkFrBack();
andp->unlinkFrBack()->deleteTree(); andp=NULL; notp=NULL;
// Replace whichever branch is now dangling
if (nodep->rhsp()) nodep->lhsp(cp);
else nodep->rhsp(cp);
return true;
}
static bool operandShiftSame(AstNode* nodep) {
AstNodeBiop* np = nodep->castNodeBiop();
{
@ -1034,19 +1060,26 @@ private:
} else nodep->v3fatalSrc("Missing ATTR type case\n");
}
}
bool onlySenItemInSenTree(AstNodeSenItem* nodep) {
// Only one if it's not in a list
return (!nodep->nextp() && nodep->backp()->nextp() != nodep);
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (nodep->sensp()->castConst()
|| (nodep->varrefp() && nodep->varrefp()->varp()->isParam())) {
// Constants in sensitivity lists may be removed (we'll simplify later)
AstSenItem* newp;
if (nodep->isClocked()) { // A constant can never get a pos/negexge
newp = new AstSenItem(nodep->fileline(), AstSenItem::Never());
if (onlySenItemInSenTree(nodep)) {
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Never()));
nodep->deleteTree(); nodep=NULL;
} else {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
}
} else { // Otherwise it may compute a result that needs to settle out
newp = new AstSenItem(nodep->fileline(), AstSenItem::Combo());
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Combo()));
nodep->deleteTree(); nodep=NULL;
}
nodep->replaceWith(newp);
nodep->deleteTree(); nodep=NULL;
} else if (nodep->sensp()->castNot()) {
// V3Gate may propagate NOTs into clocks... Just deal with it
AstNode* sensp = nodep->sensp();
@ -1066,6 +1099,150 @@ private:
if (nodep->hasVar() && !nodep->varrefp()) nodep->v3fatalSrc("Null sensitivity variable");
}
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (AstConst* constp = nodep->rhsp()->castConst()) {
if (constp->isZero()) {
UINFO(4,"SENGATE(...,0)->NEVER"<<endl);
if (onlySenItemInSenTree(nodep)) {
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Never()));
nodep->deleteTree(); nodep=NULL;
} else {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
}
} else {
UINFO(4,"SENGATE(SENITEM,0)->ALWAYS SENITEM"<<endl);
AstNode* senitemp = nodep->sensesp()->unlinkFrBack();
nodep->replaceWith(senitemp);
nodep->deleteTree(); nodep=NULL;
}
}
}
struct SenItemCmp {
inline bool operator () (AstNodeSenItem* lhsp, AstNodeSenItem* rhsp) const {
if (lhsp->type() < rhsp->type()) return true;
if (lhsp->type() > rhsp->type()) return false;
const AstSenItem* litemp = lhsp->castSenItem();
const AstSenItem* ritemp = rhsp->castSenItem();
if (litemp && ritemp) {
// Looks visually better if we keep sorted by name
if (litemp->edgeType() < ritemp->edgeType()) return true;
if (litemp->edgeType() > ritemp->edgeType()) return false;
if (!litemp->varrefp() && ritemp->varrefp()) return true;
if ( litemp->varrefp() && !ritemp->varrefp()) return false;
if (litemp->varrefp() && ritemp->varrefp()) {
if (litemp->varrefp()->name() < ritemp->varrefp()->name()) return true;
if (litemp->varrefp()->name() > ritemp->varrefp()->name()) return false;
// But might be same name with different scopes
if (litemp->varrefp()->varScopep() < ritemp->varrefp()->varScopep()) return true;
if (litemp->varrefp()->varScopep() > ritemp->varrefp()->varScopep()) return false;
}
}
return false;
}
};
virtual void visit(AstSenTree* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (m_expensive) {
//cout<<endl; nodep->dumpTree(cout,"ssin: ");
// Optimize ideas for the future:
// SENTREE(... SENGATE(x,a), SENGATE(SENITEM(x),b) ...) => SENGATE(x,OR(a,b))
// SENTREE(... SENITEM(x), SENGATE(SENITEM(x),*) ...) => SENITEM(x)
// Do we need the SENITEM's to be identical? No because we're
// ORing between them; we just need to insure that the result is at
// least as frequently activating. So we simply
// SENGATE(SENITEM(x)) -> SENITEM(x), then let it collapse with the
// other SENITEM(x).
{
AstUser4InUse m_inuse4;
// Mark x in SENITEM(x)
for (AstNodeSenItem* senp = nodep->sensesp()->castNodeSenItem();
senp; senp=senp->nextp()->castNodeSenItem()) {
if (AstSenItem* itemp = senp->castSenItem()) {
if (itemp->varrefp() && itemp->varrefp()->varScopep()) {
itemp->varrefp()->varScopep()->user4(1);
}
}
}
// Find x in SENTREE(SENITEM(x))
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
if (AstSenGate* gatep = senp->castSenGate()) {
if (AstSenItem* itemp = gatep->sensesp()->castSenItem()) {
if (itemp->varrefp() && itemp->varrefp()->varScopep()) {
if (itemp->varrefp()->varScopep()->user4()) {
// Found, push this item up to the top
itemp->unlinkFrBack();
nodep->addSensesp(itemp);
gatep->unlinkFrBack()->deleteTree(); gatep=NULL; senp=NULL;
}
}
}
}
}
}
// Sort the sensitivity names so "posedge a or b" and "posedge b or a" end up together.
// Also, remove duplicate assignments, and fold POS&NEGs into ANYEDGEs
// Make things a little faster; check first if we need a sort
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
SenItemCmp cmp;
if (nextp && !cmp(senp, nextp)) {
// Something's out of order, sort it
senp = NULL;
vector<AstNodeSenItem*> vec;
for (AstNodeSenItem* senp = nodep->sensesp()->castNodeSenItem(); senp; senp=senp->nextp()->castNodeSenItem()) {
vec.push_back(senp);
}
sort(vec.begin(), vec.end(), SenItemCmp());
for (vector<AstNodeSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
(*it)->unlinkFrBack();
}
for (vector<AstNodeSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
nodep->addSensesp(*it);
}
break;
}
}
// Pass2, remove dup edges
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
AstNodeSenItem* cmpp = nextp;
AstSenItem* litemp = senp->castSenItem();
AstSenItem* ritemp = cmpp->castSenItem();
if (litemp && ritemp) {
if (litemp->varrefp() && ritemp->varrefp() && litemp->varrefp()->sameTree(ritemp->varrefp())
|| (!litemp->varrefp() && !ritemp->varrefp())) {
// We've sorted in the order ANY, BOTH, POS, NEG, so we don't need to try opposite orders
if (( litemp->edgeType()==AstEdgeType::ANYEDGE) // ANY or {BOTH|POS|NEG} -> ANY
|| (litemp->edgeType()==AstEdgeType::BOTHEDGE) // BOTH or {POS|NEG} -> BOTH
|| (litemp->edgeType()==AstEdgeType::POSEDGE // POS or NEG -> BOTH
&& ritemp->edgeType()==AstEdgeType::NEGEDGE)
|| (litemp->edgeType()==ritemp->edgeType()) // Identical edges
) {
// Fix edge of old node
if (litemp->edgeType()==AstEdgeType::POSEDGE
&& ritemp->edgeType()==AstEdgeType::NEGEDGE)
litemp->edgeType(AstEdgeType::BOTHEDGE);
// Remove redundant node
ritemp->unlinkFrBack()->deleteTree(); ritemp=NULL; cmpp=NULL;
// Try to collapse again
nextp=litemp;
}
}
}
}
//nodep->dumpTree(cout,"ssou: ");
}
}
//-----
// Zero elimination
@ -1456,6 +1633,7 @@ private:
// Common two-level operations that can be simplified
TREEOP ("AstAnd {$lhsp.castOr, $rhsp.castOr, operandAndOrSame(nodep)}", "replaceAndOr(nodep)");
TREEOP ("AstOr {$lhsp.castAnd,$rhsp.castAnd,operandAndOrSame(nodep)}", "replaceAndOr(nodep)");
TREEOP ("AstOr {matchOrAndNot(nodep)}", "DONE");
TREEOP ("AstAnd {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstOr {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstXor {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
@ -1503,8 +1681,11 @@ private:
public:
// CONSTUCTORS
ConstVisitor(bool params, bool required, bool warn, bool cpp) {
m_params = params; m_required = required; m_warn=warn; m_cpp=cpp;
ConstVisitor(bool params, bool expensive, bool warn, bool cpp) {
m_params = params; m_required = params;
m_expensive = expensive;
m_warn = warn;
m_cpp = cpp;
m_wremove = true;
m_modp = NULL;
m_scopep = NULL;
@ -1525,7 +1706,7 @@ void V3Const::constifyParam(AstNode* nodep) {
V3Width::widthParams(nodep);
V3Signed::signedParams(nodep);
}
ConstVisitor visitor (true,true,false,false);
ConstVisitor visitor (true,false,false,false);
visitor.main(nodep);
// Because we do edits, nodep links may get trashed and core dump this.
//if (debug()>0) nodep->dumpTree(cout," forceConDONE: ");
@ -1534,7 +1715,7 @@ void V3Const::constifyParam(AstNode* nodep) {
void V3Const::constifyAll(AstNetlist* nodep) {
// Only call from Verilator.cpp, as it uses user#'s
UINFO(2,__FUNCTION__<<": "<<endl);
ConstVisitor visitor (false,false,false,false);
ConstVisitor visitor (false,true,false,false);
visitor.main(nodep);
}
@ -1555,3 +1736,8 @@ void V3Const::constifyTree(AstNode* nodep) {
ConstVisitor visitor (false,false,false,false);
visitor.main(nodep);
}
void V3Const::constifyTreeExpensive(AstNode* nodep) {
ConstVisitor visitor (false,true,false,false);
visitor.main(nodep);
}

2
src/V3Const.h
View File

@ -40,6 +40,8 @@ public:
static void constifyCpp(AstNetlist* nodep);
// Only the current node and lower
static void constifyTree(AstNode* nodep);
// Only the current node and lower, with special SenTree optimization
static void constifyTreeExpensive(AstNode* nodep);
};
#endif // Guard

9
src/V3EmitV.cpp
View File

@ -119,12 +119,17 @@ class EmitVBaseVisitor : public EmitCBaseVisitor {
virtual void visit(AstSenTree* nodep, AstNUser*) {
// AstSenItem is called for dumping in isolation by V3Order
putbs("@(");
nodep->iterateChildren(*this);
for (AstNode* expp=nodep->sensesp(); expp; expp = expp->nextp()) {
nodep->iterateChildren(*this);
if (expp->nextp()) puts(" or ");
}
puts(")");
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
emitVerilogFormat(nodep, nodep->emitVerilog(), nodep->sensesp(), nodep->rhsp());
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
putbs("");
if (!nodep->backp()->castSenTree()) puts(" or ");
puts(nodep->edgeType().verilogKwd());
if (nodep->sensp()) puts(" ");
nodep->iterateChildren(*this);

15
src/V3Gate.cpp
View File

@ -355,11 +355,22 @@ private:
virtual void visit(AstCFunc* nodep, AstNUser*) {
iterateNewStmt(nodep, "User C Function", "User C Function");
}
virtual void visit(AstNodeSenItem* nodep, AstNUser*) {
virtual void visit(AstSenItem* nodep, AstNUser*) {
// Note we look at only AstSenItems, not AstSenGate's
// The gating term of a AstSenGate is normal logic
m_inSenItem = true;
iterateNewStmt(nodep, NULL, NULL);
if (m_logicVertexp) { // Already under logic; presumably a SenGate
nodep->iterateChildren(*this);
} else { // Standalone item, probably right under a SenTree
iterateNewStmt(nodep, NULL, NULL);
}
m_inSenItem = false;
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
// First handle the clock part will be handled in a minute by visit AstSenItem
// The logic gating term is delt with as logic
iterateNewStmt(nodep, "Clock gater", "Clock gater");
}
virtual void visit(AstInitial* nodep, AstNUser*) {
bool lastslow = m_inSlow;
m_inSlow = true;

3
src/V3LinkResolve.cpp
View File

@ -162,6 +162,9 @@ private:
nodep->v3error("Unsupported: Complex statement in sensitivity list");
}
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
nodep->v3fatalSrc("SenGates shouldn't be in tree yet");
}
void iterateSelTriop(AstNodePreSel* nodep) {
nodep->iterateChildren(*this);

2
src/V3Options.cpp
View File

@ -642,6 +642,7 @@ void V3Options::parseOptsList(FileLine* fl, int argc, char** argv) {
case 'b': m_oCombine = flag; break;
case 'c': m_oConst = flag; break;
case 'e': m_oCase = flag; break;
case 'f': m_oFlopGater = flag; break;
case 'g': m_oGate = flag; break;
case 'i': m_oInline = flag; break;
case 'k': m_oSubstConst = flag; break;
@ -926,6 +927,7 @@ void V3Options::optimize(int level) {
m_oCombine = flag;
m_oConst = flag;
m_oExpand = flag;
m_oFlopGater = flag;
m_oGate = flag;
m_oInline = flag;
m_oLife = flag;

7
src/V3Order.cpp
View File

@ -107,6 +107,7 @@
#include "V3SenTree.h"
#include "V3Stats.h"
#include "V3EmitCBase.h"
#include "V3Const.h"
#include "V3Order.h"
#include "V3OrderGraph.h"
@ -246,6 +247,8 @@ private:
// Ordering (user3/4/5 cleared between forming and ordering)
// AstScope::user1p() -> AstModule*. Module this scope is under
// AstModule::user3() -> Number of routines created
// Each call to V3Const::constify
// AstNode::user4() Used by V3Const::constify, called below
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
AstUser3InUse m_inuser3;
@ -1088,7 +1091,7 @@ void OrderVisitor::processDomainsIterate(OrderEitherVertex* vertexp) {
AstNodeSenItem* newtree2p = fromVertexp->domainp()->sensesp()->cloneTree(true);
if (!newtree2p) fromVertexp->domainp()->v3fatalSrc("No senitem found under clocked domain");
newtreep->addSensesp(newtree2p);
newtreep->sortSenses(); // Remove duplicates
V3Const::constifyTreeExpensive(newtreep); // Remove duplicates
newtreep->multi(true); // Comment that it was made from 2 clock domains
domainp = m_finder.getSenTree(domainp->fileline(), newtreep);
if (ddebug) {
@ -1140,7 +1143,7 @@ void OrderVisitor::processEdgeReport() {
else if (dynamic_cast<OrderVarSettleVertex*>(itp)) name += " {STL}";
ostringstream os;
os.setf(ios::left);
os<<" "<<setw(50)<<name<<" ";
os<<" "<<(void*)(vvertexp->varScp())<<" "<<setw(50)<<name<<" ";
AstSenTree* sentreep = vvertexp->domainp();
if (sentreep) V3EmitV::verilogForTree(sentreep, os);
report.push_back(os.str());

8
src/Verilator.cpp
View File

@ -33,6 +33,7 @@
#include "V3Cast.h"
#include "V3Changed.h"
#include "V3Clean.h"
#include "V3ClkGater.h"
#include "V3Clock.h"
#include "V3Combine.h"
#include "V3Const.h"
@ -291,6 +292,13 @@ void process () {
v3Global.checkTree();
v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("const.tree"));
// Detect clock enables and mode into sensitives, and split always based on clocks
// (so this is a good prelude to splitAlways.)
if (v3Global.opt.oFlopGater()) {
V3ClkGater::clkGaterAll(v3Global.rootp());
v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("clkgater.tree"));
}
// Move assignments/sensitives into a SBLOCK for each unique sensitivity list
// (May convert some ALWAYS to combo blocks, so should be before V3Gate step.)
V3Active::activeAll(v3Global.rootp());

23
test_regress/t/t_clk_gater.pl Executable file
View File

@ -0,0 +1,23 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
compile (
v_flags2 => ["--stats"],
);
execute (
check_finished=>1,
);
if ($Self->{v3}) {
#Optimization is disabled
#file_grep ($Self->{stats}, qr/Optimizations, Gaters inserted\s+3/i);
}
ok(1);
1;

159
test_regress/t/t_clk_gater.v Normal file
View File

@ -0,0 +1,159 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2008 by Wilson Snyder.
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
integer cyc=0;
reg [63:0] crc;
reg [63:0] sum;
reg reset;
reg enable;
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
wire [31:0] out; // From test of Test.v
// End of automatics
// Take CRC data and apply to testblock inputs
wire [31:0] in = crc[31:0];
Test test (/*AUTOINST*/
// Outputs
.out (out[31:0]),
// Inputs
.clk (clk),
.reset (reset),
.enable (enable),
.in (in[31:0]));
wire [63:0] result = {32'h0, out};
// Test loop
always @ (posedge clk) begin
`ifdef TEST_VERBOSE
$write("[%0t] cyc==%0d crc=%x result=%x\n",$time, cyc, crc, result);
`endif
cyc <= cyc + 1;
crc <= {crc[62:0], crc[63]^crc[2]^crc[0]};
sum <= result ^ {sum[62:0],sum[63]^sum[2]^sum[0]};
reset <= (cyc < 5);
enable <= cyc[4] || (cyc < 2);
if (cyc==0) begin
// Setup
crc <= 64'h5aef0c8d_d70a4497;
end
else if (cyc<10) begin
sum <= 64'h0;
end
else if (cyc<90) begin
end
else if (cyc==99) begin
$write("[%0t] cyc==%0d crc=%x sum=%x\n",$time, cyc, crc, sum);
if (crc !== 64'hc77bb9b3784ea091) $stop;
`define EXPECTED_SUM 64'h01e1553da1dcf3af
if (sum !== `EXPECTED_SUM) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
end
endmodule
module Test (/*AUTOARG*/
// Outputs
out,
// Inputs
clk, reset, enable, in
);
input clk;
input reset;
input enable;
input [31:0] in;
output [31:0] out;
// No gating
reg [31:0] d10;
always @(posedge clk) begin
d10 <= in;
end
reg displayit;
`ifdef verilator
initial displayit = $c1("0"); // Something that won't optimize away
`else
initial displayit = '0;
`endif
// Obvious gating + PLI
reg [31:0] d20;
always @(posedge clk) begin
if (enable) begin
d20 <= d10; // Obvious gating
if (displayit) begin
$display("hello!"); // Must glob with other PLI statements
end
end
end
// Reset means second-level gating
reg [31:0] d30, d31a, d31b, d32;
always @(posedge clk) begin
d32 <= d31b;
if (reset) begin
d30 <= 32'h0;
d31a <= 32'h0;
d31b <= 32'h0;
d32 <= 32'h0; // Overlaps above, just to make things interesting
end
else begin
// Mix two outputs
d30 <= d20;
if (enable) begin
d31a <= d30;
d31b <= d31a;
end
end
end
// Multiple ORs for gater
reg [31:0] d40a,d40b;
always @(posedge clk) begin
if (reset) begin
d40a <= 32'h0;
d40b <= 32'h0;
end
if (enable) begin
d40a <= d32;
d40b <= d40a;
end
end
// Non-optimizable
reg [31:0] d91, d92;
reg [31:0] inverted;
always @(posedge clk) begin
inverted = ~d40b;
if (reset) begin
d91 <= 32'h0;
end
else begin
if (enable) begin
d91 <= inverted;
end
else begin
d92 <= inverted ^ 32'h12341234; // Inverted gating condition
end
end
end
wire [31:0] out = d91 ^ d92;
endmodule