luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix leading/trailing mixed whitespace

This commit is contained in:
Wilson Snyder 2008-06-12 12:03:47 -04:00
parent 3073db4e81
commit 499f98a51c
21 changed files with 65 additions and 65 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/V3Ast.cpp
View File

@ -643,7 +643,7 @@ void AstNode::iterateListBackwards(AstNVisitor& v, AstNUser* vup) {
while (nodep->m_nextp) nodep=nodep->m_nextp;
while (nodep) {
// Edits not supported: nodep->m_iterpp = &nodep;
nodep->accept(v, vup);
nodep->accept(v, vup);
if (nodep->backp()->m_nextp == nodep) nodep=nodep->backp();
else nodep = NULL; // else: backp points up the tree.
}
@ -664,7 +664,7 @@ void AstNode::iterateAndNext(AstNVisitor& v, AstNUser* vup) {
for (AstNode* nodep=this; nodep;) {
AstNode* niterp = nodep;
niterp->m_iterpp = &niterp;
niterp->accept(v, vup);
niterp->accept(v, vup);
// accept may do a replaceNode and change niterp on us...
if (!niterp) return;
niterp->m_iterpp = NULL;
@ -681,7 +681,7 @@ void AstNode::iterateAndNextIgnoreEdit(AstNVisitor& v, AstNUser* vup) {
if (!this) return;
for (AstNode* nodep=this; nodep; ) {
AstNode* nnextp = nodep->m_nextp;
nodep->accept(v, vup);
nodep->accept(v, vup);
nodep = nnextp;
}
}

4
src/V3Clock.cpp
View File

@ -244,12 +244,12 @@ private:
//UINFO(4," MOD "<<nodep<<endl);
m_modp = nodep;
m_stableNum = 0;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
}
virtual void visit(AstScope* nodep, AstNUser*) {
//UINFO(4," SCOPE "<<nodep<<endl);
m_scopep = nodep;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
if (AstNode* movep = nodep->finalClksp()) {
if (!m_topScopep) nodep->v3fatalSrc("Final clocks under non-top scope");
movep->unlinkFrBackWithNext();

2
src/V3Combine.cpp
View File

@ -391,7 +391,7 @@ private:
m_hashed.clear();
// Compute hash of all statement trees in the function
m_state = STATE_HASH;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
m_state = STATE_IDLE;
// Walk the hashes removing empty functions
if (emptyFunctionDeletion()) {

2
src/V3EmitC.cpp
View File

@ -457,7 +457,7 @@ public:
// Terminals
virtual void visit(AstVarRef* nodep, AstNUser*) {
puts(nodep->hiername());
puts(nodep->varp()->name());
puts(nodep->varp()->name());
}
void emitConstant(AstConst* nodep, AstVarRef* assigntop, const string& assignString) {
// Put out constant set to the specified variable, or given variable in a string

4
src/V3EmitV.cpp
View File

@ -367,12 +367,12 @@ public:
// Terminals
virtual void visit(AstVarRef* nodep, AstNUser*) {
puts(nodep->hiername());
puts(nodep->varp()->name());
puts(nodep->varp()->name());
}
virtual void visit(AstVarXRef* nodep, AstNUser*) {
puts(nodep->dotted());
puts(".");
puts(nodep->varp()->name());
puts(nodep->varp()->name());
}
virtual void visit(AstConst* nodep, AstNUser*) {
puts(nodep->num().ascii(true,true));

4
src/V3Expand.cpp
View File

@ -669,7 +669,7 @@ private:
rhsp->lhsp(), rhsshift),
newAstWordSelClone (rhsp->rhsp(), w)));
}
return true;
return true;
}
virtual void visit(AstReplicate* nodep, AstNUser*) {
@ -730,7 +730,7 @@ private:
}
addWordAssign(nodep, w, newp);
}
return true;
return true;
}
virtual void visit(AstChangeXor* nodep, AstNUser*) {

2
src/V3Gate.cpp
View File

@ -489,7 +489,7 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
if (debug()>=5) substp->dumpTree(cout,"\t subst: ");
m_statSigs++;
while (V3GraphEdge* edgep = vvertexp->outBeginp()) {
GateLogicVertex* consumeVertexp = dynamic_cast<GateLogicVertex*>(edgep->top());
GateLogicVertex* consumeVertexp = dynamic_cast<GateLogicVertex*>(edgep->top());
AstNode* consumerp = consumeVertexp->nodep();
optimizeElimVar(vvertexp->varScp(), substp, consumerp);
// If the new replacement referred to a signal,

4
src/V3GraphDfa.cpp
View File

@ -512,7 +512,7 @@ private:
void add_complement_edges() {
// Find accepting vertex
DfaVertex* acceptp = NULL;
for (V3GraphVertex* vertexp = m_graphp->verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
for (V3GraphVertex* vertexp = m_graphp->verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (DfaVertex* vvertexp = dynamic_cast<DfaVertex*>(vertexp)) {
if (vvertexp->accepting()) {
acceptp = vvertexp;
@ -520,7 +520,7 @@ private:
}
}
}
if (!acceptp) v3fatalSrc("No accepting vertex in DFA\n");
if (!acceptp) v3fatalSrc("No accepting vertex in DFA\n");
// Remap edges
for (V3GraphVertex* vertexp = m_graphp->verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {

2
src/V3GraphDfa.h
View File

@ -98,7 +98,7 @@ public:
: V3GraphVertex(graphp)
, m_start(start), m_accepting(accepting) {}
virtual DfaVertex* clone(DfaGraph* graphp) {
return new DfaVertex(graphp, start(), accepting()); }
return new DfaVertex(graphp, start(), accepting()); }
virtual ~DfaVertex() {}
// ACCESSORS
virtual string dotShape() const { return (accepting()?"doublecircle":""); }

4
src/V3Inline.cpp
View File

@ -65,8 +65,8 @@ private:
// VISITORS
virtual void visit(AstNetlist* nodep, AstNUser*) {
// Iterate modules backwards, in bottom-up order. Required!
nodep->iterateChildrenBackwards(*this);
// Iterate modules backwards, in bottom-up order. Required!
nodep->iterateChildrenBackwards(*this);
}
virtual void visit(AstModule* nodep, AstNUser*) {
if (m_cellp) {

8
src/V3Life.cpp
View File

@ -315,7 +315,7 @@ private:
//---- Track control flow changes
virtual void visit(AstNodeIf* nodep, AstNUser*) {
UINFO(4," IF "<<nodep<<endl);
UINFO(4," IF "<<nodep<<endl);
// Condition is part of PREVIOUS block
nodep->condp()->iterateAndNext(*this);
LifeBlock* prevLifep = m_lifep;
@ -331,7 +331,7 @@ private:
nodep->elsesp()->iterateAndNext(*this);
m_lifep = prevLifep;
}
UINFO(4," join "<<endl);
UINFO(4," join "<<endl);
// Find sets on both flows
m_lifep->dualBranch (ifLifep, elseLifep);
// For the next assignments, clear any variables that were read or written in the block
@ -363,7 +363,7 @@ private:
nodep->bodysp()->iterateAndNext(*this);
m_lifep = prevLifep;
}
UINFO(4," joinfor"<<endl);
UINFO(4," joinfor"<<endl);
// For the next assignments, clear any variables that were read or written in the block
condLifep->lifeToAbove();
bodyLifep->lifeToAbove();
@ -371,7 +371,7 @@ private:
delete bodyLifep;
}
virtual void visit(AstCCall* nodep, AstNUser*) {
//UINFO(4," CCALL "<<nodep<<endl);
//UINFO(4," CCALL "<<nodep<<endl);
nodep->iterateChildren(*this);
// Enter the function and trace it
if (!nodep->funcp()->entryPoint()) { // else is non-inline or public function we optimize separately

54
src/V3Order.cpp
View File

@ -1228,13 +1228,13 @@ void OrderVisitor::processMove() {
// Recompute the next domScopep to process
if (scopeHuntp) {
domScopep = scopeHuntp;
UINFO(6," MoveIt: SameScope "<<*domScopep<<endl);
UINFO(6," MoveIt: SameScope "<<*domScopep<<endl);
} else if (domHuntp) { // No exact scope matches, try only matching the domain
domScopep = domHuntp;
UINFO(6," MoveIt: SameDomain "<<*domScopep<<endl);
UINFO(6," MoveIt: SameDomain "<<*domScopep<<endl);
} else if (loopHuntp) { // No exact scope or domain matches, only match the loop
domScopep = loopHuntp;
UINFO(6," MoveIt: SameLoop "<<*domScopep<<endl);
UINFO(6," MoveIt: SameLoop "<<*domScopep<<endl);
} else { // else we're hopefully all done
if (curLoop != LOOPID_NOTLOOPED)
domScopep->domainp()->v3fatalSrc("Can't find more nodes like "<<*domScopep); // Should be at least a "end loop"
@ -1250,34 +1250,34 @@ void OrderVisitor::processMove() {
}
}
if (!m_pomWaiting.empty()) {
OrderMoveVertex* vertexp = m_pomWaiting.begin();
OrderMoveVertex* vertexp = m_pomWaiting.begin();
vertexp->logicp()->nodep()->v3fatalSrc("Didn't converge; nodes waiting, none ready, perhaps some input activations lost: "<<vertexp<<endl);
}
#else
while (!m_pomReadyDomScope.empty()) {
// Start with top node on ready list's domain & scope
OrderMoveDomScope* domScopep = m_pomReadyDomScope.begin();
OrderMoveVertex* topVertexp = domScopep->readyVertices().begin();
UASSERT(topVertexp, "domScope on ready list without any nodes ready under it");
// Work on all scopes ready inside this domain
while (domScopep) {
UINFO(6," MoveDomain l="<<domScopep->domainp()<<endl);
// Process all nodes ready under same domain & scope
m_pomNewFuncp = NULL;
while (OrderMoveVertex* vertexp = domScopep->readyVertices().begin()) {
processMoveOne(vertexp, domScopep, 1);
}
// Done with scope/domain pair, pick new scope under same domain, or NULL if none left
OrderMoveDomScope* domScopeNextp = NULL;
for (OrderMoveDomScope* huntp = m_pomReadyDomScope.begin();
huntp; huntp = huntp->readyDomScopeNextp()) {
if (huntp->domainp() == domScopep->domainp()) {
domScopeNextp = huntp;
break;
}
}
domScopep = domScopeNextp;
}
// Start with top node on ready list's domain & scope
OrderMoveDomScope* domScopep = m_pomReadyDomScope.begin();
OrderMoveVertex* topVertexp = domScopep->readyVertices().begin();
UASSERT(topVertexp, "domScope on ready list without any nodes ready under it");
// Work on all scopes ready inside this domain
while (domScopep) {
UINFO(6," MoveDomain l="<<domScopep->domainp()<<endl);
// Process all nodes ready under same domain & scope
m_pomNewFuncp = NULL;
while (OrderMoveVertex* vertexp = domScopep->readyVertices().begin()) {
processMoveOne(vertexp, domScopep, 1);
}
// Done with scope/domain pair, pick new scope under same domain, or NULL if none left
OrderMoveDomScope* domScopeNextp = NULL;
for (OrderMoveDomScope* huntp = m_pomReadyDomScope.begin();
huntp; huntp = huntp->readyDomScopeNextp()) {
if (huntp->domainp() == domScopep->domainp()) {
domScopeNextp = huntp;
break;
}
}
domScopep = domScopeNextp;
}
}
UASSERT (m_pomWaiting.empty(), "Didn't converge; nodes waiting, none ready, perhaps some input activations lost.");
#endif

10
src/V3PreLex.l
View File

@ -89,8 +89,8 @@ psl [p]sl
/* Optional directives we recognize */
<INITIAL>"`__FILE__" { if (!pedantic()) {
yytext = (char*)V3PreLex::s_currentLexp->m_curFilelinep->cfilename();
yyleng = strlen(yytext); return (VP_TEXT);
yytext = (char*)V3PreLex::s_currentLexp->m_curFilelinep->cfilename();
yyleng = strlen(yytext); return (VP_TEXT);
} else return(VP_DEFREF); }
<INITIAL>"`__LINE__" { if (!pedantic()) {
static char buf[10];
@ -153,18 +153,18 @@ psl [p]sl
appendDefValue(yytext,yyleng);
} else {
return (VP_TEXT);
}}
}}
<ARGMODE>[)] { V3PreLex::s_currentLexp->m_parenLevel--;
if (V3PreLex::s_currentLexp->m_parenLevel>0) {
appendDefValue(yytext,yyleng);
} else {
yy_pop_state(); return (VP_DEFARG);
}}
}}
<ARGMODE>[,] { if (V3PreLex::s_currentLexp->m_parenLevel>1) {
appendDefValue(yytext,yyleng);
} else {
yy_pop_state(); return (VP_DEFARG);
}}
}}
<ARGMODE>"`"{symb} { return (VP_DEFREF); } /* defref in defref */
<ARGMODE>[^\/\*\n\r\\(,){}\[\]\"`]+ |
<ARGMODE>. { appendDefValue(yytext,yyleng); }

4
src/V3PreProc.cpp
View File

@ -707,7 +707,7 @@ int V3PreProcImp::getToken() {
}
}
case ps_DEFVALUE: {
static string newlines;
static string newlines;
newlines = "\n"; // Always start with trailing return
if (tok == VP_DEFVALUE) {
// Remove returns
@ -735,7 +735,7 @@ int V3PreProcImp::getToken() {
// Remove leading whitespace
unsigned leadspace = 0;
while (m_lexp->m_defValue.length() > leadspace
&& isspace(m_lexp->m_defValue[leadspace])) leadspace++;
&& isspace(m_lexp->m_defValue[leadspace])) leadspace++;
if (leadspace) m_lexp->m_defValue.erase(0,leadspace);
// Remove trailing whitespace
unsigned trailspace = 0;

2
src/V3Premit.cpp
View File

@ -59,7 +59,7 @@ private:
// METHODS
bool assignNoTemp(AstNodeAssign* nodep) {
return (nodep->lhsp()->castVarRef()
return (nodep->lhsp()->castVarRef()
&& !nodep->lhsp()->castVarRef()->varp()->isSc()
&& nodep->rhsp()->castConst());
}

2
src/V3Scope.cpp
View File

@ -74,7 +74,7 @@ private:
UINFO(4," MOD AT "<<scopename<<" "<<nodep<<endl);
AstNode::userClearTree();
m_scopep = new AstScope((m_aboveCellp?(AstNode*)m_aboveCellp:(AstNode*)nodep)->fileline(),
m_scopep = new AstScope((m_aboveCellp?(AstNode*)m_aboveCellp:(AstNode*)nodep)->fileline(),
nodep, scopename, m_aboveScopep, m_aboveCellp);
// Now for each child cell, iterate the module this cell points to

4
src/V3Stats.cpp
View File

@ -109,7 +109,7 @@ private:
}
}
virtual void visit(AstNodeIf* nodep, AstNUser*) {
UINFO(4," IF "<<nodep<<endl);
UINFO(4," IF "<<nodep<<endl);
allNodes(nodep);
// Condition is part of PREVIOUS block
nodep->condp()->iterateAndNext(*this);
@ -159,7 +159,7 @@ private:
//virtual void visit(AstWhile* nodep, AstNUser*) {
virtual void visit(AstCCall* nodep, AstNUser*) {
//UINFO(4," CCALL "<<nodep<<endl);
//UINFO(4," CCALL "<<nodep<<endl);
allNodes(nodep);
nodep->iterateChildren(*this);
if (m_fast) {

2
src/V3Table.cpp
View File

@ -336,7 +336,7 @@ public:
void clear() {
m_whyNotOptimizable = NULL;
m_anyAssignComb = false;
m_anyAssignDly = false;
m_anyAssignDly = false;
m_inDlyAssign = false;
m_instrCount = 0;
m_dataCount = 0;

2
src/V3Trace.cpp
View File

@ -547,7 +547,7 @@ private:
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
UINFO(8," CFUNC "<<nodep<<endl);
if (nodep->funcType() == AstCFuncType::TRACE_INIT) {
if (nodep->funcType() == AstCFuncType::TRACE_INIT) {
m_initFuncp = nodep;
} else if (nodep->funcType() == AstCFuncType::TRACE_FULL) {
m_fullFuncp = nodep;

6
src/verilog.l
View File

@ -673,15 +673,15 @@ escid \\[^ \t\f\r\n]+
return yaINTNUM;
}
[0-9][_0-9]*(\.[_0-9]+)([eE][-+]?[_0-9]+)? {
yylval.cdouble = 0; /* Only for delays, not used yet */
yylval.cdouble = 0; /* Only for delays, not used yet */
return yaFLOATNUM;
}
[0-9][_0-9]*(\.[_0-9]+)?([eE][-+]?[_0-9]+) {
yylval.cdouble = 0; /* Only for delays, not used yet */
yylval.cdouble = 0; /* Only for delays, not used yet */
return yaFLOATNUM;
}
[0-9][_0-9]*(\.[_0-9]+)?(fs|ps|ns|us|ms|s|step) {
yylval.cdouble = 0; /* Only for times, not used yet */
yylval.cdouble = 0; /* Only for times, not used yet */
return yaFLOATNUM;
}
}

2
src/verilog.y
View File

@ -505,7 +505,7 @@ port: yaID portRangeE { $$ = new AstPort(CRELINE(),V3Parse::s_pinNum+
portV2kArgs: portV2kDecl { $$ = $1; }
| portV2kDecl ',' portV2kList { $$ = $1->addNext($3); }
;
;
portV2kList: portV2kSecond { $$ = $1; }
| portV2kList ',' portV2kSecond { $$ = $1->addNext($3); }