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Fix ASSIGN_SI errors with new --pins-bv 1 option

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This commit is contained in:
Wilson Snyder
2009-03-13 22:58:55 -04:00
parent 193dcf38f4
commit 71bdfd9710
10 changed files with 70 additions and 29 deletions
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-1
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@@ -1407,4 +1407,3 @@ Local variables:
mode: outline
paragraph-separate: "[ \f\n]*$"
end:
include/verilated.h
+26 -16
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@@ -359,35 +359,45 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) {
//===================================================================
// SYSTEMC OPERATORS
// Copying verilog format to/from systemc integers and bit vectors.
#define VL_ASSIGN_IS(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
#define VL_ASSIGN_SI(obits,svar,vvar) { (svar).write(vvar); }
// Copying verilog format to systemc integers and bit vectors.
#define VL_ASSIGN_ISI(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
#define VL_ASSIGN_QSQ(obits,vvar,svar) { (vvar) = VL_CLEAN_QQ((obits),(obits),(svar).read()); }
#define VL_ASSIGN_ISW(obits,od,svar) { \
od = (svar.read().get_word(0)) & VL_MASK_I(obits); \
}
#define VL_ASSIGN_QSW(obits,od,svar) { \
od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
& VL_MASK_Q(obits); \
}
#define VL_ASSIGN_WSW(obits,owp,svar) { \
int words = VL_WORDS_I(obits); \
for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
owp[words-1] &= VL_MASK_I(obits); \
}
// Copying verilog format from systemc integers and bit vectors.
#define VL_ASSIGN_SII(obits,svar,vvar) { (svar).write(vvar); }
#define VL_ASSIGN_SQQ(obits,svar,vvar) { (svar).write(vvar); }
#define VL_ASSIGN_SQ(obits,svar,rd) { \
#define VL_ASSIGN_SWI(obits,svar,rd) { \
sc_bv<obits> _bvtemp; \
_bvtemp.set_word(0,rd); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_SWQ(obits,svar,rd) { \
sc_bv<obits> _bvtemp; \
_bvtemp.set_word(0,rd); \
_bvtemp.set_word(1,rd>>VL_WORDSIZE); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_QS(obits,od,svar) { \
od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
& VL_MASK_Q(obits); \
}
#define VL_ASSIGN_SW(obits,svar,rwp) { \
#define VL_ASSIGN_SWW(obits,svar,rwp) { \
sc_bv<obits> _bvtemp; \
for (int i=0; i < VL_WORDS_I(obits); i++) _bvtemp.set_word(i,rwp[i]); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_WS(obits,owp,svar) { \
int words = VL_WORDS_I(obits); \
for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
owp[words-1] &= VL_MASK_I(obits); \
}
//===================================================================
// Extending sizes
src/V3EmitC.cpp
+6 -4
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@@ -75,6 +75,9 @@ public:
void emitIQW(AstNode* nodep) {
puts (nodep->isWide()?"W":(nodep->isQuad()?"Q":"I"));
}
void emitScIQW(AstVar* nodep) {
puts (nodep->isScBv()?"SW":(nodep->isScQuad()?"SQ":"SI"));
}
void emitOpName(AstNode* nodep, const string& format,
AstNode* lhsp, AstNode* rhsp, AstNode* thsp);
@@ -130,8 +133,7 @@ public:
} else if (nodep->lhsp()->castVarRef()
&& nodep->lhsp()->castVarRef()->varp()->isSc()) {
putbs("VL_ASSIGN_"); // Set a systemC variable
if (nodep->lhsp()->castVarRef()->varp()->isScQuad()) puts("SQ");
else puts("S");
emitScIQW(nodep->lhsp()->castVarRef()->varp());
emitIQW(nodep);
puts("(");
puts(cvtToStr(nodep->widthMin())+",");
@@ -140,8 +142,8 @@ public:
&& nodep->rhsp()->castVarRef()->varp()->isSc()) {
putbs("VL_ASSIGN_"); // Get a systemC variable
emitIQW(nodep);
if (nodep->rhsp()->castVarRef()->varp()->isScQuad()) puts("SQ(");
else puts("S(");
emitScIQW(nodep->rhsp()->castVarRef()->varp());
puts("(");
puts(cvtToStr(nodep->widthMin())+",");
nodep->lhsp()->iterateAndNext(*this); puts(", ");
} else if (nodep->isWide()
test_regress/Makefile_obj
+1
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@@ -32,6 +32,7 @@ endif
# Needed by tracing routines
CPPFLAGS += -DVL_DEBUG=1
CPPFLAGS += -DVM_PREFIX=$(VM_PREFIX)
CPPFLAGS += $(CPPFLAGS_DRIVER)
CPPFLAGS += $(CPPFLAGS_ADD)
#######################################################################
test_regress/driver.pl
+1
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@@ -434,6 +434,7 @@ sub compile {
cmd=>["cd $self->{obj_dir} && ",
"make", "-f".getcwd()."/Makefile_obj",
"VM_PREFIX=$self->{VM_PREFIX}",
"CPPFLAGS_DRIVER=-D".uc($self->{name}),
($param{make_main}?"":"MAKE_MAIN=0"),
($param{benchmark}?"OPT_FAST=-O2":""),
"$self->{VM_PREFIX}", # bypass default rule, as we don't need archive
test_regress/t/t_var_pins_sc1.pl
+2 -2
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@@ -9,8 +9,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
top_filename("t/t_var_pinsizes.v");
compile (
v_flags2 => ['-sp -pins-bv 1'],
verilator_make_gcc => 0,
v_flags2 => ["-sp -pins-bv 1 --exe $Self->{t_dir}/t_var_pinsizes.cpp"],
make_main => 0,
) if $Self->{v3};
if ($Self->{v3}) {
test_regress/t/t_var_pins_sc2.pl
+2 -2
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@@ -9,8 +9,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
top_filename("t/t_var_pinsizes.v");
compile (
v_flags2 => ['-sp -pins-bv 2'],
verilator_make_gcc => 0,
v_flags2 => ["-sp -pins-bv 2 --exe $Self->{t_dir}/t_var_pinsizes.cpp"],
make_main => 0,
) if $Self->{v3};
if ($Self->{v3}) {
test_regress/t/t_var_pins_sc32.pl
+2 -2
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@@ -9,8 +9,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
top_filename("t/t_var_pinsizes.v");
compile (
v_flags2 => ['-sp -no-pins64'],
verilator_make_gcc => 0,
v_flags2 => ["-sp -no-pins64 --exe $Self->{t_dir}/t_var_pinsizes.cpp"],
make_main => 0,
) if $Self->{v3};
if ($Self->{v3}) {
test_regress/t/t_var_pins_sc64.pl
+2 -2
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@@ -9,8 +9,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
top_filename("t/t_var_pinsizes.v");
compile (
v_flags2 => ['-sp -pins64'],
verilator_make_gcc => 0,
v_flags2 => ["-sp -pins64 --exe $Self->{t_dir}/t_var_pinsizes.cpp"],
make_main => 0,
) if $Self->{v3};
if ($Self->{v3}) {
test_regress/t/t_var_pinsizes.cpp
+28
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@@ -0,0 +1,28 @@
#ifdef T_VAR_PINS_CC
# include "Vt_var_pins_cc.h"
#elif defined(T_VAR_PINS_SC1)
# include "Vt_var_pins_sc1.h"
#elif defined(T_VAR_PINS_SC2)
# include "Vt_var_pins_sc2.h"
#elif defined(T_VAR_PINS_SC32)
# include "Vt_var_pins_sc32.h"
#elif defined(T_VAR_PINS_SC64)
# include "Vt_var_pins_sc64.h"
#else
# error "Unknown test"
#endif
VM_PREFIX* tb = NULL;
double sc_time_stamp() {
return 0;
}
int main() {
Verilated::debug(0);
tb = new VM_PREFIX("tb");
cout << "*-* All Finished *-*" << endl;
tb->final();
return 0;
}