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1159 Commits
Author SHA1 Message Date
steve 04ada23119 Support in various contexts the $realtime
system task.
2003-01-27 00:14:37 +00:00
steve 46253ed873 Rework expression parsing and elaboration to
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
steve 1a9ab8ec84 Remember to save signedness of number. 2003-01-26 21:02:21 +00:00
steve 47db309d30 Support display of real values and constants. 2003-01-26 18:18:36 +00:00
steve 7de4108bad Add %cvt/ir and %cvt/ri instructions, and support
real values passed as arguments to VPI tasks.
2003-01-26 18:16:22 +00:00
steve 9a5a00f836 Add thread word array, and add the instructions,
%add/wr, %cmp/wr, %load/wr, %mul/wr and %set/wr.
2003-01-25 23:48:05 +00:00
steve 07a427bf28 Detect null arguments to concatenation operator. 2003-01-19 00:35:39 +00:00
steve dfc9a9474a Add a dummy function to reduce confusion on some systems. 2003-01-19 00:03:23 +00:00
steve 54206ef92b Make sure to use local system.vpi. 2003-01-18 23:56:06 +00:00
steve ddd43f1378 Add a means to clear the module search path. 2003-01-18 23:55:35 +00:00
steve 38ccb12eb0 Use stringstream in place of sprintf. 2003-01-17 05:49:03 +00:00
steve ca3bf14fb6 Remove useless variable. 2003-01-17 05:48:35 +00:00
steve 982474899b Set proper line text for later bison. 2003-01-17 05:48:02 +00:00
steve ad6ff5562d Missed a case of setting line on an PEident. 2003-01-17 05:47:30 +00:00
steve d4cd1dbd27 Keep some debugging status. 2003-01-16 21:44:46 +00:00
steve 3c1426e631 Detect duplicate module declarations. 2003-01-16 21:44:19 +00:00
steve c3a1a9514f Assert some task definition sanity. 2003-01-16 21:43:52 +00:00
steve f56d763411 Move strstream to ostringstream for compatibility. 2003-01-14 21:16:18 +00:00
steve 4ec91047dd Ignore vvp.exp 2003-01-10 19:02:47 +00:00
steve 0579ae08cd Add missing vpi entry points. 2003-01-10 19:02:21 +00:00
steve 9074999666 Remove thunks from vpi init. 2003-01-10 19:01:38 +00:00
steve 0458ab5a53 Only use libiberty.h if available. 2003-01-10 19:01:04 +00:00
steve 4a3459c87c Spelling fixes. 2003-01-10 03:08:13 +00:00
steve 301cbe31ad Remove vpithunk, and move libvpi to vvp directory. 2003-01-10 03:06:32 +00:00
steve 165dd82bb2 Remove files of vvm directory. 2003-01-10 03:05:05 +00:00
steve 9c3b3246c8 use userdata to save $display argument handles. 2003-01-09 04:10:58 +00:00
steve 6416f8b90e Add vpi_put_userdata 2003-01-09 04:09:44 +00:00
steve e6eae5fd15 Allocate res-buf in bigger chunks 2003-01-07 18:07:50 +00:00
steve aa3a6dba4e Schedule wait lists of threads as a single event,
to save on events. Also, improve efficiency of
 event_s allocation. Add some event statistics to
 get an idea where performance is really going.
2003-01-06 23:57:26 +00:00
steve dedae73761 Account for local units in calculated delays. 2002-12-21 19:42:17 +00:00
steve d7f3d00f5c Rewrite time formatting to account for local scope. 2002-12-21 19:41:49 +00:00
steve c2070777b2 The $time system task returns the integer time
scaled to the local units. Change the internal
 implementation of vpiSystemTime the $time functions
 to properly account for this. Also add $simtime
 to get the simulation time.
2002-12-21 00:55:57 +00:00
steve 42b34c2ce6 Evaluate shift index after shift operand because
the chift operand may use the index register itself.
2002-12-20 01:11:14 +00:00
steve 6fbfdd8f3f Keep bit select subexpression width if it is constant. 2002-12-19 23:11:29 +00:00
steve bee3acfd12 Add tf_message, tf_get/setworkarea, and
ty_typep functions, along with defines
 related to these functions.
2002-12-19 21:37:04 +00:00
steve 2e279b61dd Update to 0.7 release. 2002-12-14 18:20:14 +00:00
steve 8ab909a765 Add vpi_handle_by_name to the VPI interface,
and bump the vpithunk magic number.
2002-12-11 23:55:22 +00:00
steve cca07fa42d Account for bison 1.35 and stack manipulations. 2002-12-10 05:49:51 +00:00
steve 5b81798205 install iverilog-vpi as a script. 2002-12-10 05:45:44 +00:00
steve a8a82df47d Prepare for 20021207 snapshot 2002-12-08 03:06:30 +00:00
steve e62e1d89b6 Named event triggers can take hierarchical names. 2002-12-07 02:49:24 +00:00
steve c032186133 Reword some error messages for clarity. 2002-12-06 03:08:19 +00:00
steve b89e138404 precalculate r-values of nb assignments and task arguments. 2002-12-05 04:15:14 +00:00
steve 9f80ed32b6 Support bit select in constant expressions. 2002-12-05 02:14:33 +00:00
steve c16a4a3950 distclean target. 2002-12-04 03:33:38 +00:00
steve 90fa90a508 Mingw32 compatible temp file management. 2002-12-04 03:26:59 +00:00
steve aaa734690f Use O_EXCL when opening temp files. 2002-12-04 02:29:36 +00:00
steve 88da7804c4 Improve the bad character error message. 2002-12-04 02:07:00 +00:00
steve 8604f922a5 specify delay can take an unbracketed simple value. 2002-11-26 03:56:10 +00:00
steve 807a758f7c Do not set width if width is already OK. 2002-11-26 03:35:13 +00:00
steve ef55086543 Support put of vpiStringVal to signals. 2002-11-25 23:33:45 +00:00
steve 2001903c89 Cygwin doesnot need driver-vpi sibdirectory. 2002-11-24 02:27:28 +00:00
steve 751e4e4c79 Fix instanceRef spelling. 2002-11-24 02:26:14 +00:00
steve 9d91b5db4c Document the Windows specific flags. 2002-11-23 00:51:53 +00:00
steve 9a3c9507ed Handle wide AND/NOR devices with Virtex carry logic. 2002-11-22 05:46:06 +00:00
steve d71d52bfe9 Implement bufif1 as BUFT 2002-11-22 01:45:40 +00:00
steve 8e30bc9f9e Careful of left operands to shift that are constant. 2002-11-22 00:01:50 +00:00
steve 412518d1ca Precalculate indices to l-value arrays. 2002-11-21 23:27:51 +00:00
steve 03afbf157b %set/x0 instruction to support bounds checking. 2002-11-21 22:43:13 +00:00
steve 00b2d467e4 Allow right values of right shift to shift in. 2002-11-21 22:42:48 +00:00
steve 856829d299 Fix const test of msb in assignment l-values. 2002-11-21 18:15:40 +00:00
steve 2fafe6866f Better handling of select width of shifters. 2002-11-21 18:08:09 +00:00
steve b9188ad0ca PATHPULSE specparam assignment syntax. 2002-11-21 17:40:11 +00:00
steve 0ccb9139c9 Magnitude compare to 0. 2002-11-17 23:37:55 +00:00
steve 18e402ddc8 Close old file if $dumpfile is called again. 2002-11-17 22:28:42 +00:00
steve b82d3165da Update version strings in spec flie. 2002-11-17 18:38:03 +00:00
steve 91580d1fcc Generate unique labels for force functors. 2002-11-17 18:31:09 +00:00
steve 35d7384903 Handle default: case in net_inputs for NetCase. 2002-11-16 05:45:41 +00:00
steve 4539632f34 Add vpiScope iterate on vpiScope objects. 2002-11-15 22:14:12 +00:00
steve 0651f246b2 Save vpiFullName results. 2002-11-14 22:43:58 +00:00
steve 6d0dee9341 Add version resources to the Windows binary. 2002-11-13 17:25:10 +00:00
steve c692f1708c Allow -mingw and -ivl flags to stand alone. 2002-11-13 17:03:49 +00:00
steve d91733d32c Spell the iverilog-vpi target correctly. 2002-11-13 16:57:25 +00:00
steve cd7378ff3f Do not truncate high bits of right shift. 2002-11-13 03:03:08 +00:00
steve c98ce4a029 Add Windows version of iverilog-vpi. 2002-11-13 01:50:11 +00:00
steve d035a7e92c spelling error. 2002-11-13 01:49:43 +00:00
steve 6db6359363 Update Solaris packaging to to realities. 2002-11-11 15:49:03 +00:00
steve 5c07a29e46 Install sqrt-virtex.v under Windows. 2002-11-11 01:12:41 +00:00
steve 42d9094e9b Snapshot 20021109 2002-11-09 23:41:15 +00:00
steve 1742231eba Handle nested-if chip enables. 2002-11-09 23:29:29 +00:00
steve 3178f886b7 XNF target uses only legacy functors. 2002-11-09 23:29:02 +00:00
steve cbc4a0ab52 Detect synthesis conflicts blocks statements share outputs. 2002-11-09 20:22:57 +00:00
steve cfd8cbf850 Port expressions for output ports are lnets, not nets. 2002-11-09 19:20:48 +00:00
steve 013b18b3dc leading underscore test for Windows more robust. 2002-11-09 06:03:57 +00:00
steve db9f20b21a Macos install notes. 2002-11-09 06:03:38 +00:00
steve f611260089 display octal escapes properly. 2002-11-09 06:01:11 +00:00
steve e34e3a4875 spelling in a comment. 2002-11-09 02:22:07 +00:00
steve aa8869a3c7 Postpone parameter width check to evaluation. 2002-11-09 01:40:19 +00:00
steve 588931fcf2 Add dup_expr for user defined function calls. 2002-11-09 00:25:27 +00:00
steve 07e49e215e Use the vectorized %assign where appropriate. 2002-11-08 05:00:31 +00:00
steve 1b84893ccb Add the %assign/v0 instruction. 2002-11-08 04:59:57 +00:00
steve 6445bb6915 Handle comments in suppressed code. 2002-11-08 00:04:16 +00:00
steve db899bd1b5 Use Vector %set to set constants in variables. 2002-11-07 05:19:55 +00:00
steve c6dcc38fe0 Vectorize load from REG variables. 2002-11-07 03:12:17 +00:00
steve b0a7909162 functor_set takes bit and strength, not 2 strengths. 2002-11-07 03:11:43 +00:00
steve d7ae85a13a Add vector set and load instructions. 2002-11-07 02:32:39 +00:00
steve 46ee38b466 Concatenation can evaluate sub-expressions in place. 2002-11-06 05:41:37 +00:00
steve bc6a958a50 More reliable iverilog.conf install dependency. 2002-11-06 03:42:40 +00:00
steve 0e751ad975 More forgiving about assignment rval width mismatch. 2002-11-06 03:22:28 +00:00
steve de94d09706 No need to keep excess width from an
unsigned constant value, if it can
 be trimmed safely.
2002-11-06 02:25:13 +00:00
steve 2f88a631df Run output with the vvp command. 2002-11-05 03:49:21 +00:00
steve 4e5dd49a37 Fix mask calculate when MOV_b is right on the word boundary. 2002-11-05 03:46:44 +00:00
steve 8463dcc878 ignore parse.output 2002-11-05 02:19:37 +00:00
steve 18bc2f65b3 Misspelled name. 2002-11-05 02:18:53 +00:00
steve b4e8ea5a0c Install shared objects as programs, not data. 2002-11-05 02:14:41 +00:00
steve 06a8087cb5 Do not need _leading underscore on Windows. 2002-11-05 02:14:16 +00:00
steve a9dfef0f55 Fix the call to FormatMessage under Windows. 2002-11-05 02:12:35 +00:00
steve e4540c3d0d Better error message for load failure on Windows. 2002-11-05 02:11:56 +00:00
steve 0cc8396244 Cast for gcc convenience. 2002-11-03 22:44:19 +00:00
steve 946693ad4d New output files from new bison. 2002-11-03 20:50:33 +00:00
steve f014d4c533 Update instructions, now that Cygwin handles X:/path strings. 2002-11-03 20:49:57 +00:00
steve 6a1e3f7e27 Slightly more verbose load fail message. 2002-11-03 20:47:23 +00:00
steve 7ad66b0725 Support old/new bison yylloc. 2002-11-03 20:36:53 +00:00
steve 0341c0c727 Error message for mising code generator type. 2002-11-03 20:36:10 +00:00
steve 20c8550139 Compiler error wrt ptrdiff_t. 2002-11-03 20:33:43 +00:00
steve 39aa90ce59 Snapshot 20021102 2002-11-03 02:12:00 +00:00
steve 6c67a64fc3 Get VectorVals from constant values. 2002-11-03 02:07:24 +00:00
steve 86032c0aa5 Allow named events to be referenced by
hierarchical names.
2002-11-02 03:27:51 +00:00
steve f243f694b4 Detect memories without work index in l-value. 2002-11-02 01:10:49 +00:00
steve 276ae3e228 Add the sqrt-virtex example. 2002-11-01 03:29:43 +00:00
steve fe6756eb07 Fix bottom bit of ADD/SUB device. 2002-11-01 02:36:34 +00:00
steve 539e494bc0 Give nets better names, if available. 2002-11-01 02:36:22 +00:00
steve 1298656c22 Fix up left shift to pass compile,
fix up ADD/SUB to generate missing pieces,
 Add the asynch set/reset to DFF devices.
2002-10-30 03:58:45 +00:00
steve c66d319d9c UPdate to 20021027 snapshot. 2002-10-28 02:26:41 +00:00
steve ae27165ffe Add Virtex code generators for left shift,
subtraction, and GE comparators.
2002-10-28 02:05:56 +00:00
steve 32f1ca6f8b draw lpm ff with aset_expr taken into account. 2002-10-23 04:39:35 +00:00
steve 9ce2806710 Fix synth2 handling of aset/aclr signals where
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
steve 3d4593d4d5 Synthesizer support for synchronous begin-end blocks. 2002-10-21 01:42:08 +00:00
steve df5ae54ec7 Handle conditional error cases better. 2002-10-20 19:19:37 +00:00
steve fbee1b424d Properly set or clear expression lookaside for binary expressions. 2002-10-20 02:55:37 +00:00
steve 555017b525 Snapshot 20021019 2002-10-19 23:38:49 +00:00
steve 1e170ee005 bourne shell compatibility. 2002-10-19 23:18:52 +00:00
steve 43501809b1 Redo the parameter vector support to allow
parameter names in range expressions.
2002-10-19 22:59:49 +00:00
steve c0c67a101a Fix spelling of the scalared keyword. 2002-10-13 05:01:44 +00:00
steve 1eb714e097 More verbose eval_const assert message. 2002-10-13 05:01:07 +00:00
steve 54a8e12856 Fix symbol underscore needs for Mac OS X. 2002-10-03 18:03:35 +00:00
steve 6203f05ef9 Add pal target enable help message. 2002-10-03 17:57:54 +00:00
steve 703ad04067 Allow expression lookaside map to spam statements. 2002-09-27 20:24:42 +00:00
steve 778e96330d Add thread expression lookaside map. 2002-09-27 16:33:34 +00:00
steve e3eb89fb12 Remove excess debug messages. 2002-09-26 03:42:10 +00:00
steve 166621bcb3 Generate vvp code for asynch set/reset of NetFF. 2002-09-26 03:18:04 +00:00
steve 879a5a4cbe Synthesize async set/reset is certain cases. 2002-09-26 01:13:14 +00:00
steve 9faabfe995 Fix missing endifs within supressed ifdefs. 2002-09-25 02:23:08 +00:00
steve 6f23fa61ac Allow results in register bits 47 in certain cases. 2002-09-24 04:20:32 +00:00
steve 30b6cf7821 Include user specified libraries on the link line. 2002-09-24 01:50:53 +00:00
steve 6258011210 More detailed check of process edge events. 2002-09-24 00:58:35 +00:00
steve 7557a46382 Remove some now useless asserts. 2002-09-21 23:47:30 +00:00
steve a0a91f358c Snapshot 20020921 2002-09-21 21:29:09 +00:00
steve 0128286966 Allow constant bit selects out of range. 2002-09-21 21:28:18 +00:00
steve acd5e86e04 Fix disable in arbitrary fork/join situations. 2002-09-21 04:55:00 +00:00
steve ab94b0a636 disable threads with children. 2002-09-20 03:59:34 +00:00
steve de6d696667 Add support for cbAfterDelay. 2002-09-20 02:42:11 +00:00
steve 63946c4cfb More careful cd command. 2002-09-20 02:41:36 +00:00
steve 475b603d15 Relax position constrations of ifdef and friends. 2002-09-19 20:33:27 +00:00
steve 096956cda9 Fix multiple source on the command line. 2002-09-18 23:25:18 +00:00
steve 3d3116d48b Add support for binary NOR operator. 2002-09-18 04:29:55 +00:00
steve 616360d751 Spelling errors. 2002-09-18 04:08:45 +00:00
steve 7a5c30d297 printf size warning. 2002-09-18 03:34:07 +00:00
steve 9c5ab36a8b Fix switch case warnings. 2002-09-18 03:33:10 +00:00
steve 466656b167 Allow forward references of memories. 2002-09-18 02:55:18 +00:00
steve 5d6567cb02 Generate vvp code for structural flip-flops. 2002-09-17 05:37:45 +00:00
steve c44c123ef5 Connect output of block to net_out, instead of statement outputs. 2002-09-17 04:40:28 +00:00
steve 4ecbf56e2b Account for part select in l-value. 2002-09-17 04:39:20 +00:00
steve ed9a2c4b3f Proper initialization of the memories table. 2002-09-17 00:42:22 +00:00
steve 90751b9250 Reject multiple probes on synchronous logic. 2002-09-16 21:55:06 +00:00
steve 7d8011669d snapshot 20020915 2002-09-16 03:48:56 +00:00
steve eb81062d85 Add to synth2 support for synthesis of
synchronous logic. This includes DFF enables
 modeled by if/then/else.
2002-09-16 00:30:33 +00:00
steve 8fbacc966e compile error. 2002-09-16 00:28:51 +00:00
steve 75801a12e3 Display FF enables. 2002-09-16 00:28:25 +00:00
steve 9f1ce170e6 Generate code for 8:1 muxes msing F5 and F6 muxes. 2002-09-15 21:52:19 +00:00
steve 327c8826f4 Generate Virtex code for 4:1 mux slices. 2002-09-14 05:19:19 +00:00
steve fb0383d2bd single bit optimization for != in expressions,
and expand ++ and != results if needed.
2002-09-13 04:09:51 +00:00
steve 28725d0d74 Optimize ==1 when in context where x vs z doesnt matter. 2002-09-13 03:12:50 +00:00
steve dac99b9374 Add support for binary nand operator. 2002-09-12 15:49:43 +00:00
steve 1573477caf Account for buffer overrun in memory word names. 2002-09-12 15:13:07 +00:00
steve 70a7513781 Support $ in preprocessor identifiers. 2002-09-11 19:42:37 +00:00
steve 0277035496 Fix wrecked rbuf in vpi_get_str of signals and memories. 2002-09-11 16:06:57 +00:00
steve 33f462fdf6 Actually set strength pointer when getting strength val. 2002-09-10 02:27:11 +00:00
steve 639b9f346f Snapshot 20020907 2002-09-08 01:39:23 +00:00
steve 447fee6f43 Fix padding of operand of unary minus. 2002-09-08 01:37:13 +00:00
steve c9212a9a09 Implement vpi_remove_cb for cbValueChange. 2002-09-07 04:54:51 +00:00
steve ea21fab379 Add support for %v is the display system task.
Change the encoding of H and L outputs from
 the bufif devices so that they are logic x.
2002-09-06 04:56:28 +00:00
steve 4d090b64bd List tran devices as unsupported. 2002-09-04 16:19:39 +00:00
steve 7e1e44e87a Properly cast signedness of parameters with ranges. 2002-09-01 03:01:48 +00:00
steve 0a2a9dcd94 Fix leaking vthread bits in ?: eval. 2002-09-01 01:42:34 +00:00
steve c9b4b66af2 Watch for x indices in l-value of non-blocking assignments. 2002-09-01 00:19:35 +00:00
steve 7b6678b2a1 Fix reverse bit ordered bit select in continuous assignment. 2002-08-31 03:48:50 +00:00
steve e79f62c5fa Generate x out for x select on wide muxes. 2002-08-29 03:04:01 +00:00
steve 60046cc790 update for 20020828 snapshot. 2002-08-28 20:30:53 +00:00
steve 3fca25181a Evaluate nonblocking assign r-values. 2002-08-28 18:54:36 +00:00
steve cbca31555d Add the %subi instruction, and use it where possible. 2002-08-28 18:38:07 +00:00
steve d5aa700b4b Generate %load/nx for indexed load of nets. 2002-08-28 17:15:35 +00:00
steve 1db8319bce Add the %load/nx opcode to index vpi nets. 2002-08-28 17:15:06 +00:00
steve aa390f2a91 Fix l-value indexing of memories and vectors so that
an unknown (x) index causes so cell to be addresses.

 Fix tangling of label identifiers in the fork-join
 code generator.
2002-08-27 05:39:57 +00:00
steve bd9e66d333 Missing declaration of ivl_memory_scope. 2002-08-24 05:03:40 +00:00
steve c34e318f8c Fix = vs == error. 2002-08-24 05:02:58 +00:00
steve 4fc858b676 Fix missing semi-colon warning. 2002-08-24 05:02:37 +00:00
steve ac8b582b3d Rewire time formatting to handle all cases. 2002-08-24 02:02:44 +00:00
steve 6f748d3d4f Macro arguments not supported. 2002-08-24 00:52:49 +00:00
steve 2854a524f0 Watch signed comparisons, that lead to infinite loops. 2002-08-22 23:34:52 +00:00
steve 985c34bfd9 Fix behavioral eval of x?a:b expressions. 2002-08-22 03:38:40 +00:00
steve 63f97d8ec6 Carry mux output delays. 2002-08-21 02:28:03 +00:00
steve d2ac85e2c7 Copy gate delays when doing gate delay substitutions. 2002-08-20 04:12:22 +00:00
steve 1b42f6232f Support parameters with defined ranges. 2002-08-20 04:11:53 +00:00
steve 4de141ab1d Support parameters with defined ranges. 2002-08-19 02:39:16 +00:00
steve 8ab2ec6f86 Allow release to handle removal of target net. 2002-08-19 00:06:11 +00:00
steve 2fad8d4cff Detect temporaries in sequential block synthesis. 2002-08-18 22:07:16 +00:00
steve d94b0fe3c8 Terminate if the functors signal errors. 2002-08-18 22:06:29 +00:00
steve 98956ef88f Snapshot 20020817 2002-08-18 01:07:05 +00:00
steve ac21d96bd8 x in index values leads to 0. 2002-08-18 01:05:50 +00:00
steve c794aa02b8 Fix intermix of node functors and node delete. 2002-08-16 05:18:27 +00:00
steve dd564ab321 add dumpvars_compiletf to check first argument. 2002-08-15 02:12:20 +00:00
steve c0046e845e Handle special case of empty system task argument list. 2002-08-15 02:11:54 +00:00
steve 640767b748 Constants can self-size themselves in unsized contexts. 2002-08-14 03:57:27 +00:00
steve d4eaede435 Do not elide named blocks. 2002-08-13 05:35:00 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve 9533a8dbdf Escape the backslash in the windows file name. 2002-08-12 01:27:48 +00:00
steve 774f78cd3e Autoconfig ident support. 2002-08-12 00:27:10 +00:00
steve aca1dcf848 Add missing Log and Ident strings. 2002-08-11 23:47:04 +00:00
steve d24cd015b6 Remove VVM option. 2002-08-11 23:39:33 +00:00
steve 4d41525a91 No longer any nead for -rdynamic flag 2002-08-10 22:36:59 +00:00
steve b170a85fef Kill links to vvm. 2002-08-10 22:27:13 +00:00
steve 90c6bc3a61 Add attributes documentation. 2002-08-10 22:27:00 +00:00
steve a4f6217a2f Missing symbols for mingw. 2002-08-10 22:23:22 +00:00
steve faff19af7b vvp.pdf comes from the man page. 2002-08-10 22:12:01 +00:00
steve bc86bd4efa Remove useless error messages. 2002-08-10 22:07:38 +00:00
steve b4b18f3f30 Observe attributes to control synthesis. 2002-08-10 22:07:08 +00:00
steve 1bcacf06d4 The default attribute value is 1. 2002-08-10 21:59:39 +00:00
steve 27178cedda Allow vpiIntegerVar as parameter to $value$plusarg 2002-08-10 17:00:31 +00:00
steve 6151d796a2 More unsupported items in the list. 2002-08-10 16:57:27 +00:00
steve 6ace9659e0 Get local StringHeap.h 2002-08-07 02:36:10 +00:00
steve 14942b4b43 Dead code. 2002-08-07 02:17:14 +00:00
steve 9ede67ea63 List net delays as unsupported. 2002-08-07 02:07:12 +00:00
steve cc74d2a6b0 Add force to nets. 2002-08-07 00:54:39 +00:00
steve ea779ac7dd Documentation, and excessive inlines. 2002-08-07 00:54:20 +00:00
steve 693e9e5ad0 Store only the base name of memories. 2002-08-05 04:18:45 +00:00
steve a1bc8ca6ca Snapshot 20020804 2002-08-04 22:47:23 +00:00
steve 4e753a2c15 dll uses StringHeap for named items. 2002-08-04 19:13:16 +00:00
steve 89314d4772 Do not use hierarchical names of memories to
generate vvp labels. -tdll target does not
 used hierarchical name string to look up the
 memory objects in the design.
2002-08-04 18:28:14 +00:00
steve 41f7ecacfc Eliminate use of ivl_signal_name for signal labels. 2002-08-03 22:30:48 +00:00
steve dd8da912f5 Fix suffix parsing of library index. 2002-08-03 22:30:00 +00:00
steve 65ad911a2a Grammer fixes. 2002-08-02 01:52:02 +00:00
steve 37331d1c1b Add port name to pin size error message. 2002-07-31 23:55:38 +00:00
steve db2c842d15 Account for the tail readonly callbacks. 2002-07-31 03:22:44 +00:00
steve c0e22a6533 Set vpi_mode_flag to represent cpReadOnlySync actions. 2002-07-31 03:22:23 +00:00
steve bb87c368b8 Asynchronous synthesis of sequential blocks. 2002-07-29 00:00:28 +00:00
steve 76665b9404 Fix NetBlock destructor to delete substatements. 2002-07-28 23:58:44 +00:00
steve a265ba2162 dump NOT gates. 2002-07-28 23:57:22 +00:00
steve 461a0fa2fb $attribute deprecation note. 2002-07-26 02:08:02 +00:00
steve e51bbcb85a Add monitoron and monitoroff system tasks. 2002-07-25 03:35:51 +00:00
steve 58ec62c895 Rewrite find_similar_event to support doing
all event matching and replacement in one
 shot, saving time in the scans.
2002-07-24 16:24:45 +00:00
steve 843e1f9c44 Save event matching for nodangle. 2002-07-24 16:22:59 +00:00
steve 45382144c3 Verbose messages. 2002-07-24 16:21:52 +00:00
steve e2f537628f integral type/ptrdiff_t warning. 2002-07-23 15:11:41 +00:00
steve 91baa938e2 Fix display of no arguments. 2002-07-23 02:41:15 +00:00
steve 7fcaeacd65 Careful not to overrun vector buffer. 2002-07-23 02:36:34 +00:00
steve 2478d6f5d3 Set ivl_target delays for case compare logic. 2002-07-22 21:07:40 +00:00
steve fbc1f6fb81 Initialize the lcounter_ to 0. 2002-07-22 21:07:08 +00:00
steve 57aee7ca26 Add vpi_chk_error and vpi_control functions. 2002-07-19 01:57:26 +00:00
steve 2fcfe9f2c3 vpi_iterate returns 0 on error. 2002-07-19 01:12:50 +00:00
steve 2df2619029 Support put of wide vpiVectorVal to signal. 2002-07-19 00:36:36 +00:00
steve 9260d0d245 New e-mail address for Yasuhisa Kato 2002-07-18 02:18:30 +00:00
steve 15becdaee4 Need driver for sure in assign feedback and other cases. 2002-07-18 02:06:37 +00:00
steve 80c9db3c88 Careful with assign to self. 2002-07-18 00:24:22 +00:00
steve c5d03d3a25 Fix uninitialized thread pointer in named event. 2002-07-17 18:30:01 +00:00
steve 9e1570dc80 Implementation of vpi_handle_by_name, and
add the vpiVariables iterator.
2002-07-17 05:13:43 +00:00
steve 68da84e84a Allow wide rvalues assigned to narrow nex_out. 2002-07-16 04:40:48 +00:00
steve 18ba73382e Fix check for select size. 2002-07-16 03:15:11 +00:00
steve dabbfdb80a Fix dangling pointer in pop_scope. 2002-07-15 03:57:30 +00:00
steve 4eea8720a0 Improve temporary file name guess. 2002-07-15 00:33:50 +00:00
steve 41239078a9 Fix initialization of symbol table string heap. 2002-07-15 00:21:42 +00:00
steve e375078dda Infinite loop in nex_input of NetBlock objects. 2002-07-14 23:47:58 +00:00
steve da6b4c447f No longer need the .exe on generated files. 2002-07-14 23:32:31 +00:00
steve b72c0a0089 Do temp file creation by hand. 2002-07-14 23:11:35 +00:00
steve fbaf8f91bb Fix vpiScope iterator. 2002-07-14 02:52:05 +00:00
steve 329e943e4e Use result buf for event and scope names. 2002-07-12 18:23:30 +00:00
steve 31bd3e6056 Use all bits of ?: condit expression. 2002-07-12 18:10:45 +00:00
steve 15b94050ce Remember to scan IntegerVars. 2002-07-12 17:09:21 +00:00
steve c610699227 Eliminate use of vpiInternalScope. 2002-07-12 17:08:13 +00:00
steve f0d2e20342 Scan scope objects before subscopes. 2002-07-12 17:02:38 +00:00
steve 26a80005d6 Fix typo. 2002-07-12 16:30:44 +00:00
steve 5cf033a6ad Remove vvm files from spec file. 2002-07-12 04:05:50 +00:00
steve e41ee7632d Document the IVERILOG_DUMPER variable. 2002-07-12 02:35:35 +00:00
steve 66a86433e7 Make types array static, not on stack. 2002-07-12 02:10:20 +00:00
steve 2354a90e9f Eliminate use of vpiInternalScope. 2002-07-12 02:08:10 +00:00
steve b7aaf51fbd vpiIntegerVars can have callbacks. 2002-07-12 02:07:36 +00:00
steve 5a885165b2 vpi_iterate return null if there is nothing to iterate. 2002-07-12 02:04:44 +00:00
steve a748604418 Library dir case insensitivity includes the suffix. 2002-07-10 04:34:18 +00:00
steve e1a4e27173 Dynamic resizevpi result buf in more places. 2002-07-09 03:24:37 +00:00
steve 2b06a293b6 Fix split of root btree node. 2002-07-09 03:20:51 +00:00
steve 472f98affe Generate code for wide muxes. 2002-07-08 04:04:07 +00:00
steve 8114523be2 Asynchronous synthesis of case statements. 2002-07-07 22:32:15 +00:00
steve 33ee1da817 Smart synthesis of binary AND expressions. 2002-07-07 22:31:39 +00:00
steve 301040a67a Avoid emitting to vvp local net symbols. 2002-07-05 21:26:17 +00:00
steve 54b96ea7bd Count different types of functors. 2002-07-05 20:08:44 +00:00
steve d0dfe2e7e7 Allow set of output name. 2002-07-05 17:17:20 +00:00
steve fd8ceac170 Names of vpi objects allocated as vpip_strings. 2002-07-05 17:14:15 +00:00
steve a05d8c2823 Symbol table uses more efficient key string allocator,
and remove all the symbol tables after compile is done.
2002-07-05 04:40:59 +00:00
steve 626f418ab0 Track opcode memory space. 2002-07-05 03:46:43 +00:00
steve 5792220dcb Remove the vpi object symbol table after compile. 2002-07-05 02:50:57 +00:00
steve 29d5d44f03 More detailed Mac OS X instructions. 2002-07-04 16:37:59 +00:00
steve b2762f63a2 Fix s_vpi_vecval array byte size. 2002-07-04 16:37:07 +00:00
steve 7d97f8a964 initial statements are not asynchronous. 2002-07-04 00:24:16 +00:00
steve d3e63088d8 Dynamic size result buffer for _str and _get_value functions. 2002-07-03 23:39:57 +00:00
steve dddaa0ebcf More configure information in iverilog-vpi. 2002-07-03 23:20:12 +00:00
steve ccbb1e5f5a don't pollute name space
fix vecval for Z/X cases
2002-07-03 23:16:27 +00:00
steve 3f1cd14f6c Fix scope search for events. 2002-07-03 05:34:59 +00:00
steve 70abb2ce5c Clear drive cache on link or unlink. 2002-07-03 03:08:47 +00:00
steve 3f80bead1b vpiName, vpiFullName support in memory types,
length checks for *_get_str() buffers,
 temporary buffers for *_get_str() data,
 dynamic storage for vpi_get_data() in memory types
 shared with signal white space
2002-07-03 02:09:38 +00:00
steve 93bb4283b8 Change the signal to a net when assignments go away. 2002-07-02 03:02:57 +00:00
steve 5b5b31286b Include synth2 in synthesis targets. 2002-07-02 03:02:02 +00:00
steve c5bde6560c Limit word writing to vector limits. 2002-07-01 15:36:12 +00:00
steve cb4eb6236c Ignore generated pdf and ps files. 2002-07-01 03:54:08 +00:00
steve d5e9e13555 synth_asych of if/else requires redirecting the target
if sub-statements. Use NetNet objects to manage the
 situation.
2002-07-01 00:54:21 +00:00
steve 3595b6d186 Carry can propagate to the otp in addi. 2002-07-01 00:52:47 +00:00
steve 210010a390 Get vpiVectorVal for memories. 2002-06-30 04:35:47 +00:00
steve 99b3cc4464 vpiVectorVal of very wide signals. 2002-06-30 02:52:36 +00:00
steve 9b6b081e38 Add structure for asynchronous logic synthesis. 2002-06-30 02:21:31 +00:00
steve b54ee3b1cd Fix mishandling of incorect defparam error message. 2002-06-25 02:39:34 +00:00
steve 9fc4e1eddd Cache calculated driven value. 2002-06-25 01:33:22 +00:00
steve 73cca6ec39 include malloc.h only when available. 2002-06-25 01:33:01 +00:00
steve 58c2e12507 Make link_drive_constant cache its results in
the Nexus, to improve cprop performance.
2002-06-24 01:49:38 +00:00
steve 6dd80611a1 Export ivl_signal_integer fro windows. 2002-06-23 20:41:19 +00:00
steve c2132039d2 Variable substitution in command files. 2002-06-23 20:10:51 +00:00
steve d8d07eb129 trivial performance boost. 2002-06-23 18:23:09 +00:00
steve f9768cd579 spelling error. 2002-06-23 18:22:43 +00:00
steve b6a15b2f4d Wide unary minus in continuous assignments. 2002-06-22 04:22:40 +00:00
steve 5eca5d9948 Carry integerness throughout the compilation. 2002-06-21 04:59:35 +00:00
steve f4a4ee00d0 Add support for special integer vectors. 2002-06-21 04:58:55 +00:00
steve cd94019733 Remove NetTmp and add NetSubnet class. 2002-06-19 04:20:03 +00:00
steve d7fb47268f Shuffle link_drivers_constant for speed. 2002-06-19 04:18:46 +00:00
steve b4b5ac9944 Normalize run-time index expressions for bit selects 2002-06-16 20:39:12 +00:00
steve df0b81d94d Generate runtime code to normalize indices. 2002-06-16 19:19:16 +00:00
steve 067d09720c Rounding error. 2002-06-15 02:35:49 +00:00
steve 870c35eece sign extend signed vectors vpiIntVal. 2002-06-14 22:05:28 +00:00
steve a82c178fd9 Fix expression width for repeat concatenations. 2002-06-14 21:38:41 +00:00
steve 809bd18e66 Uninstall removed ivl from libdir. 2002-06-14 04:17:12 +00:00
steve 4f0ffa2258 Compiler portability. 2002-06-14 03:25:51 +00:00
steve f45b17973c Add acc_fetch_argc/argv/version (mruff) 2002-06-11 15:19:12 +00:00
steve 0bbea355c2 More specify syntax. 2002-06-11 13:58:04 +00:00
steve 2be3507422 Stub value change callbacks for consts and modules. 2002-06-11 03:47:34 +00:00
steve d6c946f390 Spelling patch (Larry Doolittle) 2002-06-11 03:34:33 +00:00
steve 96b6eb6b30 Get tf_asynchon/off name right. 2002-06-11 03:29:14 +00:00
steve 9cef973d9b Add NetRamDq synthsesis from memory l-values. 2002-06-08 23:42:46 +00:00
steve 88722a2831 Add tf_putlongp and tf_putp. 2002-06-07 16:21:12 +00:00
steve d6b5c67313 Add a bunch of acc/tf functions. (mruff) 2002-06-07 02:58:58 +00:00
steve 4fed9d6532 Simply give up on constants with indices. 2002-06-07 02:57:54 +00:00
steve 28e0616543 Use standard name for iostream. 2002-06-06 18:57:18 +00:00
steve 6173e6b78a Better error for identifier index eval. 2002-06-06 18:57:04 +00:00
steve b5018cd994 distclean rm some generated makefiles. 2002-06-06 18:48:02 +00:00
steve f19a7c617d improved uninstall target. 2002-06-05 18:52:14 +00:00
steve 53d8cdd9f8 Add support for memory words in l-value of
non-blocking assignments, and remove the special
 NetAssignMem_ and NetAssignMemNB classes.
2002-06-05 03:44:25 +00:00
steve 4bac5c06ba Dump l-value memory indices. 2002-06-05 03:43:14 +00:00
steve 91a755d0e8 Add support for memory words in l-value of
blocking assignments, and remove the special
 NetAssignMem class.
2002-06-04 05:38:43 +00:00
steve 8cae7a4d44 Add misctf support to libveriuser 2002-06-04 01:42:58 +00:00
steve 11d1c45e45 Add asynchon and asynchoff 2002-06-04 01:40:03 +00:00
steve 5454a15b94 Fix return type of tf_getinstance. 2002-06-03 21:52:59 +00:00
steve 3ad0ec77ce Add verinum != operator. 2002-06-03 04:04:24 +00:00
steve 3966e852ac Ignore memories and named events. 2002-06-03 03:56:06 +00:00
steve 83bfa9345f compile warnings. 2002-06-03 03:55:14 +00:00
steve 7d1d3847d8 Better typing for veriusertfs table. 2002-06-03 00:08:42 +00:00
steve a91c4f66ce Check for null pointers from users. 2002-06-02 19:05:50 +00:00
steve ca2486ea61 Add acc_handle_tfarg and acc_next_topmode 2002-06-02 19:03:29 +00:00
steve 24a2487c18 Generate %cmpi/u where appropriate. 2002-06-02 18:57:17 +00:00
steve d68153dea3 Add %cmpi/u instruction. 2002-06-02 18:55:58 +00:00
steve 89329fc0cc Add tf_getinstance function. 2002-06-02 18:54:59 +00:00
steve cba5a22714 Generate %muli instructions when possible. 2002-05-31 20:04:57 +00:00
steve 1ce50993f0 Add the %muli instruction. 2002-05-31 20:04:22 +00:00
steve 2c0c934ad5 Add tf_getlongtime (mruff) 2002-05-31 18:25:51 +00:00
steve b6db8b63ec Check for and don't dereference null pointers,
Avoid copy of static objects.
 (mruff)
2002-05-31 18:21:39 +00:00
steve f1ab9e63fa Add support for $timeformat. 2002-05-31 04:26:54 +00:00
steve 12c574d5c9 Call padding reserved. 2002-05-31 04:26:44 +00:00
steve af6f0c800f Slight improvement in %mov performance. 2002-05-31 04:09:58 +00:00
steve 48f65cef40 Word oriented bit storage. 2002-05-31 00:05:49 +00:00
steve b5a1d116fa Add the veriusertf_register funciton. 2002-05-30 02:37:26 +00:00
steve b9339d3c60 Add tf_nump from mruff. 2002-05-30 02:12:17 +00:00
steve 0838dd24a4 Add tf_error and tf_warning from mruff 2002-05-30 02:10:08 +00:00
steve 9537fd7f0b Implement acc_product_version. 2002-05-30 02:06:05 +00:00
steve 95876feb46 Use addi with wide immediate values. 2002-05-30 01:57:23 +00:00
steve 19d817503d Offset lvalue index expressions. 2002-05-29 22:05:54 +00:00
steve b6b364a09d Add %addi, which is faster to simulate. 2002-05-29 16:29:34 +00:00
steve f704d4d3ff Use binary search to speed up deep lookups. 2002-05-29 05:37:35 +00:00
steve 450b9ab85c Callbacks can happen during calltf functions. 2002-05-28 22:55:20 +00:00
steve a1774bd3bd ivl indexes the search path for libraries, and
supports case insensitive module-to-file lookup.
2002-05-28 20:46:51 +00:00
steve 5aa69516bb ivl indexes the search path for libraries, and
supports case insensitive module-to-file lookup.
2002-05-28 20:40:37 +00:00
steve c594dcec52 Add new iverilog-vpi man page. 2002-05-28 05:21:30 +00:00
steve 8126384726 ignore generated iverilog-vpi files. 2002-05-28 05:21:13 +00:00
steve 96e6a9b02f Update to new capabilities. 2002-05-28 05:20:41 +00:00
steve d44ff4fd91 Pass library paths through -Cfile instead of command line. 2002-05-28 02:25:03 +00:00
steve 9a4ee873e1 Add the ivl -C flag for bulk configuration
from the driver, and use that to run library
 modules through the preprocessor.
2002-05-28 00:50:39 +00:00
steve 597ed1681a Predefine __ICARUS__ 2002-05-27 23:14:06 +00:00
steve bcd49b94dd Able to disable thread self. 2002-05-27 00:53:10 +00:00
steve 422754f36f Support carrying the scope of named begin-end
blocks down to the code generator, and have
 the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
steve bfad382fd1 Carry Verilog 2001 attributes with processes,
all the way through to the ivl_target API.

 Divide signal reference counts between rval
 and lval references.
2002-05-26 01:39:02 +00:00
steve 8941a594ee include iostream for gcc 3.1 2002-05-25 16:51:37 +00:00
steve 6bd8ab46d5 Eval ^ and &0 expressions. 2002-05-25 16:43:47 +00:00
steve 57f2ad6d15 Better padding of constants. 2002-05-25 16:43:22 +00:00
steve 33efeca0da Only match plusargs. 2002-05-24 21:46:21 +00:00
steve be1888ed5f Implement mc_scan_plusargs. 2002-05-24 20:29:07 +00:00
steve 6ede18d41c support GCC __attributes__ for printf formats. 2002-05-24 19:05:30 +00:00
steve d63e994ea5 Detect long division by zero. 2002-05-24 04:55:13 +00:00
steve 700887d657 Verilog 2001 attriubtes on nets/wires. 2002-05-24 04:36:23 +00:00
steve 42674be38b Support language generation flag -g. 2002-05-24 01:13:00 +00:00
steve fde7cd8f10 Add support for $bits (SystemVerilog) 2002-05-24 00:44:54 +00:00
steve 7ce713356e Define SIZEOF_UNSIGNED_LONG_LONG 2002-05-24 00:43:16 +00:00
steve 6511fc610b Add the acc_user.h header file. 2002-05-23 03:46:42 +00:00
steve 8dd4f77f3f Add the io_printf function to libveriuser. 2002-05-23 03:35:42 +00:00
steve 004bfad348 Link the veriuser library. 2002-05-23 03:35:05 +00:00
steve ff90a5735d Export the vpi_vprintf function. 2002-05-23 03:34:46 +00:00
steve e6c0629626 Add language support for Verilog-2001 attribute
syntax. Hook this support into existing $attribute
 handling, and add number and void value types.

 Add to the ivl_target API new functions for access
 of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
steve 01efffedfc Ignore Named events in vcd signal scan. 2002-05-23 01:07:26 +00:00
steve 74c219f171 Add ranges and signed to port list declarations. 2002-05-20 02:06:01 +00:00
steve bf10c5762a Parse port_declaration_lists from the 2001 Standard. 2002-05-19 23:37:28 +00:00
steve ca9abaf0c5 Start the libveriuser library. 2002-05-19 05:21:00 +00:00
steve cfab250671 Add callbacks for vpiNamedEvent objects. 2002-05-19 05:18:16 +00:00
steve b1c0f7306d Add vpi support for named events.
Add vpi_mode_flag to track the mode of the
 vpi engine. This is for error checking.
2002-05-18 02:34:11 +00:00
steve a156d8b8ce Add vpiIndex update. 2002-05-17 16:13:08 +00:00
steve a7b7781fe9 Rewire vpiMemory and vpiMemoryWord handles to
support proper iteration of words, and the
 vpiIndex value.
2002-05-17 04:12:19 +00:00
steve 21fe6afe8d null terminate the reversed decimal string 2002-05-17 04:05:38 +00:00
steve 48da46986b Support set by string for reg objects. 2002-05-15 04:48:46 +00:00
steve 8d6239301f Count compile errors. 2002-05-15 01:25:25 +00:00
steve 2e6807493f Make clean should remove iverilog-vpi. 2002-05-15 01:25:07 +00:00
steve 94cef20e49 task calls and forks push the thread event in the queue. 2002-05-12 23:44:41 +00:00
steve c787a36af2 Accept errors in memory index expression. 2002-05-12 19:16:58 +00:00
steve da0c4c7565 Get thread vectors by vpiIntVal. 2002-05-12 00:32:21 +00:00
steve 9c28f085d8 Set and get memory words by string value. 2002-05-11 04:39:35 +00:00
steve e9af0c7485 Support scope iterate over vpiNet,vpiReg/vpiMemory. 2002-05-10 16:00:57 +00:00
steve be54bfdc21 ignore vpiMemory objects in vcd dumper. 2002-05-10 16:00:16 +00:00
steve c6a6f4bc79 Allow for C++ source files. 2002-05-10 03:54:46 +00:00
steve 88ae1b7b3c Handle null time and calltf pointers. 2002-05-09 03:34:31 +00:00
steve f5d3b78653 Use else clause instead of ! to preface wait events. 2002-05-07 05:06:07 +00:00
steve 68f1316eba Fix uninitialized memory accesses. 2002-05-07 04:15:43 +00:00
steve e70e04d6e8 Handle x case of unary ! properly. 2002-05-07 03:49:58 +00:00
steve a3eb6868ea Allow parameters in concatenation of widths are defined. 2002-05-06 02:30:27 +00:00
steve 186759c95e Do not need mangle.o unless vvm us used. 2002-05-06 00:50:38 +00:00
steve 8667b9a35d Put off evaluation of concatenation repeat expresions
until after parameters are defined. This allows parms
 to be used in repeat expresions.

 Add the builtin $signed system function.
2002-05-05 21:11:49 +00:00
steve 00defb0265 Credit for Mike Ruff amd Mike Runyan. 2002-05-04 03:19:35 +00:00
steve 822a085d97 Properly free vpi callback objects. 2002-05-04 03:17:29 +00:00
steve f23aec7f14 Add simulator event callbacks. 2002-05-04 03:03:17 +00:00
steve fb457128bf Add vpiModule iterator to vpiScope objects. 2002-05-03 15:44:11 +00:00
steve d126a414bd Spelling errors. 2002-04-30 04:26:42 +00:00
steve 844fe3b9bc Trim leading nulls from string forms. 2002-04-27 23:26:24 +00:00
steve 271855377f Support drawing vpiBinaryConst in hex. 2002-04-27 22:36:39 +00:00
steve 84020b16e3 Preserve stringiness string part select and concatenation. 2002-04-27 05:03:46 +00:00
steve c6035ab06e If the verinum is already right, no need to reset it. 2002-04-27 04:49:27 +00:00
steve d94a40ecd9 Display string verinums as strings. 2002-04-27 04:48:43 +00:00
steve c3be17ccae Dump parametres for system functions. 2002-04-27 04:20:52 +00:00
steve 10dc978778 Fixup eval of signed constants. 2002-04-27 03:17:15 +00:00
steve 7f8f0eb65a Support selecting bits from parameters. 2002-04-27 02:38:04 +00:00
steve c7107dc973 Evaluate constant bit select of constants. 2002-04-25 05:04:31 +00:00
steve 74eb544962 Dump bit select expressions. 2002-04-25 05:03:11 +00:00
steve 0696e3d558 Agressively evalutate case expressions. 2002-04-24 17:40:48 +00:00
steve 714ca3542d Fix compile time eval of signed <= signed. 2002-04-24 02:47:02 +00:00
steve 7e27217dac add -Wno- arguments to the driver. 2002-04-24 02:02:31 +00:00
steve 4a7e14786c Tail size was wrong. 2002-04-23 05:18:05 +00:00
steve 1ddb736f4c Handle bitsel muxes of odd shaped outputs. 2002-04-23 05:06:31 +00:00
steve 9ef49379f4 Add support for non-constant bit select. 2002-04-23 03:53:59 +00:00
steve 96213fe0ac Keep delays applied to BUFZ devices. 2002-04-22 03:15:25 +00:00
steve d482da4803 Reduce the while loop expression if needed. 2002-04-22 02:41:30 +00:00
steve 4502da608d Dump the while loop expression. 2002-04-22 02:40:32 +00:00
steve 0976fd393b Do not allow implicit wires in sensitivity lists. 2002-04-22 00:53:39 +00:00
steve 5882c6a481 Redo handling of assignment internal delays.
Leave it possible for them to be calculated
 at run time.
2002-04-21 22:31:02 +00:00
steve 52ea13819a Add the assign/d instruction for computed delays. 2002-04-21 22:29:49 +00:00
steve 048d044fdc Functions really do work. 2002-04-21 22:29:19 +00:00
steve 9dda15a186 implement nex_input for behavioral statements. 2002-04-21 17:43:12 +00:00
steve b094bbdcf4 Add support for conbinational events by finding
the inputs to expressions and some statements.
 Get case and assignment statements working.
2002-04-21 04:59:07 +00:00
steve eb708c1540 Support specified times in cbReadOnlySync, and
add support for cbReadWriteSync.
 Keep simulation time in a 64bit number.
2002-04-20 04:33:23 +00:00
steve 47a3b1f744 the command is gtkwave. 2002-04-20 02:42:58 +00:00
steve 76b5d7e9e1 Fix first_file test for timescale warning. 2002-04-18 18:38:37 +00:00
steve 0071c9b0aa More examples. 2002-04-18 03:25:16 +00:00
steve 0ab42597d9 Timescale warnings. 2002-04-15 00:04:22 +00:00
steve 95ccc1e904 lexor support for huge decimal numbers. 2002-04-14 21:42:01 +00:00
steve ea44866b2f Evaluate logical not at elaboration time. 2002-04-14 21:16:48 +00:00
steve 6d4c6b56f6 Fix constant evaluation of unary 2002-04-14 19:28:47 +00:00
steve f03ec88c2a Handle empty true case of conditional statements. 2002-04-14 19:19:21 +00:00
steve e630ecdb0d Ternary expressions can be signed. 2002-04-14 19:02:34 +00:00
steve eb27dc8db3 Support signed integer division. 2002-04-14 18:41:34 +00:00
steve 5cf7355c91 Precalculate unary - if possible. 2002-04-14 03:55:25 +00:00
steve 84bf0cee59 Vector constants to vpi_call can have sign. 2002-04-14 03:54:40 +00:00
steve a18662ed13 Allow signed constant vectors for call_vpi parameters. 2002-04-14 03:53:20 +00:00
steve 3275d1f252 Support signed expressions through to VPI. 2002-04-14 02:56:19 +00:00
steve b14a0b885a Fix bug removing pairs of ones in XOR. 2002-04-14 02:51:37 +00:00
steve e95a902b3d Show unary subexpressions. 2002-04-14 02:44:53 +00:00
steve 6733f7625b Detect missing indices to memories (PR#421) 2002-04-13 02:33:17 +00:00
steve f7f61a8696 Detect mismatches in reg as module items and ports. 2002-04-12 02:57:08 +00:00
steve e1a6bb10de Formally define extended arguments to vvp. 2002-04-12 02:44:02 +00:00
steve 07bee5ca72 Add $plusargs system functions. 2002-04-07 04:37:53 +00:00
steve fa97ba0d9a Set vpip_cur_task while calling compileft 2002-04-07 02:34:10 +00:00
steve bc95b02854 make install for iverilog-vpi 2002-04-07 00:50:13 +00:00
steve 1893e7c8e5 Add the iverilog-vpi command. 2002-04-07 00:47:10 +00:00
steve 0c04e2976b minor cleanup of formatting. 2002-04-07 00:46:21 +00:00
steve ac4fbb3e41 allow runtime selection of VCD vs LXT. 2002-04-06 21:33:29 +00:00
steve c98c24b9ff cbValueChange automatically replays. 2002-04-06 20:25:45 +00:00
steve 284c6fd85d Add dependency generation. 2002-04-04 05:26:13 +00:00
steve 3c8551ce90 Update for gcc 3.0 2002-03-31 04:07:40 +00:00
steve 65159a2733 Update for newer bison. 2002-03-31 04:06:49 +00:00
steve 007d702223 Notes about scheduling 2002-03-31 01:54:13 +00:00
steve 362b2aa604 vpip_bits_to_dec_str takes a bit array in a specific format. 2002-03-18 05:33:24 +00:00
steve de252965ac Add the .ufunc statement. 2002-03-18 00:19:34 +00:00
steve 7349a6beaf Generate port information in the .ufunc statement. 2002-03-18 00:18:50 +00:00
steve 828ca0ef9d Add API to support user defined function. 2002-03-17 19:30:20 +00:00
steve f5049c2f14 Do not push values through logic gates. 2002-03-17 05:48:49 +00:00
steve f77c7f3d18 Clean up edge detection code. 2002-03-17 03:24:34 +00:00
steve f75fb3cd95 Force the push flags to be explicit. 2002-03-17 03:23:10 +00:00
steve 8b9c26598a Patch to allow user to set place for temporary files. 2002-03-15 23:27:42 +00:00
steve 53600d3361 Pass the %f flag for the -tpal target. 2002-03-09 22:31:48 +00:00
steve 0dc5e5e29d Add LXT dumper support. (Anthony Bybell) 2002-03-09 21:54:48 +00:00
steve eae9153b40 Parse multiline definitions. 2002-03-09 06:37:49 +00:00
steve 3d646aa92c Constant expressions are not l-values for task ports. 2002-03-09 04:02:26 +00:00
steve b7c2bd4f72 Add the NetUserFunc netlist node. 2002-03-09 02:10:22 +00:00
steve b0a489fb7f Debug code for write to constants. 2002-03-08 05:41:45 +00:00
steve 01b9d5e023 Better linker error messages. 2002-03-05 05:31:52 +00:00
steve 6fa9415482 Initialize all the codes tables. 2002-03-01 05:43:59 +00:00
steve c159ff3134 Add cleanup to verbose messages. 2002-03-01 05:43:14 +00:00
steve efa5338e3b out-of-memory asserts. 2002-03-01 05:42:50 +00:00
steve 6dcf880482 carriage return is white space. 2002-02-27 05:46:33 +00:00
steve b5fbb82ba1 Make vvm optional, normally off. 2002-02-16 03:18:53 +00:00
steve ba8465abd2 Support pragma comments. 2002-02-15 05:20:58 +00:00
steve 0964dd99c5 Add writememb (Tom Verbeure) 2002-02-06 04:50:22 +00:00
steve a6a78f5776 Detect and skip suppressed values in display 2002-02-06 04:50:04 +00:00
steve 23f73390a4 support x and z in memory word binary values. 2002-02-06 04:49:24 +00:00
steve d55a890fdd get bin or hex string values of memory words. 2002-02-06 04:48:34 +00:00
steve 84de8f2b93 Add fpga.tgt to the file list. 2002-02-04 01:31:02 +00:00
steve 08dac488c1 Release 0.6 updates. 2002-02-04 00:48:30 +00:00
steve f2cff31b6e Clean up warnings. 2002-02-04 00:41:34 +00:00
steve 7c3f5c9fae Support print of version number. 2002-02-03 07:05:36 +00:00
steve aa16e82102 Fix parameter bit select check for magic constants. 2002-02-03 05:53:00 +00:00
steve ddd3566d50 Add CVS tokens. 2002-02-03 05:51:31 +00:00
steve ec82af0c74 Use Larrys bits-to-decimal-string code. 2002-02-03 01:01:51 +00:00
steve 78bb3d6f09 Comments about xor evaluation. 2002-02-03 00:06:28 +00:00
steve 54dab22042 event find_similar should not find self. 2002-02-02 06:13:38 +00:00
steve 9756cb6382 Propagate sign in unary minus. 2002-02-01 05:09:14 +00:00
steve 9fa0f95003 Full support for $readmem ranges (Tom Verbeure) 2002-01-31 04:28:17 +00:00
steve a624021a2e Detect duplicate port declarations. 2002-01-31 04:10:15 +00:00
steve 928df5caf7 include config.h to eliminate warnings. 2002-01-29 22:36:31 +00:00
steve 5796524f06 Add ne_expr.cc 2002-01-28 01:39:45 +00:00
steve b761a105b3 release candidate 0.6 2002-01-28 01:33:54 +00:00
steve 364ffc9024 Add support for bit select of parameters.
This leads to a NetESelect node and the
 vvp code generator to support that.
2002-01-28 00:52:41 +00:00
steve 712080f7e0 Detect scalar/vector declarion mismatch. 2002-01-26 05:28:28 +00:00
steve b906f4c0a1 Handle x in l-value of set/x 2002-01-26 02:08:07 +00:00
steve d48bb4d744 Tell check target where to find system.vpi. 2002-01-25 03:25:16 +00:00
steve d67ad166cd Support display of strings with umber formats. (Tom Verbeure) 2002-01-25 03:24:19 +00:00
steve 4e286ea86b Add the vpiLeft.. and vpiRightRange constants 2002-01-24 04:19:39 +00:00
steve a9be4e009f Spelling in comment. 2002-01-24 04:17:46 +00:00
steve 2f05d4b227 bison 1.31 doesnot include stdio.h 2002-01-24 03:57:45 +00:00
steve 0b68639f7d elaborate deassign lval as done for assign. 2002-01-23 05:56:22 +00:00
steve 5f09e01a44 No implicit declaration in assign l-values. 2002-01-23 05:23:17 +00:00
steve 6a98764b3b Load modules with RTLD_LAZY 2002-01-23 04:54:37 +00:00
steve 853c1f4387 Detect incorrect function ports. 2002-01-23 03:35:17 +00:00
steve b99c5aa394 Update for 0.6 release 2002-01-23 02:43:14 +00:00
steve 349be0f169 Precalculate constant results of memory index expressions. 2002-01-22 01:40:04 +00:00
steve 4f28f6a770 Better calcuation of dec string width (Larry Doolittle) 2002-01-22 00:18:10 +00:00
steve fcf64c0c38 More space efficient use of constant strings (Larry Doolittle) 2002-01-22 00:06:56 +00:00
steve da8d59757e return calculated oval from UDP (Stephan Boettcher) 2002-01-20 23:27:51 +00:00
steve a02cfe0f1b Evaluate case guards, if possible. 2002-01-19 20:09:56 +00:00
steve f3255121a2 Spelling fixes. 2002-01-19 19:22:39 +00:00
steve 608555ce7e Pass back target errors processing conditionals. 2002-01-19 19:02:08 +00:00
steve ec8b6e126e Default widths pad out as per the standard,
add $displayb/o/h et al., and some better
 error messages for incorrect formats.
2002-01-15 03:23:34 +00:00
steve a697157257 Support DesSTrVal for binary constants. 2002-01-15 03:21:18 +00:00
steve ec070ee65b Support vpiSize and vpiSigned for time objects. 2002-01-15 03:06:29 +00:00
steve 02f5ccd5d9 Handle constants with drive strength z 2002-01-12 17:49:41 +00:00
steve 361d4f2147 Drive strengths for continuous assignments. 2002-01-12 04:03:39 +00:00
steve c09a148cd9 Make BUFZ device strengths available. 2002-01-12 04:03:09 +00:00
steve b274dada85 Support the BUFZ logic device. 2002-01-12 04:02:16 +00:00
steve c6a937e2e7 The stime system function is 32bits. 2002-01-11 05:25:45 +00:00
steve 5840368f2d Handle certain special cases of stime. 2002-01-11 05:23:05 +00:00
steve dee52dd2d0 Magic stime object support. 2002-01-11 05:21:47 +00:00
steve a0e3b3386d Add the stime system function. 2002-01-11 05:20:59 +00:00
steve 6535b48c1c Add the %c format, and some warning messages. 2002-01-11 04:48:01 +00:00
steve 4d3611c5f1 odd width thread vectors as strings. 2002-01-10 01:54:04 +00:00
steve 77c4c88a4c String prints of non-round vectors (PR378) 2002-01-09 03:29:12 +00:00
steve 4291866b9f Add vpi_get_vlog_info support. 2002-01-09 03:15:23 +00:00
steve 8aef782411 Make lexor_keyword.cc for distributions. 2002-01-07 04:59:21 +00:00
steve 0aa033ddf3 Support scope for functors. (Stephan Boettcher) 2002-01-06 17:50:50 +00:00
steve edba542c7a Feedback output, not propagated output. (Stephan Boettcher) 2002-01-06 17:35:01 +00:00
steve 0e5289b022 Print a useful message for failed include file. 2002-01-06 04:51:31 +00:00
steve 6be3be0f16 Constant values have drive strengths. 2002-01-06 03:15:43 +00:00
steve 03d188fc52 Support weak functor inputs. 2002-01-06 03:15:13 +00:00
steve 6e1e658922 VPI access to root module scopes. 2002-01-06 00:48:39 +00:00
steve a87575a76e make check uses vvp instead of vvm. 2002-01-05 04:36:43 +00:00
steve 336624c7b9 include malloc.h only when available. 2002-01-05 04:36:06 +00:00
steve 71660fbaa5 Implement vpi_mcd_printf. 2002-01-04 02:26:36 +00:00
steve dd79885f6d Add structural modulus support down to vvp. 2002-01-03 04:19:01 +00:00
steve 51ffeb7c06 Use my own cfltype to defend against bison 1.30. 2002-01-02 02:39:34 +00:00
steve 912749342c Parse combinational event delay. 2001-12-31 05:23:13 +00:00
steve 4bb91c4f98 Elaborate multiply nets with constant operands ad NetConst. 2001-12-31 04:23:59 +00:00
steve 400580179f Get sense of 1-bit == operator right. 2001-12-31 01:56:08 +00:00
steve c9d6b5431d Remove test print 2001-12-31 00:39:20 +00:00
steve 51db00fb44 Support $signed cast of expressions. 2001-12-31 00:08:14 +00:00
steve e20acfc9f9 Include s indicator in dump of signed numbers. 2001-12-31 00:02:33 +00:00
steve a3fe753826 Account for negatives in cmp/s 2001-12-31 00:01:16 +00:00
steve 03aebd7525 Support elaborate_net for PEString objects. 2001-12-30 21:32:03 +00:00
steve fd5c0cfa28 Support vpiStringVal in vhtread vectors. 2001-12-30 21:31:38 +00:00
steve 357a0ff23e Detect bison and flex in configure.in 2001-12-30 17:20:33 +00:00
steve 1a22f37d92 Synthesize reduction logic. 2001-12-30 17:06:52 +00:00
steve a5890b914f Properly handle empty target in positionla parameter override. 2001-12-30 04:47:57 +00:00
steve b397b10104 Evaluate constant unary minus. 2001-12-30 00:39:25 +00:00
steve 5de8e0555c push events through event/or lists. 2001-12-29 23:59:06 +00:00
steve 91b01cd67e constant eval of arithmetic with x and z. 2001-12-29 22:10:10 +00:00
steve 9c6b17c887 Allow escaped $ in identifiers. 2001-12-29 20:41:30 +00:00
steve 000d187c94 Do not delete delay expressions of UDP instances. 2001-12-29 20:19:31 +00:00
steve 989e9d4d94 Newline can terminate escaped names. 2001-12-29 19:00:13 +00:00
steve 40ef704cc3 Evaluate constant right shifts. 2001-12-29 00:43:55 +00:00
steve 7c9fe0c173 clarify bufif output strenghts. 2001-12-19 23:43:03 +00:00
steve dddbeb957a Comments about MUX synthesis. 2001-12-18 05:34:02 +00:00
steve fd0cb30a4d Improved functor debug dumps. 2001-12-18 05:32:11 +00:00
steve 125c631091 Remove result length restrictions for vpi_get_value. 2001-12-18 05:31:54 +00:00
steve 443dc7853f Include config.h for namespace declaration. 2001-12-18 04:52:45 +00:00
steve a5400d7212 Support all 3 TRI net types. 2001-12-15 02:13:33 +00:00
steve da09d4c6e6 The IVL_SIT_WIRE type does not exist, it is a
synonym for IVL_SIT_TRI.
2001-12-15 02:13:17 +00:00
steve ace6b0a767 Give tri0 and tri1 their proper strengths. 2001-12-15 02:11:51 +00:00
steve 7d494fd3d5 Support tri0 and tri1 resolvers. 2001-12-15 01:54:38 +00:00
steve cd1524e6ca Generate notif functors. 2001-12-14 06:03:34 +00:00
steve a0526cdd32 Arrange bufif to support notif as well. 2001-12-14 06:03:17 +00:00
steve 4dd5f97a96 Parse and handle drive strengths of gates to vvp. 2001-12-14 02:05:13 +00:00
steve 1ca6fe5519 Support strength syntax on functors. 2001-12-14 02:04:49 +00:00
steve 6b2c604124 Better variable names for functor chunks. 2001-12-14 01:59:28 +00:00
steve e42775ea7f support toupper and tolower of file names. 2001-12-08 04:13:07 +00:00
steve a8c4729cf5 vpi_put_value of vpiIntVal for memory words. 2001-12-07 23:23:05 +00:00
steve c200c0c20e Support integer for function return value. 2001-12-07 05:03:13 +00:00
steve 4b174fd996 Forgot to evaluate UDP delays. 2001-12-06 05:04:49 +00:00
steve dbf5509f4f Support delays on UDP instances. 2001-12-06 04:44:11 +00:00
steve ec4f8c80d5 Support functor delays for gates and UDP devices.
(Stephan Boettcher)
2001-12-06 03:31:24 +00:00
steve c8319bcc02 Add ivl_logic_delay function to ivl_target. 2001-12-06 03:11:00 +00:00
steve 7bf480be9a Some bison versions choose different output names. 2001-12-06 02:55:24 +00:00
steve 2d3e85d941 Make sure fork labels are globally unique. 2001-12-05 05:41:20 +00:00
steve ab6c8cb4b8 Parser and pform use hierarchical names as hname_t
objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
steve 33c7c47f73 Handle index identifiers in simple paths. 2001-12-01 02:42:39 +00:00
steve 64d7b1cee5 Support addresses in readmemh. 2001-12-01 02:40:10 +00:00
steve 0cebef872a Better synthesys of DFF w/ complex l-values. (Larry Doolittle) 2001-11-30 01:22:21 +00:00
steve 65f835f3eb Properly parse net_decl assignments with delays. 2001-11-29 17:37:51 +00:00
steve 8309c1f673 Preserve the text after ifdefs in the output. 2001-11-29 02:26:25 +00:00
steve e85347bf8b Handle part selects in l-values of DFF devices. 2001-11-29 01:58:18 +00:00
steve 86a4512848 Restore -Fxnfio to -txnf target. 2001-11-29 01:06:51 +00:00
steve 82831ea9a5 Use NetScope instead of string for scope path. 2001-11-22 06:20:59 +00:00
steve 98c145c3b6 Ignore foo and a.out. 2001-11-22 06:20:32 +00:00
steve a50fe36ef8 Ignore foo and a.out. 2001-11-22 04:44:23 +00:00
steve 7cbd710f7b Remove diag print. 2001-11-21 02:59:27 +00:00
steve 39ef2b7605 Pass list of file to ivlpp via temporary file. 2001-11-21 02:20:34 +00:00
steve da4901bb17 Close library files after parsing. 2001-11-20 23:36:34 +00:00
steve f28f5e01e5 Unary reduction operators are all 1-bit results. 2001-11-19 04:26:46 +00:00
steve e00aedd99b Handle padding out of logical values. 2001-11-19 04:25:46 +00:00
steve 9d1a81ce2c Handle division and modulus by zero while
evaluating run-time constants.
2001-11-19 02:54:12 +00:00
steve cfed3933fa Port close cropping behavior from mcrgb
Move window array reset to libmc.
2001-11-19 01:54:14 +00:00
steve 659624c71f Print typename is fallback expression node dump. 2001-11-19 01:46:38 +00:00
steve 6e0b77a8da Generate force code for variable l-values. 2001-11-18 01:28:18 +00:00
steve 54bb59ae99 Support compile on MacosX 10.1.1 (Timothy J. Wood) 2001-11-17 17:57:58 +00:00
steve cac941b272 More spelling. 2001-11-17 17:45:37 +00:00
steve 0be48388c2 Add support for +libext+ in command files. 2001-11-16 05:07:19 +00:00
steve d8970752b6 include stdlib.h for portability. 2001-11-16 04:22:27 +00:00
steve 08f0f5a1f7 DLL target support for force and release. 2001-11-14 03:28:49 +00:00
steve f8162be8c3 Describe +incdir and +define. 2001-11-14 03:28:15 +00:00
steve f50074de50 The +incdir+ plusarg can take multiple directores,
and add initial support for +define+ in the command file.
2001-11-13 03:30:26 +00:00
steve 9866fd01bd Support +incdir in command files, and ignore other
+args flags. Also ignore -a and -v flags.
2001-11-12 18:47:32 +00:00
steve d1ad10c90f More sophisticated command file parser. 2001-11-12 01:26:36 +00:00
steve 0045d7d1bf Remov XNF dead wood. 2001-11-11 00:10:05 +00:00
steve 4a74ae1795 Runtime support for functor delays. (Stephan Boettcher) 2001-11-10 18:07:11 +00:00
steve 4d0b840c26 Coerse input to inout when assigned to. 2001-11-10 02:08:49 +00:00
steve 0c7335a77d Spelling errors. 2001-11-09 03:43:26 +00:00
steve 7e8a538c20 Support $writememh 2001-11-09 03:39:21 +00:00
steve aca5afa95c Support vpiIntVal from memory. 2001-11-09 03:39:07 +00:00
steve 7793a49854 Remove string paths from PExpr elaboration. 2001-11-08 05:15:50 +00:00
steve 6bfbcbdcf7 elaborate_lnet uses scope instead of string path. 2001-11-07 04:26:46 +00:00
steve bf72f39fe9 eval_const uses scope instead of a string path. 2001-11-07 04:01:59 +00:00
steve fa23dafdae Use functor pointers where vvp_ipoint_t is unneeded. 2001-11-07 03:34:41 +00:00
steve 9572ddd7e8 Support more real arithmetic in delay constants. 2001-11-06 06:11:55 +00:00
steve 1ff36dc892 shift expressions can have definite widths. 2001-11-06 04:32:37 +00:00
steve bf9a8f5021 Code rearrange. (Stephan Boettcher) 2001-11-06 03:07:21 +00:00
steve 0c4bea473c Parse specparam parsepulse assignments. 2001-11-06 02:52:19 +00:00
steve 649428962e Pad limited r-values in continuous assignments. 2001-11-04 23:12:29 +00:00
steve cc5ddc0b6b MacOSX 10.1 updates. 2001-11-04 05:03:21 +00:00
steve b624b6002e Parse more [gosh darn] specify syntax. 2001-11-03 04:09:10 +00:00
steve af35736e04 initialize scope for %m in $fdisplay. 2001-11-02 05:56:47 +00:00
steve 58b5b583a7 Comment the scope type parser. 2001-11-02 05:43:11 +00:00
steve 9e385e6947 Implement split_node for symbol table (hendrik) 2001-11-02 04:48:03 +00:00
steve 560c003e03 make fork label into complete statemnt. 2001-11-01 19:31:40 +00:00
steve 1d045eea0d Catch ports that have no direction. 2001-11-01 05:21:26 +00:00
steve 7a0e73ef3d Handle procedural constant functor pointers. 2001-11-01 04:42:39 +00:00
steve 5d20dd63ec Generate code for deassign and cassign. 2001-11-01 04:26:57 +00:00
steve ab9a853d52 ivl_target support for cassign. 2001-11-01 04:25:31 +00:00
steve 82c0a2ebac Add force/cassign/release/deassign support. (Stephan Boettcher) 2001-11-01 03:00:19 +00:00
steve 75e78e86d3 ivl_target support for assign/deassign. 2001-10-31 05:24:52 +00:00
steve a75326e2e0 Rewrite the functor type to have fewer functor modes,
and use objects to manage the different types.
 (Stephan Boettcher)
2001-10-31 04:27:46 +00:00
steve b3e430c751 Give up if roots are missing. 2001-10-31 03:22:31 +00:00
steve faa3a62259 detect module ports not declared within the module. 2001-10-31 03:11:15 +00:00
steve 438605fad5 Account for new scope type syntax on scope. 2001-10-31 03:07:11 +00:00
steve 9505b586bf Generate IEEE1364-2000 line directives. 2001-10-30 21:53:27 +00:00
steve 40e7bc2450 line number in line directive is for the *next* line. 2001-10-30 21:46:56 +00:00
steve a9aaca1ffa Add ifndef support. 2001-10-30 20:48:55 +00:00
steve ce61d12f60 Stubs for assign/deassign for t-dll. 2001-10-30 02:52:07 +00:00
steve 874bab10e4 NetObj constructor finally requires a scope. 2001-10-28 01:14:53 +00:00
steve 21194c909a Propagate functor push, to make assign better. 2001-10-27 03:43:56 +00:00
steve 96a50d635d Minor rework of summation carry propagation (Stephan Boettcher) 2001-10-27 03:22:26 +00:00
steve 8c9e0bafa9 more specify syntax (Stehpan Boettcher) 2001-10-26 03:22:56 +00:00
steve b3bb79992a const/non-const warnings. (Stephan Boettcher) 2001-10-26 02:29:10 +00:00
steve 4e92501864 VPI support for callback to return values. 2001-10-25 04:19:53 +00:00
steve d83fb10774 The ! expression returns 0 to x and z values. 2001-10-24 05:06:54 +00:00
steve 5a6cca33a0 Write resolvers before the .functor (PR#300) 2001-10-24 03:43:45 +00:00
steve b2f6953259 npmos outputs have 3bit strengths, not 2. 2001-10-24 03:18:52 +00:00
steve b1f1f74920 Support bit selects of non-0 lsb for vectors. 2001-10-23 04:22:41 +00:00
steve 2adea8de48 Fix carry between works for %add instruction. 2001-10-23 03:49:13 +00:00
steve 859318becd The -s flag can now be repeated on the iverilog command. 2001-10-23 00:37:29 +00:00
steve 55fb219503 document the -y flag. 2001-10-23 00:36:54 +00:00
steve b01316ce12 Better error message for mising root module. 2001-10-22 23:26:37 +00:00
steve 1921e19635 fix constant overrun in | operands. 2001-10-22 15:31:21 +00:00
steve 990df42407 Handle activating tasks in another root. 2001-10-22 02:05:20 +00:00
steve 924b4e0062 unused idx warning. 2001-10-22 02:04:37 +00:00
steve 0e43dfb285 Remove useless code for drawing .var inputs. 2001-10-22 00:04:51 +00:00
steve 46621d3c83 wrong variable for clk input to memory. 2001-10-21 23:38:16 +00:00
steve fa95f7ff3b Kill const-nonconst warning. 2001-10-21 23:37:49 +00:00
steve e45546e6f3 Install pdf version of the man pages. 2001-10-21 21:59:49 +00:00
steve d79d48ffeb clean up API for restarting parser. 2001-10-21 20:18:56 +00:00
steve 467ecf5b33 Error messages for missing UDP port declarations. 2001-10-21 01:55:24 +00:00
steve 9f3e64e11a Module types in pform are char* instead of string. 2001-10-21 00:42:47 +00:00
steve 56954356db Catch and X division by 0. 2001-10-20 23:20:32 +00:00
steve 6466d02eda Add automatic module libraries. 2001-10-20 23:02:39 +00:00
steve 7a149a6943 Scope/module names are char* instead of string. 2001-10-20 05:21:51 +00:00
steve acf3a4ec16 Print memory usage information if requested (Stephan Boettcher) 2001-10-20 01:03:42 +00:00
steve 5c4b87675f Evaluate constant == when operands differ in width. 2001-10-20 00:11:24 +00:00
steve 83d3a60d5c Add trailing ; to fork-join out labels. 2001-10-19 23:52:36 +00:00
steve 3e4eb17b15 Another go at getting link of ivl.exe right. 2001-10-19 23:15:01 +00:00
steve 1075b28f26 export the ivl_design_roots function. 2001-10-19 23:14:46 +00:00
steve 943527c526 Fix memory fault with -c flag. 2001-10-19 23:10:08 +00:00
steve d350620315 Support multiple root modules (Philip Blundell) 2001-10-19 21:53:24 +00:00
steve 6fc556cefc Method to get the type_ member 2001-10-19 01:55:32 +00:00
steve 73283768a5 Support rnpmos devices. (Philip Blundell) 2001-10-18 17:30:25 +00:00
steve ce7d64f427 Evaluate string expressions (Philip Blundell) 2001-10-18 16:41:49 +00:00
steve 84b70be7ee Include HAVE_SYS_WAIT in config.h (PR#306) 2001-10-18 16:16:23 +00:00
steve 3924c51097 Support vpiVectorVal for signals. (Philip Blundell) 2001-10-18 04:52:31 +00:00
steve 4bb1bd4315 Get Division error into the division method! 2001-10-16 03:10:20 +00:00
steve 0164ad78be Catch division by zero in .arith/div. 2001-10-16 03:06:18 +00:00
steve 36e1eab3f4 Add arith/div object. 2001-10-16 02:47:37 +00:00
steve 177fa4062b Support IVL_LPM_DIVIDE for structural divide. 2001-10-16 02:19:26 +00:00
steve 821c68696d Generate %div instructions for binary /. 2001-10-16 01:27:17 +00:00
steve a3217db7b2 Add %div support (Anthony Bybell) 2001-10-16 01:26:54 +00:00
steve 42dab181cd Carry the type of the scope (Stephan Boettcher) 2001-10-15 02:58:27 +00:00
steve 98d71de50f sign warning. 2001-10-15 02:55:03 +00:00
steve c596e1cda1 Include scope information in VCD output. 2001-10-15 01:50:23 +00:00
steve 706f2ffc89 Support getting scope of scope, and scope of signals. 2001-10-15 01:49:50 +00:00
steve a7054a91e5 libiberty is needed for mingw, and useable under cygwin. 2001-10-14 19:54:05 +00:00
steve ad44b411fb Try appending .vpi to module names with directories. 2001-10-14 18:42:46 +00:00
steve f7fa2f1f4d More coverage of $dump related commands. 2001-10-14 18:32:06 +00:00
steve 2fcab15704 Forgot to propagate carry. 2001-10-14 17:36:18 +00:00
steve cfbad49d33 Very wide multiplication (Anthony Bybell) 2001-10-14 16:36:43 +00:00
steve 9dbcb32808 vvm support for pullup/down gates (PR#288) 2001-10-14 03:50:53 +00:00
steve 1b69bb5d2f Handle mode-42 functor init. 2001-10-14 03:41:58 +00:00
steve 2326672b3a Handle constant bits in arithmetic expressions. 2001-10-14 03:24:35 +00:00
steve 393a76d57a threshold of $width is optional. 2001-10-14 02:03:51 +00:00
steve 4b3b41cd79 Propogate strength-only changes from resolver. 2001-10-14 01:45:11 +00:00
steve eab5793dda Account for non-0 start address for memories (Stephan Boettcher) 2001-10-14 01:36:12 +00:00
steve 6cf2ddf541 M42 implementation of mode 2 (Stephan Boettcher) 2001-10-12 03:00:08 +00:00
steve ad6bbe539f functor lookup includes vpi signal search. 2001-10-12 02:53:47 +00:00
steve f12864f69e Propagate initial value of UDP. 2001-10-11 18:29:21 +00:00
steve b61c89c104 npmos devices pass strength. 2001-10-11 18:20:51 +00:00
steve 0def3c9983 Initialize attributes for bufz devices. 2001-10-11 00:13:19 +00:00
steve 9e5dc17c1d Detect execv failures. 2001-10-11 00:12:49 +00:00
steve 36d36d99f3 Generate BUF devices for bufz logic. 2001-10-11 00:12:28 +00:00
steve de985ac3fd Document the behavioral reduction or. 2001-10-10 04:48:12 +00:00
steve 245905aeda Support vectors as operands to logical and. 2001-10-10 04:47:43 +00:00
steve ac6caaf29e More make install details. 2001-10-09 23:05:10 +00:00
steve 3734b5e7f1 spec reference events can be identifiers. 2001-10-09 18:11:58 +00:00
steve 789efb9832 Collect functor reference handling into a single function. (Stephan Boettcher) 2001-10-09 16:57:47 +00:00
steve c7bc35ad75 get CFLAGS from configure 2001-10-09 16:50:17 +00:00
steve 5071ce8575 handle nmos and pmos devices. 2001-10-09 02:28:44 +00:00
steve 64ff74df37 Add the PMOS and NMOS functor types. 2001-10-09 02:28:16 +00:00
steve 181066311b Tasks can have sub-scopes. 2001-10-09 02:01:04 +00:00
steve 20ad433f8c Fix pr283: signal values before enddefinitions in vcd. (Stephan Boettcher) 2001-10-08 23:33:00 +00:00
steve 494b5ff1ee parameter names do not have defined size. 2001-10-07 03:38:08 +00:00
steve cbd501b865 Fix some Cygwin DLL handling. (Venkat Iyer) 2001-09-30 16:45:10 +00:00
steve 41384a0e41 Reduce VCD output by removing duplicates. (Stephan Boettcher) 2001-09-30 05:18:46 +00:00
steve 3854e12024 Fencepost error in memory writes. (Stephan Boettcher) 2001-09-29 20:55:42 +00:00
steve ff55af1e9e Check address is in range for set. (Stephan Boettcher) 2001-09-29 04:45:20 +00:00
steve bdf643ddb1 Generate code for unary minus (PR#272) 2001-09-29 04:37:44 +00:00
steve d46465845c Fix the size of unsized constant operants to compare (PR#274) 2001-09-29 01:53:22 +00:00
steve dd75595082 Handle short l-values to concatenation. 2001-09-20 03:46:38 +00:00
steve a73cfbc2b5 MacOS X compile time changes. (Timothy Wood) 2001-09-20 03:21:01 +00:00
steve 21c844363a Change UDP output only if table matches. 2001-09-19 04:10:40 +00:00
steve 3109906514 Detect C name mangling for dlsym. 2001-09-17 22:26:33 +00:00
steve 606eb2b3cd Support the cellref attribute. 2001-09-16 22:26:47 +00:00
steve e99059e001 Support attributes to logic gates. 2001-09-16 22:19:42 +00:00
steve cefbb635c1 Suppor the PAD attribute on signals. 2001-09-16 01:48:16 +00:00
steve b2b8b89cd8 Make configure detect malloc.h 2001-09-15 18:27:04 +00:00
steve 92760f2c5f Support != in virtex code generator. 2001-09-15 05:06:04 +00:00
steve 176be94be9 dead code. 2001-09-14 04:20:49 +00:00
steve 9fda809fa6 Add XOR and XNOR gates. 2001-09-14 04:17:20 +00:00
steve 3c8d598eed Elaborate == to NetCompare instead of XNOR and AND
gates. This allows code generators to generate
 better code in certain cases.
2001-09-14 04:16:52 +00:00
steve f2068e83d4 Generate code for identity comparators. 2001-09-14 04:15:46 +00:00
steve 5976e7078c Xilinx uses GROUND and VCC as pin names for the
GND and VCC devices.

 Connect the top end of the EQ chain to the MUXCY
 instead of to the LUT. The MUXCY has the real output.
2001-09-12 04:35:25 +00:00
steve da9a84ed84 Use carry mux to implement wide identity compare,
Place property item in correct place in LUT cell list.
2001-09-11 05:52:31 +00:00
steve 03b635604a initial structural memory propagation (Stephan Boettcher) 2001-09-11 01:54:58 +00:00
steve 167f94bdbf Add 4 wide identity compare. 2001-09-10 03:48:34 +00:00
steve 4507351d48 Virtex support for mux devices and adders
with carry chains. Also, make Virtex specific
 implementations of primitive logic.
2001-09-09 22:23:28 +00:00
steve 0253f92e7e pin down some enumerated constants. 2001-09-09 22:21:57 +00:00
steve 432d4efc9b Connect right ANEB pin when doing NE comparator. 2001-09-09 16:49:04 +00:00
steve 749c3eb5a7 No code for unlinked constants. 2001-09-08 01:23:21 +00:00
steve e933b56507 extend xz from the top character, not the second-from-top. 2001-09-08 01:22:55 +00:00
steve 0c5ce9dfec Redo of_SUBU in a more obvious algorithm, that
is not significantly slower. Also, clean up the
 implementation of %mov from a constant.

 Fix initial clearing of vector by vector_to_array
2001-09-07 23:29:28 +00:00
steve acde444439 Separate the virtex and generic-edif code generators. 2001-09-06 04:28:39 +00:00
steve 298a352cbd Add documentation for the code generator. 2001-09-02 23:58:49 +00:00
steve 356552faad Add virtex support for some basic logic, the DFF
and constant signals.
2001-09-02 23:53:55 +00:00
steve 5e1e79b3c4 Rearrange the XNF code generator to be generic-xnf
so that non-XNF code generation is also possible.

 Start into the virtex EDIF output driver.
2001-09-02 21:33:07 +00:00
steve 2996d2eb19 Generic ADD code. 2001-09-01 04:30:44 +00:00
steve 16023cbbd6 Generate code for MUX devices. 2001-09-01 02:28:42 +00:00
steve 77927972e5 identity compare, and PWR records for constants. 2001-09-01 02:01:30 +00:00
steve d762a320dc Make constants available through the design root 2001-09-01 01:57:31 +00:00
steve a9e54e7553 dead comments. 2001-09-01 00:58:16 +00:00
steve 8b8a3d83e0 Relax pin count restriction on logic gates. 2001-08-31 23:02:13 +00:00
steve 3fbbd4080a synthesize the special case of compare with 0. 2001-08-31 22:59:48 +00:00
steve e79a371f76 Support DFF CE inputs. 2001-08-31 22:58:39 +00:00
steve c507379f09 Handle more path polarity cases. 2001-08-31 21:08:35 +00:00
steve 47031767fa Parse $setuphold statements. 2001-08-31 17:38:41 +00:00
steve af5e68448c Add the fpga target. 2001-08-31 17:28:10 +00:00
steve c1c88f87c6 Many more logic gate types. 2001-08-31 04:17:56 +00:00
steve a9b5c9c037 Add root port SIG records. 2001-08-31 02:59:06 +00:00
steve 03b428b6cb Handle update in place of repeat constants. 2001-08-31 01:37:56 +00:00
steve 271a835305 Bind escaped names with non-escaped equivilents. (PR#256) 2001-08-30 22:40:12 +00:00
steve a3c3019a04 Mangle nexus names. 2001-08-30 04:31:04 +00:00
steve f063bf833f Add the fpga target. 2001-08-28 04:14:20 +00:00
steve 2002c03cef Add some ivl_target convenience functions. 2001-08-28 04:07:17 +00:00
steve b8be5e80cd Generate code for l-value bit selects. 2001-08-26 23:00:13 +00:00
steve c29e11ed36 Add the assign/x0 and set/x opcodes. 2001-08-26 22:59:32 +00:00
steve e35ed6e91c Change the NetAssign_ class to refer to the signal
instead of link into the netlist. This is faster
 and uses less space. Make the NetAssignNB carry
 the delays instead of the NetAssign_ lval objects.

 Change the vvp code generator to support multiple
 l-values, i.e. concatenations of part selects.
2001-08-25 23:50:02 +00:00
steve 794ce68a6c Only use fvectors for nets and vars. 2001-08-25 17:22:32 +00:00
steve 31aa85ce7d Handle wide assignment to narrow return value. 2001-08-23 02:54:15 +00:00
steve 15c2b0317d statement ends after while loop labels. 2001-08-16 03:45:17 +00:00
steve 820d8b9edc Support various other string formats for time. 2001-08-16 03:29:31 +00:00
steve a3a0f5f432 Add some missing print escape sequences. 2001-08-16 03:26:04 +00:00
steve a98b5023a8 Describe the new .net behavior. 2001-08-10 04:31:27 +00:00
steve 645c8913f1 Neaten and document the resolv object. 2001-08-10 04:31:09 +00:00
steve 066284d5c2 Make sure arithmetic objects run at time 0. 2001-08-10 00:50:50 +00:00
steve 2802601c44 tgt-vvp generates code that skips nets as inputs. 2001-08-10 00:40:45 +00:00
steve 962a77c6b8 Rearrange bison parameters for portability. 2001-08-10 00:39:22 +00:00
steve ca801574e3 Include functor address in debug functor print. 2001-08-09 22:25:30 +00:00
steve 606c1d38bb Nets (wires) do not use their own functors.
Modifications to propagation of values.
 (Stephan Boettcher)
2001-08-09 19:38:23 +00:00
steve 147ee59940 memory port bug fix. 2001-08-09 19:37:05 +00:00
steve 2e3fc89831 rearrange bison parameters for compatability. 2001-08-09 19:35:29 +00:00
steve 82bccd335d Initial implementation of vvp_fvectors.
(Stephan Boettcher)
2001-08-08 01:05:06 +00:00
steve bfc05e2d71 Unused variable warnings. 2001-08-08 00:57:20 +00:00
steve c8135595be signed/unsigned warnings? 2001-08-08 00:53:50 +00:00
steve d5658d4180 dosify compiled with mingw does not know cygwin paths. 2001-08-05 17:28:40 +00:00
steve 8356e6a51f Properly synthesize part selects. 2001-08-05 02:49:07 +00:00
steve fbf55b9df4 Get the hello.vl and sqrt.vl names right. 2001-08-04 05:53:44 +00:00
steve 176e6d09ca Add install of examples for Windows. 2001-08-03 17:06:47 +00:00
steve b72d1c297d More detailed messages about unsupported things. 2001-08-03 17:06:10 +00:00
steve f5b9c26735 Detect system function used as a task. 2001-08-03 06:50:44 +00:00
steve d8141252e9 Accept empty port lists to module instantiation. 2001-08-01 05:17:31 +00:00
steve ed86dee65d Initialize initial functor tables. 2001-07-30 03:53:01 +00:00
steve f535cd3077 Add quickstart and mingw.txt to documentation list. 2001-07-30 03:44:48 +00:00
steve 537757a7b9 Cleanup defines and types for mingw compile. 2001-07-30 02:44:05 +00:00
steve 4fb354776e misspell ivl_expr_lsi 2001-07-30 02:43:20 +00:00
steve 1583b1e84a Reference the iverilog man page. 2001-07-29 22:50:44 +00:00
steve 45ff04ecb6 Reference the vvp man page. 2001-07-29 22:50:28 +00:00
steve ef08e43cf2 support local reference to scope in expressions. 2001-07-29 22:22:40 +00:00
steve e17f7f5146 Detect a missing task definition before it crashes me. 2001-07-28 22:13:11 +00:00
steve 8654412844 lsb vs msb in error message. 2001-07-28 22:00:27 +00:00
steve 140533db50 If module name has a /, skip the path search. 2001-07-28 03:29:42 +00:00
steve 00cacae2a3 Generate constant symbols for supply nets. 2001-07-28 03:18:50 +00:00
steve 7e0b0d7328 Support C<su0> and C<su1> special symbols. 2001-07-28 03:12:39 +00:00
steve 1be77d68ce Evaluate part selects when passed to system tasks. 2001-07-28 01:18:07 +00:00
steve c5a5a11b7f Support getting the signal from IVL_EX_SIGNAL expressions. 2001-07-28 01:17:40 +00:00
steve becc7cb56a Handle part select expressions as variants of
NetESignal/IVL_EX_SIGNAL objects, instead of
 creating new and useless temporary signals.
2001-07-27 04:51:44 +00:00
steve 629a02cccf Fix binding of dangling function ports. do not elide them. 2001-07-27 02:41:55 +00:00
steve f28b97ebfd Spelling error 2001-07-27 02:41:28 +00:00
steve c5234e95cd Make the -M flag add module search paths. 2001-07-26 03:13:51 +00:00
steve b825f8d2b2 Create a config.h.in file to hold all the config
junk, and support gcc 3.0. (Stephan Boettcher)
2001-07-25 03:10:48 +00:00
steve eb08253ed0 UPdate for 0.5 content. 2001-07-25 02:32:11 +00:00
steve 7b79fd98e5 Fast UDP tables (Stephan Boettcher) 2001-07-24 01:44:50 +00:00
steve 6d5fcf5853 Implement string value for signals. 2001-07-24 01:34:56 +00:00
steve bc284ee6d8 supply signals give input values. 2001-07-22 21:31:14 +00:00
steve 260b4166c1 Recognize supply signal types. 2001-07-22 21:30:56 +00:00
steve b59cc5ff6d Update config.sub and config.guess scripts. 2001-07-22 19:50:55 +00:00
steve 5c89fb71ae Handle repeat for concatenation expressions. 2001-07-22 19:33:51 +00:00
steve 3baa8c0445 vvm does not have a stdlog. 2001-07-22 18:19:19 +00:00
steve ce589da58a Support the NetESubSignal expressions in vvp.tgt. 2001-07-22 00:17:49 +00:00
steve 0bb9359c05 ignore config.cache. 2001-07-22 00:17:22 +00:00
steve 54140dadcf Add the load/x instruction for bit selects. 2001-07-22 00:04:50 +00:00
steve 60c22aefeb Add the -h flag for help. (Stephan Boettcher) 2001-07-21 21:18:55 +00:00
steve 69a2331791 Document the -l flag (Stephan Boettcher) 2001-07-21 21:15:51 +00:00
steve 29cfd8ccfe Add a quick-start document. 2001-07-21 04:39:26 +00:00
steve bf67f386de Add the vvp man page. 2001-07-21 04:34:25 +00:00
steve a2f07011c1 Fix blending of ambiguous pairs. 2001-07-21 02:34:39 +00:00
steve 0bd6cf7b6f Fix of_END when a middle thread ends. 2001-07-20 04:57:00 +00:00
steve cd8e491028 Support calculated delays in vvp.tgt. 2001-07-19 04:55:06 +00:00
steve e773ccfe49 Add support for the delayx opcode. 2001-07-19 04:40:55 +00:00
steve 83de770387 Do not connect reg to module outputs. 2001-07-19 03:43:15 +00:00
steve b3a8098506 EOF is the same as resume. 2001-07-19 02:20:55 +00:00
steve 05407f488f Relax driver limit from 64 to forever (Stephan Boettcher) 2001-07-18 02:44:39 +00:00
steve 85d53ebbf4 Handle 0 counts in repeat concatenation. 2001-07-16 20:41:41 +00:00
steve e4139f4819 Schedule instead of propagating UDP output. (Stephan Boettcher) 2001-07-16 19:08:32 +00:00
steve 45c935af45 Cut off scope iteration when depth runs out. 2001-07-16 18:53:16 +00:00
steve cfbfd9ec1d Properly pad unknow values. (Stephan Boettcher) 2001-07-16 18:48:07 +00:00
steve ae209a144f Add a stdlog output for vvp, and vvp options
to direct them around. (Stephan Boettcher.)
2001-07-16 18:40:19 +00:00
steve 64837efac5 Nest resolvers when there are lots of drivers (Stephan Boettcher) 2001-07-16 18:31:49 +00:00
steve 8d73df2b04 Make vvp output executable (Stephan Boettcher) 2001-07-16 18:26:08 +00:00
steve 59117c2e42 dot in escaped identifiers are not scope. (Stephan Boettcher) 2001-07-16 18:20:27 +00:00
steve e23dd57c9d Reshuffle -v and -V flags of ivl. (Stephan Boettcher) 2001-07-16 18:14:56 +00:00
steve 0e20be774e Initialize allocated functors (Stephan Boettcher) 2001-07-16 18:06:01 +00:00
steve c3ae00ae49 Merge sig and old_ival into union to save space. 2001-07-16 17:57:51 +00:00
steve a7328ecce1 Rewire signal callback support for fast lookup. (Stephan Boettcher) 2001-07-13 03:02:34 +00:00
steve 15a952a143 Remove width restriction on subtraction. 2001-07-13 00:38:57 +00:00
steve 3154f07817 compile libvpi.a with PIC flags (Dan McMahill) 2001-07-11 19:32:02 +00:00
steve 4e700bffb8 support postpone of $systask parameters. (Stephan Boettcher) 2001-07-11 04:43:57 +00:00
steve 7b2d4c9ef6 Get endian of vpiIntVal from constants. 2001-07-11 04:40:52 +00:00
steve da828a218f Add support for REadOnlySync and monitors. 2001-07-11 02:27:21 +00:00
steve 13ef84bc35 Manually create the stage-2 callback structure. 2001-07-11 02:22:17 +00:00
steve c7b36322f6 Properly step through wide inputs. (Stephan Boettcher) 2001-07-09 15:38:35 +00:00
steve 8cc89a3a1f Pass parameters to system functions. 2001-07-07 20:20:10 +00:00
steve b8c5aff0cb Generate !== an an inverted === 2001-07-07 04:37:18 +00:00
steve fb0c387b12 Detect and make available to t-dll the right shift. 2001-07-07 03:01:37 +00:00
steve 1628045b55 Generate code for right shift. 2001-07-07 03:01:06 +00:00
steve 608e5a4dbb Add the .shift/r functor. 2001-07-07 02:57:33 +00:00
steve 30787fd49e Put synthesized signals in proper scope. 2001-07-07 01:38:45 +00:00
steve 1e231c3338 Properly initialize unconnected shift inputs. 2001-07-06 05:02:43 +00:00
steve 370549a19a Generate code for structural left shift. 2001-07-06 04:48:04 +00:00
steve 39c39f0162 Add structural left shift (.shift/l) 2001-07-06 04:46:44 +00:00
steve bcaa122fb9 handle left shifter in dll output. 2001-07-04 22:59:25 +00:00
steve 96403de903 Describe .shift behavior. 2001-07-04 22:59:04 +00:00
steve ab5cad18de Relax limit on behavioral subtraction. 2001-07-04 04:57:10 +00:00
steve b1c548a981 Scope-locals use _s instead of _l. 2001-07-04 04:34:06 +00:00
steve 039769dbaf Generate verbuse status messages (Stephan Boettcher) 2001-07-03 04:09:24 +00:00
steve a76d6dc352 Add the -V flag, and some verbose messages. 2001-07-02 01:57:27 +00:00
steve 7eab75ded1 Parse a lot more specify syntax. 2001-07-01 23:44:43 +00:00
steve ef9c7c4a30 Print memory l-values. 2001-07-01 23:44:19 +00:00
steve 4c54e070ed header statements donot necessarily end in a string. 2001-07-01 23:43:58 +00:00
steve 80c609853a export the ivl_design_time_precision function. 2001-07-01 23:43:23 +00:00
steve eeabc7234c Make sure tmp net gets connected to ramdq output 2001-07-01 23:37:48 +00:00
steve 79b740284a Make NetFF constructor take const char* for the name. 2001-07-01 00:27:34 +00:00
steve ab7b353ace support fast programming by only writing the bits
that are listed in the input file.
2001-06-30 23:03:16 +00:00
steve 3b82a15521 reflect new default vvp target type. 2001-06-30 22:59:40 +00:00
steve 97d972ebb3 More details about running Icarus Verilog. 2001-06-30 21:54:16 +00:00
steve 5f5081827d Make the vvp target the default. 2001-06-30 21:53:42 +00:00
steve 6b7b4e700a Detect parameter mismatches. 2001-06-30 21:28:35 +00:00
steve baac893d22 Support non-const right shift (unsigned). 2001-06-30 21:07:26 +00:00
steve d680e594ed typo in CYMODE=EXAMINE-CI string. 2001-06-30 20:11:15 +00:00
steve 42adc49e57 Get include and lib paths right for mingw and vvm. 2001-06-30 04:23:02 +00:00
steve 4a2168b352 Describe the mingw compile. 2001-06-30 01:04:07 +00:00
steve 44d4660fe8 Redo the ivl_root calculator for mingw. 2001-06-30 00:59:24 +00:00
steve 45d4117c02 Handle null parameters to system tasks. 2001-06-29 02:41:05 +00:00
steve ae837a6347 Relax limit on width of structural sum. 2001-06-29 01:20:20 +00:00
steve 426fc18d10 Relax limit on width of structural sum. 2001-06-29 01:20:20 +00:00
steve 2531ed89cd Properly support signal full names. 2001-06-29 00:44:56 +00:00
steve 566d5c9a93 Get a private copy of the object name. 2001-06-29 00:42:39 +00:00
steve a033c331b6 Report line of unsupported cassign. 2001-06-27 18:34:43 +00:00
steve 066b534307 Get include and lib paths from Makefile. 2001-06-27 02:22:26 +00:00
steve 64cabd8074 Give task/function definitions a vpi type object. 2001-06-25 03:12:06 +00:00
steve a0db52c69f More robust about incorrect arguments. 2001-06-25 03:11:41 +00:00
steve 7bbedd1b55 Look up functor return register with tail of name. 2001-06-23 19:53:03 +00:00
steve 0340256b4c Include stdlib.h 2001-06-23 18:41:02 +00:00
steve c4bd8b1463 Generate %shiftl instructions for shift. 2001-06-23 18:40:34 +00:00
steve a2d465804f Add the %shiftl/i0 instruction. 2001-06-23 18:26:26 +00:00
steve 3c5d32637c Only try the readline library if vvp_debus is enabled. 2001-06-23 18:26:12 +00:00
steve c93cb71162 Allow forward references of task scopes. (Stephan Boettcher) 2001-06-23 01:04:07 +00:00
steve c3960f8e6a Support macromodule as module. 2001-06-23 00:31:06 +00:00
steve 96d04bb5a0 Handle short inputs to tasks. (Stephan Boettcher) 2001-06-23 00:30:42 +00:00
steve 1f1bfd0eab Infinitely wide behavioral add. 2001-06-22 00:03:05 +00:00
steve 8cdf51f913 Initialize stmt_cur_ substatements during dll case building. 2001-06-21 23:23:14 +00:00
steve 1f3eedcfd7 Some documentation of callback behavior. 2001-06-21 23:05:08 +00:00
steve 541f269c20 Support cbValueChange callbacks. 2001-06-21 22:54:12 +00:00
steve 68a7ddefd3 Escaped identifiers in behavioral expressions. (Stephan Boettcher) 2001-06-21 04:53:59 +00:00
steve 3961c68928 Add dumpon and dumpoff (Stephan Boettcher) 2001-06-21 04:15:22 +00:00
steve 832b795826 Edit ivl_install_dir only on mingw 2001-06-20 02:25:40 +00:00
steve 7a6be47603 Get va_start arguments in right order. 2001-06-19 14:57:10 +00:00
steve 81536481cc Add structural EEQ gates (Stephan Boettcher) 2001-06-19 03:01:10 +00:00
steve 6e703c5744 RAM_DQ pins are inputs, so connect HiZ to the nexus. 2001-06-18 03:25:20 +00:00
steve 82e8e51736 1. Logic with more than 4 inputs
2. Id and name mangling
  3. A memory leak in draw_net_in_scope()
  (Stephan Boettcher)
2001-06-18 03:10:34 +00:00
steve 905529081d Add the ~& reduction operator. 2001-06-18 01:54:49 +00:00
steve 4159c98c58 More behavioral unary reduction operators.
(Stephan Boettcher)
2001-06-18 01:09:32 +00:00
steve e40efec4bd Add more UDP edge types, and finish up compile
and run-time support. (Stephan Boettcher)
2001-06-18 00:51:23 +00:00
steve e418625457 export memory symbols in Windows. 2001-06-17 23:55:00 +00:00
steve 4b82d26f5e Add support for structural multiply in t-dll.
Add code generators and vvp support for both
 structural and behavioral multiply.
2001-06-16 23:45:05 +00:00
steve 63a02d1c0a Relax width restriction for structural comparators. 2001-06-16 03:36:03 +00:00
steve bf42772995 Generate code to support memory access in continuous
assignment statements. (Stephan Boettcher)
2001-06-16 02:41:41 +00:00
steve b75221e9bf Fix library path calculation on non Windows systems
to include the install directories. (Brendan Simon)
2001-06-15 05:14:21 +00:00
steve 1e9a54d134 iberty library only needed on Windows 2001-06-15 05:05:04 +00:00
steve ff0b59ff6b support LE and LT comparators. 2001-06-15 05:01:09 +00:00
steve b3a5a0e5ab Generate vvp code for GT and GE comparisons. 2001-06-15 04:14:18 +00:00
steve e002b1c1c4 Add .cmp statements for structural comparison. 2001-06-15 04:07:57 +00:00
steve 7009dc8d9b Change the VPI call process so that loaded .vpi modules
use a function table instead of implicit binding.
2001-06-15 03:28:30 +00:00
steve e28b7f06c5 update documentation to describe vpi in vvp. 2001-06-12 23:32:49 +00:00
steve b6e1d63cb0 Change the VPI call process so that loaded .vpi modules
use a function table instead of implicit binding.
2001-06-12 03:53:10 +00:00
steve 5a279dbdc8 Instructions can forward reference functors. 2001-06-10 17:12:51 +00:00
steve 3ad3a2ab57 support scan of scope from VPI. 2001-06-10 16:47:49 +00:00
steve 5361efe8ed Account for carry out on add devices. 2001-06-07 04:20:10 +00:00
steve 2f2657b765 support subtraction in tgt-vvp. 2001-06-07 03:09:37 +00:00
steve 19a7f3faeb Implement .arith/sub subtraction. 2001-06-07 03:09:03 +00:00
steve f480943649 Support structural addition. 2001-06-07 02:12:43 +00:00
steve f3019ff5a0 Add structural addition. 2001-06-05 03:05:41 +00:00
steve 33ee5c26b0 Fix the fork example. 2001-06-03 20:36:52 +00:00
steve 1e9184f0f9 Make the bufif0 and bufif1 gates strength aware,
and accurately propagate strengths of outputs.
2001-05-31 04:12:43 +00:00
steve 19251f7a79 Propagate strength-values instead of drive strengths. 2001-05-30 03:02:35 +00:00
steve b79da2c4d6 Detect input and input ports declared as reg. 2001-05-25 02:21:34 +00:00
steve e68ba4c73a Attach noops to case labels. 2001-05-24 04:31:00 +00:00
steve 39ffe91230 Add behavioral modulus. 2001-05-24 04:20:10 +00:00
steve 150fc6f3ee correctly interpret signed decimal values. 2001-05-22 04:08:49 +00:00
steve a7411eb00d Get the initial inputs to functors set at xxxx. 2001-05-22 04:08:16 +00:00
steve 660fd7c1d4 Update the mingw build to not require cygwin files. 2001-05-22 02:14:47 +00:00
steve 53772db66d Document configure details. 2001-05-22 02:07:08 +00:00
steve 93dd08bdf5 Configure diable of ipal. 2001-05-22 02:06:39 +00:00
steve 176d707e0a configure detect exe suffixes. 2001-05-22 02:05:50 +00:00
steve 34dade1b65 Fix WIFEXITED macro. 2001-05-20 18:22:02 +00:00
steve 4e815f8565 local declares if the header is missing. 2001-05-20 18:06:57 +00:00
steve e69a3ed934 declare getopt by hand in mingw32 compile. 2001-05-20 17:34:53 +00:00
steve 77d63aba74 make distclean target. 2001-05-20 17:13:27 +00:00
steve de8c725890 Mingw32 support (Venkat Iyer) 2001-05-20 15:09:39 +00:00
steve d4b2958e50 Deleted wrong time when -Tmax is selected. 2001-05-20 15:03:25 +00:00
steve 8669b372e0 Implement reduction nor. 2001-05-20 01:18:38 +00:00
steve 61991e6367 stub ivl_expr_parms for sfunctions. 2001-05-20 01:06:16 +00:00
steve bdcb813727 Initial support for system functions. 2001-05-20 01:02:55 +00:00
steve e6f1510a40 Make vthread_put_but expand the space if needed. 2001-05-20 00:56:48 +00:00
steve 224af78463 Add support for system function calls. 2001-05-20 00:46:12 +00:00
steve 983bf5cbab include missing externs on vthread_put_bit. 2001-05-20 00:45:43 +00:00
steve 96bcf6eac4 Get bit ordering right when making decimal strings. 2001-05-20 00:40:12 +00:00
steve 0872ad34cf Behavioral ternary operators for vvp. 2001-05-17 04:37:02 +00:00
steve 5aee3b866a do not assert if memory reference is invalid. 2001-05-17 03:35:22 +00:00
steve 3ce86f5664 Make error message include error: prefix. 2001-05-17 03:34:47 +00:00
steve 23e5394fb4 Make sure to get local headers first. 2001-05-17 03:22:18 +00:00
steve be7ac7a2ca Update help message. 2001-05-17 03:14:26 +00:00
steve a616cfd0c2 Update to new LPM API for flip-flops. 2001-05-16 03:55:30 +00:00
steve e85b669307 Add the glossary file. 2001-05-15 15:09:08 +00:00
steve bc6dfeb4a9 Skip the , in module lists. 2001-05-14 00:55:31 +00:00
steve bf96986c38 test width of target with bit size of long. 2001-05-14 00:42:32 +00:00
steve 26cfbb2b7b calculate the output of resolvers. 2001-05-13 21:05:06 +00:00
steve 35fc2a609d ignore make check droppings. 2001-05-13 05:06:25 +00:00
steve f05b13c630 A resolver that understands some simple strengths. 2001-05-12 20:38:06 +00:00
steve 4d8954be4c Fixup the resolver syntax. 2001-05-12 16:34:47 +00:00
steve 1d0a9871c2 Generate resolvers for multiple drivers. 2001-05-12 03:31:01 +00:00
steve 2292751fc3 Make sure LPM devices have drives on outputs. 2001-05-12 03:18:44 +00:00
steve a6524e47e2 Silly copyright typo. 2001-05-12 01:48:57 +00:00
steve 02b9aa9163 No entry breakpoint if debug is compiled out. 2001-05-11 03:26:31 +00:00
steve 754adce4a4 Missing export symbols. 2001-05-11 03:25:55 +00:00
steve f3fdf70b56 Export new ivl_ symbols. 2001-05-11 02:43:38 +00:00
steve 38db6fde0c Help for enable-vvp-debug 2001-05-11 02:10:30 +00:00
steve 4f804577f9 Add the --enable-vvp-debug option to the configure
script of vvp, and detect getopt.h.
2001-05-11 02:06:14 +00:00
steve 44a182d92c VVP support for memories in expressions,
including general support for thread bit
 vectors as system task parameters.
 (Stephan Boettcher)
2001-05-10 00:26:53 +00:00
steve 91d65d0e4e Add the vpi_user strength definitions. 2001-05-10 00:16:00 +00:00
steve a88f030b52 Now that the interactive debugger exists,
there is no use for the output dump.
2001-05-09 04:23:18 +00:00
steve 4537de8120 Implement the .resolv syntax. 2001-05-09 02:53:25 +00:00
steve 100bdedac3 input file for memory test. 2001-05-09 02:48:53 +00:00
steve 914ad85e63 Add ivl and vvp.tgt support for memories in
expressions and l-values. (Stephan Boettcher)
2001-05-08 23:59:33 +00:00
steve b3c2ad0a65 preliminary resolver documentation. 2001-05-08 23:58:43 +00:00
steve 2e12635494 Add to the debugger the ability to view and
break on functors.

 Add strengths to functors at compile time,
 and Make functors pass their strengths as they
 propagate their output.
2001-05-08 23:32:26 +00:00
steve 4325b787c0 more missing API symbols. 2001-05-08 04:13:51 +00:00
steve 4e3c702cc7 sort enumeration values. 2001-05-08 04:13:12 +00:00
steve 213cb1b08a Behavioral code to read memories. (Stephan Boettcher) 2001-05-06 17:54:33 +00:00
steve b7569f4d70 Support memory objects. (Stephan Boettcher) 2001-05-06 17:48:20 +00:00
steve e328cf9fed Add the %ix/get instruction. (Stephan Boettcher) 2001-05-06 17:42:22 +00:00
steve 78af3dbdc0 Regularize the mode-42 functor handling. 2001-05-06 03:51:37 +00:00
steve 372674b4c0 Add the memory.vvp example. 2001-05-06 03:50:26 +00:00
steve 8d0f7e1594 Propagate non-x constant net values. 2001-05-06 00:18:13 +00:00
steve 558fea33fb Generate code that causes the value of a net to be passed
passed through all nets of a nexus.
2001-05-06 00:01:02 +00:00
steve de5930f7d8 Add the beginnings of an interactive debugger. 2001-05-05 23:55:46 +00:00
steve e09a14aa44 Forward the simulation time for every event. 2001-05-05 23:51:49 +00:00
steve d45c7c58df Generate code for the fully general event or. 2001-05-03 04:55:46 +00:00
steve b5e0f46229 Generate null statements for conditional labels. 2001-05-03 04:55:28 +00:00
steve 12229e4826 Fix handling of a mode 1 functor that feeds into a
mode 2 functor. Feed the result only if the event
 is triggered, and do pass to the output even if no
 threads are waiting.
2001-05-03 04:54:33 +00:00
steve 8f88525819 dll build of many probes forgot to index the probe. 2001-05-03 01:52:45 +00:00
steve a225fe304d Document memory related opcodes,
parser uses numbv_s structures instead of the
 symbv_s and a mess of unions,
 Add the %is/sub instruction.
       (Stephan Boettcher)
2001-05-02 23:16:50 +00:00
steve 0f9eb13245 Remove the init parameter of functors, and instead use
the special C<?> symbols to initialize inputs. This is
 clearer and more regular.
2001-05-02 04:05:16 +00:00
steve 06437b7fba Support behavioral subtraction. 2001-05-02 01:57:25 +00:00
steve ba910c0fac Describe a generic event a bit. 2001-05-02 01:38:13 +00:00
steve 28278d3c09 initialize is_schedule. 2001-05-02 01:37:38 +00:00
steve 2bf7653ab9 Implement %ix/load. 2001-05-01 05:00:02 +00:00
steve cb39b3b65c Account for ipoint_input_index behavior in inputs_connect. 2001-05-01 02:18:15 +00:00
steve 3e3757bde7 Comparisons cant leave their results in the opcode
result area or their values will be clobbered by other
 parts of a complex expression.
2001-05-01 02:07:34 +00:00
steve 8b4befd4fc Add support for memory objects. (Stephan Boettcher) 2001-05-01 01:09:39 +00:00
steve 972e9c866b OR is %or. Get this right. 2001-04-30 05:11:18 +00:00
steve f758010f01 Describe constant functor inputs in the symbol section. 2001-04-30 04:51:27 +00:00
steve 8057faccc1 Fix up functor inputs to support C<?> values. 2001-04-30 03:53:19 +00:00
steve 3f952a2fd2 detect multiple drivers on nexa. 2001-04-30 00:00:27 +00:00
steve eb71c70c99 Carry drive strengths in the ivl_nexus_ptr_t, and
handle constant devices in targets.'
2001-04-29 23:17:38 +00:00
steve 2a44cf70b1 Add bufif and pull devices. 2001-04-29 23:16:31 +00:00
steve 431b16639d Add bufif0 and bufif1 functors. 2001-04-29 23:13:33 +00:00
steve 014e68b62f Support .net constant inputs. 2001-04-29 22:59:46 +00:00
steve 31291f5d8a Evalulate logical or (||) 2001-04-29 20:47:39 +00:00
steve a52b34cb64 Add pullup and pulldown devices. 2001-04-29 20:19:10 +00:00
steve 3ca55bf327 Better handling of module item errors. 2001-04-29 20:18:34 +00:00
steve 9bb2cee686 UDP instances need not have user supplied names. 2001-04-28 23:18:08 +00:00
steve 4f3bdd9f38 Accept single strengths for pullup and pulldown. 2001-04-28 22:56:15 +00:00
steve efe41c2435 input connect cleanup. (Stephan Boettcher) 2001-04-28 20:24:03 +00:00
steve f855cb19b8 Excessive header include. 2001-04-28 20:09:05 +00:00
steve 861ed55879 Support marking vvp interpreter (Stephan Boettcher) 2001-04-28 20:06:07 +00:00
steve 35e0dcdd3d More robust parsing of compiler directives. 2001-04-28 18:43:18 +00:00
steve a72a8607e6 New exported symbols for ivl_target API. 2001-04-26 23:33:48 +00:00
steve 904747acf5 Link time references fixed. 2001-04-26 23:32:31 +00:00
steve 4d40a336c0 Look for the strip tool 2001-04-26 23:32:02 +00:00
steve 32e9c8049a Spurious declaration 2001-04-26 16:12:48 +00:00
steve bb24624979 Assure gperf is present. 2001-04-26 16:12:29 +00:00
steve 506bc87e82 Handle missing or uninstalled .conf files. 2001-04-26 16:04:39 +00:00
steve 986885bd70 Add the mode-42 functor concept to UDPs. 2001-04-26 15:52:22 +00:00
steve 73c4893ef7 Implement simple MUXZ for ?: operators. 2001-04-26 05:12:02 +00:00
steve 62c9f39297 Redo and simplify UDP behavior. 2001-04-26 03:10:55 +00:00
steve 8b5f62a5e5 Support $deposit to a wire or reg. 2001-04-26 00:01:33 +00:00
steve aec5841c7f Implement vpi_put_value for signals. 2001-04-25 04:45:52 +00:00
steve c997c090a1 Document the UDP implementation. 2001-04-25 04:35:05 +00:00
steve 0ab60cd3c3 Fix setting StX in vpip_bits_set_value. 2001-04-24 15:47:37 +00:00
steve ae23a8f6bf Fix underflow when UDP has 1 input. 2001-04-24 03:48:53 +00:00
steve 46e868d313 Fix generation of udp/comb definitions. 2001-04-24 02:59:52 +00:00
steve 8dfa322b8b Support for UDP devices in VVP (Stephen Boettcher) 2001-04-24 02:23:58 +00:00
steve 2f2f08b02f Missing symbols. 2001-04-23 00:42:37 +00:00
steve 102fd24dd2 Support unconnected .net objects. 2001-04-23 00:37:58 +00:00
steve 66cf3ec8fa More UDP consolidation from Stephan Boettcher. 2001-04-22 23:09:45 +00:00
steve 57b0d9691e Right shift by constant. 2001-04-21 03:26:23 +00:00
steve 7c6f496765 Add NAND and XNOR functors. 2001-04-21 02:04:01 +00:00
steve 67e72ce77e Left shift by a constant amount. 2001-04-21 01:49:17 +00:00
steve c97692d715 Generate code for disable. 2001-04-21 00:55:46 +00:00
steve 66f83f3b08 Working %disable and reap handling references from scheduler. 2001-04-21 00:34:39 +00:00
steve 3765bdd3ac Spurious assert of empty statemnt. 2001-04-19 03:04:47 +00:00
steve 39bcdfb7b4 Use the new %fork syntax. 2001-04-18 05:12:03 +00:00
steve 57cd770650 %end complete the %join for the parent. 2001-04-18 05:04:19 +00:00
steve 3194b0c53a Resolve forward references for %fork. 2001-04-18 05:03:49 +00:00
steve 9e8005f7b7 Put threads into scopes. 2001-04-18 04:21:23 +00:00
steve 41ce198a1f add XOR support. 2001-04-15 16:37:48 +00:00
steve 05e30ed43b Add support for behavioral xnor. 2001-04-15 04:07:56 +00:00
steve 09cd582cc5 Oops, excessive test assert neets to be removed. 2001-04-15 03:19:44 +00:00
steve 235781ce08 Handle noop as case statements. 2001-04-15 03:14:31 +00:00
steve 70aeb980d8 vvp support for <= with internal delay. 2001-04-15 02:58:11 +00:00
steve d0d6189874 Less picky about ternary operands. 2001-04-14 22:50:39 +00:00
steve 8205d0fcc9 Use event/or for wide anyedge statements. 2001-04-14 05:11:49 +00:00
steve 60d068a33e support the .event/or statement. 2001-04-14 05:10:56 +00:00
steve e1a4b457c2 Initialize the waiting_for_event member. 2001-04-14 05:10:05 +00:00
steve 86e18226eb More complete reap of all threads. 2001-04-13 03:55:18 +00:00
steve 7fa2975c24 Add new symbols for windows. 2001-04-10 17:21:21 +00:00
steve d39190243b Add the disable statemnent. 2001-04-07 19:24:36 +00:00
steve 0550287658 Generate vvp code for functions with ports. 2001-04-06 02:28:02 +00:00
steve 82947a9343 Generate vvp code for the repeat statement. 2001-04-05 03:20:57 +00:00
steve b7fb806611 Generate signed .net and .var statements. 2001-04-05 01:38:24 +00:00
steve 6a236061de Add the .var/s and .net/s statements for VPI support. 2001-04-05 01:34:26 +00:00
steve 898639d7bf Get signed compares working correctly in vvp. 2001-04-05 01:12:27 +00:00
steve 6322400b83 support decimal strings from signals. 2001-04-04 17:43:19 +00:00
steve 9b7341889d Get intval from a binary constant. 2001-04-04 05:07:19 +00:00
steve 0653f859bc Support forever loops in the tgt-vvp target. 2001-04-04 04:50:35 +00:00
steve 48ff66cbce Take vector form as parameters to vpi_call. 2001-04-04 04:33:08 +00:00
steve 1b2a6f8bed Fix broken look scanning down bits of number. 2001-04-04 04:28:41 +00:00
steve c6cf665c4a emit vpi parameters values as vectors. 2001-04-04 04:14:09 +00:00
steve 19c84ff9a2 Support non-blocking assignments. 2001-04-03 04:50:37 +00:00
steve 15398a8f58 VPI access time as a decimal string, and
stub vpi access to the scopes.
2001-04-03 03:46:14 +00:00
steve 9d2e22576e support functor_set push for blocking assignment. 2001-04-03 03:18:34 +00:00
steve 3ffb3c7011 thread bit allocation leak in assign. 2001-04-02 04:09:20 +00:00
steve cac4c8d5ce Evaluate binary & and | operators. 2001-04-02 03:47:49 +00:00
steve f40d006c26 Generate code for task calls. 2001-04-02 02:28:12 +00:00
steve e6c36597eb Support the scope expression node. 2001-04-02 00:28:35 +00:00
steve 141808b787 Scopes and numbers as vpi_call parameters. 2001-04-02 00:27:53 +00:00
steve 003f103408 Take numbers as system task parameters. 2001-04-02 00:24:30 +00:00
steve ce66498c88 Unary ! is a reduction operator. 2001-04-01 22:26:21 +00:00
steve bf30a0bc07 Add the reduction nor instruction. 2001-04-01 22:25:33 +00:00
steve f8e6d782e1 Implement the unary ! operator. 2001-04-01 21:47:29 +00:00
steve 7a8135c703 Recognize the BUF device. 2001-04-01 21:34:48 +00:00
steve 311e1ce9ee Add the buf functor type. 2001-04-01 21:31:46 +00:00
steve 9bce21ddb7 Generate code for < and <=. 2001-04-01 07:22:42 +00:00
steve c4e438d4ba Implement the less-then and %or instructions. 2001-04-01 07:22:08 +00:00
steve a2da2d59df support the NetWhile statement. 2001-04-01 06:52:27 +00:00
steve 56a4236576 Evaluate the logical AND operator. 2001-04-01 06:49:32 +00:00
steve 2443c655f2 Generate code for while statements. 2001-04-01 06:49:04 +00:00
steve ae1d5227de Support empty statements for hanging labels. 2001-04-01 06:40:44 +00:00
steve 5769bbe15e Add the bitwise %and instruction. 2001-04-01 06:12:13 +00:00
steve 6dbf7333c8 dead cruft. 2001-04-01 04:38:17 +00:00
steve 4352ce6753 Generate code for casex and casez 2001-04-01 04:34:59 +00:00
steve 29a50a52ca Implement %cmp/x and %cmp/z instructions. 2001-04-01 04:34:28 +00:00
steve d25690cc8e Redesign event information to support arbitrary edge combining. 2001-04-01 01:48:21 +00:00
392 changed files with 62184 additions and 20892 deletions
+9
View File
@@ -2,14 +2,23 @@ lexor_keyword.cc
parse.h
parse.cc
parse.cc.output
parse.output
syn-rules.cc
syn-rules.cc.output
syn-rules.output
lexor.cc
iverilog-vpi
iverilog-vpi.pdf
iverilog-vpi.ps
ivl
ivl.exp
dep
configure
Makefile
check
check.cc
config.status
config.log
config.cache
config.h
dosify
+39 -12
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: Attrib.cc,v 1.1 2000/12/04 17:37:03 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.cc,v 1.5 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "Attrib.h"
# include <assert.h>
@@ -34,14 +36,15 @@ Attrib::~Attrib()
delete[] list_;
}
void Attrib::set_attributes(const map<string,string>&attr)
#if 0
void Attrib::copy_attributes(const map<string,verinum>&attr)
{
assert(list_ == 0);
nlist_ = attr.size();
list_ = new cell_[nlist_];
map<string,string>::const_iterator idx;
map<string,verinum>::const_iterator idx;
unsigned jdx;
for (idx = attr.begin(), jdx = 0 ; idx != attr.end() ; idx ++, jdx++) {
struct cell_*tmp = list_ + jdx;
@@ -49,8 +52,9 @@ void Attrib::set_attributes(const map<string,string>&attr)
tmp->val = (*idx).second;
}
}
#endif
string Attrib::attribute(const string&key) const
const verinum& Attrib::attribute(const string&key) const
{
for (unsigned idx = 0 ; idx < nlist_ ; idx += 1) {
@@ -58,10 +62,11 @@ string Attrib::attribute(const string&key) const
return list_[idx].val;
}
return "";
static const verinum null;
return null;
}
void Attrib::attribute(const string&key, const string&value)
void Attrib::attribute(const string&key, const verinum&value)
{
unsigned idx;
@@ -90,7 +95,7 @@ bool Attrib::has_compat_attributes(const Attrib&that) const
for (idx = 0 ; idx < that.nlist_ ; idx += 1) {
string tmp = attribute(that.list_[idx].key);
verinum tmp = attribute(that.list_[idx].key);
if (tmp != that.list_[idx].val)
return false;
}
@@ -98,18 +103,18 @@ bool Attrib::has_compat_attributes(const Attrib&that) const
return true;
}
unsigned Attrib::size() const
unsigned Attrib::attr_cnt() const
{
return nlist_;
}
string Attrib::key(unsigned idx) const
const char* Attrib::attr_key(unsigned idx) const
{
assert(idx < nlist_);
return list_[idx].key;
return list_[idx].key.c_str();
}
string Attrib::value(unsigned idx) const
const verinum& Attrib::attr_value(unsigned idx) const
{
assert(idx < nlist_);
return list_[idx].val;
@@ -118,6 +123,28 @@ string Attrib::value(unsigned idx) const
/*
* $Log: Attrib.cc,v $
* Revision 1.5 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.3 2002/05/23 03:08:50 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
+29 -11
View File
@@ -18,12 +18,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: Attrib.h,v 1.1 2000/12/04 17:37:03 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.h,v 1.4 2002/08/12 01:34:58 steve Exp $"
#endif
# include <string>
# include <map>
# include "verinum.h"
/*
* This class keeps a map of key/value pairs. The map can be set from
@@ -35,21 +35,21 @@ class Attrib {
Attrib();
~Attrib();
void set_attributes(const map<string,string>&attr);
string attribute(const string&key) const;
void attribute(const string&key, const string&value);
const verinum&attribute(const string&key) const;
void attribute(const string&key, const verinum&value);
bool has_compat_attributes(const Attrib&that) const;
/* Provide a means of iterating over the entries in the map. */
unsigned size() const;
string key(unsigned idx) const;
string value(unsigned idx) const;
unsigned attr_cnt() const;
const char* attr_key(unsigned idx) const;
const verinum& attr_value(unsigned idx) const;
private:
struct cell_ {
string key;
string val;
string key;
verinum val;
};
unsigned nlist_;
@@ -62,6 +62,24 @@ class Attrib {
/*
* $Log: Attrib.h,v $
* Revision 1.4 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.2 2002/05/23 03:08:50 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.1 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
+279
View File
@@ -0,0 +1,279 @@
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: HName.cc,v 1.5 2002/11/02 03:27:52 steve Exp $"
#endif
# include "config.h"
# include "HName.h"
# include <iostream>
# include <string.h>
# include <stdlib.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
hname_t::hname_t()
{
item_ = 0;
count_ = 0;
}
hname_t::hname_t(const char*text)
{
item_ = strdup(text);
count_ = 1;
}
hname_t::hname_t(const hname_t&that)
{
count_ = that.count_;
switch (count_) {
case 0:
item_ = 0;
break;
case 1:
item_ = strdup(that.item_);
break;
default:
array_ = new char*[count_];
for (unsigned idx = 0 ; idx < count_ ; idx += 1)
array_[idx] = strdup(that.array_[idx]);
break;
}
}
hname_t::~hname_t()
{
switch (count_) {
case 0:
break;
case 1:
free(item_);
break;
default:
for (unsigned idx = 0 ; idx < count_ ; idx += 1)
free(array_[idx]);
delete[]array_;
break;
}
}
unsigned hname_t::component_count() const
{
return count_;
}
void hname_t::append(const char*text)
{
char**tmp;
switch (count_) {
case 0:
count_ = 1;
item_ = strdup(text);
break;
case 1:
count_ = 2;
tmp = new char*[2];
tmp[0] = item_;
tmp[1] = strdup(text);
array_ = tmp;
break;
default:
tmp = new char*[count_+1];
for (unsigned idx = 0 ; idx < count_ ; idx += 1)
tmp[idx] = array_[idx];
delete[]array_;
array_ = tmp;
array_[count_] = strdup(text);
count_ += 1;
}
}
void hname_t::prepend(const char*text)
{
char**tmp;
switch (count_) {
case 0:
count_ = 1;
item_ = strdup(text);
break;
case 1:
count_ = 2;
tmp = new char*[2];
tmp[0] = strdup(text);
tmp[1] = item_;
array_ = tmp;
break;
default:
tmp = new char*[count_+1];
tmp[0] = strdup(text);
for (unsigned idx = 0 ; idx < count_ ; idx += 1)
tmp[idx+1] = array_[idx];
delete[]array_;
array_ = tmp;
count_ += 1;
}
}
char* hname_t::remove_tail_name()
{
if (count_ == 0)
return 0;
if (count_ == 1) {
char*tmp = item_;
count_ = 0;
item_ = 0;
return tmp;
}
if (count_ == 2) {
char*tmp1 = array_[0];
char*tmp2 = array_[1];
delete[]array_;
count_ = 1;
item_ = tmp1;
return tmp2;
}
char*tmpo = array_[count_-1];
char**tmpa = new char*[count_-1];
for (unsigned idx = 0 ; idx < count_-1 ; idx += 1)
tmpa[idx] = array_[idx];
delete[]array_;
array_ = tmpa;
count_ -= 1;
return tmpo;
}
const char* hname_t::peek_name(unsigned idx) const
{
if (idx >= count_)
return 0;
if (count_ == 1)
return item_;
return array_[idx];
}
const char* hname_t::peek_tail_name() const
{
switch (count_) {
case 0:
return 0;
case 1:
return item_;
default:
return array_[count_-1];
}
}
bool operator < (const hname_t&l, const hname_t&r)
{
unsigned idx = 0;
const char*lc = l.peek_name(idx);
const char*rc = r.peek_name(idx);
while (lc && rc) {
int cmp = strcmp(lc, rc);
if (cmp < 0)
return true;
if (cmp > 0)
return false;
idx += 1;
lc = l.peek_name(idx);
rc = r.peek_name(idx);
}
if (lc && !rc)
return false;
if (rc && !lc)
return true;
// Must be ==
return false;
}
bool operator == (const hname_t&l, const hname_t&r)
{
unsigned idx = 0;
const char*lc = l.peek_name(idx);
const char*rc = r.peek_name(idx);
while (lc && rc) {
int cmp = strcmp(lc, rc);
if (cmp != 0)
return false;
idx += 1;
lc = l.peek_name(idx);
rc = r.peek_name(idx);
}
if (lc || rc)
return false;
// Must be ==
return true;
}
ostream& operator<< (ostream&out, const hname_t&that)
{
switch (that.count_) {
case 0:
out << "";
return out;
case 1:
out << that.item_;
return out;
default:
out << that.array_[0];
for (unsigned idx = 1 ; idx < that.count_ ; idx += 1)
out << "." << that.array_[idx];
return out;
}
}
/*
* $Log: HName.cc,v $
* Revision 1.5 2002/11/02 03:27:52 steve
* Allow named events to be referenced by
* hierarchical names.
*
* Revision 1.4 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/01/05 04:36:06 steve
* include malloc.h only when available.
*
* Revision 1.2 2001/12/18 04:52:45 steve
* Include config.h for namespace declaration.
*
* Revision 1.1 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
*/
+101
View File
@@ -0,0 +1,101 @@
#ifndef __HName_H
#define __HName_H
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: HName.h,v 1.4 2002/11/02 03:27:51 steve Exp $"
#endif
# include <iostream>
#ifdef __GNUC__
#if __GNUC__ > 2
using namespace std;
#endif
#endif
/*
* This class represents a Verilog hierarchical name. A hierarchical
* name is an ordered list of simple names.
*/
class hname_t {
public:
hname_t ();
explicit hname_t (const char*text);
hname_t (const hname_t&that);
~hname_t();
// This method adds a name to the end of the hierarchical
// path. This becomes a new base name.
void append(const char*text);
// This method adds a name to the *front* of the hierarchical
// path. The base name remains the same, unless this is the
// only component.
void prepend(const char*text);
// This method removes the tail name from the hierarchy, and
// returns a pointer to that tail name. That tail name now
// must be removed by the caller.
char* remove_tail_name();
// Return the given component in the hierarchical name. If the
// idx is too large, return 0.
const char*peek_name(unsigned idx) const;
const char*peek_tail_name() const;
// Return the number of components in the hierarchical
// name. If this is a simple name, this will return 1.
unsigned component_count() const;
friend ostream& operator<< (ostream&, const hname_t&);
private:
union {
char**array_;
char* item_;
};
unsigned count_;
private: // not implemented
hname_t& operator= (const hname_t&);
};
extern bool operator < (const hname_t&, const hname_t&);
extern bool operator == (const hname_t&, const hname_t&);
/*
* $Log: HName.h,v $
* Revision 1.4 2002/11/02 03:27:51 steve
* Allow named events to be referenced by
* hierarchical names.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/06/14 03:25:51 steve
* Compiler portability.
*
* Revision 1.1 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
*/
#endif
+35 -6
View File
@@ -16,12 +16,19 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: LineInfo.cc,v 1.1 2000/11/30 17:31:42 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: LineInfo.cc,v 1.4 2003/01/17 05:49:03 steve Exp $"
#endif
# include "config.h"
# include "LineInfo.h"
# include <cstdio>
# include <sstream>
LineInfo::LineInfo()
: file_(0), lineno_(0)
{
}
LineInfo::~LineInfo()
{
@@ -29,9 +36,11 @@ LineInfo::~LineInfo()
string LineInfo::get_line() const
{
char buf[8];
sprintf(buf, "%u", lineno_);
return string(file_? file_ : "") + ":" + buf;
ostringstream buf;
buf << (file_? file_ : "") << ":" << lineno_;
string res = buf.str();
return res;
}
void LineInfo::set_line(const LineInfo&that)
@@ -40,8 +49,28 @@ void LineInfo::set_line(const LineInfo&that)
lineno_ = that.lineno_;
}
void LineInfo::set_file(const char*f)
{
file_ = f;
}
void LineInfo::set_lineno(unsigned n)
{
lineno_ = n;
}
/*
* $Log: LineInfo.cc,v $
* Revision 1.4 2003/01/17 05:49:03 steve
* Use stringstream in place of sprintf.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/11/30 17:31:42 steve
* Change LineInfo to store const C strings.
*
+11 -5
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: LineInfo.h,v 1.5 2000/11/30 17:31:42 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: LineInfo.h,v 1.7 2003/01/17 05:49:03 steve Exp $"
#endif
# include <string>
@@ -35,15 +35,15 @@
class LineInfo {
public:
LineInfo() : file_(0), lineno_(0) { }
LineInfo();
~LineInfo();
string get_line() const;
void set_line(const LineInfo&that);
void set_file(const char*f) { file_ = f; }
void set_lineno(unsigned n) { lineno_ = n; }
void set_file(const char*f);
void set_lineno(unsigned n);
private:
const char* file_;
@@ -52,6 +52,12 @@ class LineInfo {
/*
* $Log: LineInfo.h,v $
* Revision 1.7 2003/01/17 05:49:03 steve
* Use stringstream in place of sprintf.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2000/11/30 17:31:42 steve
* Change LineInfo to store const C strings.
*
+137 -41
View File
@@ -16,12 +16,16 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.95 2001/03/25 05:59:46 steve Exp $"
#ident "$Id: Makefile.in,v 1.143 2003/01/26 21:15:58 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.3
# This version string is only used in the version message printed
# by the compiler. It reflects the assigned version number for the
# product as a whole. Most components also print the CVS Name: token
# in order to get a more automatic version stamp as well.
VERSION = 0.7
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -34,9 +38,11 @@ VPATH = $(srcdir)
bindir = @bindir@
libdir = @libdir@
includedir = $(prefix)/include
mandir = @mandir@
dllib=@DLLIB@
rdynamic=@rdynamic@
strip_dynamic=@strip_dynamic@
CC = @CC@
CXX = @CXX@
@@ -45,9 +51,12 @@ INSTALL_SCRIPT = @INSTALL_SCRIPT@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
STRIP = @STRIP@
LEX = @LEX@
YACC = @YACC@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)
PICFLAGS = @PICFLAG@
LDFLAGS = @LDFLAGS@
# The TARGETS variable lists the target modules that can be build and
@@ -58,28 +67,39 @@ ifeq ('@HAVE_IPAL@','yes')
TARGETS += tgt-pal
endif
all: ivl@EXEEXT@
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) all); done
cd vvm ; $(MAKE) all
for dir in $(SUBDIRS) ; do (cd $$dir ; $(MAKE) all); done
cd vpi ; $(MAKE) all
cd ivlpp ; $(MAKE) all
cd driver ; $(MAKE) all
cd driver ; $(MAKE) VERSION=$(VERSION) all
cd tgt-verilog ; $(MAKE) all
cd tgt-stub ; $(MAKE) all
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) all); done
# In the windows world, the installer will need a dosify program to
# dosify text files.
ifeq (@WIN32@,yes)
all: dosify.exe
dosify.exe: dosify.c
$(CC) -o dosify.exe dosify.c
ifeq (@MINGW32@,yes)
SUBDIRS += driver-vpi
endif
else
all: iverilog-vpi
endif
# This rule rules the compiler in the trivial hello.vl program to make
# sure the basics were compiled properly.
check: all
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) check); done
driver/iverilog -Ccheck.conf -ocheck -tvvm-check -B./ivlpp examples/hello.vl
$(CXX) -o check $(rdynamic) -fno-exceptions -I$(srcdir) -I$(srcdir)/vvm -I$(srcdir)/vpip -Lvvm -Lvpip check.cc -lvvm -lvpip $(dllib)
./check | grep 'Hello, World'
driver/iverilog -Ccheck.conf -ocheck.vvp -tvvp-check -B./ivlpp $(srcdir)/examples/hello.vl
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
clean:
rm -f *.o parse.cc parse.cc.output parse.h dep/*.d lexor.cc lexor_keyword.cc ivl@EXEEXT@ libivl.a
cd vvm ; $(MAKE) clean
rm -f *.o parse.cc parse.cc.output parse.h dep/*.d lexor.cc lexor_keyword.cc ivl@EXEEXT@ libivl.a libvpi.a iverilog-vpi
cd vpi ; $(MAKE) clean
cd driver ; $(MAKE) clean
cd ivlpp ; $(MAKE) clean
@@ -91,52 +111,64 @@ clean:
distclean: clean
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) distclean); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) distclean); done
rm -f vvm/Makefile
rm -f vpi/Makefile
rm -f ivlpp/Makefile
rm -f driver/Makefile
rm -f config.status config.cache config.log
rm -f Makefile
rm -f tgt-pal/Makefile tgt-stub/Makefile tgt-verilog/Makefile
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-vvm.o t-xnf.o
FF = nodangle.o synth.o syn-rules.o xnfio.o
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
elab_sig.o emit.o eval.o eval_rconst.o \
elab_sig.o emit.o eval.o eval_attrib.o eval_rconst.o \
eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
mangle.o netlist.o netmisc.o net_assign.o \
net_design.o net_event.o net_force.o net_link.o net_modulo.o net_proc.o \
net_scope.o net_udp.o pad_to_width.o \
load_module.o netlist.o netmisc.o net_assign.o \
net_design.o net_event.o net_expr.o net_force.o net_func.o \
net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
net_proc.o net_scope.o net_udp.o net_variable.o pad_to_width.o \
parse.o parse_misc.o pform.o pform_dump.o \
set_width.o \
verinum.o verireal.o target.o targets.o util.o \
Attrib.o LineInfo.o Module.o PDelays.o PEvent.o \
set_width.o sync.o \
verinum.o verireal.o target.o targets.o \
Attrib.o HName.o LineInfo.o Module.o PData.o PDelays.o PEvent.o \
PExpr.o PGate.o \
PTask.o PFunction.o PWire.o Statement.o \
PTask.o PFunction.o PWire.o Statement.o StringHeap.o \
$(FF) $(TT)
Makefile: Makefile.in config.status
Makefile: Makefile.in config.h.in config.status
./config.status
ifeq (@CYGWIN@,yes)
ifeq (@WIN32@,yes)
# Under Windows (mingw) I need to make the ivl.exe in two steps.
# The first step makes an ivl.exe that dlltool can use to make an
# export and import library, and the last link makes a, ivl.exe
# that really exports the things that the import library imports.
ivl@EXEEXT@: $O ivl.def
$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
dlltool --dllname ivl@EXEEXT@ --def ivl.def \
--output-lib libivl.a --output-exp ivl.exp
# $(CXX) -o ivl@EXEEXT@ -Wl,--base-file,ivl.base ivl.exp $O $(dllib)
# dlltool --dllname ivl@EXEEXT@ --base-file ivl.base \
# --output-exp ivl.exp --def ivl.def
$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib)
$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
else
ivl@EXEEXT@: $O
$(CXX) $(CXXFLAGS) $(rdynamic) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
endif
ifeq (@WIN32@,yes)
else
iverilog-vpi: iverilog-vpi.sh
sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
-e 's;@INCLUDEDIR@;@includedir@;' -e 's;@LIBDIR@;@libdir@;' $< > $@
chmod +x $@
endif
%.o: %.cc
@[ -d dep ] || mkdir dep
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
$(CXX) @ident_support@ $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
mv $*.d dep/$*.d
@@ -145,34 +177,59 @@ lexor.o: lexor.cc parse.h
parse.o: parse.cc
parse.h parse.cc: $(srcdir)/parse.y
bison --verbose -t -p VL -d $(srcdir)/parse.y -o parse.cc
mv parse.cc.h parse.h
$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
mv parse.cc.h parse.h || mv parse.hh parse.h
syn-rules.cc: $(srcdir)/syn-rules.y
bison --verbose -p syn_ -o syn-rules.cc $(srcdir)/syn-rules.y
$(YACC) --verbose -p syn_ -o syn-rules.cc $(srcdir)/syn-rules.y
lexor.cc: $(srcdir)/lexor.lex
flex -PVL -s -olexor.cc $(srcdir)/lexor.lex
$(LEX) -PVL -s -olexor.cc $(srcdir)/lexor.lex
lexor_keyword.o: lexor_keyword.cc
lexor_keyword.cc: lexor_keyword.gperf
gperf -o -i 7 -C -k 1-3,$$ -L ANSI-C -H keyword_hash -N check_identifier -t $(srcdir)/lexor_keyword.gperf > lexor_keyword.cc || (rm -f lexor_keyword.cc ; false)
iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
man -t $(srcdir)/iverilog-vpi.man > iverilog-vpi.ps
install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $(includedir)/ivl_target.h $(includedir)/vpi_user.h
cd vvm ; $(MAKE) install
iverilog-vpi.pdf: iverilog-vpi.ps
ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
ifeq (@WIN32@,yes)
INSTALL_DOC = $(prefix)/iverilog-vpi.pdf
INSTALL_DOCDIR =
all: iverilog-vpi.pdf
else
INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
INSTALL_DOCDIR = $(mandir)/man1
endif
ifeq (@WIN32@,yes)
WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
else
WIN32_INSTALL = $(bindir)/iverilog-vpi
endif
install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $(includedir)/ivl_target.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
cd vpi ; $(MAKE) install
cd ivlpp ; $(MAKE) install
cd driver ; $(MAKE) install
for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) install); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) install); done
$(bindir)/iverilog-vpi: ./iverilog-vpi
$(INSTALL_SCRIPT) ./iverilog-vpi $(bindir)/iverilog-vpi
$(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
$(STRIP) $(libdir)/ivl/ivl@EXEEXT@
$(STRIP) $(strip_dynamic) $(libdir)/ivl/ivl@EXEEXT@
$(libdir)/ivl/iverilog.conf: $(srcdir)/iverilog.conf
# Install iverilog.conf whenever ivl.exe is installed. This
# forces iverilog.conf to be treated similarly, in spite of
# dates in the source bundle.
$(libdir)/ivl/iverilog.conf: $(libdir)/ivl/ivl@EXEEXT@
$(INSTALL_DATA) $(srcdir)/iverilog.conf $(libdir)/ivl/iverilog.conf
$(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
@@ -181,21 +238,60 @@ $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
$(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
$(INSTALL_DATA) $(srcdir)/vpi_user.h $(includedir)/vpi_user.h
$(includedir)/acc_user.h: $(srcdir)/acc_user.h
$(INSTALL_DATA) $(srcdir)/acc_user.h $(includedir)/acc_user.h
$(includedir)/veriuser.h: $(srcdir)/veriuser.h
$(INSTALL_DATA) $(srcdir)/veriuser.h $(includedir)/veriuser.h
$(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man
$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(mandir)/man1/iverilog-vpi.1
$(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
$(INSTALL_DATA) iverilog-vpi.pdf $(prefix)/iverilog-vpi.pdf
# In windows installations, put a few examples and the quick_start
# into the destination directory.
ifeq (@WIN32@,yes)
$(prefix)/hello.vl: $(srcdir)/examples/hello.vl
./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
mv tmp.vl $(prefix)/hello.vl
$(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
mv tmp.vl $(prefix)/sqrt.vl
$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
mv tmp.vl $(prefix)/sqrt-virtex.v
$(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
mv tmp.txt $(prefix)/QUICK_START.txt
endif
installdirs: mkinstalldirs
$(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl
$(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl \
$(mandir) $(mandir)/man1
uninstall:
rm -f $(libdir)/ivl/ivl@EXEEXT@
rm -f $(libdir)/ivl/iverilog.conf
rm -f $(libdir)/ivl/ivl
-rmdir $(libdir)/ivl
rm -f $(bindir)/verilog
rm -f $(bindir)/iverilog-vpi
rm -f $(bindir)/gverilog@EXEEXT@
rm -f $(includedir)/ivl_target.h
rm -f $(includedir)/vpi_user.h
rm -f $(includedir)/acc_user.h
rm -f $(includedir)/veriuser.h
rm -f $(mandir)/man1/iverilog-vpi.1
cd driver ; $(MAKE) uninstall
cd vpi ; $(MAKE) uninstall
cd vvm ; $(MAKE) uninstall
cd ivlpp ; $(MAKE) uninstall
for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) uninstall); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) uninstall); done
-include $(patsubst %.o, dep/%.d, $O)
-include $(patsubst %.o, dep/%.d, vpithunk.o)
+38 -17
View File
@@ -16,21 +16,25 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: Module.cc,v 1.14 2000/11/15 20:31:05 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.cc,v 1.19 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "Module.h"
# include "PGate.h"
# include "PWire.h"
# include <assert.h>
Module::Module(const string&name, const svector<Module::port_t*>*pp)
: name_(name)
Module::Module(const char*name)
: name_(strdup(name))
{
if (pp)
ports_ = *pp;
}
Module::~Module()
{
free(name_);
}
void Module::add_gate(PGate*gate)
@@ -50,7 +54,7 @@ void Module::add_function(const string &name, PFunction *func)
PWire* Module::add_wire(PWire*wire)
{
PWire*&ep = wires_[wire->name()];
PWire*&ep = wires_[wire->path()];
if (ep) return ep;
assert(ep == 0);
@@ -65,7 +69,7 @@ void Module::add_behavior(PProcess*b)
unsigned Module::port_count() const
{
return ports_.count();
return ports.count();
}
/*
@@ -75,11 +79,11 @@ unsigned Module::port_count() const
*/
const svector<PEIdent*>& Module::get_port(unsigned idx) const
{
assert(idx < ports_.count());
assert(idx < ports.count());
static svector<PEIdent*> zero;
if (ports_[idx])
return ports_[idx]->expr;
if (ports[idx])
return ports[idx]->expr;
else
return zero;
}
@@ -87,17 +91,17 @@ const svector<PEIdent*>& Module::get_port(unsigned idx) const
unsigned Module::find_port(const string&name) const
{
assert(name != "");
for (unsigned idx = 0 ; idx < ports_.count() ; idx += 1)
if (ports_[idx]->name == name)
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1)
if (ports[idx]->name == name)
return idx;
return ports_.count();
return ports.count();
}
PWire* Module::get_wire(const string&name) const
PWire* Module::get_wire(const hname_t&name) const
{
map<string,PWire*>::const_iterator obj = wires_.find(name);
map<hname_t,PWire*>::const_iterator obj = wires_.find(name);
if (obj == wires_.end())
return 0;
else
@@ -117,7 +121,7 @@ PGate* Module::get_gate(const string&name)
return 0;
}
const map<string,PWire*>& Module::get_wires() const
const map<hname_t,PWire*>& Module::get_wires() const
{
return wires_;
}
@@ -135,6 +139,23 @@ const list<PProcess*>& Module::get_behaviors() const
/*
* $Log: Module.cc,v $
* Revision 1.19 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.18 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.17 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.16 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.15 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.14 2000/11/15 20:31:05 steve
* Fix warning about temporaries.
*
+52 -16
View File
@@ -18,15 +18,18 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: Module.h,v 1.21 2000/11/05 06:05:59 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.h,v 1.28 2003/01/26 21:15:58 steve Exp $"
#endif
# include <list>
# include <map>
# include "svector.h"
# include "HName.h"
# include "named.h"
# include "LineInfo.h"
# include <string>
class PData;
class PEvent;
class PExpr;
class PEIdent;
@@ -44,7 +47,7 @@ class NetScope;
* therefore the handle for grasping the described circuit.
*/
class Module {
class Module : public LineInfo {
/* The module ports are in general a vector of port_t
objects. Each port has a name and an ordered list of
@@ -58,20 +61,27 @@ class Module {
};
public:
explicit Module(const string&name, const svector<port_t*>*);
explicit Module(const char*name);
~Module();
/* The module has parameters that are evaluated when the
module is elaborated. During parsing, I put the parameters
into this map. */
map<string,PExpr*>parameters;
map<string,PExpr*>localparams;
struct param_expr_t {
PExpr*expr;
PExpr*msb;
PExpr*lsb;
bool signed_flag;
};
map<string,param_expr_t>parameters;
map<string,param_expr_t>localparams;
/* The module also has defparam assignments which don't create
new parameters within the module, but may be used to set
values within this module (when instantiated) or in other
instantiated modules. */
map<string,PExpr*>defparms;
map<hname_t,PExpr*>defparms;
/* Parameters may be overridden at instantiation time;
the overrides do not contain explicit parameter names,
@@ -81,14 +91,21 @@ class Module {
a parameter-index to its name. */
list<string> param_names;
/* This is an array of port descriptors, which is in turn a
named array of PEident pointers. */
svector<port_t*> ports;
/* Keep a table of named events declared in the module. */
map<string,PEvent*>events;
/* Keep a table of datum variables declared in the module. */
map<string,PData*>datum;
/* These are the timescale for this module. The default is
set by the `timescale directive. */
int time_unit, time_precision;
const string&get_name() const { return name_; }
const char*mod_name() const { return name_; }
void add_gate(PGate*gate);
@@ -107,10 +124,10 @@ class Module {
// Find a wire by name. This is used for connecting gates to
// existing wires, etc.
PWire* get_wire(const string&name) const;
PWire* get_wire(const hname_t&name) const;
PGate* get_gate(const string&name);
const map<string,PWire*>& get_wires() const;
const map<hname_t,PWire*>& get_wires() const;
const list<PGate*>& get_gates() const;
const list<PProcess*>& get_behaviors() const;
@@ -122,13 +139,9 @@ class Module {
bool elaborate_sig(Design*, NetScope*scope) const;
private:
const string name_;
char* name_;
/* This is an array of port descriptors, which is in turn a
named array of PEident pointers. */
svector<port_t*> ports_;
map<string,PWire*> wires_;
map<hname_t,PWire*> wires_;
list<PGate*> gates_;
list<PProcess*> behaviors_;
map<string,PTask*> tasks_;
@@ -142,6 +155,29 @@ class Module {
/*
* $Log: Module.h,v $
* Revision 1.28 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.27 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.26 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.25 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.24 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.23 2001/10/31 03:11:15 steve
* detect module ports not declared within the module.
*
* Revision 1.22 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.21 2000/11/05 06:05:59 steve
* Handle connectsion to internally unconnected modules (PR#38)
*
+46
View File
@@ -0,0 +1,46 @@
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PData.cc,v 1.1 2003/01/26 21:15:58 steve Exp $"
#endif
# include "PData.h"
PData::PData(const hname_t&h)
: hname_(h)
{
}
PData::~PData()
{
}
const hname_t&PData::name() const
{
return hname_;
}
/*
* $Log: PData.cc,v $
* Revision 1.1 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
*/
+63
View File
@@ -0,0 +1,63 @@
#ifndef __PData_H
#define __PData_H
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PData.h,v 1.1 2003/01/26 21:15:58 steve Exp $"
#endif
# include "HName.h"
# include "netlist.h"
# include "LineInfo.h"
/*
* The PData object represents declaration of atomic datum such as
* real and realtime variables. These are variables that cannot be bit
* or part selected, but can be used in expressions.
*/
class PData : public LineInfo {
public:
PData(const hname_t&hname);
~PData();
// Return a hierarchical name.
const hname_t&name() const;
void elaborate_scope(Design*des, NetScope*scope) const;
map<string,PExpr*> attributes;
private:
hname_t hname_;
private:
PData(const PData&);
PData& operator= (const PData&);
};
/*
* $Log: PData.h,v $
* Revision 1.1 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
*/
#endif
+33 -8
View File
@@ -16,24 +16,31 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PDelays.cc,v 1.4 2001/01/20 02:15:50 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.cc,v 1.9 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "PDelays.h"
# include "PExpr.h"
# include "verinum.h"
PDelays::PDelays()
{
delete_flag_ = true;
for (unsigned idx = 0 ; idx < 3 ; idx += 1)
delay_[idx] = 0;
}
PDelays::~PDelays()
{
for (unsigned idx = 0 ; idx < 3 ; idx += 1)
delete delay_[idx];
if (delete_flag_) {
for (unsigned idx = 0 ; idx < 3 ; idx += 1)
delete delay_[idx];
}
}
void PDelays::set_delay(PExpr*del)
@@ -41,15 +48,18 @@ void PDelays::set_delay(PExpr*del)
assert(del);
assert(delay_[0] == 0);
delay_[0] = del;
delete_flag_ = true;
}
void PDelays::set_delays(const svector<PExpr*>*del)
void PDelays::set_delays(const svector<PExpr*>*del, bool df)
{
assert(del);
assert(del->count() <= 3);
for (unsigned idx = 0 ; idx < del->count() ; idx += 1)
delay_[idx] = (*del)[idx];
delete_flag_ = df;
}
static unsigned long calculate_val(Design*des, const NetScope*scope,
@@ -65,7 +75,7 @@ static unsigned long calculate_val(Design*des, const NetScope*scope,
delete dr;
} else {
verinum*dv = expr->eval_const(des, scope->name());
verinum*dv = expr->eval_const(des, scope);
if (dv == 0) {
cerr << expr->get_line() << ": sorry: non-constant "
<< "delays not supported here: " << *expr << endl;
@@ -82,12 +92,11 @@ static unsigned long calculate_val(Design*des, const NetScope*scope,
return val;
}
void PDelays::eval_delays(Design*des, const string&path,
void PDelays::eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const
{
NetScope*scope = des->find_scope(path);
assert(scope);
int shift = scope->time_unit() - des->get_precision();
@@ -122,6 +131,22 @@ void PDelays::eval_delays(Design*des, const string&path,
/*
* $Log: PDelays.cc,v $
* Revision 1.9 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.8 2001/12/29 20:19:31 steve
* Do not delete delay expressions of UDP instances.
*
* Revision 1.7 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.6 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2001/01/20 02:15:50 steve
* apologize for not supporting non-constant delays.
*
+27 -9
View File
@@ -1,7 +1,7 @@
#ifndef __PDelays_H
#define __PDelays_H
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,20 +18,22 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PDelays.h,v 1.3 2001/01/16 02:44:17 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
#endif
# include "svector.h"
# include <string>
# include <iostream>
#ifdef HAVE_IOSFWD
# include <iosfwd>
#else
class ostream;
#ifdef __GNUC__
#if __GNUC__ > 2
using namespace std;
#endif
#endif
class Design;
class NetScope;
class PExpr;
/*
@@ -44,10 +46,13 @@ class PDelays {
PDelays();
~PDelays();
/* Set the delay expressions. If the delete_flag is true, then
this object takes ownership of the expressions, and will
delete it in the destructor. */
void set_delay(PExpr*);
void set_delays(const svector<PExpr*>*del);
void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
void eval_delays(Design*des, const string&path,
void eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const;
@@ -56,6 +61,7 @@ class PDelays {
private:
PExpr* delay_[3];
bool delete_flag_;
private: // not implemented
PDelays(const PDelays&);
@@ -66,6 +72,18 @@ ostream& operator << (ostream&o, const PDelays&);
/*
* $Log: PDelays.h,v $
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/06/14 03:25:51 steve
* Compiler portability.
*
* Revision 1.5 2001/12/29 20:19:31 steve
* Do not delete delay expressions of UDP instances.
*
* Revision 1.4 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.3 2001/01/16 02:44:17 steve
* Use the iosfwd header if available.
*
+11 -2
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PEvent.cc,v 1.1 2000/04/01 19:31:57 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.cc,v 1.3 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "PEvent.h"
PEvent::PEvent(const string&n)
@@ -38,6 +40,13 @@ string PEvent::name() const
/*
* $Log: PEvent.cc,v $
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
+11 -3
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PEvent.h,v 1.4 2001/01/16 02:44:18 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.h,v 1.6 2002/08/12 01:34:58 steve Exp $"
#endif
# include "LineInfo.h"
@@ -30,7 +30,8 @@ class NetScope;
/*
* The PEvent class represents event objects. These are things that
* are declared in Verilog as ``event foo;''
* are declared in Verilog as ``event foo;'' The name passed to the
* constructure is the "foo" part of the declaration.
*/
class PEvent : public LineInfo {
@@ -52,6 +53,13 @@ class PEvent : public LineInfo {
/*
* $Log: PEvent.h,v $
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.4 2001/01/16 02:44:18 steve
* Use the iosfwd header if available.
*
+63 -29
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PExpr.cc,v 1.23 2001/01/14 23:04:55 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.cc,v 1.32 2002/11/09 19:20:48 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "PExpr.h"
# include "Module.h"
# include <typeinfo>
@@ -42,37 +46,34 @@ bool PExpr::is_constant(Module*) const
return false;
}
NetNet* PExpr::elaborate_net(Design*des, const string&path, unsigned,
unsigned long,
unsigned long,
unsigned long,
Link::strength_t,
Link::strength_t) const
{
cerr << get_line() << ": error: Unable to elaborate `"
<< *this << "' as gates." << endl;
return 0;
}
NetNet* PExpr::elaborate_lnet(Design*des, const string&path) const
NetNet* PExpr::elaborate_lnet(Design*des, NetScope*, bool) const
{
cerr << get_line() << ": error: expression not valid in assign l-value: "
<< *this << endl;
return 0;
}
PEBinary::PEBinary(char op, PExpr*l, PExpr*r)
: op_(op), left_(l), right_(r)
{
}
PEBinary::~PEBinary()
{
}
bool PEBinary::is_constant(Module*mod) const
{
return left_->is_constant(mod) && right_->is_constant(mod);
}
PECallFunction::PECallFunction(const char*n, const svector<PExpr *> &parms)
: name_(n), parms_(parms)
PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms)
: path_(n), parms_(parms)
{
}
PECallFunction::PECallFunction(const char*n)
: name_(n)
PECallFunction::PECallFunction(const hname_t&n)
: path_(n)
{
}
@@ -138,8 +139,8 @@ bool PEFNumber::is_constant(Module*) const
return true;
}
PEIdent::PEIdent(const string&s)
: text_(s), msb_(0), lsb_(0), idx_(0)
PEIdent::PEIdent(const hname_t&s)
: path_(s), msb_(0), lsb_(0), idx_(0)
{
}
@@ -147,9 +148,9 @@ PEIdent::~PEIdent()
{
}
string PEIdent::name() const
const hname_t& PEIdent::path() const
{
return text_;
return path_;
}
/*
@@ -158,14 +159,17 @@ string PEIdent::name() const
*/
bool PEIdent::is_constant(Module*mod) const
{
map<string,PExpr*>::const_iterator cur;
if (mod == 0) return false;
cur = mod->parameters.find(text_);
if (cur != mod->parameters.end()) return true;
{ map<string,Module::param_expr_t>::const_iterator cur;
cur = mod->parameters.find(path_.peek_name(0));
if (cur != mod->parameters.end()) return true;
}
cur = mod->localparams.find(text_);
if (cur != mod->localparams.end()) return true;
{ map<string,Module::param_expr_t>::const_iterator cur;
cur = mod->localparams.find(path_.peek_name(0));
if (cur != mod->localparams.end()) return true;
}
return false;
}
@@ -200,13 +204,14 @@ bool PENumber::is_constant(Module*) const
return true;
}
PEString::PEString(const string&s)
PEString::PEString(char*s)
: text_(s)
{
}
PEString::~PEString()
{
delete[]text_;
}
string PEString::value() const
@@ -251,6 +256,35 @@ bool PEUnary::is_constant(Module*m) const
/*
* $Log: PExpr.cc,v $
* Revision 1.32 2002/11/09 19:20:48 steve
* Port expressions for output ports are lnets, not nets.
*
* Revision 1.31 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.30 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2001/12/30 21:32:03 steve
* Support elaborate_net for PEString objects.
*
* Revision 1.28 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.27 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.26 2001/11/07 04:26:46 steve
* elaborate_lnet uses scope instead of string path.
*
* Revision 1.25 2001/11/06 06:11:55 steve
* Support more real arithmetic in delay constants.
*
* Revision 1.24 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.23 2001/01/14 23:04:55 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
+143 -230
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PExpr.h,v 1.48 2001/01/14 23:04:55 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.h,v 1.63 2002/11/09 19:20:48 steve Exp $"
#endif
# include <string>
@@ -51,8 +51,11 @@ class PExpr : public LineInfo {
virtual void dump(ostream&) const;
// Procedural elaboration of the expression.
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope) const;
// Procedural elaboration of the expression. Set thie
// bare_memory_ok flag if the result is allowed to be a
// NetEMemory without an index.
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
bool sys_task_arg =false) const;
// Elaborate expressions that are the r-value of parameter
// assignments. This elaboration follows the restrictions of
@@ -62,7 +65,7 @@ class PExpr : public LineInfo {
// This method elaborate the expression as gates, for use in a
// continuous assign or other wholly structural context.
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
@@ -77,7 +80,8 @@ class PExpr : public LineInfo {
// This method elaborates the expression as gates, but
// restricted for use as l-values of continuous assignments.
virtual NetNet* elaborate_lnet(Design*des, const string&path) const;
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
// Expressions that can be in the l-value of procedural
// assignments can be elaborated with this method.
@@ -86,7 +90,7 @@ class PExpr : public LineInfo {
// This attempts to evaluate a constant expression, and return
// a verinum as a result. If the expression cannot be
// evaluated, return 0.
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
// This attempts to evaluate a constant expression as a
// decimal floating point. This is used when calculating delay
@@ -123,15 +127,17 @@ class PEConcat : public PExpr {
// continuous assignments.
virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
virtual NetNet* elaborate_lnet(Design*des, const string&path) const;
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
virtual bool is_constant(Module*) const;
@@ -182,7 +188,7 @@ class PEFNumber : public PExpr {
/* The eval_const method as applied to a floating point number
gets the *integer* value of the number. This accounts for
any rounding that is needed to get the value. */
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
/* This method returns the full floating point value. */
virtual verireal* eval_rconst(const Design*, const NetScope*) const;
@@ -190,7 +196,8 @@ class PEFNumber : public PExpr {
/* A PEFNumber is a constant, so this returns true. */
virtual bool is_constant(Module*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual void dump(ostream&) const;
@@ -202,7 +209,7 @@ class PEFNumber : public PExpr {
class PEIdent : public PExpr {
public:
explicit PEIdent(const string&s);
explicit PEIdent(const hname_t&s);
~PEIdent();
virtual void dump(ostream&) const;
@@ -211,13 +218,14 @@ class PEIdent : public PExpr {
virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
// Identifiers are allowed (with restrictions) is assign l-values.
virtual NetNet* elaborate_lnet(Design*des, const string&path) const;
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
// Identifiers are also allowed as procedural assignment l-values.
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
// Structural r-values are OK.
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
@@ -225,7 +233,8 @@ class PEIdent : public PExpr {
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
// Elaborate the PEIdent as a port to a module. This method
@@ -233,12 +242,13 @@ class PEIdent : public PExpr {
NetNet* elaborate_port(Design*des, NetScope*sc) const;
virtual bool is_constant(Module*) const;
verinum* eval_const(const Design*des, const string&path) const;
verinum* eval_const(const Design*des, const NetScope*sc) const;
verireal*eval_rconst(const Design*des, const NetScope*sc) const;
string name() const;
const hname_t& path() const;
private:
string text_;
hname_t path_;
public:
// Use these to support bit- and part-select operators.
@@ -249,11 +259,24 @@ class PEIdent : public PExpr {
// expression.
PExpr*idx_;
NetNet* elaborate_net_ram_(Design*des, const string&path,
NetNet* elaborate_net_ram_(Design*des, NetScope*scope,
NetMemory*mem, unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
NetNet*sig,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
private:
NetAssign_* elaborate_mem_lval_(Design*des, NetScope*scope,
NetMemory*mem) const;
};
class PENumber : public PExpr {
@@ -265,16 +288,20 @@ class PENumber : public PExpr {
const verinum& value() const;
virtual void dump(ostream&) const;
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verireal*eval_rconst(const Design*, const NetScope*) const;
virtual bool is_the_same(const PExpr*that) const;
virtual bool is_constant(Module*) const;
@@ -283,21 +310,37 @@ class PENumber : public PExpr {
verinum*const value_;
};
/*
* This represents a string constant in an expression.
*
* The s parameter to the PEString constructor is a C string that this
* class instance will take for its own. The caller should not delete
* the string, the destructor will do it.
*/
class PEString : public PExpr {
public:
explicit PEString(const string&s);
explicit PEString(char*s);
~PEString();
string value() const;
virtual void dump(ostream&) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
verinum* PEString::eval_const(const Design*, const NetScope*) const;
virtual bool is_constant(Module*) const;
private:
const string text_;
char*text_;
};
class PEUnary : public PExpr {
@@ -307,16 +350,17 @@ class PEUnary : public PExpr {
~PEUnary();
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEUnary*elaborate_expr(Design*des, NetScope*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual bool is_constant(Module*) const;
@@ -328,22 +372,24 @@ class PEUnary : public PExpr {
class PEBinary : public PExpr {
public:
explicit PEBinary(char op, PExpr*l, PExpr*r)
: op_(op), left_(l), right_(r) { }
explicit PEBinary(char op, PExpr*l, PExpr*r);
~PEBinary();
virtual bool is_constant(Module*) const;
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEBinary*elaborate_expr(Design*des, NetScope*) const;
virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verireal*eval_rconst(const Design*des, const NetScope*sc) const;
private:
char op_;
@@ -352,42 +398,42 @@ class PEBinary : public PExpr {
NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
NetNet* elaborate_net_add_(Design*des, const string&path,
NetNet* elaborate_net_add_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_bit_(Design*des, const string&path,
NetNet* elaborate_net_bit_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_cmp_(Design*des, const string&path,
NetNet* elaborate_net_cmp_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_div_(Design*des, const string&path,
NetNet* elaborate_net_div_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_mod_(Design*des, const string&path,
NetNet* elaborate_net_mod_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_log_(Design*des, const string&path,
NetNet* elaborate_net_log_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_mul_(Design*des, const string&path,
NetNet* elaborate_net_mul_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
NetNet* elaborate_net_shift_(Design*des, const string&path,
NetNet* elaborate_net_shift_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
@@ -407,16 +453,17 @@ class PETernary : public PExpr {
virtual bool is_constant(Module*) const;
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, const string&path,
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetETernary*elaborate_expr(Design*des, NetScope*) const;
virtual NetETernary*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const string&path) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
private:
PExpr*expr_;
@@ -426,219 +473,85 @@ class PETernary : public PExpr {
/*
* This class represents a parsed call to a function, including calls
* to system functions.
* to system functions. The parameters in the parms list are the
* expressions that are passed as input to the ports of the function.
*/
class PECallFunction : public PExpr {
public:
explicit PECallFunction(const char*n, const svector<PExpr *> &parms);
explicit PECallFunction(const char*n);
explicit PECallFunction(const hname_t&n, const svector<PExpr *> &parms);
explicit PECallFunction(const hname_t&n);
~PECallFunction();
virtual void dump(ostream &) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
bool sys_task_arg =false) const;
private:
string name_;
hname_t path_;
svector<PExpr *> parms_;
bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
};
/*
* $Log: PExpr.h,v $
* Revision 1.48 2001/01/14 23:04:55 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
* Revision 1.63 2002/11/09 19:20:48 steve
* Port expressions for output ports are lnets, not nets.
*
* Allow parameters to be referenced by hierarchical name.
* Revision 1.62 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.47 2000/12/16 19:03:30 steve
* Evaluate <= and ?: in parameter expressions (PR#81)
* Revision 1.61 2002/06/04 05:38:43 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.46 2000/12/10 22:01:35 steve
* Support decimal constants in behavioral delays.
* Revision 1.60 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Revision 1.45 2000/12/06 06:31:09 steve
* Check lvalue of procedural continuous assign (PR#29)
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.44 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
* Revision 1.59 2002/04/23 03:53:59 steve
* Add support for non-constant bit select.
*
* Revision 1.43 2000/09/09 15:21:26 steve
* move lval elaboration to PExpr virtual methods.
* Revision 1.58 2002/04/14 03:55:25 steve
* Precalculate unary - if possible.
*
* Revision 1.42 2000/09/07 22:38:13 steve
* Support unary + and - in constants.
* Revision 1.57 2002/04/13 02:33:17 steve
* Detect missing indices to memories (PR#421)
*
* Revision 1.41 2000/06/30 15:50:20 steve
* Allow unary operators in constant expressions.
* Revision 1.56 2002/03/09 04:02:26 steve
* Constant expressions are not l-values for task ports.
*
* Revision 1.40 2000/06/13 05:22:16 steve
* Support concatenation in parameter expressions.
* Revision 1.55 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.39 2000/06/01 02:31:39 steve
* Parameters can be strings.
* Revision 1.54 2001/12/30 21:32:03 steve
* Support elaborate_net for PEString objects.
*
* Revision 1.38 2000/05/16 04:05:15 steve
* Module ports are really special PEIdent
* expressions, because a name can be used
* many places in the port list.
* Revision 1.53 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.37 2000/05/07 04:37:56 steve
* Carry strength values from Verilog source to the
* pform and netlist for gates.
* Revision 1.52 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Change vvm constants to use the driver_t to drive
* a constant value. This works better if there are
* multiple drivers on a signal.
*
* Revision 1.36 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.35 2000/04/12 04:23:57 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*
* Revision 1.34 2000/04/01 21:40:22 steve
* Add support for integer division.
*
* Revision 1.33 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
* Revision 1.32 2000/03/12 18:22:11 steve
* Binary and unary operators in parameter expressions.
*
* Revision 1.31 2000/03/12 04:35:22 steve
* Allow parameter identifiers in parameter expressions.
*
* Revision 1.30 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.29 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.28 2000/02/16 03:58:27 steve
* Fix up width matching in structural bitwise operators.
*
* Revision 1.27 2000/01/13 03:35:35 steve
* Multiplication all the way to simulation.
*
* Revision 1.26 1999/12/16 03:46:39 steve
* Structural logical or.
*
* Revision 1.25 1999/11/21 00:13:08 steve
* Support memories in continuous assignments.
*
* Revision 1.24 1999/11/14 20:24:28 steve
* Add support for the LPM_CLSHIFT device.
*
* Revision 1.23 1999/11/05 21:45:19 steve
* Fix NetConst being set to zero width, and clean
* up elaborate_set_cmp_ for NetEBinary.
*
* Revision 1.22 1999/10/31 20:08:24 steve
* Include subtraction in LPM_ADD_SUB device.
*
* Revision 1.21 1999/10/31 04:11:27 steve
* Add to netlist links pin name and instance number,
* and arrange in vvm for pin connections by name
* and instance number.
*
* Revision 1.20 1999/09/25 02:57:29 steve
* Parse system function calls.
*
* Revision 1.19 1999/09/15 04:17:52 steve
* separate assign lval elaboration for error checking.
*
* Revision 1.18 1999/08/31 22:38:29 steve
* Elaborate and emit to vvm procedural functions.
*
* Revision 1.17 1999/08/01 21:18:55 steve
* elaborate rise/fall/decay for continuous assign.
*
* Revision 1.16 1999/07/31 19:14:47 steve
* Add functions up to elaboration (Ed Carter)
*
* Revision 1.15 1999/07/22 02:05:20 steve
* is_constant method for PEConcat.
*
* Revision 1.14 1999/07/17 19:50:59 steve
* netlist support for ternary operator.
*
* Revision 1.13 1999/06/16 03:13:29 steve
* More syntax parse with sorry stubs.
*
* Revision 1.12 1999/06/15 02:50:02 steve
* Add lexical support for real numbers.
*
* Revision 1.11 1999/06/10 04:03:52 steve
* Add support for the Ternary operator,
* Add support for repeat concatenation,
* Correct some seg faults cause by elaboration
* errors,
* Parse the casex anc casez statements.
*
* Revision 1.10 1999/06/09 03:00:05 steve
* Add support for procedural concatenation expression.
*
* Revision 1.9 1999/05/16 05:08:42 steve
* Redo constant expression detection to happen
* after parsing.
*
* Parse more operators and expressions.
*
* Revision 1.8 1999/05/10 00:16:57 steve
* Parse and elaborate the concatenate operator
* in structural contexts, Replace vector<PExpr*>
* and list<PExpr*> with svector<PExpr*>, evaluate
* constant expressions with parameters, handle
* memories as lvalues.
*
* Parse task declarations, integer types.
*
* Revision 1.7 1999/05/01 02:57:52 steve
* Handle much more complex event expressions.
*
* Revision 1.6 1999/04/29 02:16:26 steve
* Parse OR of event expressions.
*
* Revision 1.5 1999/04/19 01:59:36 steve
* Add memories to the parse and elaboration phases.
*
* Revision 1.4 1998/11/11 00:01:51 steve
* Check net ranges in declarations.
*
* Revision 1.3 1998/11/09 18:55:33 steve
* Add procedural while loops,
* Parse procedural for loops,
* Add procedural wait statements,
* Add constant nodes,
* Add XNOR logic gate,
* Make vvm output look a bit prettier.
*
* Revision 1.2 1998/11/07 17:05:05 steve
* Handle procedural conditional, and some
* of the conditional expressions.
*
* Elaborate signals and identifiers differently,
* allowing the netlist to hold signal information.
*
* Revision 1.1 1998/11/03 23:28:54 steve
* Introduce verilog to CVS.
* Revision 1.51 2001/11/07 04:26:46 steve
* elaborate_lnet uses scope instead of string path.
*
* Revision 1.50 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*/
#endif
+11 -2
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PFunction.cc,v 1.4 2001/01/13 22:20:08 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PFunction.cc,v 1.6 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
#include "PTask.h"
PFunction::PFunction()
@@ -52,6 +54,13 @@ void PFunction::set_output(PWire*o)
/*
* $Log: PFunction.cc,v $
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
+38 -8
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PGate.cc,v 1.9 2000/05/06 15:41:56 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.cc,v 1.14 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "PGate.h"
# include "PExpr.h"
# include "verinum.h"
@@ -88,12 +90,12 @@ void PGate::elaborate_scope(Design*, NetScope*) const
* parameters. This method understands how to handle the different
* numbers of expressions.
*/
void PGate::eval_delays(Design*des, const string&path,
void PGate::eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const
{
delay_.eval_delays(des, path, rise_time, fall_time, decay_time);
delay_.eval_delays(des, scope, rise_time, fall_time, decay_time);
}
PGAssign::PGAssign(svector<PExpr*>*pins)
@@ -140,17 +142,24 @@ void PGBuiltin::set_range(PExpr*msb, PExpr*lsb)
lsb_ = lsb;
}
PGModule::PGModule(const string&type, const string&name, svector<PExpr*>*pins)
: PGate(name, pins), type_(type), overrides_(0), pins_(0),
PGModule::PGModule(const char*type, const string&name, svector<PExpr*>*pins)
: PGate(name, pins), overrides_(0), pins_(0),
npins_(0), parms_(0), nparms_(0), msb_(0), lsb_(0)
{
type_ = strdup(type);
}
PGModule::PGModule(const string&type, const string&name,
PGModule::PGModule(const char*type, const string&name,
named<PExpr*>*pins, unsigned npins)
: PGate(name, 0), type_(type), overrides_(0), pins_(pins),
: PGate(name, 0), overrides_(0), pins_(pins),
npins_(npins), parms_(0), nparms_(0), msb_(0), lsb_(0)
{
type_ = strdup(type);
}
PGModule::~PGModule()
{
free(type_);
}
void PGModule::set_parameters(svector<PExpr*>*o)
@@ -176,8 +185,29 @@ void PGModule::set_range(PExpr*msb, PExpr*lsb)
lsb_ = lsb;
}
const char* PGModule::get_type()
{
return type_;
}
/*
* $Log: PGate.cc,v $
* Revision 1.14 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.12 2001/10/21 00:42:47 steve
* Module types in pform are char* instead of string.
*
* Revision 1.11 2001/10/19 01:55:32 steve
* Method to get the type_ member
*
* Revision 1.10 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.9 2000/05/06 15:41:56 steve
* Carry assignment strength to pform.
*
+40 -14
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PGate.h,v 1.18 2000/05/06 15:41:56 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.h,v 1.24 2002/08/12 01:34:58 steve Exp $"
#endif
# include "svector.h"
@@ -65,7 +65,7 @@ class PGate : public LineInfo {
const string& get_name() const { return name_; }
void eval_delays(Design*des, const string&path,
void eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const;
@@ -79,10 +79,10 @@ class PGate : public LineInfo {
void strength0(strength_t);
void strength1(strength_t);
map<string,string> attributes;
map<string,PExpr*> attributes;
virtual void dump(ostream&out) const;
virtual void elaborate(Design*des, const string&path) const;
virtual void elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*sc) const;
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
@@ -116,7 +116,7 @@ class PGAssign : public PGate {
~PGAssign();
void dump(ostream&out) const;
virtual void elaborate(Design*des, const string&path) const;
virtual void elaborate(Design*des, NetScope*scope) const;
private:
};
@@ -153,7 +153,7 @@ class PGBuiltin : public PGate {
void set_range(PExpr*msb, PExpr*lsb);
virtual void dump(ostream&out) const;
virtual void elaborate(Design*, const string&path) const;
virtual void elaborate(Design*, NetScope*scope) const;
private:
Type type_;
@@ -173,15 +173,17 @@ class PGModule : public PGate {
public:
// If the binding of ports is by position, this constructor
// builds everything all at once.
explicit PGModule(const string&type, const string&name,
explicit PGModule(const char*type, const string&name,
svector<PExpr*>*pins);
// If the binding of ports is by name, this constructor takes
// the bindings and stores them for later elaboration.
explicit PGModule(const string&type, const string&name,
explicit PGModule(const char*type, const string&name,
named<PExpr*>*pins, unsigned npins);
~PGModule();
// Parameter overrides can come as an ordered list, or a set
// of named expressions.
void set_parameters(svector<PExpr*>*o);
@@ -192,12 +194,14 @@ class PGModule : public PGate {
void set_range(PExpr*msb, PExpr*lsb);
virtual void dump(ostream&out) const;
virtual void elaborate(Design*, const string&path) const;
virtual void elaborate(Design*, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*sc) const;
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
const char* get_type();
private:
string type_;
char* type_;
svector<PExpr*>*overrides_;
named<PExpr*>*pins_;
unsigned npins_;
@@ -210,15 +214,37 @@ class PGModule : public PGate {
PExpr*msb_;
PExpr*lsb_;
void elaborate_mod_(Design*, Module*mod, const string&path) const;
void elaborate_sudp_(Design*, PUdp *udp, const string&path) const;
void elaborate_cudp_(Design*, PUdp *udp, const string&path) const;
void elaborate_mod_(Design*, Module*mod, NetScope*scope) const;
void elaborate_udp_(Design*, PUdp *udp, NetScope*scope) const;
void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const;
bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const;
};
/*
* $Log: PGate.h,v $
* Revision 1.24 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.23 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.22 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.21 2001/10/21 00:42:47 steve
* Module types in pform are char* instead of string.
*
* Revision 1.20 2001/10/19 01:55:32 steve
* Method to get the type_ member
*
* Revision 1.19 2001/04/22 23:09:45 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.18 2000/05/06 15:41:56 steve
* Carry assignment strength to pform.
*
+14 -3
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PTask.cc,v 1.4 2001/01/13 22:20:08 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PTask.cc,v 1.7 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "PTask.h"
PTask::PTask()
@@ -40,13 +42,22 @@ void PTask::set_ports(svector<PWire*>*p)
void PTask::set_statement(Statement*s)
{
assert(statement_ == 0);
assert(s != 0);
statement_ = s;
}
/*
* $Log: PTask.cc,v $
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.5 2001/04/19 03:04:47 steve
* Spurious assert of empty statemnt.
*
* Revision 1.4 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
+9 -3
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PTask.h,v 1.10 2001/01/13 22:20:08 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PTask.h,v 1.12 2002/08/12 01:34:58 steve Exp $"
#endif
# include "LineInfo.h"
@@ -52,7 +52,7 @@ class PTask : public LineInfo {
void elaborate_sig(Design*des, NetScope*scope) const;
// Elaborate the statement to finish off the task definition.
void elaborate(Design*des, const string&path) const;
void elaborate(Design*des, NetScope*scope) const;
void dump(ostream&, unsigned) const;
@@ -98,6 +98,12 @@ class PFunction : public LineInfo {
/*
* $Log: PTask.h,v $
* Revision 1.12 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.11 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.10 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
+20 -4
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PUdp.h,v 1.4 2000/02/23 02:56:53 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PUdp.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
#endif
# include <map>
@@ -27,6 +27,8 @@
# include <string>
# include "verinum.h"
class PExpr;
svector<string>::svector<string>(unsigned size)
: nitems_(size), items_(new string[size])
{
@@ -68,12 +70,12 @@ class PUdp {
verinum::V initial;
map<string,string> attributes;
map<string,PExpr*> attributes;
void dump(ostream&out) const;
private:
const string name_;
private:
private: // Not implemented
PUdp(const PUdp&);
@@ -82,6 +84,20 @@ class PUdp {
/*
* $Log: PUdp.h,v $
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.5 2001/04/22 23:09:45 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.4 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
+53 -4
View File
@@ -16,16 +16,34 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PWire.cc,v 1.5 2001/01/06 02:29:35 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.cc,v 1.10 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "PWire.h"
# include <assert.h>
PWire::PWire(const string&n, NetNet::Type t, NetNet::PortType pt)
: name_(n), type_(t), port_type_(pt), signed_(false), lidx_(0), ridx_(0)
PWire::PWire(const hname_t&n, NetNet::Type t, NetNet::PortType pt)
: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
lidx_(0), ridx_(0)
{
if (t == NetNet::INTEGER) {
type_ = NetNet::REG;
signed_ = true;
isint_ = true;
}
}
PWire::PWire(char*n, NetNet::Type t, NetNet::PortType pt)
: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
lidx_(0), ridx_(0)
{
if (t == NetNet::INTEGER) {
type_ = NetNet::REG;
signed_ = true;
isint_ = true;
}
}
NetNet::Type PWire::get_wire_type() const
@@ -33,6 +51,11 @@ NetNet::Type PWire::get_wire_type() const
return type_;
}
const hname_t& PWire::path() const
{
return hname_;
}
bool PWire::set_wire_type(NetNet::Type t)
{
assert(t != NetNet::IMPLICIT);
@@ -45,6 +68,10 @@ bool PWire::set_wire_type(NetNet::Type t)
if (t == NetNet::REG) { type_ = t; return true; }
return false;
case NetNet::REG:
if (t == NetNet::INTEGER) {
isint_ = true;
return true;
}
if (t == NetNet::REG) return true;
return false;
default:
@@ -91,6 +118,11 @@ bool PWire::get_signed() const
return signed_;
}
bool PWire::get_isint() const
{
return isint_;
}
void PWire::set_range(PExpr*m, PExpr*l)
{
msb_ = svector<PExpr*>(msb_,m);
@@ -108,6 +140,23 @@ void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
/*
* $Log: PWire.cc,v $
* Revision 1.10 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.9 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.8 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.7 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.6 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.5 2001/01/06 02:29:35 steve
* Support arrays of integers.
*
+37 -7
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: PWire.h,v 1.10 2001/01/16 02:44:18 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.h,v 1.15 2003/01/26 21:15:58 steve Exp $"
#endif
# include "netlist.h"
@@ -40,14 +40,20 @@ class Design;
* Wires include nets, registers and ports. A net or register becomes
* a port by declaration, so ports are not seperate. The module
* identifies a port by keeping it in its port list.
*
* The hname parameter to the constructor is a hierarchical name. It
* is an array of strings starting with the root, running towards
* the base name, and terminated by a null pointer. The environment
* allocates the memory for me.
*/
class PWire : public LineInfo {
public:
PWire(const string&n, NetNet::Type t, NetNet::PortType pt);
PWire(const hname_t&hname, NetNet::Type t, NetNet::PortType pt);
PWire(char*name, NetNet::Type t, NetNet::PortType pt);
const string&name() const { return name_; }
// Return a hierarchical name.
const hname_t&path() const;
NetNet::Type get_wire_type() const;
bool set_wire_type(NetNet::Type);
@@ -57,12 +63,13 @@ class PWire : public LineInfo {
void set_signed(bool flag);
bool get_signed() const;
bool get_isint() const;
void set_range(PExpr*msb, PExpr*lsb);
void set_memory_idx(PExpr*ldx, PExpr*rdx);
map<string,string> attributes;
map<string,PExpr*> attributes;
// Write myself to the specified stream.
void dump(ostream&out) const;
@@ -70,10 +77,11 @@ class PWire : public LineInfo {
void elaborate_sig(Design*, NetScope*scope) const;
private:
string name_;
hname_t hname_;
NetNet::Type type_;
NetNet::PortType port_type_;
bool signed_;
bool isint_; // original type of integer
// These members hold expressions for the bit width of the
// wire. If they do not exist, the wire is 1 bit wide.
@@ -92,6 +100,28 @@ class PWire : public LineInfo {
/*
* $Log: PWire.h,v $
* Revision 1.15 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.14 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.12 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.11 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.10 2001/01/16 02:44:18 steve
* Use the iosfwd header if available.
*
+83
View File
@@ -0,0 +1,83 @@
* Getting Started with Icarus Verilog
Icarus Verilog is a Verilog compiler. It is suitable for use as a
simulator, and, to some degree, synthesizer. Icarus Verilog runs under
Linux and a variety of UNIX systems, as well as Windows as a command
line tool, so the instructions are generally applicable to all
environments. Note that this is only a quick start. For more detailed
documentation, see the manual page for the iverilog command.
* Hello, World!
The first thing you want to do as a user is learn how to compile and
execute even the most trivial design. For the purposes of simulation,
we use as our example *the* most trivial simulation:
module main;
initial
begin
$display("Hello, World");
$finish ;
end
endmodule
By a text editor (or copy hello.vl from the Icarus Verilog examples
directory) arrange for this program to be in a text file, "hello.vl".
Next, compile this program with a command like this:
% iverilog -o hello hello.vl
The results of this compile are placed into the file "hello", as the
"-o" flag tells the compiler where to place the compiled result. Next,
execute the compiled program like so:
% vvp hello
Hello, World
And there it is, the program has been executed. So what happened? The
first step, the "iverilog" command, read and interpreted the source
file, then generated a compiled result. The compiled form may be
selected by command line switches, but the default form is the VVP
format, which is actually run by the "vvp" command.
The "iverilog" and "vvp" commands are the only commands that users
use to invoke Icarus Verilog. What the compiler actually does is
controlled by command line switches. In our little example, we asked
the compiler to compile the source program to the default vvp form,
which is in turn executed by the vvp program.
* Windows Install
The easiest way to install under Windows is to get a precompiled
installer for the version you wish to install. Icarus Verilog is
distributed for Windows users as a self-installing .exe. Just execute
the installer and follow the instructions. During the install, take
note of the directory where the program is installed: for example,
C:\iverilog is a good place to install.
Once the binary is installed, you need to add the bin directory to
your execution path. The executables you need are in C:\iverilog\bin,
where the "C:\iverilog" part is actually the root of where you
installed the package. The programs are in the bin subdirectory. Put
this directory in your PATH environment variable, and the above
commands become accessible to you at the command line prompt, or even
in batch files.
* Linux Install
Under Linux, the install is even easier. For RedHat and Mandrake based
systems, there is the appropriate RPM file. Just install the package
with the "rpm -U <file>" command. Debian users should get Icarus
Verilog packages from the main Debian software site.
* Install From Source
In this case, see the readme and other documentation that comes with
the source.
+198 -116
View File
@@ -12,12 +12,15 @@ home page at <http://www.icarus.com/eda/verilog>.
Icarus Verilog is not aimed at being a simulator in the traditional
sense, but a compiler that generates code employed by back-end
tools. These back- end tools currently include a simulator written in
C++ called VVM and an XNF (Xilinx Netlist Format) generator. See
"vvm.txt" and "xnf.txt" for further details on these back-end
processors. In the future, backends are expected for EDIF/LPM,
tools. These back-end tools currently include a simulator engine
called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF fpga
netlist generator. In the future, backends are expected for EDIF/LPM,
structural Verilog, VHDL, etc.
For instructions on how to run Icarus Verilog,
see the ``iverilog'' man page.
2.0 Building/Installing Icarus Verilog From Source
If you are starting from source, the build process is designed to be
@@ -26,15 +29,17 @@ system and C/C++ compilation should be able to build the source
distribution with little effort. Some actual programming skills are
not required, but helpful in case of problems.
If you are building for Windows, see the mingw.txt file.
2.1 Compile Time Prerequisites
You need the following software to compile Icarus Verilog from source
on a UNIX-like system:
- GNU Make
The Makefiles use some GNU extensions to, so a basic POSIX
The Makefiles use some GNU extensions, so a basic POSIX
make will not work. Linux systems typically come with a
satisfactory make. BSD based systems (i.e. NetBSD, FreeBSD)
satisfactory make. BSD based systems (i.e., NetBSD, FreeBSD)
typically have GNU make as the gmake program.
- ISO C++ Compiler
@@ -63,15 +68,48 @@ with the commands:
./configure
make
2.3 Installation
Normally, this command automatically figures out every thing it needs
to know. It generally works pretty well. There are a few flags to the
configure script that modify its behavior:
--without-ipal
This turns off support for Icarus PAL, whether ipal
libraries are installed or not.
--prefix=<root>
The default is /usr/local, which causes the tool suite to
be compiled for install in /usr/local/bin,
/usr/local/share/ivl, etc.
I recommend that if you are configuring for precompiled
binaries, use --prefix=/usr. On Solaris systems, it is
common to use --prefix=/opt. You can configure for a non-root
install with --prefix=$HOME.
2.3 (Optional) Testing
To run a simple test before installation, execute
make check
The commands printed by this run might help you in running Icarus
Verilog on your own Verilog sources before the package is installed
by root.
2.4 Installation
Now install the files in an appropriate place. (The makefiles by
default install in /usr/local unless you specify a different prefix
with the --prefix=<path> flag to the configure command.) Do this as
root.
with the --prefix=<path> flag to the configure command.) You may need
to do this as root to gain access to installation directories.
make install
2.5 Uninstallation
The generated Makefiles also include the uninstall target. This should
remove all the files that ``make install'' creates.
3.0 How Icarus Verilog Works
This tool includes a parser which reads in Verilog (plus extensions)
@@ -91,7 +129,7 @@ only sees a single input file. See ivlpp/ivlpp.txt for details.
3.2 Parse
The verilog compiler starts by parsing the verilog source file. The
The Verilog compiler starts by parsing the Verilog source file. The
output of the parse in a list of Module objects in PFORM. The pform
(see pform.h) is mostly a direct reflection of the compilation
step. There may be dangling references, and it is not yet clear which
@@ -114,10 +152,10 @@ The elaborate() function performs the elaboration.
One can see a human readable version of the final, elaborated and
optimized netlist by using the ``-N <path>'' flag to the compiler. If
elaboration succeeds, the final netlist (i.e. after optimizations but
elaboration succeeds, the final netlist (i.e., after optimizations but
before code generation) will be dumped into the file named <path>.
Elaboration is actually performed it two steps: scopes and parameters
Elaboration is actually performed in two steps: scopes and parameters
first, followed by the structural and behavioral elaboration.
3.3.1 Scope Elaboration
@@ -146,19 +184,19 @@ simply passing through the pform.
This is actually a collection of processing steps that perform
optimizations that do not depend on the target technology. Examples of
some useful transformations would be,
some useful transformations are
- eliminate null effect circuitry,
- eliminate null effect circuitry
- combinational reduction
- Constant propagation
- constant propagation
The actual functions performed are specified on the ivl command line by
the -F flags (See below).
the -F flags (see below).
3.5 Code Generation
This step takes the design netlist and uses it to drive the code
generator. (See target.h.) This may require transforming the
generator (see target.h). This may require transforming the
design to suit the technology.
The emit() method of the Design class performs this step. It runs
@@ -170,7 +208,10 @@ command line.
3.6 ATTRIBUTES
The parser accepts as an extension to Verilog the $attribute module
NOTE: The $attribute syntax will soon be deprecated in favor of the
Verilog-2001 attribute syntax, which is cleaner and standardized.
The parser accepts, as an extension to Verilog, the $attribute module
item. The syntax of the $attribute item is:
$attribute (<identifier>, <key>, <value>);
@@ -198,6 +239,11 @@ between processing steps. Processing steps that are aware of others
may place attributes on netlist objects to communicate information to
later steps.
Icarus Verilog also accepts the Verilog 2001 syntax for
attributes. They have the same general meaning as with the $attribute
syntax, but they are attached to objects by position instead of by
name. Also, the key is a Verilog identifier instead of a string.
4.0 Running iverilog
The preferred way to invoke the compiler is with the iverilog(1)
@@ -205,82 +251,8 @@ command. This program invokes the preprocessor (ivlpp) and the
compiler (ivl) with the proper command line options to get the job
done in a friendly way. See the iverilog(1) man page for usage details.
4.1 Running IVL Directly (not recommended)
The ivl command is the compiler driver, that invokes the parser,
optimization functions and the code generator, but not the preprocessor.
Usage: ivl <options>... file
ivl -h
-F <name>
Use this flag to request an optimization function be applied
to the netlist before it is sent to the target output
stage. Any number of -F options may be given, to specify a
variety of processing steps. The steps will be applied in
order, with the output of one uses as the input to the next.
The function is specified by name. Use the "ivl -h" command to
get a list of configured function names.
-m <module>
Cause a named VPI module to be included in the module
list. This parameter appends the named module to the end of
the VPI_MODULE_LIST. This is an ordered list of modules to be
loaded into the simulation at runtime.
This list can also be set with -fVPI_MODULE_LIST=<list> which
sets the list completely. Then, -m after this will append
module names to the list sp specified. The default list
includes "system".
-N <file>
Dump the elaborated netlist to the named file. The netlist is
the folly elaborated netlist, after all the function modules
are applied and right before the output generator is
called. This is an aid for debugging the compiler, and the
output generator in particular.
-o <file>
Normally, the generated result is sent to standard
output. Use the -o flag to specify an output file for the
generated result.
-P <file>
Write the PForm of the parsed input to the specified file.
The pform is the compiler's understanding of the input after
parsing and before elaboration. This is an aid for debugging
the compiler.
-p <assign>
Use this flag to set a parameter value. The format of the
assignment is <key>=<value> where key is any string up to the
first '=', and <value> is the rest of the option. If the '='
is omitted, then the key is assigned the empty string.
The useful keys are defined by the functions and the target in
use. These assignments are specifically useful for passing
target specific information to the target back-end, or
options/parameters to optimization functions, if any are defined.
-s <module>
Normally, ivl will elaborate the only module in the source
file. If there are multiple modules, use this option to select
the module to be used as the top-level module.
-T [min|typ|max]
Normally, ivl will select typ values from min:type:max
expressions and print a warning. This flag tells the compiler
exactly which value to choose, and suppresses the warning.
-t <name>
Select the output format for the compiled result. Use the
"ivl -h" command to get a list of configured targets.
-v
Print version and copyright information for ivl.
4.2 EXAMPLES
4.1 EXAMPLES
Example: Compiling "hello.vl"
@@ -297,7 +269,7 @@ endmodule
--------------------------------------------------------------
Insure that "iverilog" is on your search path, and the vpi library
Ensure that "iverilog" is on your search path, and the vpi library
is available.
To compile the program:
@@ -318,25 +290,12 @@ by the compiler. See the iverilog(1) man page.
Icarus Verilog is in development - as such it still only supports a
(growing) subset of Verilog. Below is a description of some of the
currently unsupported verilog features. This list is not exhaustive,
currently unsupported Verilog features. This list is not exhaustive,
and does not account for errors in the compiler. See the Icarus
Verilog web page for the current state of support for Verilog, and in
particular, browse the bug report database for reported unsupported
constructs.
- block disable not supported, i.e.:
begin : foo
[...]
disable foo; // sorry
[...]
end
- Functions in structural contexts are not supported.
assign foo = user_function(a,b); // sorry
always @(a or b) foo = user_function(a,b); // OK
- real data types not supported. This includes real and
realtime. However, floating point constants in delay expressions
are supported so that `timescale works properly.
@@ -348,6 +307,118 @@ constructs.
- trireg is not supported. tri0 and tri1 are supported.
- tran primitives, i.e. tran, tranif1, tranif0, rtran, rtranif1
and rtranif0 are not supported.
- Module instance arrays are not supported, although gate instance
arrays do work.
- Net delays, of the form "wire #N foo;" do not work. Delays in
every other context do work properly, including the V2001 form
"wire #5 foo = bar;"
- Event controls inside non-blocking assignments are not supported.
i.e.: a <= @(posedge clk) b;
- Lists of named events of the form @(event_1 or event_2) are not
supported. Named events are otherwise supported, and lists of
other kinds of events are also supported.
- Macro arguments are not supported. `define macros are supported,
but they cannot take arguments.
5.1 Nonstandard Constructs or Behaviors
Icarus Verilog includes some features that are not part of the
IEEE1364 standard, but have well defined meaning, and also sometimes
gives nonstandard (but extended) meanings to some features of the
language that are defined.
$sizeof(<expr>)
$bits(<expr>)
The $bits system function returns the size in bits of the
expression that is its argument. The result of this
function is undefined if the argument doesn't have a
self-determined size.
The $sizeof function is deprecated in favor of $bits, which is
the same thing, but included in the SystemVerilog definition.
$simtime
The $simtime system function returns as a 64bit value the
simulation time, unscaled by the time units of local
scope. This is different from the $time and $stime functions
which return the scaled times. This function is added for
regression testing of the compiler and run time, but can be
used by applications who really want the simulation time.
Note that the simulation time can be confusing if there are
lots of different `timescales within a design. It is not in
general possible to predict what the simulation precision will
turn out to be.
Builtin system functions
Certain of the system functions have well defined meanings, so
can theoretically be evaluated at compile time, instead of
using runtime VPI code. Doing so means that VPI cannot
override the definitions of functions handled in this
manner. On the other hand, this makes them synthesizeable, and
also allows for more aggressive constant propagation. The
functions handled in this manner are:
$bits
$signed
$sizeof
$unsigned
Implementations of these system functions in VPI modules will
be ignored.
Preprocessing Library Modules
Icarus Verilog does preprocess modules that are loaded from
libraries via the -y mechanism. However, the only macros
defined during compilation of that file are those that it
defines itself (or includes) or that are defined on the
command line or command file.
Specifically, macros defined in the non-library source files
are not remembered when the library module is loaded. This is
intentional. If it were otherwise, then compilation results
might vary depending on the order that libraries are loaded,
and that is too unpredictable.
It is said that some commercial compilers do allow macro
definitions to span library modules. That's just plain weird.
Width in %t Time Formats
Standard Verilog does not allow width fields in the %t formats
of display strings. For example, this is illegal:
$display("Time is %0t", %time);
Standard Verilog instead relies on the $timeformat to
completely specify the format.
Icarus Verilog allows the programmer to specify the field
with. The "%t" format in Icarus Verilog works exactly as it
does in standard Verilog. However, if the programmer chooses
to specify a minimum width (i.e., "%5t"), then for that display
Icarus Verilog will override the $timeformat minimum width and
use the explicit minimum width.
vpiScope iterator on vpiScope objects.
In the VPI, the normal way to iterate over vpiScope objects
contained within a vpiScope object, is the vpiInternalScope
iterator. Icarus Verilog adds support for the vpiScope
iterator of a vpiScope object, that iterates over *everything*
the is contained in the current scope. This is useful in cases
where one wants to iterate over all the objects in a scope
without iterating over all the contained types explicitly.
6.0 CREDITS
@@ -363,15 +434,19 @@ Verilog guidance, and especially testing from many people, including
Larry Doolittle <[email protected]>
Guy Hutchison <[email protected]>
Ales Hvezda <[email protected]>
Yasuhisa Kato <ykato@mac.com>
Venkat Iyer <venkat@comit.com>
Yasuhisa Kato <[email protected]>
James Lee <[email protected]>
Peter Monta <[email protected]>
Daniel H. Nelsen <[email protected]>
Stefan Petersen <[email protected]>
Michael Ruff <[email protected]>
Mike Runyan <[email protected]>
Jason Schonberg <[email protected]>
Stuart Sutherland <[email protected]>
Stephen Tell <[email protected]>
Stefan Theide <[email protected]>
Tom Verbeure
Steve Wilson <[email protected]>
and others. Testers in particular include a larger community of people
@@ -397,7 +472,10 @@ removed from the list) send e-mail to me.
Hamish Moffatt <[email protected]>
Macintosh -- MacO/S
Yasuhisa Kato <ykato@mac.com>
Yasuhisa Kato <kato@y.email.ne.jp>
Mac O/S X
Timothy J. Wood <[email protected]>
NetBSD/*
Dan McMahill <[email protected]>
@@ -408,15 +486,19 @@ removed from the list) send e-mail to me.
Cygwin32/*
Venkat Iyer <[email protected]>
Mingw32
Venkat Iyer <[email protected]>
(+) These are not the only systems where Icarus Verilog has been run,
just the systems where precompiled binaries are publicly available.
6.2 TEST SUITE MANAGER
Steve Wilson <stevew@home.com> or <[email protected]> has taken on
the large task of managing the test suite. He has maintained the
regression test scripts, the driver list, received submissions from
myself and others, and has written a great many tests on his own. Any
compiler writer, for any language, will tell you that the test suite
is at least as important as the compiler code itself.
Steve Wilson <stevew@ka6s.com> has taken on the large task of managing
the test suite. He has maintained the regression test scripts, the
driver list, received submissions from myself and others, and has
written a great many tests on his own. Any compiler writer, for any
language, will tell you that the test suite is at least as important
as the compiler code itself.
+60 -102
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: Statement.cc,v 1.22 2000/07/26 05:08:07 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.cc,v 1.28 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "Statement.h"
# include "PExpr.h"
@@ -30,17 +32,19 @@ Statement::~Statement()
PAssign_::PAssign_(PExpr*lval, PExpr*ex)
: event_(0), lval_(lval), rval_(ex)
{
delay_ = 0;
}
PAssign_::PAssign_(PExpr*lval, PExpr*de, PExpr*ex)
: event_(0), lval_(lval), rval_(ex)
{
if (de) delay_.set_delay(de);
delay_ = de;
}
PAssign_::PAssign_(PExpr*lval, PEventStatement*ev, PExpr*ex)
: event_(ev), lval_(lval), rval_(ex)
{
delay_ = 0;
}
PAssign_::~PAssign_()
@@ -103,11 +107,20 @@ PBlock::~PBlock()
delete list_[idx];
}
PCallTask::PCallTask(const string&n, const svector<PExpr*>&p)
: name_(n), parms_(p)
PCallTask::PCallTask(const hname_t&n, const svector<PExpr*>&p)
: path_(n), parms_(p)
{
}
PCallTask::~PCallTask()
{
}
const hname_t& PCallTask::path() const
{
return path_;
}
PCase::PCase(NetCase::TYPE t, PExpr*ex, svector<PCase::Item*>*l)
: type_(t), expr_(ex), items_(l)
{
@@ -165,7 +178,7 @@ PDelayStatement::~PDelayStatement()
{
}
PDisable::PDisable(const string&sc)
PDisable::PDisable(const hname_t&sc)
: scope_(sc)
{
}
@@ -177,6 +190,7 @@ PDisable::~PDisable()
PEventStatement::PEventStatement(const svector<PEEvent*>&ee)
: expr_(ee), statement_(0)
{
assert(expr_.count() > 0);
}
@@ -186,6 +200,11 @@ PEventStatement::PEventStatement(PEEvent*ee)
expr_[0] = ee;
}
PEventStatement::PEventStatement(void)
: statement_(0)
{
}
PEventStatement::~PEventStatement()
{
// delete the events and the statement?
@@ -217,6 +236,17 @@ PForever::~PForever()
delete statement_;
}
PForStatement::PForStatement(PExpr*n1, PExpr*e1, PExpr*cond,
PExpr*n2, PExpr*e2, Statement*st)
: name1_(n1), expr1_(e1), cond_(cond), name2_(n2), expr2_(e2),
statement_(st)
{
}
PForStatement::~PForStatement()
{
}
PProcess::~PProcess()
{
delete statement_;
@@ -243,7 +273,7 @@ PRepeat::~PRepeat()
delete statement_;
}
PTrigger::PTrigger(const string&e)
PTrigger::PTrigger(const hname_t&e)
: event_(e)
{
}
@@ -252,6 +282,11 @@ PTrigger::~PTrigger()
{
}
PWhile::PWhile(PExpr*e1, Statement*st)
: cond_(e1), statement_(st)
{
}
PWhile::~PWhile()
{
delete cond_;
@@ -260,105 +295,28 @@ PWhile::~PWhile()
/*
* $Log: Statement.cc,v $
* Revision 1.22 2000/07/26 05:08:07 steve
* Parse disable statements to pform.
* Revision 1.28 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.21 2000/05/11 23:37:26 steve
* Add support for procedural continuous assignment.
* Revision 1.27 2002/04/21 22:31:02 steve
* Redo handling of assignment internal delays.
* Leave it possible for them to be calculated
* at run time.
*
* Revision 1.20 2000/04/22 04:20:19 steve
* Add support for force assignment.
* Revision 1.26 2002/04/21 04:59:07 steve
* Add support for conbinational events by finding
* the inputs to expressions and some statements.
* Get case and assignment statements working.
*
* Revision 1.19 2000/04/12 04:23:57 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
* Revision 1.25 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*
* Revision 1.18 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
* Revision 1.17 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.16 1999/09/29 18:36:02 steve
* Full case support
*
* Revision 1.15 1999/09/22 02:00:48 steve
* assignment with blocking event delay.
*
* Revision 1.14 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
* Revision 1.13 1999/09/02 01:59:27 steve
* Parse non-blocking assignment delays.
*
* Revision 1.12 1999/07/12 00:59:36 steve
* procedural blocking assignment delays.
*
* Revision 1.11 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.10 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever
* and repeat statements.
*
* Revision 1.9 1999/06/15 05:38:39 steve
* Support case expression lists.
*
* Revision 1.8 1999/06/13 23:51:16 steve
* l-value part select for procedural assignments.
*
* Revision 1.7 1999/06/06 20:45:38 steve
* Add parse and elaboration of non-blocking assignments,
* Replace list<PCase::Item*> with an svector version,
* Add integer support.
*
* Revision 1.6 1999/05/10 00:16:58 steve
* Parse and elaborate the concatenate operator
* in structural contexts, Replace vector<PExpr*>
* and list<PExpr*> with svector<PExpr*>, evaluate
* constant expressions with parameters, handle
* memories as lvalues.
*
* Parse task declarations, integer types.
*
* Revision 1.5 1999/02/03 04:20:11 steve
* Parse and elaborate the Verilog CASE statement.
*
* Revision 1.4 1999/01/25 05:45:56 steve
* Add the LineInfo class to carry the source file
* location of things. PGate, Statement and PProcess.
*
* elaborate handles module parameter mismatches,
* missing or incorrect lvalues for procedural
* assignment, and errors are propogated to the
* top of the elaboration call tree.
*
* Attach line numbers to processes, gates and
* assignment statements.
*
* Revision 1.3 1998/11/11 03:13:04 steve
* Handle while loops.
*
* Revision 1.2 1998/11/07 17:05:05 steve
* Handle procedural conditional, and some
* of the conditional expressions.
*
* Elaborate signals and identifiers differently,
* allowing the netlist to hold signal information.
*
* Revision 1.1 1998/11/03 23:28:55 steve
* Introduce verilog to CVS.
* Revision 1.24 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.23 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*/
+75 -142
View File
@@ -18,14 +18,15 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: Statement.h,v 1.29 2000/09/09 15:21:26 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.h,v 1.36 2002/08/12 01:34:58 steve Exp $"
#endif
# include <string>
# include "svector.h"
# include "PDelays.h"
# include "PExpr.h"
# include "HName.h"
# include "LineInfo.h"
class PExpr;
class Statement;
@@ -55,6 +56,8 @@ class PProcess : public LineInfo {
Type type() const { return type_; }
Statement*statement() { return statement_; }
map<string,PExpr*> attributes;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -74,7 +77,7 @@ class Statement : public LineInfo {
virtual ~Statement() =0;
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
};
@@ -96,7 +99,7 @@ class PAssign_ : public Statement {
protected:
NetAssign_* elaborate_lval(Design*, NetScope*scope) const;
PDelays delay_;
PExpr* delay_;
PEventStatement*event_;
private:
@@ -113,11 +116,9 @@ class PAssign : public PAssign_ {
~PAssign();
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
private:
NetProc*assign_to_memory_(class NetMemory*, PExpr*,
Design*des, const string&path) const;
};
class PAssignNB : public PAssign_ {
@@ -128,11 +129,11 @@ class PAssignNB : public PAssign_ {
~PAssignNB();
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
private:
NetProc*assign_to_memory_(class NetMemory*, PExpr*,
Design*des, const string&path) const;
Design*des, NetScope*scope) const;
};
/*
@@ -154,11 +155,9 @@ class PBlock : public Statement {
BL_TYPE bl_type() const { return bl_type_; }
//unsigned size() const { return list_.count(); }
//const Statement*stat(unsigned idx) const { return list_[idx]; }
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
private:
@@ -170,9 +169,10 @@ class PBlock : public Statement {
class PCallTask : public Statement {
public:
explicit PCallTask(const string&n, const svector<PExpr*>&parms);
explicit PCallTask(const hname_t&n, const svector<PExpr*>&parms);
~PCallTask();
string name() const { return name_; }
const hname_t& path() const;
unsigned nparms() const { return parms_.count(); }
@@ -187,13 +187,13 @@ class PCallTask : public Statement {
}
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
private:
NetProc* elaborate_sys(Design*des, const string&path) const;
NetProc* elaborate_usr(Design*des, const string&path) const;
NetProc* elaborate_sys(Design*des, NetScope*scope) const;
NetProc* elaborate_usr(Design*des, NetScope*scope) const;
const string name_;
hname_t path_;
svector<PExpr*> parms_;
};
@@ -208,7 +208,7 @@ class PCase : public Statement {
PCase(NetCase::TYPE, PExpr*ex, svector<Item*>*);
~PCase();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -229,7 +229,7 @@ class PCAssign : public Statement {
explicit PCAssign(PExpr*l, PExpr*r);
~PCAssign();
virtual NetCAssign* elaborate(Design*des, const string&path) const;
virtual NetCAssign* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -243,7 +243,7 @@ class PCondit : public Statement {
PCondit(PExpr*ex, Statement*i, Statement*e);
~PCondit();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -263,7 +263,7 @@ class PDeassign : public Statement {
explicit PDeassign(PExpr*l);
~PDeassign();
virtual NetDeassign* elaborate(Design*des, const string&path) const;
virtual NetDeassign* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -277,7 +277,7 @@ class PDelayStatement : public Statement {
~PDelayStatement();
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
private:
@@ -292,14 +292,14 @@ class PDelayStatement : public Statement {
class PDisable : public Statement {
public:
explicit PDisable(const string&sc);
explicit PDisable(const hname_t&sc);
~PDisable();
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
private:
string scope_;
hname_t scope_;
};
/*
@@ -308,6 +308,7 @@ class PDisable : public Statement {
*
* @name <statement>;
* @(expr) <statement>;
* @* <statement>;
*/
class PEventStatement : public Statement {
@@ -315,18 +316,20 @@ class PEventStatement : public Statement {
explicit PEventStatement(const svector<PEEvent*>&ee);
explicit PEventStatement(PEEvent*ee);
// Make an @* statement.
explicit PEventStatement(void);
~PEventStatement();
void set_statement(Statement*st);
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
// This method is used to elaborate, but attach a previously
// elaborated statement to the event.
NetProc* elaborate_st(Design*des, const string&path, NetProc*st) const;
NetProc* elaborate_st(Design*des, NetScope*scope, NetProc*st) const;
private:
svector<PEEvent*>expr_;
@@ -339,7 +342,7 @@ class PForce : public Statement {
explicit PForce(PExpr*l, PExpr*r);
~PForce();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -352,7 +355,7 @@ class PForever : public Statement {
explicit PForever(Statement*s);
~PForever();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -364,12 +367,10 @@ class PForStatement : public Statement {
public:
PForStatement(PExpr*n1, PExpr*e1, PExpr*cond,
PExpr*n2, PExpr*e2, Statement*st)
: name1_(n1), expr1_(e1), cond_(cond), name2_(n2), expr2_(e2),
statement_(st)
{ }
PExpr*n2, PExpr*e2, Statement*st);
~PForStatement();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -396,7 +397,7 @@ class PRepeat : public Statement {
explicit PRepeat(PExpr*expr, Statement*s);
~PRepeat();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -411,7 +412,7 @@ class PRelease : public Statement {
explicit PRelease(PExpr*l);
~PRelease();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -425,24 +426,23 @@ class PRelease : public Statement {
class PTrigger : public Statement {
public:
explicit PTrigger(const string&ev);
explicit PTrigger(const hname_t&ev);
~PTrigger();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
string event_;
hname_t event_;
};
class PWhile : public Statement {
public:
PWhile(PExpr*e1, Statement*st)
: cond_(e1), statement_(st) { }
PWhile(PExpr*e1, Statement*st);
~PWhile();
virtual NetProc* elaborate(Design*des, const string&path) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
@@ -453,6 +453,38 @@ class PWhile : public Statement {
/*
* $Log: Statement.h,v $
* Revision 1.36 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.35 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.34 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.33 2002/04/21 22:31:02 steve
* Redo handling of assignment internal delays.
* Leave it possible for them to be calculated
* at run time.
*
* Revision 1.32 2002/04/21 04:59:07 steve
* Add support for conbinational events by finding
* the inputs to expressions and some statements.
* Get case and assignment statements working.
*
* Revision 1.31 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.30 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.29 2000/09/09 15:21:26 steve
* move lval elaboration to PExpr virtual methods.
*
@@ -480,104 +512,5 @@ class PWhile : public Statement {
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*
* Revision 1.23 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
* Revision 1.22 2000/03/11 03:25:51 steve
* Locate scopes in statements.
*
* Revision 1.21 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.20 1999/09/29 18:36:02 steve
* Full case support
*
* Revision 1.19 1999/09/22 02:00:48 steve
* assignment with blocking event delay.
*
* Revision 1.18 1999/09/15 01:55:06 steve
* Elaborate non-blocking assignment to memories.
*
* Revision 1.17 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
* Revision 1.16 1999/09/02 01:59:27 steve
* Parse non-blocking assignment delays.
*
* Revision 1.15 1999/07/12 00:59:36 steve
* procedural blocking assignment delays.
*
* Revision 1.14 1999/07/03 02:12:51 steve
* Elaborate user defined tasks.
*
* Revision 1.13 1999/06/24 04:24:18 steve
* Handle expression widths for EEE and NEE operators,
* add named blocks and scope handling,
* add registers declared in named blocks.
*
* Revision 1.12 1999/06/19 21:06:16 steve
* Elaborate and supprort to vvm the forever
* and repeat statements.
*
* Revision 1.11 1999/06/15 05:38:39 steve
* Support case expression lists.
*
* Revision 1.10 1999/06/13 23:51:16 steve
* l-value part select for procedural assignments.
*
* Revision 1.9 1999/06/06 20:45:38 steve
* Add parse and elaboration of non-blocking assignments,
* Replace list<PCase::Item*> with an svector version,
* Add integer support.
*
* Revision 1.8 1999/05/10 00:16:58 steve
* Parse and elaborate the concatenate operator
* in structural contexts, Replace vector<PExpr*>
* and list<PExpr*> with svector<PExpr*>, evaluate
* constant expressions with parameters, handle
* memories as lvalues.
*
* Parse task declarations, integer types.
*
* Revision 1.7 1999/04/29 02:16:26 steve
* Parse OR of event expressions.
*
* Revision 1.6 1999/02/03 04:20:11 steve
* Parse and elaborate the Verilog CASE statement.
*
* Revision 1.5 1999/01/25 05:45:56 steve
* Add the LineInfo class to carry the source file
* location of things. PGate, Statement and PProcess.
*
* elaborate handles module parameter mismatches,
* missing or incorrect lvalues for procedural
* assignment, and errors are propogated to the
* top of the elaboration call tree.
*
* Attach line numbers to processes, gates and
* assignment statements.
*
* Revision 1.4 1998/11/11 03:13:04 steve
* Handle while loops.
*
* Revision 1.3 1998/11/09 18:55:33 steve
* Add procedural while loops,
* Parse procedural for loops,
* Add procedural wait statements,
* Add constant nodes,
* Add XNOR logic gate,
* Make vvm output look a bit prettier.
*
* Revision 1.2 1998/11/07 17:05:05 steve
* Handle procedural conditional, and some
* of the conditional expressions.
*
* Elaborate signals and identifiers differently,
* allowing the netlist to hold signal information.
*
* Revision 1.1 1998/11/03 23:28:56 steve
* Introduce verilog to CVS.
*
*/
#endif
+85
View File
@@ -0,0 +1,85 @@
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
* ---
* You should also have recieved a copy of the Picture Elements
* Binary Software License offer along with the source. This offer
* allows you to obtain the right to redistribute the software in
* binary (compiled) form. If you have not received it, contact
* Picture Elements, Inc., 777 Panoramic Way, Berkeley, CA 94704.
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.cc,v 1.3 2003/01/16 21:44:46 steve Exp $"
#endif
# include "StringHeap.h"
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
# include <stdlib.h>
# include <string.h>
# include <assert.h>
StringHeap::StringHeap()
{
cell_base_ = 0;
cell_ptr_ = HEAPCELL;
cell_count_ = 0;
}
StringHeap::~StringHeap()
{
// This is a planned memory leak. The string heap is indended
// to hold permanently-allocated strings.
}
const char* StringHeap::add(const char*text)
{
unsigned len = strlen(text);
assert((len+1) <= HEAPCELL);
unsigned rem = HEAPCELL - cell_ptr_;
if (rem < (len+1)) {
cell_base_ = (char*)malloc(HEAPCELL);
cell_ptr_ = 0;
cell_count_ += 1;
assert(cell_base_ != 0);
}
char*res = cell_base_ + cell_ptr_;
memcpy(res, text, len);
cell_ptr_ += len;
cell_base_[cell_ptr_++] = 0;
assert(cell_ptr_ <= HEAPCELL);
return res;
}
/*
* $Log: StringHeap.cc,v $
* Revision 1.3 2003/01/16 21:44:46 steve
* Keep some debugging status.
*
* Revision 1.2 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.1 2002/08/04 19:13:16 steve
* dll uses StringHeap for named items.
*
*/
+57
View File
@@ -0,0 +1,57 @@
#ifndef __StringHeap_H
#define __StringHeap_H
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.h,v 1.3 2003/01/16 21:44:46 steve Exp $"
#endif
class StringHeap {
public:
StringHeap();
~StringHeap();
const char*add(const char*);
private:
enum { HEAPCELL = 0x10000 };
char*cell_base_;
unsigned cell_ptr_;
unsigned cell_count_;
private: // not implemented
StringHeap(const StringHeap&);
StringHeap& operator= (const StringHeap&);
};
/*
* $Log: StringHeap.h,v $
* Revision 1.3 2003/01/16 21:44:46 steve
* Keep some debugging status.
*
* Revision 1.2 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.1 2002/08/04 19:13:16 steve
* dll uses StringHeap for named items.
*
*/
#endif
+159
View File
@@ -0,0 +1,159 @@
#ifndef __acc_user_H
#define __acc_user_H
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: acc_user.h,v 1.6 2002/08/12 01:34:58 steve Exp $"
#endif
/*
* This header file contains the definitions and declarations needed
* by an Icarus Verilog user using acc_ routines.
*
* NOTE: Icarus Verilog does not support acc_ routines. This is just a
* stub. The functions that are implemented here are actually
* implemented using VPI routines.
*/
#ifdef __cplusplus
# define EXTERN_C_START extern "C" {
# define EXTERN_C_END }
#else
# define EXTERN_C_START
# define EXTERN_C_END
# define bool int
#endif
EXTERN_C_START
/*
* This is a declaration of the "handle" type that is compatible with
* the vpiHandle from vpi_user.h.
*/
typedef struct __vpiHandle *handle;
/* OBJECT TYPES */
#define accScope 21
#define accScalar 300
#define accVector 302
/* type VALUES FOR t_setval_delay STRUCTURE */
#define accNoDelay 0
#define accInertialDelay 1
#define accTransportDelay 2
#define accPureTransportDelay 3
#define accForceFlag 4
#define accReleaseFlag 5
/* type VALUES FOR t_setval_value STRUCTURE */
#define accBinStrVal 1
#define accOctStrVal 2
#define accDecStrVal 3
#define accHexStrVal 4
#define accScalarVal 5
#define accIntVal 6
#define accRealVal 7
#define accStringVal 8
#define accVectorVal 9
/* type VALUES FOR t_acc_time STRUCTURE */
#define accTime 1
#define accSimTime 2
#define accRealTime 3
typedef struct t_acc_time {
int type;
int low, high;
double real;
} s_acc_time, *p_acc_time;
typedef struct t_setval_delay {
s_acc_time time;
int model;
} s_setval_delay, *p_setval_delay;
typedef struct t_acc_vecval {
int aval;
int bval;
} s_acc_vecval, *p_acc_vecval;
typedef struct t_setval_value {
int format;
union {
char*str;
int scalar;
int integer;
double real;
p_acc_vecval vector;
} value;
} s_setval_value, *p_setval_value, s_acc_value, *p_acc_value;
extern int acc_error_flag;
extern int acc_initialize(void);
extern void acc_close(void);
extern int acc_fetch_argc(void);
extern char**acc_fetch_argv(void);
extern char* acc_fetch_fullname(handle obj);
extern int acc_fetch_tfarg_int(int n);
extern char* acc_fetch_tfarg_str(int n);
extern handle acc_handle_tfarg(int n);
extern handle acc_next_topmod(handle prev_topmod);
extern int acc_object_of_type(handle object, int type);
extern char*acc_product_version(void);
extern int acc_set_value(handle obj, p_setval_value value,
p_setval_delay delay);
extern char* acc_version(void);
EXTERN_C_END
/*
* $Log: acc_user.h,v $
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2002/06/11 15:19:12 steve
* Add acc_fetch_argc/argv/version (mruff)
*
* Revision 1.4 2002/06/07 02:58:58 steve
* Add a bunch of acc/tf functions. (mruff)
*
* Revision 1.3 2002/06/02 19:03:29 steve
* Add acc_handle_tfarg and acc_next_topmode
*
* Revision 1.2 2002/05/30 02:06:05 steve
* Implement acc_product_version.
*
* Revision 1.1 2002/05/23 03:46:42 steve
* Add the acc_user.h header file.
*
*/
#endif
+97
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@@ -0,0 +1,97 @@
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: async.cc,v 1.4 2002/08/18 22:07:16 steve Exp $"
#endif
# include "config.h"
# include "functor.h"
# include "netlist.h"
# include <assert.h>
bool NetAssign::is_asynchronous()
{
return true;
}
bool NetCondit::is_asynchronous()
{
return false;
}
bool NetEvWait::is_asynchronous()
{
/* The "sense" set contains the set of Nexa that are in the
sensitivity list. We also presume here that the list is
only LEVEL sensitive. */
NexusSet*sense = new NexusSet;
for (unsigned idx = 0 ; idx < nevents_ ; idx += 1) {
NexusSet*tmp = event(idx)->nex_async_();
if (tmp == 0) {
delete sense;
return false;
}
sense->add(*tmp);
delete tmp;
}
NexusSet*inputs = statement_->nex_input();
if (! sense->contains(*inputs)) {
delete sense;
delete inputs;
return false;
}
delete sense;
delete inputs;
return true;
}
bool NetProc::is_asynchronous()
{
return false;
}
bool NetProcTop::is_asynchronous()
{
if (type_ == NetProcTop::KINITIAL)
return false;
return statement_->is_asynchronous();
}
/*
* $Log: async.cc,v $
* Revision 1.4 2002/08/18 22:07:16 steve
* Detect temporaries in sequential block synthesis.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/07/04 00:24:16 steve
* initial statements are not asynchronous.
*
* Revision 1.1 2002/06/30 02:21:31 steve
* Add structure for asynchronous logic synthesis.
*
*/
+49
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@@ -0,0 +1,49 @@
ATTRIBUTES TO CONTROL SYNTHESIS
The following is a summary of Verilog attributes that Icarus Verilog
understands within Verilog source files to control synthesis
behavior. This section documents generic synthesis attributes. For
target specific attributes, see target specific documentation.
These attributes only effect the behavior of the synthesizer. For
example, the ivl_combinational will not generate an error message
if the Verilog is being compiled for simulation. (It may generate a
warning.)
* Attributes for "always" and "initial" statements
(* ivl_combinational *)
This attribute tells the compiler that the statement models
combinational logic. If the compiler finds that it cannot make
combinational logic out of a marked always statement, it will
report an error.
This attribute can be used to prevent accidentally inferring
latches or flip-flops where the user intended combinational
logic.
(* ivl_synthesis_on *)
This attribute tells the compiler that the marked always statement
is synthesizeable. The compiler will attempt to synthesize the
code in the marked "always" statement. If it cannot in any way
synthesize it, then it will report an error.
(* ivl_synthesis_off *)
If this value is attached to an "always" statement, then the
compiler will *not* synthesize the "always" statment. This can be
used, for example, to mark embedded test bench code.
* Attributes for signals (wire/reg/integer/tri/etc.)
[ none defined yet ]
* Other Attributes
[ none defined yet ]
+5 -3
View File
@@ -9,9 +9,11 @@
echo "Autoconf in root..."
autoconf
for dir
in vpip vvp tgt-vvp
for dir in vpip vvp tgt-vvp tgt-fpga libveriuser
do
echo "Autoconf in $dir..."
( cd $dir ; autoconf )
( cd ./$dir ; autoconf )
done
echo "Precompiling lexor_keyword.gperf"
gperf -o -i 7 -C -k 1-3,\$ -L ANSI-C -H keyword_hash -N check_identifier -t ./lexor_keyword.gperf > lexor_keyword.cc
+3
View File
@@ -4,3 +4,6 @@
[-tvvm-check]
<ivl>./ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=vpi %f %m -o%o.cc -- -
[-tvvp-check]
<ivl>./ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=./tgt-vvp/vvp.tgt -Fcprop -Fnodangle -fVPI_MODULE_PATH=vpi %f %m -o%o -- -
+47 -13
View File
@@ -18,10 +18,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: compiler.h,v 1.5 2000/10/31 17:49:02 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: compiler.h,v 1.13 2002/08/12 01:34:58 steve Exp $"
#endif
# include <list>
/*
* This defines constants and defaults for the compiler in general.
*/
@@ -65,24 +67,56 @@
/* Implicit definitions of wires. */
extern bool warn_implicit;
extern bool error_implicit;
/* inherit timescales accross files. */
extern bool warn_timescale;
/* This is true if verbose output is requested. */
extern bool verbose_flag;
/* This is an ordered list of library suffixxes to search. */
extern list<const char*>library_suff;
extern int build_library_index(const char*path, bool key_case_sensitive);
/* This is the generation of Verilog that the compiler is asked to
support. */
enum generation_t {
GN_VER1995 = 1,
GN_VER2001 = 2,
GN_SYSVER30 = 3,
GN_DEFAULT = 3
};
extern generation_t generation_flag;
/* This is the string to use to invoke the preprocessor. */
extern char*ivlpp_string;
/*
* $Log: compiler.h,v $
* Revision 1.5 2000/10/31 17:49:02 steve
* Support time variables.
* Revision 1.13 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2000/08/20 04:13:56 steve
* Add ivl_target support for logic gates, and
* make the interface more accessible.
* Revision 1.12 2002/05/28 20:40:37 steve
* ivl indexes the search path for libraries, and
* supports case insensitive module-to-file lookup.
*
* Revision 1.3 2000/03/17 21:50:25 steve
* Switch to control warnings.
* Revision 1.11 2002/05/28 00:50:39 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*
* Revision 1.2 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
* Revision 1.10 2002/05/24 01:13:00 steve
* Support language generation flag -g.
*
* Revision 1.1 1999/06/06 20:42:48 steve
* Make compiler width a compile time constant.
* Revision 1.9 2002/04/22 00:53:39 steve
* Do not allow implicit wires in sensitivity lists.
*
* Revision 1.8 2002/04/15 00:04:22 steve
* Timescale warnings.
*
* Revision 1.7 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*/
#endif
+411 -140
View File
@@ -1,6 +1,7 @@
#! /bin/sh
# Attempt to guess a canonical system name.
# Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
# Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@@ -22,7 +23,7 @@
# the same distribution terms that you use for the rest of that program.
# Written by Per Bothner <[email protected]>.
# The master version of this file is at the FSF in /home/gd/gnu/lib.
# Please send patches to <[email protected]>.
#
# This script attempts to guess a canonical system name similar to
# config.sub. If it succeeds, it prints the system name on stdout, and
@@ -35,6 +36,20 @@
# (but try to keep the structure clean).
#
# Use $HOST_CC if defined. $CC may point to a cross-compiler
if test x"$CC_FOR_BUILD" = x; then
if test x"$HOST_CC" != x; then
CC_FOR_BUILD="$HOST_CC"
else
if test x"$CC" != x; then
CC_FOR_BUILD="$CC"
else
CC_FOR_BUILD=cc
fi
fi
fi
# This is needed to find uname on a Pyramid OSx when run in the BSD universe.
# ([email protected] 8/24/94.)
if (test -f /.attbin/uname) >/dev/null 2>&1 ; then
@@ -46,11 +61,49 @@ UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown
UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown
UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown
trap 'rm -f dummy.c dummy.o dummy; exit 1' 1 2 15
dummy=dummy-$$
trap 'rm -f $dummy.c $dummy.o $dummy; exit 1' 1 2 15
# Note: order is significant - the case branches are not exclusive.
case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in
*:NetBSD:*:*)
# Netbsd (nbsd) targets should (where applicable) match one or
# more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*,
# *-*-netbsdecoff* and *-*-netbsd*. For targets that recently
# switched to ELF, *-*-netbsd* would select the old
# object file format. This provides both forward
# compatibility and a consistent mechanism for selecting the
# object file format.
# Determine the machine/vendor (is the vendor relevant).
case "${UNAME_MACHINE}" in
amiga) machine=m68k-cbm ;;
arm32) machine=arm-unknown ;;
atari*) machine=m68k-atari ;;
sun3*) machine=m68k-sun ;;
mac68k) machine=m68k-apple ;;
macppc) machine=powerpc-apple ;;
hp3[0-9][05]) machine=m68k-hp ;;
ibmrt|romp-ibm) machine=romp-ibm ;;
*) machine=${UNAME_MACHINE}-unknown ;;
esac
# The Operating System including object format.
if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \
| grep __ELF__ >/dev/null
then
# Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout).
# Return netbsd for either. FIX?
os=netbsd
else
os=netbsdelf
fi
# The OS release
release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
# Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM:
# contains redundant information, the shorter form:
# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used.
echo "${machine}-${os}${release}"
exit 0 ;;
alpha:OSF1:*:*)
if test $UNAME_RELEASE = "V4.0"; then
UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'`
@@ -59,46 +112,62 @@ case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in
# A Tn.n version is a released field test version.
# A Xn.n version is an unreleased experimental baselevel.
# 1.2 uses "1.2" for uname -r.
cat <<EOF >dummy.s
cat <<EOF >$dummy.s
.data
\$Lformat:
.byte 37,100,45,37,120,10,0 # "%d-%x\n"
.text
.globl main
.align 4
.ent main
main:
.frame \$30,0,\$26,0
.prologue 0
.long 0x47e03d80 # implver $0
lda \$2,259
.long 0x47e20c21 # amask $2,$1
srl \$1,8,\$2
sll \$2,2,\$2
sll \$0,3,\$0
addl \$1,\$0,\$0
addl \$2,\$0,\$0
ret \$31,(\$26),1
.frame \$30,16,\$26,0
ldgp \$29,0(\$27)
.prologue 1
.long 0x47e03d80 # implver \$0
lda \$2,-1
.long 0x47e20c21 # amask \$2,\$1
lda \$16,\$Lformat
mov \$0,\$17
not \$1,\$18
jsr \$26,printf
ldgp \$29,0(\$26)
mov 0,\$16
jsr \$26,exit
.end main
EOF
${CC-cc} dummy.s -o dummy 2>/dev/null
$CC_FOR_BUILD $dummy.s -o $dummy 2>/dev/null
if test "$?" = 0 ; then
./dummy
case "$?" in
7)
case `./$dummy` in
0-0)
UNAME_MACHINE="alpha"
;;
15)
1-0)
UNAME_MACHINE="alphaev5"
;;
14)
1-1)
UNAME_MACHINE="alphaev56"
;;
10)
1-101)
UNAME_MACHINE="alphapca56"
;;
16)
2-303)
UNAME_MACHINE="alphaev6"
;;
2-307)
UNAME_MACHINE="alphaev67"
;;
esac
fi
rm -f dummy.s dummy
echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//' | tr [[A-Z]] [[a-z]]`
rm -f $dummy.s $dummy
echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'`
exit 0 ;;
Alpha\ *:Windows_NT*:*)
# How do we know it's Interix rather than the generic POSIX subsystem?
# Should we change UNAME_MACHINE based on the output of uname instead
# of the specific Alpha model?
echo alpha-pc-interix
exit 0 ;;
21064:Windows_NT:50:3)
echo alpha-dec-winnt3.5
@@ -106,12 +175,12 @@ EOF
Amiga*:UNIX_System_V:4.0:*)
echo m68k-cbm-sysv4
exit 0;;
amiga:NetBSD:*:*)
echo m68k-cbm-netbsd${UNAME_RELEASE}
exit 0 ;;
amiga:OpenBSD:*:*)
echo m68k-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
*:[Aa]miga[Oo][Ss]:*:*)
echo ${UNAME_MACHINE}-unknown-amigaos
exit 0 ;;
arc64:OpenBSD:*:*)
echo mips64el-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
@@ -130,16 +199,16 @@ EOF
wgrisc:OpenBSD:*:*)
echo mipsel-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
*:OS/390:*:*)
echo i370-ibm-openedition
exit 0 ;;
arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*)
echo arm-acorn-riscix${UNAME_RELEASE}
exit 0;;
arm32:NetBSD:*:*)
echo arm-unknown-netbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
exit 0 ;;
SR2?01:HI-UX/MPP:*:*)
echo hppa1.1-hitachi-hiuxmpp
exit 0;;
Pyramid*:OSx*:*:*|MIS*:OSx*:*:*)
Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*)
# [email protected] (Earle F. Ake) contributed MIS and NILE.
if test "`(/bin/universe) 2>/dev/null`" = att ; then
echo pyramid-pyramid-sysv3
@@ -147,9 +216,12 @@ EOF
echo pyramid-pyramid-bsd
fi
exit 0 ;;
NILE:*:*:dcosx)
NILE*:*:*:dcosx)
echo pyramid-pyramid-svr4
exit 0 ;;
sun4H:SunOS:5.*:*)
echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
exit 0 ;;
sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
exit 0 ;;
@@ -189,21 +261,38 @@ EOF
aushp:SunOS:*:*)
echo sparc-auspex-sunos${UNAME_RELEASE}
exit 0 ;;
atari*:NetBSD:*:*)
echo m68k-atari-netbsd${UNAME_RELEASE}
exit 0 ;;
atari*:OpenBSD:*:*)
echo m68k-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
sun3*:NetBSD:*:*)
echo m68k-sun-netbsd${UNAME_RELEASE}
# The situation for MiNT is a little confusing. The machine name
# can be virtually everything (everything which is not
# "atarist" or "atariste" at least should have a processor
# > m68000). The system name ranges from "MiNT" over "FreeMiNT"
# to the lowercase version "mint" (or "freemint"). Finally
# the system name "TOS" denotes a system which is actually not
# MiNT. But MiNT is downward compatible to TOS, so this should
# be no problem.
atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*)
echo m68k-atari-mint${UNAME_RELEASE}
exit 0 ;;
atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*)
echo m68k-atari-mint${UNAME_RELEASE}
exit 0 ;;
*falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*)
echo m68k-atari-mint${UNAME_RELEASE}
exit 0 ;;
milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*)
echo m68k-milan-mint${UNAME_RELEASE}
exit 0 ;;
hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*)
echo m68k-hades-mint${UNAME_RELEASE}
exit 0 ;;
*:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*)
echo m68k-unknown-mint${UNAME_RELEASE}
exit 0 ;;
sun3*:OpenBSD:*:*)
echo m68k-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
mac68k:NetBSD:*:*)
echo m68k-apple-netbsd${UNAME_RELEASE}
exit 0 ;;
mac68k:OpenBSD:*:*)
echo m68k-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
@@ -225,12 +314,17 @@ EOF
VAX*:ULTRIX*:*:*)
echo vax-dec-ultrix${UNAME_RELEASE}
exit 0 ;;
2020:CLIX:*:*)
2020:CLIX:*:* | 2430:CLIX:*:*)
echo clipper-intergraph-clix${UNAME_RELEASE}
exit 0 ;;
mips:*:*:UMIPS | mips:*:*:RISCos)
sed 's/^ //' << EOF >dummy.c
int main (argc, argv) int argc; char **argv; {
sed 's/^ //' << EOF >$dummy.c
#ifdef __cplusplus
#include <stdio.h> /* for printf() prototype */
int main (int argc, char *argv[]) {
#else
int main (argc, argv) int argc; char *argv[]; {
#endif
#if defined (host_mips) && defined (MIPSEB)
#if defined (SYSTYPE_SYSV)
printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0);
@@ -245,10 +339,10 @@ EOF
exit (-1);
}
EOF
${CC-cc} dummy.c -o dummy \
&& ./dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \
&& rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy \
&& ./$dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \
&& rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
echo mips-mips-riscos${UNAME_RELEASE}
exit 0 ;;
Night_Hawk:Power_UNIX:*:*)
@@ -266,15 +360,18 @@ EOF
AViiON:dgux:*:*)
# DG/UX returns AViiON for all architectures
UNAME_PROCESSOR=`/usr/bin/uname -p`
if [ $UNAME_PROCESSOR = mc88100 -o $UNAME_PROCESSOR = mc88110 ] ; then
if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx \
-o ${TARGET_BINARY_INTERFACE}x = x ] ; then
if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ]
then
if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \
[ ${TARGET_BINARY_INTERFACE}x = x ]
then
echo m88k-dg-dgux${UNAME_RELEASE}
else
else
echo m88k-dg-dguxbcs${UNAME_RELEASE}
fi
else
echo i586-dg-dgux${UNAME_RELEASE}
fi
else echo i586-dg-dgux${UNAME_RELEASE}
fi
exit 0 ;;
M88*:DolphinOS:*:*) # DolphinOS (SVR3)
echo m88k-dolphin-sysv3
@@ -300,7 +397,7 @@ EOF
exit 0 ;;
*:AIX:2:3)
if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then
sed 's/^ //' << EOF >dummy.c
sed 's/^ //' << EOF >$dummy.c
#include <sys/systemcfg.h>
main()
@@ -311,8 +408,8 @@ EOF
exit(0);
}
EOF
${CC-cc} dummy.c -o dummy && ./dummy && rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
echo rs6000-ibm-aix3.2.5
elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then
echo rs6000-ibm-aix3.2.4
@@ -321,7 +418,8 @@ EOF
fi
exit 0 ;;
*:AIX:*:4)
if /usr/sbin/lsattr -EHl proc0 | grep POWER >/dev/null 2>&1; then
IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | head -1 | awk '{ print $1 }'`
if /usr/sbin/lsattr -EHl ${IBM_CPU_ID} | grep POWER >/dev/null 2>&1; then
IBM_ARCH=rs6000
else
IBM_ARCH=powerpc
@@ -339,7 +437,7 @@ EOF
ibmrt:4.4BSD:*|romp-ibm:BSD:*)
echo romp-ibm-bsd4.4
exit 0 ;;
ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC NetBSD and
ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and
echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to
exit 0 ;; # report: romp-ibm BSD 4.3
*:BOSX:*:*)
@@ -354,18 +452,52 @@ EOF
hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*)
echo m68k-hp-bsd4.4
exit 0 ;;
9000/[3478]??:HP-UX:*:*)
9000/[34678]??:HP-UX:*:*)
case "${UNAME_MACHINE}" in
9000/31? ) HP_ARCH=m68000 ;;
9000/[34]?? ) HP_ARCH=m68k ;;
9000/7?? | 9000/8?[1679] ) HP_ARCH=hppa1.1 ;;
9000/8?? ) HP_ARCH=hppa1.0 ;;
9000/[678][0-9][0-9])
sed 's/^ //' << EOF >$dummy.c
#define _HPUX_SOURCE
#include <stdlib.h>
#include <unistd.h>
int main ()
{
#if defined(_SC_KERNEL_BITS)
long bits = sysconf(_SC_KERNEL_BITS);
#endif
long cpu = sysconf (_SC_CPU_VERSION);
switch (cpu)
{
case CPU_PA_RISC1_0: puts ("hppa1.0"); break;
case CPU_PA_RISC1_1: puts ("hppa1.1"); break;
case CPU_PA_RISC2_0:
#if defined(_SC_KERNEL_BITS)
switch (bits)
{
case 64: puts ("hppa2.0w"); break;
case 32: puts ("hppa2.0n"); break;
default: puts ("hppa2.0"); break;
} break;
#else /* !defined(_SC_KERNEL_BITS) */
puts ("hppa2.0"); break;
#endif
default: puts ("hppa1.0"); break;
}
exit (0);
}
EOF
(CCOPTS= $CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null ) && HP_ARCH=`./$dummy`
rm -f $dummy.c $dummy
esac
HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'`
echo ${HP_ARCH}-hp-hpux${HPUX_REV}
exit 0 ;;
3050*:HI-UX:*:*)
sed 's/^ //' << EOF >dummy.c
sed 's/^ //' << EOF >$dummy.c
#include <unistd.h>
int
main ()
@@ -390,8 +522,8 @@ EOF
exit (0);
}
EOF
${CC-cc} dummy.c -o dummy && ./dummy && rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy && ./$dummy && rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
echo unknown-hitachi-hiuxwe2
exit 0 ;;
9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* )
@@ -400,6 +532,9 @@ EOF
9000/8??:4.3bsd:*:*)
echo hppa1.0-hp-bsd
exit 0 ;;
*9??*:MPE/iX:*:*)
echo hppa1.0-hp-mpeix
exit 0 ;;
hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* )
echo hppa1.1-hp-osf
exit 0 ;;
@@ -416,6 +551,9 @@ EOF
parisc*:Lites*:*:*)
echo hppa1.1-hp-lites
exit 0 ;;
hppa*:OpenBSD:*:*)
echo hppa-unknown-openbsd
exit 0 ;;
C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*)
echo c1-convex-bsd
exit 0 ;;
@@ -446,45 +584,60 @@ EOF
-e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/
exit 0 ;;
CRAY*TS:*:*:*)
echo t90-cray-unicos${UNAME_RELEASE}
echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
exit 0 ;;
CRAY*T3E:*:*:*)
echo alpha-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
exit 0 ;;
CRAY*SV1:*:*:*)
echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
exit 0 ;;
CRAY-2:*:*:*)
echo cray2-cray-unicos
exit 0 ;;
F300:UNIX_System_V:*:*)
FUJITSU_SYS=`uname -p | tr [A-Z] [a-z] | sed -e 's/\///'`
FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'`
FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'`
echo "f300-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}"
exit 0 ;;
F301:UNIX_System_V:*:*)
echo f301-fujitsu-uxpv`echo $UNAME_RELEASE | sed 's/ .*//'`
exit 0 ;;
hp3[0-9][05]:NetBSD:*:*)
echo m68k-hp-netbsd${UNAME_RELEASE}
exit 0 ;;
hp300:OpenBSD:*:*)
echo m68k-unknown-openbsd${UNAME_RELEASE}
exit 0 ;;
i?86:BSD/386:*:* | *:BSD/OS:*:*)
i?86:BSD/386:*:* | i?86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*)
echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE}
exit 0 ;;
sparc*:BSD/OS:*:*)
echo sparc-unknown-bsdi${UNAME_RELEASE}
exit 0 ;;
*:BSD/OS:*:*)
echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE}
exit 0 ;;
*:FreeBSD:*:*)
echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`
exit 0 ;;
*:NetBSD:*:*)
echo ${UNAME_MACHINE}-unknown-netbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
exit 0 ;;
*:OpenBSD:*:*)
echo ${UNAME_MACHINE}-unknown-openbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
exit 0 ;;
i*:CYGWIN*:*)
echo i386-pc-cygwin32
echo ${UNAME_MACHINE}-pc-cygwin
exit 0 ;;
i*:MINGW*:*)
echo i386-pc-mingw32
echo ${UNAME_MACHINE}-pc-mingw32
exit 0 ;;
i*:Windows_NT*:* | Pentium*:Windows_NT*:*)
# How do we know it's Interix rather than the generic POSIX subsystem?
# It also conflicts with pre-2.0 versions of AT&T UWIN. Should we
# UNAME_MACHINE based on the output of uname instead of i386?
echo i386-pc-interix
exit 0 ;;
i*:UWIN*:*)
echo ${UNAME_MACHINE}-pc-uwin
exit 0 ;;
p*:CYGWIN*:*)
echo powerpcle-unknown-cygwin32
echo powerpcle-unknown-cygwin
exit 0 ;;
prep*:SunOS:5.*:*)
echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
@@ -493,9 +646,11 @@ EOF
echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`
exit 0 ;;
*:Linux:*:*)
# The BFD linker knows what the default object file format is, so
# first see if it will tell us.
ld_help_string=`ld --help 2>&1`
# first see if it will tell us. cd to the root directory to prevent
# problems with other programs or directories called `ld' in the path.
ld_help_string=`cd /; ld --help 2>&1`
ld_supported_emulations=`echo $ld_help_string \
| sed -ne '/supported emulations:/!d
s/[ ][ ]*/ /g
@@ -503,13 +658,45 @@ EOF
s/ .*//
p'`
case "$ld_supported_emulations" in
i?86linux) echo "${UNAME_MACHINE}-pc-linux-gnuaout" ; exit 0 ;;
i?86coff) echo "${UNAME_MACHINE}-pc-linux-gnucoff" ; exit 0 ;;
sparclinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0 ;;
m68klinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0 ;;
elf32ppc)
*ia64)
echo "${UNAME_MACHINE}-unknown-linux"
exit 0
;;
i?86linux)
echo "${UNAME_MACHINE}-pc-linux-gnuaout"
exit 0
;;
elf_i?86)
echo "${UNAME_MACHINE}-pc-linux"
exit 0
;;
i?86coff)
echo "${UNAME_MACHINE}-pc-linux-gnucoff"
exit 0
;;
sparclinux)
echo "${UNAME_MACHINE}-unknown-linux-gnuaout"
exit 0
;;
armlinux)
echo "${UNAME_MACHINE}-unknown-linux-gnuaout"
exit 0
;;
elf32arm*)
echo "${UNAME_MACHINE}-unknown-linux-gnuoldld"
exit 0
;;
armelf_linux*)
echo "${UNAME_MACHINE}-unknown-linux-gnu"
exit 0
;;
m68klinux)
echo "${UNAME_MACHINE}-unknown-linux-gnuaout"
exit 0
;;
elf32ppc | elf32ppclinux)
# Determine Lib Version
cat >dummy.c <<EOF
cat >$dummy.c <<EOF
#include <features.h>
#if defined(__GLIBC__)
extern char __libc_version[];
@@ -528,71 +715,85 @@ main(argc, argv)
}
EOF
LIBC=""
${CC-cc} dummy.c -o dummy 2>/dev/null
$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null
if test "$?" = 0 ; then
./dummy | grep 1\.99 > /dev/null
./$dummy | grep 1\.99 > /dev/null
if test "$?" = 0 ; then
LIBC="libc1"
fi
fi
rm -f dummy.c dummy
echo powerpc-unknown-linux-gnu${LIBC} ; exit 0 ;;
fi
rm -f $dummy.c $dummy
echo powerpc-unknown-linux-gnu${LIBC}
exit 0
;;
esac
if test "${UNAME_MACHINE}" = "alpha" ; then
sed 's/^ //' <<EOF >dummy.s
.globl main
.ent main
main:
.frame \$30,0,\$26,0
.prologue 0
.long 0x47e03d80 # implver $0
lda \$2,259
.long 0x47e20c21 # amask $2,$1
srl \$1,8,\$2
sll \$2,2,\$2
sll \$0,3,\$0
addl \$1,\$0,\$0
addl \$2,\$0,\$0
ret \$31,(\$26),1
.end main
cat <<EOF >$dummy.s
.data
\$Lformat:
.byte 37,100,45,37,120,10,0 # "%d-%x\n"
.text
.globl main
.align 4
.ent main
main:
.frame \$30,16,\$26,0
ldgp \$29,0(\$27)
.prologue 1
.long 0x47e03d80 # implver \$0
lda \$2,-1
.long 0x47e20c21 # amask \$2,\$1
lda \$16,\$Lformat
mov \$0,\$17
not \$1,\$18
jsr \$26,printf
ldgp \$29,0(\$26)
mov 0,\$16
jsr \$26,exit
.end main
EOF
LIBC=""
${CC-cc} dummy.s -o dummy 2>/dev/null
$CC_FOR_BUILD $dummy.s -o $dummy 2>/dev/null
if test "$?" = 0 ; then
./dummy
case "$?" in
7)
case `./$dummy` in
0-0)
UNAME_MACHINE="alpha"
;;
15)
1-0)
UNAME_MACHINE="alphaev5"
;;
14)
1-1)
UNAME_MACHINE="alphaev56"
;;
10)
1-101)
UNAME_MACHINE="alphapca56"
;;
16)
2-303)
UNAME_MACHINE="alphaev6"
;;
esac
2-307)
UNAME_MACHINE="alphaev67"
;;
esac
objdump --private-headers dummy | \
objdump --private-headers $dummy | \
grep ld.so.1 > /dev/null
if test "$?" = 0 ; then
LIBC="libc1"
fi
fi
rm -f dummy.s dummy
fi
rm -f $dummy.s $dummy
echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} ; exit 0
elif test "${UNAME_MACHINE}" = "mips" ; then
cat >dummy.c <<EOF
main(argc, argv)
int argc;
char *argv[];
{
cat >$dummy.c <<EOF
#ifdef __cplusplus
#include <stdio.h> /* for printf() prototype */
int main (int argc, char *argv[]) {
#else
int main (argc, argv) int argc; char *argv[]; {
#endif
#ifdef __MIPSEB__
printf ("%s-unknown-linux-gnu\n", argv[1]);
#endif
@@ -602,8 +803,10 @@ main(argc, argv)
return 0;
}
EOF
${CC-cc} dummy.c -o dummy 2>/dev/null && ./dummy "${UNAME_MACHINE}" && rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy "${UNAME_MACHINE}" && rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
elif test "${UNAME_MACHINE}" = "s390"; then
echo s390-ibm-linux && exit 0
else
# Either a pre-BFD a.out linker (linux-gnuoldld)
# or one that does not give us useful --help.
@@ -622,12 +825,14 @@ EOF
;;
esac
# Determine whether the default compiler is a.out or elf
cat >dummy.c <<EOF
cat >$dummy.c <<EOF
#include <features.h>
main(argc, argv)
int argc;
char *argv[];
{
#ifdef __cplusplus
#include <stdio.h> /* for printf() prototype */
int main (int argc, char *argv[]) {
#else
int main (argc, argv) int argc; char *argv[]; {
#endif
#ifdef __ELF__
# ifdef __GLIBC__
# if __GLIBC__ >= 2
@@ -644,8 +849,8 @@ main(argc, argv)
return 0;
}
EOF
${CC-cc} dummy.c -o dummy 2>/dev/null && ./dummy "${UNAME_MACHINE}" && rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy "${UNAME_MACHINE}" && rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
fi ;;
# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. earlier versions
# are messed up and put the nodename in both sysname and nodename.
@@ -661,10 +866,20 @@ EOF
echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION}
exit 0 ;;
i?86:*:4.*:* | i?86:SYSTEM_V:4.*:*)
UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'`
if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then
echo ${UNAME_MACHINE}-univel-sysv${UNAME_RELEASE}
echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL}
else
echo ${UNAME_MACHINE}-pc-sysv${UNAME_RELEASE}
echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL}
fi
exit 0 ;;
i?86:*:5:7*)
# Fixed at (any) Pentium or better
UNAME_MACHINE=i586
if [ ${UNAME_SYSTEM} = "UnixWare" ] ; then
echo ${UNAME_MACHINE}-sco-sysv${UNAME_RELEASE}uw${UNAME_VERSION}
else
echo ${UNAME_MACHINE}-pc-sysv${UNAME_RELEASE}
fi
exit 0 ;;
i?86:*:3.2:*)
@@ -676,12 +891,20 @@ EOF
(/bin/uname -X|egrep i80486 >/dev/null) && UNAME_MACHINE=i486
(/bin/uname -X|egrep '^Machine.*Pentium' >/dev/null) \
&& UNAME_MACHINE=i586
(/bin/uname -X|egrep '^Machine.*Pent ?II' >/dev/null) \
&& UNAME_MACHINE=i686
(/bin/uname -X|egrep '^Machine.*Pentium Pro' >/dev/null) \
&& UNAME_MACHINE=i686
echo ${UNAME_MACHINE}-pc-sco$UNAME_REL
else
echo ${UNAME_MACHINE}-pc-sysv32
fi
exit 0 ;;
i?86:*DOS:*:*)
echo ${UNAME_MACHINE}-pc-msdosdjgpp
exit 0 ;;
pc:*:*:*)
# Left here for compatibility:
# uname -m prints for DJGPP always 'pc', but it prints nothing about
# the processor, so we play safe by assuming i386.
echo i386-pc-msdosdjgpp
@@ -722,7 +945,7 @@ EOF
mc68030:UNIX_System_V:4.*:*)
echo m68k-atari-sysv4
exit 0 ;;
i?86:LynxOS:2.*:*)
i?86:LynxOS:2.*:* | i?86:LynxOS:3.[01]*:*)
echo i386-unknown-lynxos${UNAME_RELEASE}
exit 0 ;;
TSUNAMI:LynxOS:2.*:*)
@@ -734,6 +957,9 @@ EOF
SM[BE]S:UNIX_SV:*:*)
echo mips-dde-sysv${UNAME_RELEASE}
exit 0 ;;
RM*:ReliantUNIX-*:*:*)
echo mips-sni-sysv4
exit 0 ;;
RM*:SINIX-*:*:*)
echo mips-sni-sysv4
exit 0 ;;
@@ -764,19 +990,61 @@ EOF
news*:NEWS-OS:*:6*)
echo mips-sony-newsos6
exit 0 ;;
R3000:*System_V*:*:* | R4000:UNIX_SYSV:*:*)
R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*)
if [ -d /usr/nec ]; then
echo mips-nec-sysv${UNAME_RELEASE}
else
echo mips-unknown-sysv${UNAME_RELEASE}
fi
exit 0 ;;
BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only.
echo powerpc-be-beos
exit 0 ;;
BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only.
echo powerpc-apple-beos
exit 0 ;;
BePC:BeOS:*:*) # BeOS running on Intel PC compatible.
echo i586-pc-beos
exit 0 ;;
SX-4:SUPER-UX:*:*)
echo sx4-nec-superux${UNAME_RELEASE}
exit 0 ;;
SX-5:SUPER-UX:*:*)
echo sx5-nec-superux${UNAME_RELEASE}
exit 0 ;;
Power*:Rhapsody:*:*)
echo powerpc-apple-rhapsody${UNAME_RELEASE}
exit 0 ;;
*:Rhapsody:*:*)
echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE}
exit 0 ;;
*:Darwin:*:*)
echo `uname -p`-apple-darwin${UNAME_RELEASE}
exit 0 ;;
*:procnto*:*:* | *:QNX:[0123456789]*:*)
if test "${UNAME_MACHINE}" = "x86pc"; then
UNAME_MACHINE=pc
fi
echo `uname -p`-${UNAME_MACHINE}-nto-qnx
exit 0 ;;
*:QNX:*:4*)
echo i386-pc-qnx
exit 0 ;;
NSR-W:NONSTOP_KERNEL:*:*)
echo nsr-tandem-nsk${UNAME_RELEASE}
exit 0 ;;
BS2000:POSIX*:*:*)
echo bs2000-siemens-sysv
exit 0 ;;
DS/*:UNIX_System_V:*:*)
echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE}
exit 0 ;;
esac
#echo '(No uname command or uname output not recognized.)' 1>&2
#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2
cat >dummy.c <<EOF
cat >$dummy.c <<EOF
#ifdef _SEQUENT_
# include <sys/types.h>
# include <sys/utsname.h>
@@ -814,7 +1082,10 @@ main ()
#endif
int version;
version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`;
printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
if (version < 4)
printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
else
printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version);
exit (0);
#endif
@@ -874,8 +1145,8 @@ main ()
}
EOF
${CC-cc} dummy.c -o dummy 2>/dev/null && ./dummy && rm dummy.c dummy && exit 0
rm -f dummy.c dummy
$CC_FOR_BUILD $dummy.c -o $dummy 2>/dev/null && ./$dummy && rm $dummy.c $dummy && exit 0
rm -f $dummy.c $dummy
# Apollos put the system type in the environment.
+70
View File
@@ -0,0 +1,70 @@
#ifndef __config_H /* -*- c++ -*- */
#define __config_H
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: config.h.in,v 1.6 2003/01/10 19:01:04 steve Exp $"
#endif
#if defined(__cplusplus)
# if !defined(__GNUC__)
using namespace std;
# elif (__GNUC__ == 3)
using namespace std;
# endif
#endif
# undef NEED_LU
# undef NEED_TU
# undef WLU
# undef WTU
# undef HAVE_TIMES
# undef HAVE_IOSFWD
# undef HAVE_GETOPT_H
# undef HAVE_LIBIBERTY_H
# undef HAVE_MALLOC_H
# undef HAVE_DLFCN_H
# undef HAVE_DL_H
# undef HAVE_FCHMOD
# undef HAVE_LIBREADLINE
# undef HAVE_SYS_WAIT_H
/*
* $Log: config.h.in,v $
* Revision 1.6 2003/01/10 19:01:04 steve
* Only use libiberty.h if available.
*
* Revision 1.5 2002/08/11 23:39:33 steve
* Remove VVM option.
*
* Revision 1.4 2002/02/16 03:18:53 steve
* Make vvm optional, normally off.
*
* Revision 1.3 2001/10/18 16:16:23 steve
* Include HAVE_SYS_WAIT in config.h (PR#306)
*
* Revision 1.2 2001/09/15 18:27:04 steve
* Make configure detect malloc.h
*
* Revision 1.1 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
*/
#endif // __config_H
Vendored
+236 -146
View File
@@ -1,6 +1,8 @@
#! /bin/sh
# Configuration validation subroutine script, version 1.1.
# Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
# Free Software Foundation, Inc.
#
# This file is (in principle) common to ALL GNU software.
# The presence of a machine in this file suggests that SOME GNU software
# can handle that machine. It does not imply ALL GNU software can.
@@ -25,6 +27,9 @@
# configuration script generated by Autoconf, you may include it under
# the same distribution terms that you use for the rest of that program.
# Written by Per Bothner <[email protected]>.
# Please send patches to <[email protected]>.
#
# Configuration subroutine to validate and canonicalize a configuration type.
# Supply the specified configuration type as an argument.
# If it is invalid, we print an error message on stderr and exit with code 1.
@@ -68,7 +73,7 @@ esac
# Here we must recognize all the valid KERNEL-OS combinations.
maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
case $maybe_os in
linux-gnu*)
nto-qnx* | linux-gnu*)
os=-$maybe_os
basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
;;
@@ -98,21 +103,21 @@ case $os in
os=
basic_machine=$1
;;
-sim | -cisco | -oki | -wec | -winbond ) # CYGNUS LOCAL
-sim | -cisco | -oki | -wec | -winbond)
os=
basic_machine=$1
;;
-scout) # CYGNUS LOCAL
-scout)
;;
-wrs) # CYGNUS LOCAL
os=vxworks
-wrs)
os=-vxworks
basic_machine=$1
;;
-hiux*)
os=-hiuxwe2
;;
-sco5)
os=sco3.2v5
os=-sco3.2v5
basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
;;
-sco4)
@@ -131,6 +136,9 @@ case $os in
os=-sco3.2v2
basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
;;
-udk*)
basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
;;
-isc)
os=-isc2.2
basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
@@ -153,44 +161,40 @@ case $os in
-psos*)
os=-psos
;;
-mint | -mint[0-9]*)
basic_machine=m68k-atari
os=-mint
;;
esac
# Decode aliases for certain CPU-COMPANY combinations.
case $basic_machine in
# Recognize the basic CPU types without company name.
# Some are omitted here because they have special meanings below.
tahoe | i860 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \
| arme[lb] | pyramid | mn10200 | mn10300 \
| tron | a29k | 580 | i960 | h8300 | hppa | hppa1.0 | hppa1.1 \
| alpha | alphaev5 | alphaev56 | we32k | ns16k | clipper \
| i370 | sh | powerpc | powerpcle | 1750a | dsp16xx | pdp11 \
| mips64 | mipsel | mips64el | mips64orion | mips64orionel \
| mipstx39 | mipstx39el \
| sparc | sparclet | sparclite | sparc64 | v850)
tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \
| arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \
| 580 | i960 | h8300 \
| x86 | ppcbe | mipsbe | mipsle | shbe | shle | armbe | armle \
| hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \
| hppa64 \
| alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \
| alphaev6[78] \
| we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \
| 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \
| mips64orion | mips64orionel | mipstx39 | mipstx39el \
| mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \
| mips64vr5000 | miprs64vr5000el | mcore \
| sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \
| thumb | d10v | fr30 | avr)
basic_machine=$basic_machine-unknown
;;
m88110 | m680[01234]0 | m683?2 | m68360 | z8k | v70 | h8500 | w65) # CYGNUS LOCAL
basic_machine=$basic_machine-unknown
;;
mips64vr4300 | mips64vr4300el) # CYGNUS LOCAL jsmith/vr4300
basic_machine=$basic_machine-unknown
;;
mips64vr4100 | mips64vr4100el) # CYGNUS LOCAL jsmith/vr4100
basic_machine=$basic_machine-unknown
;;
mips64vr5000 | mips64vr5000el) # CYGNUS LOCAL ian/vr5000
basic_machine=$basic_machine-unknown
;;
mips16) # CYGNUS LOCAL krk/mips16
basic_machine=$basic_machine-unknown
;;
d10v) # CYGNUS LOCAL meissner/d10v
basic_machine=$basic_machine-unknown
m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | h8500 | w65 | pj | pjl)
;;
# We use `pc' rather than `unknown'
# because (1) that's what they normally are, and
# (2) the word "unknown" tends to confuse beginning users.
i[3456]86)
i[34567]86)
basic_machine=$basic_machine-pc
;;
# Object if more than one company name word.
@@ -199,30 +203,32 @@ case $basic_machine in
exit 1
;;
# Recognize the basic CPU types with company name.
vax-* | tahoe-* | i[3456]86-* | i860-* | m32r-* | m68k-* | m68000-* \
# FIXME: clean up the formatting here.
vax-* | tahoe-* | i[34567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
| m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \
| mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \
| power-* | none-* | 580-* | cray2-* | h8300-* | i960-* \
| xmp-* | ymp-* | hppa-* | hppa1.0-* | hppa1.1-* \
| alpha-* | alphaev5-* | alphaev56-* | we32k-* | cydra-* \
| ns16k-* | pn-* | np1-* | xps100-* | clipper-* | orion-* \
| power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \
| xmp-* | ymp-* \
| x86-* | ppcbe-* | mipsbe-* | mipsle-* | shbe-* | shle-* | armbe-* | armle-* \
| hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* \
| hppa2.0n-* | hppa64-* \
| alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \
| alphaev6[78]-* \
| we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \
| clipper-* | orion-* \
| sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \
| sparc64-* | mips64-* | mipsel-* \
| sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \
| mips64el-* | mips64orion-* | mips64orionel-* \
| mipstx39-* | mipstx39el-* \
| f301-*)
;;
m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | h8500-* | d10v-*) # CYGNUS LOCAL
;;
mips64vr4300-* | mips64vr4300el-*) # CYGNUS LOCAL jsmith/vr4300
;;
mips64vr4100-* | mips64vr4100el-*) # CYGNUS LOCAL jsmith/vr4100
;;
mips16-*) # CYGNUS LOCAL krk/mips16
| mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
| mipstx39-* | mipstx39el-* | mcore-* \
| f301-* | armv*-* | s390-* | sv1-* | t3e-* \
| m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
| thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* \
| bs2000-*)
;;
# Recognize the various machine names and aliases which stand
# for a CPU type and a company and sometimes even an OS.
386bsd) # CYGNUS LOCAL
386bsd)
basic_machine=i386-unknown
os=-bsd
;;
@@ -232,11 +238,11 @@ case $basic_machine in
3b*)
basic_machine=we32k-att
;;
a29khif) # CYGNUS LOCAL
a29khif)
basic_machine=a29k-amd
os=-udi
;;
adobe68k) # CYGNUS LOCAL
adobe68k)
basic_machine=m68010-adobe
os=-scout
;;
@@ -269,7 +275,7 @@ case $basic_machine in
basic_machine=m68k-apollo
os=-sysv
;;
apollo68bsd) # CYGNUS LOCAL
apollo68bsd)
basic_machine=m68k-apollo
os=-bsd
;;
@@ -349,7 +355,7 @@ case $basic_machine in
encore | umax | mmax)
basic_machine=ns32k-encore
;;
es1800 | OSE68k | ose68k | ose | OSE) # CYGNUS LOCAL
es1800 | OSE68k | ose68k | ose | OSE)
basic_machine=m68k-ericsson
os=-ose
;;
@@ -371,11 +377,11 @@ case $basic_machine in
basic_machine=h8300-hitachi
os=-hms
;;
h8300xray) # CYGNUS LOCAL
h8300xray)
basic_machine=h8300-hitachi
os=-xray
;;
h8500hms) # CYGNUS LOCAL
h8500hms)
basic_machine=h8500-hitachi
os=-hms
;;
@@ -394,29 +400,30 @@ case $basic_machine in
basic_machine=m68k-hp
os=-hpux
;;
w89k-*) # CYGNUS LOCAL
basic_machine=hppa1.1-winbond
os=-proelf
;;
op50n-*) # CYGNUS LOCAL
basic_machine=hppa1.1-oki
os=-proelf
;;
op60c-*) # CYGNUS LOCAL
basic_machine=hppa1.1-oki
os=-proelf
;;
hppro) # CYGNUS LOCAL
basic_machine=hppa1.1-hp
os=-proelf
;;
hp3k9[0-9][0-9] | hp9[0-9][0-9])
basic_machine=hppa1.0-hp
;;
hp9k2[0-9][0-9] | hp9k31[0-9])
basic_machine=m68000-hp
;;
hp9k3[2-9][0-9])
basic_machine=m68k-hp
;;
hp9k7[0-9][0-9] | hp7[0-9][0-9] | hp9k8[0-9]7 | hp8[0-9]7)
hp9k6[0-9][0-9] | hp6[0-9][0-9])
basic_machine=hppa1.0-hp
;;
hp9k7[0-79][0-9] | hp7[0-79][0-9])
basic_machine=hppa1.1-hp
;;
hp9k78[0-9] | hp78[0-9])
# FIXME: really hppa2.0-hp
basic_machine=hppa1.1-hp
;;
hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893)
# FIXME: really hppa2.0-hp
basic_machine=hppa1.1-hp
;;
hp9k8[0-9][13679] | hp8[0-9][13679])
basic_machine=hppa1.1-hp
;;
hp9k8[0-9][0-9] | hp8[0-9][0-9])
@@ -425,43 +432,50 @@ case $basic_machine in
hppa-next)
os=-nextstep3
;;
hppaosf) # CYGNUS LOCAL
hppaosf)
basic_machine=hppa1.1-hp
os=-osf
;;
hppro)
basic_machine=hppa1.1-hp
os=-proelf
;;
i370-ibm* | ibm*)
basic_machine=i370-ibm
os=-mvs
;;
# I'm not sure what "Sysv32" means. Should this be sysv3.2?
i[3456]86v32)
i[34567]86v32)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv32
;;
i[3456]86v4*)
i[34567]86v4*)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv4
;;
i[3456]86v)
i[34567]86v)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-sysv
;;
i[3456]86sol2)
i[34567]86sol2)
basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
os=-solaris2
;;
i386mach) # CYGNUS LOCAL
i386mach)
basic_machine=i386-mach
os=-mach
;;
i386-vsta | vsta) # CYGNUS LOCAL
i386-vsta | vsta)
basic_machine=i386-unknown
os=-vsta
;;
i386-go32 | go32) # CYGNUS LOCAL
i386-go32 | go32)
basic_machine=i386-unknown
os=-go32
;;
i386-mingw32 | mingw32)
basic_machine=i386-unknown
os=-mingw32
;;
iris | iris4d)
basic_machine=mips-sgi
case $os in
@@ -490,6 +504,10 @@ case $basic_machine in
miniframe)
basic_machine=m68000-convergent
;;
*mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*)
basic_machine=m68k-atari
os=-mint
;;
mipsel*-linux*)
basic_machine=mipsel-unknown
os=-linux-gnu
@@ -504,22 +522,34 @@ case $basic_machine in
mips3*)
basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown
;;
monitor) # CYGNUS LOCAL
mmix*)
basic_machine=mmix-knuth
os=-mmixware
;;
monitor)
basic_machine=m68k-rom68k
os=-coff
;;
msdos) # CYGNUS LOCAL
basic_machine=i386-unknown
msdos)
basic_machine=i386-unknown
os=-msdos
;;
mvs)
basic_machine=i370-ibm
os=-mvs
;;
ncr3000)
basic_machine=i486-ncr
os=-sysv4
;;
netbsd386)
basic_machine=i386-unknown # CYGNUS LOCAL
basic_machine=i386-unknown
os=-netbsd
;;
netwinder)
basic_machine=armv4l-rebel
os=-linux
;;
news | news700 | news800 | news900)
basic_machine=m68k-sony
os=-newsos
@@ -532,7 +562,7 @@ case $basic_machine in
basic_machine=mips-sony
os=-newsos
;;
necv70) # CYGNUS LOCAL
necv70)
basic_machine=v70-nec
os=-sysv
;;
@@ -561,18 +591,25 @@ case $basic_machine in
basic_machine=i960-intel
os=-nindy
;;
mon960) # CYGNUS LOCAL
mon960)
basic_machine=i960-intel
os=-mon960
;;
np1)
basic_machine=np1-gould
;;
OSE68000 | ose68000) # CYGNUS LOCAL
nsr-tandem)
basic_machine=nsr-tandem
;;
op50n-* | op60c-*)
basic_machine=hppa1.1-oki
os=-proelf
;;
OSE68000 | ose68000)
basic_machine=m68000-ericsson
os=-ose
;;
os68k) # CYGNUS LOCAL
os68k)
basic_machine=m68k-none
os=-os68k
;;
@@ -593,25 +630,23 @@ case $basic_machine in
pc532 | pc532-*)
basic_machine=ns32k-pc532
;;
pentium | p5)
basic_machine=i586-intel
pentium | p5 | k5 | k6 | nexen)
basic_machine=i586-pc
;;
pentiumpro | p6)
basic_machine=i686-intel
pentiumpro | p6 | 6x86)
basic_machine=i686-pc
;;
pentium-* | p5-*)
pentiumii | pentium2)
basic_machine=i786-pc
;;
pentium-* | p5-* | k5-* | k6-* | nexen-*)
basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
;;
pentiumpro-* | p6-*)
pentiumpro-* | p6-* | 6x86-*)
basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
;;
k5)
# We don't have specific support for AMD's K5 yet, so just call it a Pentium
basic_machine=i586-amd
;;
nexen)
# We don't have specific support for Nexgen yet, so just call it a Pentium
basic_machine=i586-nexgen
pentiumii-* | pentium2-*)
basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'`
;;
pn)
basic_machine=pn-gould
@@ -631,7 +666,7 @@ case $basic_machine in
ps2)
basic_machine=i386-ibm
;;
rom68k) # CYGNUS LOCAL
rom68k)
basic_machine=m68k-rom68k
os=-coff
;;
@@ -641,7 +676,7 @@ case $basic_machine in
rtpc | rtpc-*)
basic_machine=romp-ibm
;;
sa29200) # CYGNUS LOCAL
sa29200)
basic_machine=a29k-amd
os=-udi
;;
@@ -652,7 +687,7 @@ case $basic_machine in
basic_machine=sh-hitachi
os=-hms
;;
sparclite-wrs) # CYGNUS LOCAL
sparclite-wrs)
basic_machine=sparclite-wrs
os=-vxworks
;;
@@ -663,10 +698,10 @@ case $basic_machine in
spur)
basic_machine=spur-unknown
;;
st2000) # CYGNUS LOCAL
st2000)
basic_machine=m68k-tandem
;;
stratus) # CYGNUS LOCAL
stratus)
basic_machine=i860-stratus
os=-sysv4
;;
@@ -710,10 +745,18 @@ case $basic_machine in
sun386 | sun386i | roadrunner)
basic_machine=i386-sun
;;
sv1)
basic_machine=sv1-cray
os=-unicos
;;
symmetry)
basic_machine=i386-sequent
os=-dynix
;;
t3e)
basic_machine=t3e-cray
os=-unicos
;;
tx39)
basic_machine=mipstx39-unknown
;;
@@ -731,7 +774,7 @@ case $basic_machine in
basic_machine=a29k-nyu
os=-sym1
;;
v810 | necv810) # CYGNUS LOCAL
v810 | necv810)
basic_machine=v810-nec
os=-none
;;
@@ -758,9 +801,13 @@ case $basic_machine in
basic_machine=a29k-wrs
os=-vxworks
;;
w65*) # CYGNUS LOCAL
basic_machine=w65-wdc
os=-none
w65*)
basic_machine=w65-wdc
os=-none
;;
w89k-*)
basic_machine=hppa1.1-winbond
os=-proelf
;;
xmp)
basic_machine=xmp-cray
@@ -769,7 +816,7 @@ case $basic_machine in
xps | xps100)
basic_machine=xps100-honeywell
;;
z8k-*-coff) # CYGNUS LOCAL
z8k-*-coff)
basic_machine=z8k-unknown
os=-sim
;;
@@ -780,13 +827,13 @@ case $basic_machine in
# Here we handle the default manufacturer of certain CPU types. It is in
# some cases the only manufacturer, in others, it is the most popular.
w89k) # CYGNUS LOCAL
w89k)
basic_machine=hppa1.1-winbond
;;
op50n) # CYGNUS LOCAL
op50n)
basic_machine=hppa1.1-oki
;;
op60c) # CYGNUS LOCAL
op60c)
basic_machine=hppa1.1-oki
;;
mips)
@@ -811,7 +858,7 @@ case $basic_machine in
we32k)
basic_machine=we32k-att
;;
sparc)
sparc | sparcv9)
basic_machine=sparc-sun
;;
cydra)
@@ -823,12 +870,16 @@ case $basic_machine in
orion105)
basic_machine=clipper-highlevel
;;
mac | mpw | mac-mpw) # CYGNUS LOCAL
mac | mpw | mac-mpw)
basic_machine=m68k-apple
;;
pmac | pmac-mpw) # CYGNUS LOCAL
pmac | pmac-mpw)
basic_machine=powerpc-apple
;;
c4x*)
basic_machine=c4x-none
os=-coff
;;
*)
echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
exit 1
@@ -861,9 +912,12 @@ case $os in
-solaris)
os=-solaris2
;;
-unixware* | svr4*)
-svr4*)
os=-sysv4
;;
-unixware*)
os=-sysv4.2uw
;;
-gnu/linux*)
os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'`
;;
@@ -879,22 +933,34 @@ case $os in
| -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \
| -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \
| -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \
| -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* \
| -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
| -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
| -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
| -cygwin32* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
| -mingw32* | -linux-gnu* | -uxpv*)
| -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
| -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \
| -interix* | -uwin* | -rhapsody* | -darwin* | -opened* \
| -openstep* | -oskit*)
# Remember, each alternative MUST END IN *, to match a version number.
;;
# CYGNUS LOCAL
-qnx*)
case $basic_machine in
x86-* | i[34567]86-*)
;;
*)
os=-nto$os
;;
esac
;;
-nto*)
os=-nto-qnx
;;
-sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \
| -windows* | -osx | -abug | -netware* | -os9* | -beos* \
| -macos* | -mpw* | -magic* | -mon960* | -lnews* )
| -windows* | -osx | -abug | -netware* | -os9* | -beos* \
| -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*)
;;
-mac*)
os=`echo $os | sed -e 's|mac|macos|'`
;;
# END CYGNUS LOCAL
-linux*)
os=`echo $os | sed -e 's|linux|linux-gnu|'`
;;
@@ -904,6 +970,12 @@ case $os in
-sunos6*)
os=`echo $os | sed -e 's|sunos6|solaris3|'`
;;
-opened*)
os=-openedition
;;
-wince*)
os=-wince
;;
-osfrose*)
os=-osfrose
;;
@@ -919,7 +991,7 @@ case $os in
-acis*)
os=-aos
;;
-386bsd) # CYGNUS LOCAL
-386bsd)
os=-bsd
;;
-ctix* | -uts*)
@@ -928,6 +1000,9 @@ case $os in
-ns2 )
os=-nextstep2
;;
-nsk)
os=-nsk
;;
# Preserve the version number of sinix5.
-sinix5.*)
os=`echo $os | sed -e 's|sinix|sysv|'`
@@ -953,15 +1028,18 @@ case $os in
# This must come after -sysvr4.
-sysv*)
;;
-ose*) # CYGNUS LOCAL
-ose*)
os=-ose
;;
-es1800*) # CYGNUS LOCAL
-es1800*)
os=-ose
;;
-xenix)
os=-xenix
;;
-*mint | -*MiNT)
os=-mint
;;
-none)
;;
*)
@@ -987,6 +1065,9 @@ case $basic_machine in
*-acorn)
os=-riscix1.2
;;
arm*-rebel)
os=-linux
;;
arm*-semi)
os=-aout
;;
@@ -1008,34 +1089,34 @@ case $basic_machine in
# default.
# os=-sunos4
;;
m68*-cisco) # CYGNUS LOCAL
m68*-cisco)
os=-aout
;;
mips*-cisco) # CYGNUS LOCAL
mips*-cisco)
os=-elf
;;
mips*-*)
os=-elf
;;
mips*-*) # CYGNUS LOCAL
os=-elf
;;
*-tti) # must be before sparc entry or we get the wrong os.
os=-sysv3
;;
sparc-* | *-sun)
os=-sunos4.1.1
;;
*-be) # CYGNUS LOCAL
*-be)
os=-beos
;;
*-ibm)
os=-aix
;;
*-wec) # CYGNUS LOCAL
*-wec)
os=-proelf
;;
*-winbond) # CYGNUS LOCAL
*-winbond)
os=-proelf
;;
*-oki) # CYGNUS LOCAL
*-oki)
os=-proelf
;;
*-hp)
@@ -1101,15 +1182,18 @@ case $basic_machine in
f301-fujitsu)
os=-uxpv
;;
*-rom68k) # CYGNUS LOCAL
*-rom68k)
os=-coff
;;
*-*bug) # CYGNUS LOCAL
*-*bug)
os=-coff
;;
*-apple) # CYGNUS LOCAL
*-apple)
os=-macos
;;
*-atari*)
os=-mint
;;
*)
os=-none
;;
@@ -1131,12 +1215,15 @@ case $basic_machine in
-aix*)
vendor=ibm
;;
-beos*) # CYGNUS LOCAL
-beos*)
vendor=be
;;
-hpux*)
vendor=hp
;;
-mpeix*)
vendor=hp
;;
-hiux*)
vendor=hitachi
;;
@@ -1152,7 +1239,7 @@ case $basic_machine in
-genix*)
vendor=ns
;;
-mvs*)
-mvs* | -opened*)
vendor=ibm
;;
-ptx*)
@@ -1164,12 +1251,15 @@ case $basic_machine in
-aux*)
vendor=apple
;;
-hms*) # CYGNUS LOCAL
-hms*)
vendor=hitachi
;;
-mpw* | -macos*) # CYGNUS LOCAL
-mpw* | -macos*)
vendor=apple
;;
-*mint | -*MiNT)
vendor=atari
;;
esac
basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
;;
+161 -54
View File
@@ -1,16 +1,58 @@
dnl Process this file with autoconf to produce a configure script.
AC_INIT(netlist.h)
AC_CONFIG_HEADER(config.h)
dnl Checks for programs.
AC_PROG_CC
AC_PROG_CXX
AC_CHECK_TOOL(STRIP, strip, true)
AC_CHECK_PROGS(XGPERF,gperf,none)
if test "$XGPERF" = "none"
then
echo "*** Error: No suitable gperf found. ***"
echo " Please install the 'gperf' package."
exit 1
fi
AC_CHECK_PROGS(LEX,flex,none)
if test "$LEX" = "none"
then
echo "*** Error: No suitable flex found. ***"
echo " Please install the 'flex' package."
exit 1
fi
AC_CHECK_PROGS(YACC,bison,none)
if test "$YACC" = "none"
then
echo "*** Error: No suitable bison found. ***"
echo " Please install the 'bison' package."
exit 1
fi
AC_LANG_CPLUSPLUS
AC_CHECK_HEADERS(getopt.h iosfwd)
AC_CHECK_HEADERS(getopt.h malloc.h libiberty.h iosfwd sys/wait.h)
AC_MSG_CHECKING(for sys/times)
AC_TRY_LINK(
#include <unistd.h>
#include <sys/times.h>
,{clock_t a = times(0)/sysconf(_SC_CLK_TCK);},
do_times=yes
AC_DEFINE(HAVE_TIMES,1),
do_times=no
)
AC_MSG_RESULT($do_times)
AC_CHECK_HEADER(ipal.h, HAVE_IPAL=yes, HAVE_IPAL=)
AC_ARG_WITH(ipal,
[ --with-ipal enable PAL target],
if test "$with_ipal" = no; then
echo Disabling ipal support
HAVE_IPAL=
fi
)
AC_SUBST(HAVE_IPAL)
# --
@@ -33,55 +75,6 @@ AC_LANG_C
AC_CANONICAL_HOST
# $host
#######################
## test for underscores. The vpi module loader in vvm needs to know this
## in order to know the name of the start symbol for the .vpi module.
#######################
AC_CYGWIN
AC_EXEEXT
AC_SUBST(CYGWIN)
AC_SUBST(EXEEXT)
AC_MSG_CHECKING("for leading and/or trailing underscores")
cat << EOF > underscore.c
void underscore(void){}
EOF
$CC -shared -c underscore.c > /dev/null 2>&1
CC_LEADING_UNDERSCORE=no
CC_TRAILING_UNDERSCORE=no
output=`nm underscore.o|grep _underscore 2>&1`
if test ! -z "$output" -a -z "$CYGWIN" ; then
CC_LEADING_UNDERSCORE=yes
AC_DEFINE(NEED_LU)
fi
output=`nm underscore.o|grep underscore_ 2>&1`
if test ! -z "$output"; then
CC_TRAILING_UNDERSCORE=yes
AC_DEFINE(NEED_TU)
fi
if test "$CC_LEADING_UNDERSCORE" = yes; then
AC_DEFINE(WLU)
fi
if test "$CC_TRAILING_UNDERSCORE" = yes; then
AC_DEFINE(WTU)
fi
rm underscore.c underscore.o
AC_MSG_RESULT("$CC_LEADING_UNDERSCORE $CC_TRAILING_UNDERSCORE")
#######################
## end of test for underscores
#######################
# The -fPIC flag is used to tell the compiler to make position
# independent code. It is needed when making shared objects.
@@ -102,6 +95,26 @@ AC_SUBST(PICFLAG)
AC_MSG_RESULT($PICFLAG)
# mingw needs to link with libiberty.a, cygwin can tolerate it
AC_MSG_CHECKING("for extra libs needed")
EXTRALIBS=
case "${host}" in
*-*-cygwin*)
EXTRALIBS="-liberty"
;;
esac
AC_SUBST(EXTRALIBS)
AC_MSG_RESULT($EXTRALIBS)
# Darwin requires -no-cpp-precomp
case "${host}" in
*-*-darwin*)
CPPFLAGS="-no-cpp-precomp"
CFLAGS="-no-cpp-precomp"
;;
esac
# The -rdynamic flag is used by iverilog when compiling the target,
# to know how to export symbols of the main program to loadable modules
# that are brought in by -ldl
@@ -125,29 +138,123 @@ case "${host}" in
*-*-hpux*)
rdynamic="-E"
;;
*-*-darwin*)
rdynamic="-Wl,-all_load"
strip_dynamic="-SX"
;;
esac
AC_SUBST(rdynamic)
AC_MSG_RESULT($rdynamic)
AC_SUBST(strip_dynamic)
AC_MSG_RESULT($strip_dynamic)
AC_MSG_CHECKING("for shared library link flag")
shared=-shared
case "${host}" in
*-*-cygwin*)
shared="-mdll -Wl,--enable-auto-image-base"
shared="-shared -Wl,--enable-auto-image-base"
;;
*-*-hpux*)
shared="-b"
;;
*-*-darwin1.[0123])
shared="-bundle -undefined suppress"
;;
*-*-darwin*)
shared="-bundle -undefined suppress -flat_namespace"
;;
esac
AC_SUBST(shared)
AC_MSG_RESULT($shared)
#######################
## test for underscores. The vpi module loader needs to know this
## in order to know the name of the start symbol for the .vpi module.
#######################
AC_CONFIG_SUBDIRS(vpip vvp tgt-vvp)
AC_CYGWIN
AC_EXEEXT
AC_MINGW32
AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile vvm/Makefile driver/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
WIN32=no
AC_MSG_CHECKING("Checking for windows")
if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
then
WIN32=yes
fi
AC_SUBST(MINGW32)
AC_SUBST(WIN32)
AC_MSG_RESULT($WIN32)
AC_SUBST(EXEEXT)
AC_MSG_CHECKING("for leading and/or trailing underscores")
cat << EOF > underscore.c
void underscore(void){}
EOF
$CC $shared -c underscore.c > /dev/null 2>&1
CC_LEADING_UNDERSCORE=no
CC_TRAILING_UNDERSCORE=no
output=`nm underscore.o|grep _underscore 2>&1`
if test ! -z "$output" -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
CC_LEADING_UNDERSCORE=yes
AC_DEFINE(NEED_LU)
fi
output=`nm underscore.o|grep underscore_ 2>&1`
if test ! -z "$output"; then
CC_TRAILING_UNDERSCORE=yes
AC_DEFINE(NEED_TU)
fi
if test "$CC_LEADING_UNDERSCORE" = yes; then
AC_DEFINE(WLU)
fi
if test "$CC_TRAILING_UNDERSCORE" = yes; then
AC_DEFINE(WTU)
fi
rm underscore.c underscore.o
AC_MSG_RESULT("$CC_LEADING_UNDERSCORE $CC_TRAILING_UNDERSCORE")
#######################
## end of test for underscores
#######################
AC_MSG_CHECKING("for ident support in C compiler")
ident_support='-DHAVE_CVS_IDENT=1'
case "${host}" in
*-*-cygwin*)
ident_support=
;;
*-*-darwin*)
ident_support=
;;
*-*-machten*)
ident_support=
;;
esac
AC_SUBST(ident_support)
AC_MSG_RESULT($ident_support)
AC_CONFIG_SUBDIRS(vvp tgt-vvp tgt-fpga libveriuser)
AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+170 -63
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: cprop.cc,v 1.26 2001/02/18 01:07:32 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: cprop.cc,v 1.39 2002/08/20 04:12:22 steve Exp $"
#endif
# include "config.h"
# include "netlist.h"
# include "netmisc.h"
# include "functor.h"
@@ -54,7 +56,7 @@ void cprop_functor::signal(Design*des, NetNet*obj)
void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
{
// For now, only additions are handled.
if (obj->attribute("LPM_Direction") != "ADD")
if (obj->attribute("LPM_Direction") != verinum("ADD"))
return;
// If the low bit on the A side is 0, then eliminate it from
@@ -62,11 +64,11 @@ void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
// result. Don't reduce the adder smaller then a 1-bit
// adder. These will be eliminated later.
while ((obj->width() > 1)
&& link_drivers_constant(obj->pin_DataA(0))
&& (driven_value(obj->pin_DataA(0)) == verinum::V0)) {
&& obj->pin_DataA(0).nexus()->drivers_constant()
&& (obj->pin_DataA(0).nexus()->driven_value() == verinum::V0)) {
NetAddSub*tmp = 0;
tmp = new NetAddSub(obj->name(), obj->width()-1);
tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
//connect(tmp->pin_Aclr(), obj->pin_Aclr());
//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
//connect(tmp->pin_Clock(), obj->pin_Clock());
@@ -87,11 +89,11 @@ void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
// Now do the same thing on the B side.
while ((obj->width() > 1)
&& link_drivers_constant(obj->pin_DataB(0))
&& (driven_value(obj->pin_DataB(0)) == verinum::V0)) {
&& obj->pin_DataB(0).nexus()->drivers_constant()
&& (obj->pin_DataB(0).nexus()->driven_value() == verinum::V0)) {
NetAddSub*tmp = 0;
tmp = new NetAddSub(obj->name(), obj->width()-1);
tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
//connect(tmp->pin_Aclr(), obj->pin_Aclr());
//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
//connect(tmp->pin_Clock(), obj->pin_Clock());
@@ -151,21 +153,22 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
{
NetScope*scope = obj->scope();
/* First, look for the case where constant bits on matching A
and B inputs are different. This this is so, the device can
be completely eliminated and replaced with a constant 0. */
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! link_drivers_constant(obj->pin_DataA(idx)))
if (! obj->pin_DataA(idx).nexus()->drivers_constant())
continue;
if (! link_drivers_constant(obj->pin_DataB(idx)))
if (! obj->pin_DataB(idx).nexus()->drivers_constant())
continue;
if (driven_value(obj->pin_DataA(idx)) ==
driven_value(obj->pin_DataB(idx)))
if (obj->pin_DataA(idx).nexus()->driven_value() ==
obj->pin_DataB(idx).nexus()->driven_value())
continue;
NetConst*zero = new NetConst(obj->name(), verinum::V0);
NetConst*zero = new NetConst(scope, obj->name(), verinum::V0);
connect(zero->pin(0), obj->pin_AEB());
delete obj;
des->add_node(zero);
@@ -178,11 +181,11 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
unsigned top = obj->width();
for (unsigned idx = 0 ; idx < top ; ) {
if (! link_drivers_constant(obj->pin_DataA(idx))) {
if (! obj->pin_DataA(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
if (! link_drivers_constant(obj->pin_DataB(idx))) {
if (! obj->pin_DataB(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
@@ -202,7 +205,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
/* If we wound up disconnecting all the inputs, then remove
the device and replace it with a constant. */
if (top == 0) {
NetConst*one = new NetConst(obj->name(), verinum::V1);
NetConst*one = new NetConst(scope, obj->name(), verinum::V1);
connect(one->pin(0), obj->pin_AEB());
delete obj;
des->add_node(one);
@@ -213,8 +216,8 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
/* If there is only one bit left, then replace the comparator
with a simple XOR gate. */
if (top == 1) {
NetLogic*tmp = new NetLogic(obj->scope(), obj->name(), 3,
NetLogic::XOR);
NetLogic*tmp = new NetLogic(scope, obj->name(), 3,
NetLogic::XNOR);
connect(tmp->pin(0), obj->pin_AEB());
connect(tmp->pin(1), obj->pin_DataA(0));
connect(tmp->pin(2), obj->pin_DataB(0));
@@ -228,7 +231,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
if (top == obj->width())
return;
NetCompare*tmp = new NetCompare(obj->name(), top);
NetCompare*tmp = new NetCompare(scope, obj->name(), top);
connect(tmp->pin_AEB(), obj->pin_AEB());
for (unsigned idx = 0 ; idx < top ; idx += 1) {
connect(tmp->pin_DataA(idx), obj->pin_DataA(idx));
@@ -293,6 +296,8 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
{
NetScope*scope = obj->scope();
switch (obj->type()) {
case NetLogic::NAND:
@@ -305,12 +310,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
on the output of an AND gate. */
while (idx < top) {
if (! link_drivers_constant(obj->pin(idx))) {
if (! obj->pin(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
if (driven_value(obj->pin(idx)) == verinum::V1) {
if (obj->pin(idx).nexus()->driven_value()==verinum::V1) {
obj->pin(idx).unlink();
top -= 1;
if (idx < top) {
@@ -321,7 +326,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
continue;
}
if (driven_value(obj->pin(idx)) != verinum::V0) {
if (obj->pin(idx).nexus()->driven_value() != verinum::V0) {
idx += 1;
xs += 1;
continue;
@@ -334,15 +339,19 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetConst*tmp;
switch (obj->type()) {
case NetLogic::AND:
tmp = new NetConst(obj->name(), verinum::V0);
tmp = new NetConst(scope, obj->name(), verinum::V0);
break;
case NetLogic::NAND:
tmp = new NetConst(obj->name(), verinum::V1);
tmp = new NetConst(scope, obj->name(), verinum::V1);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -359,15 +368,19 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetConst*tmp;
switch (obj->type()) {
case NetLogic::AND:
tmp = new NetConst(obj->name(), verinum::V1);
tmp = new NetConst(scope, obj->name(), verinum::V1);
break;
case NetLogic::NAND:
tmp = new NetConst(obj->name(), verinum::V0);
tmp = new NetConst(scope, obj->name(), verinum::V0);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -382,7 +395,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
gate with a Vx. */
if (xs == (top-1)) {
NetConst*tmp;
tmp = new NetConst(obj->name(), verinum::Vx);
tmp = new NetConst(scope, obj->name(), verinum::Vx);
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -399,18 +412,23 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetLogic*tmp;
switch (obj->type()) {
case NetLogic::AND:
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
break;
case NetLogic::NAND:
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -422,12 +440,16 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
}
/* Finally, this cleans up the gate by creating a
new [N]OR gate that has the right number of
new [N]AND gate that has the right number of
inputs, connected in the right place. */
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(obj->scope(),
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -452,12 +474,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
on the output of an OR gate. */
while (idx < top) {
if (! link_drivers_constant(obj->pin(idx))) {
if (! obj->pin(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
if (driven_value(obj->pin(idx)) == verinum::V0) {
if (obj->pin(idx).nexus()->driven_value() == verinum::V0) {
obj->pin(idx).unlink();
top -= 1;
if (idx < top) {
@@ -468,7 +490,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
continue;
}
if (driven_value(obj->pin(idx)) != verinum::V1) {
if (obj->pin(idx).nexus()->driven_value() != verinum::V1) {
idx += 1;
continue;
}
@@ -480,15 +502,19 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetConst*tmp;
switch (obj->type()) {
case NetLogic::OR:
tmp = new NetConst(obj->name(), verinum::V1);
tmp = new NetConst(scope, obj->name(), verinum::V1);
break;
case NetLogic::NOR:
tmp = new NetConst(obj->name(), verinum::V0);
tmp = new NetConst(scope, obj->name(), verinum::V0);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -505,15 +531,19 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetConst*tmp;
switch (obj->type()) {
case NetLogic::OR:
tmp = new NetConst(obj->name(), verinum::V0);
tmp = new NetConst(scope, obj->name(), verinum::V0);
break;
case NetLogic::NOR:
tmp = new NetConst(obj->name(), verinum::V1);
tmp = new NetConst(scope, obj->name(), verinum::V1);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -530,18 +560,22 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetLogic*tmp;
switch (obj->type()) {
case NetLogic::OR:
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
break;
case NetLogic::NOR:
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
break;
default:
assert(0);
}
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -556,9 +590,13 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
new [N]OR gate that has the right number of
inputs, connected in the right place. */
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(obj->scope(),
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -578,14 +616,17 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
unsigned idx = 1;
/* Eliminate all the 0 inputs. They have no effect
on the output of an XOR gate. */
on the output of an XOR gate. The eliminate works
by unlinking the current input and relinking the
last input to this position. It's like bubbling
all the 0 inputs to the end. */
while (idx < top) {
if (! link_drivers_constant(obj->pin(idx))) {
if (! obj->pin(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
if (driven_value(obj->pin(idx)) == verinum::V0) {
if (obj->pin(idx).nexus()->driven_value() == verinum::V0) {
obj->pin(idx).unlink();
top -= 1;
if (idx < top) {
@@ -610,12 +651,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
unsigned one = 0, ones = 0;
idx = 1;
while (idx < top) {
if (! link_drivers_constant(obj->pin(idx))) {
if (! obj->pin(idx).nexus()->drivers_constant()) {
idx += 1;
continue;
}
if (driven_value(obj->pin(idx)) == verinum::V1) {
if (obj->pin(idx).nexus()->driven_value() == verinum::V1) {
if (one == 0) {
one = idx;
ones += 1;
@@ -623,6 +664,8 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
continue;
}
/* Here we found two constant V1
inputs. Unlink both. */
obj->pin(idx).unlink();
top -= 1;
if (idx < top) {
@@ -637,8 +680,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
obj->pin(top).unlink();
}
/* Reset ones counter and one index,
start looking for the next pair. */
assert(ones == 1);
ones = 0;
one = 0;
continue;
}
@@ -646,12 +692,16 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
}
/* If all the inputs were eliminated, then replace
the gate with a constant 0 and I am done. */
the gate with a constant value and I am done. */
if (top == 1) {
verinum::V out = obj->type()==NetLogic::XNOR
? verinum::V1
: verinum::V0;
NetConst*tmp = new NetConst(obj->name(), out);
NetConst*tmp = new NetConst(scope, obj->name(), out);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
@@ -669,9 +719,9 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if ((top == 3) && (ones == 1)) {
unsigned save;
if (! link_drivers_constant(obj->pin(1)))
if (! obj->pin(1).nexus()->drivers_constant())
save = 1;
else if (driven_value(obj->pin(1)) != verinum::V1)
else if (obj->pin(1).nexus()->driven_value() != verinum::V1)
save = 1;
else
save = 2;
@@ -679,14 +729,18 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetLogic*tmp;
if (obj->type() == NetLogic::XOR)
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
else
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -704,14 +758,18 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetLogic*tmp;
if (obj->type() == NetLogic::XOR)
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
else
tmp = new NetLogic(obj->scope(),
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -726,7 +784,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
new XOR gate that has the right number of
inputs, connected in the right place. */
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(obj->scope(),
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
des->add_node(tmp);
@@ -764,12 +822,12 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
connected to the select input. */
bool flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! link_drivers_constant(obj->pin_Data(idx, 0))) {
if (! obj->pin_Data(idx, 0).nexus()->drivers_constant()) {
flag = false;
break;
}
if (driven_value(obj->pin_Data(idx, 0)) != verinum::Vz) {
if (obj->pin_Data(idx, 0).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
@@ -796,12 +854,12 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
NetMux with an array of BUFIF0 devices. */
flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! link_drivers_constant(obj->pin_Data(idx, 1))) {
if (! obj->pin_Data(idx, 1).nexus()->drivers_constant()) {
flag = false;
break;
}
if (driven_value(obj->pin_Data(idx, 1)) != verinum::Vz) {
if (obj->pin_Data(idx, 1).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
@@ -882,7 +940,7 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
return;
// Look for signals that have NetESignal nodes attached to
// them. If I find any, this this constant is used by a
// them. If I find any, then this constant is used by a
// behavioral expression somewhere.
for (unsigned idx = 0 ; idx < obj->pin_count() ; idx += 1) {
Nexus*nex = obj->pin(idx).nexus();
@@ -902,7 +960,7 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
// If the net has an eref, then there is an
// expression somewhere that reads this signal. So
// the constant does get read.
if (tmp->get_eref() > 0)
if (tmp->peek_eref() > 0)
return;
// If the net is a port of the root module, then
@@ -915,7 +973,6 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
}
}
// Done. Delete me.
delete obj;
}
@@ -937,6 +994,56 @@ void cprop(Design*des)
/*
* $Log: cprop.cc,v $
* Revision 1.39 2002/08/20 04:12:22 steve
* Copy gate delays when doing gate delay substitutions.
*
* Revision 1.38 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.37 2002/06/25 01:33:22 steve
* Cache calculated driven value.
*
* Revision 1.36 2002/06/24 01:49:38 steve
* Make link_drive_constant cache its results in
* the Nexus, to improve cprop performance.
*
* Revision 1.35 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.34 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.33 2002/04/14 02:51:37 steve
* Fix bug removing pairs of ones in XOR.
*
* Revision 1.32 2002/02/03 00:06:28 steve
* Comments about xor evaluation.
*
* Revision 1.31 2001/12/31 01:56:08 steve
* Get sense of 1-bit == operator right.
*
* Revision 1.30 2001/10/28 01:14:53 steve
* NetObj constructor finally requires a scope.
*
* Revision 1.29 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.28 2001/06/15 04:14:18 steve
* Generate vvp code for GT and GE comparisons.
*
* Revision 1.27 2001/06/07 02:12:43 steve
* Support structural addition.
*
* Revision 1.26 2001/02/18 01:07:32 steve
* check signals in the cprop functor.
*
+2 -26
View File
@@ -6,41 +6,17 @@ To build using cygwin:
Prerequisites:
o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
o autoconf version 2.13 (or later) from cygutils (cygutils.netpedia.net)
o cvs (1.10.8 or later) also from cygutils
Procedure:
o Get the source code - see the main icarus verilog page for how to
do this
o cd to the verilog directory
o autoconf
o autoconf.sh
o ./configure
o make
o make install
That's all that's needed. But there're two common problems during
the make phase. All steps are in the verilog directory.
1.
If gcc dies saying virtual memory exhausted while compiling parse.c
then recompile with -O1 or without -O flag and do these steps to
continue
o make CXXFLAGS='' parse.o
o make
2.
If gcc dies in the vpi directory while compiling vpi_systask.c with the
error, conflicting types for `_cygwin_dll_entry', then fix the line in
/usr/include/cygwin/cygwin_dll.h. Change the line:
int WINAPI _cygwin_dll_entry (HANDLE h, DWORD reason, void *ptr); \
to
int WINAPI _cygwin_dll_entry (HINSTANCE h, DWORD reason, void *ptr); \
Note the change from HANDLE to HINSTANCE. Then do
o make
That's all that's needed.
To build your own extensions - just include vpi_user.h and link with
a command like this:
+246 -123
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: design_dump.cc,v 1.111 2001/02/17 05:13:36 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: design_dump.cc,v 1.136 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
/*
* This file contains all the dump methods of the netlist classes.
*/
@@ -75,7 +77,23 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
o << " (local)";
if (signed_)
o << " signed";
o << " (eref=" << get_eref() << ")";
switch (port_type_) {
case NetNet::NOT_A_PORT:
break;
case NetNet::PIMPLICIT:
o << " implicit-port?";
break;
case NetNet::PINPUT:
o << " input";
break;
case NetNet::POUTPUT:
o << " output";
break;
case NetNet::PINOUT:
o << " inout";
break;
}
o << " (eref=" << peek_eref() << ", lref=" << peek_lref() << ")";
if (scope())
o << " scope=" << scope()->name();
o << " #(" << rise_time() << "," << fall_time() << "," <<
@@ -99,6 +117,13 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetSubnet::dump_net(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "** " << name() << " is a NetSubnet **"
<< endl;
NetNet::dump_net(o, ind);
}
void NetMemory::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << name_ << "[" << width_ << "] " <<
@@ -156,9 +181,9 @@ void NetObj::dump_node_pins(ostream&o, unsigned ind) const
void NetObj::dump_obj_attr(ostream&o, unsigned ind) const
{
unsigned idx;
for (idx = 0 ; idx < attributes_.size() ; idx += 1) {
o << setw(ind) << "" << attributes_.key(idx) << " = \"" <<
attributes_.value(idx) << "\"" << endl;
for (idx = 0 ; idx < attr_cnt() ; idx += 1) {
o << setw(ind) << "" << attr_key(idx) << " = \"" <<
attr_value(idx) << "\"" << endl;
}
}
@@ -219,15 +244,6 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetAssign_::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Procedural assign (NetAssign_): " << name();
if (bmux())
o << "[" << *bmux() << "]";
o << endl;
dump_node_pins(o, ind+4);
}
void NetBUFZ::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NetBUFZ: " << name()
@@ -255,7 +271,8 @@ void NetConst::dump_node(ostream&o, unsigned ind) const
void NetFF::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_FF: " << name()
<< " scope=" << (scope()? scope()->name() : "") << endl;
<< " scope=" << (scope()? scope()->name() : "")
<< " aset_value=" << aset_value_ << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
@@ -298,6 +315,12 @@ void NetLogic::dump_node(ostream&o, unsigned ind) const
case OR:
o << "or";
break;
case PULLDOWN:
o << "pulldown";
break;
case PULLUP:
o << "pullup";
break;
case RNMOS:
o << "rnmos";
break;
@@ -338,6 +361,14 @@ void NetRamDq::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetUserFunc::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << def_->name() << "(";
o << ")" << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetTaskDef::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "task " << name_ << ";" << endl;
@@ -367,77 +398,12 @@ void NetTaskDef::dump(ostream&o, unsigned ind) const
o << setw(ind) << "" << "endtask" << endl;
}
void NetUDP::dump_sequ_(ostream&o, unsigned ind) const
{
string tmp = "";
for (unsigned idx = 0 ; idx < ind ; idx += 1)
tmp += " ";
o << tmp << "Sequential UDP" << " #(" << rise_time() <<
"," << fall_time() << "," << decay_time() << ") " << name() <<
endl;
for (FSM_::const_iterator ent = fsm_.begin()
; ent != fsm_.end() ; ent++) {
o << setw(ind+6) << "" << (*ent).first << " -->";
state_t_*st = (*ent).second;
assert((*ent).first[0] == st->out);
for (unsigned idx = 1 ; idx < pin_count() ; idx += 1) {
string tmp = (*ent).first;
if (st->pins[idx].zer) {
tmp[0] = st->pins[idx].zer->out;
tmp[idx] = '0';
o << " " << tmp;
}
if (st->pins[idx].one) {
tmp[0] = st->pins[idx].one->out;
tmp[idx] = '1';
o << " " << tmp;
}
if (st->pins[idx].xxx) {
tmp[0] = st->pins[idx].xxx->out;
tmp[idx] = 'x';
o << " " << tmp;
}
}
o << endl;
}
o << setw(ind+6) << "" << "initial value == " << init_ << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetUDP::dump_comb_(ostream&o, unsigned ind) const
{
assert(0);
}
void NetUDP::dump_node(ostream&o, unsigned ind) const
{
if (is_sequential())
dump_sequ_(o, ind);
else
dump_comb_(o, ind);
}
void NetUDP_COMB::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Combinational primitive: ";
o << setw(ind) << "" << "UDP (" << udp_name() << "): ";
o << " #(" << rise_time() << "," << fall_time() << "," << decay_time() <<
") " << name() << endl;
for (map<string,char>::const_iterator ent = cm_.begin()
; ent != cm_.end() ; ent++) {
o << setw(ind+6) << "" << (*ent).first << " --> " <<
(*ent).second << endl;
}
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
@@ -455,19 +421,47 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
break;
}
for (unsigned idx = 0 ; idx < attr_cnt() ; idx += 1) {
o << setw(ind+2) << "" << "(* " << attr_key(idx) << " = "
<< attr_value(idx) << " *)" << endl;
}
statement_->dump(o, ind+2);
}
void NetAssign_::dump_lval(ostream&o) const
{
if (sig_) {
o << sig_->name();
if (bmux_) {
o << "[" << *bmux_ << "]";
} else {
o << "[" << (loff_+lwid_-1) << ":" << loff_ << "]";
}
} else if (mem_) {
// Is there an obvious way to flag memories in the dump
// as different from the _real_ bit mux case?
// o << "**memory**";
o << mem_->name() << "[";
if (bmux_) o << *bmux_;
else o << "**oops**";
o << "]";
} else if (var_) {
o << "<real " << var_->basename() << ">";
} else {
o << "";
}
}
void NetAssignBase::dump_lval(ostream&o) const
{
o << "" << "{" << lval_->name();
if (lval_->bmux())
o << "[" << *lval_->bmux() << "]";
o << "{";
lval_->dump_lval(o);
for (NetAssign_*cur = lval_->more ; cur ; cur = cur->more) {
o << ", " << cur->name();
if (cur->bmux())
o << "[" << *cur->bmux() << "]";
o << ", ";
cur->dump_lval(o);
}
o << "}";
@@ -480,8 +474,10 @@ void NetAssign::dump(ostream&o, unsigned ind) const
dump_lval(o);
o << " = ";
#if 0
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
#endif
o << *rval() << ";" << endl;
}
@@ -491,36 +487,21 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
dump_lval(o);
o << " <= ";
#if 0
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
#endif
o << *rval() << ";" << endl;
}
void NetAssignMem::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "";
o << "/* " << get_line() << " */" << endl;
o << setw(ind) << "";
o << memory()->name() << "[" << *index() << "] = ";
rval()->dump(o);
o << ";" << endl;
}
void NetAssignMemNB::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "";
o << "/* " << get_line() << " */" << endl;
o << setw(ind) << "";
o << memory()->name() << "[" << *index() << "] <= ";
rval()->dump(o);
o << ";" << endl;
}
/* Dump a block statement */
void NetBlock::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << type_ << endl;
o << setw(ind) << "" << type_;
if (subscope_)
o << " : " << subscope_->name();
o << endl;
if (last_) {
const NetProc*cur = last_;
@@ -680,8 +661,12 @@ void NetPDelay::dump(ostream&o, unsigned ind) const
void NetRelease::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "release " << lval_->name() << "; "
<< "/* " << get_line() << " */" << endl;
if (lval_)
o << setw(ind) << "" << "release " << lval_->name() << "; "
<< "/* " << get_line() << " */" << endl;
else
o << setw(ind) << "" << "release (null); "
<< "/* " << get_line() << " */" << endl;
}
void NetRepeat::dump(ostream&o, unsigned ind) const
@@ -717,23 +702,32 @@ void NetScope::dump(ostream&o) const
/* Dump the parameters for this scope. */
{
map<string,NetExpr*>::const_iterator pp;
map<string,param_expr_t>::const_iterator pp;
for (pp = parameters_.begin()
; pp != parameters_.end() ; pp ++) {
o << " parameter " << (*pp).first << " = " <<
*(*pp).second << ";" << endl;
o << " parameter ";
if ((*pp).second.signed_flag)
o << "signed ";
if ((*pp).second.msb)
o << "[" << *(*pp).second.msb
<< ":" << *(*pp).second.lsb << "] ";
o << (*pp).first << " = " <<
*(*pp).second.expr << ";" << endl;
}
for (pp = localparams_.begin()
; pp != localparams_.end() ; pp ++) {
o << " localparam " << (*pp).first << " = " <<
*(*pp).second << ";" << endl;
*(*pp).second.expr << ";" << endl;
}
}
/* Dump the saved defparam assignments here. */
{
map<string,NetExpr*>::const_iterator pp;
map<hname_t,NetExpr*>::const_iterator pp;
for (pp = defparams.begin()
; pp != defparams.end() ; pp ++ ) {
o << " defparam " << (*pp).first << " = " <<
@@ -741,6 +735,11 @@ void NetScope::dump(ostream&o) const
}
}
for (NetVariable*cur = vars_ ; cur ; cur = cur->snext_) {
o << " real " << cur->basename() << " // "
<< cur->get_line() << endl;
}
/* Dump the events in this scope. */
for (NetEvent*cur = events_ ; cur ; cur = cur->snext_) {
o << " event " << cur->name() << "; nprobe="
@@ -819,7 +818,7 @@ void NetProc::dump(ostream&o, unsigned ind) const
/* Dump an expression that noone wrote a dump method for. */
void NetExpr::dump(ostream&o) const
{
o << "(?)";
o << "(?" << typeid(*this).name() << "?)";
}
void NetEBinary::dump(ostream&o) const
@@ -875,8 +874,12 @@ void NetEBinary::dump(ostream&o) const
void NetEConcat::dump(ostream&o) const
{
if (repeat_ != 1)
o << repeat_;
if (repeat_calculated_) {
if (repeat_value_ != 1)
o << repeat_value_;
} else if (repeat_) {
o << "<" << *repeat_ << ">";
}
if (parms_[0])
o << "{" << *parms_[0];
@@ -900,6 +903,11 @@ void NetEConst::dump(ostream&o) const
o << value_;
}
void NetECReal::dump(ostream&o) const
{
o << value_;
}
void NetEScope::dump(ostream&o) const
{
o << "<scope=" << scope_->name() << ">";
@@ -917,10 +925,12 @@ void NetESFunc::dump(ostream&o) const
void NetESignal::dump(ostream&o) const
{
o << name();
if (has_sign())
o << "+";
o << name() << "[" << msi_<<":"<<lsi_ << "]";
}
void NetESubSignal::dump(ostream&o) const
void NetEBitSel::dump(ostream&o) const
{
sig_->dump(o);
o << "[";
@@ -937,7 +947,10 @@ void NetEMemory::dump(ostream&o) const
void NetEParam::dump(ostream&o) const
{
o << "<" << scope_->name() << "." << name_ << ">";
if (scope_ != 0)
o << "<" << scope_->name() << "." << name_ << ">";
else
o << "<" << name_ << ">";
}
void NetETernary::dump(ostream&o) const
@@ -974,11 +987,18 @@ void NetEUnary::dump(ostream&o) const
o << ")";
}
void NetEVariable::dump(ostream&o) const
{
o << var_->basename();
}
void Design::dump(ostream&o) const
{
o << "DESIGN TIME PRECISION: 10e" << get_precision() << endl;
o << "SCOPES:" << endl;
root_scope_->dump(o);
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->dump(o);
o << "ELABORATED NODES:" << endl;
@@ -1001,6 +1021,109 @@ void Design::dump(ostream&o) const
/*
* $Log: design_dump.cc,v $
* Revision 1.136 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.135 2002/10/23 01:47:17 steve
* Fix synth2 handling of aset/aclr signals where
* flip-flops are split by begin-end blocks.
*
* Revision 1.134 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.133 2002/08/19 00:06:11 steve
* Allow release to handle removal of target net.
*
* Revision 1.132 2002/08/13 05:35:00 steve
* Do not elide named blocks.
*
* Revision 1.131 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.130 2002/08/04 18:28:14 steve
* Do not use hierarchical names of memories to
* generate vvp labels. -tdll target does not
* used hierarchical name string to look up the
* memory objects in the design.
*
* Revision 1.129 2002/06/19 04:20:03 steve
* Remove NetTmp and add NetSubnet class.
*
* Revision 1.128 2002/06/14 21:38:41 steve
* Fix expression width for repeat concatenations.
*
* Revision 1.127 2002/06/08 23:42:46 steve
* Add NetRamDq synthsesis from memory l-values.
*
* Revision 1.126 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.125 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.124 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.123 2002/05/05 21:11:49 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.122 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.121 2001/12/31 00:03:05 steve
* Include s indicator in dump of signed numbers.
*
* Revision 1.120 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.119 2001/11/19 01:46:38 steve
* Print typename is fallback expression node dump.
*
* Revision 1.118 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.117 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.116 2001/07/27 04:51:44 steve
* Handle part select expressions as variants of
* NetESignal/IVL_EX_SIGNAL objects, instead of
* creating new and useless temporary signals.
*
* Revision 1.115 2001/07/27 02:41:55 steve
* Fix binding of dangling function ports. do not elide them.
*
* Revision 1.114 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.113 2001/04/29 20:19:10 steve
* Add pullup and pulldown devices.
*
* Revision 1.112 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.111 2001/02/17 05:13:36 steve
* Check that the port really exists here.
*
+82
View File
@@ -0,0 +1,82 @@
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: dosify.c,v 1.3 2002/08/12 01:34:58 steve Exp $"
#endif
/*
* This is a simple program to make a dosified copy of the
* original. That is, it converts unix style line ends to DOS
* style. This is useful for installing text files.
*
* The exact substitution is to replace \n with \r\n. If the line
* already ends with \r\n then it is not changed to \r\r\n.
*/
# include <stdio.h>
int main(int argc, char*argv[])
{
FILE*ifile;
FILE*ofile;
int ch, pr;
if (argc != 3) {
fprintf(stderr, "Usage: %s <input> <output>\n", argv[0]);
return 1;
}
ifile = fopen(argv[1], "rb");
if (ifile == 0) {
fprintf(stderr, "Unable to open %s for input.\n", argv[1]);
return 2;
}
ofile = fopen(argv[2], "wb");
if (ofile == 0) {
fprintf(stderr, "Unable to open %s for output.\n", argv[2]);
return 2;
}
pr = 0;
while ((ch = fgetc(ifile)) != EOF) {
if ((ch == '\n') && (pr != '\r'))
fputc('\r', ofile);
fputc(ch, ofile);
pr = ch;
}
return 0;
}
/*
* $Log: dosify.c,v $
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/08/11 23:47:04 steve
* Add missing Log and Ident strings.
*
* Revision 1.1 2001/08/03 17:06:47 steve
* Add install of examples for Windows.
*
*/
+2
View File
@@ -0,0 +1,2 @@
Makefile
iverilog-vpi.exe
+82
View File
@@ -0,0 +1,82 @@
#
# This source code is free software; you can redistribute it
# and/or modify it in source code form under the terms of the GNU
# Library General Public License as published by the Free Software
# Foundation; either version 2 of the License, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Library General Public License for more details.
#
# You should have received a copy of the GNU Library General Public
# License along with this program; if not, write to the Free
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.5 2002/12/08 03:06:30 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.7
prefix = @prefix@
exec_prefix = @exec_prefix@
srcdir = @srcdir@
VPATH = $(srcdir)
bindir = $(exec_prefix)/bin
libdir = $(exec_prefix)/lib
includedir = $(prefix)/include
mandir = @mandir@
dllib=@DLLIB@
CC = @CC@
CXX = @CXX@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"'
CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)/..
LDFLAGS = @LDFLAGS@
all: iverilog-vpi@EXEEXT@
clean:
rm -f *.o
rm -f iverilog-vpi@EXEEXT@
distclean: clean
rm -f Makefile
O = main.o res.o
iverilog-vpi@EXEEXT@: $O
$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@
main.o: main.c
$(CC) $(CFLAGS) -c $(srcdir)/main.c
# Windows specific...
res.o: res.rc
windres -i res.rc -o res.o
#
install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(bindir)
uninstall:
rm -f $(bindir)/iverilog-vpi@EXEEXT@
+565
View File
@@ -0,0 +1,565 @@
/*
* Copyright (c) 2002 Gus Baldauf ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
/*
* iverilog-vpi.c
*
* this program provides the functionality of iverilog-vpi.sh under Win32
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <windows.h>
/* Macros used for compiling and linking */
#define IVERILOG_VPI_CC "gcc" /* no .exe extension */
#define IVERILOG_VPI_CXX "gcc" /* no .exe extension */
#define IVERILOG_VPI_CFLAGS "-O" /* -I appended later */
#define IVERILOG_VPI_LD "gcc" /* no .exe extension */
#define IVERILOG_VPI_LDFLAGS "-shared -Wl,--enable-auto-image-base"
#define IVERILOG_VPI_LDLIBS "-lveriuser -lvpi" /* -L prepended later */
/* pointers to global strings */
static struct global_strings {
char *pCCSRC; /* list of C source files */
char *pCXSRC; /* list of C++ source files */
char *pOBJ; /* list of object files */
char *pLIB; /* list of library files */
char *pOUT; /* output file name (.vpi extension), if 0 length then no source files specified */
char *pMINGW; /* path to MinGW directory */
char *pIVL; /* path to IVL directory */
char *pCFLAGS; /* CFLAGS option */
char *pLDLIBS; /* LDLIBS option */
char *pNewPath; /* new PATH environment variable setting */
} gstr;
static void deInitDynString(char *str)
{
free(str);
}
/* when finished, free allocated memory and return error code */
static void myExit(int exitVal)
{
deInitDynString(gstr.pCCSRC);
deInitDynString(gstr.pCXSRC);
deInitDynString(gstr.pOBJ);
deInitDynString(gstr.pLIB);
deInitDynString(gstr.pOUT);
deInitDynString(gstr.pMINGW);
deInitDynString(gstr.pIVL);
deInitDynString(gstr.pCFLAGS);
deInitDynString(gstr.pLDLIBS);
deInitDynString(gstr.pNewPath);
exit(exitVal);
}
/* display usage summary and exit */
static void usage()
{
fprintf(stderr,"usage: iverilog-vpi [--name=name] [-llibrary] [-mingw=dir] [-ivl=dir] sourcefile...\n");
fprintf(stderr," or iverilog-vpi -mingw=dir\n");
fprintf(stderr," or iverilog-vpi -ivl=dir\n");
myExit(1);
}
static void initDynString(char **str)
{
*str = (char *) malloc(1);
if (!*str) {
fprintf(stderr,"error: out of memory\n");
myExit(4);
}
*str[0] = 0;
}
/* initialize dynamic memory buffers */
static void init()
{
initDynString(&gstr.pCCSRC);
initDynString(&gstr.pCXSRC);
initDynString(&gstr.pOBJ);
initDynString(&gstr.pLIB);
initDynString(&gstr.pOUT);
initDynString(&gstr.pMINGW);
initDynString(&gstr.pIVL);
initDynString(&gstr.pCFLAGS);
initDynString(&gstr.pLDLIBS);
initDynString(&gstr.pNewPath);
}
/* return true if "str" is terminated with with "end", case insensitive */
static int endsIn (char *end, char *str)
{
char *ext;
if (strlen(end) >= strlen(str))
return 0;
ext = str + (strlen(str) - strlen(end));
return stricmp(end,ext) ? 0 : 1;
}
/* return true if "str" begins with "prefix", case insensitive */
static int startsWith (char *prefix, char *str)
{
if (strlen(prefix) >= strlen(str))
return 0;
return strnicmp(prefix,str,strlen(prefix)) ? 0 : 1;
}
/* append "app" to "ptr", allocating memory as needed */
/* if count is zero, then copy all characters of "app" */
static void appendn (char **ptr, char *app, int count)
{
*ptr = (char *) realloc(*ptr,strlen(*ptr)+(count?count:strlen(app))+1);
if (*ptr == NULL) {
fprintf(stderr,"error: out of memory\n");
myExit(4);
}
if (count)
strncat(*ptr,app,count);
else
strcat(*ptr,app);
}
/* append "app" to "ptr", allocating memory as needed */
static void append (char **ptr, char *app)
{
appendn(ptr,app,0);
}
/* if the string does not end with a backslash, add one */
static void appendBackSlash(char **str)
{
if ((*str)[strlen(*str)-1] != '\\')
append(str,"\\");
}
/* copy count characters of "str" to "ptr", allocating memory as needed */
/* if count is zero, then copy all characters of "str" */
static void assignn (char **ptr, char *str, int count)
{
*ptr = (char *) realloc(*ptr,(count?count:strlen(str))+1);
if (*ptr == NULL) {
fprintf(stderr,"error: out of memory\n");
myExit(4);
}
if (count) {
strncpy(*ptr,str,count);
(*ptr)[count] = 0;
}
else
strcpy(*ptr,str);
}
/* copy count characters of "str" to "ptr", allocating memory as needed */
static void assign (char **ptr, char *str)
{
assignn(ptr,str,0);
}
/* get a copy of a Icarus Verilog registry string key */
static int GetRegistryKey(char *key, char **value)
{
long lrv;
HKEY hkKey;
char *regKeyBuffer;
DWORD regKeyType, regKeySize;
lrv = RegOpenKeyEx(HKEY_LOCAL_MACHINE,"Software\\Icarus Verilog",0,KEY_QUERY_VALUE,&hkKey);
if (lrv != ERROR_SUCCESS)
return 0;
lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,NULL,&regKeySize);
if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
lrv = RegCloseKey(hkKey);
return 0;
}
regKeyBuffer = (char *) malloc(regKeySize+1);
if (!regKeyBuffer) {
lrv = RegCloseKey(hkKey);
fprintf(stderr,"error: out of memory\n");
myExit(4);
}
regKeyBuffer[regKeySize] = 0; /* makes sure there is a trailing NULL */
lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,regKeyBuffer,&regKeySize);
if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
lrv = RegCloseKey(hkKey);
free(regKeyBuffer);
return 0;
}
RegCloseKey(hkKey);
assign(value,regKeyBuffer);
free(regKeyBuffer);
return 1;
}
/* store a copy of a Icarus Verilog registry string key */
static void SetRegistryKey(char *key, char *value)
{
HKEY hkKey;
DWORD res;
if (RegCreateKeyEx(
HKEY_LOCAL_MACHINE,
"Software\\Icarus Verilog",
0,
"",
REG_OPTION_NON_VOLATILE,
KEY_ALL_ACCESS,NULL,
&hkKey,
&res) != ERROR_SUCCESS)
return;
RegSetValueEx(hkKey,key,0,REG_SZ,value,strlen(value)+1);
RegCloseKey(hkKey);
printf("info: storing %s in Windows' registry entry\n",value);
printf(" HKEY_LOCAL_MACHINE\\Software\\Icarus Verilog\\%s\n",key);
}
/* parse the command line, assign results to global variable strings */
static int parse(int argc, char *argv[])
{
int idx, srcFileCnt=0;
char dot_c_ext[] = ".c";
char dot_cc_ext[] = ".cc";
char dot_o_ext[] = ".o";
char name_option[] = "--name=";
char lib_option[] = "-l";
char mingw_option[] = "-mingw=";
char ivl_option[] = "-ivl=";
if (argc == 1)
return 0;
for (idx=1; idx<argc; ++idx) {
if (endsIn(dot_c_ext,argv[idx])) { /* check for C source files */
++srcFileCnt;
append(&gstr.pCCSRC,argv[idx]);
append(&gstr.pCCSRC," ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_c_ext));
}
else if (endsIn(dot_cc_ext,argv[idx])) { /* check for C++ source files */
++srcFileCnt;
append(&gstr.pCXSRC,argv[idx]);
append(&gstr.pCXSRC," ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cc_ext));
}
else if (endsIn(dot_o_ext,argv[idx])) { /* check for compiled object files */
++srcFileCnt;
append(&gstr.pOBJ,argv[idx]);
append(&gstr.pOBJ," ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_o_ext));
}
else if (startsWith(name_option,argv[idx])) { /* check for --name option */
assignn(&gstr.pOUT,argv[idx]+sizeof(name_option)-1,strlen(argv[idx])-(sizeof(name_option)-1));
}
else if (startsWith(lib_option,argv[idx])) { /* check for -l option */
append(&gstr.pLIB,argv[idx]);
append(&gstr.pLIB," ");
}
else if (startsWith(mingw_option,argv[idx])) /* check for -mingw option */
assignn(&gstr.pMINGW,argv[idx]+sizeof(mingw_option)-1,strlen(argv[idx])-(sizeof(mingw_option)-1));
else if (startsWith(ivl_option,argv[idx])) /* check for -ivl option */
assignn(&gstr.pIVL,argv[idx]+sizeof(ivl_option)-1,strlen(argv[idx])-(sizeof(ivl_option)-1));
else
return 0; /* different from iverilog-vpi.sh, we don't ignore accept arguments */
}
if (0 == srcFileCnt)
assign(&gstr.pOUT,""); /* in case they used --name with no source files */
if (!*gstr.pOUT) { /* normally it's an error if there are no *.c,*.cc,*.o files */
if (!*gstr.pMINGW && !*gstr.pIVL) /* unless they are just setting the IVL or MinGW registry entries */
usage();
}
else {
append(&gstr.pOUT,".vpi"); /* the result file should have a .vpi extension */
append(&gstr.pOUT," ");
}
return 1;
}
/* do minimal check that the MinGW root directory looks valid */
static void checkMingwDir(char *root)
{
int irv;
struct _stat stat_buf;
char *path;
initDynString(&path);
assign(&path,gstr.pMINGW);
appendBackSlash(&path);
append(&path,"bin\\" IVERILOG_VPI_CC ".exe");
irv = _stat(path,&stat_buf);
deInitDynString(path);
if (irv) {
fprintf(stderr,"error: %s does not appear to be the valid root directory\n",root);
fprintf(stderr," of MinGW. Use the -mingw option of iverilog-vpi.exe to\n");
fprintf(stderr," point to the MinGW root directory. For a Windows command\n");
fprintf(stderr," shell the option would be something like -mingw=c:\\mingw\n");
fprintf(stderr," For a Cygwin shell the option would be something like\n");
fprintf(stderr," -mingw=c:\\\\mingw\n");
myExit(5);
}
}
/* do minimal check that the Icarus Verilog root directory looks valid */
static void checkIvlDir(char *root)
{
int irv;
struct _stat stat_buf;
char *path;
initDynString(&path);
assign(&path,gstr.pIVL);
appendBackSlash(&path);
append(&path,"bin\\vvp.exe");
irv = _stat(path,&stat_buf);
deInitDynString(path);
if (irv) {
fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
fprintf(stderr," Icarus Verilog. Use the -ivl option of iverilog-vpi.exe to\n");
fprintf(stderr," point to the Icarus Verilog root directory. For a Windows\n");
fprintf(stderr," command shell the option would be something like -ivl=c:\\iverilog\n");
fprintf(stderr," For a Cygwin shell the option would be something like\n");
fprintf(stderr," -ivl=c:\\\\iverilog\n");
myExit(6);
}
}
/* see if we can find mingw root */
#define IVL_REGKEY_MINGW "MingwDir"
static void setup_mingw_environment()
{
char *pOldPATH = getenv("PATH"); /* get current path */
if (*gstr.pMINGW) {
checkMingwDir(gstr.pMINGW);
SetRegistryKey(IVL_REGKEY_MINGW,gstr.pMINGW);
}
else
if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
fprintf(stderr,"error: can not locate the MinGW root directory, use the -mingw option of\n");
fprintf(stderr," iverilog-vpi.exe to point to the MinGW root directory. For\n");
fprintf(stderr," a Windows command shell the option would be something like\n");
fprintf(stderr," -mingw=c:\\mingw For a Cygwin shell the option would be\n");
fprintf(stderr," something like -mingw=c:\\\\mingw\n");
myExit(5);
}
assign(&gstr.pNewPath,"PATH="); /* create new path */
append(&gstr.pNewPath,gstr.pMINGW);
appendBackSlash(&gstr.pNewPath);
append(&gstr.pNewPath,"bin;");
append(&gstr.pNewPath,pOldPATH);
_putenv(gstr.pNewPath); /* place new path in environment variable */
}
/* see if we can find iverilog root */
#define IVL_REGKEY_IVL "InstallDir"
static void setup_ivl_environment()
{
if (*gstr.pIVL) {
checkIvlDir(gstr.pIVL);
SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
}
else
if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
fprintf(stderr," of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
fprintf(stderr," For a Windows command shell the option would be something like\n");
fprintf(stderr," -ivl=c:\\iverilog For a Cygwin shell the option would be something\n");
fprintf(stderr," like -ivl=c:\\\\iverilog\n");
myExit(6);
}
/* build up the CFLAGS option string */
assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
append(&gstr.pCFLAGS," -I");
append(&gstr.pCFLAGS,gstr.pIVL);
appendBackSlash(&gstr.pCFLAGS);
append(&gstr.pCFLAGS,"include");
/* build up the LDFLAGS option string */
assign(&gstr.pLDLIBS,"-L");
append(&gstr.pLDLIBS,gstr.pIVL);
appendBackSlash(&gstr.pLDLIBS);
append(&gstr.pLDLIBS,"lib ");
append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
}
/* compile source modules */
static void compile(char *pSource, char **pObject, char *ext, int *compile_errors, char *compiler)
{
char *ptr1 = pSource;
char *ptr2 = strchr(pSource,' ');
char *buf=0,*src=0,*obj=0;
while (ptr2) {
int len = ptr2 - ptr1;
assignn(&src,ptr1,len);
assignn(&obj,ptr1,len-strlen(ext)); /* strip off the extension */
append (&obj,".o");
assign (&buf,compiler);
append (&buf," -c -o ");
append (&buf,obj);
append (&buf," ");
append (&buf,gstr.pCFLAGS);
append (&buf," ");
append (&buf,src);
append (pObject,obj);
append (pObject," ");
printf("%s\n",buf);
if (system(buf))
++*compile_errors;
ptr1 = ptr2 + 1; /* advance to next token */
ptr2 = strchr(ptr1,' ');
}
free(buf);
free(src);
free(obj);
}
/* using the global strings, compile and link */
static void compile_and_link()
{
char *buf=0;
int iRet, compile_errors = 0;
/* print out the mingw and ivl directories to help the user debug problems */
printf("info: %s will be used as the MinGW root directory.\n",gstr.pMINGW);
checkMingwDir(gstr.pMINGW);
printf("info: %s will be used as the Icarus Verilog root directory.\n",gstr.pIVL);
checkIvlDir(gstr.pIVL);
/* compile */
compile(gstr.pCCSRC,&gstr.pOBJ,".c" ,&compile_errors,IVERILOG_VPI_CC ); /* compile the C source files */
compile(gstr.pCXSRC,&gstr.pOBJ,".cc",&compile_errors,IVERILOG_VPI_CXX); /* compile the C++ source files */
if (compile_errors) {
fprintf(stderr,"iverilog-vpi: Some %d files failed to compile.\n",compile_errors);
myExit(2);
}
/* link */
assign(&buf,IVERILOG_VPI_LD);
append(&buf," -o ");
append(&buf,gstr.pOUT); /* has a trailing space */
append(&buf,IVERILOG_VPI_LDFLAGS);
append(&buf," ");
append(&buf,gstr.pOBJ) /* has a trailing space */;
append(&buf,gstr.pLIB); /* has a trailing space */
append(&buf,gstr.pLDLIBS);
printf("%s\n",buf);
iRet = system(buf);
free(buf);
if (iRet)
myExit(3);
}
/* program execution starts here */
int main(int argc, char *argv[])
{
init();
if (!parse(argc,argv))
usage();
setup_mingw_environment();
setup_ivl_environment();
if (*gstr.pOUT) /* are there any *.c,*.cc,*.o files specified */
compile_and_link();
myExit(0);
}
+38
View File
@@ -0,0 +1,38 @@
// LANGUAGE ENGLISH
LANGUAGE 9, 4
/////////////////////////////////////////////////////////////////////////////
//
// Version
//
1 VERSIONINFO
FILEVERSION 2002,11,13,0
PRODUCTVERSION 0,7,0,0
FILEFLAGSMASK 0x3fL
FILEFLAGS 0x2L
FILEOS 0x40004L
FILETYPE 0x2L
FILESUBTYPE 0x0L
BEGIN
BLOCK "StringFileInfo"
BEGIN
BLOCK "040904b0"
BEGIN
VALUE "CompanyName", "Icarus Verilog\0"
VALUE "FileDescription", "Icarus Veriog VPI Tool\0"
VALUE "FileVersion", "2002, 11, 13, 0\0"
VALUE "InternalName", "iverilog-vpi\0"
VALUE "LegalCopyright", "Copyright 2002 Gus Baldauf\0"
VALUE "OriginalFilename", "iverilog-vpi.exe\0"
VALUE "ProductName", "Icarus Verilog\0"
VALUE "ProductVersion", "0, 7, 0, 0\0"
END
END
BLOCK "VarFileInfo"
BEGIN
VALUE "Translation", 0x409, 1200
END
END
+9
View File
@@ -1,6 +1,15 @@
a.out
Makefile
parse.c
parse.h
parse.output
lexor.c
cfparse.c
cfparse.h
cfparse.output
cflexor.c
foo.*
iverilog
iverilog.ps
iverilog.pdf
tmp.pdf
+37 -13
View File
@@ -3,9 +3,7 @@
# and/or modify it in source code form under the terms of the GNU
# Library General Public License as published by the Free Software
# Foundation; either version 2 of the License, or (at your option)
# any later version. In order to redistribute the software in
# binary form, you will need a Picture Elements Binary Software
# License.
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -18,12 +16,12 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.3 2001/01/09 03:11:27 steve Exp $"
#ident "$Id: Makefile.in,v 1.16 2002/12/08 03:06:30 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.0
VERSION = 0.7
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -37,7 +35,6 @@ includedir = $(prefix)/include
mandir = @mandir@
dllib=@DLLIB@
rdynamic=@rdynamic@
CC = @CC@
CXX = @CXX@
@@ -46,35 +43,59 @@ INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -I.
CFLAGS = @CFLAGS@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"'
CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)/..
LDFLAGS = @LDFLAGS@
all: iverilog@EXEEXT@
clean:
rm -f *.o lexor.c parse.c parse.h parse.output
rm -f cflexor.c cfparse.c cfparse.h cfparse.output
O = main.o build_string.o lexor.o parse.o
O = main.o build_string.o lexor.o parse.o substit.o cflexor.o cfparse.o
iverilog@EXEEXT@: $O
$(CC) $(LDFLAGS) $O -o iverilog@EXEEXT@
$(CC) $(LDFLAGS) $O -o iverilog@EXEEXT@ @EXTRALIBS@
lexor.c: lexor.lex
flex -s -olexor.c $(srcdir)/lexor.lex
parse.h parse.c: parse.y
bison --verbose -t -d $(srcdir)/parse.y -o parse.c
bison --verbose -t -d -o parse.c $(srcdir)/parse.y
cflexor.c: cflexor.lex
flex -s -Pcf -ocflexor.c $(srcdir)/cflexor.lex
cfparse.h cfparse.c: cfparse.y
bison --verbose -t -d -o cfparse.c --name-prefix=cf $(srcdir)/cfparse.y
main.o: main.c globals.h
$(CC) $(CPPFLAGS) -c -DCXX='"@CXX@"' -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DRDYNAMIC=\"$(rdynamic)\" -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
$(CC) $(CFLAGS) -c -DCXX='"@CXX@"' -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
build_string.o: build_string.c globals.h
lexor.o: lexor.c parse.h globals.h
parse.o: parse.c globals.h
cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
cfparse.o: cfparse.c globals.h cfparse_misc.h
iverilog.ps: $(srcdir)/iverilog.man
man -t $(srcdir)/iverilog.man > iverilog.ps
install: all installdirs $(bindir)/iverilog@EXEEXT@ $(mandir)/man1/iverilog.1
iverilog.pdf: iverilog.ps
ps2pdf iverilog.ps iverilog.pdf
ifeq (@WIN32@,yes)
INSTALL_DOC = $(prefix)/iverilog.pdf
INSTALL_DOCDIR =
all: iverilog.pdf
else
INSTALL_DOC = $(mandir)/man1/iverilog.1
INSTALL_DOCDIR = $(mandir)/man1
endif
install: all installdirs $(bindir)/iverilog@EXEEXT@ $(INSTALL_DOC)
$(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(bindir)/iverilog@EXEEXT@
@@ -82,8 +103,11 @@ $(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@
$(mandir)/man1/iverilog.1: $(srcdir)/iverilog.man
$(INSTALL_DATA) $(srcdir)/iverilog.man $(mandir)/man1/iverilog.1
$(prefix)/iverilog.pdf: iverilog.pdf
$(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog.pdf
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(bindir) $(mandir)/man1
$(srcdir)/../mkinstalldirs $(bindir) $(INSTALL_DOCDIR)
uninstall:
rm -f $(bindir)/iverilog@EXEEXT@
+56 -2
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: build_string.c,v 1.2 2000/10/28 03:45:47 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: build_string.c,v 1.11 2002/08/12 01:35:01 steve Exp $"
#endif
# include "config.h"
# include "globals.h"
# include <string.h>
# include <assert.h>
@@ -51,6 +53,8 @@ int build_string(char*output, size_t olen, const char*pattern)
tmp_buf[tail-pattern-1] = 0;
if (((*pattern == 's') && start)
|| ((*pattern == 'v') && verbose_flag)
|| ((*pattern == 'M') && depfile)
|| ((*pattern == 'N') && npath)
|| ((*pattern == 'T') && mtm)) {
int rc = build_string(output, olen,
@@ -68,6 +72,18 @@ int build_string(char*output, size_t olen, const char*pattern)
olen -= strlen(base);
break;
case 'C':
strcpy(output, iconfig_path);
output += strlen(iconfig_path);
olen -= strlen(iconfig_path);
break;
case 'g':
strcpy(output, generation);
output += strlen(generation);
olen -= strlen(generation);
break;
case 'f':
if (f_list) {
strcpy(output, f_list);
@@ -84,6 +100,14 @@ int build_string(char*output, size_t olen, const char*pattern)
}
break;
case 'M':
if (depfile) {
strcpy(output, depfile);
output += strlen(depfile);
olen -= strlen(depfile);
}
break;
case 'N':
if (npath) {
strcpy(output, npath);
@@ -141,6 +165,36 @@ int build_string(char*output, size_t olen, const char*pattern)
/*
* $Log: build_string.c,v $
* Revision 1.11 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.10 2002/05/28 02:25:03 steve
* Pass library paths through -Cfile instead of command line.
*
* Revision 1.9 2002/05/28 00:50:39 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*
* Revision 1.8 2002/05/24 01:13:00 steve
* Support language generation flag -g.
*
* Revision 1.7 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.6 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*
* Revision 1.5 2001/10/20 23:02:40 steve
* Add automatic module libraries.
*
* Revision 1.4 2001/07/25 03:10:50 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.3 2001/07/03 04:09:25 steve
* Generate verbuse status messages (Stephan Boettcher)
*
* Revision 1.2 2000/10/28 03:45:47 steve
* Use the conf file to generate the vvm ivl string.
*
+137
View File
@@ -0,0 +1,137 @@
%{
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: cflexor.lex,v 1.6 2002/05/28 20:40:37 steve Exp $"
#endif
# include "cfparse.h"
# include "cfparse_misc.h"
# include "globals.h"
# include <string.h>
/*
* Lexical location information is passed in the yylloc variable to th
* parser. The file names, strings, are kept in a list so that I can
* re-use them. The set_file_name function will return a pointer to
* the name as it exists in the list (and delete the passed string.)
* If the name is new, it will be added to the list.
*/
YYLTYPE yylloc;
static int comment_enter;
%}
%x CCOMMENT
%x LCOMMENT
%x PLUS_ARGS
%%
/* Accept C++ style comments. */
"//".* { comment_enter = YY_START; BEGIN(LCOMMENT); }
<LCOMMENT>. { yymore(); }
<LCOMMENT>\n { yylloc.first_line += 1; BEGIN(comment_enter); }
/* Accept C style comments. */
"/*" { comment_enter = YY_START; BEGIN(CCOMMENT); }
<CCOMMENT>. { yymore(); }
<CCOMMENT>\n { yylloc.first_line += 1; yymore(); }
<CCOMMENT>"*/" { BEGIN(comment_enter); }
/* Accept shell type comments. */
^"#".* { ; }
/* Skip white space. */
[ \t\f\r] { ; }
/* Skip line ends, but also count the line. */
\n { yylloc.first_line += 1; }
"+define+" { BEGIN(PLUS_ARGS); return TOK_DEFINE; }
"+incdir+" { BEGIN(PLUS_ARGS); return TOK_INCDIR; }
"+libdir+" { BEGIN(PLUS_ARGS); return TOK_LIBDIR; }
"+libdir-nocase+" { BEGIN(PLUS_ARGS); return TOK_LIBDIR_NOCASE; }
"+libext+" { BEGIN(PLUS_ARGS); return TOK_LIBEXT; }
/* If it is not any known plus-flag, return the generic form. */
"+"[^\n \t\b\f\r+]* {
cflval.text = strdup(yytext);
BEGIN(PLUS_ARGS);
return TOK_PLUSWORD; }
/* Once in PLUS_ARGS mode, words are delimited by +
characters. White space and line end terminate PLUS_ARGS mode,
but + terminates only the word. */
<PLUS_ARGS>[^\n \t\b\f\r+]* {
cflval.text = strdup(yytext);
return TOK_PLUSARG; }
/* Within plusargs, this is a delimiter. */
<PLUS_ARGS>"+" { }
/* White space end plus_args mode. */
<PLUS_ARGS>[ \t\b\f\r] { BEGIN(0); }
<PLUS_ARGS>\n {
yylloc.first_line += 1;
BEGIN(0); }
/* Notice the -a flag. */
"-a" { return TOK_Da; }
/* Notice the -v flag. */
"-v" { return TOK_Dv; }
/* Notice the -y flag. */
"-y" { return TOK_Dy; }
/* This rule matches paths and strings that may be file names. This
is a little bit tricky, as we don't want to mistake a comment for
a string word. */
"/"[^\*\/].* { cflval.text = strdup(yytext);
return TOK_STRING; }
[^/\n \t\b\r+-].* { cflval.text = strdup(yytext);
return TOK_STRING; }
/* Fallback match. */
. { return yytext[0]; }
%%
int yywrap()
{
return 1;
}
void cfreset(FILE*fd, const char*path)
{
yyin = fd;
yyrestart(fd);
yylloc.first_line = 1;
yylloc.text = (char*)path;
}
+210
View File
@@ -0,0 +1,210 @@
%{
/*
* Copyright (c) 20001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: cfparse.y,v 1.8 2002/06/23 20:10:51 steve Exp $"
#endif
# include "globals.h"
# include "cfparse_misc.h"
# include <ctype.h>
/*
* This flag is set to 0, 1 or 2 if file names are to be translated to
* uppercase(1) or lowercase(2).
*/
static int setcase_filename_flag = 0;
static void translate_file_name(char*text)
{
switch (setcase_filename_flag) {
case 0:
break;
case 1:
while (*text) {
*text = toupper(*text);
text += 1;
}
break;
case 2:
while (*text) {
*text = tolower(*text);
text += 1;
}
break;
}
}
%}
%union {
char*text;
};
%token TOK_Da TOK_Dv TOK_Dy
%token TOK_DEFINE TOK_INCDIR TOK_LIBDIR TOK_LIBDIR_NOCASE TOK_LIBEXT
%token <text> TOK_PLUSARG TOK_PLUSWORD TOK_STRING
%%
start
:
| item_list
;
item_list
: item_list item
| item
;
item
/* Absent any other matching, a token string is taken to be the name
of a source file. Add the file to the file list. */
: TOK_STRING
{ char*tmp = substitutions($1);
translate_file_name(tmp);
process_file_name(tmp);
free($1);
free(tmp);
}
/* The -a flag is completely ignored. */
| TOK_Da { }
/* The -v <libfile> flag is ignored, and the <libfile> is processed
as an ordinary source file. */
| TOK_Dv TOK_STRING
{ char*tmp = substitutions($2);
translate_file_name(tmp);
process_file_name(tmp);
fprintf(stderr, "%s:%u: Ignoring -v in front of %s\n",
@1.text, @1.first_line, $2);
free($2);
free(tmp);
}
/* This rule matches "-y <path>" sequences. This does the same thing
as -y on the command line, so add the path to the library
directory list. */
| TOK_Dy TOK_STRING
{ char*tmp = substitutions($2);
process_library_switch(tmp);
free($2);
free(tmp);
}
| TOK_LIBDIR TOK_PLUSARG
{ char*tmp = substitutions($2);
process_library_switch(tmp);
free($2);
free(tmp);
}
| TOK_LIBDIR_NOCASE TOK_PLUSARG
{ char*tmp = substitutions($2);
process_library_nocase_switch(tmp);
free($2);
free(tmp);
}
| TOK_DEFINE TOK_PLUSARG
{ process_define($2);
free($2);
}
/* The +incdir token introduces a list of +<path> arguments that are
the include directories to search. */
| TOK_INCDIR inc_args
/* The +libext token introduces a list of +<ext> arguments that
become individual -Y flags to ivl. */
| TOK_LIBEXT libext_args
/* The +<word> tokens that are not otherwise matched, are
ignored. The skip_args rule arranges for all the argument words
to be consumed. */
| TOK_PLUSWORD skip_args
{ fprintf(stderr, "%s:%u: Ignoring %s\n",
@1.text, @1.first_line, $1);
free($1);
}
| TOK_PLUSWORD
{ if (strcmp($1, "+toupper-filenames") == 0) {
setcase_filename_flag = 1;
} else if (strcmp($1, "+tolower-filenames") == 0) {
setcase_filename_flag = 2;
} else {
fprintf(stderr, "%s:%u: Ignoring %s\n",
@1.text, @1.first_line, $1);
}
free($1);
}
;
/* inc_args are +incdir+ arguments in order. */
inc_args
: inc_args inc_arg
| inc_arg
;
inc_arg : TOK_PLUSARG
{ char*tmp = substitutions($1);
process_include_dir(tmp);
free($1);
free(tmp);
}
;
/* inc_args are +incdir+ arguments in order. */
libext_args
: libext_args libext_arg
| libext_arg
;
libext_arg : TOK_PLUSARG
{ process_library2_switch($1);
free($1);
}
;
/* skip_args are arguments to a +word flag that is not otherwise
parsed. This rule matches them and releases the strings, so that
they can be safely ignored. */
skip_args
: skip_args skip_arg
| skip_arg
;
skip_arg : TOK_PLUSARG
{ free($1);
}
;
%%
int yyerror(const char*msg)
{
}
+57
View File
@@ -0,0 +1,57 @@
#ifndef __cfparse_misc_H
#define __cfparse_misc_H
/*
* Copyright (c) 2001 Picture Elements, Inc.
* Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cfparse_misc.h,v 1.4 2002/08/12 01:35:01 steve Exp $"
#endif
/*
* The vlltype supports the passing of detailed source file location
* information between the lexical analyzer and the parser. Defining
* YYLTYPE compels the lexor to use this type and not something other.
*/
struct cfltype {
unsigned first_line;
unsigned first_column;
unsigned last_line;
unsigned last_column;
const char*text;
};
# define YYLTYPE struct cfltype
extern YYLTYPE yylloc;
/*
* $Log: cfparse_misc.h,v $
* Revision 1.4 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/01/02 02:39:34 steve
* Use my own cfltype to defend against bison 1.30.
*
* Revision 1.2 2001/11/12 18:47:32 steve
* Support +incdir in command files, and ignore other
* +args flags. Also ignore -a and -v flags.
*
* Revision 1.1 2001/11/12 01:26:36 steve
* More sophisticated command file parser.
*
*/
#endif
+81 -4
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: globals.h,v 1.3 2000/11/09 21:58:00 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: globals.h,v 1.16 2002/08/12 01:35:01 steve Exp $"
#endif
# include <stddef.h>
@@ -27,6 +27,9 @@
/* This is the base (i.e. -B<value>) of the Icarus Verilog files. */
extern const char*base;
/* This is the path to the iconfig file sent to ivl. */
extern char* iconfig_path;
/* This is a list of all the -f<key>=<value> options from the
command line, concatenated together. */
extern char*f_list;
@@ -36,14 +39,17 @@ extern char*mod_list;
/* This is the optional -Tmin|typ|max setting. */
extern const char*mtm;
/* Ths is the optional -M<dependfile> value, if one was supplied. */
extern const char*depfile;
/* Ths is the optional -N<path> value, if one was supplied. */
extern const char*npath;
/* This is the name of the output file that the user selected. */
extern const char*opath;
/* This pointer is set if there was a -s<value> parameter. */
extern const char*start;
/* This pointer is set if there were -s<value> parameters. */
extern char*start;
/* This flag is true if the -S flag was used on the command line. */
extern int synth_flag;
@@ -51,14 +57,85 @@ extern int synth_flag;
/* This is the name of the selected target. */
extern const char*targ;
/* This is the language generation flag. */
extern const char*generation;
/* Perform variable substitutions on the string. */
extern char* substitutions(const char*str);
/* Add the name to the list of source files. */
extern void process_file_name(const char*name);
/* Add the name to the list of library directories. */
extern void process_library_switch(const char*name);
extern void process_library_nocase_switch(const char*name);
extern void process_library2_switch(const char*name);
/* Add a new include file search directory */
extern void process_include_dir(const char*name);
/* Add a new -D define. */
extern void process_define(const char*name);
/* -v */
extern int verbose_flag;
extern char warning_flags[];
/* -y and -Y flags from the command line. */
extern char* library_flags;
extern char* library_flags2;
extern const char*lookup_pattern(const char*key);
extern int build_string(char*out, size_t olen, const char*pattern);
/*
* $Log: globals.h,v $
* Revision 1.16 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/06/23 20:10:51 steve
* Variable substitution in command files.
*
* Revision 1.14 2002/05/28 20:40:37 steve
* ivl indexes the search path for libraries, and
* supports case insensitive module-to-file lookup.
*
* Revision 1.13 2002/05/28 00:50:40 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*
* Revision 1.12 2002/05/24 01:13:00 steve
* Support language generation flag -g.
*
* Revision 1.11 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.10 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*
* Revision 1.9 2001/11/13 03:30:26 steve
* The +incdir+ plusarg can take multiple directores,
* and add initial support for +define+ in the command file.
*
* Revision 1.8 2001/11/12 18:47:32 steve
* Support +incdir in command files, and ignore other
* +args flags. Also ignore -a and -v flags.
*
* Revision 1.7 2001/11/12 01:26:36 steve
* More sophisticated command file parser.
*
* Revision 1.6 2001/10/23 00:37:30 steve
* The -s flag can now be repeated on the iverilog command.
*
* Revision 1.5 2001/10/20 23:02:40 steve
* Add automatic module libraries.
*
* Revision 1.4 2001/07/03 04:09:25 steve
* Generate verbuse status messages (Stephan Boettcher)
*
* Revision 1.3 2000/11/09 21:58:00 steve
* Remember to include the -S condition.
*
+164 -27
View File
@@ -1,17 +1,19 @@
.TH iverilog 1 "$Date: 2001/01/20 19:02:05 $" Version "$Date: 2001/01/20 19:02:05 $"
.TH iverilog 1 "$Date: 2002/06/23 20:10:51 $" Version "$Date: 2002/06/23 20:10:51 $"
.SH NAME
iverilog - Icarus Verilog compiler
.SH SYNOPSIS
.B iverilog
[-ESv] [-Cpath] [-ccmdfile] [-Dmacro[=defn]] [-pflag=value] [-Iincludepath] [-mmodule] [-Nfile] [-ooutputfilename] [-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] sourcefile
[-ESVv] [-Cpath] [-ccmdfile] [-g1|-g2|-g3.0] [-Dmacro[=defn]] [-pflag=value]
[-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename]
[-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile
.SH DESCRIPTION
.PP
\fIiverilog\fP is a compiler that translates Verilog source code into
executable programs for simulation, or other netlist formats for
further processing. The currenty supported targets are \fIvvm\fP (for
executable simulation) and \fIxnf\fP for synthesis. Other target
further processing. The currently supported targets are \fIvvp\fP for
simulation, and \fIxnf\fP and \fIfpga\fP for synthesis. Other target
types are added as code generators are implemented.
.SH OPTIONS
@@ -20,7 +22,7 @@ types are added as code generators are implemented.
.TP 8
.B -B\fIbase\fP
The \fIiverilog\fP program uses external programs to preprocess and
compile the verilog source. Normally, the path used to locate these
compile the Verilog source. Normally, the path used to locate these
tools is built into the \fIiverilog\fP program. However, the \fB-B\fP
switch allows the user to select a different set of programs. The path
given is used to locate \fIivlpp\fP, \fIivl\fP and the VPI modules.
@@ -29,9 +31,7 @@ given is used to locate \fIivlpp\fP, \fIivl\fP and the VPI modules.
This flag specifies an input file that contains a list of Verilog
source files. This is similar to the \fIcommand file\fP of other
Verilog simulators, in that it is a file that contains the file names
instead of taking them on the command line. The command file may
contain C-style comments (/*-*/) or shell-style comments (# to the end
of the line.)
instead of taking them on the command line. See \fBCommand Files\fP below.
.TP 8
.B -C\fIpath\fP
This flag selects the driver configuration file to use. Normally, the
@@ -53,18 +53,34 @@ Defines macro \fImacro\fP as \fIdefn\fP.
Preprocess the Verilog source, but do not compile it. The output file
is the Verilog input, but with file inclusions and macro references
expanded and removed. This is useful, for example, to preprocess
verilog source for use by other compilers.
Verilog source for use by other compilers.
.TP 8
.B -g1\fI|\fP-g2\fI|\fP-g3.0
Select the Verilog language \fIgeneration\fP to support in the
compiler. This selects between \fIIEEE1364-1995\fP(1),
\fIIEEE1364-2001\fP(2), or \fISystemVerilog 3.0\fP(3.0). Normally,
Icarus Verilog defaults to the latest known generation of the
language. This flag is most useful to restrict the language to a set
supported by tools of specific generations, for compatibility with
other tools.
.TP 8
.B -I\fIincludedir\fP
Append directory \fIincludepdir\fP to list of directoriess searched
Append directory \fIincludedir\fP to list of directories searched
for Verilog include files. The \fB-I\fP switch may be used many times
to specify several directories to search, the directories are searched
in the order they appear on the command line.
.TP 8
.B -M\fIpath\fP
Write into the file specified by path a list of files that contribute
to the compilation of the design. This includes files that are
included by include directives and files that are automatically loaded
by library support. The output is one file name per line, with no
leading or trailing space.
.TP 8
.B -m\fImodule\fP
Add this module to the list of VPI modules to be loaded by the
simulation. Many modules can be specified, and all will be loaded, in
the order specified.
the order specified. The system module is implicit and always included.
.TP 8
.B -N\fIpath\fP
This is used for debugging the compiler proper. Dump the final netlist
@@ -91,9 +107,10 @@ netlist format, the \fB-S\fP switch is unnecessary and has no effect.
.TP 8
.B -s \fItopmodule\fP
Specify the top level module to elaborate. Icarus Verilog will by default
choose the only module that has no ports. However, this simplistic
heuristic is often not sufficient, and sometimes not what is wanted
anyhow.
choose modules that are not instantiated in any other modules, but
sometimes that is not sufficient, or instantiates too many modules. If
the user specifies one or more root modules with \fB-s\fP flags, then
they will be used as root modules instead.
.TP 8
.B -T\fImin|typ|max\fP
Use this switch to select min, typ or max times from min:typ:max
@@ -109,13 +126,36 @@ Use this switch to specify the target output format. See the
.B -v
Turn on verbose messages. This will print the command lines that are
executed to perform the actual compilation, along with version
information from the various components.
information from the various components, as well as the version of the
product as a whole.
.TP 8
.B -V
Print the version of the compiler, and exit.
.TP 8
.B -W\fIclass\fP
Turn on different classes of warnings. See the \fBWARNING TYPES\fP
section below for desctriptions of the different warning groups. If
section below for descriptions of the different warning groups. If
multiple \fB-W\fP switches are used, the warning set is the union of
all the requested classes.
.TP 8
.B -y\fIlibdir\fP
Append the directory to the library module search path. When the
compiler finds an undefined module, it looks in these directories for
files with the right name.
.SH MODULE LIBRARIES
The Icarus Verilog compiler supports module libraries as directories
that contain Verilog source files. During elaboration, the compiler
notices the instantiation of undefined module types. If the user
specifies library search directories, the compiler will search the
directory for files with the name of the missing module type. If it
finds such a file, it loads it as a Verilog source file, they tries
again to elaborate the module.
Library module files should contain only a single module, but this is
not a requirement. Library modules may reference other modules in the
library or in the main design.
.SH TARGETS
@@ -128,20 +168,27 @@ desired target.
The null target causes no code to be generated. It is useful for
checking the syntax of the Verilog source.
.TP 8
.B vvm
This is the default. The target is an executable program that uses the
vvm simulation runtime. The compiler actually generates C++ code, then
compiles and links that code to make the output executable.
.B vvp
This is the default. The vvp target generates code for the vvp
runtime. The output is a complete program that simulates the design
but must be run by the \fBvvp\fP command.
.TP 8
.B xnf
This is the Xilinx Netlist Format used by many tools for placing
devices in FPGAs or other programmable devices. The Icarus Verilog XNF
code generator can generate complete designs or XNF macros that can be
imported into larger designs by other tools.
imported into larger designs by other tools. (This target is obsolete,
use the \fBfpga\fP target instead.)
.TP 8
.B fpga
This is a synthesis target that supports a variety of fpga devices,
mostly by EDIF format output.
.SH "WARNING TYPES"
These are the types of warnings that can be selected by the \fB-W\fP
switch.
switch. All the warning types (other then \fBall\fP) can also be
prefixed with \fBno-\fP to turn off that warning. This is most useful
after a \fB-Wall\fP argument to suppress isolated warning types.
.TP 8
.B all
@@ -150,24 +197,113 @@ This enables all supported warning categories.
.TP 8
.B implicit
This enables warnings for creation of implicit declarations. For
example, if a scaler wire X is used but not declared in the Verilog
example, if a scalar wire X is used but not declared in the Verilog
source, this will print a warning at its first use.
.TP 8
.B timescale
This enables warnings for inconsistent use of the timescale
directive. It detects if some modules have no timescale, or if modules
inherit timescale from another file. Both probably mean that
timescales are inconsistent, and simulation timing can be confusing
and dependent on compilation order.
.SH "COMMAND FILES"
The command file allows the user to place source file names and
certain command line switches into a text file instead of on a long
command line. Command files can include C or C++ style comments, as
well as # comments, if the # starts the line.
.TP 8
.I "file name"
A simple file name or file path is taken to be the name of a Verilog
source file. The path starts with the first non-white-space
character. Variables are substitued in file names.
.TP 8
.B -y\ \fIlibdir\fP
A \fB-y\fP token prefixes a library directory in the command file,
exactly like it does on the command line. The parameter to the \fB-y\fP
flag may be on the same line or the next non-comment line.
Variables in the \fIlibdir\fP are substituted.
.TP 8
.B +incdir+\fIincludedir\fP
The \fB+incdir+\fP token in command files gives directories to search
for include files in much the same way that \fB-I\fP flags work on the
command line. The difference is that multiple \fI+includedir\fP
directories are valid parameters to a single \fB+incdir+\fP token,
although you may also have multiple \fB+incdir+\fP lines.
Variables in the \fIincludedir\fP are substituted.
.TP 8
.B +libext+\fIext\fP
The \fB+libext\fP token in command files fives file extensions to try
when looking for a library file. This is useful in conjunction with
\fB-y\fP flags to list suffixes to try in each directory before moving
on to the next library directory.
.TP 8
.B +libdir+\fIdir\fP
This is another way to specify library directories. See the -y flag.
.TP 8
.B +libdir-nocase+\fIdir\fP
This is like the \fB+libdir\fP statement, but file names inside the
directories declared here are case insensitive. The missing module
name in a lookup need not match the file name case, as long as the
letters are correct. For example, "foo" matches "Foo.v" but not
"bar.v".
.TP 8
.B +define+\fINAME\fP=\fIvalue\fP
The \fB+define+\fP token is the same as the \fB-D\fP option on the
command line. The value part of the token is optional.
.TP 8
.B +toupper-filename\fP
This token causes file names after this in the command file to be
translated to uppercase. This helps with situations where a directory
has passed through a DOS machine, and in the process the file names
become munged.
.TP 8
.B +tolower-filename\fP
This is similar to the \fB+toupper-filename\fP hack described above.
.SH "VARIABLES IN COMMAND FILES"
In certain cases, iverilog supports variables in command files. These
are strings of the form "$(\fIvarname\fP)", where \fIvarname\fP is the
name of the environment variable to read. The entire string is
replaced with the contents of that variable. Variables are only
substitued in contexts that explicitly support them, including file
and directory strings.
Variable values come from the operating system environment, and not
from preprocessor defines elsewhere in the file or the command line.
.SH EXAMPLES
These examples assume that you have a Verilog source file called hello.v in
the current directory
To compile hello.v to an executable file called a.out:
verilog hello.v
iverilog hello.v
To compile hello.v to an executable file called hello:
verilog -o hello hello.v
iverilog -o hello hello.v
To compile and run explicitly using the vvp runtime:
iverilog -ohello.vvp -tvvp hello.v
To compile hello.v to a file in XNF-format called hello.xnf
verilog -txnf -ohello.xnf hello.v
iverilog -txnf -ohello.xnf hello.v
.SH "AUTHOR"
@@ -175,11 +311,12 @@ To compile hello.v to a file in XNF-format called hello.xnf
Steve Williams ([email protected])
.SH SEE ALSO
vvp(1),
.BR "<http://www.icarus.com/eda/verilog/>"
.SH COPYRIGHT
.nf
Copyright \(co 2000 Stephen Williams
Copyright \(co 2002 Stephen Williams
This document can be freely redistributed according to the terms of the
GNU General Public License version 2.0
+3 -1
View File
@@ -19,9 +19,11 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: lexor.lex,v 1.4 2000/12/15 02:00:11 steve Exp $"
#ident "$Id: lexor.lex,v 1.5 2001/07/25 03:10:50 steve Exp $"
#endif
# include "config.h"
# include <string.h>
# include "parse.h"
+530 -247
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams ([email protected])
* Copyright (c) 2000-2001 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,16 +16,18 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: main.c,v 1.8 2001/02/01 17:12:22 steve Exp $"
#endif
#ident "$Id: main.c,v 1.50 2003/01/10 19:01:04 steve Exp $"
# include "config.h"
const char HELP[] =
"Usage: iverilog [-ESv] [-c <path>] [-Dmacro[=defn]]
[-p flag=value] [-I<dir>] [-m module]
[-o <output>] [-s top_module] [-t<type>]
[-W class] source_file(s)
See man page for details.";
"Usage: iverilog [-ESvV] [-B base] [-C path] [-c cmdfile] [-g1|-g2|-g3.0]\n"
" [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n"
" [-N file] [-o filename] [-p flag=value]\n"
" [-s topmodule] [-t target] [-T min|typ|max]\n"
" [-W class] [-y dir] [-Y suf] source_file(s)\n"
"See man page for details.";
#define MAXSIZE 4096
@@ -36,28 +38,57 @@ See man page for details.";
#include <assert.h>
#include <sys/types.h>
#ifdef HAVE_SYS_WAIT_H
#include <sys/wait.h>
#endif
#ifdef __MINGW32__
#include <windows.h>
#ifdef HAVE_LIBIBERTY_H
#include <libiberty.h>
#endif
#endif
#if HAVE_GETOPT_H
#include <getopt.h>
#endif
#if defined(__MINGW32__) && !defined(HAVE_GETOPT_H)
extern int getopt(int argc, char*argv[], const char*fmt);
extern int optind;
extern const char*optarg;
#endif
#if !defined(WIFEXITED)
# define WIFEXITED(rc) ((rc&0x7f) == 0)
#endif
#if !defined(WEXITSTATUS)
# define WEXITSTATUS(rc) (rc>>8)
#endif
#ifndef IVL_ROOT
# define IVL_ROOT "."
#endif
#ifndef RDYNAMIC
# define RDYNAMIC "-rdynamic"
#endif
# include "globals.h"
const char*base = IVL_ROOT;
#ifdef __MINGW32__
const char sep = '\\';
#else
const char sep = '/';
#endif
extern void cfreset(FILE*fd, const char*path);
const char*base = 0;
const char*mtm = 0;
const char*opath = "a.out";
const char*npath = 0;
const char*targ = "vvm";
const char*start = 0;
const char*targ = "vvp";
const char*depfile = 0;
const char*generation = "-g3.0";
char warning_flags[16] = "";
@@ -65,19 +96,97 @@ char*inc_list = 0;
char*def_list = 0;
char*mod_list = 0;
char*command_filename = 0;
char*start = 0;
char*f_list = 0;
/* These are used to collect the list of file names that will be
passed to ivlpp. Keep the list in a file because it can be a long
list. */
char*source_path = 0;
FILE*source_file = 0;
unsigned source_count = 0;
char*iconfig_path = 0;
FILE*iconfig_file = 0;
int synth_flag = 0;
int verbose_flag = 0;
int command_file = 0;
int inside_c_comment = 0;
FILE *fp;
char line[MAXSIZE];
char tmp[MAXSIZE];
static char ivl_root[MAXSIZE];
#ifdef __MINGW32__
# include <io.h>
# include <fcntl.h>
static FILE*fopen_safe(const char*path)
{
FILE*file = 0;
int fd;
fd = _open(path, _O_WRONLY|_O_CREAT|_O_EXCL, 0700);
if (fd != -1)
file = _fdopen(fd, "w");
return file;
}
#else
# include <fcntl.h>
static FILE*fopen_safe(const char*path)
{
FILE*file = 0;
int fd;
fd = open(path, O_WRONLY|O_CREAT|O_EXCL, 0700);
if (fd != -1)
file = fdopen(fd, "w");
return file;
}
#endif
static const char*my_tempfile(const char*str, FILE**fout)
{
FILE*file;
int retry;
static char pathbuf[8192];
const char*tmpdir = getenv("TMP");
if (tmpdir == 0)
tmpdir = getenv("TMPDIR");
if (tmpdir == 0)
tmpdir = getenv("TEMP");
#ifdef __MINGW32__
if (tmpdir == 0)
tmpdir = "C:\\TEMP";
#else
if (tmpdir == 0)
tmpdir = "/tmp";
#endif
assert(tmpdir);
assert((strlen(tmpdir) + strlen(str)) < sizeof pathbuf - 10);
srand(getpid());
retry = 100;
file = NULL;
while ((retry > 0) && (file == NULL)) {
unsigned code = rand();
sprintf(pathbuf, "%s%c%s%04x", tmpdir, sep, str, code);
file = fopen_safe(pathbuf);
retry -= 1;
}
*fout = file;
return pathbuf;
}
/*
* This is the default target type. It looks up the bits that are
* needed to run the command from the configuration file (which is
@@ -99,6 +208,16 @@ static int t_default(char*cmd, unsigned ncmd)
tmp[2] = ' ';
rc = build_string(tmp+3, sizeof tmp - 3, pattern);
cmd = realloc(cmd, ncmd+3+rc+1);
#ifdef __MINGW32__
{
char *t;
for (t = tmp; *t; t++)
{
if (*t == '/') *t = '\\';
}
}
#endif
strcpy(cmd+ncmd, tmp);
@@ -107,7 +226,14 @@ static int t_default(char*cmd, unsigned ncmd)
rc = system(cmd);
remove(source_path);
remove(iconfig_path);
if (rc != 0) {
if (rc == 127) {
fprintf(stderr, "Failed to execute: %s\n", cmd);
return 1;
}
if (WIFEXITED(rc))
return WEXITSTATUS(rc);
@@ -118,130 +244,6 @@ static int t_default(char*cmd, unsigned ncmd)
return 0;
}
/*
* This function handles the vvm target. After preprocessing, run the
* ivl translator to get C++, then run g++ to make an executable
* program out of that.
*/
static int t_vvm(char*cmd, unsigned ncmd)
{
int rc;
const char*pattern = lookup_pattern("<ivl>");
if (pattern == 0) {
fprintf(stderr, "No such target: %s\n", targ);
return -1;
}
tmp[0] = ' ';
tmp[1] = '|';
tmp[2] = ' ';
rc = build_string(tmp+3, sizeof tmp - 3, pattern);
cmd = realloc(cmd, ncmd+3+rc+1);
strcpy(cmd+ncmd, tmp);
if (verbose_flag)
printf("translate: %s\n", cmd);
rc = system(cmd);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors translating Verilog program.\n");
return WEXITSTATUS(rc);
} else {
fprintf(stderr, "Command signaled: %s\n", cmd);
return -1;
}
}
sprintf(tmp, "%s " RDYNAMIC " -fno-exceptions -o %s -I%s "
"-L%s %s.cc -lvvm -lvpip %s", CXX, opath, IVL_INC, IVL_LIB,
opath, DLLIB);
if (verbose_flag)
printf("compile: %s\n", tmp);
rc = system(tmp);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors compiling translated program.\n");
return WEXITSTATUS(rc);
} else {
fprintf(stderr, "Command signaled: %s\n", tmp);
return -1;
}
}
sprintf(tmp, "%s.cc", opath);
unlink(tmp);
return 0;
}
static int t_xnf(char*cmd, unsigned ncmd)
{
int rc;
sprintf(tmp, " | %s/ivl %s -o %s -txnf -Fcprop -Fsynth -Fsyn-rules "
"-Fnodangle -Fxnfio", base, warning_flags, opath);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
if (f_list) {
rc = strlen(f_list);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, f_list);
ncmd += rc;
}
if (mtm) {
sprintf(tmp, " -T%s", mtm);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
}
if (npath) {
sprintf(tmp, " -N%s", npath);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
}
if (start) {
sprintf(tmp, " -s%s", start);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
}
sprintf(tmp, " -- -");
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
if (verbose_flag)
printf("translate: %s\n", cmd);
rc = system(cmd);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors translating Verilog program.\n");
return WEXITSTATUS(rc);
}
fprintf(stderr, "Command signaled: %s\n", cmd);
return -1;
}
return 0;
}
static void process_warning_switch(const char*name)
{
@@ -249,24 +251,175 @@ static void process_warning_switch(const char*name)
strcpy(warning_flags, "-W");
if (strcmp(name,"all") == 0) {
strcat(warning_flags, "i");
strcat(warning_flags, "it");
} else if (strcmp(name,"implicit") == 0) {
if (! strchr(warning_flags+2, 'i'))
strcat(warning_flags, "i");
} else if (strcmp(name,"timescale") == 0) {
if (! strchr(warning_flags+2, 't'))
strcat(warning_flags, "t");
} else if (strcmp(name,"no-implicit") == 0) {
char*cp = strchr(warning_flags+2, 'i');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-timescale") == 0) {
char*cp = strchr(warning_flags+2, 't');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
}
}
void process_library_switch(const char *name)
{
fprintf(iconfig_file, "-y:%s\n", name);
}
void process_library_nocase_switch(const char *name)
{
fprintf(iconfig_file, "-yl:%s\n", name);
}
void process_library2_switch(const char *name)
{
fprintf(iconfig_file, "-Y:%s\n", name);
}
void process_include_dir(const char *name)
{
if (inc_list == 0) {
inc_list = malloc(strlen(" -I")+strlen(name)+1);
strcpy(inc_list, " -I");
strcat(inc_list, name);
} else {
inc_list = realloc(inc_list, strlen(inc_list)
+ strlen(" -I")
+ strlen(name) + 1);
strcat(inc_list, " -I");
strcat(inc_list, name);
}
}
void process_define(const char*name)
{
if (def_list == 0) {
def_list = malloc(strlen(" -D")+strlen(name)+1);
strcpy(def_list, " -D");
strcat(def_list, name);
} else {
def_list = realloc(def_list, strlen(def_list)
+ strlen(" -D")
+ strlen(name) + 1);
strcat(def_list, " -D");
strcat(def_list, name);
}
}
void process_file_name(const char*name)
{
fprintf(source_file, "%s\n", name);
source_count += 1;
}
int process_generation(const char*name)
{
if (strcmp(name,"1") == 0)
generation = "-g1";
else if (strcmp(name,"2") == 0)
generation = "-g2";
else if (strcmp(name,"3.0") == 0)
generation = "-g3.0";
else {
fprintf(stderr, "Unknown/Unsupported Language generation "
"%s\n", name);
fprintf(stderr, "Supported generations are:\n");
fprintf(stderr, " 1 -- IEEE1364-1995 (Verilog 1)\n"
" 2 -- IEEE1364-2001 (Verilog 2001)\n"
" 3.0 -- SystemVerilog 3.0\n");
return 1;
}
return 0;
}
int main(int argc, char **argv)
{
const char*config_path = 0;
char*cmd;
unsigned ncmd;
int e_flag = 0;
int opt, idx;
int version_flag = 0;
int opt, idx, rc;
char*cp;
while ((opt = getopt(argc, argv, "B:C:c:D:Ef:hI:m:N::o:p:Ss:T:t:vW:")) != EOF) {
#ifdef __MINGW32__
{ char * s;
char basepath[1024];
GetModuleFileName(NULL,basepath,1024);
/* Calculate the ivl_root from the path to the command. This
is necessary because of the installation process in
Windows. Mostly, it is those darn drive letters, but oh
well. We know the command path is formed like this:
D:\iverilog\bin\iverilog.exe
The IVL_ROOT in a Windows installation is the path:
D:\iverilog\lib\ivl
so we chop the file name and the last directory by
turning the last two \ characters to null. Then we append
the lib\ivl to finish. */
strncpy(ivl_root, basepath, MAXSIZE);
s = strrchr(ivl_root, sep);
if (s) *s = 0;
s = strrchr(ivl_root, sep);
if (s) *s = 0;
strcat(ivl_root, "\\lib\\ivl");
base = ivl_root;
}
#else
/* In a UNIX environment, the IVL_ROOT from the Makefile is
dependable. It points to the $prefix/lib/ivl directory,
where the sub-parts are installed. */
strcpy(ivl_root, IVL_ROOT);
base = ivl_root;
#endif
/* Create a temporary file for communicating input parameters
to the preprocessor. */
source_path = strdup(my_tempfile("ivrlg", &source_file));
if (NULL == source_file) {
fprintf(stderr, "%s: Error opening temporary file %s\n",
argv[0], source_path);
fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
return 1;
}
/* Create another temporary file for passing configuration
information to ivl. */
iconfig_path = strdup(my_tempfile("ivrlh", &iconfig_file));
if (NULL == iconfig_file) {
fprintf(stderr, "%s: Error opening temporary file %s\n",
argv[0], iconfig_path);
fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
fclose(source_file);
remove(source_path);
return 1;
}
while ((opt = getopt(argc, argv, "B:C:c:D:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) {
switch (opt) {
case 'B':
@@ -277,20 +430,10 @@ int main(int argc, char **argv)
break;
case 'c':
command_filename = malloc(strlen(optarg)+1);
strcat(command_filename, optarg);
strcpy(command_filename, optarg);
break;
case 'D':
if (def_list == 0) {
def_list = malloc(strlen(" -D")+strlen(optarg)+1);
strcpy(def_list, " -D");
strcat(def_list, optarg);
} else {
def_list = realloc(def_list, strlen(def_list)
+ strlen(" -D")
+ strlen(optarg) + 1);
strcat(def_list, " -D");
strcat(def_list, optarg);
}
process_define(optarg);
break;
case 'E':
e_flag = 1;
@@ -311,23 +454,23 @@ int main(int argc, char **argv)
}
break;
case 'g':
rc = process_generation(optarg);
if (rc != 0)
return -1;
break;
case 'h':
fprintf(stderr, "%s\n", HELP);
return 1;
case 'I':
if (inc_list == 0) {
inc_list = malloc(strlen(" -I")+strlen(optarg)+1);
strcpy(inc_list, " -I");
strcat(inc_list, optarg);
} else {
inc_list = realloc(inc_list, strlen(inc_list)
+ strlen(" -I")
+ strlen(optarg) + 1);
strcat(inc_list, " -I");
strcat(inc_list, optarg);
}
process_include_dir(optarg);
break;
case 'M':
depfile = optarg;
break;
case 'm':
if (mod_list == 0) {
mod_list = malloc(strlen(" -m")+strlen(optarg)+1);
@@ -354,7 +497,18 @@ int main(int argc, char **argv)
synth_flag = 1;
break;
case 's':
start = optarg;
if (start) {
static const char *s = " -s ";
size_t l = strlen(start);
start = realloc(start, l + strlen(optarg) + strlen(s) + 1);
strcpy(start + l, s);
strcpy(start + l + strlen(s), optarg);
} else {
static const char *s = "-s ";
start = malloc(strlen(optarg) + strlen(s) + 1);
strcpy(start, s);
strcpy(start + strlen(s), optarg);
}
break;
case 'T':
if (strcmp(optarg,"min") == 0) {
@@ -375,16 +529,61 @@ int main(int argc, char **argv)
case 'v':
verbose_flag = 1;
break;
case 'V':
version_flag = 1;
break;
case 'W':
process_warning_switch(optarg);
break;
case 'y':
process_library_switch(optarg);
break;
case 'Y':
process_library2_switch(optarg);
break;
case '?':
default:
return 1;
}
}
if ((optind == argc) && !command_filename) {
if (version_flag || verbose_flag) {
printf("Icarus Verilog version " VERSION "\n");
printf("Copyright 1998-2002 Stephen Williams\n");
printf("$Name: $\n");
if (version_flag)
return 0;
}
if (command_filename) {
int rc;
if (( fp = fopen(command_filename, "r")) == NULL ) {
fprintf(stderr, "%s: Can't open %s\n",
argv[0], command_filename);
return 1;
}
cfreset(fp, command_filename);
rc = cfparse();
if (rc != 0) {
fprintf(stderr, "%s: error reading command file\n",
command_filename);
return 1;
}
}
/* Finally, process all the remaining words on the command
line as file names. */
for (idx = optind ; idx < argc ; idx += 1)
process_file_name(argv[idx]);
fclose(source_file);
source_file = 0;
if (source_count == 0) {
fprintf(stderr, "%s: No input files.\n", argv[0]);
fprintf(stderr, "%s\n", HELP);
return 1;
@@ -398,18 +597,22 @@ int main(int argc, char **argv)
if (config_path) {
strcpy(path, config_path);
} else {
sprintf(path, "%s/iverilog.conf", base);
sprintf(path, "%s%civerilog.conf", base,sep);
}
fd = fopen(path, "r");
if (fd == 0) {
fprintf(stderr, "Config file \"%s\" not found\n",path);
return 1;
}
reset_lexor(fd);
yyparse();
}
/* Start building the preprocess command line. */
sprintf(tmp, "%s/ivlpp %s%s", base,
sprintf(tmp, "%s%civlpp %s%s -D__ICARUS__=1 -f%s ", base,sep,
verbose_flag?" -v":"",
e_flag?"":" -L");
e_flag?"":" -L", source_path);
ncmd = strlen(tmp);
cmd = malloc(ncmd + 1);
@@ -427,55 +630,11 @@ int main(int argc, char **argv)
ncmd += strlen(def_list);
}
/* If user supplied a command file, retain its contents -- this
process supersedes command line source files. */
if (command_filename != 0) {
if (( fp = fopen(command_filename, "r")) == NULL ) {
fprintf(stderr, "%s: Can't open %s\n",
argv[0], command_filename);
return 1;
} else {
/* Process file and skip over commented-out lines.
Skips over c-like comment as well as '//' or
'#' lines. */
sprintf(tmp, "");
while (fgets(line, MAXSIZE, fp) != NULL) {
if ( strstr(line, "*/") != NULL ) {
inside_c_comment = 0;
continue;
}
if (inside_c_comment || (strstr(line, "/*") != NULL)) {
inside_c_comment = 1;
continue;
}
if ( (line[0] != '/' || line[1] != '/')
&& line[0] != '#' ) {
strcat (tmp, " ");
strncat (tmp, line, (strlen(line)-1));
}
}
fclose(fp);
}
cmd = realloc(cmd, ncmd+strlen(tmp)+1);
strcpy(cmd+ncmd, tmp);
ncmd += strlen(tmp);
} else {
/* Add all verilog source files to the preprocess
command line. */
for (idx = optind ; idx < argc ; idx += 1) {
sprintf(tmp, " %s", argv[idx]);
cmd = realloc(cmd, ncmd+strlen(tmp)+1);
strcpy(cmd+ncmd, tmp);
ncmd += strlen(tmp);
}
if (depfile) {
cmd = realloc(cmd, ncmd + strlen(depfile) + 5);
strcat(cmd, " -M ");
strcat(cmd, depfile);
ncmd += strlen(depfile) + 4;
}
/* If the -E flag was given on the command line, then all we
@@ -494,6 +653,10 @@ int main(int argc, char **argv)
printf("preprocess: %s\n", cmd);
rc = system(cmd);
remove(source_path);
fclose(iconfig_file);
remove(iconfig_path);
if (rc != 0) {
if (WIFEXITED(rc)) {
fprintf(stderr, "errors preprocessing Verilog program.\n");
@@ -507,42 +670,162 @@ int main(int argc, char **argv)
return 0;
}
if (strcmp(targ,"vvm") == 0)
return t_vvm(cmd, ncmd);
else if (strcmp(targ,"xnf") == 0)
return t_xnf(cmd, ncmd);
else {
return t_default(cmd, ncmd);
}
/* Write the preprocessor command needed to preprocess a
single file. This may be used to preprocess library
files. */
fprintf(iconfig_file, "ivlpp:%s%civlpp -D__ICARUS__ -L %s %s\n",
base, sep,
inc_list? inc_list : "",
def_list? def_list : "");
/* Done writing to the iconfig file. Close it now. */
fclose(iconfig_file);
return t_default(cmd, ncmd);
return 0;
}
/*
* $Log: main.c,v $
* Revision 1.50 2003/01/10 19:01:04 steve
* Only use libiberty.h if available.
*
* Revision 1.49 2002/12/04 03:26:59 steve
* Mingw32 compatible temp file management.
*
* Revision 1.48 2002/12/04 02:29:36 steve
* Use O_EXCL when opening temp files.
*
* Revision 1.47 2002/08/12 01:27:48 steve
* Escape the backslash in the windows file name.
*
* Revision 1.46 2002/08/10 22:36:59 steve
* No longer any nead for -rdynamic flag
*
* Revision 1.45 2002/08/10 22:27:13 steve
* Kill links to vvm.
*
* Revision 1.44 2002/07/15 00:33:50 steve
* Improve temporary file name guess.
*
* Revision 1.43 2002/07/14 23:32:31 steve
* No longer need the .exe on generated files.
*
* Revision 1.42 2002/07/14 23:11:35 steve
* Do temp file creation by hand.
*
* Revision 1.41 2002/05/28 20:40:37 steve
* ivl indexes the search path for libraries, and
* supports case insensitive module-to-file lookup.
*
* Revision 1.40 2002/05/28 02:25:03 steve
* Pass library paths through -Cfile instead of command line.
*
* Revision 1.39 2002/05/28 00:50:40 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*
* Revision 1.38 2002/05/27 23:14:06 steve
* Predefine __ICARUS__
*
* Revision 1.37 2002/05/24 01:13:00 steve
* Support language generation flag -g.
*
* Revision 1.36 2002/04/24 02:02:31 steve
* add -Wno- arguments to the driver.
*
* Revision 1.35 2002/04/15 00:04:23 steve
* Timescale warnings.
*
* Revision 1.34 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.33 2002/03/15 23:27:42 steve
* Patch to allow user to set place for temporary files.
*
* Revision 1.32 2002/02/03 07:05:37 steve
* Support print of version number.
*
* Revision 1.31 2001/11/21 02:20:34 steve
* Pass list of file to ivlpp via temporary file.
*
* Revision 1.30 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*
* Revision 1.29 2001/11/13 03:30:26 steve
* The +incdir+ plusarg can take multiple directores,
* and add initial support for +define+ in the command file.
*
* Revision 1.28 2001/11/12 18:47:32 steve
* Support +incdir in command files, and ignore other
* +args flags. Also ignore -a and -v flags.
*
* Revision 1.27 2001/11/12 01:26:36 steve
* More sophisticated command file parser.
*
* Revision 1.26 2001/11/11 00:10:05 steve
* Remov XNF dead wood.
*
* Revision 1.25 2001/10/23 00:37:30 steve
* The -s flag can now be repeated on the iverilog command.
*
* Revision 1.24 2001/10/20 23:02:40 steve
* Add automatic module libraries.
*
* Revision 1.23 2001/10/19 23:10:08 steve
* Fix memory fault with -c flag.
*
* Revision 1.22 2001/10/11 00:12:49 steve
* Detect execv failures.
*
* Revision 1.21 2001/07/25 03:10:50 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.20 2001/06/30 21:53:42 steve
* Make the vvp target the default.
*
* Revision 1.19 2001/06/30 04:23:02 steve
* Get include and lib paths right for mingw and vvm.
*
* Revision 1.18 2001/06/30 00:59:24 steve
* Redo the ivl_root calculator for mingw.
*
* Revision 1.17 2001/06/27 02:22:26 steve
* Get include and lib paths from Makefile.
*
* Revision 1.16 2001/06/20 02:25:40 steve
* Edit ivl_install_dir only on mingw
*
* Revision 1.15 2001/06/15 05:14:21 steve
* Fix library path calculation on non Windows systems
* to include the install directories. (Brendan Simon)
*
* Revision 1.14 2001/06/12 03:53:10 steve
* Change the VPI call process so that loaded .vpi modules
* use a function table instead of implicit binding.
*
* Revision 1.13 2001/05/20 18:22:02 steve
* Fix WIFEXITED macro.
*
* Revision 1.12 2001/05/20 18:06:57 steve
* local declares if the header is missing.
*
* Revision 1.11 2001/05/20 15:09:40 steve
* Mingw32 support (Venkat Iyer)
*
* Revision 1.10 2001/05/17 03:14:26 steve
* Update help message.
*
* Revision 1.9 2001/04/26 16:04:39 steve
* Handle missing or uninstalled .conf files.
*
* Revision 1.8 2001/02/01 17:12:22 steve
* Forgot to actually allow the -p flag.
*
* Revision 1.7 2001/01/20 19:02:05 steve
* Switch hte -f flag to the -p flag.
*
* Revision 1.6 2001/01/20 02:15:51 steve
* apologize for not supporting non-constant delays.
*
* Revision 1.5 2000/11/30 02:50:54 steve
* Add command file (-c) support from Nadim Shaikli.
*
* Revision 1.4 2000/10/28 17:28:16 steve
* Split vpip for everybody.
*
* Revision 1.3 2000/10/28 03:47:25 steve
* Use the conf file to generate the vvm ivl string.
*
* Revision 1.2 2000/10/28 03:45:47 steve
* Use the conf file to generate the vvm ivl string.
*
* Revision 1.1 2000/10/08 22:36:56 steve
* iverilog with an iverilog.conf configuration file.
*
*/
+7 -2
View File
@@ -18,11 +18,16 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: parse.y,v 1.2 2000/11/09 21:58:00 steve Exp $"
#ident "$Id: parse.y,v 1.5 2002/03/31 04:07:16 steve Exp $"
#endif
# include "config.h"
# include <stdio.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
# include <stdlib.h>
# include "globals.h"
@@ -127,7 +132,7 @@ const char*lookup_pattern(const char*key)
%%
start: section_list
start: section_list ;
section_list
: section
+112
View File
@@ -0,0 +1,112 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: substit.c,v 1.4 2002/08/12 01:35:01 steve Exp $"
#endif
# include <string.h>
# include <stdlib.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
char* substitutions(const char*str)
{
size_t nbuf = strlen(str) + 1;
char*buf = malloc(nbuf);
char*cp = buf;
while (*str) {
if ((str[0] == '$') && (str[1] == '(')) {
/* If I find a $(x) string in the source, replace
it in the destination with the contents of the
environment variable x. */
char*name;
char*value;
const char*ep = strchr(str, ')');
str += 2;
name = malloc(ep-str+1);
strncpy(name, str, ep-str);
name[ep-str] = 0;
str = ep + 1;
value = getenv(name);
free(name);
if (value == 0)
continue;
if (strlen(value) >= (nbuf - (cp-buf))) {
size_t old_size = cp - buf;
nbuf = (cp - buf) + strlen(value) + 1;
buf = realloc(buf, nbuf);
cp = buf + old_size;
}
strcpy(cp, value);
cp += strlen(cp);
} else {
if ( (cp - buf) == nbuf ) {
size_t old_size = nbuf;
nbuf = old_size + 32;
buf = realloc(buf, nbuf);
cp = buf + old_size;
}
*cp++ = *str++;
}
}
/* Add the trailing nul to the string, and reallocate the
buffer to be a tight fit. */
if ( (cp - buf) == nbuf ) {
size_t old_size = nbuf;
nbuf = old_size + 1;
buf = realloc(buf, nbuf);
buf[old_size] = 0;
} else {
*cp++ = 0;
nbuf = cp - buf;
buf = realloc(buf, nbuf);
}
return buf;
}
/*
* $Log: substit.c,v $
* Revision 1.4 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/08/11 23:47:04 steve
* Add missing Log and Ident strings.
*
* Revision 1.2 2002/06/25 01:33:01 steve
* include malloc.h only when available.
*
* Revision 1.1 2002/06/23 20:10:51 steve
* Variable substitution in command files.
*
*/
+82 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: dup_expr.cc,v 1.4 2000/05/07 18:20:07 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: dup_expr.cc,v 1.10 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include "netlist.h"
# include <cassert>
@@ -29,17 +31,93 @@ NetEScope* NetEScope::dup_expr() const
return 0;
}
NetESelect* NetESelect::dup_expr() const
{
return new NetESelect(expr_->dup_expr(), base_->dup_expr(),
expr_width());
}
NetESFunc* NetESFunc::dup_expr() const
{
NetESFunc*tmp = new NetESFunc(name_, expr_width(), nparms());
for (unsigned idx = 0 ; idx < nparms() ; idx += 1)
assert(tmp);
for (unsigned idx = 0 ; idx < nparms() ; idx += 1) {
assert(tmp->parm(idx));
tmp->parm(idx, tmp->parm(idx)->dup_expr());
}
return tmp;
}
NetESignal* NetESignal::dup_expr() const
{
NetESignal*tmp = new NetESignal(net_, msi_, lsi_);
assert(tmp);
tmp->expr_width(expr_width());
return tmp;
}
NetETernary* NetETernary::dup_expr() const
{
NetETernary*tmp = new NetETernary(cond_->dup_expr(),
true_val_->dup_expr(),
false_val_->dup_expr());
return tmp;
}
NetEUFunc* NetEUFunc::dup_expr() const
{
NetEUFunc*tmp;
svector<NetExpr*> tmp_parms (parms_.count());
for (unsigned idx = 0 ; idx < tmp_parms.count() ; idx += 1) {
assert(parms_[idx]);
tmp_parms[idx] = parms_[idx]->dup_expr();
}
tmp = new NetEUFunc(func_, result_->dup_expr(), tmp_parms);
return tmp;
}
NetEUnary* NetEUnary::dup_expr() const
{
NetEUnary*tmp = new NetEUnary(op_, expr_->dup_expr());
assert(tmp);
return tmp;
}
NetEVariable* NetEVariable::dup_expr() const
{
NetEVariable*tmp = new NetEVariable(var_);
return tmp;
}
/*
* $Log: dup_expr.cc,v $
* Revision 1.10 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.9 2002/11/09 00:25:27 steve
* Add dup_expr for user defined function calls.
*
* Revision 1.8 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.7 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.6 2001/11/19 01:54:14 steve
* Port close cropping behavior from mcrgb
* Move window array reset to libmc.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2000/05/07 18:20:07 steve
* Import MCD support from Stephen Tell, and add
* system function parameter support to the IVL core.
@@ -47,12 +125,5 @@ NetESFunc* NetESFunc::dup_expr() const
* Revision 1.3 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.2 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.1 1999/11/27 19:07:57 steve
* Support the creation of scopes.
*
*/
+19 -6
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_anet.cc,v 1.2 2001/01/06 02:29:36 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_anet.cc,v 1.5 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
/*
* The elaborate_anet methods elaborate expressions that are intended
* to be the left side of procedural continuous assignments.
@@ -102,10 +104,10 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
{
NetNet*sig = des->find_signal(scope, text_);
NetNet*sig = des->find_signal(scope, path_);
if (sig == 0) {
if (NetMemory*mem = des->find_memory(scope, text_)) {
if (NetMemory*mem = des->find_memory(scope, path_)) {
cerr << get_line() << ": error: memories not allowed "
<< "on left side of procedural continuous "
<< "asignment." << endl;
@@ -113,7 +115,7 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
return 0;
}
cerr << get_line() << ": error: reg ``" << text_ << "'' "
cerr << get_line() << ": error: reg ``" << path_ << "'' "
<< "is undefined in this scope." << endl;
des->errors += 1;
return 0;
@@ -125,7 +127,7 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
break;
default:
cerr << get_line() << ": error: " << text_ << " is not "
cerr << get_line() << ": error: " << path_ << " is not "
<< "a reg in this context." << endl;
des->errors += 1;
return 0;
@@ -147,6 +149,17 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
/*
* $Log: elab_anet.cc,v $
* Revision 1.5 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.3 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.2 2001/01/06 02:29:36 steve
* Support arrays of integers.
*
+411 -171
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,16 +16,19 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_expr.cc,v 1.36 2001/02/10 20:29:39 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_expr.cc,v 1.68 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include "pform.h"
# include "netlist.h"
# include "netmisc.h"
# include "util.h"
NetExpr* PExpr::elaborate_expr(Design*des, NetScope*) const
NetExpr* PExpr::elaborate_expr(Design*des, NetScope*, bool) const
{
cerr << get_line() << ": internal error: I do not know how to elaborate"
<< " expression. " << endl;
@@ -40,8 +43,11 @@ NetExpr* PExpr::elaborate_expr(Design*des, NetScope*) const
* and right sides, and creating one of a variety of different NetExpr
* types.
*/
NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope) const
NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope, bool) const
{
assert(left_);
assert(right_);
NetExpr*lp = left_->elaborate_expr(des, scope);
NetExpr*rp = right_->elaborate_expr(des, scope);
if ((lp == 0) || (rp == 0)) {
@@ -50,6 +56,7 @@ NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope) const
return 0;
}
/* If either expression can be evaluated ahead of time, then
do so. This can prove helpful later. */
{ NetExpr*tmp;
@@ -58,6 +65,7 @@ NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope) const
delete lp;
lp = tmp;
}
tmp = rp->eval_tree();
if (tmp) {
delete rp;
@@ -112,7 +120,8 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
case '^':
case '&':
case '|':
case 'O':
case 'O': // NOR (~|)
case 'A': // NAND (~&)
case 'X':
tmp = new NetEBBits(op_, lp, rp);
tmp->set_line(*this);
@@ -154,10 +163,62 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
*/
NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
{
/* Catch the special case that the system function is the
$signed function. This function is special, in that it does
not lead to executable code but takes the single parameter
and makes it into a signed expression. No bits are changed,
it just changes the interpretation. */
if (strcmp(path_.peek_name(0), "$signed") == 0) {
if ((parms_.count() != 1) || (parms_[0] == 0)) {
cerr << get_line() << ": error: The $signed() function "
<< "takes exactly one(1) argument." << endl;
des->errors += 1;
return 0;
}
PExpr*expr = parms_[0];
NetExpr*sub = expr->elaborate_expr(des, scope, true);
sub->cast_signed(true);
return sub;
}
/* Interpret the internal $sizeof system function to return
the bit width of the sub-expression. The value of the
sub-expression is not used, so the expression itself can be
deleted. */
if ((strcmp(path_.peek_name(0), "$sizeof") == 0)
|| (strcmp(path_.peek_name(0), "$bits") == 0)) {
if ((parms_.count() != 1) || (parms_[0] == 0)) {
cerr << get_line() << ": error: The $bits() function "
<< "takes exactly one(1) argument." << endl;
des->errors += 1;
return 0;
}
if (strcmp(path_.peek_name(0), "$sizeof") == 0)
cerr << get_line() << ": warning: $sizeof is deprecated."
<< " Use $bits() instead." << endl;
PExpr*expr = parms_[0];
NetExpr*sub = expr->elaborate_expr(des, scope, true);
verinum val (sub->expr_width(), 8*sizeof(unsigned));
delete sub;
sub = new NetEConst(val);
sub->set_line(*this);
return sub;
}
unsigned wid = 32;
if (name_ == "$time")
if (strcmp(path_.peek_name(0), "$time") == 0)
wid = 64;
if (strcmp(path_.peek_name(0), "$simtime") == 0)
wid = 64;
if (strcmp(path_.peek_name(0), "$stime") == 0)
wid = 32;
/* How many parameters are there? The Verilog language allows
@@ -172,7 +233,7 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
if ((nparms == 1) && (parms_[0] == 0))
nparms = 0;
NetESFunc*fun = new NetESFunc(name_, wid, nparms);
NetESFunc*fun = new NetESFunc(path_.peek_name(0), wid, nparms);
/* Now run through the expected parameters. If we find that
there are missing parameters, print an error message.
@@ -185,7 +246,7 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
for (unsigned idx = 0 ; idx < nparms ; idx += 1) {
PExpr*expr = parms_[idx];
if (expr) {
NetExpr*tmp1 = expr->elaborate_expr(des, scope);
NetExpr*tmp1 = expr->elaborate_expr(des, scope, true);
if (NetExpr*tmp2 = tmp1->eval_tree()) {
delete tmp1;
fun->parm(idx, tmp2);
@@ -200,7 +261,8 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
}
if (missing_parms > 0) {
cerr << get_line() << ": error: The function " << name_
cerr << get_line() << ": error: The function "
<< path_.peek_name(0)
<< " has been called with empty parameters." << endl;
cerr << get_line() << ": : Verilog doesn't allow "
<< "passing empty parameters to functions." << endl;
@@ -210,32 +272,32 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
return fun;
}
NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope) const
NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope, bool) const
{
if (name_[0] == '$')
if (path_.peek_name(0)[0] == '$')
return elaborate_sfunc_(des, scope);
NetFuncDef*def = des->find_function(scope, name_);
NetFuncDef*def = des->find_function(scope, path_);
if (def == 0) {
cerr << get_line() << ": error: No function " << name_ <<
cerr << get_line() << ": error: No function " << path_ <<
" in this context (" << scope->name() << ")." << endl;
des->errors += 1;
return 0;
}
assert(def);
NetScope*dscope = des->find_scope(def->name());
NetScope*dscope = def->scope();
assert(dscope);
/* How many parameters have I got? Normally the size of the
list is correct, but there is the special case of a list of
1 nil pointer. This is how the parser tells me of no
parameter. In other words, ``func()'' is 1 nil parameter. */
if (! check_call_matches_definition_(des, dscope))
return 0;
unsigned parms_count = parms_.count();
if ((parms_count == 1) && (parms_[0] == 0))
parms_count = 0;
svector<NetExpr*> parms (parms_count);
/* Elaborate the input expressions for the function. This is
@@ -256,7 +318,7 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope) const
}
if (missing_parms > 0) {
cerr << get_line() << ": error: The function " << name_
cerr << get_line() << ": error: The function " << path_
<< " has been called with empty parameters." << endl;
cerr << get_line() << ": : Verilog doesn't allow "
<< "passing empty parameters to functions." << endl;
@@ -267,12 +329,15 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope) const
/* Look for the return value signal for the called
function. This return value is a magic signal in the scope
of the function, that has the name of the function. The
function code assigns to this signal to return a value. */
function code assigns to this signal to return a value.
NetNet*res = des->find_signal(dscope, name_);
dscope, in this case, is the scope of the function, so the
return value is the name within that scope. */
NetNet*res = dscope->find_signal(dscope->basename());
if (res == 0) {
cerr << get_line() << ": internal error: Unable to locate "
"function return value for " << name_ << " in " <<
"function return value for " << path_ << " in " <<
def->name() << "." << endl;
des->errors += 1;
return 0;
@@ -281,14 +346,14 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope) const
assert(res);
NetESignal*eres = new NetESignal(res);
assert(eres);
NetEUFunc*func = new NetEUFunc(def, eres, parms);
NetEUFunc*func = new NetEUFunc(dscope, eres, parms);
return func;
}
NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope) const
NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope, bool) const
{
unsigned repeat = 1;
NetExpr* repeat = 0;
/* If there is a repeat expression, then evaluate the constant
value and set the repeat count. */
@@ -304,20 +369,21 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope) const
cerr << get_line() << ": : The expression is: "
<< *tmp << endl;
des->errors += 1;
return 0;
}
repeat = rep->value().as_ulong();
repeat = rep;
}
/* Make the empty concat expression. */
NetEConcat*tmp = new NetEConcat(parms_.count(), repeat);
tmp->set_line(*this);
unsigned wid_sum = 0;
/* Elaborate all the parameters and attach them to the concat node. */
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
assert(parms_[idx]);
NetExpr*ex = parms_[idx]->elaborate_expr(des, scope);
NetExpr*ex = elab_and_eval(des, scope, parms_[idx]);
if (ex == 0) continue;
ex->set_line(*parms_[idx]);
@@ -329,33 +395,160 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope) const
des->errors += 1;
}
wid_sum += ex->expr_width();
tmp->set(idx, ex);
}
tmp->set_width(wid_sum * tmp->repeat());
return tmp;
}
NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope) const
NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope, bool) const
{
long val = value_->as_long();
return new NetEConst(verinum(val));
NetECReal*tmp = new NetECReal(*value_);
tmp->set_line(*this);
return tmp;
}
NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
/*
* Elaborate an identifier in an expression. The identifier can be a
* parameter name, a signal name or a memory name. It can also be a
* scope name (Return a NetEScope) but only certain callers can use
* scope names. However, we still support it here.
*
* Function names are not handled here, they are detected by the
* parser and are elaborated by PECallFunction.
*
* The signal name may be escaped, but that affects nothing here.
*/
NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
bool sys_task_arg) const
{
assert(text_[0] != '$');
//string name = path+"."+text_;
assert(scope);
// If the identifier name is a parameter name, then return
// a reference to the parameter expression.
if (const NetExpr*ex = des->find_parameter(scope, text_)) {
if (const NetExpr*ex = des->find_parameter(scope, path_)) {
NetExpr*tmp;
if (dynamic_cast<const NetExpr*>(ex))
tmp = ex->dup_expr();
else
tmp = new NetEParam(des, scope, text_);
tmp = new NetEParam(des, scope, path_);
if (msb_ && lsb_) {
/* If the parameter has a part select, we support
it by pulling the right bits out and making a
sized unsigned constant. This code assumes the
lsb of a parameter is 0 and the msb is the
width of the parameter. */
verinum*lsn = lsb_->eval_const(des, scope);
verinum*msn = msb_->eval_const(des, scope);
if ((lsn == 0) || (msn == 0)) {
cerr << get_line() << ": error: "
"Part select expresions must be "
"constant expressions." << endl;
des->errors += 1;
return 0;
}
long lsb = lsn->as_long();
long msb = msn->as_long();
if ((lsb < 0) || (msb < lsb)) {
cerr << get_line() << ": error: invalid part "
<< "select: " << path_
<< "["<<msb<<":"<<lsb<<"]" << endl;
des->errors += 1;
return 0;
}
NetEConst*le = dynamic_cast<NetEConst*>(tmp);
assert(le);
verinum result (verinum::V0, msb-lsb+1, true);
verinum exl = le->value();
/* Pull the bits from the parameter, one at a
time. If the bit is within the range, simply
copy it to the result. If the bit is outside
the range, we sign extend signed unsized
numbers, zero extend unsigned unsigned numbers,
and X extend sized numbers. */
for (long idx = lsb ; idx <= msb ; idx += 1) {
if (idx < exl.len())
result.set(idx-lsb, exl.get(idx));
else if (exl.is_string())
result.set(idx-lsb, verinum::V0);
else if (exl.has_len())
result.set(idx-lsb, verinum::Vx);
else if (exl.has_sign())
result.set(idx-lsb, exl.get(exl.len()-1));
else
result.set(idx-lsb, verinum::V0);
}
/* If the input is a string, and the part select
is working on byte boundaries, then the result
can be made into a string. */
if (exl.is_string()
&& (lsb%8 == 0)
&& (result.len()%8 == 0))
result = verinum(result.as_string());
delete tmp;
tmp = new NetEConst(result);
} else if (msb_) {
/* Handle the case where a parameter has a bit
select attached to it. Generate a NetESelect
object to select the bit as desired. */
NetExpr*mtmp = msb_->elaborate_expr(des, scope);
if (! dynamic_cast<NetEConst*>(mtmp)) {
NetExpr*re = mtmp->eval_tree();
if (re) {
delete mtmp;
mtmp = re;
}
}
/* Let's first try to get constant values for both
the parameter and the bit select. If they are
both constant, then evaluate the bit select and
return instead a single-bit constant. */
NetEConst*le = dynamic_cast<NetEConst*>(tmp);
NetEConst*re = dynamic_cast<NetEConst*>(mtmp);
if (le && re) {
verinum lv = le->value();
verinum rv = re->value();
verinum::V rb = verinum::Vx;
long ridx = rv.as_long();
if ((ridx >= 0) && (ridx < lv.len())) {
rb = lv[ridx];
} else if ((ridx >= 0) && (!lv.has_len())) {
if (lv.has_sign())
rb = lv[lv.len()-1];
else
rb = verinum::V0;
}
NetEConst*re = new NetEConst(verinum(rb, 1));
delete tmp;
delete mtmp;
tmp = re;
} else {
NetESelect*stmp = new NetESelect(tmp, mtmp, 1);
tmp->set_line(*this);
tmp = stmp;
}
}
tmp->set_line(*this);
return tmp;
@@ -363,7 +556,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// If the identifier names a signal (a register or wire)
// then create a NetESignal node to handle it.
if (NetNet*net = des->find_signal(scope, text_)) {
if (NetNet*net = des->find_signal(scope, path_)) {
// If this is a part select of a signal, then make a new
// temporary signal that is connected to just the
@@ -371,8 +564,8 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// the foo[msb:lsb] expression in the original.
if (lsb_) {
assert(msb_);
verinum*lsn = lsb_->eval_const(des, scope->name());
verinum*msn = msb_->eval_const(des, scope->name());
verinum*lsn = lsb_->eval_const(des, scope);
verinum*msn = msb_->eval_const(des, scope);
if ((lsn == 0) || (msn == 0)) {
cerr << get_line() << ": error: "
"Part select expresions must be "
@@ -425,15 +618,9 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
return 0;
}
string tname = des->local_symbol(scope->name());
NetTmp*tsig = new NetTmp(scope, tname, wid);
// Connect the pins from the lsb up to the msb.
unsigned off = net->sb_to_idx(lsv);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(tsig->pin(idx), net->pin(idx+off));
NetESignal*tmp = new NetESignal(tsig);
NetESignal*tmp = new NetESignal(net,
net->sb_to_idx(msv),
net->sb_to_idx(lsv));
tmp->set_line(*this);
return tmp;
@@ -443,23 +630,30 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// to the part select, so that I save the effort of
// making a mux part in the netlist.
verinum*msn;
if (msb_ && (msn = msb_->eval_const(des, scope->name()))) {
if (msb_ && (msn = msb_->eval_const(des, scope))) {
assert(idx_ == 0);
unsigned long msv = msn->as_ulong();
unsigned idx = net->sb_to_idx(msv);
if (idx >= net->pin_count()) {
cerr << get_line() << ": internal error: "
<< "bit " << msv << " out of range of net "
/* The bit select is out of range of the
vector. This is legal, but returns a
constant 1'bx value. */
verinum x (verinum::Vx);
NetEConst*tmp = new NetEConst(x);
tmp->set_line(*this);
cerr << get_line() << ": warning: Bit select ["
<< msv << "] out of range of vector "
<< net->name() << "[" << net->msb()
<< ":" << net->lsb() << "]." << endl;
return 0;
cerr << get_line() << ": : Replacing "
<< "expression with a constant 1'bx." << endl;
delete msn;
return tmp;
}
string tname = des->local_symbol(scope->name());
NetTmp*tsig = new NetTmp(scope, tname);
connect(tsig->pin(0), net->pin(idx));
NetESignal*tmp = new NetESignal(tsig);
NetESignal*tmp = new NetESignal(net, idx, idx);
tmp->set_line(*this);
return tmp;
@@ -472,7 +666,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// device to mux the bit in the net.
if (msb_) {
NetExpr*ex = msb_->elaborate_expr(des, scope);
NetESubSignal*ss = new NetESubSignal(node, ex);
NetEBitSel*ss = new NetEBitSel(node, ex);
ss->set_line(*this);
return ss;
}
@@ -486,12 +680,25 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// If the identifier names a memory, then this is a
// memory reference and I must generate a NetEMemory
// object to handle it.
if (NetMemory*mem = des->find_memory(scope, text_)) {
if (NetMemory*mem = des->find_memory(scope, path_)) {
if (msb_ == 0) {
NetEMemory*node = new NetEMemory(mem);
node->set_line(*this);
return node;
// If this memory is an argument to a system task,
// then it is OK for it to not have an index.
if (sys_task_arg) {
NetEMemory*node = new NetEMemory(mem);
node->set_line(*this);
return node;
}
// If it is not a simple system task argument,
// this a missing index is an error.
cerr << get_line() << ": error: memory " << mem->name()
<< " needs an index in this context." << endl;
des->errors += 1;
return 0;
}
assert(msb_ != 0);
if (lsb_) {
cerr << get_line() << ": error: part select of a memory: "
@@ -504,7 +711,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
assert(idx_ == 0);
NetExpr*i = msb_->elaborate_expr(des, scope);
if (msb_ && i == 0) {
cerr << get_line() << ": error: Unable to exaborate "
cerr << get_line() << ": error: Unable to elaborate "
"index expression `" << *msb_ << "'" << endl;
des->errors += 1;
return 0;
@@ -515,8 +722,29 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
return node;
}
// Finally, if this is a scope name, then return that.
if (NetScope*nsc = des->find_scope(text_)) {
// If the identifier names a variable of some sort, then this
// is a variable reference.
if (NetVariable*var = des->find_variable(scope, path_)) {
NetEVariable*node = new NetEVariable(var);
node->set_line(*this);
return node;
}
// Finally, if this is a scope name, then return that. Look
// first to see if this is a name of a local scope. Failing
// that, search globally for a heirarchical name.
if ((path_.peek_name(1) == 0))
if (NetScope*nsc = scope->child(path_.peek_name(0))) {
NetEScope*tmp = new NetEScope(nsc);
tmp->set_line(*this);
return tmp;
}
// NOTE: This search pretty much assumes that text_ is a
// complete hierarchical name, since there is no mention of
// the current scope in the call to find_scope.
if (NetScope*nsc = des->find_scope(path_)) {
NetEScope*tmp = new NetEScope(nsc);
tmp->set_line(*this);
return tmp;
@@ -524,12 +752,12 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope) const
// I cannot interpret this identifier. Error message.
cerr << get_line() << ": error: Unable to bind wire/reg/memory "
"`" << text_ << "' in `" << scope->name() << "'" << endl;
"`" << path_ << "' in `" << scope->name() << "'" << endl;
des->errors += 1;
return 0;
}
NetEConst* PENumber::elaborate_expr(Design*des, NetScope*) const
NetEConst* PENumber::elaborate_expr(Design*des, NetScope*, bool) const
{
assert(value_);
NetEConst*tmp = new NetEConst(*value_);
@@ -537,7 +765,7 @@ NetEConst* PENumber::elaborate_expr(Design*des, NetScope*) const
return tmp;
}
NetEConst* PEString::elaborate_expr(Design*des, NetScope*) const
NetEConst* PEString::elaborate_expr(Design*des, NetScope*, bool) const
{
NetEConst*tmp = new NetEConst(value());
tmp->set_line(*this);
@@ -549,7 +777,7 @@ NetEConst* PEString::elaborate_expr(Design*des, NetScope*) const
* parsed so I can presume that they exist, and call elaboration
* methods. If any elaboration fails, then give up and return 0.
*/
NetETernary*PETernary::elaborate_expr(Design*des, NetScope*scope) const
NetETernary*PETernary::elaborate_expr(Design*des, NetScope*scope, bool) const
{
assert(expr_);
assert(tru_);
@@ -576,7 +804,7 @@ NetETernary*PETernary::elaborate_expr(Design*des, NetScope*scope) const
return res;
}
NetEUnary* PEUnary::elaborate_expr(Design*des, NetScope*scope) const
NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, bool) const
{
NetExpr*ip = expr_->elaborate_expr(des, scope);
if (ip == 0) return 0;
@@ -585,13 +813,72 @@ NetEUnary* PEUnary::elaborate_expr(Design*des, NetScope*scope) const
* just like in PEBinary::elaborate_expr() ?
*/
NetEUnary*tmp;
NetExpr*tmp;
switch (op_) {
default:
tmp = new NetEUnary(op_, ip);
tmp->set_line(*this);
break;
case '-':
if (NetEConst*ipc = dynamic_cast<NetEConst*>(ip)) {
/* When taking the - of a number, turn it into a
signed expression and extend it one bit to
accommodate a possible sign bit. */
verinum val = ipc->value();
verinum zero (verinum::V0, val.len()+1, val.has_len());
val = zero - val;
val.has_sign(true);
tmp = new NetEConst(val);
delete ip;
} else {
tmp = new NetEUnary(op_, ip);
tmp->set_line(*this);
}
break;
case '+':
tmp = ip;
break;
case '!': // Logical NOT
/* If the operand to unary ! is a constant, then I can
evaluate this expression here and return a logical
constant in its place. */
if (NetEConst*ipc = dynamic_cast<NetEConst*>(ip)) {
verinum val = ipc->value();
unsigned v1 = 0;
unsigned vx = 0;
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
switch (val[idx]) {
case verinum::V0:
break;
case verinum::V1:
v1 += 1;
break;
default:
vx += 1;
break;
}
verinum::V res;
if (v1 > 0)
res = verinum::V0;
else if (vx > 0)
res = verinum::Vx;
else
res = verinum::V1;
verinum vres (res, 1, true);
tmp = new NetEConst(vres);
tmp->set_line(*this);
delete ip;
} else {
tmp = new NetEUReduce(op_, ip);
tmp->set_line(*this);
}
break;
case '&': // Reduction AND
case '|': // Reduction OR
case '^': // Reduction XOR
@@ -601,134 +888,87 @@ NetEUnary* PEUnary::elaborate_expr(Design*des, NetScope*scope) const
tmp = new NetEUReduce(op_, ip);
tmp->set_line(*this);
break;
case '~':
tmp = new NetEUBits(op_, ip);
tmp->set_line(*this);
break;
}
return tmp;
}
/*
* $Log: elab_expr.cc,v $
* Revision 1.36 2001/02/10 20:29:39 steve
* In the context of range declarations, use elab_and_eval instead
* of the less robust eval_const methods.
* Revision 1.68 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.35 2001/02/09 05:44:23 steve
* support evaluation of constant < in expressions.
* Revision 1.67 2002/12/21 00:55:57 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*
* Revision 1.34 2001/01/14 23:04:55 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
* Revision 1.66 2002/09/21 21:28:18 steve
* Allow constant bit selects out of range.
*
* Allow parameters to be referenced by hierarchical name.
* Revision 1.65 2002/09/18 04:08:45 steve
* Spelling errors.
*
* Revision 1.33 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
* Revision 1.64 2002/09/12 15:49:43 steve
* Add support for binary nand operator.
*
* Revision 1.32 2001/01/02 04:21:13 steve
* Support a bunch of unary operators in parameter expressions.
* Revision 1.63 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.31 2000/12/10 22:01:35 steve
* Support decimal constants in behavioral delays.
* Revision 1.62 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.30 2000/11/29 05:24:00 steve
* synthesis for unary reduction ! and N operators.
* Revision 1.61 2002/06/14 21:38:41 steve
* Fix expression width for repeat concatenations.
*
* Revision 1.29 2000/09/26 05:05:58 steve
* Detect indefinite widths where definite widths are required.
* Revision 1.60 2002/05/24 00:44:54 steve
* Add support for $bits (SystemVerilog)
*
* Revision 1.28 2000/09/24 17:41:13 steve
* fix null pointer when elaborating undefined task.
* Revision 1.59 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.27 2000/08/26 01:31:29 steve
* Handle out of range part select expressions.
* Revision 1.58 2002/05/05 21:11:49 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Revision 1.26 2000/05/19 01:55:09 steve
* Catch part select of memories as an error.
* Add the builtin $signed system function.
*
* Revision 1.25 2000/05/07 18:20:07 steve
* Import MCD support from Stephen Tell, and add
* system function parameter support to the IVL core.
* Revision 1.57 2002/04/27 05:03:46 steve
* Preserve stringiness string part select and concatenation.
*
* Revision 1.24 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
* Revision 1.56 2002/04/27 02:38:04 steve
* Support selecting bits from parameters.
*
* Revision 1.23 2000/05/02 03:13:30 steve
* Move memories to the NetScope object.
* Revision 1.55 2002/04/25 05:04:31 steve
* Evaluate constant bit select of constants.
*
* Revision 1.22 2000/05/02 00:58:11 steve
* Move signal tables to the NetScope class.
* Revision 1.54 2002/04/14 21:16:48 steve
* Evaluate logical not at elaboration time.
*
* Revision 1.21 2000/04/28 18:43:23 steve
* integer division in expressions properly get width.
* Revision 1.53 2002/04/14 03:55:25 steve
* Precalculate unary - if possible.
*
* Revision 1.20 2000/03/29 04:06:28 steve
* Forgot to return elaborate result (Dan Nelsen)
* Revision 1.52 2002/04/13 02:33:17 steve
* Detect missing indices to memories (PR#421)
*
* Revision 1.19 2000/03/20 16:57:22 steve
* select correct bit when reg has non-zero lsb.
* Revision 1.51 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.18 2000/03/12 18:22:11 steve
* Binary and unary operators in parameter expressions.
*
* Revision 1.17 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.16 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.15 2000/01/13 03:35:35 steve
* Multiplication all the way to simulation.
*
* Revision 1.14 2000/01/01 06:18:00 steve
* Handle synthesis of concatenation.
*
* Revision 1.13 1999/12/12 06:03:14 steve
* Allow memories without indices in expressions.
*
* Revision 1.12 1999/11/30 04:54:01 steve
* Match scope names as last resort.
*
* Revision 1.11 1999/11/28 23:42:02 steve
* NetESignal object no longer need to be NetNode
* objects. Let them keep a pointer to NetNet objects.
*
* Revision 1.10 1999/11/27 19:07:57 steve
* Support the creation of scopes.
*
* Revision 1.9 1999/11/21 17:35:37 steve
* Memory name lookup handles scopes.
*
* Revision 1.8 1999/11/10 02:52:24 steve
* Create the vpiMemory handle type.
*
* Revision 1.7 1999/10/18 00:02:21 steve
* Catch unindexed memory reference.
*
* Revision 1.6 1999/09/30 02:43:02 steve
* Elaborate ~^ and ~| operators.
*
* Revision 1.5 1999/09/30 00:48:49 steve
* Cope with errors during ternary operator elaboration.
*
* Revision 1.4 1999/09/29 22:57:10 steve
* Move code to elab_expr.cc
*
* Revision 1.3 1999/09/25 02:57:30 steve
* Parse system function calls.
*
* Revision 1.2 1999/09/21 00:13:40 steve
* Support parameters that reference other paramters.
*
* Revision 1.1 1999/09/20 02:21:10 steve
* Elaborate parameters in phases.
* Revision 1.50 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.49 2002/01/11 05:25:45 steve
* The stime system function is 32bits.
*/
+159 -73
View File
@@ -16,13 +16,17 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_lval.cc,v 1.12 2001/02/09 03:16:48 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_lval.cc,v 1.25 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include "PExpr.h"
# include "netlist.h"
# include <iostream>
/*
* These methods generate a NetAssign_ object for the l-value of the
* assignemnt. This is common code for the = and <= statements.
@@ -63,17 +67,14 @@
*/
NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
{
NetNet*ll = elaborate_net(des, scope->name(), 0, 0, 0, 0);
NetNet*ll = 0;
if (ll == 0) {
cerr << get_line() << ": Assignment l-value too complex."
<< endl;
return 0;
}
NetAssign_*lv = new NetAssign_(scope->local_symbol(), ll->pin_count());
for (unsigned idx = 0 ; idx < ll->pin_count() ; idx += 1)
connect(lv->pin(idx), ll->pin(idx));
des->add_node(lv);
NetAssign_*lv = new NetAssign_(ll);
return lv;
}
@@ -102,6 +103,14 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
NetAssign_*res = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
if (parms_[idx] == 0) {
cerr << get_line() << ": error: Empty expressions "
<< "not allowed in concatenations." << endl;
des->errors += 1;
continue;
}
NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope);
/* If the l-value doesn't elaborate, the error was
@@ -112,42 +121,15 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
assert(tmp);
/* If adjacent l-values in the concatenation are not bit
selects, then merge them into a single NetAssign_
object.
If we cannot merge, then just link the new one to the
previous one. */
/* Link the new l-value to the previous one. */
if (res && (res->bmux() == 0) && (tmp->bmux() == 0)) {
unsigned wid1 = tmp->pin_count();
unsigned wid2 = res->pin_count() + tmp->pin_count();
NetAssign_*tmp2 = new NetAssign_(res->name(), wid2);
NetAssign_*last = tmp;
while (last->more)
last = last->more;
assert(tmp->more == 0);
tmp2->more = res->more;
res->more = 0;
for (unsigned idx = 0 ; idx < wid1 ; idx += 1)
connect(tmp2->pin(idx), tmp->pin(idx));
for (unsigned idx = 0 ; idx < res->pin_count() ; idx += 1)
connect(tmp2->pin(idx+wid1), res->pin(idx));
delete res;
delete tmp;
res = tmp2;
des->add_node(res);
} else {
NetAssign_*last = tmp;
while (last->more)
last = last->more;
last->more = res;
res = tmp;
}
last->more = res;
res = tmp;
}
return res;
@@ -156,30 +138,39 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
/*
* Handle the ident as an l-value. This includes bit and part selects
* of that ident.
*
* XXXX FIXME: The search order looks for signals all the way up the
* scope tree, then looks for memories then variables. It should be
* looking for signals, memories and variables in parallel.
*/
NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
{
/* Get the signal referenced by the identifier, and make sure
it is a register. (Wires are not allows in this context. */
NetNet*reg = des->find_signal(scope, name());
NetNet*reg = des->find_signal(scope, path_);
if (reg == 0) {
NetMemory*mem = des->find_memory(scope, name());
if (mem != 0) {
cerr << get_line() << ": sorry: I cannot handle "
<< "memories in this l-value context." << endl;
} else {
cerr << get_line() << ": error: Could not find variable ``"
<< name() << "'' in ``" << scope->name() <<
"''" << endl;
if (NetMemory*mem = des->find_memory(scope, path_)) {
return elaborate_mem_lval_(des, scope, mem);
}
if (NetVariable*var = des->find_variable(scope, path_)) {
NetAssign_*cur = new NetAssign_(var);
return cur;
}
cerr << get_line() << ": error: Could not find variable ``"
<< path_ << "'' in ``" << scope->name() <<
"''" << endl;
des->errors += 1;
return 0;
}
assert(reg);
/* Get the signal referenced by the identifier, and make sure
it is a register. (Wires are not allows in this context. */
if (reg->type() != NetNet::REG) {
cerr << get_line() << ": error: " << name() <<
cerr << get_line() << ": error: " << path_ <<
" is not a reg/integer/time in " << scope->name() <<
"." << endl;
des->errors += 1;
@@ -194,19 +185,23 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
two bit select expressions, and both must be
constant. Evaluate them and pass the results back to
the caller. */
verinum*vl = lsb_->eval_const(des, scope->name());
verinum*vl = lsb_->eval_const(des, scope);
if (vl == 0) {
cerr << lsb_->get_line() << ": error: "
"Part select expressions must be constant: "
<< *lsb_;
"Part select expressions must be constant."
<< endl;
cerr << lsb_->get_line() << ": : This lsb expression "
"violates the rule: " << *lsb_ << endl;
des->errors += 1;
return 0;
}
verinum*vm = msb_->eval_const(des, scope->name());
if (vl == 0) {
verinum*vm = msb_->eval_const(des, scope);
if (vm == 0) {
cerr << msb_->get_line() << ": error: "
"Part select expressions must be constant: "
<< *msb_;
"Part select expressions must be constant."
<< endl;
cerr << msb_->get_line() << ": : This msb expression "
"violates the rule: " << *msb_ << endl;
des->errors += 1;
return 0;
}
@@ -223,7 +218,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
expression it not constant, then return the
expression as a mux. */
assert(lsb_ == 0);
verinum*v = msb_->eval_const(des, scope->name());
verinum*v = msb_->eval_const(des, scope);
if (v == 0) {
NetExpr*m = msb_->elaborate_expr(des, scope);
assert(m);
@@ -255,13 +250,9 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
if (mux) {
/* If there is a non-constant bit select, make a
NetAssign_ the width of the target reg and attach a
NetAssign_ to the target reg and attach a
bmux to select the target bit. */
unsigned wid = reg->pin_count();
lv = new NetAssign_(des->local_symbol(scope->name()), wid);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(lv->pin(idx), reg->pin(idx));
lv = new NetAssign_(reg);
lv->set_bmux(mux);
@@ -274,8 +265,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
unsigned moff = reg->sb_to_idx(msb);
unsigned wid = moff - loff + 1;
lv = new NetAssign_(des->local_symbol(scope->name()), wid);
if (moff < loff) {
cerr << get_line() << ": error: part select "
<< reg->name() << "[" << msb<<":"<<lsb<<"]"
@@ -297,20 +286,117 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
return 0;
}
assert(moff < reg->pin_count());
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(lv->pin(idx), reg->pin(idx+loff));
lv = new NetAssign_(reg);
lv->set_part(loff, wid);
assert(moff < reg->pin_count());
}
des->add_node(lv);
return lv;
}
NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
NetMemory*mem) const
{
if (msb_ == 0) {
cerr << get_line() << ": error: Assign to memory \""
<< mem->name() << "\" requires a word select index."
<< endl;
des->errors += 1;
return 0;
}
if (msb_ && lsb_) {
cerr << get_line() << ": error: Cannot use part select on "
<< "memory \"" << mem->name() << ".\"" << endl;
des->errors += 1;
return 0;
}
assert(msb_ && !lsb_);
NetExpr*ix = msb_->elaborate_expr(des, scope);
if (ix == 0)
return 0;
/* Evaluate the memory index expression down as must as
possible. Ideally, we can get it down to a constant. */
if (! dynamic_cast<NetEConst*>(ix)) {
NetExpr*tmp = ix->eval_tree();
if (tmp) {
tmp->set_line(*ix);
delete ix;
ix = tmp;
}
}
NetAssign_*lv = new NetAssign_(mem);
lv->set_bmux(ix);
lv->set_part(0, mem->width());
return lv;
}
NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
{
cerr << get_line() << ": error: Constant values not allowed "
<< "in l-value expressions." << endl;
des->errors += 1;
return 0;
}
/*
* $Log: elab_lval.cc,v $
* Revision 1.25 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.24 2003/01/19 00:35:39 steve
* Detect null arguments to concatenation operator.
*
* Revision 1.23 2002/11/21 23:27:51 steve
* Precalculate indices to l-value arrays.
*
* Revision 1.22 2002/11/21 18:15:40 steve
* Fix const test of msb in assignment l-values.
*
* Revision 1.21 2002/11/02 01:10:49 steve
* Detect memories without work index in l-value.
*
* Revision 1.20 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.19 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.18 2002/03/09 04:02:26 steve
* Constant expressions are not l-values for task ports.
*
* Revision 1.17 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.16 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.15 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.14 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.13 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.12 2001/02/09 03:16:48 steve
* Report bit/part select out of range errors. (PR#133)
*
+741 -514
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File diff suppressed because it is too large Load Diff
+89 -22
View File
@@ -16,13 +16,17 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_pexpr.cc,v 1.8 2001/01/14 23:04:56 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_pexpr.cc,v 1.18 2002/12/05 02:14:33 steve Exp $"
#endif
# include "config.h"
# include "PExpr.h"
# include "util.h"
# include <iostream>
NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*sc) const
{
cerr << get_line() << ": error: invalid parameter expression: "
@@ -62,28 +66,21 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
*/
NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
{
unsigned repeat = 1;
NetExpr* repeat = 0;
/* If there is a repeat expression, then evaluate the constant
value and set the repeat count.
XXXX Potential bug XXX In principle, the repeat expression
can have a parameter name in it. Since where are in the
working of parameters now, we will not be able to
accurately evaluate such expressions. So eventually, I will
need to be able to defer the evaluation of the expression. */
value and set the repeat count. */
if (repeat_) {
verinum*vrep = repeat_->eval_const(des, scope->name());
if (vrep == 0) {
repeat = repeat_->elaborate_pexpr(des, scope);
if (repeat == 0) {
cerr << get_line() << ": error: "
"concatenation repeat expression cannot be evaluated."
<< endl;
des->errors += 1;
return 0;
}
repeat = vrep->as_ulong();
delete vrep;
/* continue on even if the repeat expression doesn't
work, as we can find more errors. */
}
/* Make the empty concat expression. */
@@ -97,7 +94,22 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
assert(parms_[idx]);
NetExpr*ex = parms_[idx]->elaborate_pexpr(des, scope);
if (ex == 0) continue;
ex->set_line(*parms_[idx]);
if (dynamic_cast<NetEParam*>(ex)) {
/* If this parameter is a NetEParam, then put off
the width check for later. */
} else if (! ex->has_width()) {
cerr << ex->get_line() << ": error: operand of "
<< "concatenation has indefinite width: "
<< *ex << endl;
des->errors += 1;
}
tmp->set(idx, ex);
}
@@ -117,25 +129,42 @@ NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
*/
NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
{
string path = text_;
string name = parse_last_name(path);
hname_t path = path_;
char*name = path.remove_tail_name();
NetScope*pscope = scope;
if (path != "")
if (path.peek_name(0))
pscope = des->find_scope(scope, path);
assert(pscope);
const NetExpr*ex = pscope->get_parameter(name);
if (ex == 0) {
cerr << get_line() << ": error: identifier ``" << text_ <<
cerr << get_line() << ": error: identifier ``" << path_ <<
"'' is not a parameter in " << scope->name() << "." << endl;
des->errors += 1;
delete name;
return 0;
}
NetExpr*res = new NetEParam(des, pscope, name);
NetExpr*res = new NetEParam(des, pscope, hname_t(name));
assert(res);
delete name;
assert(idx_ == 0);
if (msb_ && lsb_) {
cerr << get_line() << ": sorry: Cannot part select "
"bits of parameters." << endl;
des->errors += 1;
} else if (msb_) {
/* We have here a bit select. Insert a NetESelect node
to handle it. */
NetExpr*tmp = msb_->elaborate_pexpr(des, scope);
if (tmp != 0) {
res = new NetESelect(res, tmp, 1);
}
}
return res;
}
@@ -199,6 +228,44 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
/*
* $Log: elab_pexpr.cc,v $
* Revision 1.18 2002/12/05 02:14:33 steve
* Support bit select in constant expressions.
*
* Revision 1.17 2002/11/09 01:40:19 steve
* Postpone parameter width check to evaluation.
*
* Revision 1.16 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.14 2002/05/05 21:11:50 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.13 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.11 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.10 2001/10/07 03:38:08 steve
* parameter names do not have defined size.
*
* Revision 1.9 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.8 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
+136 -31
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_scope.cc,v 1.7 2000/12/16 01:45:48 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_scope.cc,v 1.18 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include <iostream>
/*
* Elaboration happens in two passes, generally. The first scans the
* pform to generate the NetScope tree and attach it to the Design
@@ -28,6 +32,7 @@
*/
# include "Module.h"
# include "PData.h"
# include "PEvent.h"
# include "PExpr.h"
# include "PGate.h"
@@ -36,6 +41,7 @@
# include "Statement.h"
# include "netlist.h"
# include <typeinfo>
# include <assert.h>
bool Module::elaborate_scope(Design*des, NetScope*scope) const
{
@@ -50,7 +56,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// the pform and just place a NetEParam placeholder in the
// place of the elaborated expression.
typedef map<string,PExpr*>::const_iterator mparm_it_t;
typedef map<string,param_expr_t>::const_iterator mparm_it_t;
typedef map<hname_t,PExpr*>::const_iterator hparm_it_t;
// This loop scans the parameters in the module, and creates
@@ -59,13 +66,21 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
for (mparm_it_t cur = parameters.begin()
; cur != parameters.end() ; cur ++) {
scope->set_parameter((*cur).first, new NetEParam);
NetEParam*tmp = new NetEParam;
if ((*cur).second.msb)
tmp->cast_signed( (*cur).second.signed_flag );
scope->set_parameter((*cur).first, tmp, 0, 0, false);
}
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
scope->set_parameter((*cur).first, new NetEParam);
NetEParam*tmp = new NetEParam;
if ((*cur).second.msb)
tmp->cast_signed( (*cur).second.signed_flag );
scope->set_parameter((*cur).first, tmp, 0, 0, false);
}
@@ -77,11 +92,29 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
for (mparm_it_t cur = parameters.begin()
; cur != parameters.end() ; cur ++) {
PExpr*ex = (*cur).second;
PExpr*ex = (*cur).second.expr;
assert(ex);
NetExpr*val = ex->elaborate_pexpr(des, scope);
val = scope->set_parameter((*cur).first, val);
NetExpr*msb = 0;
NetExpr*lsb = 0;
bool signed_flag = false;
/* If the parameter declaration includes msb and lsb,
then use them to calculate a width for the
result. Then make sure the constant expression of the
parameter value is coerced to have the correct
and defined width. */
if ((*cur).second.msb) {
msb = (*cur).second.msb ->elaborate_pexpr(des, scope);
assert(msb);
lsb = (*cur).second.lsb ->elaborate_pexpr(des, scope);
signed_flag = (*cur).second.signed_flag;
}
val->cast_signed(signed_flag);
val = scope->set_parameter((*cur).first, val,
msb, lsb, signed_flag);
assert(val);
delete val;
}
@@ -89,11 +122,11 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
PExpr*ex = (*cur).second;
PExpr*ex = (*cur).second.expr;
assert(ex);
NetExpr*val = ex->elaborate_pexpr(des, scope);
val = scope->set_parameter((*cur).first, val);
val = scope->set_parameter((*cur).first, val, 0, 0, false);
assert(val);
delete val;
}
@@ -108,7 +141,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// here becuase the parameter receiving the assignment may be
// in a scope not discovered by this pass.
for (mparm_it_t cur = defparms.begin()
for (hparm_it_t cur = defparms.begin()
; cur != defparms.end() ; cur ++ ) {
PExpr*ex = (*cur).second;
@@ -130,7 +163,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
for (tasks_it_t cur = tasks_.begin()
; cur != tasks_.end() ; cur ++ ) {
NetScope*task_scope = new NetScope(scope, (*cur).first,
NetScope*task_scope = new NetScope(scope, (*cur).first.c_str(),
NetScope::TASK);
(*cur).second->elaborate_scope(des, task_scope);
}
@@ -145,7 +178,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
for (funcs_it_t cur = funcs_.begin()
; cur != funcs_.end() ; cur ++ ) {
NetScope*func_scope = new NetScope(scope, (*cur).first,
NetScope*func_scope = new NetScope(scope, (*cur).first.c_str(),
NetScope::FUNC);
(*cur).second->elaborate_scope(des, func_scope);
}
@@ -186,21 +219,32 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
(*et).second->elaborate_scope(des, scope);
}
for (map<string,PData*>::const_iterator cur = datum.begin()
; cur != datum.end() ; cur ++ ) {
(*cur).second->elaborate_scope(des, scope);
}
return des->errors == 0;
}
void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
{
if (get_name() == "") {
cerr << get_line() << ": error: Instantiation of module "
<< mod->mod_name() << " requires an instance name." << endl;
des->errors += 1;
return;
}
// Missing module instance names have already been rejected.
assert(get_name() != "");
string path = sc->name();
// Check for duplicate scopes. Simply look up the scope I'm
// about to create, and if I find it then somebody beat me to
// it.
if (NetScope*tmp = des->find_scope(path + "." + get_name())) {
if (NetScope*tmp = sc->child(get_name())) {
cerr << get_line() << ": error: Instance/Scope name " <<
get_name() << " already used in this context." <<
endl;
@@ -216,11 +260,11 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
if (scn->type() != NetScope::MODULE)
continue;
if (mod->get_name() != scn->module_name())
if (strcmp(mod->mod_name(), scn->module_name()) != 0)
continue;
cerr << get_line() << ": error: You cannot instantiate "
<< "module " << mod->get_name() << " within itself." << endl;
<< "module " << mod->mod_name() << " within itself." << endl;
cerr << get_line() << ": : The offending instance is "
<< sc->name() << "." << get_name() << " within "
@@ -231,8 +275,8 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
}
// Create the new scope as a MODULE with my name.
NetScope*my_scope = new NetScope(sc, get_name(), NetScope::MODULE);
my_scope->set_module_name(mod->get_name().c_str());
NetScope*my_scope = new NetScope(sc, get_name().c_str(), NetScope::MODULE);
my_scope->set_module_name(mod->mod_name());
// Set time units and precision.
my_scope->time_unit(mod->time_unit);
@@ -246,8 +290,10 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
// later.)
mod->elaborate_scope(des, my_scope);
// Look for module parameter replacements. This map receives
// those replacements.
// Look for module parameter replacements. The "replace" map
// maps parameter name to replacement expression that is
// passed. It is built up by the ordered overrices or named
// overrides.
typedef map<string,PExpr*>::const_iterator mparm_it_t;
map<string,PExpr*> replace;
@@ -261,12 +307,18 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
if (overrides_) {
assert(parms_ == 0);
list<string>::const_iterator cur = mod->param_names.begin();
for (unsigned idx = 0
; idx < overrides_->count()
; idx += 1, cur++) {
replace[*cur] = (*overrides_)[idx];
}
unsigned idx = 0;
for (;;) {
if (idx >= overrides_->count())
break;
if (cur == mod->param_names.end())
break;
replace[*cur] = (*overrides_)[idx];
idx += 1;
cur ++;
}
}
// Named parameter overrides carry a name with each override
@@ -288,16 +340,29 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
PExpr*tmp = (*cur).second;
NetExpr*val = tmp->elaborate_pexpr(des, sc);
val = my_scope->set_parameter((*cur).first, val);
assert(val);
delete val;
bool flag = my_scope->replace_parameter((*cur).first, val);
if (! flag) {
cerr << val->get_line() << ": warning: parameter "
<< (*cur).first << " not found in "
<< sc->name() << "." << endl;
}
}
}
void PData::elaborate_scope(Design*des, NetScope*scope) const
{
assert(hname_.component_count() == 1);
NetVariable*tmp = new NetVariable(hname_.peek_tail_name());
tmp->set_line(*this);
scope->add_variable(tmp);
}
/*
* The isn't really able to create new scopes, but it does create the
* event name in the current scope, so can be done during the
* elaborate_scope scan.
* elaborate_scope scan. Note that the name_ of the PEvent object has
* no hierarchy, but neither does the NetEvent, until it is stored in
* the NetScope object.
*/
void PEvent::elaborate_scope(Design*des, NetScope*scope) const
{
@@ -313,6 +378,9 @@ void PFunction::elaborate_scope(Design*des, NetScope*scope) const
void PTask::elaborate_scope(Design*des, NetScope*scope) const
{
assert(scope->type() == NetScope::TASK);
if (statement_)
statement_->elaborate_scope(des, scope);
}
@@ -335,7 +403,7 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
NetScope*my_scope = scope;
if (name_ != "") {
my_scope = new NetScope(scope, name_, bl_type_==BL_PAR
my_scope = new NetScope(scope, name_.c_str(), bl_type_==BL_PAR
? NetScope::FORK_JOIN
: NetScope::BEGIN_END);
}
@@ -444,6 +512,43 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
/*
* $Log: elab_scope.cc,v $
* Revision 1.18 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.17 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.16 2002/09/01 03:01:48 steve
* Properly cast signedness of parameters with ranges.
*
* Revision 1.15 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.14 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2001/12/30 04:47:57 steve
* Properly handle empty target in positionla parameter override.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.11 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.10 2001/10/09 02:01:04 steve
* Tasks can have sub-scopes.
*
* Revision 1.9 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.8 2001/04/28 23:18:08 steve
* UDP instances need not have user supplied names.
*
* Revision 1.7 2000/12/16 01:45:48 steve
* Detect recursive instantiations (PR#2)
*
+196 -39
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_sig.cc,v 1.12 2001/02/17 05:15:33 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_sig.cc,v 1.25 2002/08/12 01:34:59 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "Module.h"
# include "PExpr.h"
# include "PGate.h"
@@ -35,7 +39,7 @@
* within the port_t that have a matching name.
*/
static bool signal_is_in_port(const svector<Module::port_t*>&ports,
const string&name)
const hname_t&name)
{
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
@@ -49,7 +53,7 @@ static bool signal_is_in_port(const svector<Module::port_t*>&ports,
// together that form the port.
for (unsigned cc = 0 ; cc < pp->expr.count() ; cc += 1) {
assert(pp->expr[cc]);
if (pp->expr[cc]->name() == name)
if (pp->expr[cc]->path() == name)
return true;
}
}
@@ -63,24 +67,62 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
// Get all the explicitly declared wires of the module and
// start the signals list with them.
const map<string,PWire*>&wl = get_wires();
const map<hname_t,PWire*>&wl = get_wires();
for (map<string,PWire*>::const_iterator wt = wl.begin()
// Scan all the ports of the module, and make sure that each
// is connected to wires that have port declarations.
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
Module::port_t*pp = ports[idx];
if (pp == 0)
continue;
map<hname_t,PWire*>::const_iterator wt;
for (unsigned cc = 0 ; cc < pp->expr.count() ; cc += 1) {
hname_t port_path (pp->expr[cc]->path());
wt = wl.find(port_path);
if (wt == wl.end()) {
cerr << get_line() << ": error: "
<< "Port " << pp->expr[cc]->path() << " ("
<< (idx+1) << ") of module " << name_
<< " is not declared within module." << endl;
des->errors += 1;
continue;
}
if ((*wt).second->get_port_type() == NetNet::NOT_A_PORT) {
cerr << get_line() << ": error: "
<< "Port " << pp->expr[cc]->path() << " ("
<< (idx+1) << ") of module " << name_
<< " has no direction declaration."
<< endl;
des->errors += 1;
}
}
}
for (map<hname_t,PWire*>::const_iterator wt = wl.begin()
; wt != wl.end()
; wt ++ ) {
PWire*cur = (*wt).second;
cur->elaborate_sig(des, scope);
NetNet*sig = scope->find_signal_in_child(cur->path());
// If this wire is a signal of the module (as opposed to
// a port of a function) and is a port, then check that
// the module knows about it.
NetNet*sig = scope->find_signal(cur->name());
// the module knows about it. We know that the signal is
// the name of a signal within a subscope of a module
// (a task, a function, etc.) if the name for the PWire
// has hierarchy.
if (sig && (sig->scope() == scope)
&& (cur->get_port_type() != NetNet::NOT_A_PORT)) {
string name = (*wt).first;
if (! signal_is_in_port(ports_, name)) {
hname_t name = (*wt).first;
if (! signal_is_in_port(ports, name)) {
cerr << cur->get_line() << ": error: Signal "
<< name << " has a declared direction "
@@ -88,6 +130,33 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
des->errors += 1;
}
}
/* If the signal is an input and is also declared as a
reg, then report an error. */
if (sig && (sig->scope() == scope)
&& (sig->port_type() == NetNet::PINPUT)
&& (sig->type() == NetNet::REG)) {
cerr << cur->get_line() << ": error: "
<< cur->path() << " in module "
<< scope->module_name()
<< " declared as input and as a reg type." << endl;
des->errors += 1;
}
if (sig && (sig->scope() == scope)
&& (sig->port_type() == NetNet::PINOUT)
&& (sig->type() == NetNet::REG)) {
cerr << cur->get_line() << ": error: "
<< cur->path() << " in module "
<< scope->module_name()
<< " declared as inout and as a reg type." << endl;
des->errors += 1;
}
}
// Get all the gates of the module and elaborate them by
@@ -168,6 +237,17 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
string fname = scope->basename();
assert(scope->type() == NetScope::FUNC);
/* Make sure the function has at least one input port. If it
fails this test, print an error message. Keep going so we
can find more errors. */
if (ports_ == 0) {
cerr << get_line() << ": error: Function " << fname
<< " has no ports." << endl;
cerr << get_line() << ": : Functions must have"
<< " at least one input port." << endl;
des->errors += 1;
}
svector<NetNet*>ports (ports_? ports_->count()+1 : 1);
/* Get the reg for the return value. I know the name of the
@@ -190,12 +270,13 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
name. We know by design that the port name is given
as two components: <func>.<port>. */
string pname = (*ports_)[idx]->name();
string ppath = parse_first_name(pname);
hname_t path = (*ports_)[idx]->path();
string pname = path.peek_name(1);
string ppath = path.peek_name(0);
if (ppath != scope->basename()) {
cerr << get_line() << ": internal error: function "
<< "port " << (*ports_)[idx]->name()
<< "port " << (*ports_)[idx]->path()
<< " has wrong name for function "
<< scope->name() << "." << endl;
des->errors += 1;
@@ -238,16 +319,15 @@ void PTask::elaborate_sig(Design*des, NetScope*scope) const
name. We know by design that the port name is given
as two components: <task>.<port>. */
string pname = (*ports_)[idx]->name();
string ppath = parse_first_name(pname);
assert(pname != "");
hname_t path = (*ports_)[idx]->path();
assert(path.peek_name(0) && path.peek_name(1));
/* check that the current scope really does have the
name of the first component of the task port name. Do
this by looking up the task scope in the parent of
the current scope. */
if (scope->parent()->child(ppath) != scope) {
cerr << "internal error: task scope " << ppath
if (scope->parent()->child(path.peek_name(0)) != scope) {
cerr << "internal error: task scope " << path
<< " not the same as scope " << scope->name()
<< "?!" << endl;
return;
@@ -256,11 +336,11 @@ void PTask::elaborate_sig(Design*des, NetScope*scope) const
/* Find the signal for the port. We know by definition
that it is in the scope of the task, so look only in
the scope. */
NetNet*tmp = scope->find_signal(pname);
NetNet*tmp = scope->find_signal(path.peek_name(1));
if (tmp == 0) {
cerr << get_line() << ": internal error: "
<< "Could not find port " << pname
<< "Could not find port " << path.peek_name(1)
<< " in scope " << scope->name() << endl;
scope->dump(cerr);
}
@@ -289,19 +369,14 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
/* The parser may produce hierarchical names for wires. I here
follow the scopes down to the base where I actually want to
elaborate the NetNet object. */
string basename = name_;
for (;;) {
string p = parse_first_name(basename);
if (basename == "") {
basename = p;
break;
}
scope = scope->child(p);
assert(scope);
{ hname_t tmp_path = hname_;
free(tmp_path.remove_tail_name());
for (unsigned idx = 0 ; tmp_path.peek_name(idx) ; idx += 1) {
scope = scope->child(tmp_path.peek_name(idx));
assert(scope);
}
}
const string path = scope->name();
NetNet::Type wtype = type_;
if (wtype == NetNet::IMPLICIT)
wtype = NetNet::WIRE;
@@ -315,6 +390,10 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
if (msb_.count()) {
svector<long>mnum (msb_.count());
svector<long>lnum (msb_.count());
/* There may be places where the signal is declared as a
scaler. Count those here, for consistency check
later. */
unsigned count_scalars = 0;
/* There may be multiple declarations of ranges, because
the symbol may have its range declared in i.e. input
@@ -323,6 +402,14 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
for (unsigned idx = 0 ; idx < msb_.count() ; idx += 1) {
if (msb_[idx] == 0) {
count_scalars += 1;
assert(lsb_[idx] == 0);
mnum[idx] = 0;
lnum[idx] = 0;
continue;
}
NetEConst*tmp;
NetExpr*texpr = elab_and_eval(des, scope, msb_[idx]);
@@ -353,6 +440,18 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
}
/* Check that the declarations were all scalar or all
vector. It is an error to mix them. Use the
count_scalars to know. */
if ((count_scalars > 0) && (count_scalars != msb_.count())) {
cerr << get_line() << ": error: Signal ``" << hname_
<< "'' declared both as a vector and a scalar."
<< endl;
des->errors += 1;
return;
}
/* Make sure all the values for msb and lsb match by
value. If not, report an error. */
for (unsigned idx = 1 ; idx < msb_.count() ; idx += 1) {
@@ -360,7 +459,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
cerr << get_line() << ": error: Inconsistent width, "
"[" << mnum[idx] << ":" << lnum[idx] << "]"
" vs. [" << mnum[0] << ":" << lnum[0] << "]"
" for signal ``" << basename << "''" << endl;
" for signal ``" << hname_ << "''" << endl;
des->errors += 1;
return;
}
@@ -376,18 +475,22 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
}
unsigned nattrib = 0;
attrib_list_t*attrib_list = evaluate_attributes(attributes, nattrib,
des, scope);
if (lidx_ || ridx_) {
assert(lidx_ && ridx_);
// If the register has indices, then this is a
// memory. Create the memory object.
verinum*lval = lidx_->eval_const(des, path);
verinum*rval = ridx_->eval_const(des, path);
verinum*lval = lidx_->eval_const(des, scope);
verinum*rval = ridx_->eval_const(des, scope);
if ((lval == 0) || (rval == 0)) {
cerr << get_line() << ": internal error: There is "
<< "a problem evaluating indices for ``"
<< basename << "''." << endl;
<< hname_.peek_tail_name() << "''." << endl;
des->errors += 1;
return;
}
@@ -395,25 +498,79 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
assert(lval);
assert(rval);
string name = hname_.peek_tail_name();
long lnum = lval->as_long();
long rnum = rval->as_long();
delete lval;
delete rval;
NetMemory*sig = new NetMemory(scope, path+"."+basename,
wid, lnum, rnum);
NetMemory*sig = new NetMemory(scope, name, wid, lnum, rnum);
} else {
NetNet*sig = new NetNet(scope, path + "." +basename, wtype, msb, lsb);
/* Make a hierarchical make for the signal. */
string name = scope->name();
name = name + "." + hname_.peek_tail_name();
NetNet*sig = new NetNet(scope, name, wtype, msb, lsb);
sig->set_line(*this);
sig->port_type(port_type_);
sig->set_signed(get_signed());
sig->set_attributes(attributes);
sig->set_isint(get_isint());
for (unsigned idx = 0 ; idx < nattrib ; idx += 1)
sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
}
}
/*
* $Log: elab_sig.cc,v $
* Revision 1.25 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.24 2002/08/05 04:18:45 steve
* Store only the base name of memories.
*
* Revision 1.23 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.22 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.21 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.20 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.19 2002/01/23 03:35:17 steve
* Detect incorrect function ports.
*
* Revision 1.18 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.17 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.16 2001/11/01 05:21:26 steve
* Catch ports that have no direction.
*
* Revision 1.15 2001/10/31 03:11:15 steve
* detect module ports not declared within the module.
*
* Revision 1.14 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.13 2001/05/25 02:21:34 steve
* Detect input and input ports declared as reg.
*
* Revision 1.12 2001/02/17 05:15:33 steve
* Allow task ports to be given real types.
*
+719 -710
View File
File diff suppressed because it is too large Load Diff
+112 -37
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: emit.cc,v 1.56 2001/03/27 03:31:06 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: emit.cc,v 1.71 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include <iostream>
/*
* The emit function is called to generate the output required of the
* target.
@@ -41,12 +45,6 @@ bool NetLogic::emit_node(struct target_t*tgt) const
return true;
}
bool NetUDP_COMB::emit_node(struct target_t*tgt) const
{
tgt->udp_comb(this);
return true;
}
bool NetUDP::emit_node(struct target_t*tgt) const
{
tgt->udp(this);
@@ -59,12 +57,6 @@ bool NetAddSub::emit_node(struct target_t*tgt) const
return true;
}
bool NetAssign_::emit_node(struct target_t*tgt) const
{
tgt->net_assign(this);
return true;
}
bool NetCaseCmp::emit_node(struct target_t*tgt) const
{
tgt->net_case_cmp(this);
@@ -136,6 +128,11 @@ bool NetRamDq::emit_node(struct target_t*tgt) const
return true;
}
bool NetUserFunc::emit_node(struct target_t*tgt) const
{
return tgt->net_function(this);
}
bool NetBUFZ::emit_node(struct target_t*tgt) const
{
return tgt->bufz(this);
@@ -164,18 +161,6 @@ bool NetAssignNB::emit_proc(struct target_t*tgt) const
return true;
}
bool NetAssignMem::emit_proc(struct target_t*tgt) const
{
tgt->proc_assign_mem(this);
return true;
}
bool NetAssignMemNB::emit_proc(struct target_t*tgt) const
{
tgt->proc_assign_mem_nb(this);
return true;
}
bool NetBlock::emit_proc(struct target_t*tgt) const
{
return tgt->proc_block(this);
@@ -194,8 +179,7 @@ bool NetCAssign::emit_proc(struct target_t*tgt) const
bool NetCondit::emit_proc(struct target_t*tgt) const
{
tgt->proc_condit(this);
return true;
return tgt->proc_condit(this);
}
bool NetDeassign::emit_proc(struct target_t*tgt) const
@@ -271,16 +255,20 @@ void NetBlock::emit_recurse(struct target_t*tgt) const
} while (cur != last_);
}
void NetCondit::emit_recurse_if(struct target_t*tgt) const
bool NetCondit::emit_recurse_if(struct target_t*tgt) const
{
if (if_)
if_->emit_proc(tgt);
return if_->emit_proc(tgt);
else
return true;
}
void NetCondit::emit_recurse_else(struct target_t*tgt) const
bool NetCondit::emit_recurse_else(struct target_t*tgt) const
{
if (else_)
else_->emit_proc(tgt);
return else_->emit_proc(tgt);
else
return true;
}
bool NetEvProbe::emit_node(struct target_t*tgt) const
@@ -324,6 +312,9 @@ void NetScope::emit_scope(struct target_t*tgt) const
for (NetEvent*cur = events_ ; cur ; cur = cur->snext_)
tgt->event(cur);
for (NetVariable*cur = vars_ ; cur ; cur = cur->snext_)
tgt->variable(cur);
for (NetScope*cur = sub_ ; cur ; cur = cur->sib_)
cur->emit_scope(tgt);
@@ -354,10 +345,10 @@ void NetScope::emit_defs(struct target_t*tgt) const
break;
case FUNC:
tgt->func_def(this->func_def());
tgt->func_def(this);
break;
case TASK:
tgt->task_def(this->task_def());
tgt->task_def(this);
break;
}
@@ -377,7 +368,9 @@ bool Design::emit(struct target_t*tgt) const
return false;
// enumerate the scopes
root_scope_->emit_scope(tgt);
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->emit_scope(tgt);
// emit nodes
@@ -391,7 +384,9 @@ bool Design::emit(struct target_t*tgt) const
// emit task and function definitions
root_scope_->emit_defs(tgt);
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->emit_defs(tgt);
// emit the processes
@@ -419,6 +414,11 @@ void NetEConst::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_const(this);
}
void NetECReal::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_creal(this);
}
void NetEMemory::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_memory(this);
@@ -435,6 +435,11 @@ void NetEScope::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_scope(this);
}
void NetESelect::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_select(this);
}
void NetESFunc::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_sfunc(this);
@@ -450,7 +455,7 @@ void NetESignal::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_signal(this);
}
void NetESubSignal::expr_scan(struct expr_scan_t*tgt) const
void NetEBitSel::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_subsignal(this);
}
@@ -465,6 +470,11 @@ void NetEUnary::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_unary(this);
}
void NetEVariable::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_variable(this);
}
bool emit(const Design*des, const char*type)
{
for (unsigned idx = 0 ; target_table[idx] ; idx += 1) {
@@ -473,11 +483,76 @@ bool emit(const Design*des, const char*type)
return des->emit(tgt->meth);
}
cerr << "error: Code generator type " << type
<< " not found." << endl;
return false;
}
/*
* $Log: emit.cc,v $
* Revision 1.71 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.70 2002/11/03 20:36:10 steve
* Error message for mising code generator type.
*
* Revision 1.69 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.68 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.67 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.66 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.65 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.64 2002/01/19 19:02:08 steve
* Pass back target errors processing conditionals.
*
* Revision 1.63 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.62 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.61 2001/07/27 04:51:44 steve
* Handle part select expressions as variants of
* NetESignal/IVL_EX_SIGNAL objects, instead of
* creating new and useless temporary signals.
*
* Revision 1.60 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.59 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.58 2001/04/06 02:28:02 steve
* Generate vvp code for functions with ports.
*
* Revision 1.57 2001/04/02 02:28:12 steve
* Generate code for task calls.
*
* Revision 1.56 2001/03/27 03:31:06 steve
* Support error code from target_t::end_design method.
*
+126 -104
View File
@@ -16,73 +16,86 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: eval.cc,v 1.20 2001/02/09 02:49:59 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval.cc,v 1.32 2002/10/19 22:59:49 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "PExpr.h"
# include "netlist.h"
# include "compiler.h"
verinum* PExpr::eval_const(const Design*, const string&) const
verinum* PExpr::eval_const(const Design*, const NetScope*) const
{
return 0;
}
verinum* PEBinary::eval_const(const Design*des, const string&path) const
verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
{
verinum*l = left_->eval_const(des, path);
verinum*l = left_->eval_const(des, scope);
if (l == 0) return 0;
verinum*r = right_->eval_const(des, path);
verinum*r = right_->eval_const(des, scope);
if (r == 0) {
delete l;
return 0;
}
verinum*res;
switch (op_) {
case '+': {
assert(l->is_defined());
assert(r->is_defined());
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv+rv, l->len());
if (l->is_defined() && r->is_defined()) {
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv+rv, l->len());
} else {
res = new verinum(verinum::Vx, l->len());
}
break;
}
case '-': {
assert(l->is_defined());
assert(r->is_defined());
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv-rv, l->len());
if (l->is_defined() && r->is_defined()) {
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv-rv, l->len());
} else {
res = new verinum(verinum::Vx, l->len());
}
break;
}
case '*': {
assert(l->is_defined());
assert(r->is_defined());
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv * rv, l->len());
if (l->is_defined() && r->is_defined()) {
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv * rv, l->len());
} else {
res = new verinum(verinum::Vx, l->len());
}
break;
}
case '/': {
assert(l->is_defined());
assert(r->is_defined());
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv / rv, l->len());
if (l->is_defined() && r->is_defined()) {
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv / rv, l->len());
} else {
res = new verinum(verinum::Vx, l->len());
}
break;
}
case '%': {
assert(l->is_defined());
assert(r->is_defined());
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv % rv, l->len());
if (l->is_defined() && r->is_defined()) {
long lv = l->as_long();
long rv = r->as_long();
res = new verinum(lv % rv, l->len());
} else {
res = new verinum(verinum::Vx, l->len());
}
break;
}
case 'l': {
case 'l': { // left shift (<<)
assert(r->is_defined());
unsigned long rv = r->as_ulong();
res = new verinum(verinum::V0, l->len());
@@ -93,6 +106,17 @@ verinum* PEBinary::eval_const(const Design*des, const string&path) const
}
break;
}
case 'r': { // right shift (>>)
assert(r->is_defined());
unsigned long rv = r->as_ulong();
res = new verinum(verinum::V0, l->len());
if (rv < res->len()) {
unsigned cnt = res->len() - rv;
for (unsigned idx = 0 ; idx < cnt ; idx += 1)
res->set(idx, l->get(idx+rv));
}
break;
}
default:
delete l;
@@ -110,42 +134,50 @@ verinum* PEBinary::eval_const(const Design*des, const string&path) const
* Evaluate an identifier as a constant expression. This is only
* possible if the identifier is that of a parameter.
*/
verinum* PEIdent::eval_const(const Design*des, const string&path) const
verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
{
const NetScope*scope = des->find_scope(path);
assert(scope);
const NetExpr*expr = des->find_parameter(scope, text_);
const NetExpr*expr = des->find_parameter(scope, path_);
if (expr == 0)
return 0;
assert(msb_ == 0);
if (dynamic_cast<const NetEParam*>(expr)) {
cerr << get_line() << ": sorry: I cannot evaluate ``" <<
text_ << "'' in this scope: " << scope->name() << endl;
const NetEConst*eval = dynamic_cast<const NetEConst*>(expr);
if (eval == 0) {
cerr << get_line() << ": internal error: Unable to evaluate "
<< "constant expression (parameter=" << path_
<< "): " << *expr << endl;
return 0;
}
const NetEConst*eval = dynamic_cast<const NetEConst*>(expr);
assert(eval);
if (msb_ || lsb_)
return 0;
return new verinum(eval->value());
}
verinum* PEFNumber::eval_const(const Design*, const string&) const
verinum* PEFNumber::eval_const(const Design*, const NetScope*) const
{
long val = value_->as_long();
return new verinum(val);
}
verinum* PENumber::eval_const(const Design*, const string&) const
verinum* PENumber::eval_const(const Design*, const NetScope*) const
{
return new verinum(value());
}
verinum* PETernary::eval_const(const Design*des, const string&path) const
verinum* PEString::eval_const(const Design*, const NetScope*) const
{
verinum*test = expr_->eval_const(des, path);
return new verinum(string(text_));
}
verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
{
verinum*test = expr_->eval_const(des, scope);
if (test == 0)
return 0;
@@ -153,9 +185,9 @@ verinum* PETernary::eval_const(const Design*des, const string&path) const
delete test;
switch (bit) {
case verinum::V0:
return fal_->eval_const(des, path);
return fal_->eval_const(des, scope);
case verinum::V1:
return tru_->eval_const(des, path);
return tru_->eval_const(des, scope);
default:
return 0;
// XXXX It is possible to handle this case if both fal_
@@ -163,9 +195,9 @@ verinum* PETernary::eval_const(const Design*des, const string&path) const
}
}
verinum* PEUnary::eval_const(const Design*des, const string&path) const
verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
{
verinum*val = expr_->eval_const(des, path);
verinum*val = expr_->eval_const(des, scope);
if (val == 0)
return 0;
@@ -194,6 +226,50 @@ verinum* PEUnary::eval_const(const Design*des, const string&path) const
/*
* $Log: eval.cc,v $
* Revision 1.32 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.31 2002/10/13 05:01:07 steve
* More verbose eval_const assert message.
*
* Revision 1.30 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2002/06/07 02:57:54 steve
* Simply give up on constants with indices.
*
* Revision 1.28 2002/06/06 18:57:04 steve
* Better error for identifier index eval.
*
* Revision 1.27 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.26 2001/12/29 22:10:10 steve
* constant eval of arithmetic with x and z.
*
* Revision 1.25 2001/12/29 00:43:55 steve
* Evaluate constant right shifts.
*
* Revision 1.24 2001/12/03 04:47:15 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.23 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.22 2001/11/06 06:11:55 steve
* Support more real arithmetic in delay constants.
*
* Revision 1.21 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.20 2001/02/09 02:49:59 steve
* Be more clear about scope of failure.
*
@@ -214,59 +290,5 @@ verinum* PEUnary::eval_const(const Design*des, const string&path) const
*
* Revision 1.15 2000/09/07 22:38:13 steve
* Support unary + and - in constants.
*
* Revision 1.14 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.13 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.12 1999/11/30 04:48:17 steve
* Handle evaluation of ternary during elaboration.
*
* Revision 1.11 1999/11/28 23:42:02 steve
* NetESignal object no longer need to be NetNode
* objects. Let them keep a pointer to NetNet objects.
*
* Revision 1.10 1999/11/21 20:03:24 steve
* Handle multiply in constant expressions.
*
* Revision 1.9 1999/10/08 17:48:09 steve
* Support + in constant expressions.
*
* Revision 1.8 1999/09/20 02:21:10 steve
* Elaborate parameters in phases.
*
* Revision 1.7 1999/09/18 01:52:48 steve
* Remove spurious message.
*
* Revision 1.6 1999/09/16 04:18:15 steve
* elaborate concatenation repeats.
*
* Revision 1.5 1999/08/06 04:05:28 steve
* Handle scope of parameters.
*
* Revision 1.4 1999/07/17 19:51:00 steve
* netlist support for ternary operator.
*
* Revision 1.3 1999/05/30 01:11:46 steve
* Exressions are trees that can duplicate, and not DAGS.
*
* Revision 1.2 1999/05/10 00:16:58 steve
* Parse and elaborate the concatenate operator
* in structural contexts, Replace vector<PExpr*>
* and list<PExpr*> with svector<PExpr*>, evaluate
* constant expressions with parameters, handle
* memories as lvalues.
*
* Parse task declarations, integer types.
*
* Revision 1.1 1998/11/03 23:28:58 steve
* Introduce verilog to CVS.
*
*/
+98
View File
@@ -0,0 +1,98 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_attrib.cc,v 1.5 2002/08/12 01:34:59 steve Exp $"
#endif
# include "config.h"
# include "util.h"
# include "PExpr.h"
# include "netlist.h"
# include <iostream>
# include <assert.h>
/*
* The evaluate_attributes function evaluates the attribute
* expressions from the map, and resturns a table in a form suitable
* for passing to netlist devices.
*/
attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
unsigned&natt,
const Design*des,
const NetScope*scope)
{
natt = att.size();
if (natt == 0)
return 0;
attrib_list_t*table = new attrib_list_t [natt];
unsigned idx = 0;
typedef map<string,PExpr*>::const_iterator iter_t;
for (iter_t cur = att.begin() ; cur != att.end() ; cur ++, idx++) {
table[idx].key = (*cur).first;
PExpr*exp = (*cur).second;
/* If the attribute value is given in the source, then
evalulate it as a constant. If the value is not
given, then assume the value is 1. */
verinum*tmp;
if (exp)
tmp = exp->eval_const(des, scope);
else
tmp = new verinum(1);
if (tmp == 0)
cerr << "internal error: no result for " << *exp << endl;
assert(tmp);
table[idx].val = *tmp;
delete tmp;
}
assert(idx == natt);
return table;
}
/*
* $Log: eval_attrib.cc,v $
* Revision 1.5 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2002/08/10 21:59:39 steve
* The default attribute value is 1.
*
* Revision 1.3 2002/06/06 18:57:18 steve
* Use standard name for iostream.
*
* Revision 1.2 2002/06/03 03:55:14 steve
* compile warnings.
*
* Revision 1.1 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
*/
+60 -2
View File
@@ -16,10 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: eval_rconst.cc,v 1.1 2001/01/14 23:04:56 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_rconst.cc,v 1.5 2002/08/12 01:34:59 steve Exp $"
#endif
# include "config.h"
# include "PExpr.h"
verireal* PExpr::eval_rconst(const Design*, const NetScope*) const
@@ -34,8 +36,64 @@ verireal* PEFNumber::eval_rconst(const Design*, const NetScope*) const
return res;
}
verireal* PENumber::eval_rconst(const Design*, const NetScope*) const
{
verireal*res = new verireal(value_->as_long());
return res;
}
verireal* PEBinary::eval_rconst(const Design*des, const NetScope*scope) const
{
verireal*lef = left_->eval_rconst(des, scope);
verireal*rig = right_->eval_rconst(des, scope);
verireal*res = 0;
switch (op_) {
case '*':
if (lef == 0)
break;
if (rig == 0)
break;
res = new verireal;
*res = (*lef) * (*rig);
break;
default:
break;
}
delete lef;
delete rig;
return res;
}
verireal* PEIdent::eval_rconst(const Design*des, const NetScope*scope) const
{
verinum* val = eval_const(des, scope);
if (val == 0)
return 0;
verireal*res = new verireal(val->as_long());
delete val;
return res;
}
/*
* $Log: eval_rconst.cc,v $
* Revision 1.5 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.3 2001/11/06 06:11:55 steve
* Support more real arithmetic in delay constants.
*
* Revision 1.2 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
+352 -79
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: eval_tree.cc,v 1.24 2001/02/10 20:29:39 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_tree.cc,v 1.44 2002/12/05 02:14:33 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "netlist.h"
NetExpr* NetExpr::eval_tree()
@@ -77,8 +81,22 @@ NetEConst* NetEBBits::eval_tree()
eval_sub_tree_();
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
/* Notice the special case where one of the operands is 0 and
this is a bitwise &. If this happens, then the result is
known to be 0. */
if ((op() == '&') && lc && (lc->value() == verinum(0))) {
verinum res (verinum::V0, expr_width());
return new NetEConst(res);
}
if ((op() == '&') && rc && (rc->value() == verinum(0))) {
verinum res (verinum::V0, expr_width());
return new NetEConst(res);
}
if (lc == 0) return 0;
if (rc == 0) return 0;
verinum lval = lc->value();
@@ -112,11 +130,11 @@ NetEConst* NetEBBits::eval_tree()
if (lwid < rwid)
for (unsigned idx = lwid ; idx < rwid ; idx += 1)
res.set(idx, lval.get(idx));
res.set(idx, rval.get(idx));
if (rwid < lwid)
for (unsigned idx = rwid ; idx < lwid ; idx += 1)
res.set(idx, rval.get(idx));
res.set(idx, lval.get(idx));
break;
}
@@ -148,15 +166,30 @@ NetEConst* NetEBComp::eval_eqeq_()
const verinum&lv = l->value();
const verinum&rv = r->value();
if (lv.len() < rv.len())
return 0;
unsigned s_len = lv.len();
if (rv.len() < s_len) s_len = rv.len();
verinum result(verinum::V1, 1);
for (unsigned idx = 0 ; idx < lv.len(); idx += 1) {
for (unsigned idx = 0 ; idx < s_len; idx += 1) {
if (lv[idx] != rv[idx])
result = verinum::V0;
}
// If one operand was wider than the other, check that the
// remaining bits are all zero
if (lv.len() > s_len) {
for (unsigned idx = s_len; idx < lv.len(); idx += 1) {
if (lv[idx] != 0)
result = verinum::V0;
}
}
if (rv.len() > s_len) {
for (unsigned idx = s_len; idx < rv.len(); idx += 1) {
if (rv[idx] != 0)
result = verinum::V0;
}
}
return new NetEConst(result);
}
@@ -191,14 +224,16 @@ NetEConst* NetEBComp::eval_less_()
return new NetEConst(result);
}
if (lv.has_sign() && rv.has_sign() && (lv.as_long() < rv.as_long())) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
if (lv.as_ulong() < rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
if (lv.has_sign() && rv.has_sign()) {
if (lv.as_long() < rv.as_long()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
} else {
if (lv.as_ulong() < rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
}
verinum result(verinum::V0, 1);
@@ -216,6 +251,7 @@ NetEConst* NetEBComp::eval_leeq_()
return new NetEConst(result);
}
/* Detect the case where the right side is greater that or
equal to the largest value the left side can possibly
have. */
@@ -235,14 +271,16 @@ NetEConst* NetEBComp::eval_leeq_()
return new NetEConst(result);
}
if (lv.has_sign() && rv.has_sign() && (lv.as_long() <= rv.as_long())) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
if (lv.as_ulong() <= rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
if (lv.has_sign() && rv.has_sign()) {
if (lv.as_long() <= rv.as_long()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
} else {
if (lv.as_ulong() <= rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
}
verinum result(verinum::V0, 1);
@@ -681,6 +719,10 @@ NetEConst* NetEBShift::eval_tree()
NetEConst* NetEConcat::eval_tree()
{
unsigned repeat_val = repeat();
unsigned local_errors = 0;
unsigned gap = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
// Parameter not here? This is an error, but presumably
@@ -688,10 +730,13 @@ NetEConst* NetEConcat::eval_tree()
if (parms_[idx] == 0)
continue;
// If this parameter is already a constant, all is well
// so go on.
if (dynamic_cast<NetEConst*>(parms_[idx]))
if (dynamic_cast<NetEConst*>(parms_[idx])) {
gap += parms_[idx]->expr_width();
continue;
}
// Finally, try to evaluate the parameter expression
// that is here. If I succeed, reset the parameter to
@@ -701,25 +746,64 @@ NetEConst* NetEConcat::eval_tree()
if (expr) {
delete parms_[idx];
parms_[idx] = expr;
if (! expr->has_width()) {
cerr << get_line() << ": error: concatenation "
<< "operand has indefinite width: "
<< *parms_[idx] << endl;
local_errors += 1;
} else if (expr->expr_width() == 0) {
cerr << expr->get_line() << ": internal error: "
<< "Operand of concatenation has no width: "
<< *expr << endl;
local_errors += 1;
}
gap += expr->expr_width();
}
}
unsigned gap = expr_width() / repeat_;
verinum val (verinum::Vx, repeat_ * gap);
if (local_errors > 0)
return 0;
// Handle the special case that the repeat expression is
// zero. In this case, just return a 0 value with the expected
// width.
if (repeat_val == 0) {
verinum val (verinum::V0, expr_width());
NetEConst*res = new NetEConst(val);
res->set_width(val.len());
return res;
}
// At this point, the "gap" is the width of a single repeat of
// the concatenation. The total width of the result is the gap
// times the repeat count.
verinum val (verinum::Vx, repeat_val * gap);
// build up the result from least significant to most.
unsigned cur = 0;
bool is_string_flag = true;
for (unsigned idx = parms_.count() ; idx > 0 ; idx -= 1) {
NetEConst*expr = dynamic_cast<NetEConst*>(parms_[idx-1]);
if (expr == 0)
return 0;
verinum tmp = expr->value();
for (unsigned bit = 0 ; bit < tmp.len() ; bit += 1, cur += 1)
for (unsigned rep = 0 ; rep < repeat_ ; rep += 1)
for (unsigned bit = 0; bit < tmp.len(); bit += 1, cur += 1)
for (unsigned rep = 0 ; rep < repeat_val ; rep += 1)
val.set(rep*gap+cur, tmp[bit]);
is_string_flag = is_string_flag && tmp.is_string();
}
/* If all the values were strings, then re-stringify this
constant. This might be useful information in the code
generator or other optimizer steps. */
if (is_string_flag) {
val = verinum(val.as_string());
}
NetEConst*res = new NetEConst(val);
@@ -727,13 +811,58 @@ NetEConst* NetEConcat::eval_tree()
return res;
}
/*
* There are limits to our ability to evaluate a memory reference
* expression, because the content of a memory is never
* constant. However, the index expression may be precalculated, and
* there are certain index values that do give us constant results.
*/
NetExpr* NetEMemory::eval_tree()
{
/* Attempt to evaluate the index expression to a constant, if
it is not already. */
if (idx_ && !dynamic_cast<NetEConst*>(idx_)) {
NetExpr* tmp = idx_->eval_tree();
if (tmp) {
delete idx_;
idx_ = tmp;
}
}
NetEConst*itmp = dynamic_cast<NetEConst*>(idx_);
if (itmp == 0)
return 0;
verinum ival = itmp->value();
/* If the index expression has any x or z bits, then we know
already that the expression result is a constant x. */
if (! ival.is_defined()) {
verinum xres (verinum::Vx, mem_->width(), false);
NetEConst*res = new NetEConst(xres);
return res;
}
/* If the index expression is outside the range of the memory,
then the result is a constant x. */
unsigned norm_idx = mem_->index_to_address(ival.as_long());
if (norm_idx >= mem_->count()) {
verinum xres (verinum::Vx, mem_->width(), false);
NetEConst*res = new NetEConst(xres);
return res;
}
return 0;
}
NetExpr* NetEParam::eval_tree()
{
if (des_ == 0)
return 0;
assert(scope_);
const NetExpr*expr = scope_->get_parameter(name_);
assert(name_.peek_name(1) == 0);
const NetExpr*expr = scope_->get_parameter(name_.peek_name(0));
if (expr == 0) {
cerr << get_line() << ": internal error: Unable to match "
<< "parameter " << name_ << " in scope "
@@ -761,10 +890,57 @@ NetExpr* NetEParam::eval_tree()
// The result can be saved as the value of the parameter for
// future reference, and return a copy to the caller.
scope_->set_parameter(name_, res);
scope_->replace_parameter(name_.peek_name(0), res);
return res->dup_expr();
}
NetEConst* NetESelect::eval_tree()
{
NetEConst*expr = dynamic_cast<NetEConst*>(expr_);
if (expr == 0) {
NetExpr*tmp = expr_->eval_tree();
if (tmp != 0) {
delete expr_;
expr_ = tmp;
}
expr = dynamic_cast<NetEConst*>(expr_);
}
NetEConst*base = dynamic_cast<NetEConst*>(base_);
if (base == 0) {
NetExpr*tmp = base_->eval_tree();
if (tmp != 0) {
delete base_;
base_ = tmp;
}
base = dynamic_cast<NetEConst*>(base_);
}
if (expr == 0)
return 0;
if (base == 0)
return 0;
verinum eval = expr->value();
verinum oval (verinum::V0, expr_width(), true);
long bval = base->value().as_long();
for (long idx = 0 ; idx < expr_width() ; idx += 1) {
if ((bval >= eval.len()) || (bval < 0))
oval.set(idx, verinum::Vx);
else
oval.set(idx, eval.get(bval));
bval += 1;
}
NetEConst*res = new NetEConst(oval);
return res;
}
/*
* A ternary expression evaluation is controlled by the condition
* expression. If the condition evaluates to true or false, then
@@ -776,48 +952,49 @@ NetExpr* NetETernary::eval_tree()
{
NetExpr*tmp;
/* Evaluate the cond_ to a constant. If it already is a
constant, then there is nothing to do. */
assert(cond_);
if (0 == dynamic_cast<NetEConst*>(cond_)) {
tmp = cond_->eval_tree();
if (tmp != 0) {
delete cond_;
cond_ = tmp;
}
}
assert(true_val_);
if (0 == dynamic_cast<NetEConst*>(true_val_)) {
tmp = true_val_->eval_tree();
if (tmp != 0) {
delete true_val_;
true_val_ = tmp;
}
}
assert(false_val_);
if (0 == dynamic_cast<NetEConst*>(false_val_)) {
tmp = false_val_->eval_tree();
if (tmp != 0) {
delete false_val_;
false_val_ = tmp;
}
}
NetEConst*c = dynamic_cast<NetEConst*>(cond_);
if (c == 0) {
tmp = cond_->eval_tree();
c = dynamic_cast<NetEConst*>(tmp);
if (c == 0)
return 0;
if (c == 0)
return 0;
assert(cond_ != c);
delete cond_;
cond_ = c;
}
/* If the condition is 1 or 0, return the true or false
expression. Try to evaluate the expression down as far as
we can. */
if (c->value().get(0) == verinum::V1) {
tmp = dynamic_cast<NetEConst*>(true_val_);
if (tmp) return tmp->dup_expr();
tmp = true_val_->eval_tree();
if (tmp) {
delete true_val_;
true_val_ = tmp;
}
if (c->value().get(0) == verinum::V1)
return true_val_->dup_expr();
}
if (c->value().get(0) == verinum::V0) {
tmp = dynamic_cast<NetEConst*>(false_val_);
if (tmp) return tmp->dup_expr();
tmp = false_val_->eval_tree();
if (tmp) {
delete false_val_;
false_val_ = tmp;
}
if (c->value().get(0) == verinum::V0)
return false_val_->dup_expr();
}
/* Here we have a more complex case. We need to evaluate both
@@ -825,27 +1002,14 @@ NetExpr* NetETernary::eval_tree()
build up a constant result. */
NetEConst*t = dynamic_cast<NetEConst*>(true_val_);
if (t == 0) {
tmp = true_val_->eval_tree();
t = dynamic_cast<NetEConst*>(tmp);
if (t == 0)
return 0;
delete true_val_;
true_val_ = t;
}
if (t == 0)
return 0;
NetEConst*f = dynamic_cast<NetEConst*>(false_val_);
if (f == 0) {
tmp = false_val_->eval_tree();
f = dynamic_cast<NetEConst*>(tmp);
if (f == 0)
return 0;
if (f == 0)
return 0;
delete false_val_;
false_val_ = f;
}
unsigned size = t->expr_width();
assert(size == f->expr_width());
@@ -868,6 +1032,7 @@ NetExpr* NetETernary::eval_tree()
void NetEUnary::eval_expr_()
{
assert(expr_);
if (dynamic_cast<NetEConst*>(expr_))
return;
@@ -890,6 +1055,24 @@ NetEConst* NetEUnary::eval_tree()
switch (op_) {
case '+':
/* Unary + is a no-op. */
return new NetEConst(val);
case '-': {
if (val.is_defined()) {
verinum tmp (verinum::V0, val.len());
tmp.has_sign(val.has_sign());
val = tmp - val;
} else {
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
val.set(idx, verinum::Vx);
}
return new NetEConst(val);
}
case '~': {
/* Bitwise not is even simpler then logical
@@ -911,7 +1094,6 @@ NetEConst* NetEUnary::eval_tree()
}
default:
delete rval;
return 0;
}
}
@@ -956,6 +1138,7 @@ NetEConst* NetEUReduce::eval_tree()
}
res = v1? verinum::V0 : (vx? verinum::Vx : verinum::V1);
break;
}
case '&': {
@@ -972,6 +1155,28 @@ NetEConst* NetEUReduce::eval_tree()
break;
}
case '^': {
/* Reduction XOR. */
unsigned ones = 0, unknown = 0;
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
switch (val.get(idx)) {
case verinum::V0:
break;
case verinum::V1:
ones += 1;
break;
default:
unknown += 1;
break;
}
if (unknown)
return new NetEConst(verinum(verinum::Vx,1,true));
if (ones%2)
return new NetEConst(verinum(verinum::V1,1,true));
return new NetEConst(verinum(verinum::V0,1,true));
}
default:
return 0;
}
@@ -982,6 +1187,74 @@ NetEConst* NetEUReduce::eval_tree()
/*
* $Log: eval_tree.cc,v $
* Revision 1.44 2002/12/05 02:14:33 steve
* Support bit select in constant expressions.
*
* Revision 1.43 2002/11/09 01:40:19 steve
* Postpone parameter width check to evaluation.
*
* Revision 1.42 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.41 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.40 2002/05/25 16:43:47 steve
* Eval ^ and &0 expressions.
*
* Revision 1.39 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.38 2002/05/05 21:11:50 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.37 2002/04/27 05:03:46 steve
* Preserve stringiness string part select and concatenation.
*
* Revision 1.36 2002/04/27 03:17:15 steve
* Fixup eval of signed constants.
*
* Revision 1.35 2002/04/24 02:47:02 steve
* Fix compile time eval of signed <= signed.
*
* Revision 1.34 2002/04/14 19:28:47 steve
* Fix constant evaluation of unary
*
* Revision 1.33 2002/02/01 05:09:14 steve
* Propagate sign in unary minus.
*
* Revision 1.32 2002/01/22 01:40:04 steve
* Precalculate constant results of memory index expressions.
*
* Revision 1.31 2001/12/30 00:39:25 steve
* Evaluate constant unary minus.
*
* Revision 1.30 2001/12/03 04:47:15 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.29 2001/11/19 01:54:14 steve
* Port close cropping behavior from mcrgb
* Move window array reset to libmc.
*
* Revision 1.28 2001/10/22 15:31:21 steve
* fix constant overrun in | operands.
*
* Revision 1.27 2001/10/20 00:11:24 steve
* Evaluate constant == when operands differ in width.
*
* Revision 1.26 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.25 2001/07/16 20:41:41 steve
* Handle 0 counts in repeat concatenation.
*
* Revision 1.24 2001/02/10 20:29:39 steve
* In the context of range declarations, use elab_and_eval instead
* of the less robust eval_const methods.
+3
View File
@@ -0,0 +1,3 @@
,*
hello_vpi.vpi
show_vcd.vcd
+1035
View File
File diff suppressed because it is too large Load Diff
+1 -1
View File
@@ -31,7 +31,7 @@
* file "hello" which is compiled, linked and ready to run. Run this
* program like so:
*
* ./hello
* vvp hello
*
* and the program will print the message to its output. Easy! For
* more on how to make the iverilog command work, see the iverilog
+75
View File
@@ -0,0 +1,75 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: hello_vpi.c,v 1.3 2002/08/12 01:35:01 steve Exp $"
#endif
/*
* This file contains an example VPI module to demonstrate the tools
* to create vpi modules. To compile this module, use the iverilog-vpi
* command like so:
*
* iverilog-vpi hello_vpi.c
*
* The result is the hello_vpi.vpi module. See the hello_vpi.vl
* program for example Verilog code to call this module.
*/
# include <vpi_user.h>
static int my_hello_calltf(char *xx)
{
vpi_printf("Hello World, from VPI.\n");
return 0;
}
static void my_hello_register()
{
s_vpi_systf_data tf_data;
tf_data.type = vpiSysTask;
tf_data.tfname = "$my_hello";
tf_data.calltf = my_hello_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
vpi_register_systf(&tf_data);
}
/*
* This is a table of register functions. This table is the external
* symbol that the simulator looks for when loading this .vpi module.
*/
void (*vlog_startup_routines[])() = {
my_hello_register,
0
};
/*
* $Log: hello_vpi.c,v $
* Revision 1.3 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/08/11 23:47:04 steve
* Add missing Log and Ident strings.
*
* Revision 1.1 2002/04/18 03:25:16 steve
* More examples.
*
*/
+49
View File
@@ -0,0 +1,49 @@
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
/*
* Here we have the canonical "Hello, World" program written in Verilog,
* with VPI. It uses the hello_vpi.vpi module that is compiled from
* the hello_vpi.c program also in this directory. See the
* hello_vpi.c for instructions on how to compile it.
*
* Compile this program with the command:
*
* iverilog -ohello_vpi hello_vpi.vl
*
* After churning for a little while, the program will create the output
* file "hello" which is compiled, linked and ready to run. Run this
* program like so:
*
* vvp -M. -mhello_vpi hello_vpi
*
* and the program will print the message to its output. Easy! For
* more on how to make the iverilog command work, see the iverilog
* manual page.
*/
module main();
initial
begin
$my_hello;
$finish ;
end
endmodule
+1 -1
View File
@@ -41,7 +41,7 @@
* To view the output generated by running show_vcd, start the GTKWave
* viewer with the command:
*
* wave show_vcd.vcd
* gtkwave show_vcd.vcd
*
* The GTKWave program will display its main window, and show in a small
* status box (upper left corner) that it succeeded in loading the dump
+377
View File
@@ -0,0 +1,377 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sqrt-virtex.v,v 1.2 2002/11/13 01:49:43 steve Exp $"
*/
/*
* This module is a synthesizeable square-root function. It is also a
* detailed example of how to target Xilinx Virtex parts using
* Icarus Verilog. In fact, for no particular reason other then to
* be excessively specific, I will step through the process of
* generating a design for a Spartan-II XC2S15-VQ100, and also how to
* generate a generic library part for larger Virtex designs.
*
* In addition to Icarus Verilog, you will need implementation
* software from Xilinx. As of this writing, this example was tested
* with Foundation 4.2i, but it should work the same with ISE and
* Webpack software.
*
* This example source contains all the Verilog needed to do
* everything described below. We use conditional compilation to
* select the bits of Verilog that are needed to perform each specific
* task.
*
* SIMULATE THE DESIGN
*
* This source file includes a simulation test bench. To compile the
* program to include this test bench, use the command line:
*
* iverilog -DSIMULATE=1 -oa.out sqrt-virtex.v
*
* This generates the file "a.out" that can then be executed with the
* command:
*
* vvp a.out
*
* This causes the simulation to run a long set of example sqrt
* calculations. Each result is checked by the test bench to assure
* that the result is valid. When it is done, the program prints
* "PASSED" and finishes the simulation.
*
* When you take a close look at the "main" module below, you will see
* that it uses Verilog constructs that are not synthesizeable. This
* is fine, as we will never try to synthesize it.
*
* LIBRARY PARTS
*
* One can use the sqrt32 module to generate an EDIF file suitable for
* use as a library part. This part can be imported to the Xilinx
* schematic editor, then placed like any other pre-existing
* macro. One can also pass the generated EDIF as a precompiled macro
* that other designers may use as they see fit.
*
* To make an EDIF file from the sqrt32 module, execute the command:
*
* iverilog -osqrt32.edf -tfpga -parch=virtex sqrt-virtex.v
*
* The -parch=virtex tells the code generator to generate code for the
* virtex architecture family (we don't yet care what specific part)
* and the -osqrt32.edf places the output into the file
* sqrt32.edf.
*
* Without any preprocessor directives, the only module is the sqrt32
* module, so sqrt32 is compiled as the root. The ports of the module
* are automatically made into ports of the sqrt32.edf netlist, and
* the contents of the sqrt32 module are connected approprately.
*
* COMPLETE CHIP DESIGNS
*
* To make a complete chip design, there are other bits that need to
* be accounted for. Signals must be assigned to pins, and some
* special devices may need to be created. We also want to write into
* the EDIF file complete part information so that the implementation
* tools know how to route the complete design. The command to compile
* for our target part is:
*
* iverilog -ochip.edf -tfpga \
* -parch=virtex -ppart=XC2S15-VQ100 \
* -DMAKE_CHIP=1 sqrt-virtex.v
*
* This command uses the "chip" module as the root. This module in
* turn has ports that are destined to be the pins of the completed
* part. The -ppart= option gives complete part information, that is
* in turn written into the EDIF file. This saves us the drudgery of
* repeating that part number for later commands.
*
* The next steps involve Xilinx software, and to talk to Xilinx
* software, the netlist must be in the form of an "ngd" file, a
* binary netlist format. The command:
*
* ngdbuild chip.edf chip.ngd
*
* does the trick. The input to ngdbuild is the chip.edf file created
* by Icarus Verilog, and the output is the chip.ngd file that the
* implementation tools may read. From this point, it is best to refer
* to Xilinx documentation for the software you are using, but the
* quick summary is:
*
* map -o map.ncd chip.ngd
* par -w map.ncd chip.ncd
*
* The result of this sequence of commands is the chip.ncd file that
* is ready to be viewed by FPGA Edit, or converted to a bit stream,
* or whatever.
*
* POST MAP SIMULATION
*
* Warm fuzzies are good, and retesting your design after the part
* is mapped by the Xilinx backend tools is a cheap source of fuzzies.
* The command to make a Verilog file out of the mapped design is:
*
* ngd2ver chip.ngd chip_root.v
*
* This command creates from the chip.ngd the file "chip_root.v" that
* contains Verilog code that simulates the mapped design. This output
* Verilog has the single root module "chip_root", which came from the
* name of the root module when we were making hte EDIF file in the
* first place. The module has ports named just line the ports of the
* chip_root module below.
*
* The generated Verilog uses the library in the directory
* $(XILINX)/verilog/src/simprims. This directory comes with the ISE
* WebPACK installation that you are using. Icarus Verilog is able to
* simulate using that library.
*
* To compile a post-map simulation of the chip_root.v, use the
* command:
*
* iverilog -DSIMULATE -DPOST_MAP -ob.out \
* -y $(XILINX)/verilog/src/simprims \
* sqrt-virtex.v chip_root.v \
* $(XILINX)/verilog/src/glbl.v
*
* This command line generates b.out from the source files
* sqrt-virtex.v and chip_root.v (the latter from ngd2ver)
* and the "-y <path>" flag specifies the library directory that will
* be needed. The glbl.v source file is also included to provide the
* GSR and related signals.
*
* The POST_MAP compiler directive causes the GSR manipulations
* included in the test bench to be compiled in, to simulate the chip
* startup. Other then that, the test bench runs the post-map design
* the same way the pre-synthesis design works.
*
* Run this design with the command:
*
* vvp b.out
*
* And there you go.
*/
`ifndef POST_MAP
/*
* This module approximates the square root of an unsigned 32bit
* number. The algorithm works by doing a bit-wise binary search.
* Starting from the most significant bit, the accumulated value
* tries to put a 1 in the bit position. If that makes the square
* too big for the input, the bit is left zero, otherwise it is set
* in the result. This continues for each bit, decreasing in
* significance, until all the bits are calculated or all the
* remaining bits are zero.
*
* Since the result is an integer, this function really calculates
* value of the expression:
*
* x = floor(sqrt(y))
*
* where sqrt(y) is the exact square root of y and floor(N) is the
* largest integer <= N.
*
* For 32bit numbers, this will never run more then 16 iterations,
* which amounts to 16 clocks.
*/
module sqrt32(clk, rdy, reset, x, .y(acc));
input clk;
output rdy;
input reset;
input [31:0] x;
output [15:0] acc;
// acc holds the accumulated result, and acc2 is the accumulated
// square of the accumulated result.
reg [15:0] acc;
reg [31:0] acc2;
// Keep track of which bit I'm working on.
reg [4:0] bitl;
wire [15:0] bit = 1 << bitl;
wire [31:0] bit2 = 1 << (bitl << 1);
// The output is ready when the bitl counter underflows.
wire rdy = bitl[4];
// guess holds the potential next values for acc, and guess2 holds
// the square of that guess. The guess2 calculation is a little bit
// subtle. The idea is that:
//
// guess2 = (acc + bit) * (acc + bit)
// = (acc * acc) + 2*acc*bit + bit*bit
// = acc2 + 2*acc*bit + bit2
// = acc2 + 2 * (acc<<bitl) + bit
//
// This works out using shifts because bit and bit2 are known to
// have only a single bit in them.
wire [15:0] guess = acc | bit;
wire [31:0] guess2 = acc2 + bit2 + ((acc << bitl) << 1);
(* ivl_synthesis_on *)
always @(posedge clk or posedge reset)
if (reset) begin
acc = 0;
acc2 = 0;
bitl = 15;
end else begin
if (guess2 <= x) begin
acc <= guess;
acc2 <= guess2;
end
bitl <= bitl - 5'd1;
end
endmodule // sqrt32
`endif // `ifndef POST_MAP
`ifdef SIMULATE
/*
* This module is a test bench for the sqrt32 module. It runs some
* test input values through the sqrt32 module, and checks that the
* output is valid. If an invalid output is generated, print and
* error message and stop immediately. If all the tested values pass,
* then print PASSED after the test is complete.
*/
module main;
reg [31:0] x;
reg clk, reset;
wire [15:0] y;
wire rdy;
`ifdef POST_MAP
chip_root dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
`else
sqrt32 dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
`endif
(* ivl_synthesis_off *)
always #5 clk = !clk;
task reset_dut;
begin
reset = 1;
#1 reset = 0;
@(negedge clk) ;
end
endtask // reset_dut
task crank_dut;
begin
while (rdy == 0) begin
@(posedge clk) /* wait */;
end
end
endtask // crank_dut
`ifdef POST_MAP
reg GSR;
assign glbl.GSR = GSR;
`endif
integer idx;
(* ivl_synthesis_off *)
initial begin
reset = 0;
clk = 0;
/* If doing a post-map simulation, when we need to wiggle
The GSR bit to simulate chip power-up. */
`ifdef POST_MAP
GSR = 1;
#100 GSR = 0;
`endif
#100 x = 1;
reset_dut;
crank_dut;
$display("x=%d, y=%d", x, y);
x = 3;
reset_dut;
crank_dut;
$display("x=%d, y=%d", x, y);
x = 4;
reset_dut;
crank_dut;
$display("x=%d, y=%d", x, y);
for (idx = 0 ; idx < 200 ; idx = idx + 1) begin
x = $random;
reset_dut;
crank_dut;
$display("x=%d, y=%d", x, y);
if (x < (y * y)) begin
$display("ERROR: y is too big");
$finish;
end
if (x > ((y + 1)*(y + 1))) begin
$display("ERROR: y is too small");
$finish;
end
end
$display("PASSED");
$finish;
end
endmodule // main
`endif
`ifdef MAKE_CHIP
/*
* This module represents the chip packaging that we intend to
* generate. We bind pins here, and route the clock to the global
* clock buffer.
*/
module chip_root(clk, rdy, reset, x, y);
input clk;
output rdy;
input reset;
input [31:0] x;
output [15:0] y;
wire clk_int;
(* cellref="BUFG:O,I" *)
buf gbuf (clk_int, clk);
sqrt32 dut(.clk(clk_int), .reset(reset), .rdy(rdy), .x(x), .y(y));
/* Assign the clk to GCLK0, which is on pin P39. */
$attribute(clk, "PAD", "39");
// We don't care where the remaining pins go, so set the pin number
// to 0. This tells the implementation tools that we want a PAD,
// but we don't care which. Also note the use of a comma (,)
// separated list to assign pins to the bits of a vector.
$attribute(rdy, "PAD", "0");
$attribute(reset, "PAD", "0");
$attribute(x, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
$attribute(y, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
endmodule // chip_root
`endif
+54
View File
@@ -0,0 +1,54 @@
/*
* Copyright (c) 1999 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
// This example describes a 16x1 RAM that can be synthesized into
// a CLB ram in a Xilinx FPGA.
module ram16x1 (q, d, a, we, wclk);
output q;
input d;
input [3:0] a;
input we;
input wclk;
reg mem[15:0];
assign q = mem[a];
always @(posedge wclk) if (we) mem[a] = d;
endmodule /* ram16x1 */
module main;
wire q;
reg d;
reg [3:0] a;
reg we, wclk;
ram16x1 r1 (q, d, a, we, wclk);
initial begin
$monitor("q = %b", q);
d = 0;
wclk = 0;
a = 5;
we = 1;
#1 wclk = 1;
#1 wclk = 0;
end
endmodule /* main */
+282 -21
View File
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: expr_synth.cc,v 1.20 2001/02/15 06:59:36 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: expr_synth.cc,v 1.38 2003/01/26 21:15:58 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "netlist.h"
# include "netmisc.h"
@@ -38,17 +42,18 @@ NetNet* NetEBAdd::synthesize(Design*des)
{
assert((op()=='+') || (op()=='-'));
string path = des->local_symbol("SYNTH");
NetNet*lsig = left_->synthesize(des);
NetNet*rsig = right_->synthesize(des);
assert(lsig->pin_count() == rsig->pin_count());
unsigned width=lsig->pin_count();
string path = lsig->scope()->name()+"."+lsig->scope()->local_symbol();
NetNet*osig = new NetNet(lsig->scope(), path, NetNet::IMPLICIT, width);
osig->local_flag(true);
string oname = des->local_symbol(path);
NetAddSub *adder = new NetAddSub(oname, width);
NetAddSub *adder = new NetAddSub(lsig->scope(), oname, width);
for (unsigned idx = 0 ; idx < width; idx += 1) {
connect(lsig->pin(idx), adder->pin_DataA(idx));
connect(rsig->pin(idx), adder->pin_DataB(idx));
@@ -58,10 +63,10 @@ NetNet* NetEBAdd::synthesize(Design*des)
switch (op()) {
case '+':
adder->attribute("LPM_Direction", "ADD");
adder->attribute("LPM_Direction", verinum("ADD"));
break;
case '-':
adder->attribute("LPM_Direction", "SUB");
adder->attribute("LPM_Direction", verinum("SUB"));
break;
}
@@ -83,6 +88,17 @@ NetNet* NetEBBits::synthesize(Design*des)
assert(scope);
string path = des->local_symbol(scope->name());
if (lsig->pin_count() != rsig->pin_count()) {
cerr << get_line() << ": internal error: bitwise (" << op_
<< ") widths do not match: " << lsig->pin_count()
<< " != " << rsig->pin_count() << endl;
cerr << get_line() << ": : width="
<< lsig->pin_count() << ": " << *left_ << endl;
cerr << get_line() << ": : width="
<< rsig->pin_count() << ": " << *right_ << endl;
return 0;
}
assert(lsig->pin_count() == rsig->pin_count());
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT,
lsig->pin_count());
@@ -92,6 +108,26 @@ NetNet* NetEBBits::synthesize(Design*des)
string oname = des->local_symbol(path);
NetLogic*gate;
/* If the rsig bit is constant, then look for special
cases that I can use to reduce the generated
logic. If I find one, then handle it immediately and
skip the rest of the processing of this bit. */
if (rsig->pin(idx).nexus()->drivers_constant()) {
verinum::V bval = rsig->pin(idx).nexus()->driven_value();
/* (A & 0) is (0) */
if ((op() == '&') && bval == verinum::V0) {
connect(osig->pin(idx), rsig->pin(idx));
continue;
}
/* (A & 1) is A */
if ((op() == '&') && bval == verinum::V1) {
connect(osig->pin(idx), lsig->pin(idx));
continue;
}
}
switch (op()) {
case '&':
gate = new NetLogic(scope, oname, 3, NetLogic::AND);
@@ -124,6 +160,77 @@ NetNet* NetEBBits::synthesize(Design*des)
NetNet* NetEBComp::synthesize(Design*des)
{
NetEConst*lcon = reinterpret_cast<NetEConst*>(left_);
NetEConst*rcon = reinterpret_cast<NetEConst*>(right_);
/* Handle the special case where one of the inputs is constant
0. We can use an OR gate to do the comparison. Synthesize
the non-const side as normal, then or(nor) the signals
together to get result. */
if ((rcon && (rcon->value() == verinum(0UL,rcon->expr_width())))
|| (lcon && (lcon->value() == verinum(0UL,lcon->expr_width())))) {
NetNet*lsig = rcon
? left_->synthesize(des)
: right_->synthesize(des);
NetScope*scope = lsig->scope();
assert(scope);
string path = des->local_symbol(scope->name());
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, 1);
osig->local_flag(true);
NetLogic*gate;
switch (op_) {
case 'e':
case 'E':
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::NOR);
break;
case 'n':
case 'N':
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::OR);
break;
case '>':
/* sig > 0 is true if any bit in sig is set. This
is very much like sig != 0. (0 > sig) shouldn't
happen. */
if (rcon) {
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::OR);
} else {
assert(0);
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::NOR);
}
break;
case '<':
/* 0 < sig is handled like sig > 0. */
if (! rcon) {
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::OR);
} else {
assert(0);
gate = new NetLogic(scope, des->local_symbol(path),
lsig->pin_count()+1, NetLogic::NOR);
}
break;
default:
assert(0);
}
connect(gate->pin(0), osig->pin(0));
for (unsigned idx = 0 ; idx < lsig->pin_count() ; idx += 1)
connect(gate->pin(idx+1), lsig->pin(idx));
des->add_node(gate);
return osig;
}
NetNet*lsig = left_->synthesize(des);
NetNet*rsig = right_->synthesize(des);
@@ -167,7 +274,7 @@ NetNet* NetEBComp::synthesize(Design*des)
}
NetCompare*dev = new NetCompare(des->local_symbol(path), width);
NetCompare*dev = new NetCompare(scope, des->local_symbol(path), width);
des->add_node(dev);
for (unsigned idx = 0 ; idx < lsig->pin_count() ; idx += 1)
@@ -294,27 +401,36 @@ NetNet* NetEBLogic::synthesize(Design*des)
NetNet* NetEConcat::synthesize(Design*des)
{
NetScope*scope = des->find_root_scope();
assert(scope);
assert(repeat_ == 1);
/* First, synthesize the operands. */
NetNet**tmp = new NetNet*[parms_.count()];
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1)
tmp[idx] = parms_[idx]->synthesize(des);
string path = des->local_symbol("SYNTH");
assert(tmp[0]);
NetScope*scope = tmp[0]->scope();
assert(scope);
/* Make a NetNet object to carry the output vector. */
string path = scope->name() + "." + scope->local_symbol();
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, expr_width());
osig->local_flag(true);
/* Connect the output vector to the operands. */
unsigned obit = 0;
for (unsigned idx = parms_.count() ; idx > 0 ; idx -= 1) {
NetNet*tmp = parms_[idx-1]->synthesize(des);
for (unsigned bit = 0 ; bit < tmp->pin_count() ; bit += 1) {
connect(osig->pin(obit), tmp->pin(bit));
assert(tmp[idx-1]);
for (unsigned bit = 0; bit < tmp[idx-1]->pin_count(); bit += 1) {
connect(osig->pin(obit), tmp[idx-1]->pin(bit));
obit += 1;
}
if (tmp->local_flag() && tmp->get_eref() == 0)
delete tmp;
if (tmp[idx-1]->local_flag() && tmp[idx-1]->get_refs() == 0)
delete tmp[idx-1];
}
delete[]tmp;
return osig;
}
@@ -323,12 +439,12 @@ NetNet* NetEConst::synthesize(Design*des)
NetScope*scope = des->find_root_scope();
assert(scope);
string path = des->local_symbol("SYNTH");
string path = scope->name() + "." + scope->local_symbol();
unsigned width=expr_width();
NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, width);
osig->local_flag(true);
NetConst*con = new NetConst(des->local_symbol(path), value());
NetConst*con = new NetConst(scope, des->local_symbol(path), value());
for (unsigned idx = 0 ; idx < width; idx += 1)
connect(osig->pin(idx), con->pin(idx));
@@ -336,6 +452,14 @@ NetNet* NetEConst::synthesize(Design*des)
return osig;
}
NetNet* NetECReal::synthesize(Design*des)
{
cerr << get_line() << ": error: Real constants are "
<< "not synthesizeable." << endl;
des->errors += 1;
return 0;
}
/*
* The bitwise unary logic operator (there is only one) is turned
* into discrete gates just as easily as the binary ones above.
@@ -399,6 +523,26 @@ NetNet* NetEUReduce::synthesize(Design*des)
NetLogic::AND);
break;
case '|':
gate = new NetLogic(scope, oname, isig->pin_count()+1,
NetLogic::OR);
break;
case '^':
gate = new NetLogic(scope, oname, isig->pin_count()+1,
NetLogic::XOR);
break;
case 'A':
gate = new NetLogic(scope, oname, isig->pin_count()+1,
NetLogic::NAND);
break;
case 'X':
gate = new NetLogic(scope, oname, isig->pin_count()+1,
NetLogic::XNOR);
break;
default:
cerr << get_line() << ": internal error: "
<< "Unable to synthesize " << *this << "." << endl;
@@ -413,14 +557,20 @@ NetNet* NetEUReduce::synthesize(Design*des)
return osig;
}
/*
* Synthesize a ?: operator an a NetMux device. Connect the condition
* expression to the select input, then connect the true and false
* expressions to the B and A inputs. This way, when the select input
* is one, the B input, which is the true expression, is selected.
*/
NetNet* NetETernary::synthesize(Design *des)
{
string path = des->local_symbol("SYNTH");
NetNet*csig = cond_->synthesize(des);
NetNet*tsig = true_val_->synthesize(des);
NetNet*fsig = false_val_->synthesize(des);
string path = csig->scope()->name()+"."+csig->scope()->local_symbol();
assert(csig->pin_count() == 1);
assert(tsig->pin_count() == fsig->pin_count());
unsigned width=tsig->pin_count();
@@ -440,13 +590,124 @@ NetNet* NetETernary::synthesize(Design *des)
return osig;
}
/*
* When synthesizing a signal expression, it is usually fine to simply
* return the NetNet that it refers to. If this is a part select,
* though, a bit more work needs to be done. Return a temporary that
* represents the connections to the selected bits.
*
* For example, if there is a reg foo, like so:
* reg [5:0] foo;
* and this expression node represents a part select foo[3:2], then
* create a temporary like so:
*
* foo
* +---+
* | 5 |
* +---+
* tmp | 4 |
* +---+ +---+
* | 1 | <---> | 3 |
* +---+ +---+
* | 0 | <---> | 2 |
* +---+ +---+
* | 1 |
* +---+
* | 0 |
* +---+
* The temporary is marked as a temporary and returned to the
* caller. This causes the caller to get only the selected part of the
* signal, and when it hooks up to tmp, it hooks up to the right parts
* of foo.
*/
NetNet* NetESignal::synthesize(Design*des)
{
return net_;
if ((lsi_ == 0) && (msi_ == (net_->pin_count() - 1)))
return net_;
assert(msi_ >= lsi_);
unsigned wid = msi_ - lsi_ + 1;
NetScope*scope = net_->scope();
assert(scope);
string name = scope->name() + "." + scope->local_symbol();
NetNet*tmp = new NetNet(scope, name, NetNet::NetNet::WIRE, wid);
tmp->local_flag(true);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(tmp->pin(idx), net_->pin(idx+lsi_));
return tmp;
}
/*
* $Log: expr_synth.cc,v $
* Revision 1.38 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.37 2002/11/17 23:37:55 steve
* Magnitude compare to 0.
*
* Revision 1.36 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.35 2002/07/07 22:31:39 steve
* Smart synthesis of binary AND expressions.
*
* Revision 1.34 2002/07/05 21:26:17 steve
* Avoid emitting to vvp local net symbols.
*
* Revision 1.33 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.32 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.31 2001/12/30 17:06:52 steve
* Synthesize reduction logic.
*
* Revision 1.30 2001/12/18 05:34:02 steve
* Comments about MUX synthesis.
*
* Revision 1.29 2001/11/29 01:58:18 steve
* Handle part selects in l-values of DFF devices.
*
* Revision 1.28 2001/10/28 01:14:53 steve
* NetObj constructor finally requires a scope.
*
* Revision 1.27 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.26 2001/08/31 22:59:48 steve
* synthesize the special case of compare with 0.
*
* Revision 1.25 2001/08/05 02:49:07 steve
* Properly synthesize part selects.
*
* Revision 1.24 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.23 2001/07/07 01:38:45 steve
* Put synthesized signals in proper scope.
*
* Revision 1.22 2001/06/15 04:14:18 steve
* Generate vvp code for GT and GE comparisons.
*
* Revision 1.21 2001/06/07 02:12:43 steve
* Support structural addition.
*
* Revision 1.20 2001/02/15 06:59:36 steve
* FreeBSD port has a maintainer now.
*
+57 -118
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,10 +16,14 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: functor.cc,v 1.24 2000/11/19 20:48:30 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.cc,v 1.31 2002/08/16 05:18:27 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include "functor.h"
# include "netlist.h"
@@ -110,7 +114,9 @@ void NetScope::run_functor(Design*des, functor_t*fun)
void Design::functor(functor_t*fun)
{
// Scan the scopes
root_scope_->run_functor(this, fun);
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->run_functor(this, fun);
// apply to processes
procs_idx_ = procs_;
@@ -122,30 +128,31 @@ void Design::functor(functor_t*fun)
// apply to nodes
if (nodes_) {
assert(nodes_functor_cur_ == 0);
assert(nodes_functor_nxt_ == 0);
/* Scan the circular list of nodes, starting with the
front of the list. (nodes_ points to the *end* of the
list.) The bar is the end point. At the end of the
do-while loop, I know that the bar has been
processed or (if bar == 0) no undeleted node has been
processed. */
NetNode*cur = nodes_->node_next_;
NetNode*bar = 0;
front of the list.
This loop interacts with the Design::del_node method
so that the functor is free to delete any nodes it
choose. The destructors of the NetNode objects call
the del_node method, which checks with the
nodes_functor_* members, to keep the iterator
operating safely. */
nodes_functor_cur_ = nodes_;
do {
NetNode*tmp = cur->node_next_;
cur->functor_node(this, fun);
nodes_functor_nxt_ = nodes_functor_cur_->node_next_;
nodes_functor_cur_->functor_node(this, fun);
/* Detect the case that cur has been deleted by
noticing if tmp->node_prev_ no longer points to
cur. If that's the case, clear the bar. */
if (tmp->node_prev_ != cur) {
if (cur == bar)
bar = 0;
} else if (bar == 0) {
bar = cur;
}
cur = tmp;
if (nodes_functor_nxt_ == 0)
break;
nodes_functor_cur_ = nodes_functor_nxt_;
} while (nodes_ && (nodes_functor_cur_ != nodes_));
nodes_functor_cur_ = 0;
nodes_functor_nxt_ = 0;
} while (nodes_ && (cur != bar));
}
}
@@ -228,35 +235,13 @@ int NetAssignNB::match_proc(proc_match_t*that)
return that->assign_nb(this);
}
int proc_match_t::assign_mem(NetAssignMem*)
{
return 0;
}
int NetAssignMem::match_proc(proc_match_t*that)
{
return that->assign_mem(this);
}
int proc_match_t::assign_mem_nb(NetAssignMemNB*)
{
return 0;
}
int NetAssignMemNB::match_proc(proc_match_t*that)
{
return that->assign_mem_nb(this);
}
int proc_match_t::block(NetBlock*)
{
cerr << "default (failing) match for block" << endl;
return 0;
}
int NetBlock::match_proc(proc_match_t*that)
{
cerr << "NetBlock::match_proc" << endl;
return that->block(this);
}
@@ -282,6 +267,32 @@ int proc_match_t::event_wait(NetEvWait*)
/*
* $Log: functor.cc,v $
* Revision 1.31 2002/08/16 05:18:27 steve
* Fix intermix of node functors and node delete.
*
* Revision 1.30 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2002/08/10 22:07:38 steve
* Remove useless error messages.
*
* Revision 1.28 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.27 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.26 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.25 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.24 2000/11/19 20:48:30 steve
* Fix cases where signal iteration might die early.
*
@@ -293,77 +304,5 @@ int proc_match_t::event_wait(NetEvWait*)
*
* Revision 1.21 2000/08/01 02:48:41 steve
* Support <= in synthesis of DFF and ram devices.
*
* Revision 1.20 2000/07/16 04:56:07 steve
* Handle some edge cases during node scans.
*
* Revision 1.19 2000/07/15 05:13:43 steve
* Detect muxing Vz as a bufufN.
*
* Revision 1.18 2000/05/02 00:58:12 steve
* Move signal tables to the NetScope class.
*
* Revision 1.17 2000/04/20 00:28:03 steve
* Catch some simple identity compareoptimizations.
*
* Revision 1.16 2000/04/18 04:50:19 steve
* Clean up unneeded NetEvent objects.
*
* Revision 1.15 2000/04/16 23:32:18 steve
* Synthesis of comparator in expressions.
*
* Connect the NetEvent and related classes
* together better.
*
* Revision 1.14 2000/04/12 20:02:53 steve
* Finally remove the NetNEvent and NetPEvent classes,
* Get synthesis working with the NetEvWait class,
* and get started supporting multiple events in a
* wait in vvm.
*
* Revision 1.13 2000/04/01 21:40:22 steve
* Add support for integer division.
*
* Revision 1.12 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.11 2000/02/13 04:35:43 steve
* Include some block matching from Larry.
*
* Revision 1.10 2000/01/13 03:35:35 steve
* Multiplication all the way to simulation.
*
* Revision 1.9 2000/01/02 17:57:20 steve
* Handle nodes running out during node scan.
*
* Revision 1.8 1999/12/30 04:19:12 steve
* Propogate constant 0 in low bits of adders.
*
* Revision 1.7 1999/12/17 06:18:16 steve
* Rewrite the cprop functor to use the functor_t interface.
*
* Revision 1.6 1999/12/05 02:24:08 steve
* Synthesize LPM_RAM_DQ for writes into memories.
*
* Revision 1.5 1999/12/01 06:06:16 steve
* Redo synth to use match_proc_t scanner.
*
* Revision 1.4 1999/11/18 03:52:19 steve
* Turn NetTmp objects into normal local NetNet objects,
* and add the nodangle functor to clean up the local
* symbols generated by elaboration and other steps.
*
* Revision 1.3 1999/11/01 02:07:40 steve
* Add the synth functor to do generic synthesis
* and add the LPM_FF device to handle rows of
* flip-flops.
*
* Revision 1.2 1999/07/18 05:52:46 steve
* xnfsyn generates DFF objects for XNF output, and
* properly rewrites the Design netlist in the process.
*
* Revision 1.1 1999/07/17 22:01:13 steve
* Add the functor interface for functor transforms.
*
*/
+15 -31
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: functor.h,v 1.17 2000/09/17 21:26:15 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.h,v 1.20 2002/08/12 01:34:59 steve Exp $"
#endif
/*
@@ -83,9 +83,7 @@ struct proc_match_t {
virtual ~proc_match_t();
virtual int assign(class NetAssign*);
virtual int assign_mem(class NetAssignMem*);
virtual int assign_nb(class NetAssignNB*);
virtual int assign_mem_nb(class NetAssignMemNB*);
virtual int condit(class NetCondit*);
virtual int event_wait(class NetEvWait*);
virtual int block(class NetBlock*);
@@ -94,6 +92,19 @@ struct proc_match_t {
/*
* $Log: functor.h,v $
* Revision 1.20 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.19 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.18 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.17 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
@@ -108,32 +119,5 @@ struct proc_match_t {
*
* Revision 1.13 2000/04/20 00:28:03 steve
* Catch some simple identity compareoptimizations.
*
* Revision 1.12 2000/04/18 04:50:19 steve
* Clean up unneeded NetEvent objects.
*
* Revision 1.11 2000/04/12 20:02:53 steve
* Finally remove the NetNEvent and NetPEvent classes,
* Get synthesis working with the NetEvWait class,
* and get started supporting multiple events in a
* wait in vvm.
*
* Revision 1.10 2000/04/01 21:40:22 steve
* Add support for integer division.
*
* Revision 1.9 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.8 2000/02/13 04:35:43 steve
* Include some block matching from Larry.
*
* Revision 1.7 2000/01/13 03:35:35 steve
* Multiplication all the way to simulation.
*
* Revision 1.6 1999/12/30 04:19:12 steve
* Propogate constant 0 in low bits of adders.
*
* Revision 1.5 1999/12/17 06:18:16 steve
* Rewrite the cprop functor to use the functor_t interface.
*/
#endif
+39
View File
@@ -0,0 +1,39 @@
Throughout Icarus Verilog descriptions and source code, I use a
variety of terms and acronyms that might be specific to Icarus
Verilog, have an Icarus Verilog specific meaning, or just aren't
widely known. So here I define these terms.
LRM - Language Reference Manual
This is a generic acronym, but in the Verilog world we sometimes
mean *the* language reference manual, the IEEE1364 standard.
PLI - Programming Language Interface
This is a C API into Verilog simulators that is defined by the
IEEE1364. There are two major interfaces, sometimes called PLI 1
and PLI 2. PLI 2 is also often called VPI.
UDP - User Defined Primitive
These are objects that Verilog programmers define with the
"primitive" keyword. They are truth-table based devices. The
syntax for defining them is described in the LRM.
VPI -
This is the C API that is defined by the Verilog standard, and
that Icarus Verilog partially implements. See also PLI.
VVM - Verilog Virtual Machine
This is the Icarus Verilog runtime that works with the code
generator that generates C++.
VVP - Verilog Virtual Processor
This is the Icarus Verilog runtime that reads in custom code in a
form that I call "VVP Assembly". See the vvp/ directory for
documentation on that.
+159 -5
View File
@@ -86,7 +86,7 @@ tool so it is not clear that the standard really is at fault. It is
clear, however, that somebody goofed somewhere.
My personal opinion is that there is no logical need to require that
all module_item_declarations preceed any other module items. I
all module_item_declarations precede any other module items. I
personally would oppose such a restriction. It may make sense to
require that declarations of variables within a module be preceded by
their use, although even that is not necessary for the implementation
@@ -97,7 +97,7 @@ sample2 can have implications that affect any declaration order
rules. When reaching into a module with a hierarchical name, the
module being referenced is already completely declared (or not
declared at all, as in sample2) so module_item order is completely
irrelevent. But a "declare before use" rule would infect module
irrelevant. But a "declare before use" rule would infect module
ordering, by requiring that modules that are used be first defined.
@@ -141,7 +141,7 @@ ports.
With the above in mind, I have decided to *allow* function and task
ports to be declared with types, as long as the types are variable
types, such ag reg or integer. Without this, there would be no
types, such as reg or integer. Without this, there would be no
portable way to pass integers into functions/tasks. The standard does
not say it is allowed, but it doesn't *disallow* it, and other
commercial tools seem to work similarly.
@@ -172,7 +172,7 @@ take it that x is allowed, as that is what Verilog-XL does.
There seems to be ambiguity in how code like this should be parsed:
repeat (5) @(posedge clk) <statment>;
repeat (5) @(posedge clk) <statement>;
There are two valid interpretations of this code, from the
IEEE1364-1995 standard. One looks like this:
@@ -268,8 +268,162 @@ comparison operators or the reduction operators. Icarus Verilog will
generate appropriate error messages.
$Id: ieee1364-notes.txt,v 1.7 2001/02/17 05:27:31 steve Exp $
* MODULE INSTANCE WITH WRONG SIZE PORT LIST
A module declaration like this declares a module that takes three ports:
module three (a, b, c);
input a, b, c;
reg x;
endmodule
This is fine and obvious. It is also clear from the standard that
these are legal instantiations of this module:
three u1 (x,y,z);
three u2 ( ,y, );
three u3 ( , , );
three u4 (.b(y));
In some of the above examples, there are unconnected ports. In the
case of u4, the pass by name connects only port b, and leaves a and c
unconnected. u2 and u4 are the same thing, in fact, but using
positional or by-name syntax. The next example is a little less
obvious:
three u4 ();
The trick here is that strictly speaking, the parser cannot tell
whether this is a list of no pass by name ports (that is, all
unconnected) or an empty positional list. If this were an empty
positional list, then the wrong number of ports is given, but if it is
an empty by-name list, it is an obviously valid instantiation. So it
is fine to accept this case as valid.
These are more doubtful:
three u5(x,y);
three u6(,);
These are definitely positional port lists, and they are definitely
the wrong length. In this case, the standard is not explicit about
what to do about positional port lists in module instantiations,
except that the first is connected to the first, second to second,
etc. It does not say that the list must be the right length, but every
example of unconnected ports used by-name syntax, and every example of
ordered list has the right size list.
Icarus Verilog takes the (very weak) hint that ordered lists should be
the right length, and will therefore flag instances u5 and u6 as
errors. The IEEE1364 standard should be more specific one way or the
other.
* UNKNOWN VALUES IN L-VALUE BIT SELECTS
Consider this example:
reg [7:0] vec;
wire [4:0] idx = <expr>;
[...]
vec[idx] = 1;
So long as the value of idx is a valid bit select address, the
behavior of this assignment is obvious. However, there is no explicit
word in the standard as to what happens if the value is out of
range. The standard clearly states the value of an expression when the
bit-select or part select is out of range (the value is x) but does
not address the behavior when the expression is an l-value.
Icarus Verilog will take the position that bit select expressions in
the l-value will select oblivion if it is out of range. That is, if
idx has a value that is not a valid bit select of vec, then the
assignment will have no effect.
* SCHEDULING VALUES IN LOGIC
The interaction between blocking assignments in procedural code and
logic gates in gate-level code and expressions is poorly defined in
Verilog. Consider this example:
reg a;
reg b;
wire q = a & b;
initial begin
a = 1;
b = 0;
#1 b = 1;
if (q !== 0) begin
$display("FAILED -- q changed too soon? %b", q);
$finish;
end
end
This is a confusing situation. It is clear from the Verilog standard
that an assignment to a variable using a blocking assign causes the
l-value to receive the value before the assignment completes. This
means that a subsequent read of the assigned variable *must* read back
what was blocking-assigned.
However, in the example above, the "wire q = a & b" expresses some
gate logic between a/b and q. The standard does not say whether a read
out of logic should read the value computed from previous assigns to
the input from the same thread. Specifically, when "a" and "b" are
assigned by blocking assignments, will a read of "q" get the computed
value or the existing value?
In fact, existing commercial tools do it both ways. Some tools print
the FAILED message in the above example, and some do not. Icarus
Verilog does not print the FAILED message in the above example,
because the gate value change is *scheduled* when inputs are assigned,
but not propagated until the thread gives up the processor.
Icarus Verilog chooses this behavior in order to filter out zero-width
pulses as early as possible. The implication of this is that a read of
the output of combinational logic will most likely *not* reflect the
changes in inputs until the thread that changed the inputs yields
execution.
* BIT AND PART SELECTS OF PARAMETERS
Bit and part selects are supposed to only be supported on vector nets
and variables (wires, regs, etc.) However, it is common for Verilog
compilers to also support bit and part select on parameters. Icarus
Verilog also chooses to support bit and part selects on parameter
names, but we need to define what that means.
A bit or a part select on a parameter expression returns an unsigned
value with a defined size. The parameter value is considered be a
constant vector of bits foo[X:0]. That is, zero based. The bit and
part selects operate from that assumption.
Verilog 2001 adds syntax to allow the user to explicitly declare the
parameter range (i.e. parameter [5:0] foo = 9;) so Icarus Verilog will
(or should) use the explicitly declared vector dimensions to interpret
bit and part selects.
$Id: ieee1364-notes.txt,v 1.13 2002/08/20 04:11:53 steve Exp $
$Log: ieee1364-notes.txt,v $
Revision 1.13 2002/08/20 04:11:53 steve
Support parameters with defined ranges.
Revision 1.12 2002/06/11 03:34:33 steve
Spelling patch (Larry Doolittle)
Revision 1.11 2002/04/27 02:38:04 steve
Support selecting bits from parameters.
Revision 1.10 2002/03/31 01:54:13 steve
Notes about scheduling
Revision 1.9 2002/01/26 02:08:07 steve
Handle x in l-value of set/x
Revision 1.8 2001/08/01 05:17:31 steve
Accept empty port lists to module instantiation.
Revision 1.7 2001/02/17 05:27:31 steve
I allow function ports to have types.
+72
View File
@@ -0,0 +1,72 @@
.TH iverilog-vpi 1 "$Date: 2002/11/23 00:51:53 $" Version "$Date: 2002/11/23 00:51:53 $"
.SH NAME
iverilog-vpi - Compile front end for VPI modules
.SH SYNOPSIS
.B iverilog-vpi
[--name=\fIname\fP]
\fIsourcefile\fP...
.SH DESCRIPTION
.PP
\fIiverilog-vpi\fP is a tool to simplify the compilation of VPI
modules for use with Icarus Verilog. It takes on the command line a
list of C or C++ source files, and generates as output a linked VPI
module. See the \fBvvp\fP(1) man page for a description of how the
linked module is loaded by a simulation.
The output is named after the first source file. For example, if the
first source file is named \fIfoo.c\fP, the output becomes
\fIfoo.vpi\fP.
.SH OPTIONS
.l
\fIiverilog-vpi\fP accepts the following options:
.TP 8
.B -l\fIlibrary\fP
Include the named library in the link of the VPI module. This allows
VPI modules to further reference external libraries.
.TP 8
.B --name=\fIname\fP
Normally, the output VPI module will be named after the first source
file passed to the command. This flag sets the name (without the .vpi
suffix) of the output vpi module.
.SH "PC-ONLY OPTIONS"
The PC port of \fIiverilog-vpi\fP includes two special flags needed to
support the more intractable development environment. These flags help
the program locate parts that it needs.
.TP 8
.B -mingw=\fIpath\fP
Tell the program the root of the Mingw compiler tool suite. The
\fBvvp\fP runtime is compiled with this compiler, and this is the
compiler that \fIiverilog-vpi\fP expects to use to compile your source
code. This is notmally not needed, and if you do use it, it is only
needed once. The compiler will save the \fIpath\fP in the registry for
use later.
.TP 8
.B -ivl=\fIpath\fP
Set for the use during compilation the root if the Icarus Verilog
install. This is the place where you installed Icarus Verilog when you
ran the installer. This flag is also only needed once, and the path is
stored in the registry for future use.
.SH "AUTHOR"
.nf
Steve Williams ([email protected])
.SH SEE ALSO
iverilog(1), vvp(1),
.BR "<http://www.icarus.com/eda/verilog/>",
.BR "<http://www.mingw.org>",
.SH COPYRIGHT
.nf
Copyright \(co 2002 Stephen Williams
This document can be freely redistributed according to the terms of the
GNU General Public License version 2.0
+114
View File
@@ -0,0 +1,114 @@
#!/bin/sh
#
# This source code is free software; you can redistribute it
# and/or modify it in source code form under the terms of the GNU
# Library General Public License as published by the Free Software
# Foundation; either version 2 of the License, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Library General Public License for more details.
#
# You should have received a copy of the GNU Library General Public
# License along with this program; if not, write to the Free
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: iverilog-vpi.sh,v 1.9 2002/10/19 23:18:52 steve Exp $"
# These are the variables used for compiling files
CC=gcc
CXX=gcc
CFLAGS="@PIC@ -O -I@INCLUDEDIR@"
# These are used for linking...
LD=gcc
LDFLAGS="@SHARED@"
LDLIBS="-L@LIBDIR@ -lveriuser -lvpi"
CCSRC=
CXSRC=
OBJ=
LIB=
OUT=
# --
# parse the command line switches. This collects the source files
# and precompiled object files, and maybe user libraries. As we are
# going, guess an output file name.
for parm
do
case $parm
in
*.c) CCSRC="$CCSRC $parm"
if [ x$OUT = x ]; then
OUT=`basename $parm .c`
fi
;;
*.cc) CXSRC="$CXSRC $parm"
if [ x$OUT = x ]; then
OUT=`basename $parm .cc`
fi
;;
*.o) OBJ="$OBJ $parm"
if [ x$OUT = x ]; then
OUT=`basename $parm .o`
fi
;;
--name=*)
OUT=`echo $parm | cut -b8-`
;;
-l*) LIB="$LIB $parm"
;;
esac
done
if [ x$OUT = x ]; then
echo "Usage: $0 [src and obj files]..."
exit 0
fi
# Put the .vpi on the result file.
OUT=$OUT".vpi"
compile_errors=0
# Compile all the source files into object files
for src in $CCSRC
do
base=`basename $src .c`
obj=$base".o"
echo "Compiling $src..."
$CC -c -o $obj $CFLAGS $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
for src in $CXSRC
do
base=`basename $src .cc`
obj=$base".o"
echo "Compiling $src..."
$CXX -c -o $obj $CFLAGS $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
if test $compile_errors -gt 0
then
echo "Some ($compile_errors) files failed to compile."
exit $compile_errors
fi
echo "Making $OUT from $OBJ..."
exec $LD -o $OUT $LDFLAGS $OBJ $LIB $LDLIBS
+16 -17
View File
@@ -28,10 +28,16 @@
#
# %B Substitute the base libdir, -B flag of iverilog.
#
# %C Substitute the path to the temporary config file.
#
# %f Substitute the -f flags from the command line.
#
# %g Substitule the -g flag
#
# %s Substitute the start module (-s flag) from the user.
#
# %M Substitute the value of the -M<depfile> flag.
#
# %N Substitute the value of the -N<path> flag.
#
# %o Substitute the value of the -o<path> flag, or the default
@@ -56,39 +62,32 @@
# be useful and interesting if the -N flag is included.
[-tnull -S]
<ivl>%B/ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -- -
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -Fsynth -Fsyn-rules -- -
[-tnull]
<ivl>%B/ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -- -
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/null.tgt -- -
# --
# The vvp target generates code that the vvp simulation engine can execute.
# These rules support synthesized and non-synthesized variants.
[-tvvp -S]
<ivl>%B/ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle %f %m -o%o -- -
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fsynth2 -Fsynth -Fsyn-rules -Fcprop -Fnodangle %f %m -o%o -- -
[-tvvp]
<ivl>%B/ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -Fcprop -Fnodangle %f %m -o%o -- -
<ivl>%B/ivl %[v-v] -C%C %g %W %s %[M-M%M] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/vvp.tgt -fVVP_EXECUTABLE=%B/../../bin/vvp -Fcprop -Fnodangle %f %m -o%o -- -
# --
# The vvm target uses the <ivl> string to take the preprocessed code from
# standard input, compile it with the vvm code generator and write the
# result to %o.cc. The driver assumes this when invoking the C++ compiler
# on the result.
[-tvvm]
<ivl>%B/ivl %W %[s-s%s] %[N-N%N] %[T-T%T] -tvvm -Fcprop -Fnodangle -fVPI_MODULE_PATH=%B %f %m -o%o.cc -- -
# -- (not supported yet)
# This is the XNF code generator.
[-txnf]
<ivl>%B/ivl %[s-s%s] %[N-N%N] %[T-T%T] -tvvm -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- -
<ivl>%B/ivl -C%C %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] -txnf -Fsynth -Fsyn-rules -Fxnfio -Fcprop -Fnodangle -o%o -- -
# And this is another XNF code generator, under development.
[-tfpga]
<ivl>%B/ivl -C%C %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/fpga.tgt -Fsynth2 -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- -
# --
# This is the pal code generator. The target module requires the -fpart=<type>
# flag to specify the part type.
[-tpal]
<ivl>%B/ivl %[s-s%s] %[N-N%N] %[T-T%T] -tdll -fDLL=%B/pal.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- -
<ivl>%B/ivl -C%C %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] %f -tdll -fDLL=%B/pal.tgt -Fsynth -Fsyn-rules -Fcprop -Fnodangle -o%o -- -
+92 -6
View File
@@ -1,16 +1,32 @@
EXPORTS
ivl_design_const
ivl_design_consts
ivl_design_flag
ivl_design_process
ivl_design_root
ivl_design_roots
ivl_design_time_precision
ivl_const_bits
ivl_const_pin
ivl_const_pins
ivl_const_signed
ivl_event_any
ivl_event_basename
ivl_event_name
ivl_event_nany
ivl_event_neg
ivl_event_nneg
ivl_event_npos
ivl_event_pos
ivl_expr_type
ivl_expr_bits
ivl_expr_def
ivl_expr_lsi
ivl_expr_memory
ivl_expr_name
ivl_expr_opcode
ivl_expr_oper1
@@ -19,73 +35,143 @@ ivl_expr_oper3
ivl_expr_parm
ivl_expr_parms
ivl_expr_repeat
ivl_expr_scope
ivl_expr_signal
ivl_expr_signed
ivl_expr_string
ivl_expr_uvalue
ivl_expr_width
ivl_logic_attr
ivl_logic_attr_cnt
ivl_logic_attr_val
ivl_logic_delay
ivl_logic_name
ivl_logic_basename
ivl_logic_scope
ivl_logic_type
ivl_logic_pin
ivl_logic_pins
ivl_logic_udp
ivl_lpm_aset_value
ivl_lpm_async_clr
ivl_lpm_async_set
ivl_lpm_basename
ivl_lpm_clk
ivl_lpm_data
ivl_lpm_datab
ivl_lpm_data2
ivl_lpm_data2_width
ivl_lpm_define
ivl_lpm_enable
ivl_lpm_memory
ivl_lpm_name
ivl_lpm_q
ivl_lpm_scope
ivl_lpm_select
ivl_lpm_selects
ivl_lpm_size
ivl_lpm_type
ivl_lpm_width
ivl_lpm_ff
ivl_lpm_ff_clk
ivl_lpm_ff_data
ivl_lpm_ff_q
ivl_lval_idx
ivl_lval_mem
ivl_lval_mux
ivl_lval_part_off
ivl_lval_pin
ivl_lval_pins
ivl_lval_sig
ivl_memory_basename
ivl_memory_root
ivl_memory_scope
ivl_memory_size
ivl_memory_width
ivl_nexus_get_private
ivl_nexus_name
ivl_nexus_ptrs
ivl_nexus_ptr
ivl_nexus_set_private
ivl_nexus_ptr_con
ivl_nexus_ptr_drive0
ivl_nexus_ptr_drive1
ivl_nexus_ptr_pin
ivl_nexus_ptr_lpm
ivl_nexus_ptr_log
ivl_nexus_ptr_sig
ivl_scope_basename
ivl_scope_children
ivl_scope_def
ivl_scope_event
ivl_scope_events
ivl_scope_logs
ivl_scope_log
ivl_scope_lpms
ivl_scope_lpm
ivl_scope_mem
ivl_scope_mems
ivl_scope_name
ivl_scope_parent
ivl_scope_port
ivl_scope_ports
ivl_scope_sigs
ivl_scope_sig
ivl_scope_time_units
ivl_scope_type
ivl_scope_tname
ivl_signal_attr
ivl_signal_attr_cnt
ivl_signal_attr_val
ivl_signal_integer
ivl_signal_local
ivl_signal_pin
ivl_signal_pins
ivl_signal_port
ivl_signal_signed
ivl_signal_type
ivl_signal_name
ivl_signal_basename
ivl_process_type
ivl_process_attr_cnt
ivl_process_attr_val
ivl_process_scope
ivl_process_stmt
ivl_process_type
ivl_statement_type
ivl_stmt_block_count
ivl_stmt_block_scope
ivl_stmt_block_stmt
ivl_stmt_call
ivl_stmt_case_count
ivl_stmt_case_expr
ivl_stmt_case_stmt
ivl_stmt_cond_expr
ivl_stmt_cond_false
ivl_stmt_cond_true
ivl_stmt_delay_expr
ivl_stmt_delay_val
ivl_stmt_event
ivl_stmt_lval
ivl_stmt_lvals
ivl_stmt_lwidth
ivl_stmt_name
ivl_stmt_nexus
ivl_stmt_nexus_count
ivl_stmt_parm
ivl_stmt_parm_count
ivl_stmt_rval
ivl_stmt_sub_stmt
ivl_udp_init
ivl_udp_name
ivl_udp_nin
ivl_udp_row
ivl_udp_rows
ivl_udp_sequ
+573 -169
View File
File diff suppressed because it is too large Load Diff
+51
View File
@@ -0,0 +1,51 @@
Icarus Verilog LOADABLE TARGET API (ivl_target)
Copyright 2002 Stephen Williams <[email protected]>
$Id: ivl_target.txt,v 1.3 2002/06/11 03:34:33 steve Exp $
The ivl_target API is the interface available to modules that the
Icarus Verilog compiler loads to act as a code generator. The API
provides an interface to the elaborated, possibly synthesized, design
for code generators that are intended to write netlist files or
executable programs.
The functions and types of the API are summarized in the ivl_target.h
header file. This document describes how the functions and types of
the API are used to access and interpret the netlist of the design.
LPM DEVICES
All LPM devices support a small set of common LPM functions, as
described in the ivl_target header file. The ivl_lpm_t object has a
type enumerated by ivl_lpm_type_t, and that type is accessible via the
ivl_lpm_type function.
The following are type specific aspects of LPM devices.
* IVL_LPM_UFUNC
This LPM represents a user defined function. It is a way to connect
behavioral code into a structural network. The UFUNC device has a
vector output and a set of inputs. The ivl_lpm_define function returns
the definition as an ivl_scope_t object.
The output vector is accessible through the ivl_lpm_q, and the output
has the width defined by ivl_lpm_width. This similar to most every
other LPM device with outputs.
There are ivl_lpm_size() input ports, each with the width
ivl_lpm_data2_width(). The actual nexus is indexed by ivl_lpm_data2().
$Log: ivl_target.txt,v $
Revision 1.3 2002/06/11 03:34:33 steve
Spelling patch (Larry Doolittle)
Revision 1.2 2002/03/17 19:31:17 steve
Add API to support user defined function.
Revision 1.1 2002/03/09 02:10:22 steve
Add the NetUserFunc netlist node.
+5 -5
View File
@@ -18,7 +18,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.9 2001/01/09 03:11:28 steve Exp $"
#ident "$Id: Makefile.in,v 1.12 2001/08/10 00:39:22 steve Exp $"
#
#
SHELL = /bin/sh
@@ -41,8 +41,8 @@ INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -I.
LDFLAGS = @LDFLAGS@
CFLAGS = @CFLAGS@ -I. -I$(srcdir)/..
LDFLAGS = @LDFLAGS@
all: ivlpp
@@ -52,13 +52,13 @@ clean:
O = main.o lexor.o parse.o
ivlpp: $O
$(CC) $(LDFLAGS) $O -o ivlpp
$(CC) $(LDFLAGS) $O -o ivlpp @EXTRALIBS@
lexor.c: lexor.lex
flex -s -olexor.c $(srcdir)/lexor.lex
parse.h parse.c: parse.y
bison --verbose -t -d $(srcdir)/parse.y -o parse.c
bison --verbose -t -d -o parse.c $(srcdir)/parse.y
install: all installdirs $(libdir)/ivl/ivlpp
+10 -2
View File
@@ -18,8 +18,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: globals.h,v 1.5 2000/09/13 22:33:13 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: globals.h,v 1.7 2002/08/12 01:35:02 steve Exp $"
#endif
# include <stdio.h>
@@ -37,11 +37,19 @@ extern int line_direct_flag;
extern unsigned error_count;
extern FILE *depend_file;
/* This is the entry to the parser. */
extern int yyparse();
/*
* $Log: globals.h,v $
* Revision 1.7 2002/08/12 01:35:02 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.5 2000/09/13 22:33:13 steve
* undefined macros are null (with warnings.)
*
+6 -6
View File
@@ -49,7 +49,7 @@ valid options include:
flags as needed.
-L
Generate #line directives. The ivl compiler understands
Generate `line directives. The ivl compiler understands
these directives and uses them to keep track of the
current line of the original source file. This makes error
messages more meaningful.
@@ -89,17 +89,17 @@ proper will not reflect the actual line numbers in the source file.
To handle this situation, the preprocessor can generate line
directives. These directives are lines of the form:
#line <name> <num>
`line <num> <name> <level>
where <name> is the file name in double-quotes and <num> is the line
number in the file. The parser changes the filename and line number
counters in such a way that the next line is line number <num>+1 in
counters in such a way that the next line is line number <num> in
the file named <name>. For example:
#line "foo.vl" 5
`line 6 "foo.vl" 0
// I am on line 6 in file foo.vl.
The preprocessor generates a #line directive every time it switches
files. That includes starting an included file (#line "foo.vlh" 0) or
The preprocessor generates a `line directive every time it switches
files. That includes starting an included file (`line 1 "foo.vlh" 1) or
returning to the including file.
+179 -43
View File
@@ -1,7 +1,7 @@
%{
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2002 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,11 +19,16 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: lexor.lex,v 1.23 2001/01/29 22:48:10 steve Exp $"
#ident "$Id: lexor.lex,v 1.36 2002/11/08 00:04:16 steve Exp $"
#endif
# include "config.h"
# include <stdio.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
# include <stdlib.h>
# include <string.h>
# include <assert.h>
@@ -38,6 +43,7 @@ static void def_start();
static void def_finish();
static void def_undefine();
static void do_define();
static int def_is_done();
static int is_defined(const char*name);
static void include_filename();
@@ -61,6 +67,8 @@ struct include_stack_t {
struct include_stack_t*next;
};
static void emit_pathline(struct include_stack_t *isp);
static struct include_stack_t*file_queue = 0;
static struct include_stack_t*istack = 0;
static struct include_stack_t*standby = 0;
@@ -84,6 +92,7 @@ static int comment_enter = 0;
%x PPINCLUDE
%x PPDEFINE
%x CCOMMENT
%x PCOMENT
%x CSTRING
%x ERROR_LINE
@@ -106,6 +115,15 @@ W [ \t\b\f]+
<CCOMMENT>\n { istack->lineno += 1; ECHO; }
<CCOMMENT>"*/" { BEGIN(comment_enter); ECHO; }
/* Detect and pass multiline pragma comments. As with C-style
comments, pragma comments are passed through, and CPP directives
contained within are ignored. */
"(*" { comment_enter = YY_START; BEGIN(PCOMENT); ECHO; }
<PCOMENT>. { ECHO; }
<PCOMENT>\n { istack->lineno += 1; ECHO; }
<PCOMENT>"*)" { BEGIN(comment_enter); ECHO; }
/* Strings do not contain macros or preprocessor directives. */
\" { comment_enter = YY_START; BEGIN(CSTRING); ECHO; }
<CSTRING>\\\" { yymore(); }
@@ -119,6 +137,7 @@ W [ \t\b\f]+
^{W}?`include { yy_push_state(PPINCLUDE); }
<PPINCLUDE>`[a-zA-Z][a-zA-Z0-9_]* { def_match(); }
<PPINCLUDE>\"[^\"]*\" { include_filename(); }
<PPINCLUDE>[ \t\b\f] { ; }
@@ -140,9 +159,9 @@ W [ \t\b\f]+
/* Anything that is not matched by the above is an error of some
sort. Print and error message and absorb the rest of the line. */
<PPINCLUDE>. {
fprintf(stderr, "%s:%u: error: malformed `include directive."
" Did you quote the file name?\n", istack->path,
istack->lineno+1);
emit_pathline(istack);
fprintf(stderr, "error: malformed `include directive."
" Did you quote the file name?\n");
error_count += 1;
BEGIN(ERROR_LINE); }
@@ -151,17 +170,23 @@ W [ \t\b\f]+
directive and the name, go into PPDEFINE mode and prepare to
collect the defined value. */
`define{W}[a-zA-Z_][a-zA-Z0-9_]*{W}? { yy_push_state(PPDEFINE); def_start(); }
`define{W}[a-zA-Z_][a-zA-Z0-9_$]*{W}? { yy_push_state(PPDEFINE); def_start(); }
<PPDEFINE>.* { do_define(); }
<PPDEFINE>(\n|"\r\n"|"\n\r") {
def_finish();
istack->lineno += 1;
fputc('\n', yyout);
yy_pop_state();
<PPDEFINE>.* {
do_define();
}
<PPDEFINE>(\n|"\r\n"|"\n\r") {
if (def_is_done()) {
def_finish();
istack->lineno += 1;
yy_pop_state();
}
fputc('\n', yyout);
}
/* If the define is terminated by an EOF, then finish the define
whether there was a continuation or not. */
<PPDEFINE><<EOF>> {
def_finish();
istack->lineno += 1;
@@ -169,7 +194,7 @@ W [ \t\b\f]+
yy_pop_state();
}
`undef{W}[a-zA-Z_][a-zA-Z0-9_]*{W}?.* { def_undefine(); }
`undef{W}[a-zA-Z_][a-zA-Z0-9_$]*{W}?.* { def_undefine(); }
/* Detect conditional compilation directives, and parse them. If I
@@ -181,12 +206,11 @@ W [ \t\b\f]+
condition that stacks on top of the IFDEF_FALSE so that output is
not accidentally turned on within nested ifdefs. */
^{W}?`ifdef{W}[a-zA-Z_][a-zA-Z0-9_]*.* {
`ifdef{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char*name = strchr(yytext, '`');
assert(name);
name += 6;
name += strspn(name, " \t\b\f");
name[strcspn(name, " \t\b\f")] = 0;
if (is_defined(name)) {
yy_push_state(IFDEF_TRUE);
@@ -195,21 +219,36 @@ W [ \t\b\f]+
}
}
<IFDEF_FALSE,IFDEF_SUPR>^{W}?`ifdef{W}.* { yy_push_state(IFDEF_SUPR); }
`ifndef{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char*name = strchr(yytext, '`');
assert(name);
name += 7;
name += strspn(name, " \t\b\f");
<IFDEF_TRUE>{W}?`else.* { BEGIN(IFDEF_FALSE); }
<IFDEF_FALSE>{W}?`else.* { BEGIN(IFDEF_TRUE); }
<IFDEF_SUPR>{W}?`else.* { }
if (!is_defined(name)) {
yy_push_state(IFDEF_TRUE);
} else {
yy_push_state(IFDEF_FALSE);
}
}
<IFDEF_FALSE,IFDEF_SUPR>`ifdef{W} { yy_push_state(IFDEF_SUPR); }
<IFDEF_FALSE,IFDEF_SUPR>`ifndef{W} { yy_push_state(IFDEF_SUPR); }
<IFDEF_TRUE>`else { BEGIN(IFDEF_FALSE); }
<IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
<IFDEF_SUPR>`else { }
<IFDEF_FALSE,IFDEF_SUPR>"//".* { }
<IFDEF_FALSE,IFDEF_SUPR>. { }
<IFDEF_FALSE,IFDEF_SUPR>\n { istack->lineno += 1; fputc('\n', yyout); }
<IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>^{W}?`endif.* {
<IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>`endif {
yy_pop_state();
}
/* This pattern notices macros and arranges for them to be replaced. */
`[a-zA-Z][a-zA-Z0-9_]* { def_match(); }
`[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
/* Any text that is not a directive just gets passed through to the
output. Very easy. */
@@ -284,9 +323,9 @@ static void def_match()
yy_switch_to_buffer(yy_new_buffer(istack->file, YY_BUF_SIZE));
} else {
fprintf(stderr, "%s:%u: warning: macro %s undefined "
"(and assumed null) at this point.\n",
istack->path, istack->lineno, yytext);
emit_pathline(istack);
fprintf(stderr, "warning: macro %s undefined "
"(and assumed null) at this point.\n", yytext);
}
}
@@ -343,33 +382,98 @@ void define_macro(const char*name, const char*value, int keyword)
}
}
/*
* The do_define function accumulates the defined value in these
* variables. When the define is over, the def_finish() function
* executes the define and clears this text. The define_continue_flag
* is set if do_define detects that the definition is to be continued
* on the next line.
*/
static char* define_text = 0;
static size_t define_cnt = 0;
static int define_continue_flag = 0;
/*
* Collect the definition. Normally, this returns 0. If there is a
* continuation, then return 1 and this function may be called again
* to collect another line of the definition.
*/
static void do_define()
{
char *cp;
define_continue_flag = 0;
/* FIXME: This strips trailing line comments out of the
definition. It's not adequate as the "//" may have been
quoted or commented, but it'll do for now. */
char *cp;
if(cp = strstr(yytext, "//"))
*cp = 0;
/* Trim trailing white space. */
cp = yytext + strlen(yytext);
while (cp > yytext) {
cp -= 1;
if (!isspace(*cp))
if (!isspace(cp[-1]))
break;
cp -= 1;
*cp = 0;
}
define_macro(def_name, yytext, 0);
def_name[0] = 0;
/* Detect the continuation sequence. If I find it, remove it
and the white space that preceeds it, then replace all that
with a single newline. */
if ((cp > yytext) && (cp[-1] == '\\')) {
cp -= 1;
cp[0] = 0;
while ((cp > yytext) && isspace(cp[-1])) {
cp -= 1;
*cp = 0;
}
*cp++ = '\n';
*cp = 0;
define_continue_flag = 1;
}
/* Accumulate this text into the define_text string. */
define_text = realloc(define_text, define_cnt + (cp-yytext) + 1);
strcpy(define_text+define_cnt, yytext);
define_cnt += cp-yytext;
}
/*
* Return true if the definition text is done. This is the opposite of
* the define_continue_flag.
*/
static int def_is_done()
{
return define_continue_flag? 0 : 1;
}
/*
* After some number of calls to do_define, this function is called to
* assigned value to the parsed name. If there is no value, then
* assign the string "1"
*/
static void def_finish()
{
if (def_name[0])
define_macro(def_name, "1", 0);
define_continue_flag = 0;
if (def_name[0]) {
if (define_text) {
define_macro(def_name, define_text, 0);
free(define_text);
define_text = 0;
define_cnt = 0;
} else {
define_macro(def_name, "1", 0);
}
def_name[0] = 0;
}
}
static void def_undefine()
@@ -475,12 +579,16 @@ static void def_undefine()
static void output_init()
{
if (line_direct_flag)
fprintf(yyout, "#line \"%s\" 0\n", istack->path);
fprintf(yyout, "`line 1 \"%s\" 0\n", istack->path);
}
static void include_filename()
{
assert(standby == 0);
if(standby) {
emit_pathline(istack);
fprintf(stderr, "error: malformed `include directive. Extra junk on line?\n");
exit(1);
}
standby = malloc(sizeof(struct include_stack_t));
standby->path = strdup(yytext+1);
standby->path[strlen(standby->path)-1] = 0;
@@ -492,7 +600,9 @@ static void do_include()
if (standby->path[0] == '/') {
standby->file = fopen(standby->path, "r");
if(depend_file && standby->file) {
fprintf(depend_file, "%s\n", istack->path);
}
} else {
unsigned idx = 0;
standby->file = 0;
@@ -500,14 +610,18 @@ static void do_include()
char path[4096];
sprintf(path, "%s/%s", include_dir[idx], standby->path);
standby->file = fopen(path, "r");
if (standby->file)
if (standby->file) {
if(depend_file) {
fprintf(depend_file, "%s\n", path);
}
break;
}
}
}
if (standby->file == 0) {
perror(standby->path);
fprintf(stderr, "%s:%u: Include file %s not found\n",
istack->path, istack->lineno, standby->path);
exit(1);
}
@@ -519,8 +633,24 @@ static void do_include()
yy_switch_to_buffer(yy_new_buffer(istack->file, YY_BUF_SIZE));
if (line_direct_flag && istack->path)
fprintf(yyout, "\n#line \"%s\" %u\n",
istack->path, istack->lineno);
fprintf(yyout, "\n`line %u \"%s\" 1\n",
istack->lineno+1, istack->path);
}
/* walk the include stack until we find an entry with a valid pathname,
* and print the file and line from that entry for use in an error message.
* The istack entries created by def_match() for macro expansions do not
* contain pathnames. This finds instead the real file in which the outermost
* macro was used.
*/
static void emit_pathline(struct include_stack_t*isp)
{
while(isp && (isp->path == NULL)) {
isp = isp->next;
}
assert(isp);
fprintf(stderr, "%s:%u: ",
isp->path, isp->lineno+1);
}
/*
@@ -572,7 +702,10 @@ static int yywrap()
}
if (line_direct_flag)
fprintf(yyout, "\n#line \"%s\" 0\n", istack->path);
fprintf(yyout, "\n`line 1 \"%s\" 0\n", istack->path);
if(depend_file) {
fprintf(depend_file, "%s\n", istack->path);
}
yyrestart(istack->file);
return 0;
@@ -585,8 +718,8 @@ static int yywrap()
yy_switch_to_buffer(istack->yybs);
if (line_direct_flag && istack->path && !line_mask_flag)
fprintf(yyout, "\n#line \"%s\" %u\n",
istack->path, istack->lineno);
fprintf(yyout, "\n`line %u \"%s\" 2\n",
istack->lineno+1, istack->path);
return 0;
}
@@ -608,6 +741,9 @@ void reset_lexor(FILE*out, char*paths[])
perror(paths[0]);
exit(1);
}
if(depend_file) {
fprintf(depend_file, "%s\n", paths[0]);
}
yyout = out;
+146 -10
View File
@@ -16,10 +16,12 @@ const char COPYRIGHT[] =
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: main.c,v 1.8 2000/12/06 05:15:21 steve Exp $"
#ifdef HAVE_CVS_IDENT
#ident "$Id: main.c,v 1.16 2002/08/12 01:35:02 steve Exp $"
#endif
# include "config.h"
const char NOTICE[] =
" This program is free software; you can redistribute it and/or modify\n"
" it under the terms of the GNU General Public License as published by\n"
@@ -39,7 +41,10 @@ const char NOTICE[] =
const char VERSION[] = "$Name: $ $State: Exp $";
# include <stdio.h>
# include <stdlib.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
#endif
# include <unistd.h>
# include <string.h>
#if defined(HAVE_GETOPT_H)
@@ -47,18 +52,81 @@ const char VERSION[] = "$Name: $ $State: Exp $";
#endif
# include "globals.h"
#if defined(__MINGW32__) && !defined(HAVE_GETOPT_H)
extern int getopt(int argc, char*argv[], const char*fmt);
extern int optind;
extern const char*optarg;
#endif
/*
* Keep in source_list an array of pointers to file names. The array
* is terminated by a pointer to null.
*/
static char**source_list = 0;
static unsigned source_cnt = 0;
void add_source_file(const char*name)
{
if (source_list == 0) {
source_list = calloc(2, sizeof(char*));
source_list[0] = strdup(name);
source_list[1] = 0;
source_cnt = 1;
} else {
source_list = realloc(source_list, sizeof(char*) * (source_cnt+2));
source_list[source_cnt+0] = strdup(name);
source_list[source_cnt+1] = 0;
source_cnt += 1;
}
}
char**include_dir = 0;
unsigned include_cnt = 0;
int line_direct_flag = 0;
unsigned error_count = 0;
FILE *depend_file = NULL;
/*
* This function reads from a file a list of file names. Each name
* starts with the first non-space character, and ends with the last
* non-space character. Spaces in the middle are OK.
*/
static int flist_read_names(const char*path)
{
char line_buf[2048];
FILE*fd = fopen(path, "r");
if (fd == 0) {
fprintf(stderr, "%s: unable to open for reading.\n", path);
return 1;
}
while (fgets(line_buf, sizeof line_buf, fd) != 0) {
char*cp = line_buf + strspn(line_buf, " \t\r\b\f");
char*tail = cp + strlen(cp);
while (tail > cp) {
if (! isspace(tail[-1]))
break;
tail -= 1;
tail[0] = 0;
}
if (cp < tail)
add_source_file(cp);
}
return 0;
}
int main(int argc, char*argv[])
{
int opt;
int opt, idx;
const char*flist_path = 0;
unsigned flag_errors = 0;
char*out_path = 0;
char *dep_path = NULL;
FILE*out;
/* Define preprocessor keywords that I plan to just pass. */
@@ -84,7 +152,7 @@ int main(int argc, char*argv[])
include_dir[0] = strdup(".");
include_cnt = 1;
while ((opt = getopt(argc, argv, "D:I:K:Lo:v")) != EOF) switch (opt) {
while ((opt = getopt(argc, argv, "D:f:I:K:LM:o:v")) != EOF) switch (opt) {
case 'D': {
char*tmp = strdup(optarg);
@@ -99,6 +167,14 @@ int main(int argc, char*argv[])
break;
}
case 'f':
if (flist_path) {
fprintf(stderr, "%s: duplicate -f flag\n", argv[0]);
flag_errors += 1;
}
flist_path = optarg;
break;
case 'I':
include_dir = realloc(include_dir, (include_cnt+1)*sizeof(char*));
include_dir[include_cnt] = strdup(optarg);
@@ -118,6 +194,14 @@ int main(int argc, char*argv[])
line_direct_flag = 1;
break;
case 'M':
if (dep_path) {
fprintf(stderr, "duplicate -M flag.\n");
} else {
dep_path = optarg;
}
break;
case 'o':
if (out_path) {
fprintf(stderr, "duplicate -o flag.\n");
@@ -138,21 +222,35 @@ int main(int argc, char*argv[])
break;
}
if (optind == argc)
flag_errors += 1;
if (flag_errors) {
fprintf(stderr, "\nUsage: %s [-v][-L][-I<dir>][-D<def>] <file>...\n"
" -D<def> - Predefine a value.\n"
" -f<fil> - Read the sources listed in the file\n"
" -I<dir> - Add an include file search directory\n"
" -K<def> - Define a keyword macro that I just pass\n"
" -L - Emit line number directives\n"
" -M<fil> - Write dependencies to <fil>\n"
" -o<fil> - Send the output to <fil>\n"
" -v - Print version information\n",
argv[0]);
return flag_errors;
}
/* Collect the file names on the command line in the source
file list, then if there is a file list, read more file
names from there. */
for (idx = optind ; idx < argc ; idx += 1)
add_source_file(argv[idx]);
if (flist_path) {
int rc = flist_read_names(flist_path);
if (rc != 0)
return rc;
}
/* Figure out what to use for an output file. Write to stdout
if no path is specified. */
if (out_path) {
out = fopen(out_path, "w");
if (out == 0) {
@@ -163,20 +261,58 @@ int main(int argc, char*argv[])
out = stdout;
}
if (argv[optind] == 0) {
if(dep_path) {
depend_file = fopen(dep_path, "w");
if (depend_file == 0) {
perror(dep_path);
exit(1);
}
}
if (source_cnt == 0) {
fprintf(stderr, "%s: No input files given.\n", argv[0]);
return 1;
}
reset_lexor(out, argv+optind);
/* Pass to the lexical analyzer the list of input file, and
start the parser. */
reset_lexor(out, source_list);
if (yyparse()) return -1;
if(depend_file) {
fclose(depend_file);
}
return error_count;
}
/*
* $Log: main.c,v $
* Revision 1.16 2002/08/12 01:35:02 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.14 2001/11/21 02:59:27 steve
* Remove diag print.
*
* Revision 1.13 2001/11/21 02:20:35 steve
* Pass list of file to ivlpp via temporary file.
*
* Revision 1.12 2001/09/15 18:27:04 steve
* Make configure detect malloc.h
*
* Revision 1.11 2001/07/25 03:10:50 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.10 2001/06/23 18:41:02 steve
* Include stdlib.h
*
* Revision 1.9 2001/05/20 18:08:07 steve
* local declares if the header is missing.
*
* Revision 1.8 2000/12/06 05:15:21 steve
* fix portfaults pass values.
*

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